1 #ifndef __CAMSYS_CIF_H__
2 #define __CAMSYS_CIF_H__
4 #include "camsys_internal.h"
6 #define CAMSYS_CIF_IRQNAME "CifIrq"
10 #define CIF_CTRL (CIF_BASE)
11 #define CIF_INITSTA (CIF_BASE+0x08)
12 #define CIF_FRAME_STATUS (CIF_BASE+0x60)
13 #define CIF_LAST_LINE (CIF_BASE+0x68)
14 #define CIF_LAST_PIX (CIF_BASE+0x6c)
15 #define CRU_PCLK_REG30 0xbc
18 #if defined(CONFIG_ARCH_RK3066B) || defined(CONFIG_ARCH_RK3188) || defined(CONFIG_ARCH_ROCKCHIP)
20 #define CIF_DRIVER_STRENGTH_2MA (0x00 << 12)
21 #define CIF_DRIVER_STRENGTH_4MA (0x01 << 12)
22 #define CIF_DRIVER_STRENGTH_8MA (0x02 << 12)
23 #define CIF_DRIVER_STRENGTH_12MA (0x03 << 12)
24 #define CIF_DRIVER_STRENGTH_MASK (0x03 << 28)
27 #define CIF_CLKOUT_AMP_3V3 (0x00 << 10)
28 #define CIF_CLKOUT_AMP_1V8 (0x01 << 10)
29 #define CIF_CLKOUT_AMP_MASK (0x01 << 26)
31 #define write_grf_reg(addr, val) __raw_writel(val, addr+RK_GRF_VIRT)
32 #define read_grf_reg(addr) __raw_readl(addr+RK_GRF_VIRT)
33 #define mask_grf_reg(addr, msk, val) write_grf_reg(addr,(val)|((~(msk))&read_grf_reg(addr)))
35 #define write_grf_reg(addr, val)
36 #define read_grf_reg(addr) 0
37 #define mask_grf_reg(addr, msk, val)
41 typedef struct camsys_cif_clk_s {
45 struct clk *cif_clk_in;
48 struct clk *cif_clk_out;
55 int camsys_cif_probe_cb(struct platform_device *pdev, camsys_dev_t *camsys_dev);