1 #ifndef __CAMSYS_MARVIN_H__
2 #define __CAMSYS_MARVIN_H__
4 #include "camsys_internal.h"
6 #define CAMSYS_MARVIN_IRQNAME "MarvinIrq"
8 #define MRV_ISP_BASE 0x400
9 #define MRV_ISP_RIS (MRV_ISP_BASE + 0x1c0)
10 #define MRV_ISP_MIS (MRV_ISP_BASE + 0x1c4)
11 #define MRV_ISP_ICR (MRV_ISP_BASE + 0x1c8)
13 #define MRV_MIPI_BASE 0x1C00
14 #define MRV_MIPI_MIS (MRV_MIPI_BASE + 0x10)
15 #define MRV_MIPI_ICR (MRV_MIPI_BASE + 0x14)
17 #define MRV_MI_BASE (0x1400)
19 #define MRV_MI_MP_Y_OFFS_CNT_START (MRV_MI_BASE + 0x14)
20 #define MRV_MI_INIT (MRV_MI_BASE + 0x4)
21 #define MRV_MI_MP_Y_BASE_AD (MRV_MI_BASE + 0x8)
22 #define MRV_MI_Y_BASE_AD_SHD (MRV_MI_BASE + 0x78)
23 #define MRV_MI_Y_OFFS_CNT_SHD (MRV_MI_BASE + 0x80)
24 #define MRV_MI_IMIS (MRV_MI_BASE + 0xf8)
25 #define MRV_MI_RIS (MRV_MI_BASE + 0xfc)
26 #define MRV_MI_MIS (MRV_MI_BASE + 0x100)
27 #define MRV_MI_ICR (MRV_MI_BASE + 0x104)
29 #define MRV_FLASH_CONFIG (0x664)
31 #define MRV_JPG_BASE (0x1800)
32 #define MRV_JPG_ERR_RIS (MRV_JPG_BASE + 0x6C)
33 #define MRV_JPG_ERR_MIS (MRV_JPG_BASE + 0x70)
34 #define MRV_JPG_ERR_ICR (MRV_JPG_BASE + 0x74)
35 #define MRV_JPG_MIS (MRV_JPG_BASE + 0x84)
36 #define MRV_JPG_RIS (MRV_JPG_BASE + 0x80)
37 #define MRV_JPG_ICR (MRV_JPG_BASE + 0x88)
39 typedef enum IO_USE_TYPE_e {
44 typedef struct camsys_mrv_clk_s {
50 struct clk *pclkin_isp;
51 struct clk *clk_mipi_24m;
52 struct clk *clk_vio0_noc;
55 struct clk *cif_clk_out;
56 struct clk *cif_clk_pll;
57 struct clk *pclk_dphyrx;
61 struct clk *hclk_isp0_noc;
62 struct clk *hclk_isp0_wrapper;
63 struct clk *hclk_isp1_noc;
64 struct clk *hclk_isp1_wrapper;
65 struct clk *aclk_isp0_noc;
66 struct clk *aclk_isp0_wrapper;
67 struct clk *aclk_isp1_noc;
68 struct clk *aclk_isp1_wrapper;
71 struct clk *pclkin_isp1;
72 struct clk *pclk_dphy_ref;
73 struct clk *pclk_dphytxrx;
78 int camsys_mrv_probe_cb(struct platform_device *pdev, camsys_dev_t *camsys_dev);