6 bool "Memory Controller drivers"
11 tristate "ARM PL172 MPMC driver"
12 depends on ARM_AMBA && OF
14 This selects the ARM PrimeCell PL172 MultiPort Memory Controller.
15 If you have an embedded system with an AMBA bus and a PL172
16 controller, say Y or M here.
19 bool "Atmel (Multi-port DDR-)SDRAM Controller"
21 depends on ARCH_AT91 && OF
23 This driver is for Atmel SDRAM Controller or Atmel Multi-port
24 DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
25 Starting with the at91sam9g45, this controller supports SDR, DDR and
29 tristate "Texas Instruments AEMIF driver"
30 depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
32 This driver is for the AEMIF module available in Texas Instruments
33 SoCs. AEMIF stands for Asynchronous External Memory Interface and
34 is intended to provide a glue-less interface to a variety of
35 asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
36 of 256M bytes of any of these memories can be accessed at a given
37 time via four chip selects with 64M byte access per chip select.
40 tristate "Texas Instruments EMIF driver"
41 depends on ARCH_OMAP2PLUS
44 This driver is for the EMIF module available in Texas Instruments
45 SoCs. EMIF is an SDRAM controller that, based on its revision,
46 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
47 This driver takes care of only LPDDR2 memories presently. The
48 functions of the driver includes re-configuring AC timing
49 parameters and other settings during frequency, voltage and
55 This driver is for the General Purpose Memory Controller (GPMC)
56 present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
57 interfacing to a variety of asynchronous as well as synchronous
58 memory drives like NOR, NAND, OneNAND, SRAM.
60 config OMAP_GPMC_DEBUG
64 Enables verbose debugging mostly to decode the bootloader provided
65 timings. Enable this during development to configure devices
66 connected to the GPMC bus.
69 bool "Marvell EBU Device Bus Controller"
71 depends on PLAT_ORION && OF
73 This driver is for the Device Bus controller available in some
74 Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
75 Armada 370 and Armada XP. This controller allows to handle flash
76 devices such as NOR, NAND, SRAM, and FPGA.
79 bool "Tegra20 Memory Controller(MC) driver"
81 depends on ARCH_TEGRA_2x_SOC
83 This driver is for the Memory Controller(MC) module available
84 in Tegra20 SoCs, mainly for a address translation fault
85 analysis, especially for IOMMU/GART(Graphics Address
86 Relocation Table) module.
89 tristate "Freescale CoreNet Error Reporting"
90 depends on FSL_SOC_BOOKE
92 Say Y for reporting of errors from the Freescale CoreNet
93 Coherency Fabric. Errors reported include accesses to
94 physical addresses that mapped by no local access window
95 (LAW) or an invalid LAW, as well as bad cache state that
96 represents a coherency violation.
103 bool "Ingenic JZ4780 SoC NEMC driver"
105 depends on MACH_JZ4780
107 This driver is for the NAND/External Memory Controller (NEMC) in
108 the Ingenic JZ4780. This controller is used to handle external
109 memory devices such as NAND and SRAM.
111 source "drivers/memory/tegra/Kconfig"