2 * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd
3 * Author: Zain Wang <zain.wang@rock-chips.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * Some ideas are from chrome ec and fairchild GPL fusb302 driver.
12 #include <linux/delay.h>
13 #include <linux/extcon.h>
14 #include <linux/gpio.h>
15 #include <linux/interrupt.h>
16 #include <linux/module.h>
17 #include <linux/of_gpio.h>
18 #include <linux/regmap.h>
19 #include <linux/power_supply.h>
23 #define FUSB302_MAX_REG (FUSB_REG_FIFO + 50)
24 #define FUSB_MS_TO_NS(x) ((s64)x * 1000 * 1000)
26 #define FUSB_MODE_DRP 0
27 #define FUSB_MODE_UFP 1
28 #define FUSB_MODE_DFP 2
29 #define FUSB_MODE_ASS 3
31 #define TYPEC_CC_VOLT_OPEN 0
32 #define TYPEC_CC_VOLT_RA 1
33 #define TYPEC_CC_VOLT_RD 2
34 #define TYPEC_CC_VOLT_RP 3
36 #define EVENT_CC BIT(0)
37 #define EVENT_RX BIT(1)
38 #define EVENT_TX BIT(2)
39 #define EVENT_REC_RESET BIT(3)
40 #define EVENT_WORK_CONTINUE BIT(5)
41 #define EVENT_TIMER_MUX BIT(6)
42 #define EVENT_TIMER_STATE BIT(7)
43 #define FLAG_EVENT (EVENT_RX | EVENT_TIMER_MUX | \
46 #define PIN_MAP_A BIT(0)
47 #define PIN_MAP_B BIT(1)
48 #define PIN_MAP_C BIT(2)
49 #define PIN_MAP_D BIT(3)
50 #define PIN_MAP_E BIT(4)
51 #define PIN_MAP_F BIT(5)
53 static u8 fusb30x_port_used;
54 static struct fusb30x_chip *fusb30x_port_info[256];
56 static bool is_write_reg(struct device *dev, unsigned int reg)
58 if (reg >= FUSB_REG_FIFO)
61 return ((reg < (FUSB_REG_CONTROL4 + 1)) && (reg > 0x01)) ?
65 static bool is_volatile_reg(struct device *dev, unsigned int reg)
67 if (reg > FUSB_REG_CONTROL4)
71 case FUSB_REG_CONTROL0:
72 case FUSB_REG_CONTROL1:
73 case FUSB_REG_CONTROL3:
80 struct regmap_config fusb302_regmap_config = {
83 .writeable_reg = is_write_reg,
84 .volatile_reg = is_volatile_reg,
85 .max_register = FUSB302_MAX_REG,
86 .cache_type = REGCACHE_RBTREE,
89 static void dump_notify_info(struct fusb30x_chip *chip)
91 dev_dbg(chip->dev, "port %d\n", chip->port_num);
92 dev_dbg(chip->dev, "orientation %d\n", chip->notify.orientation);
93 dev_dbg(chip->dev, "power_role %d\n", chip->notify.power_role);
94 dev_dbg(chip->dev, "data_role %d\n", chip->notify.data_role);
95 dev_dbg(chip->dev, "cc %d\n", chip->notify.is_cc_connected);
96 dev_dbg(chip->dev, "pd %d\n", chip->notify.is_pd_connected);
97 dev_dbg(chip->dev, "enter_mode %d\n", chip->notify.is_enter_mode);
98 dev_dbg(chip->dev, "pin support %d\n",
99 chip->notify.pin_assignment_support);
100 dev_dbg(chip->dev, "pin def %d\n", chip->notify.pin_assignment_def);
101 dev_dbg(chip->dev, "attention %d\n", chip->notify.attention);
104 static const unsigned int fusb302_cable[] = {
117 static void fusb_set_pos_power(struct fusb30x_chip *chip, int max_vol,
125 for (i = PD_HEADER_CNT(chip->rec_head) - 1; i >= 0; i--) {
126 switch (CAP_POWER_TYPE(chip->rec_load[i])) {
129 if ((CAP_FPDO_VOLTAGE(chip->rec_load[i]) * 50) <=
131 (CAP_FPDO_CURRENT(chip->rec_load[i]) * 10) <=
133 chip->pos_power = i + 1;
134 tmp = CAP_FPDO_VOLTAGE(chip->rec_load[i]);
135 chip->pd_output_vol = tmp * 50;
136 tmp = CAP_FPDO_CURRENT(chip->rec_load[i]);
137 chip->pd_output_cur = tmp * 10;
143 if ((CAP_VPDO_VOLTAGE(chip->rec_load[i]) * 50) <=
145 (CAP_VPDO_CURRENT(chip->rec_load[i]) * 10) <=
147 chip->pos_power = i + 1;
148 tmp = CAP_VPDO_VOLTAGE(chip->rec_load[i]);
149 chip->pd_output_vol = tmp * 50;
150 tmp = CAP_VPDO_CURRENT(chip->rec_load[i]);
151 chip->pd_output_cur = tmp * 10;
156 /* not meet battery caps */
164 static int fusb302_set_pos_power_by_charge_ic(struct fusb30x_chip *chip)
166 struct power_supply *psy = NULL;
167 union power_supply_propval val;
168 enum power_supply_property psp;
169 int max_vol, max_cur;
173 psy = power_supply_get_by_phandle(chip->dev->of_node, "charge-dev");
174 if (!psy || IS_ERR(psy))
177 psp = POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT_MAX;
178 if (power_supply_get_property(psy, psp, &val) == 0)
179 max_vol = val.intval / 1000;
181 psp = POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT;
182 if (power_supply_get_property(psy, psp, &val) == 0)
183 max_cur = val.intval / 1000;
185 if (max_vol > 0 && max_cur > 0)
186 fusb_set_pos_power(chip, max_vol, max_cur);
191 void fusb_irq_disable(struct fusb30x_chip *chip)
193 unsigned long irqflags = 0;
195 spin_lock_irqsave(&chip->irq_lock, irqflags);
196 if (chip->enable_irq) {
197 disable_irq_nosync(chip->gpio_int_irq);
198 chip->enable_irq = 0;
200 dev_warn(chip->dev, "irq have already disabled\n");
202 spin_unlock_irqrestore(&chip->irq_lock, irqflags);
205 void fusb_irq_enable(struct fusb30x_chip *chip)
207 unsigned long irqflags = 0;
209 spin_lock_irqsave(&chip->irq_lock, irqflags);
210 if (!chip->enable_irq) {
211 enable_irq(chip->gpio_int_irq);
212 chip->enable_irq = 1;
214 spin_unlock_irqrestore(&chip->irq_lock, irqflags);
217 static void platform_fusb_notify(struct fusb30x_chip *chip)
219 bool plugged = 0, flip = 0, dfp = 0, ufp = 0, dp = 0, usb_ss = 0;
220 union extcon_property_value property;
222 if (chip->notify.is_cc_connected)
223 chip->notify.orientation = chip->cc_polarity + 1;
225 /* avoid notify repeated */
226 if (memcmp(&chip->notify, &chip->notify_cmp,
227 sizeof(struct notify_info))) {
228 dump_notify_info(chip);
229 chip->notify.attention = 0;
230 memcpy(&chip->notify_cmp, &chip->notify,
231 sizeof(struct notify_info));
233 plugged = chip->notify.is_cc_connected ||
234 chip->notify.is_pd_connected;
235 flip = chip->notify.orientation ?
236 (chip->notify.orientation - 1) : 0;
237 dp = chip->notify.is_enter_mode;
241 usb_ss = (chip->notify.pin_assignment_def &
242 (PIN_MAP_B | PIN_MAP_D | PIN_MAP_F)) ? 1 : 0;
243 } else if (chip->notify.data_role) {
246 } else if (plugged) {
251 property.intval = flip;
252 extcon_set_property(chip->extcon, EXTCON_USB,
253 EXTCON_PROP_USB_TYPEC_POLARITY, property);
254 extcon_set_property(chip->extcon, EXTCON_USB_HOST,
255 EXTCON_PROP_USB_TYPEC_POLARITY, property);
256 extcon_set_property(chip->extcon, EXTCON_DISP_DP,
257 EXTCON_PROP_USB_TYPEC_POLARITY, property);
259 property.intval = usb_ss;
260 extcon_set_property(chip->extcon, EXTCON_USB,
261 EXTCON_PROP_USB_SS, property);
262 extcon_set_property(chip->extcon, EXTCON_USB_HOST,
263 EXTCON_PROP_USB_SS, property);
264 extcon_set_property(chip->extcon, EXTCON_DISP_DP,
265 EXTCON_PROP_USB_SS, property);
266 extcon_set_state(chip->extcon, EXTCON_USB, ufp);
267 extcon_set_state(chip->extcon, EXTCON_USB_HOST, dfp);
268 extcon_set_state(chip->extcon, EXTCON_DISP_DP, dp);
269 extcon_sync(chip->extcon, EXTCON_USB);
270 extcon_sync(chip->extcon, EXTCON_USB_HOST);
271 extcon_sync(chip->extcon, EXTCON_DISP_DP);
272 if (chip->notify.power_role == 0 &&
273 chip->notify.is_pd_connected &&
274 chip->pd_output_vol > 0 && chip->pd_output_cur > 0) {
275 extcon_set_state(chip->extcon, EXTCON_CHG_USB_FAST, true);
277 (chip->pd_output_cur << 15 |
278 chip->pd_output_vol);
279 extcon_set_property(chip->extcon, EXTCON_CHG_USB_FAST,
280 EXTCON_PROP_USB_TYPEC_POLARITY,
282 extcon_sync(chip->extcon, EXTCON_CHG_USB_FAST);
287 static bool platform_get_device_irq_state(struct fusb30x_chip *chip)
289 return !gpiod_get_value(chip->gpio_int);
292 static void fusb_timer_start(struct hrtimer *timer, int ms)
296 ktime = ktime_set(0, FUSB_MS_TO_NS(ms));
297 hrtimer_start(timer, ktime, HRTIMER_MODE_REL);
300 static void platform_set_vbus_lvl_enable(struct fusb30x_chip *chip, int vbus_5v,
303 bool gpio_vbus_value = 0;
305 gpio_vbus_value = gpiod_get_value(chip->gpio_vbus_5v);
306 if (chip->gpio_vbus_5v) {
307 gpiod_set_raw_value(chip->gpio_vbus_5v, vbus_5v);
308 /* Only set state here, don't sync notifier to PMIC */
309 extcon_set_state(chip->extcon, EXTCON_USB_VBUS_EN, vbus_5v);
311 extcon_set_state(chip->extcon, EXTCON_USB_VBUS_EN, vbus_5v);
312 extcon_sync(chip->extcon, EXTCON_USB_VBUS_EN);
313 dev_info(chip->dev, "fusb302 send extcon to %s vbus 5v\n", vbus_5v ? "enable" : "disable");
316 if (chip->gpio_vbus_other)
317 gpiod_set_raw_value(chip->gpio_vbus_5v, vbus_other);
319 if (chip->gpio_discharge && !vbus_5v && gpio_vbus_value) {
320 gpiod_set_value(chip->gpio_discharge, 1);
322 gpiod_set_value(chip->gpio_discharge, 0);
326 static void set_state(struct fusb30x_chip *chip, enum connection_state state)
328 dev_dbg(chip->dev, "port %d, state %d\n", chip->port_num, state);
330 dev_info(chip->dev, "PD disabled\n");
331 chip->conn_state = state;
334 chip->work_continue = 1;
337 static int tcpm_get_message(struct fusb30x_chip *chip)
342 regmap_raw_read(chip->regmap, FUSB_REG_FIFO, buf, 3);
343 chip->rec_head = (buf[1] & 0xff) | ((buf[2] << 8) & 0xff00);
345 len = PD_HEADER_CNT(chip->rec_head) << 2;
346 regmap_raw_read(chip->regmap, FUSB_REG_FIFO, buf, len + 4);
348 memcpy(chip->rec_load, buf, len);
353 static void fusb302_flush_rx_fifo(struct fusb30x_chip *chip)
355 tcpm_get_message(chip);
358 static int tcpm_get_cc(struct fusb30x_chip *chip, int *CC1, int *CC2)
364 *CC1 = TYPEC_CC_VOLT_OPEN;
365 *CC2 = TYPEC_CC_VOLT_OPEN;
367 if (chip->cc_state & 0x01)
372 if (chip->cc_state & 0x04) {
373 regmap_read(chip->regmap, FUSB_REG_SWITCHES0, &store);
374 /* measure cc1 first */
375 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
376 SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
377 SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
378 SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
379 SWITCHES0_PDWN1 | SWITCHES0_PDWN2 |
381 usleep_range(250, 300);
383 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
384 val &= STATUS0_BC_LVL;
388 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
389 SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
390 SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
391 SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
392 SWITCHES0_PDWN1 | SWITCHES0_PDWN2 |
394 usleep_range(250, 300);
396 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
397 val &= STATUS0_BC_LVL;
400 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
401 SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
404 regmap_read(chip->regmap, FUSB_REG_SWITCHES0, &store);
406 val &= ~(SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
407 SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2);
408 if (chip->cc_state & 0x01) {
409 val |= SWITCHES0_MEAS_CC1 | SWITCHES0_PU_EN1;
411 val |= SWITCHES0_MEAS_CC2 | SWITCHES0_PU_EN2;
413 regmap_write(chip->regmap, FUSB_REG_SWITCHES0, val);
415 regmap_write(chip->regmap, FUSB_REG_MEASURE, chip->cc_meas_high);
416 usleep_range(250, 300);
418 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
419 if (val & STATUS0_COMP) {
424 regmap_write(chip->regmap, FUSB_REG_MEASURE, chip->cc_meas_high);
425 usleep_range(250, 300);
426 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
427 if (val & STATUS0_COMP) {
429 if (comp_times == 3) {
430 *CC_MEASURE = TYPEC_CC_VOLT_OPEN;
431 regmap_write(chip->regmap, FUSB_REG_SWITCHES0, store);
436 regmap_write(chip->regmap, FUSB_REG_MEASURE, chip->cc_meas_low);
437 regmap_read(chip->regmap, FUSB_REG_MEASURE, &val);
438 usleep_range(250, 300);
440 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
442 if (val & STATUS0_COMP)
443 *CC_MEASURE = TYPEC_CC_VOLT_RD;
445 *CC_MEASURE = TYPEC_CC_VOLT_RA;
446 regmap_write(chip->regmap, FUSB_REG_SWITCHES0, store);
453 static int tcpm_set_cc(struct fusb30x_chip *chip, int mode)
457 val &= ~(SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
458 SWITCHES0_PDWN1 | SWITCHES0_PDWN2);
464 if (chip->togdone_pullup)
465 val |= SWITCHES0_PU_EN2;
467 val |= SWITCHES0_PU_EN1;
470 val |= SWITCHES0_PDWN1 | SWITCHES0_PDWN2;
473 val |= SWITCHES0_PDWN1 | SWITCHES0_PDWN2;
479 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0, mask, val);
483 static int tcpm_set_rx_enable(struct fusb30x_chip *chip, int enable)
488 if (chip->cc_polarity)
489 val |= SWITCHES0_MEAS_CC2;
491 val |= SWITCHES0_MEAS_CC1;
492 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
493 SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
495 fusb302_flush_rx_fifo(chip);
496 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
497 SWITCHES1_AUTO_CRC, SWITCHES1_AUTO_CRC);
500 * bit of a hack here.
501 * when this function is called to disable rx (enable=0)
502 * using it as an indication of detach (gulp!)
503 * to reset our knowledge of where
504 * the toggle state machine landed.
506 chip->togdone_pullup = 0;
509 tcpm_set_cc(chip, FUSB_MODE_DRP);
510 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
511 CONTROL2_TOG_RD_ONLY,
512 CONTROL2_TOG_RD_ONLY);
514 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
515 SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
517 regmap_update_bits(chip->regmap,
518 FUSB_REG_SWITCHES1, SWITCHES1_AUTO_CRC, 0);
524 static int tcpm_set_msg_header(struct fusb30x_chip *chip)
526 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
527 SWITCHES1_POWERROLE | SWITCHES1_DATAROLE,
528 (chip->notify.power_role << 7) |
529 (chip->notify.data_role << 4));
530 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
531 SWITCHES1_SPECREV, 2 << 5);
535 static int tcpm_set_polarity(struct fusb30x_chip *chip, bool polarity)
539 #ifdef FUSB_VCONN_SUPPORT
540 if (chip->vconn_enabled) {
542 val |= SWITCHES0_VCONN_CC1;
544 val |= SWITCHES0_VCONN_CC2;
549 val |= SWITCHES0_MEAS_CC2;
551 val |= SWITCHES0_MEAS_CC1;
553 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
554 SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2 |
555 SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
560 val |= SWITCHES1_TXCC2;
562 val |= SWITCHES1_TXCC1;
563 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
564 SWITCHES1_TXCC1 | SWITCHES1_TXCC2,
567 chip->cc_polarity = polarity;
572 static int tcpm_set_vconn(struct fusb30x_chip *chip, int enable)
577 tcpm_set_polarity(chip, chip->cc_polarity);
579 val &= ~(SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2);
580 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
581 SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2,
584 chip->vconn_enabled = enable;
588 static void fusb302_pd_reset(struct fusb30x_chip *chip)
590 regmap_write(chip->regmap, FUSB_REG_RESET, RESET_PD_RESET);
591 regmap_reinit_cache(chip->regmap, &fusb302_regmap_config);
594 static void tcpm_select_rp_value(struct fusb30x_chip *chip, u32 rp)
598 regmap_read(chip->regmap, FUSB_REG_CONTROL0, &control0_reg);
600 control0_reg &= ~CONTROL0_HOST_CUR;
602 * according to the host current, the compare value is different
605 /* host pull up current is 80ua , high voltage is 1.596v, low is 0.21v */
607 chip->cc_meas_high = 0x26;
608 chip->cc_meas_low = 0x5;
609 control0_reg |= CONTROL0_HOST_CUR_USB;
611 /* host pull up current is 180ua , high voltage is 1.596v, low is 0.42v */
613 chip->cc_meas_high = 0x26;
614 chip->cc_meas_low = 0xa;
615 control0_reg |= CONTROL0_HOST_CUR_1A5;
617 /* host pull up current is 330ua , high voltage is 2.604v, low is 0.798v*/
619 chip->cc_meas_high = 0x26;
620 chip->cc_meas_low = 0x13;
621 control0_reg |= CONTROL0_HOST_CUR_3A0;
624 chip->cc_meas_high = 0x26;
625 chip->cc_meas_low = 0xa;
626 control0_reg |= CONTROL0_HOST_CUR_1A5;
630 regmap_write(chip->regmap, FUSB_REG_CONTROL0, control0_reg);
633 static void tcpm_init(struct fusb30x_chip *chip)
638 regmap_read(chip->regmap, FUSB_REG_DEVICEID, &tmp);
639 chip->chip_id = (u8)tmp;
640 platform_set_vbus_lvl_enable(chip, 0, 0);
641 chip->notify.is_cc_connected = 0;
644 /* restore default settings */
645 regmap_update_bits(chip->regmap, FUSB_REG_RESET, RESET_SW_RESET,
647 fusb302_pd_reset(chip);
648 /* set auto_retry and number of retries */
649 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL3,
650 CONTROL3_AUTO_RETRY | CONTROL3_N_RETRIES,
651 CONTROL3_AUTO_RETRY | CONTROL3_N_RETRIES),
655 val &= ~(MASK_M_BC_LVL | MASK_M_COLLISION | MASK_M_ALERT |
657 regmap_write(chip->regmap, FUSB_REG_MASK, val);
660 val &= ~(MASKA_M_TOGDONE | MASKA_M_RETRYFAIL | MASKA_M_HARDSENT |
661 MASKA_M_TXSENT | MASKA_M_HARDRST);
662 regmap_write(chip->regmap, FUSB_REG_MASKA, val);
665 val = ~MASKB_M_GCRCSEND;
666 regmap_write(chip->regmap, FUSB_REG_MASKB, val);
669 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
670 CONTROL2_MODE | CONTROL2_TOGGLE,
671 (1 << 1) | CONTROL2_TOGGLE);
673 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
674 CONTROL2_TOG_RD_ONLY,
675 CONTROL2_TOG_RD_ONLY);
678 tcpm_select_rp_value(chip, TYPEC_RP_1A5);
679 /* Interrupts Enable */
680 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL0, CONTROL0_INT_MASK,
683 tcpm_set_polarity(chip, 0);
684 tcpm_set_vconn(chip, 0);
686 regmap_write(chip->regmap, FUSB_REG_POWER, 0xf);
689 static void pd_execute_hard_reset(struct fusb30x_chip *chip)
693 if (chip->notify.power_role)
694 set_state(chip, policy_src_transition_default);
696 set_state(chip, policy_snk_transition_default);
699 static void tcpc_alert(struct fusb30x_chip *chip, int *evt)
701 int interrupt, interrupta, interruptb;
705 regmap_read(chip->regmap, FUSB_REG_INTERRUPT, &interrupt);
706 regmap_read(chip->regmap, FUSB_REG_INTERRUPTA, &interrupta);
707 regmap_read(chip->regmap, FUSB_REG_INTERRUPTB, &interruptb);
709 if (interrupt & INTERRUPT_BC_LVL) {
710 if (chip->notify.is_cc_connected)
714 if (interrupt & INTERRUPT_VBUSOK) {
715 if (chip->notify.is_cc_connected)
719 if (interrupta & INTERRUPTA_TOGDONE) {
721 regmap_read(chip->regmap, FUSB_REG_STATUS1A, &val);
722 chip->cc_state = ((u8)val >> 3) & 0x07;
724 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
728 val &= ~(SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
729 SWITCHES0_PDWN1 | SWITCHES0_PDWN2);
731 if (chip->cc_state & 0x01)
732 val |= SWITCHES0_PU_EN1;
734 val |= SWITCHES0_PU_EN2;
736 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
737 SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
738 SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
742 if (interrupta & INTERRUPTA_TXSENT) {
744 fusb302_flush_rx_fifo(chip);
745 chip->tx_state = tx_success;
748 if (interruptb & INTERRUPTB_GCRCSENT)
751 if (interrupta & INTERRUPTA_HARDRST) {
752 fusb302_pd_reset(chip);
753 pd_execute_hard_reset(chip);
754 *evt |= EVENT_REC_RESET;
757 if (interrupta & INTERRUPTA_RETRYFAIL) {
759 chip->tx_state = tx_failed;
762 if (interrupta & INTERRUPTA_HARDSENT) {
764 * The fusb PD should be reset once to sync adapter PD
765 * signal after fusb sent hard reset cmd.This is not PD
766 * device if reset failed.
770 fusb302_pd_reset(chip);
771 pd_execute_hard_reset(chip);
774 chip->tx_state = tx_success;
775 chip->timer_state = T_DISABLED;
781 static void mux_alert(struct fusb30x_chip *chip, int *evt)
783 if (!chip->timer_mux) {
784 *evt |= EVENT_TIMER_MUX;
785 chip->timer_mux = T_DISABLED;
788 if (!chip->timer_state) {
789 *evt |= EVENT_TIMER_STATE;
790 chip->timer_state = T_DISABLED;
793 if (chip->work_continue) {
794 *evt |= EVENT_WORK_CONTINUE;
795 chip->work_continue = 0;
799 static void set_state_unattached(struct fusb30x_chip *chip)
801 dev_info(chip->dev, "connection has disconnected\n");
803 tcpm_set_rx_enable(chip, 0);
804 chip->conn_state = unattached;
805 tcpm_set_cc(chip, FUSB_MODE_DRP);
807 /* claer notify_info */
808 memset(&chip->notify, 0, sizeof(struct notify_info));
809 platform_fusb_notify(chip);
811 if (chip->gpio_discharge)
812 gpiod_set_value(chip->gpio_discharge, 1);
814 if (chip->gpio_discharge)
815 gpiod_set_value(chip->gpio_discharge, 0);
818 static int tcpm_check_vbus(struct fusb30x_chip *chip)
822 /* Read status register */
823 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
825 return (val & STATUS0_VBUSOK) ? 1 : 0;
828 static void set_mesg(struct fusb30x_chip *chip, int cmd, int is_DMT)
831 struct PD_CAP_INFO *pd_cap_info = &chip->pd_cap_info;
833 chip->send_head = ((chip->msg_id & 0x7) << 9) |
834 ((chip->notify.power_role & 0x1) << 8) |
836 ((chip->notify.data_role & 0x1) << 5);
840 case DMT_SOURCECAPABILITIES:
841 chip->send_head |= ((chip->n_caps_used & 0x3) << 12) | (cmd & 0xf);
843 for (i = 0; i < chip->n_caps_used; i++) {
844 chip->send_load[i] = (pd_cap_info->supply_type << 30) |
845 (pd_cap_info->dual_role_power << 29) |
846 (pd_cap_info->usb_suspend_support << 28) |
847 (pd_cap_info->externally_powered << 27) |
848 (pd_cap_info->usb_communications_cap << 26) |
849 (pd_cap_info->data_role_swap << 25) |
850 (pd_cap_info->peak_current << 20) |
851 (chip->source_power_supply[i] << 10) |
852 (chip->source_max_current[i]);
856 chip->send_head |= ((1 << 12) | (cmd & 0xf));
857 /* send request with FVRDO */
858 chip->send_load[0] = (chip->pos_power << 28) |
864 switch (CAP_POWER_TYPE(chip->rec_load[chip->pos_power - 1])) {
867 chip->send_load[0] |= ((CAP_FPDO_VOLTAGE(chip->rec_load[chip->pos_power - 1]) << 10) & 0x3ff);
868 chip->send_load[0] |= (CAP_FPDO_CURRENT(chip->rec_load[chip->pos_power - 1]) & 0x3ff);
872 chip->send_load[0] |= ((CAP_VPDO_VOLTAGE(chip->rec_load[chip->pos_power - 1]) << 10) & 0x3ff);
873 chip->send_load[0] |= (CAP_VPDO_CURRENT(chip->rec_load[chip->pos_power - 1]) & 0x3ff);
876 /* not meet battery caps */
880 case DMT_SINKCAPABILITIES:
882 case DMT_VENDERDEFINED:
888 chip->send_head |= (cmd & 0xf);
892 static void set_vdm_mesg(struct fusb30x_chip *chip, int cmd, int type, int mode)
894 chip->send_head = (chip->msg_id & 0x7) << 9;
895 chip->send_head |= (chip->notify.power_role & 0x1) << 8;
897 chip->send_head = ((chip->msg_id & 0x7) << 9) |
898 ((chip->notify.power_role & 0x1) << 8) |
900 ((chip->notify.data_role & 0x1) << 5) |
901 (DMT_VENDERDEFINED & 0xf);
903 chip->send_load[0] = (1 << 15) |
909 case VDM_DISCOVERY_ID:
910 case VDM_DISCOVERY_SVIDS:
912 chip->send_load[0] |= (0xff00 << 16);
913 chip->send_head |= (1 << 12);
915 case VDM_DISCOVERY_MODES:
916 chip->send_load[0] |=
917 (chip->vdm_svid[chip->val_tmp >> 1] << 16);
918 chip->send_head |= (1 << 12);
921 chip->send_head |= (1 << 12);
922 chip->send_load[0] |= (mode << 8) | (0xff01 << 16);
925 chip->send_head |= (1 << 12);
926 chip->send_load[0] |= (0x0f << 8) | (0xff01 << 16);
928 case VDM_DP_STATUS_UPDATE:
929 chip->send_head |= (2 << 12);
930 chip->send_load[0] |= (1 << 8) | (0xff01 << 16);
931 chip->send_load[1] = 5;
934 chip->send_head |= (2 << 12);
935 chip->send_load[0] |= (1 << 8) | (0xff01 << 16);
936 chip->send_load[1] = (chip->notify.pin_assignment_def << 8) |
944 static enum tx_state policy_send_hardrst(struct fusb30x_chip *chip, int evt)
946 switch (chip->tx_state) {
948 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL3,
949 CONTROL3_SEND_HARDRESET,
950 CONTROL3_SEND_HARDRESET);
951 chip->tx_state = tx_busy;
952 chip->timer_state = T_BMC_TIMEOUT;
953 fusb_timer_start(&chip->timer_state_machine,
957 if (evt & EVENT_TIMER_STATE)
958 chip->tx_state = tx_success;
961 return chip->tx_state;
964 static enum tx_state policy_send_data(struct fusb30x_chip *chip)
970 switch (chip->tx_state) {
972 senddata[pos++] = FUSB_TKN_SYNC1;
973 senddata[pos++] = FUSB_TKN_SYNC1;
974 senddata[pos++] = FUSB_TKN_SYNC1;
975 senddata[pos++] = FUSB_TKN_SYNC2;
977 len = PD_HEADER_CNT(chip->send_head) << 2;
978 senddata[pos++] = FUSB_TKN_PACKSYM | ((len + 2) & 0x1f);
980 senddata[pos++] = chip->send_head & 0xff;
981 senddata[pos++] = (chip->send_head >> 8) & 0xff;
983 memcpy(&senddata[pos], chip->send_load, len);
986 senddata[pos++] = FUSB_TKN_JAMCRC;
987 senddata[pos++] = FUSB_TKN_EOP;
988 senddata[pos++] = FUSB_TKN_TXOFF;
989 senddata[pos++] = FUSB_TKN_TXON;
991 regmap_raw_write(chip->regmap, FUSB_REG_FIFO, senddata, pos);
992 chip->tx_state = tx_busy;
1000 return chip->tx_state;
1003 static void process_vdm_msg(struct fusb30x_chip *chip)
1005 u32 vdm_header = chip->rec_load[0];
1009 /* can't procee unstructed vdm msg */
1010 if (!GET_VDMHEAD_STRUCT_TYPE(vdm_header))
1013 switch (GET_VDMHEAD_CMD_TYPE(vdm_header)) {
1015 switch (GET_VDMHEAD_CMD(vdm_header)) {
1017 dev_info(chip->dev, "attention, dp_status %x\n",
1019 chip->notify.attention = 1;
1020 chip->vdm_state = 6;
1023 dev_warn(chip->dev, "rec unknown init vdm msg\n");
1028 switch (GET_VDMHEAD_CMD(vdm_header)) {
1029 case VDM_DISCOVERY_ID:
1030 chip->vdm_id = chip->rec_load[1];
1032 case VDM_DISCOVERY_SVIDS:
1033 for (i = 0; i < 6; i++) {
1034 tmp = (chip->rec_load[i + 1] >> 16) &
1037 chip->vdm_svid[i * 2] = tmp;
1038 chip->vdm_svid_num++;
1043 tmp = (chip->rec_load[i + 1] & 0x0000ffff);
1045 chip->vdm_svid[i * 2 + 1] = tmp;
1046 chip->vdm_svid_num++;
1052 case VDM_DISCOVERY_MODES:
1053 /* indicate there are some vdo modes */
1054 if (PD_HEADER_CNT(chip->rec_head) > 1) {
1056 * store mode config,
1057 * enter first mode default
1059 if (!((chip->rec_load[1] >> 8) & 0x3f)) {
1063 chip->notify.pin_assignment_support = 0;
1064 chip->notify.pin_assignment_def = 0;
1065 chip->notify.pin_assignment_support =
1066 (chip->rec_load[1] >> 8) & 0x3f;
1067 tmp = chip->notify.pin_assignment_support;
1068 for (i = 0; i < 6; i++) {
1074 chip->notify.pin_assignment_def = 0x20 >> i;
1078 case VDM_ENTER_MODE:
1081 case VDM_DP_STATUS_UPDATE:
1082 dev_dbg(chip->dev, "dp_status 0x%x\n",
1089 "DP config successful, pin_assignment 0x%x\n",
1090 chip->notify.pin_assignment_def);
1091 chip->notify.is_enter_mode = 1;
1098 dev_warn(chip->dev, "REC NACK for 0x%x\n",
1099 GET_VDMHEAD_CMD(vdm_header));
1101 chip->vdm_state = 0xff;
1106 static int vdm_send_discoveryid(struct fusb30x_chip *chip, int evt)
1110 switch (chip->vdm_send_state) {
1112 set_vdm_mesg(chip, VDM_DISCOVERY_ID, VDM_TYPE_INIT, 0);
1115 chip->vdm_send_state++;
1117 tmp = policy_send_data(chip);
1118 if (tmp == tx_success) {
1119 chip->vdm_send_state++;
1120 chip->timer_state = T_SENDER_RESPONSE;
1121 fusb_timer_start(&chip->timer_state_machine,
1123 } else if (tmp == tx_failed) {
1124 dev_warn(chip->dev, "VDM_DISCOVERY_ID send failed\n");
1125 /* disable auto_vdm_machine */
1126 chip->vdm_state = 0xff;
1129 if (chip->vdm_send_state != 2)
1132 if (evt & EVENT_TIMER_STATE) {
1133 dev_warn(chip->dev, "VDM_DISCOVERY_ID time out\n");
1134 chip->vdm_state = 0xff;
1135 chip->work_continue = 1;
1140 chip->vdm_send_state = 0;
1143 return -EINPROGRESS;
1146 static int vdm_send_discoverysvid(struct fusb30x_chip *chip, int evt)
1150 switch (chip->vdm_send_state) {
1152 set_vdm_mesg(chip, VDM_DISCOVERY_SVIDS, VDM_TYPE_INIT, 0);
1153 memset(chip->vdm_svid, 0, 12);
1154 chip->vdm_svid_num = 0;
1156 chip->vdm_send_state++;
1158 tmp = policy_send_data(chip);
1159 if (tmp == tx_success) {
1160 chip->vdm_send_state++;
1161 chip->timer_state = T_SENDER_RESPONSE;
1162 fusb_timer_start(&chip->timer_state_machine,
1164 } else if (tmp == tx_failed) {
1165 dev_warn(chip->dev, "VDM_DISCOVERY_SVIDS send failed\n");
1166 /* disable auto_vdm_machine */
1167 chip->vdm_state = 0xff;
1170 if (chip->vdm_send_state != 2)
1173 if (evt & EVENT_TIMER_STATE) {
1174 dev_warn(chip->dev, "VDM_DISCOVERY_SVIDS time out\n");
1175 chip->vdm_state = 0xff;
1176 chip->work_continue = 1;
1179 if (!chip->vdm_svid_num)
1181 chip->vdm_send_state = 0;
1184 return -EINPROGRESS;
1187 static int vdm_send_discoverymodes(struct fusb30x_chip *chip, int evt)
1191 if ((chip->val_tmp >> 1) != chip->vdm_svid_num) {
1192 switch (chip->vdm_send_state) {
1194 set_vdm_mesg(chip, VDM_DISCOVERY_MODES,
1197 chip->vdm_send_state++;
1199 tmp = policy_send_data(chip);
1200 if (tmp == tx_success) {
1201 chip->vdm_send_state++;
1202 chip->timer_state = T_SENDER_RESPONSE;
1203 fusb_timer_start(&chip->timer_state_machine,
1205 } else if (tmp == tx_failed) {
1207 "VDM_DISCOVERY_MODES send failed\n");
1208 chip->vdm_state = 0xff;
1211 if (chip->vdm_send_state != 2)
1214 if (evt & EVENT_TIMER_STATE) {
1216 "VDM_DISCOVERY_MODES time out\n");
1217 chip->vdm_state = 0xff;
1218 chip->work_continue = 1;
1221 if (!(chip->val_tmp & 1))
1223 chip->val_tmp &= 0xfe;
1225 chip->vdm_send_state = 0;
1226 chip->work_continue = 1;
1234 return -EINPROGRESS;
1237 static int vdm_send_entermode(struct fusb30x_chip *chip, int evt)
1241 switch (chip->vdm_send_state) {
1243 set_vdm_mesg(chip, VDM_ENTER_MODE, VDM_TYPE_INIT, 1);
1245 chip->vdm_send_state++;
1246 chip->notify.is_enter_mode = 0;
1248 tmp = policy_send_data(chip);
1249 if (tmp == tx_success) {
1250 chip->vdm_send_state++;
1251 chip->timer_state = T_SENDER_RESPONSE;
1252 fusb_timer_start(&chip->timer_state_machine,
1254 } else if (tmp == tx_failed) {
1255 dev_warn(chip->dev, "VDM_ENTER_MODE send failed\n");
1256 /* disable auto_vdm_machine */
1257 chip->vdm_state = 0xff;
1260 if (chip->vdm_send_state != 2)
1263 if (evt & EVENT_TIMER_STATE) {
1264 dev_warn(chip->dev, "VDM_ENTER_MODE time out\n");
1265 chip->vdm_state = 0xff;
1266 chip->work_continue = 1;
1272 chip->vdm_send_state = 0;
1275 return -EINPROGRESS;
1278 static int vdm_send_getdpstatus(struct fusb30x_chip *chip, int evt)
1282 switch (chip->vdm_send_state) {
1284 set_vdm_mesg(chip, VDM_DP_STATUS_UPDATE, VDM_TYPE_INIT, 1);
1286 chip->vdm_send_state++;
1288 tmp = policy_send_data(chip);
1289 if (tmp == tx_success) {
1290 chip->vdm_send_state++;
1291 chip->timer_state = T_SENDER_RESPONSE;
1292 fusb_timer_start(&chip->timer_state_machine,
1294 } else if (tmp == tx_failed) {
1296 "VDM_DP_STATUS_UPDATE send failed\n");
1297 /* disable auto_vdm_machine */
1298 chip->vdm_state = 0xff;
1301 if (chip->vdm_send_state != 2)
1304 if (evt & EVENT_TIMER_STATE) {
1305 dev_warn(chip->dev, "VDM_DP_STATUS_UPDATE time out\n");
1306 chip->vdm_state = 0xff;
1307 chip->work_continue = 1;
1313 chip->vdm_send_state = 0;
1316 return -EINPROGRESS;
1319 static int vdm_send_dpconfig(struct fusb30x_chip *chip, int evt)
1323 switch (chip->vdm_send_state) {
1325 set_vdm_mesg(chip, VDM_DP_CONFIG, VDM_TYPE_INIT, 0);
1327 chip->vdm_send_state++;
1329 tmp = policy_send_data(chip);
1330 if (tmp == tx_success) {
1331 chip->vdm_send_state++;
1332 chip->timer_state = T_SENDER_RESPONSE;
1333 fusb_timer_start(&chip->timer_state_machine,
1335 } else if (tmp == tx_failed) {
1336 dev_warn(chip->dev, "vdm_send_dpconfig send failed\n");
1337 /* disable auto_vdm_machine */
1338 chip->vdm_state = 0xff;
1341 if (chip->vdm_send_state != 2)
1344 if (evt & EVENT_TIMER_STATE) {
1345 dev_warn(chip->dev, "vdm_send_dpconfig time out\n");
1346 chip->vdm_state = 0xff;
1347 chip->work_continue = 1;
1353 chip->vdm_send_state = 0;
1356 return -EINPROGRESS;
1359 static void auto_vdm_machine(struct fusb30x_chip *chip, int evt)
1361 switch (chip->vdm_state) {
1363 if (vdm_send_discoveryid(chip, evt))
1368 if (vdm_send_discoverysvid(chip, evt))
1373 if (vdm_send_discoverymodes(chip, evt))
1378 if (vdm_send_entermode(chip, evt))
1383 if (vdm_send_dpconfig(chip, evt))
1385 chip->vdm_state = 6;
1388 if (vdm_send_getdpstatus(chip, evt))
1393 platform_fusb_notify(chip);
1398 static void fusb_state_disabled(struct fusb30x_chip *chip, int evt)
1400 platform_fusb_notify(chip);
1403 static void fusb_state_unattached(struct fusb30x_chip *chip, int evt)
1405 chip->notify.is_cc_connected = 0;
1406 if ((evt & EVENT_CC) && chip->cc_state) {
1407 if (chip->cc_state & 0x04)
1408 set_state(chip, attach_wait_sink);
1410 set_state(chip, attach_wait_source);
1412 tcpm_get_cc(chip, &chip->cc1, &chip->cc2);
1413 chip->debounce_cnt = 0;
1414 chip->timer_mux = 2;
1415 fusb_timer_start(&chip->timer_mux_machine, chip->timer_mux);
1419 static void fusb_state_attach_wait_sink(struct fusb30x_chip *chip, int evt)
1423 if (evt & EVENT_TIMER_MUX) {
1424 tcpm_get_cc(chip, &cc1, &cc2);
1426 if ((chip->cc1 == cc1) && (chip->cc2 == cc2)) {
1427 chip->debounce_cnt++;
1431 chip->debounce_cnt = 0;
1434 if (chip->debounce_cnt > N_DEBOUNCE_CNT) {
1435 if ((chip->cc1 != chip->cc2) &&
1436 ((!chip->cc1) || (!chip->cc2))) {
1437 set_state(chip, attached_sink);
1439 set_state_unattached(chip);
1444 chip->timer_mux = 2;
1445 fusb_timer_start(&chip->timer_mux_machine,
1450 static void fusb_state_attach_wait_source(struct fusb30x_chip *chip, int evt)
1454 if (evt & EVENT_TIMER_MUX) {
1455 tcpm_get_cc(chip, &cc1, &cc2);
1457 if ((chip->cc1 == cc1) && (chip->cc2 == cc2)) {
1458 if (chip->debounce_cnt++ == 0)
1459 platform_set_vbus_lvl_enable(chip, 1, 0);
1463 chip->debounce_cnt = 0;
1466 if (chip->debounce_cnt > N_DEBOUNCE_CNT) {
1467 if (((!chip->cc1) || (!chip->cc2)) &&
1468 ((chip->cc1 == TYPEC_CC_VOLT_RD) ||
1469 (chip->cc2 == TYPEC_CC_VOLT_RD))) {
1470 set_state(chip, attached_source);
1472 set_state_unattached(chip);
1478 chip->timer_mux = 2;
1479 fusb_timer_start(&chip->timer_mux_machine,
1484 static void fusb_state_attached_source(struct fusb30x_chip *chip, int evt)
1486 tcpm_set_polarity(chip, !(chip->cc_state & 0x01));
1487 tcpm_set_vconn(chip, 1);
1489 chip->notify.is_cc_connected = 1;
1490 if (chip->cc_state & 0x01)
1491 chip->cc_polarity = 0;
1493 chip->cc_polarity = 1;
1495 chip->notify.power_role = 1;
1496 chip->notify.data_role = 1;
1497 chip->hardrst_count = 0;
1498 set_state(chip, policy_src_startup);
1499 dev_info(chip->dev, "CC connected in %d as DFP\n", chip->cc_polarity);
1502 static void fusb_state_attached_sink(struct fusb30x_chip *chip, int evt)
1504 chip->notify.is_cc_connected = 1;
1505 if (chip->cc_state & 0x01)
1506 chip->cc_polarity = 0;
1508 chip->cc_polarity = 1;
1510 chip->notify.power_role = 0;
1511 chip->notify.data_role = 0;
1512 chip->hardrst_count = 0;
1513 set_state(chip, policy_snk_startup);
1514 dev_info(chip->dev, "CC connected in %d as UFP\n", chip->cc_polarity);
1517 static void fusb_state_src_startup(struct fusb30x_chip *chip, int evt)
1519 chip->caps_counter = 0;
1520 chip->notify.is_pd_connected = 0;
1522 chip->vdm_state = 0;
1523 chip->vdm_substate = 0;
1524 chip->vdm_send_state = 0;
1527 memset(chip->partner_cap, 0, sizeof(chip->partner_cap));
1529 tcpm_set_msg_header(chip);
1530 tcpm_set_polarity(chip, chip->cc_polarity);
1531 tcpm_set_rx_enable(chip, 1);
1533 set_state(chip, policy_src_send_caps);
1536 static void fusb_state_src_discovery(struct fusb30x_chip *chip, int evt)
1538 switch (chip->sub_state) {
1540 chip->caps_counter++;
1542 if (chip->caps_counter < N_CAPS_COUNT) {
1543 chip->timer_state = T_TYPEC_SEND_SOURCECAP;
1544 fusb_timer_start(&chip->timer_state_machine,
1546 chip->sub_state = 1;
1548 set_state(chip, disabled);
1552 if (evt & EVENT_TIMER_STATE) {
1553 set_state(chip, policy_src_send_caps);
1554 } else if ((evt & EVENT_TIMER_MUX) &&
1555 (chip->hardrst_count > N_HARDRESET_COUNT)) {
1556 if (chip->notify.is_pd_connected)
1557 set_state(chip, error_recovery);
1559 set_state(chip, disabled);
1565 static void fusb_state_src_send_caps(struct fusb30x_chip *chip, int evt)
1569 switch (chip->sub_state) {
1571 set_mesg(chip, DMT_SOURCECAPABILITIES, DATAMESSAGE);
1572 chip->sub_state = 1;
1573 chip->tx_state = tx_idle;
1576 tmp = policy_send_data(chip);
1578 if (tmp == tx_success) {
1579 chip->hardrst_count = 0;
1580 chip->caps_counter = 0;
1581 chip->timer_state = T_SENDER_RESPONSE;
1582 fusb_timer_start(&chip->timer_state_machine,
1584 chip->timer_mux = T_DISABLED;
1586 } else if (tmp == tx_failed) {
1587 set_state(chip, policy_src_discovery);
1591 if (!(evt & FLAG_EVENT))
1594 if (evt & EVENT_RX) {
1595 if ((PD_HEADER_CNT(chip->rec_head) == 1) &&
1596 (PD_HEADER_TYPE(chip->rec_head) == DMT_REQUEST)) {
1597 set_state(chip, policy_src_negotiate_cap);
1599 set_state(chip, policy_src_send_softrst);
1601 } else if (evt & EVENT_TIMER_STATE) {
1602 if (chip->hardrst_count <= N_HARDRESET_COUNT)
1603 set_state(chip, policy_src_send_hardrst);
1605 set_state(chip, disabled);
1606 } else if (evt & EVENT_TIMER_MUX) {
1607 if (chip->notify.is_pd_connected)
1608 set_state(chip, disabled);
1610 set_state(chip, error_recovery);
1616 static void fusb_state_src_negotiate_cap(struct fusb30x_chip *chip, int evt)
1621 tmp = (chip->rec_load[0] >> 28) & 0x07;
1622 if (tmp > chip->n_caps_used)
1623 set_state(chip, policy_src_cap_response);
1625 set_state(chip, policy_src_transition_supply);
1628 static void fusb_state_src_transition_supply(struct fusb30x_chip *chip,
1633 switch (chip->sub_state) {
1635 set_mesg(chip, CMT_ACCEPT, CONTROLMESSAGE);
1636 chip->tx_state = tx_idle;
1640 tmp = policy_send_data(chip);
1641 if (tmp == tx_success) {
1642 chip->timer_state = T_SRC_TRANSITION;
1644 fusb_timer_start(&chip->timer_state_machine,
1646 } else if (tmp == tx_failed) {
1647 set_state(chip, policy_src_send_softrst);
1651 if (evt & EVENT_TIMER_STATE) {
1652 chip->notify.is_pd_connected = 1;
1653 platform_set_vbus_lvl_enable(chip, 1, 0);
1654 set_mesg(chip, CMT_PS_RDY, CONTROLMESSAGE);
1655 chip->tx_state = tx_idle;
1657 chip->work_continue = 1;
1661 tmp = policy_send_data(chip);
1662 if (tmp == tx_success) {
1664 "PD connected as DFP, supporting 5V\n");
1665 set_state(chip, policy_src_ready);
1666 } else if (tmp == tx_failed) {
1667 set_state(chip, policy_src_send_softrst);
1673 static void fusb_state_src_cap_response(struct fusb30x_chip *chip, int evt)
1677 switch (chip->sub_state) {
1679 set_mesg(chip, CMT_REJECT, CONTROLMESSAGE);
1680 chip->tx_state = tx_idle;
1684 tmp = policy_send_data(chip);
1685 if (tmp == tx_success) {
1686 if (chip->notify.is_pd_connected) {
1688 "PD connected as DFP, supporting 5V\n");
1689 set_state(chip, policy_src_ready);
1691 set_state(chip, policy_src_send_hardrst);
1693 } else if (tmp == tx_failed) {
1694 set_state(chip, policy_src_send_softrst);
1700 static void fusb_state_src_transition_default(struct fusb30x_chip *chip,
1703 switch (chip->sub_state) {
1705 chip->notify.is_pd_connected = 0;
1706 platform_set_vbus_lvl_enable(chip, 0, 0);
1707 if (chip->notify.data_role)
1708 regmap_update_bits(chip->regmap,
1711 SWITCHES1_DATAROLE);
1713 regmap_update_bits(chip->regmap,
1718 chip->timer_state = T_SRC_RECOVER;
1719 fusb_timer_start(&chip->timer_state_machine,
1724 if (evt & EVENT_TIMER_STATE) {
1725 platform_set_vbus_lvl_enable(chip, 1, 0);
1726 chip->timer_mux = T_NO_RESPONSE;
1727 fusb_timer_start(&chip->timer_mux_machine,
1729 set_state(chip, policy_src_startup);
1730 dev_dbg(chip->dev, "reset over-> src startup\n");
1736 static void fusb_state_src_ready(struct fusb30x_chip *chip, int evt)
1738 if (evt & EVENT_RX) {
1739 if ((PD_HEADER_CNT(chip->rec_head)) &&
1740 (PD_HEADER_TYPE(chip->rec_head) == DMT_VENDERDEFINED)) {
1741 process_vdm_msg(chip);
1742 chip->work_continue = 1;
1743 chip->timer_state = T_DISABLED;
1747 /* TODO: swap function would be added here later on*/
1749 if (!chip->partner_cap[0])
1750 set_state(chip, policy_src_get_sink_caps);
1752 auto_vdm_machine(chip, evt);
1755 static void fusb_state_src_get_sink_cap(struct fusb30x_chip *chip, int evt)
1759 switch (chip->sub_state) {
1761 set_mesg(chip, CMT_GETSINKCAP, CONTROLMESSAGE);
1762 chip->tx_state = tx_idle;
1766 tmp = policy_send_data(chip);
1767 if (tmp == tx_success) {
1768 chip->timer_state = T_SENDER_RESPONSE;
1770 fusb_timer_start(&chip->timer_state_machine,
1772 } else if (tmp == tx_failed) {
1773 set_state(chip, policy_src_send_softrst);
1776 if (!(evt & FLAG_EVENT))
1779 if (evt & EVENT_RX) {
1780 if ((PD_HEADER_CNT(chip->rec_head)) &&
1781 (PD_HEADER_TYPE(chip->rec_head) ==
1782 DMT_SINKCAPABILITIES)) {
1784 tmp < PD_HEADER_CNT(chip->rec_head);
1786 chip->partner_cap[tmp] =
1787 chip->rec_load[tmp];
1789 set_state(chip, policy_src_ready);
1791 chip->partner_cap[0] = 0xffffffff;
1792 set_state(chip, policy_src_ready);
1794 } else if (evt & EVENT_TIMER_STATE) {
1795 dev_warn(chip->dev, "Get sink cap time out\n");
1796 chip->partner_cap[0] = 0xffffffff;
1797 set_state(chip, policy_src_ready);
1802 static void fusb_state_src_send_hardreset(struct fusb30x_chip *chip, int evt)
1806 switch (chip->sub_state) {
1808 chip->tx_state = tx_idle;
1812 tmp = policy_send_hardrst(chip, evt);
1813 if (tmp == tx_success) {
1814 chip->hardrst_count++;
1815 set_state(chip, policy_src_transition_default);
1816 } else if (tmp == tx_failed) {
1817 /* can't reach here */
1818 set_state(chip, error_recovery);
1824 static void fusb_state_src_send_softreset(struct fusb30x_chip *chip, int evt)
1828 switch (chip->sub_state) {
1830 set_mesg(chip, CMT_SOFTRESET, CONTROLMESSAGE);
1831 chip->tx_state = tx_idle;
1835 tmp = policy_send_data(chip);
1836 if (tmp == tx_success) {
1837 chip->timer_state = T_SENDER_RESPONSE;
1839 fusb_timer_start(&chip->timer_state_machine,
1841 } else if (tmp == tx_failed) {
1842 set_state(chip, policy_src_send_hardrst);
1845 if (!(evt & FLAG_EVENT))
1848 if (evt & EVENT_RX) {
1849 if ((!PD_HEADER_CNT(chip->rec_head)) &&
1850 (PD_HEADER_TYPE(chip->rec_head) == CMT_ACCEPT))
1851 set_state(chip, policy_src_send_caps);
1852 } else if (evt & EVENT_TIMER_STATE) {
1853 set_state(chip, policy_src_send_hardrst);
1859 static void fusb_state_snk_startup(struct fusb30x_chip *chip, int evt)
1861 chip->notify.is_pd_connected = 0;
1863 chip->vdm_state = 0;
1864 chip->vdm_substate = 0;
1865 chip->vdm_send_state = 0;
1867 chip->pos_power = 0;
1869 memset(chip->partner_cap, 0, sizeof(chip->partner_cap));
1871 tcpm_set_msg_header(chip);
1872 tcpm_set_polarity(chip, chip->cc_polarity);
1873 tcpm_set_rx_enable(chip, 1);
1874 set_state(chip, policy_snk_discovery);
1877 static void fusb_state_snk_discovery(struct fusb30x_chip *chip, int evt)
1879 set_state(chip, policy_snk_wait_caps);
1880 chip->timer_state = T_TYPEC_SINK_WAIT_CAP;
1881 fusb_timer_start(&chip->timer_state_machine,
1885 static void fusb_state_snk_wait_caps(struct fusb30x_chip *chip, int evt)
1887 if (evt & EVENT_RX) {
1888 if (PD_HEADER_CNT(chip->rec_head) &&
1889 PD_HEADER_TYPE(chip->rec_head) == DMT_SOURCECAPABILITIES) {
1890 chip->timer_mux = T_DISABLED;
1891 set_state(chip, policy_snk_evaluate_caps);
1893 } else if (evt & EVENT_TIMER_STATE) {
1894 if (chip->hardrst_count <= N_HARDRESET_COUNT)
1895 set_state(chip, policy_snk_send_hardrst);
1897 set_state(chip, disabled);
1898 } else if ((evt & EVENT_TIMER_MUX) &&
1899 (chip->hardrst_count > N_HARDRESET_COUNT)) {
1900 if (chip->notify.is_pd_connected)
1901 set_state(chip, error_recovery);
1903 set_state(chip, disabled);
1907 static void fusb_state_snk_evaluate_caps(struct fusb30x_chip *chip, int evt)
1911 chip->hardrst_count = 0;
1912 chip->pos_power = 0;
1914 for (tmp = 0; tmp < PD_HEADER_CNT(chip->rec_head); tmp++) {
1915 switch (CAP_POWER_TYPE(chip->rec_load[tmp])) {
1918 if (CAP_FPDO_VOLTAGE(chip->rec_load[tmp]) <= 100)
1919 chip->pos_power = tmp + 1;
1923 if (CAP_VPDO_VOLTAGE(chip->rec_load[tmp]) <= 100)
1924 chip->pos_power = tmp + 1;
1927 /* not meet battery caps */
1931 fusb302_set_pos_power_by_charge_ic(chip);
1933 if ((!chip->pos_power) || (chip->pos_power > 7)) {
1934 chip->pos_power = 0;
1935 set_state(chip, policy_snk_wait_caps);
1937 set_state(chip, policy_snk_select_cap);
1941 static void fusb_state_snk_select_cap(struct fusb30x_chip *chip, int evt)
1945 switch (chip->sub_state) {
1947 set_mesg(chip, DMT_REQUEST, DATAMESSAGE);
1948 chip->sub_state = 1;
1949 chip->tx_state = tx_idle;
1952 tmp = policy_send_data(chip);
1954 if (tmp == tx_success) {
1955 chip->timer_state = T_SENDER_RESPONSE;
1956 fusb_timer_start(&chip->timer_state_machine,
1959 } else if (tmp == tx_failed) {
1960 set_state(chip, policy_snk_discovery);
1964 if (!(evt & FLAG_EVENT))
1967 if (evt & EVENT_RX) {
1968 if (!PD_HEADER_CNT(chip->rec_head)) {
1969 switch (PD_HEADER_TYPE(chip->rec_head)) {
1972 policy_snk_transition_sink);
1973 chip->timer_state = T_PS_TRANSITION;
1974 fusb_timer_start(&chip->timer_state_machine,
1979 if (chip->notify.is_pd_connected) {
1981 "PD connected as UFP, fetching 5V\n");
1986 policy_snk_wait_caps);
1988 * make sure don't send
1989 * hard reset to prevent
1992 chip->hardrst_count =
1993 N_HARDRESET_COUNT + 1;
2000 } else if (evt & EVENT_TIMER_STATE) {
2001 set_state(chip, policy_snk_send_hardrst);
2007 static void fusb_state_snk_transition_sink(struct fusb30x_chip *chip, int evt)
2009 if (evt & EVENT_RX) {
2010 if ((!PD_HEADER_CNT(chip->rec_head)) &&
2011 (PD_HEADER_TYPE(chip->rec_head) == CMT_PS_RDY)) {
2012 chip->notify.is_pd_connected = 1;
2014 "PD connected as UFP, fetching 5V\n");
2015 set_state(chip, policy_snk_ready);
2016 } else if ((PD_HEADER_CNT(chip->rec_head)) &&
2017 (PD_HEADER_TYPE(chip->rec_head) ==
2018 DMT_SOURCECAPABILITIES)) {
2019 set_state(chip, policy_snk_evaluate_caps);
2021 } else if (evt & EVENT_TIMER_STATE) {
2022 set_state(chip, policy_snk_send_hardrst);
2026 static void fusb_state_snk_transition_default(struct fusb30x_chip *chip,
2029 switch (chip->sub_state) {
2031 chip->notify.is_pd_connected = 0;
2032 chip->timer_mux = T_NO_RESPONSE;
2033 fusb_timer_start(&chip->timer_mux_machine,
2035 chip->timer_state = T_PS_HARD_RESET_MAX + T_SAFE_0V;
2036 fusb_timer_start(&chip->timer_state_machine,
2038 if (chip->notify.data_role)
2039 tcpm_set_msg_header(chip);
2043 if (!tcpm_check_vbus(chip)) {
2045 chip->timer_state = T_SRC_RECOVER_MAX + T_SRC_TURN_ON;
2046 fusb_timer_start(&chip->timer_state_machine,
2048 } else if (evt & EVENT_TIMER_STATE) {
2049 set_state(chip, policy_snk_startup);
2053 if (tcpm_check_vbus(chip)) {
2054 chip->timer_state = T_DISABLED;
2055 set_state(chip, policy_snk_startup);
2056 } else if (evt & EVENT_TIMER_STATE) {
2057 set_state(chip, policy_snk_startup);
2063 static void fusb_state_snk_ready(struct fusb30x_chip *chip, int evt)
2065 /* TODO: snk_ready_function would be added later on*/
2066 platform_fusb_notify(chip);
2069 static void fusb_state_snk_send_hardreset(struct fusb30x_chip *chip, int evt)
2073 switch (chip->sub_state) {
2075 chip->tx_state = tx_idle;
2078 tmp = policy_send_hardrst(chip, evt);
2079 if (tmp == tx_success) {
2080 chip->hardrst_count++;
2081 set_state(chip, policy_snk_transition_default);
2082 } else if (tmp == tx_failed) {
2083 set_state(chip, error_recovery);
2089 static void fusb_state_snk_send_softreset(struct fusb30x_chip *chip, int evt)
2093 switch (chip->sub_state) {
2095 set_mesg(chip, CMT_SOFTRESET, CONTROLMESSAGE);
2096 chip->tx_state = tx_idle;
2099 tmp = policy_send_data(chip);
2100 if (tmp == tx_success) {
2101 chip->timer_state = T_SENDER_RESPONSE;
2103 fusb_timer_start(&chip->timer_state_machine,
2105 } else if (tmp == tx_failed) {
2106 /* can't reach here */
2107 set_state(chip, policy_snk_send_hardrst);
2110 if (!(evt & FLAG_EVENT))
2113 if (evt & EVENT_RX) {
2114 if ((!PD_HEADER_CNT(chip->rec_head)) &&
2115 (PD_HEADER_TYPE(chip->rec_head) == CMT_ACCEPT))
2116 set_state(chip, policy_snk_wait_caps);
2117 } else if (evt & EVENT_TIMER_STATE) {
2118 set_state(chip, policy_snk_send_hardrst);
2124 static void state_machine_typec(struct fusb30x_chip *chip)
2129 tcpc_alert(chip, &evt);
2130 mux_alert(chip, &evt);
2134 if (chip->notify.is_cc_connected) {
2135 if (evt & EVENT_CC) {
2136 if ((chip->cc_state & 0x04) &&
2137 (chip->conn_state !=
2138 policy_snk_transition_default)) {
2139 if (!tcpm_check_vbus(chip))
2140 set_state_unattached(chip);
2141 } else if (chip->conn_state !=
2142 policy_src_transition_default) {
2143 tcpm_get_cc(chip, &cc1, &cc2);
2144 if (!(chip->cc_state & 0x01))
2146 if (cc1 == TYPEC_CC_VOLT_OPEN)
2147 set_state_unattached(chip);
2152 if (evt & EVENT_RX) {
2153 tcpm_get_message(chip);
2154 if ((!PD_HEADER_CNT(chip->rec_head)) &&
2155 (PD_HEADER_TYPE(chip->rec_head) == CMT_SOFTRESET)) {
2156 if (chip->notify.power_role)
2157 set_state(chip, policy_src_send_softrst);
2159 set_state(chip, policy_snk_send_softrst);
2163 if (evt & EVENT_TX) {
2164 if (chip->tx_state == tx_success)
2167 switch (chip->conn_state) {
2169 fusb_state_disabled(chip, evt);
2171 case error_recovery:
2172 set_state_unattached(chip);
2175 fusb_state_unattached(chip, evt);
2177 case attach_wait_sink:
2178 fusb_state_attach_wait_sink(chip, evt);
2180 case attach_wait_source:
2181 fusb_state_attach_wait_source(chip, evt);
2183 case attached_source:
2184 fusb_state_attached_source(chip, evt);
2187 fusb_state_attached_sink(chip, evt);
2190 /* POWER DELIVERY */
2191 case policy_src_startup:
2192 fusb_state_src_startup(chip, evt);
2194 case policy_src_discovery:
2195 fusb_state_src_discovery(chip, evt);
2197 case policy_src_send_caps:
2198 fusb_state_src_send_caps(chip, evt);
2199 if (chip->conn_state != policy_src_negotiate_cap)
2201 case policy_src_negotiate_cap:
2202 fusb_state_src_negotiate_cap(chip, evt);
2204 case policy_src_transition_supply:
2205 fusb_state_src_transition_supply(chip, evt);
2207 case policy_src_cap_response:
2208 fusb_state_src_cap_response(chip, evt);
2210 case policy_src_transition_default:
2211 fusb_state_src_transition_default(chip, evt);
2213 case policy_src_ready:
2214 fusb_state_src_ready(chip, evt);
2216 case policy_src_get_sink_caps:
2217 fusb_state_src_get_sink_cap(chip, evt);
2219 case policy_src_send_hardrst:
2220 fusb_state_src_send_hardreset(chip, evt);
2222 case policy_src_send_softrst:
2223 fusb_state_src_send_softreset(chip, evt);
2227 case policy_snk_startup:
2228 fusb_state_snk_startup(chip, evt);
2230 case policy_snk_discovery:
2231 fusb_state_snk_discovery(chip, evt);
2233 case policy_snk_wait_caps:
2234 fusb_state_snk_wait_caps(chip, evt);
2236 case policy_snk_evaluate_caps:
2237 fusb_state_snk_evaluate_caps(chip, evt);
2239 case policy_snk_select_cap:
2240 fusb_state_snk_select_cap(chip, evt);
2242 case policy_snk_transition_sink:
2243 fusb_state_snk_transition_sink(chip, evt);
2245 case policy_snk_transition_default:
2246 fusb_state_snk_transition_default(chip, evt);
2248 case policy_snk_ready:
2249 fusb_state_snk_ready(chip, evt);
2251 case policy_snk_send_hardrst:
2252 fusb_state_snk_send_hardreset(chip, evt);
2254 case policy_snk_send_softrst:
2255 fusb_state_snk_send_softreset(chip, evt);
2263 if (chip->work_continue) {
2264 queue_work(chip->fusb30x_wq, &chip->work);
2268 if (!platform_get_device_irq_state(chip))
2269 fusb_irq_enable(chip);
2271 queue_work(chip->fusb30x_wq, &chip->work);
2274 static irqreturn_t cc_interrupt_handler(int irq, void *dev_id)
2276 struct fusb30x_chip *chip = dev_id;
2278 queue_work(chip->fusb30x_wq, &chip->work);
2279 fusb_irq_disable(chip);
2283 static int fusb_initialize_gpio(struct fusb30x_chip *chip)
2285 chip->gpio_int = devm_gpiod_get_optional(chip->dev, "int-n", GPIOD_IN);
2286 if (IS_ERR(chip->gpio_int))
2287 return PTR_ERR(chip->gpio_int);
2289 /* some board support vbus with other ways */
2290 chip->gpio_vbus_5v = devm_gpiod_get_optional(chip->dev, "vbus-5v",
2292 if (IS_ERR(chip->gpio_vbus_5v))
2294 "Could not get named GPIO for VBus5V!\n");
2296 gpiod_set_raw_value(chip->gpio_vbus_5v, 0);
2298 chip->gpio_vbus_other = devm_gpiod_get_optional(chip->dev,
2301 if (IS_ERR(chip->gpio_vbus_other))
2303 "Could not get named GPIO for VBusOther!\n");
2305 gpiod_set_raw_value(chip->gpio_vbus_other, 0);
2307 chip->gpio_discharge = devm_gpiod_get_optional(chip->dev, "discharge",
2309 if (IS_ERR(chip->gpio_discharge)) {
2311 "Could not get named GPIO for discharge!\n");
2312 chip->gpio_discharge = NULL;
2318 static enum hrtimer_restart fusb_timer_handler(struct hrtimer *timer)
2322 for (i = 0; i < fusb30x_port_used; i++) {
2323 if (timer == &fusb30x_port_info[i]->timer_state_machine) {
2324 if (fusb30x_port_info[i]->timer_state != T_DISABLED)
2325 fusb30x_port_info[i]->timer_state = 0;
2329 if (timer == &fusb30x_port_info[i]->timer_mux_machine) {
2330 if (fusb30x_port_info[i]->timer_mux != T_DISABLED)
2331 fusb30x_port_info[i]->timer_mux = 0;
2336 if (i != fusb30x_port_used)
2337 queue_work(fusb30x_port_info[i]->fusb30x_wq,
2338 &fusb30x_port_info[i]->work);
2340 return HRTIMER_NORESTART;
2343 static void fusb_initialize_timer(struct fusb30x_chip *chip)
2345 hrtimer_init(&chip->timer_state_machine, CLOCK_MONOTONIC,
2347 chip->timer_state_machine.function = fusb_timer_handler;
2349 hrtimer_init(&chip->timer_mux_machine, CLOCK_MONOTONIC,
2351 chip->timer_mux_machine.function = fusb_timer_handler;
2353 chip->timer_state = T_DISABLED;
2354 chip->timer_mux = T_DISABLED;
2357 static void fusb302_work_func(struct work_struct *work)
2359 struct fusb30x_chip *chip;
2361 chip = container_of(work, struct fusb30x_chip, work);
2362 state_machine_typec(chip);
2365 static int fusb30x_probe(struct i2c_client *client,
2366 const struct i2c_device_id *id)
2368 struct fusb30x_chip *chip;
2369 struct PD_CAP_INFO *pd_cap_info;
2372 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
2376 if (fusb30x_port_used == 0xff)
2379 chip->port_num = fusb30x_port_used++;
2380 fusb30x_port_info[chip->port_num] = chip;
2382 chip->dev = &client->dev;
2383 chip->regmap = devm_regmap_init_i2c(client, &fusb302_regmap_config);
2384 if (IS_ERR(chip->regmap)) {
2385 dev_err(&client->dev, "Failed to allocate regmap!\n");
2386 return PTR_ERR(chip->regmap);
2389 ret = fusb_initialize_gpio(chip);
2393 fusb_initialize_timer(chip);
2395 chip->fusb30x_wq = create_workqueue("fusb302_wq");
2396 INIT_WORK(&chip->work, fusb302_work_func);
2399 tcpm_set_rx_enable(chip, 0);
2400 chip->conn_state = unattached;
2401 tcpm_set_cc(chip, FUSB_MODE_DRP);
2403 chip->n_caps_used = 1;
2404 chip->source_power_supply[0] = 0x64;
2405 chip->source_max_current[0] = 0x96;
2408 * these two variable should be 1 if support DRP,
2409 * but now we do not support swap,
2410 * it will be blanked in future
2412 pd_cap_info = &chip->pd_cap_info;
2413 pd_cap_info->dual_role_power = 0;
2414 pd_cap_info->data_role_swap = 0;
2416 pd_cap_info->externally_powered = 1;
2417 pd_cap_info->usb_suspend_support = 0;
2418 pd_cap_info->usb_communications_cap = 0;
2419 pd_cap_info->supply_type = 0;
2420 pd_cap_info->peak_current = 0;
2422 chip->extcon = devm_extcon_dev_allocate(&client->dev, fusb302_cable);
2423 if (IS_ERR(chip->extcon)) {
2424 dev_err(&client->dev, "allocat extcon failed\n");
2425 return PTR_ERR(chip->extcon);
2428 ret = devm_extcon_dev_register(&client->dev, chip->extcon);
2430 dev_err(&client->dev, "failed to register extcon: %d\n",
2435 ret = extcon_set_property_capability(chip->extcon, EXTCON_USB,
2436 EXTCON_PROP_USB_TYPEC_POLARITY);
2438 dev_err(&client->dev,
2439 "failed to set USB property capability: %d\n",
2444 ret = extcon_set_property_capability(chip->extcon, EXTCON_USB_HOST,
2445 EXTCON_PROP_USB_TYPEC_POLARITY);
2447 dev_err(&client->dev,
2448 "failed to set USB_HOST property capability: %d\n",
2453 ret = extcon_set_property_capability(chip->extcon, EXTCON_DISP_DP,
2454 EXTCON_PROP_USB_TYPEC_POLARITY);
2456 dev_err(&client->dev,
2457 "failed to set DISP_DP property capability: %d\n",
2462 ret = extcon_set_property_capability(chip->extcon, EXTCON_USB,
2463 EXTCON_PROP_USB_SS);
2465 dev_err(&client->dev,
2466 "failed to set USB USB_SS property capability: %d\n",
2471 ret = extcon_set_property_capability(chip->extcon, EXTCON_USB_HOST,
2472 EXTCON_PROP_USB_SS);
2474 dev_err(&client->dev,
2475 "failed to set USB_HOST USB_SS property capability: %d\n",
2480 ret = extcon_set_property_capability(chip->extcon, EXTCON_DISP_DP,
2481 EXTCON_PROP_USB_SS);
2483 dev_err(&client->dev,
2484 "failed to set DISP_DP USB_SS property capability: %d\n",
2489 ret = extcon_set_property_capability(chip->extcon, EXTCON_CHG_USB_FAST,
2490 EXTCON_PROP_USB_TYPEC_POLARITY);
2492 dev_err(&client->dev,
2493 "failed to set USB_PD property capability: %d\n", ret);
2497 i2c_set_clientdata(client, chip);
2499 spin_lock_init(&chip->irq_lock);
2500 chip->enable_irq = 1;
2502 chip->gpio_int_irq = gpiod_to_irq(chip->gpio_int);
2503 if (chip->gpio_int_irq < 0) {
2504 dev_err(&client->dev,
2505 "Unable to request IRQ for INT_N GPIO! %d\n",
2507 ret = chip->gpio_int_irq;
2511 ret = devm_request_threaded_irq(&client->dev,
2514 cc_interrupt_handler,
2515 IRQF_ONESHOT | IRQF_TRIGGER_LOW,
2519 dev_err(&client->dev, "irq request failed\n");
2523 dev_info(chip->dev, "port %d probe success\n", chip->port_num);
2528 destroy_workqueue(chip->fusb30x_wq);
2532 static int fusb30x_remove(struct i2c_client *client)
2534 struct fusb30x_chip *chip = i2c_get_clientdata(client);
2536 destroy_workqueue(chip->fusb30x_wq);
2540 static void fusb30x_shutdown(struct i2c_client *client)
2542 struct fusb30x_chip *chip = i2c_get_clientdata(client);
2544 if (chip->gpio_vbus_5v)
2545 gpiod_set_value(chip->gpio_vbus_5v, 0);
2546 if (chip->gpio_discharge) {
2547 gpiod_set_value(chip->gpio_discharge, 1);
2549 gpiod_set_value(chip->gpio_discharge, 0);
2553 static const struct of_device_id fusb30x_dt_match[] = {
2554 { .compatible = FUSB30X_I2C_DEVICETREE_NAME },
2557 MODULE_DEVICE_TABLE(of, fusb30x_dt_match);
2559 static const struct i2c_device_id fusb30x_i2c_device_id[] = {
2560 { FUSB30X_I2C_DRIVER_NAME, 0 },
2563 MODULE_DEVICE_TABLE(i2c, fusb30x_i2c_device_id);
2565 static struct i2c_driver fusb30x_driver = {
2567 .name = FUSB30X_I2C_DRIVER_NAME,
2568 .of_match_table = of_match_ptr(fusb30x_dt_match),
2570 .probe = fusb30x_probe,
2571 .remove = fusb30x_remove,
2572 .shutdown = fusb30x_shutdown,
2573 .id_table = fusb30x_i2c_device_id,
2576 module_i2c_driver(fusb30x_driver);
2578 MODULE_LICENSE("GPL");
2579 MODULE_AUTHOR("zain wang <zain.wang@rock-chips.com>");
2580 MODULE_DESCRIPTION("fusb302 typec pd driver");