drivers/mfd/fusb302.c

   1 /*
   2  * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd
   3  * Author: Zain Wang <zain.wang@rock-chips.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * Some ideas are from chrome ec and fairchild GPL fusb302 driver.
  10  */
  11
  12 #include <linux/delay.h>
  13 #include <linux/extcon.h>
  14 #include <linux/gpio.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/module.h>
  17 #include <linux/of_gpio.h>
  18 #include <linux/regmap.h>
  19 #include <linux/power_supply.h>
  20
  21 #include "fusb302.h"
  22
  23 #define FUSB302_MAX_REG         (FUSB_REG_FIFO + 50)
  24 #define FUSB_MS_TO_NS(x)        ((s64)x * 1000 * 1000)
  25
  26 #define FUSB_MODE_DRP           0
  27 #define FUSB_MODE_UFP           1
  28 #define FUSB_MODE_DFP           2
  29 #define FUSB_MODE_ASS           3
  30
  31 #define TYPEC_CC_VOLT_OPEN      0
  32 #define TYPEC_CC_VOLT_RA        1
  33 #define TYPEC_CC_VOLT_RD        2
  34 #define TYPEC_CC_VOLT_RP        3
  35
  36 #define EVENT_CC                BIT(0)
  37 #define EVENT_RX                BIT(1)
  38 #define EVENT_TX                BIT(2)
  39 #define EVENT_REC_RESET         BIT(3)
  40 #define EVENT_WORK_CONTINUE     BIT(5)
  41 #define EVENT_TIMER_MUX         BIT(6)
  42 #define EVENT_TIMER_STATE       BIT(7)
  43 #define FLAG_EVENT              (EVENT_RX | EVENT_TIMER_MUX | \
  44                                  EVENT_TIMER_STATE)
  45
  46 #define PIN_MAP_A               BIT(0)
  47 #define PIN_MAP_B               BIT(1)
  48 #define PIN_MAP_C               BIT(2)
  49 #define PIN_MAP_D               BIT(3)
  50 #define PIN_MAP_E               BIT(4)
  51 #define PIN_MAP_F               BIT(5)
  52
  53 static u8 fusb30x_port_used;
  54 static struct fusb30x_chip *fusb30x_port_info[256];
  55
  56 static bool is_write_reg(struct device *dev, unsigned int reg)
  57 {
  58         if (reg >= FUSB_REG_FIFO)
  59                 return true;
  60         else
  61                 return ((reg < (FUSB_REG_CONTROL4 + 1)) && (reg > 0x01)) ?
  62                         true : false;
  63 }
  64
  65 static bool is_volatile_reg(struct device *dev, unsigned int reg)
  66 {
  67         if (reg > FUSB_REG_CONTROL4)
  68                 return true;
  69
  70         switch (reg) {
  71         case FUSB_REG_CONTROL0:
  72         case FUSB_REG_CONTROL1:
  73         case FUSB_REG_CONTROL3:
  74         case FUSB_REG_RESET:
  75                 return true;
  76         }
  77         return false;
  78 }
  79
  80 struct regmap_config fusb302_regmap_config = {
  81         .reg_bits = 8,
  82         .val_bits = 8,
  83         .writeable_reg = is_write_reg,
  84         .volatile_reg = is_volatile_reg,
  85         .max_register = FUSB302_MAX_REG,
  86         .cache_type = REGCACHE_RBTREE,
  87 };
  88
  89 static void dump_notify_info(struct fusb30x_chip *chip)
  90 {
  91         dev_dbg(chip->dev, "port        %d\n", chip->port_num);
  92         dev_dbg(chip->dev, "orientation %d\n", chip->notify.orientation);
  93         dev_dbg(chip->dev, "power_role  %d\n", chip->notify.power_role);
  94         dev_dbg(chip->dev, "data_role   %d\n", chip->notify.data_role);
  95         dev_dbg(chip->dev, "cc          %d\n", chip->notify.is_cc_connected);
  96         dev_dbg(chip->dev, "pd          %d\n", chip->notify.is_pd_connected);
  97         dev_dbg(chip->dev, "enter_mode  %d\n", chip->notify.is_enter_mode);
  98         dev_dbg(chip->dev, "pin support %d\n",
  99                 chip->notify.pin_assignment_support);
 100         dev_dbg(chip->dev, "pin def     %d\n", chip->notify.pin_assignment_def);
 101         dev_dbg(chip->dev, "attention   %d\n", chip->notify.attention);
 102 }
 103
 104 static const unsigned int fusb302_cable[] = {
 105         EXTCON_USB,
 106         EXTCON_USB_HOST,
 107         EXTCON_USB_VBUS_EN,
 108         EXTCON_CHG_USB_SDP,
 109         EXTCON_CHG_USB_CDP,
 110         EXTCON_CHG_USB_DCP,
 111         EXTCON_CHG_USB_SLOW,
 112         EXTCON_CHG_USB_FAST,
 113         EXTCON_DISP_DP,
 114         EXTCON_NONE,
 115 };
 116
 117 static void fusb_set_pos_power(struct fusb30x_chip *chip, int max_vol,
 118                                int max_cur)
 119 {
 120         int i;
 121         int pos_find;
 122         int tmp;
 123
 124         pos_find = 0;
 125         for (i = PD_HEADER_CNT(chip->rec_head) - 1; i >= 0; i--) {
 126                 switch (CAP_POWER_TYPE(chip->rec_load[i])) {
 127                 case 0:
 128                         /* Fixed Supply */
 129                         if ((CAP_FPDO_VOLTAGE(chip->rec_load[i]) * 50) <=
 130                             max_vol &&
 131                             (CAP_FPDO_CURRENT(chip->rec_load[i]) * 10) <=
 132                             max_cur) {
 133                                 chip->pos_power = i + 1;
 134                                 tmp = CAP_FPDO_VOLTAGE(chip->rec_load[i]);
 135                                 chip->pd_output_vol = tmp * 50;
 136                                 tmp = CAP_FPDO_CURRENT(chip->rec_load[i]);
 137                                 chip->pd_output_cur = tmp * 10;
 138                                 pos_find = 1;
 139                         }
 140                         break;
 141                 case 1:
 142                         /* Battery */
 143                         if ((CAP_VPDO_VOLTAGE(chip->rec_load[i]) * 50) <=
 144                             max_vol &&
 145                             (CAP_VPDO_CURRENT(chip->rec_load[i]) * 10) <=
 146                             max_cur) {
 147                                 chip->pos_power = i + 1;
 148                                 tmp = CAP_VPDO_VOLTAGE(chip->rec_load[i]);
 149                                 chip->pd_output_vol = tmp * 50;
 150                                 tmp = CAP_VPDO_CURRENT(chip->rec_load[i]);
 151                                 chip->pd_output_cur = tmp * 10;
 152                                 pos_find = 1;
 153                         }
 154                         break;
 155                 default:
 156                         /* not meet battery caps */
 157                         break;
 158                 }
 159                 if (pos_find)
 160                         break;
 161         }
 162 }
 163
 164 static int fusb302_set_pos_power_by_charge_ic(struct fusb30x_chip *chip)
 165 {
 166         struct power_supply *psy = NULL;
 167         union power_supply_propval val;
 168         enum power_supply_property psp;
 169         int max_vol, max_cur;
 170
 171         max_vol = 0;
 172         max_cur = 0;
 173         psy = power_supply_get_by_phandle(chip->dev->of_node, "charge-dev");
 174         if (!psy || IS_ERR(psy))
 175                 return -1;
 176
 177         psp = POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT_MAX;
 178         if (power_supply_get_property(psy, psp, &val) == 0)
 179                 max_vol = val.intval / 1000;
 180
 181         psp = POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT;
 182         if (power_supply_get_property(psy, psp, &val) == 0)
 183                 max_cur = val.intval / 1000;
 184
 185         if (max_vol > 0 && max_cur > 0)
 186                 fusb_set_pos_power(chip, max_vol, max_cur);
 187
 188         return 0;
 189 }
 190
 191 void fusb_irq_disable(struct fusb30x_chip *chip)
 192 {
 193         unsigned long irqflags = 0;
 194
 195         spin_lock_irqsave(&chip->irq_lock, irqflags);
 196         if (chip->enable_irq) {
 197                 disable_irq_nosync(chip->gpio_int_irq);
 198                 chip->enable_irq = 0;
 199         } else {
 200                 dev_warn(chip->dev, "irq have already disabled\n");
 201         }
 202         spin_unlock_irqrestore(&chip->irq_lock, irqflags);
 203 }
 204
 205 void fusb_irq_enable(struct fusb30x_chip *chip)
 206 {
 207         unsigned long irqflags = 0;
 208
 209         spin_lock_irqsave(&chip->irq_lock, irqflags);
 210         if (!chip->enable_irq) {
 211                 enable_irq(chip->gpio_int_irq);
 212                 chip->enable_irq = 1;
 213         }
 214         spin_unlock_irqrestore(&chip->irq_lock, irqflags);
 215 }
 216
 217 static void platform_fusb_notify(struct fusb30x_chip *chip)
 218 {
 219         bool plugged = 0, flip = 0, dfp = 0, ufp = 0, dp = 0, usb_ss = 0;
 220         union extcon_property_value property;
 221
 222         if (chip->notify.is_cc_connected)
 223                 chip->notify.orientation = chip->cc_polarity + 1;
 224
 225         /* avoid notify repeated */
 226         if (memcmp(&chip->notify, &chip->notify_cmp,
 227                    sizeof(struct notify_info))) {
 228                 dump_notify_info(chip);
 229                 chip->notify.attention = 0;
 230                 memcpy(&chip->notify_cmp, &chip->notify,
 231                        sizeof(struct notify_info));
 232
 233                 plugged = chip->notify.is_cc_connected ||
 234                           chip->notify.is_pd_connected;
 235                 flip = chip->notify.orientation ?
 236                        (chip->notify.orientation - 1) : 0;
 237                 dp = chip->notify.is_enter_mode;
 238
 239                 if (dp) {
 240                         dfp = 1;
 241                         usb_ss = (chip->notify.pin_assignment_def &
 242                                 (PIN_MAP_B | PIN_MAP_D | PIN_MAP_F)) ? 1 : 0;
 243                 } else if (chip->notify.data_role) {
 244                         dfp = 1;
 245                         usb_ss = 1;
 246                 } else if (plugged) {
 247                         ufp = 1;
 248                         usb_ss = 1;
 249                 }
 250
 251                 property.intval = flip;
 252                 extcon_set_property(chip->extcon, EXTCON_USB,
 253                                     EXTCON_PROP_USB_TYPEC_POLARITY, property);
 254                 extcon_set_property(chip->extcon, EXTCON_USB_HOST,
 255                                     EXTCON_PROP_USB_TYPEC_POLARITY, property);
 256                 extcon_set_property(chip->extcon, EXTCON_DISP_DP,
 257                                     EXTCON_PROP_USB_TYPEC_POLARITY, property);
 258
 259                 property.intval = usb_ss;
 260                 extcon_set_property(chip->extcon, EXTCON_USB,
 261                                     EXTCON_PROP_USB_SS, property);
 262                 extcon_set_property(chip->extcon, EXTCON_USB_HOST,
 263                                     EXTCON_PROP_USB_SS, property);
 264                 extcon_set_property(chip->extcon, EXTCON_DISP_DP,
 265                                     EXTCON_PROP_USB_SS, property);
 266                 extcon_set_state(chip->extcon, EXTCON_USB, ufp);
 267                 extcon_set_state(chip->extcon, EXTCON_USB_HOST, dfp);
 268                 extcon_set_state(chip->extcon, EXTCON_DISP_DP, dp);
 269                 extcon_sync(chip->extcon, EXTCON_USB);
 270                 extcon_sync(chip->extcon, EXTCON_USB_HOST);
 271                 extcon_sync(chip->extcon, EXTCON_DISP_DP);
 272                 if (chip->notify.power_role == 0 &&
 273                     chip->notify.is_pd_connected &&
 274                     chip->pd_output_vol > 0 && chip->pd_output_cur > 0) {
 275                         extcon_set_state(chip->extcon, EXTCON_CHG_USB_FAST, true);
 276                         property.intval =
 277                                 (chip->pd_output_cur << 15 |
 278                                  chip->pd_output_vol);
 279                         extcon_set_property(chip->extcon, EXTCON_CHG_USB_FAST,
 280                                             EXTCON_PROP_USB_TYPEC_POLARITY,
 281                                             property);
 282                         extcon_sync(chip->extcon, EXTCON_CHG_USB_FAST);
 283                 }
 284         }
 285 }
 286
 287 static bool platform_get_device_irq_state(struct fusb30x_chip *chip)
 288 {
 289         return !gpiod_get_value(chip->gpio_int);
 290 }
 291
 292 static void fusb_timer_start(struct hrtimer *timer, int ms)
 293 {
 294         ktime_t ktime;
 295
 296         ktime = ktime_set(0, FUSB_MS_TO_NS(ms));
 297         hrtimer_start(timer, ktime, HRTIMER_MODE_REL);
 298 }
 299
 300 static void platform_set_vbus_lvl_enable(struct fusb30x_chip *chip, int vbus_5v,
 301                                          int vbus_other)
 302 {
 303         bool gpio_vbus_value = 0;
 304
 305         gpio_vbus_value = gpiod_get_value(chip->gpio_vbus_5v);
 306         if (chip->gpio_vbus_5v) {
 307                 gpiod_set_raw_value(chip->gpio_vbus_5v, vbus_5v);
 308                 /* Only set state here, don't sync notifier to PMIC */
 309                 extcon_set_state(chip->extcon, EXTCON_USB_VBUS_EN, vbus_5v);
 310         } else {
 311                 extcon_set_state(chip->extcon, EXTCON_USB_VBUS_EN, vbus_5v);
 312                 extcon_sync(chip->extcon, EXTCON_USB_VBUS_EN);
 313                 dev_info(chip->dev, "fusb302 send extcon to %s vbus 5v\n", vbus_5v ? "enable" : "disable");
 314         }
 315
 316         if (chip->gpio_vbus_other)
 317                 gpiod_set_raw_value(chip->gpio_vbus_5v, vbus_other);
 318
 319         if (chip->gpio_discharge && !vbus_5v && gpio_vbus_value) {
 320                 gpiod_set_value(chip->gpio_discharge, 1);
 321                 msleep(20);
 322                 gpiod_set_value(chip->gpio_discharge, 0);
 323         }
 324 }
 325
 326 static void set_state(struct fusb30x_chip *chip, enum connection_state state)
 327 {
 328         dev_dbg(chip->dev, "port %d, state %d\n", chip->port_num, state);
 329         if (!state)
 330                 dev_info(chip->dev, "PD disabled\n");
 331         chip->conn_state = state;
 332         chip->sub_state = 0;
 333         chip->val_tmp = 0;
 334         chip->work_continue = 1;
 335 }
 336
 337 static int tcpm_get_message(struct fusb30x_chip *chip)
 338 {
 339         u8 buf[32];
 340         int len;
 341
 342         regmap_raw_read(chip->regmap, FUSB_REG_FIFO, buf, 3);
 343         chip->rec_head = (buf[1] & 0xff) | ((buf[2] << 8) & 0xff00);
 344
 345         len = PD_HEADER_CNT(chip->rec_head) << 2;
 346         regmap_raw_read(chip->regmap, FUSB_REG_FIFO, buf, len + 4);
 347
 348         memcpy(chip->rec_load, buf, len);
 349
 350         return 0;
 351 }
 352
 353 static void fusb302_flush_rx_fifo(struct fusb30x_chip *chip)
 354 {
 355         tcpm_get_message(chip);
 356 }
 357
 358 static int tcpm_get_cc(struct fusb30x_chip *chip, int *CC1, int *CC2)
 359 {
 360         u32 val;
 361         int *CC_MEASURE;
 362         u32 store;
 363
 364         *CC1 = TYPEC_CC_VOLT_OPEN;
 365         *CC2 = TYPEC_CC_VOLT_OPEN;
 366
 367         if (chip->cc_state & 0x01)
 368                 CC_MEASURE = CC1;
 369         else
 370                 CC_MEASURE = CC2;
 371
 372         if (chip->cc_state & 0x04) {
 373                 regmap_read(chip->regmap, FUSB_REG_SWITCHES0, &store);
 374                 /* measure cc1 first */
 375                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 376                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
 377                                    SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 378                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
 379                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2 |
 380                                    SWITCHES0_MEAS_CC1);
 381                 usleep_range(250, 300);
 382
 383                 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 384                 val &= STATUS0_BC_LVL;
 385                 if (val)
 386                         *CC1 = val;
 387
 388                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 389                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
 390                                    SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 391                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
 392                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2 |
 393                                    SWITCHES0_MEAS_CC2);
 394                 usleep_range(250, 300);
 395
 396                 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 397                 val &= STATUS0_BC_LVL;
 398                 if (val)
 399                         *CC2 = val;
 400                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 401                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 402                                    store);
 403         } else {
 404                 regmap_read(chip->regmap, FUSB_REG_SWITCHES0, &store);
 405                 val = store;
 406                 val &= ~(SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
 407                                 SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2);
 408                 if (chip->cc_state & 0x01) {
 409                         val |= SWITCHES0_MEAS_CC1 | SWITCHES0_PU_EN1;
 410                 } else {
 411                         val |= SWITCHES0_MEAS_CC2 | SWITCHES0_PU_EN2;
 412                 }
 413                 regmap_write(chip->regmap, FUSB_REG_SWITCHES0, val);
 414
 415                 regmap_write(chip->regmap, FUSB_REG_MEASURE, chip->cc_meas_high);
 416                 usleep_range(250, 300);
 417
 418                 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 419                 if (val & STATUS0_COMP) {
 420                         int retry = 3;
 421                         int comp_times = 0;
 422
 423                         while (retry--) {
 424                                 regmap_write(chip->regmap, FUSB_REG_MEASURE, chip->cc_meas_high);
 425                                 usleep_range(250, 300);
 426                                 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 427                                 if (val & STATUS0_COMP) {
 428                                         comp_times++;
 429                                         if (comp_times == 3) {
 430                                                 *CC_MEASURE = TYPEC_CC_VOLT_OPEN;
 431                                                 regmap_write(chip->regmap, FUSB_REG_SWITCHES0, store);
 432                                         }
 433                                 }
 434                         }
 435                 } else {
 436                         regmap_write(chip->regmap, FUSB_REG_MEASURE, chip->cc_meas_low);
 437                         regmap_read(chip->regmap, FUSB_REG_MEASURE, &val);
 438                         usleep_range(250, 300);
 439
 440                         regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 441
 442                         if (val & STATUS0_COMP)
 443                                 *CC_MEASURE = TYPEC_CC_VOLT_RD;
 444                         else
 445                                 *CC_MEASURE = TYPEC_CC_VOLT_RA;
 446                         regmap_write(chip->regmap, FUSB_REG_SWITCHES0, store);
 447                 }
 448         }
 449
 450         return 0;
 451 }
 452
 453 static int tcpm_set_cc(struct fusb30x_chip *chip, int mode)
 454 {
 455         u8 val = 0, mask;
 456
 457         val &= ~(SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 458                  SWITCHES0_PDWN1 | SWITCHES0_PDWN2);
 459
 460         mask = ~val;
 461
 462         switch (mode) {
 463         case FUSB_MODE_DFP:
 464                 if (chip->togdone_pullup)
 465                         val |= SWITCHES0_PU_EN2;
 466                 else
 467                         val |= SWITCHES0_PU_EN1;
 468                 break;
 469         case FUSB_MODE_UFP:
 470                 val |= SWITCHES0_PDWN1 | SWITCHES0_PDWN2;
 471                 break;
 472         case FUSB_MODE_DRP:
 473                 val |= SWITCHES0_PDWN1 | SWITCHES0_PDWN2;
 474                 break;
 475         case FUSB_MODE_ASS:
 476                 break;
 477         }
 478
 479         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0, mask, val);
 480         return 0;
 481 }
 482
 483 static int tcpm_set_rx_enable(struct fusb30x_chip *chip, int enable)
 484 {
 485         u8 val = 0;
 486
 487         if (enable) {
 488                 if (chip->cc_polarity)
 489                         val |= SWITCHES0_MEAS_CC2;
 490                 else
 491                         val |= SWITCHES0_MEAS_CC1;
 492                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 493                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 494                                    val);
 495                 fusb302_flush_rx_fifo(chip);
 496                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 497                                    SWITCHES1_AUTO_CRC, SWITCHES1_AUTO_CRC);
 498         } else {
 499                 /*
 500                  * bit of a hack here.
 501                  * when this function is called to disable rx (enable=0)
 502                  * using it as an indication of detach (gulp!)
 503                  * to reset our knowledge of where
 504                  * the toggle state machine landed.
 505                  */
 506                 chip->togdone_pullup = 0;
 507
 508 #ifdef  FUSB_HAVE_DRP
 509                 tcpm_set_cc(chip, FUSB_MODE_DRP);
 510                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 511                                    CONTROL2_TOG_RD_ONLY,
 512                                    CONTROL2_TOG_RD_ONLY);
 513 #endif
 514                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 515                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 516                                    0);
 517                 regmap_update_bits(chip->regmap,
 518                                    FUSB_REG_SWITCHES1, SWITCHES1_AUTO_CRC, 0);
 519         }
 520
 521         return 0;
 522 }
 523
 524 static int tcpm_set_msg_header(struct fusb30x_chip *chip)
 525 {
 526         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 527                            SWITCHES1_POWERROLE | SWITCHES1_DATAROLE,
 528                            (chip->notify.power_role << 7) |
 529                            (chip->notify.data_role << 4));
 530         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 531                            SWITCHES1_SPECREV, 2 << 5);
 532         return 0;
 533 }
 534
 535 static int tcpm_set_polarity(struct fusb30x_chip *chip, bool polarity)
 536 {
 537         u8 val = 0;
 538
 539 #ifdef FUSB_VCONN_SUPPORT
 540         if (chip->vconn_enabled) {
 541                 if (polarity)
 542                         val |= SWITCHES0_VCONN_CC1;
 543                 else
 544                         val |= SWITCHES0_VCONN_CC2;
 545         }
 546 #endif
 547
 548         if (polarity)
 549                 val |= SWITCHES0_MEAS_CC2;
 550         else
 551                 val |= SWITCHES0_MEAS_CC1;
 552
 553         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 554                            SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2 |
 555                            SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 556                            val);
 557
 558         val = 0;
 559         if (polarity)
 560                 val |= SWITCHES1_TXCC2;
 561         else
 562                 val |= SWITCHES1_TXCC1;
 563         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 564                            SWITCHES1_TXCC1 | SWITCHES1_TXCC2,
 565                            val);
 566
 567         chip->cc_polarity = polarity;
 568
 569         return 0;
 570 }
 571
 572 static int tcpm_set_vconn(struct fusb30x_chip *chip, int enable)
 573 {
 574         u8 val = 0;
 575
 576         if (enable) {
 577                 tcpm_set_polarity(chip, chip->cc_polarity);
 578         } else {
 579                 val &= ~(SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2);
 580                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 581                                    SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2,
 582                                    val);
 583         }
 584         chip->vconn_enabled = enable;
 585         return 0;
 586 }
 587
 588 static void fusb302_pd_reset(struct fusb30x_chip *chip)
 589 {
 590         regmap_write(chip->regmap, FUSB_REG_RESET, RESET_PD_RESET);
 591         regmap_reinit_cache(chip->regmap, &fusb302_regmap_config);
 592 }
 593
 594 static void tcpm_select_rp_value(struct fusb30x_chip *chip, u32 rp)
 595 {
 596         u32 control0_reg;
 597
 598         regmap_read(chip->regmap, FUSB_REG_CONTROL0, &control0_reg);
 599
 600         control0_reg &= ~CONTROL0_HOST_CUR;
 601         /*
 602          * according to the host current, the compare value is different
 603         */
 604         switch (rp) {
 605         /* host pull up current is 80ua , high voltage is 1.596v, low is 0.21v */
 606         case TYPEC_RP_USB:
 607                 chip->cc_meas_high = 0x26;
 608                 chip->cc_meas_low = 0x5;
 609                 control0_reg |= CONTROL0_HOST_CUR_USB;
 610                 break;
 611         /* host pull up current is 180ua , high voltage is 1.596v, low is 0.42v */
 612         case TYPEC_RP_1A5:
 613                 chip->cc_meas_high = 0x26;
 614                 chip->cc_meas_low = 0xa;
 615                 control0_reg |= CONTROL0_HOST_CUR_1A5;
 616                 break;
 617         /* host pull up current is 330ua , high voltage is 2.604v, low is 0.798v*/
 618         case TYPEC_RP_3A0:
 619                 chip->cc_meas_high = 0x26;
 620                 chip->cc_meas_low = 0x13;
 621                 control0_reg |= CONTROL0_HOST_CUR_3A0;
 622                 break;
 623         default:
 624                 chip->cc_meas_high = 0x26;
 625                 chip->cc_meas_low = 0xa;
 626                 control0_reg |= CONTROL0_HOST_CUR_1A5;
 627                 break;
 628         }
 629
 630         regmap_write(chip->regmap, FUSB_REG_CONTROL0, control0_reg);
 631 }
 632
 633 static void tcpm_init(struct fusb30x_chip *chip)
 634 {
 635         u8 val;
 636         u32 tmp;
 637
 638         regmap_read(chip->regmap, FUSB_REG_DEVICEID, &tmp);
 639         chip->chip_id = (u8)tmp;
 640         platform_set_vbus_lvl_enable(chip, 0, 0);
 641         chip->notify.is_cc_connected = 0;
 642         chip->cc_state = 0;
 643
 644         /* restore default settings */
 645         regmap_update_bits(chip->regmap, FUSB_REG_RESET, RESET_SW_RESET,
 646                            RESET_SW_RESET);
 647         fusb302_pd_reset(chip);
 648         /* set auto_retry and number of retries */
 649         regmap_update_bits(chip->regmap, FUSB_REG_CONTROL3,
 650                            CONTROL3_AUTO_RETRY | CONTROL3_N_RETRIES,
 651                            CONTROL3_AUTO_RETRY | CONTROL3_N_RETRIES),
 652
 653         /* set interrupts */
 654         val = 0xff;
 655         val &= ~(MASK_M_BC_LVL | MASK_M_COLLISION | MASK_M_ALERT |
 656                  MASK_M_VBUSOK);
 657         regmap_write(chip->regmap, FUSB_REG_MASK, val);
 658
 659         val = 0xff;
 660         val &= ~(MASKA_M_TOGDONE | MASKA_M_RETRYFAIL | MASKA_M_HARDSENT |
 661                  MASKA_M_TXSENT | MASKA_M_HARDRST);
 662         regmap_write(chip->regmap, FUSB_REG_MASKA, val);
 663
 664         val = 0xff;
 665         val = ~MASKB_M_GCRCSEND;
 666         regmap_write(chip->regmap, FUSB_REG_MASKB, val);
 667
 668 #ifdef  FUSB_HAVE_DRP
 669                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 670                                    CONTROL2_MODE | CONTROL2_TOGGLE,
 671                                    (1 << 1) | CONTROL2_TOGGLE);
 672
 673                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 674                                    CONTROL2_TOG_RD_ONLY,
 675                                    CONTROL2_TOG_RD_ONLY);
 676 #endif
 677
 678         tcpm_select_rp_value(chip, TYPEC_RP_1A5);
 679         /* Interrupts Enable */
 680         regmap_update_bits(chip->regmap, FUSB_REG_CONTROL0, CONTROL0_INT_MASK,
 681                            ~CONTROL0_INT_MASK);
 682
 683         tcpm_set_polarity(chip, 0);
 684         tcpm_set_vconn(chip, 0);
 685
 686         regmap_write(chip->regmap, FUSB_REG_POWER, 0xf);
 687 }
 688
 689 static void pd_execute_hard_reset(struct fusb30x_chip *chip)
 690 {
 691         chip->msg_id = 0;
 692         chip->vdm_state = 0;
 693         if (chip->notify.power_role)
 694                 set_state(chip, policy_src_transition_default);
 695         else
 696                 set_state(chip, policy_snk_transition_default);
 697 }
 698
 699 static void tcpc_alert(struct fusb30x_chip *chip, int *evt)
 700 {
 701         int interrupt, interrupta, interruptb;
 702         u32 val;
 703
 704         regmap_read(chip->regmap, FUSB_REG_INTERRUPT, &interrupt);
 705         regmap_read(chip->regmap, FUSB_REG_INTERRUPTA, &interrupta);
 706         regmap_read(chip->regmap, FUSB_REG_INTERRUPTB, &interruptb);
 707
 708         if (interrupt & INTERRUPT_BC_LVL) {
 709                 if (chip->notify.is_cc_connected)
 710                         *evt |= EVENT_CC;
 711         }
 712
 713         if (interrupt & INTERRUPT_VBUSOK) {
 714                 if (chip->notify.is_cc_connected)
 715                         *evt |= EVENT_CC;
 716         }
 717
 718         if (interrupta & INTERRUPTA_TOGDONE) {
 719                 *evt |= EVENT_CC;
 720                 regmap_read(chip->regmap, FUSB_REG_STATUS1A, &val);
 721                 chip->cc_state = ((u8)val >> 3) & 0x07;
 722
 723                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 724                                    CONTROL2_TOGGLE,
 725                                    0);
 726
 727                 val &= ~(SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 728                          SWITCHES0_PDWN1 | SWITCHES0_PDWN2);
 729
 730                 if (chip->cc_state & 0x01)
 731                         val |= SWITCHES0_PU_EN1;
 732                 else
 733                         val |= SWITCHES0_PU_EN2;
 734
 735                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 736                                    SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 737                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
 738                                    val);
 739         }
 740
 741         if (interrupta & INTERRUPTA_TXSENT) {
 742                 *evt |= EVENT_TX;
 743                 fusb302_flush_rx_fifo(chip);
 744                 chip->tx_state = tx_success;
 745         }
 746
 747         if (interruptb & INTERRUPTB_GCRCSENT)
 748                 *evt |= EVENT_RX;
 749
 750         if (interrupta & INTERRUPTA_HARDRST) {
 751                 fusb302_pd_reset(chip);
 752                 pd_execute_hard_reset(chip);
 753                 *evt |= EVENT_REC_RESET;
 754         }
 755
 756         if (interrupta & INTERRUPTA_RETRYFAIL) {
 757                 *evt |= EVENT_TX;
 758                 chip->tx_state = tx_failed;
 759         }
 760
 761         if (interrupta & INTERRUPTA_HARDSENT) {
 762                 chip->tx_state = tx_success;
 763                 chip->timer_state = T_DISABLED;
 764                 *evt |= EVENT_TX;
 765         }
 766 }
 767
 768 static void mux_alert(struct fusb30x_chip *chip, int *evt)
 769 {
 770         if (!chip->timer_mux) {
 771                 *evt |= EVENT_TIMER_MUX;
 772                 chip->timer_mux = T_DISABLED;
 773         }
 774
 775         if (!chip->timer_state) {
 776                 *evt |= EVENT_TIMER_STATE;
 777                 chip->timer_state = T_DISABLED;
 778         }
 779
 780         if (chip->work_continue) {
 781                 *evt |= EVENT_WORK_CONTINUE;
 782                 chip->work_continue = 0;
 783         }
 784 }
 785
 786 static void set_state_unattached(struct fusb30x_chip *chip)
 787 {
 788         dev_info(chip->dev, "connection has disconnected\n");
 789         tcpm_init(chip);
 790         tcpm_set_rx_enable(chip, 0);
 791         chip->conn_state = unattached;
 792         tcpm_set_cc(chip, FUSB_MODE_DRP);
 793
 794         /* claer notify_info */
 795         memset(&chip->notify, 0, sizeof(struct notify_info));
 796         platform_fusb_notify(chip);
 797
 798         if (chip->gpio_discharge)
 799                 gpiod_set_value(chip->gpio_discharge, 1);
 800         msleep(100);
 801         if (chip->gpio_discharge)
 802                 gpiod_set_value(chip->gpio_discharge, 0);
 803 }
 804
 805 static int tcpm_check_vbus(struct fusb30x_chip *chip)
 806 {
 807         u32 val;
 808
 809         /* Read status register */
 810         regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 811
 812         return (val & STATUS0_VBUSOK) ? 1 : 0;
 813 }
 814
 815 static void set_mesg(struct fusb30x_chip *chip, int cmd, int is_DMT)
 816 {
 817         int i;
 818         struct PD_CAP_INFO *pd_cap_info = &chip->pd_cap_info;
 819
 820         chip->send_head = ((chip->msg_id & 0x7) << 9) |
 821                          ((chip->notify.power_role & 0x1) << 8) |
 822                          (1 << 6) |
 823                          ((chip->notify.data_role & 0x1) << 5);
 824
 825         if (is_DMT) {
 826                 switch (cmd) {
 827                 case DMT_SOURCECAPABILITIES:
 828                         chip->send_head |= ((chip->n_caps_used & 0x3) << 12) | (cmd & 0xf);
 829
 830                         for (i = 0; i < chip->n_caps_used; i++) {
 831                                 chip->send_load[i] = (pd_cap_info->supply_type << 30) |
 832                                                     (pd_cap_info->dual_role_power << 29) |
 833                                                     (pd_cap_info->usb_suspend_support << 28) |
 834                                                     (pd_cap_info->externally_powered << 27) |
 835                                                     (pd_cap_info->usb_communications_cap << 26) |
 836                                                     (pd_cap_info->data_role_swap << 25) |
 837                                                     (pd_cap_info->peak_current << 20) |
 838                                                     (chip->source_power_supply[i] << 10) |
 839                                                     (chip->source_max_current[i]);
 840                         }
 841                         break;
 842                 case DMT_REQUEST:
 843                         chip->send_head |= ((1 << 12) | (cmd & 0xf));
 844                         /* send request with FVRDO */
 845                         chip->send_load[0] = (chip->pos_power << 28) |
 846                                             (0 << 27) |
 847                                             (1 << 26) |
 848                                             (0 << 25) |
 849                                             (0 << 24);
 850
 851                         switch (CAP_POWER_TYPE(chip->rec_load[chip->pos_power - 1])) {
 852                         case 0:
 853                                 /* Fixed Supply */
 854                                 chip->send_load[0] |= ((CAP_FPDO_VOLTAGE(chip->rec_load[chip->pos_power - 1]) << 10) & 0x3ff);
 855                                 chip->send_load[0] |= (CAP_FPDO_CURRENT(chip->rec_load[chip->pos_power - 1]) & 0x3ff);
 856                                 break;
 857                         case 1:
 858                                 /* Battery */
 859                                 chip->send_load[0] |= ((CAP_VPDO_VOLTAGE(chip->rec_load[chip->pos_power - 1]) << 10) & 0x3ff);
 860                                 chip->send_load[0] |= (CAP_VPDO_CURRENT(chip->rec_load[chip->pos_power - 1]) & 0x3ff);
 861                                 break;
 862                         default:
 863                                 /* not meet battery caps */
 864                                 break;
 865                         }
 866                         break;
 867                 case DMT_SINKCAPABILITIES:
 868                         break;
 869                 case DMT_VENDERDEFINED:
 870                         break;
 871                 default:
 872                         break;
 873                 }
 874         } else {
 875                 chip->send_head |= (cmd & 0xf);
 876         }
 877 }
 878
 879 static void set_vdm_mesg(struct fusb30x_chip *chip, int cmd, int type, int mode)
 880 {
 881         chip->send_head = (chip->msg_id & 0x7) << 9;
 882         chip->send_head |= (chip->notify.power_role & 0x1) << 8;
 883
 884         chip->send_head = ((chip->msg_id & 0x7) << 9) |
 885                          ((chip->notify.power_role & 0x1) << 8) |
 886                          (1 << 6) |
 887                          ((chip->notify.data_role & 0x1) << 5) |
 888                          (DMT_VENDERDEFINED & 0xf);
 889
 890         chip->send_load[0] = (1 << 15) |
 891                             (0 << 13) |
 892                             (type << 6) |
 893                             (cmd);
 894
 895         switch (cmd) {
 896         case VDM_DISCOVERY_ID:
 897         case VDM_DISCOVERY_SVIDS:
 898         case VDM_ATTENTION:
 899                 chip->send_load[0] |= (0xff00 << 16);
 900                 chip->send_head |= (1 << 12);
 901                 break;
 902         case VDM_DISCOVERY_MODES:
 903                 chip->send_load[0] |=
 904                         (chip->vdm_svid[chip->val_tmp >> 1] << 16);
 905                 chip->send_head |= (1 << 12);
 906                 break;
 907         case VDM_ENTER_MODE:
 908                 chip->send_head |= (1 << 12);
 909                 chip->send_load[0] |= (mode << 8) | (0xff01 << 16);
 910                 break;
 911         case VDM_EXIT_MODE:
 912                 chip->send_head |= (1 << 12);
 913                 chip->send_load[0] |= (0x0f << 8) | (0xff01 << 16);
 914                 break;
 915         case VDM_DP_STATUS_UPDATE:
 916                 chip->send_head |= (2 << 12);
 917                 chip->send_load[0] |= (1 << 8) | (0xff01 << 16);
 918                 chip->send_load[1] = 5;
 919                 break;
 920         case VDM_DP_CONFIG:
 921                 chip->send_head |= (2 << 12);
 922                 chip->send_load[0] |= (1 << 8) | (0xff01 << 16);
 923                 chip->send_load[1] = (chip->notify.pin_assignment_def << 8) |
 924                                     (1 << 2) | 2;
 925                 break;
 926         default:
 927                 break;
 928         }
 929 }
 930
 931 static enum tx_state policy_send_hardrst(struct fusb30x_chip *chip, int evt)
 932 {
 933         switch (chip->tx_state) {
 934         case 0:
 935                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL3,
 936                                    CONTROL3_SEND_HARDRESET,
 937                                    CONTROL3_SEND_HARDRESET);
 938                 chip->tx_state = tx_busy;
 939                 chip->timer_state = T_BMC_TIMEOUT;
 940                 fusb_timer_start(&chip->timer_state_machine,
 941                                  chip->timer_state);
 942                 break;
 943         default:
 944                 if (evt & EVENT_TIMER_STATE)
 945                         chip->tx_state = tx_success;
 946                 break;
 947         }
 948         return chip->tx_state;
 949 }
 950
 951 static enum tx_state policy_send_data(struct fusb30x_chip *chip)
 952 {
 953         u8 senddata[40];
 954         int pos = 0;
 955         u8 len;
 956
 957         switch (chip->tx_state) {
 958         case 0:
 959                 senddata[pos++] = FUSB_TKN_SYNC1;
 960                 senddata[pos++] = FUSB_TKN_SYNC1;
 961                 senddata[pos++] = FUSB_TKN_SYNC1;
 962                 senddata[pos++] = FUSB_TKN_SYNC2;
 963
 964                 len = PD_HEADER_CNT(chip->send_head) << 2;
 965                 senddata[pos++] = FUSB_TKN_PACKSYM | ((len + 2) & 0x1f);
 966
 967                 senddata[pos++] = chip->send_head & 0xff;
 968                 senddata[pos++] = (chip->send_head >> 8) & 0xff;
 969
 970                 memcpy(&senddata[pos], chip->send_load, len);
 971                 pos += len;
 972
 973                 senddata[pos++] = FUSB_TKN_JAMCRC;
 974                 senddata[pos++] = FUSB_TKN_EOP;
 975                 senddata[pos++] = FUSB_TKN_TXOFF;
 976                 senddata[pos++] = FUSB_TKN_TXON;
 977
 978                 regmap_raw_write(chip->regmap, FUSB_REG_FIFO, senddata, pos);
 979                 chip->tx_state = tx_busy;
 980                 break;
 981
 982         default:
 983                 /* wait Tx result */
 984                 break;
 985         }
 986
 987         return chip->tx_state;
 988 }
 989
 990 static void process_vdm_msg(struct fusb30x_chip *chip)
 991 {
 992         u32 vdm_header = chip->rec_load[0];
 993         int i;
 994         u32 tmp;
 995
 996         /* can't procee unstructed vdm msg */
 997         if (!GET_VDMHEAD_STRUCT_TYPE(vdm_header))
 998                 return;
 999
1000         switch (GET_VDMHEAD_CMD_TYPE(vdm_header)) {
1001         case VDM_TYPE_INIT:
1002                 switch (GET_VDMHEAD_CMD(vdm_header)) {
1003                 case VDM_ATTENTION:
1004                         dev_info(chip->dev, "attention, dp_status %x\n",
1005                                  chip->rec_load[1]);
1006                         chip->notify.attention = 1;
1007                         chip->vdm_state = 6;
1008                         break;
1009                 default:
1010                         dev_warn(chip->dev, "rec unknown init vdm msg\n");
1011                         break;
1012                 }
1013                 break;
1014         case VDM_TYPE_ACK:
1015                 switch (GET_VDMHEAD_CMD(vdm_header)) {
1016                 case VDM_DISCOVERY_ID:
1017                         chip->vdm_id = chip->rec_load[1];
1018                         break;
1019                 case VDM_DISCOVERY_SVIDS:
1020                         for (i = 0; i < 6; i++) {
1021                                 tmp = (chip->rec_load[i + 1] >> 16) &
1022                                       0x0000ffff;
1023                                 if (tmp) {
1024                                         chip->vdm_svid[i * 2] = tmp;
1025                                         chip->vdm_svid_num++;
1026                                 } else {
1027                                         break;
1028                                 }
1029
1030                                 tmp = (chip->rec_load[i + 1] & 0x0000ffff);
1031                                 if (tmp) {
1032                                         chip->vdm_svid[i * 2 + 1] = tmp;
1033                                         chip->vdm_svid_num++;
1034                                 } else {
1035                                         break;
1036                                 }
1037                         }
1038                         break;
1039                 case VDM_DISCOVERY_MODES:
1040                         /* indicate there are some vdo modes */
1041                         if (PD_HEADER_CNT(chip->rec_head) > 1) {
1042                                 /*
1043                                  * store mode config,
1044                                  * enter first mode default
1045                                  */
1046                                 if (!((chip->rec_load[1] >> 8) & 0x3f)) {
1047                                         chip->val_tmp |= 1;
1048                                         break;
1049                                 }
1050                                 chip->notify.pin_assignment_support = 0;
1051                                 chip->notify.pin_assignment_def = 0;
1052                                 chip->notify.pin_assignment_support =
1053                                         (chip->rec_load[1] >> 8) & 0x3f;
1054                                 tmp = chip->notify.pin_assignment_support;
1055                                 for (i = 0; i < 6; i++) {
1056                                         if (!(tmp & 0x20))
1057                                                 tmp = tmp << 1;
1058                                         else
1059                                                 break;
1060                                 }
1061                                 chip->notify.pin_assignment_def = 0x20 >> i;
1062                                 chip->val_tmp |= 1;
1063                         }
1064                         break;
1065                 case VDM_ENTER_MODE:
1066                         chip->val_tmp = 1;
1067                         break;
1068                 case VDM_DP_STATUS_UPDATE:
1069                         dev_dbg(chip->dev, "dp_status 0x%x\n",
1070                                 chip->rec_load[1]);
1071                         chip->val_tmp = 1;
1072                         break;
1073                 case VDM_DP_CONFIG:
1074                         chip->val_tmp = 1;
1075                         dev_info(chip->dev,
1076                                  "DP config successful, pin_assignment 0x%x\n",
1077                                  chip->notify.pin_assignment_def);
1078                         chip->notify.is_enter_mode = 1;
1079                         break;
1080                 default:
1081                         break;
1082                 }
1083                 break;
1084         case VDM_TYPE_NACK:
1085                         dev_warn(chip->dev, "REC NACK for 0x%x\n",
1086                                  GET_VDMHEAD_CMD(vdm_header));
1087                         /* disable vdm */
1088                         chip->vdm_state = 0xff;
1089                 break;
1090         }
1091 }
1092
1093 static int vdm_send_discoveryid(struct fusb30x_chip *chip, int evt)
1094 {
1095         int tmp;
1096
1097         switch (chip->vdm_send_state) {
1098         case 0:
1099                 set_vdm_mesg(chip, VDM_DISCOVERY_ID, VDM_TYPE_INIT, 0);
1100                 chip->vdm_id = 0;
1101                 chip->tx_state = 0;
1102                 chip->vdm_send_state++;
1103         case 1:
1104                 tmp = policy_send_data(chip);
1105                 if (tmp == tx_success) {
1106                         chip->vdm_send_state++;
1107                         chip->timer_state = T_SENDER_RESPONSE;
1108                         fusb_timer_start(&chip->timer_state_machine,
1109                                          chip->timer_state);
1110                 } else if (tmp == tx_failed) {
1111                         dev_warn(chip->dev, "VDM_DISCOVERY_ID send failed\n");
1112                         /* disable auto_vdm_machine */
1113                         chip->vdm_state = 0xff;
1114                 }
1115
1116                 if (chip->vdm_send_state != 2)
1117                         break;
1118         default:
1119                 if (evt & EVENT_TIMER_STATE) {
1120                         dev_warn(chip->dev, "VDM_DISCOVERY_ID time out\n");
1121                         chip->vdm_state = 0xff;
1122                         chip->work_continue = 1;
1123                 }
1124
1125                 if (!chip->vdm_id)
1126                         break;
1127                 chip->vdm_send_state = 0;
1128                 return 0;
1129         }
1130         return -EINPROGRESS;
1131 }
1132
1133 static int vdm_send_discoverysvid(struct fusb30x_chip *chip, int evt)
1134 {
1135         int tmp;
1136
1137         switch (chip->vdm_send_state) {
1138         case 0:
1139                 set_vdm_mesg(chip, VDM_DISCOVERY_SVIDS, VDM_TYPE_INIT, 0);
1140                 memset(chip->vdm_svid, 0, 12);
1141                 chip->vdm_svid_num = 0;
1142                 chip->tx_state = 0;
1143                 chip->vdm_send_state++;
1144         case 1:
1145                 tmp = policy_send_data(chip);
1146                 if (tmp == tx_success) {
1147                         chip->vdm_send_state++;
1148                         chip->timer_state = T_SENDER_RESPONSE;
1149                         fusb_timer_start(&chip->timer_state_machine,
1150                                          chip->timer_state);
1151                 } else if (tmp == tx_failed) {
1152                         dev_warn(chip->dev, "VDM_DISCOVERY_SVIDS send failed\n");
1153                         /* disable auto_vdm_machine */
1154                         chip->vdm_state = 0xff;
1155                 }
1156
1157                 if (chip->vdm_send_state != 2)
1158                         break;
1159         default:
1160                 if (evt & EVENT_TIMER_STATE) {
1161                         dev_warn(chip->dev, "VDM_DISCOVERY_SVIDS time out\n");
1162                         chip->vdm_state = 0xff;
1163                         chip->work_continue = 1;
1164                 }
1165
1166                 if (!chip->vdm_svid_num)
1167                         break;
1168                 chip->vdm_send_state = 0;
1169                 return 0;
1170         }
1171         return -EINPROGRESS;
1172 }
1173
1174 static int vdm_send_discoverymodes(struct fusb30x_chip *chip, int evt)
1175 {
1176         int tmp;
1177
1178         if ((chip->val_tmp >> 1) != chip->vdm_svid_num) {
1179                 switch (chip->vdm_send_state) {
1180                 case 0:
1181                         set_vdm_mesg(chip, VDM_DISCOVERY_MODES,
1182                                      VDM_TYPE_INIT, 0);
1183                         chip->tx_state = 0;
1184                         chip->vdm_send_state++;
1185                 case 1:
1186                         tmp = policy_send_data(chip);
1187                         if (tmp == tx_success) {
1188                                 chip->vdm_send_state++;
1189                                 chip->timer_state = T_SENDER_RESPONSE;
1190                                 fusb_timer_start(&chip->timer_state_machine,
1191                                                  chip->timer_state);
1192                         } else if (tmp == tx_failed) {
1193                                 dev_warn(chip->dev,
1194                                          "VDM_DISCOVERY_MODES send failed\n");
1195                                 chip->vdm_state = 0xff;
1196                         }
1197
1198                         if (chip->vdm_send_state != 2)
1199                                 break;
1200                 default:
1201                         if (evt & EVENT_TIMER_STATE) {
1202                                 dev_warn(chip->dev,
1203                                          "VDM_DISCOVERY_MODES time out\n");
1204                                 chip->vdm_state = 0xff;
1205                                 chip->work_continue = 1;
1206                         }
1207
1208                         if (!(chip->val_tmp & 1))
1209                                 break;
1210                         chip->val_tmp &= 0xfe;
1211                         chip->val_tmp += 2;
1212                         chip->vdm_send_state = 0;
1213                         chip->work_continue = 1;
1214                         break;
1215                 }
1216         } else {
1217                 chip->val_tmp = 0;
1218                 return 0;
1219         }
1220
1221         return -EINPROGRESS;
1222 }
1223
1224 static int vdm_send_entermode(struct fusb30x_chip *chip, int evt)
1225 {
1226         int tmp;
1227
1228         switch (chip->vdm_send_state) {
1229         case 0:
1230                 set_vdm_mesg(chip, VDM_ENTER_MODE, VDM_TYPE_INIT, 1);
1231                 chip->tx_state = 0;
1232                 chip->vdm_send_state++;
1233                 chip->notify.is_enter_mode = 0;
1234         case 1:
1235                 tmp = policy_send_data(chip);
1236                 if (tmp == tx_success) {
1237                         chip->vdm_send_state++;
1238                         chip->timer_state = T_SENDER_RESPONSE;
1239                         fusb_timer_start(&chip->timer_state_machine,
1240                                          chip->timer_state);
1241                 } else if (tmp == tx_failed) {
1242                         dev_warn(chip->dev, "VDM_ENTER_MODE send failed\n");
1243                         /* disable auto_vdm_machine */
1244                         chip->vdm_state = 0xff;
1245                 }
1246
1247                 if (chip->vdm_send_state != 2)
1248                         break;
1249         default:
1250                 if (evt & EVENT_TIMER_STATE) {
1251                         dev_warn(chip->dev, "VDM_ENTER_MODE time out\n");
1252                         chip->vdm_state = 0xff;
1253                         chip->work_continue = 1;
1254                 }
1255
1256                 if (!chip->val_tmp)
1257                         break;
1258                 chip->val_tmp = 0;
1259                 chip->vdm_send_state = 0;
1260                 return 0;
1261         }
1262         return -EINPROGRESS;
1263 }
1264
1265 static int vdm_send_getdpstatus(struct fusb30x_chip *chip, int evt)
1266 {
1267         int tmp;
1268
1269         switch (chip->vdm_send_state) {
1270         case 0:
1271                 set_vdm_mesg(chip, VDM_DP_STATUS_UPDATE, VDM_TYPE_INIT, 1);
1272                 chip->tx_state = 0;
1273                 chip->vdm_send_state++;
1274         case 1:
1275                 tmp = policy_send_data(chip);
1276                 if (tmp == tx_success) {
1277                         chip->vdm_send_state++;
1278                         chip->timer_state = T_SENDER_RESPONSE;
1279                         fusb_timer_start(&chip->timer_state_machine,
1280                                          chip->timer_state);
1281                 } else if (tmp == tx_failed) {
1282                         dev_warn(chip->dev,
1283                                  "VDM_DP_STATUS_UPDATE send failed\n");
1284                         /* disable auto_vdm_machine */
1285                         chip->vdm_state = 0xff;
1286                 }
1287
1288                 if (chip->vdm_send_state != 2)
1289                         break;
1290         default:
1291                 if (evt & EVENT_TIMER_STATE) {
1292                         dev_warn(chip->dev, "VDM_DP_STATUS_UPDATE time out\n");
1293                         chip->vdm_state = 0xff;
1294                         chip->work_continue = 1;
1295                 }
1296
1297                 if (!chip->val_tmp)
1298                         break;
1299                 chip->val_tmp = 0;
1300                 chip->vdm_send_state = 0;
1301                 return 0;
1302         }
1303         return -EINPROGRESS;
1304 }
1305
1306 static int vdm_send_dpconfig(struct fusb30x_chip *chip, int evt)
1307 {
1308         int tmp;
1309
1310         switch (chip->vdm_send_state) {
1311         case 0:
1312                 set_vdm_mesg(chip, VDM_DP_CONFIG, VDM_TYPE_INIT, 0);
1313                 chip->tx_state = 0;
1314                 chip->vdm_send_state++;
1315         case 1:
1316                 tmp = policy_send_data(chip);
1317                 if (tmp == tx_success) {
1318                         chip->vdm_send_state++;
1319                         chip->timer_state = T_SENDER_RESPONSE;
1320                         fusb_timer_start(&chip->timer_state_machine,
1321                                          chip->timer_state);
1322                 } else if (tmp == tx_failed) {
1323                         dev_warn(chip->dev, "vdm_send_dpconfig send failed\n");
1324                         /* disable auto_vdm_machine */
1325                         chip->vdm_state = 0xff;
1326                 }
1327
1328                 if (chip->vdm_send_state != 2)
1329                         break;
1330         default:
1331                 if (evt & EVENT_TIMER_STATE) {
1332                         dev_warn(chip->dev, "vdm_send_dpconfig time out\n");
1333                         chip->vdm_state = 0xff;
1334                         chip->work_continue = 1;
1335                 }
1336
1337                 if (!chip->val_tmp)
1338                         break;
1339                 chip->val_tmp = 0;
1340                 chip->vdm_send_state = 0;
1341                 return 0;
1342         }
1343         return -EINPROGRESS;
1344 }
1345
1346 static void auto_vdm_machine(struct fusb30x_chip *chip, int evt)
1347 {
1348         switch (chip->vdm_state) {
1349         case 0:
1350                 if (vdm_send_discoveryid(chip, evt))
1351                         break;
1352                 chip->vdm_state++;
1353                 /* without break */
1354         case 1:
1355                 if (vdm_send_discoverysvid(chip, evt))
1356                         break;
1357                 chip->vdm_state++;
1358                 /* without break */
1359         case 2:
1360                 if (vdm_send_discoverymodes(chip, evt))
1361                         break;
1362                 chip->vdm_state++;
1363                 /* without break */
1364         case 3:
1365                 if (vdm_send_entermode(chip, evt))
1366                         break;
1367                 chip->vdm_state++;
1368                 /* without break */
1369         case 4:
1370                 if (vdm_send_dpconfig(chip, evt))
1371                         break;
1372                 chip->vdm_state = 6;
1373                 /* without break */
1374         case 5:
1375                 if (vdm_send_getdpstatus(chip, evt))
1376                         break;
1377                 chip->vdm_state++;
1378                 /* without break */
1379         default:
1380                 platform_fusb_notify(chip);
1381                 break;
1382         }
1383 }
1384
1385 static void fusb_state_disabled(struct fusb30x_chip *chip, int evt)
1386 {
1387         platform_fusb_notify(chip);
1388 }
1389
1390 static void fusb_state_unattached(struct fusb30x_chip *chip, int evt)
1391 {
1392         chip->notify.is_cc_connected = 0;
1393         if ((evt & EVENT_CC) && chip->cc_state) {
1394                 if (chip->cc_state & 0x04)
1395                         set_state(chip, attach_wait_sink);
1396                 else
1397                         set_state(chip, attach_wait_source);
1398
1399                 tcpm_get_cc(chip, &chip->cc1, &chip->cc2);
1400                 chip->debounce_cnt = 0;
1401                 chip->timer_mux = 2;
1402                 fusb_timer_start(&chip->timer_mux_machine, chip->timer_mux);
1403         }
1404 }
1405
1406 static void fusb_state_attach_wait_sink(struct fusb30x_chip *chip, int evt)
1407 {
1408         int cc1, cc2;
1409
1410         if (evt & EVENT_TIMER_MUX) {
1411                 tcpm_get_cc(chip, &cc1, &cc2);
1412
1413                 if ((chip->cc1 == cc1) && (chip->cc2 == cc2)) {
1414                         chip->debounce_cnt++;
1415                 } else {
1416                         chip->cc1 = cc1;
1417                         chip->cc2 = cc2;
1418                         chip->debounce_cnt = 0;
1419                 }
1420
1421                 if (chip->debounce_cnt > N_DEBOUNCE_CNT) {
1422                         if ((chip->cc1 != chip->cc2) &&
1423                             ((!chip->cc1) || (!chip->cc2))) {
1424                                 set_state(chip, attached_sink);
1425                         } else {
1426                                 set_state_unattached(chip);
1427                         }
1428                         return;
1429                 }
1430
1431                 chip->timer_mux = 2;
1432                 fusb_timer_start(&chip->timer_mux_machine,
1433                                  chip->timer_mux);
1434         }
1435 }
1436
1437 static void fusb_state_attach_wait_source(struct fusb30x_chip *chip, int evt)
1438 {
1439         int cc1, cc2;
1440
1441         if (evt & EVENT_TIMER_MUX) {
1442                 tcpm_get_cc(chip, &cc1, &cc2);
1443
1444                 if ((chip->cc1 == cc1) && (chip->cc2 == cc2)) {
1445                         if (chip->debounce_cnt++ == 0)
1446                                 platform_set_vbus_lvl_enable(chip, 1, 0);
1447                 } else {
1448                         chip->cc1 = cc1;
1449                         chip->cc2 = cc2;
1450                         chip->debounce_cnt = 0;
1451                 }
1452
1453                 if (chip->debounce_cnt > N_DEBOUNCE_CNT) {
1454                         if (((!chip->cc1) || (!chip->cc2)) &&
1455                             ((chip->cc1 == TYPEC_CC_VOLT_RD) ||
1456                              (chip->cc2 == TYPEC_CC_VOLT_RD))) {
1457                                 set_state(chip, attached_source);
1458                         } else {
1459                                 set_state_unattached(chip);
1460                         }
1461
1462                         return;
1463                 }
1464
1465                 chip->timer_mux = 2;
1466                 fusb_timer_start(&chip->timer_mux_machine,
1467                                  chip->timer_mux);
1468         }
1469 }
1470
1471 static void fusb_state_attached_source(struct fusb30x_chip *chip, int evt)
1472 {
1473         tcpm_set_polarity(chip, !(chip->cc_state & 0x01));
1474         tcpm_set_vconn(chip, 1);
1475
1476         chip->notify.is_cc_connected = 1;
1477         if (chip->cc_state & 0x01)
1478                 chip->cc_polarity = 0;
1479         else
1480                 chip->cc_polarity = 1;
1481
1482         chip->notify.power_role = 1;
1483         chip->notify.data_role = 1;
1484         chip->hardrst_count = 0;
1485         set_state(chip, policy_src_startup);
1486         dev_info(chip->dev, "CC connected in %d as DFP\n", chip->cc_polarity);
1487 }
1488
1489 static void fusb_state_attached_sink(struct fusb30x_chip *chip, int evt)
1490 {
1491         chip->notify.is_cc_connected = 1;
1492         if (chip->cc_state & 0x01)
1493                 chip->cc_polarity = 0;
1494         else
1495                 chip->cc_polarity = 1;
1496
1497         chip->notify.power_role = 0;
1498         chip->notify.data_role = 0;
1499         chip->hardrst_count = 0;
1500         set_state(chip, policy_snk_startup);
1501         dev_info(chip->dev, "CC connected in %d as UFP\n", chip->cc_polarity);
1502 }
1503
1504 static void fusb_state_src_startup(struct fusb30x_chip *chip, int evt)
1505 {
1506         chip->caps_counter = 0;
1507         chip->notify.is_pd_connected = 0;
1508         chip->msg_id = 0;
1509         chip->vdm_state = 0;
1510         chip->vdm_substate = 0;
1511         chip->vdm_send_state = 0;
1512         chip->val_tmp = 0;
1513
1514         memset(chip->partner_cap, 0, sizeof(chip->partner_cap));
1515
1516         tcpm_set_msg_header(chip);
1517         tcpm_set_polarity(chip, chip->cc_polarity);
1518         tcpm_set_rx_enable(chip, 1);
1519
1520         set_state(chip, policy_src_send_caps);
1521 }
1522
1523 static void fusb_state_src_discovery(struct fusb30x_chip *chip, int evt)
1524 {
1525         switch (chip->sub_state) {
1526         case 0:
1527                 chip->caps_counter++;
1528
1529                 if (chip->caps_counter < N_CAPS_COUNT) {
1530                         chip->timer_state = T_TYPEC_SEND_SOURCECAP;
1531                         fusb_timer_start(&chip->timer_state_machine,
1532                                          chip->timer_state);
1533                         chip->sub_state = 1;
1534                 } else {
1535                         set_state(chip, disabled);
1536                 }
1537                 break;
1538         default:
1539                 if (evt & EVENT_TIMER_STATE) {
1540                         set_state(chip, policy_src_send_caps);
1541                 } else if ((evt & EVENT_TIMER_MUX) &&
1542                            (chip->hardrst_count > N_HARDRESET_COUNT)) {
1543                         if (chip->notify.is_pd_connected)
1544                                 set_state(chip, error_recovery);
1545                         else
1546                                 set_state(chip, disabled);
1547                 }
1548                 break;
1549         }
1550 }
1551
1552 static void fusb_state_src_send_caps(struct fusb30x_chip *chip, int evt)
1553 {
1554         u32 tmp;
1555
1556         switch (chip->sub_state) {
1557         case 0:
1558                 set_mesg(chip, DMT_SOURCECAPABILITIES, DATAMESSAGE);
1559                 chip->sub_state = 1;
1560                 chip->tx_state = tx_idle;
1561                 /* without break */
1562         case 1:
1563                 tmp = policy_send_data(chip);
1564
1565                 if (tmp == tx_success) {
1566                         chip->hardrst_count = 0;
1567                         chip->caps_counter = 0;
1568                         chip->timer_state = T_SENDER_RESPONSE;
1569                         fusb_timer_start(&chip->timer_state_machine,
1570                                          chip->timer_state);
1571                         chip->timer_mux = T_DISABLED;
1572                         chip->sub_state++;
1573                 } else if (tmp == tx_failed) {
1574                         set_state(chip, policy_src_discovery);
1575                         break;
1576                 }
1577
1578                 if (!(evt & FLAG_EVENT))
1579                         break;
1580         default:
1581                 if (evt & EVENT_RX) {
1582                         if ((PD_HEADER_CNT(chip->rec_head) == 1) &&
1583                             (PD_HEADER_TYPE(chip->rec_head) == DMT_REQUEST)) {
1584                                 set_state(chip, policy_src_negotiate_cap);
1585                         } else {
1586                                 set_state(chip, policy_src_send_softrst);
1587                         }
1588                 } else if (evt & EVENT_TIMER_STATE) {
1589                         if (chip->hardrst_count <= N_HARDRESET_COUNT)
1590                                 set_state(chip, policy_src_send_hardrst);
1591                         else
1592                                 set_state(chip, disabled);
1593                 } else if (evt & EVENT_TIMER_MUX) {
1594                         if (chip->notify.is_pd_connected)
1595                                 set_state(chip, disabled);
1596                         else
1597                                 set_state(chip, error_recovery);
1598                 }
1599                 break;
1600         }
1601 }
1602
1603 static void fusb_state_src_negotiate_cap(struct fusb30x_chip *chip, int evt)
1604 {
1605         u32 tmp;
1606
1607         /* base on evb1 */
1608         tmp = (chip->rec_load[0] >> 28) & 0x07;
1609         if (tmp > chip->n_caps_used)
1610                 set_state(chip, policy_src_cap_response);
1611         else
1612                 set_state(chip, policy_src_transition_supply);
1613 }
1614
1615 static void fusb_state_src_transition_supply(struct fusb30x_chip *chip,
1616                                              int evt)
1617 {
1618         u32 tmp;
1619
1620         switch (chip->sub_state) {
1621         case 0:
1622                 set_mesg(chip, CMT_ACCEPT, CONTROLMESSAGE);
1623                 chip->tx_state = tx_idle;
1624                 chip->sub_state++;
1625                 /* without break */
1626         case 1:
1627                 tmp = policy_send_data(chip);
1628                 if (tmp == tx_success) {
1629                         chip->timer_state = T_SRC_TRANSITION;
1630                         chip->sub_state++;
1631                         fusb_timer_start(&chip->timer_state_machine,
1632                                          chip->timer_state);
1633                 } else if (tmp == tx_failed) {
1634                         set_state(chip, policy_src_send_softrst);
1635                 }
1636                 break;
1637         case 2:
1638                 if (evt & EVENT_TIMER_STATE) {
1639                         chip->notify.is_pd_connected = 1;
1640                         platform_set_vbus_lvl_enable(chip, 1, 0);
1641                         set_mesg(chip, CMT_PS_RDY, CONTROLMESSAGE);
1642                         chip->tx_state = tx_idle;
1643                         chip->sub_state++;
1644                         chip->work_continue = 1;
1645                 }
1646                 break;
1647         default:
1648                 tmp = policy_send_data(chip);
1649                 if (tmp == tx_success) {
1650                         dev_info(chip->dev,
1651                                  "PD connected as DFP, supporting 5V\n");
1652                         set_state(chip, policy_src_ready);
1653                 } else if (tmp == tx_failed) {
1654                         set_state(chip, policy_src_send_softrst);
1655                 }
1656                 break;
1657         }
1658 }
1659
1660 static void fusb_state_src_cap_response(struct fusb30x_chip *chip, int evt)
1661 {
1662         u32 tmp;
1663
1664         switch (chip->sub_state) {
1665         case 0:
1666                 set_mesg(chip, CMT_REJECT, CONTROLMESSAGE);
1667                 chip->tx_state = tx_idle;
1668                 chip->sub_state++;
1669                 /* without break */
1670         default:
1671                 tmp = policy_send_data(chip);
1672                 if (tmp == tx_success) {
1673                         if (chip->notify.is_pd_connected) {
1674                                 dev_info(chip->dev,
1675                                          "PD connected as DFP, supporting 5V\n");
1676                                 set_state(chip, policy_src_ready);
1677                         } else {
1678                                 set_state(chip, policy_src_send_hardrst);
1679                         }
1680                 } else if (tmp == tx_failed) {
1681                         set_state(chip, policy_src_send_softrst);
1682                 }
1683                 break;
1684         }
1685 }
1686
1687 static void fusb_state_src_transition_default(struct fusb30x_chip *chip,
1688                                               int evt)
1689 {
1690         switch (chip->sub_state) {
1691         case 0:
1692                 chip->notify.is_pd_connected = 0;
1693                 platform_set_vbus_lvl_enable(chip, 0, 0);
1694                 if (chip->notify.data_role)
1695                         regmap_update_bits(chip->regmap,
1696                                            FUSB_REG_SWITCHES1,
1697                                            SWITCHES1_DATAROLE,
1698                                            SWITCHES1_DATAROLE);
1699                 else
1700                         regmap_update_bits(chip->regmap,
1701                                            FUSB_REG_SWITCHES1,
1702                                            SWITCHES1_DATAROLE,
1703                                            0);
1704
1705                 chip->timer_state = T_SRC_RECOVER;
1706                 fusb_timer_start(&chip->timer_state_machine,
1707                                  chip->timer_state);
1708                 chip->sub_state++;
1709                 break;
1710         default:
1711                 if (evt & EVENT_TIMER_STATE) {
1712                         platform_set_vbus_lvl_enable(chip, 1, 0);
1713                         chip->timer_mux = T_NO_RESPONSE;
1714                         fusb_timer_start(&chip->timer_mux_machine,
1715                                          chip->timer_mux);
1716                         set_state(chip, policy_src_startup);
1717                         dev_dbg(chip->dev, "reset over-> src startup\n");
1718                 }
1719                 break;
1720         }
1721 }
1722
1723 static void fusb_state_src_ready(struct fusb30x_chip *chip, int evt)
1724 {
1725         if (evt & EVENT_RX) {
1726                 if ((PD_HEADER_CNT(chip->rec_head)) &&
1727                     (PD_HEADER_TYPE(chip->rec_head) == DMT_VENDERDEFINED)) {
1728                         process_vdm_msg(chip);
1729                         chip->work_continue = 1;
1730                         chip->timer_state = T_DISABLED;
1731                 }
1732         }
1733
1734         /* TODO: swap function would be added here later on*/
1735
1736         if (!chip->partner_cap[0])
1737                 set_state(chip, policy_src_get_sink_caps);
1738         else
1739                 auto_vdm_machine(chip, evt);
1740 }
1741
1742 static void fusb_state_src_get_sink_cap(struct fusb30x_chip *chip, int evt)
1743 {
1744         u32 tmp;
1745
1746         switch (chip->sub_state) {
1747         case 0:
1748                 set_mesg(chip, CMT_GETSINKCAP, CONTROLMESSAGE);
1749                 chip->tx_state = tx_idle;
1750                 chip->sub_state++;
1751                 /* without break */
1752         case 1:
1753                 tmp = policy_send_data(chip);
1754                 if (tmp == tx_success) {
1755                         chip->timer_state = T_SENDER_RESPONSE;
1756                         chip->sub_state++;
1757                         fusb_timer_start(&chip->timer_state_machine,
1758                                          chip->timer_state);
1759                 } else if (tmp == tx_failed) {
1760                         set_state(chip, policy_src_send_softrst);
1761                 }
1762
1763                 if (!(evt & FLAG_EVENT))
1764                         break;
1765         default:
1766                 if (evt & EVENT_RX) {
1767                         if ((PD_HEADER_CNT(chip->rec_head)) &&
1768                             (PD_HEADER_TYPE(chip->rec_head) ==
1769                              DMT_SINKCAPABILITIES)) {
1770                                 for (tmp = 0;
1771                                      tmp < PD_HEADER_CNT(chip->rec_head);
1772                                      tmp++) {
1773                                         chip->partner_cap[tmp] =
1774                                                 chip->rec_load[tmp];
1775                                 }
1776                                 set_state(chip, policy_src_ready);
1777                         } else {
1778                                 chip->partner_cap[0] = 0xffffffff;
1779                                 set_state(chip, policy_src_ready);
1780                         }
1781                 } else if (evt & EVENT_TIMER_STATE) {
1782                         dev_warn(chip->dev, "Get sink cap time out\n");
1783                         chip->partner_cap[0] = 0xffffffff;
1784                         set_state(chip, policy_src_ready);
1785                 }
1786         }
1787 }
1788
1789 static void fusb_state_src_send_hardreset(struct fusb30x_chip *chip, int evt)
1790 {
1791         u32 tmp;
1792
1793         switch (chip->sub_state) {
1794         case 0:
1795                 chip->tx_state = tx_idle;
1796                 chip->sub_state++;
1797                 /* without break */
1798         default:
1799                 tmp = policy_send_hardrst(chip, evt);
1800                 if (tmp == tx_success) {
1801                         chip->hardrst_count++;
1802                         set_state(chip, policy_src_transition_default);
1803                 } else if (tmp == tx_failed) {
1804                         /* can't reach here */
1805                         set_state(chip, error_recovery);
1806                 }
1807                 break;
1808         }
1809 }
1810
1811 static void fusb_state_src_send_softreset(struct fusb30x_chip *chip, int evt)
1812 {
1813         u32 tmp;
1814
1815         switch (chip->sub_state) {
1816         case 0:
1817                 set_mesg(chip, CMT_SOFTRESET, CONTROLMESSAGE);
1818                 chip->tx_state = tx_idle;
1819                 chip->sub_state++;
1820                 /* without break */
1821         case 1:
1822                 tmp = policy_send_data(chip);
1823                 if (tmp == tx_success) {
1824                         chip->timer_state = T_SENDER_RESPONSE;
1825                         chip->sub_state++;
1826                         fusb_timer_start(&chip->timer_state_machine,
1827                                          chip->timer_state);
1828                 } else if (tmp == tx_failed) {
1829                         set_state(chip, policy_src_send_hardrst);
1830                 }
1831
1832                 if (!(evt & FLAG_EVENT))
1833                         break;
1834         default:
1835                 if (evt & EVENT_RX) {
1836                         if ((!PD_HEADER_CNT(chip->rec_head)) &&
1837                             (PD_HEADER_TYPE(chip->rec_head) == CMT_ACCEPT))
1838                                 set_state(chip, policy_src_send_caps);
1839                 } else if (evt & EVENT_TIMER_STATE) {
1840                         set_state(chip, policy_src_send_hardrst);
1841                 }
1842                 break;
1843         }
1844 }
1845
1846 static void fusb_state_snk_startup(struct fusb30x_chip *chip, int evt)
1847 {
1848         chip->notify.is_pd_connected = 0;
1849         chip->msg_id = 0;
1850         chip->vdm_state = 0;
1851         chip->vdm_substate = 0;
1852         chip->vdm_send_state = 0;
1853         chip->val_tmp = 0;
1854         chip->pos_power = 0;
1855
1856         memset(chip->partner_cap, 0, sizeof(chip->partner_cap));
1857
1858         tcpm_set_msg_header(chip);
1859         tcpm_set_polarity(chip, chip->cc_polarity);
1860         tcpm_set_rx_enable(chip, 1);
1861         set_state(chip, policy_snk_discovery);
1862 }
1863
1864 static void fusb_state_snk_discovery(struct fusb30x_chip *chip, int evt)
1865 {
1866         set_state(chip, policy_snk_wait_caps);
1867         chip->timer_state = T_TYPEC_SINK_WAIT_CAP;
1868         fusb_timer_start(&chip->timer_state_machine,
1869                          chip->timer_state);
1870 }
1871
1872 static void fusb_state_snk_wait_caps(struct fusb30x_chip *chip, int evt)
1873 {
1874         if (evt & EVENT_RX) {
1875                 if (PD_HEADER_CNT(chip->rec_head) &&
1876                     PD_HEADER_TYPE(chip->rec_head) == DMT_SOURCECAPABILITIES) {
1877                         chip->timer_mux = T_DISABLED;
1878                         set_state(chip, policy_snk_evaluate_caps);
1879                 }
1880         } else if (evt & EVENT_TIMER_STATE) {
1881                 if (chip->hardrst_count <= N_HARDRESET_COUNT)
1882                         set_state(chip, policy_snk_send_hardrst);
1883                 else
1884                         set_state(chip, disabled);
1885         } else if ((evt & EVENT_TIMER_MUX) &&
1886                    (chip->hardrst_count > N_HARDRESET_COUNT)) {
1887                 if (chip->notify.is_pd_connected)
1888                         set_state(chip, error_recovery);
1889                 else
1890                         set_state(chip, disabled);
1891         }
1892 }
1893
1894 static void fusb_state_snk_evaluate_caps(struct fusb30x_chip *chip, int evt)
1895 {
1896         u32 tmp;
1897
1898         chip->hardrst_count = 0;
1899         chip->pos_power = 0;
1900
1901         for (tmp = 0; tmp < PD_HEADER_CNT(chip->rec_head); tmp++) {
1902                 switch (CAP_POWER_TYPE(chip->rec_load[tmp])) {
1903                 case 0:
1904                         /* Fixed Supply */
1905                         if (CAP_FPDO_VOLTAGE(chip->rec_load[tmp]) <= 100)
1906                                 chip->pos_power = tmp + 1;
1907                         break;
1908                 case 1:
1909                         /* Battery */
1910                         if (CAP_VPDO_VOLTAGE(chip->rec_load[tmp]) <= 100)
1911                                 chip->pos_power = tmp + 1;
1912                         break;
1913                 default:
1914                         /* not meet battery caps */
1915                         break;
1916                 }
1917         }
1918         fusb302_set_pos_power_by_charge_ic(chip);
1919
1920         if ((!chip->pos_power) || (chip->pos_power > 7)) {
1921                 chip->pos_power = 0;
1922                 set_state(chip, policy_snk_wait_caps);
1923         } else {
1924                 set_state(chip, policy_snk_select_cap);
1925         }
1926 }
1927
1928 static void fusb_state_snk_select_cap(struct fusb30x_chip *chip, int evt)
1929 {
1930         u32 tmp;
1931
1932         switch (chip->sub_state) {
1933         case 0:
1934                 set_mesg(chip, DMT_REQUEST, DATAMESSAGE);
1935                 chip->sub_state = 1;
1936                 chip->tx_state = tx_idle;
1937                 /* without break */
1938         case 1:
1939                 tmp = policy_send_data(chip);
1940
1941                 if (tmp == tx_success) {
1942                         chip->timer_state = T_SENDER_RESPONSE;
1943                         fusb_timer_start(&chip->timer_state_machine,
1944                                          chip->timer_state);
1945                         chip->sub_state++;
1946                 } else if (tmp == tx_failed) {
1947                         set_state(chip, policy_snk_discovery);
1948                         break;
1949                 }
1950
1951                 if (!(evt & FLAG_EVENT))
1952                         break;
1953         default:
1954                 if (evt & EVENT_RX) {
1955                         if (!PD_HEADER_CNT(chip->rec_head)) {
1956                                 switch (PD_HEADER_TYPE(chip->rec_head)) {
1957                                 case CMT_ACCEPT:
1958                                         set_state(chip,
1959                                                   policy_snk_transition_sink);
1960                                         chip->timer_state = T_PS_TRANSITION;
1961                                         fusb_timer_start(&chip->timer_state_machine,
1962                                                          chip->timer_state);
1963                                         break;
1964                                 case CMT_WAIT:
1965                                 case CMT_REJECT:
1966                                         if (chip->notify.is_pd_connected) {
1967                                                 dev_info(chip->dev,
1968                                                          "PD connected as UFP, fetching 5V\n");
1969                                                 set_state(chip,
1970                                                           policy_snk_ready);
1971                                         } else {
1972                                                 set_state(chip,
1973                                                           policy_snk_wait_caps);
1974                                                 /*
1975                                                  * make sure don't send
1976                                                  * hard reset to prevent
1977                                                  * infinite loop
1978                                                  */
1979                                                 chip->hardrst_count =
1980                                                         N_HARDRESET_COUNT + 1;
1981                                         }
1982                                         break;
1983                                 default:
1984                                         break;
1985                                 }
1986                         }
1987                 } else if (evt & EVENT_TIMER_STATE) {
1988                         set_state(chip, policy_snk_send_hardrst);
1989                 }
1990                 break;
1991         }
1992 }
1993
1994 static void fusb_state_snk_transition_sink(struct fusb30x_chip *chip, int evt)
1995 {
1996         if (evt & EVENT_RX) {
1997                 if ((!PD_HEADER_CNT(chip->rec_head)) &&
1998                     (PD_HEADER_TYPE(chip->rec_head) == CMT_PS_RDY)) {
1999                         chip->notify.is_pd_connected = 1;
2000                         dev_info(chip->dev,
2001                                  "PD connected as UFP, fetching 5V\n");
2002                         set_state(chip, policy_snk_ready);
2003                 } else if ((PD_HEADER_CNT(chip->rec_head)) &&
2004                            (PD_HEADER_TYPE(chip->rec_head) ==
2005                             DMT_SOURCECAPABILITIES)) {
2006                         set_state(chip, policy_snk_evaluate_caps);
2007                 }
2008         } else if (evt & EVENT_TIMER_STATE) {
2009                 set_state(chip, policy_snk_send_hardrst);
2010         }
2011 }
2012
2013 static void fusb_state_snk_transition_default(struct fusb30x_chip *chip,
2014                                               int evt)
2015 {
2016         switch (chip->sub_state) {
2017         case 0:
2018                 chip->notify.is_pd_connected = 0;
2019                 chip->timer_mux = T_NO_RESPONSE;
2020                 fusb_timer_start(&chip->timer_mux_machine,
2021                                  chip->timer_mux);
2022                 chip->timer_state = T_PS_HARD_RESET_MAX + T_SAFE_0V;
2023                 fusb_timer_start(&chip->timer_state_machine,
2024                                  chip->timer_state);
2025                 if (chip->notify.data_role)
2026                         tcpm_set_msg_header(chip);
2027
2028                 chip->sub_state++;
2029         case 1:
2030                 if (!tcpm_check_vbus(chip)) {
2031                         chip->sub_state++;
2032                         chip->timer_state = T_SRC_RECOVER_MAX + T_SRC_TURN_ON;
2033                         fusb_timer_start(&chip->timer_state_machine,
2034                                          chip->timer_state);
2035                 } else if (evt & EVENT_TIMER_STATE) {
2036                         set_state(chip, policy_snk_startup);
2037                 }
2038                 break;
2039         default:
2040                 if (tcpm_check_vbus(chip)) {
2041                         chip->timer_state = T_DISABLED;
2042                         set_state(chip, policy_snk_startup);
2043                 } else if (evt & EVENT_TIMER_STATE) {
2044                         set_state(chip, policy_snk_startup);
2045                 }
2046                 break;
2047         }
2048 }
2049
2050 static void fusb_state_snk_ready(struct fusb30x_chip *chip, int evt)
2051 {
2052         /* TODO: snk_ready_function would be added later on*/
2053         platform_fusb_notify(chip);
2054 }
2055
2056 static void fusb_state_snk_send_hardreset(struct fusb30x_chip *chip, int evt)
2057 {
2058         u32 tmp;
2059
2060         switch (chip->sub_state) {
2061         case 0:
2062                 chip->tx_state = tx_idle;
2063                 chip->sub_state++;
2064         default:
2065                 tmp = policy_send_hardrst(chip, evt);
2066                 if (tmp == tx_success) {
2067                         chip->hardrst_count++;
2068                         set_state(chip, policy_snk_transition_default);
2069                 } else if (tmp == tx_failed) {
2070                         set_state(chip, error_recovery);
2071                 }
2072                 break;
2073         }
2074 }
2075
2076 static void fusb_state_snk_send_softreset(struct fusb30x_chip *chip, int evt)
2077 {
2078         u32 tmp;
2079
2080         switch (chip->sub_state) {
2081         case 0:
2082                 set_mesg(chip, CMT_SOFTRESET, CONTROLMESSAGE);
2083                 chip->tx_state = tx_idle;
2084                 chip->sub_state++;
2085         case 1:
2086                 tmp = policy_send_data(chip);
2087                 if (tmp == tx_success) {
2088                         chip->timer_state = T_SENDER_RESPONSE;
2089                         chip->sub_state++;
2090                         fusb_timer_start(&chip->timer_state_machine,
2091                                          chip->timer_state);
2092                 } else if (tmp == tx_failed) {
2093                         /* can't reach here */
2094                         set_state(chip, policy_snk_send_hardrst);
2095                 }
2096
2097                 if (!(evt & FLAG_EVENT))
2098                         break;
2099         default:
2100                 if (evt & EVENT_RX) {
2101                         if ((!PD_HEADER_CNT(chip->rec_head)) &&
2102                             (PD_HEADER_TYPE(chip->rec_head) == CMT_ACCEPT))
2103                                 set_state(chip, policy_snk_wait_caps);
2104                 } else if (evt & EVENT_TIMER_STATE) {
2105                         set_state(chip, policy_snk_send_hardrst);
2106                 }
2107                 break;
2108         }
2109 }
2110
2111 static void state_machine_typec(struct fusb30x_chip *chip)
2112 {
2113         int evt = 0;
2114         int cc1, cc2;
2115
2116         tcpc_alert(chip, &evt);
2117         mux_alert(chip, &evt);
2118         if (!evt)
2119                 goto BACK;
2120
2121         if (chip->notify.is_cc_connected) {
2122                 if (evt & EVENT_CC) {
2123                         if ((chip->cc_state & 0x04) &&
2124                             (chip->conn_state !=
2125                              policy_snk_transition_default)) {
2126                                 if (!tcpm_check_vbus(chip))
2127                                         set_state_unattached(chip);
2128                         } else if (chip->conn_state !=
2129                                    policy_src_transition_default) {
2130                                 tcpm_get_cc(chip, &cc1, &cc2);
2131                                 if (!(chip->cc_state & 0x01))
2132                                         cc1 = cc2;
2133                                 if (cc1 == TYPEC_CC_VOLT_OPEN)
2134                                         set_state_unattached(chip);
2135                         }
2136                 }
2137         }
2138
2139         if (evt & EVENT_RX) {
2140                 tcpm_get_message(chip);
2141                 if ((!PD_HEADER_CNT(chip->rec_head)) &&
2142                     (PD_HEADER_TYPE(chip->rec_head) == CMT_SOFTRESET)) {
2143                         if (chip->notify.power_role)
2144                                 set_state(chip, policy_src_send_softrst);
2145                         else
2146                                 set_state(chip, policy_snk_send_softrst);
2147                 }
2148         }
2149
2150         if (evt & EVENT_TX) {
2151                 if (chip->tx_state == tx_success)
2152                         chip->msg_id++;
2153         }
2154         switch (chip->conn_state) {
2155         case disabled:
2156                 fusb_state_disabled(chip, evt);
2157                 break;
2158         case error_recovery:
2159                 set_state_unattached(chip);
2160                 break;
2161         case unattached:
2162                 fusb_state_unattached(chip, evt);
2163                 break;
2164         case attach_wait_sink:
2165                 fusb_state_attach_wait_sink(chip, evt);
2166                 break;
2167         case attach_wait_source:
2168                 fusb_state_attach_wait_source(chip, evt);
2169                 break;
2170         case attached_source:
2171                 fusb_state_attached_source(chip, evt);
2172                 break;
2173         case attached_sink:
2174                 fusb_state_attached_sink(chip, evt);
2175                 break;
2176
2177         /* POWER DELIVERY */
2178         case policy_src_startup:
2179                 fusb_state_src_startup(chip, evt);
2180                 break;
2181         case policy_src_discovery:
2182                 fusb_state_src_discovery(chip, evt);
2183                 break;
2184         case policy_src_send_caps:
2185                 fusb_state_src_send_caps(chip, evt);
2186                 if (chip->conn_state != policy_src_negotiate_cap)
2187                         break;
2188         case policy_src_negotiate_cap:
2189                 fusb_state_src_negotiate_cap(chip, evt);
2190
2191         case policy_src_transition_supply:
2192                 fusb_state_src_transition_supply(chip, evt);
2193                 break;
2194         case policy_src_cap_response:
2195                 fusb_state_src_cap_response(chip, evt);
2196                 break;
2197         case policy_src_transition_default:
2198                 fusb_state_src_transition_default(chip, evt);
2199                 break;
2200         case policy_src_ready:
2201                 fusb_state_src_ready(chip, evt);
2202                 break;
2203         case policy_src_get_sink_caps:
2204                 fusb_state_src_get_sink_cap(chip, evt);
2205                 break;
2206         case policy_src_send_hardrst:
2207                 fusb_state_src_send_hardreset(chip, evt);
2208                 break;
2209         case policy_src_send_softrst:
2210                 fusb_state_src_send_softreset(chip, evt);
2211                 break;
2212
2213         /* UFP */
2214         case policy_snk_startup:
2215                 fusb_state_snk_startup(chip, evt);
2216                 break;
2217         case policy_snk_discovery:
2218                 fusb_state_snk_discovery(chip, evt);
2219                 break;
2220         case policy_snk_wait_caps:
2221                 fusb_state_snk_wait_caps(chip, evt);
2222                 break;
2223         case policy_snk_evaluate_caps:
2224                 fusb_state_snk_evaluate_caps(chip, evt);
2225                 /* without break */
2226         case policy_snk_select_cap:
2227                 fusb_state_snk_select_cap(chip, evt);
2228                 break;
2229         case policy_snk_transition_sink:
2230                 fusb_state_snk_transition_sink(chip, evt);
2231                 break;
2232         case policy_snk_transition_default:
2233                 fusb_state_snk_transition_default(chip, evt);
2234                 break;
2235         case policy_snk_ready:
2236                 fusb_state_snk_ready(chip, evt);
2237                 break;
2238         case policy_snk_send_hardrst:
2239                 fusb_state_snk_send_hardreset(chip, evt);
2240                 break;
2241         case policy_snk_send_softrst:
2242                 fusb_state_snk_send_softreset(chip, evt);
2243                 break;
2244
2245         default:
2246                 break;
2247         }
2248
2249 BACK:
2250         if (chip->work_continue) {
2251                 queue_work(chip->fusb30x_wq, &chip->work);
2252                 return;
2253         }
2254
2255         if (!platform_get_device_irq_state(chip))
2256                 fusb_irq_enable(chip);
2257         else
2258                 queue_work(chip->fusb30x_wq, &chip->work);
2259 }
2260
2261 static irqreturn_t cc_interrupt_handler(int irq, void *dev_id)
2262 {
2263         struct fusb30x_chip *chip = dev_id;
2264
2265         queue_work(chip->fusb30x_wq, &chip->work);
2266         fusb_irq_disable(chip);
2267         return IRQ_HANDLED;
2268 }
2269
2270 static int fusb_initialize_gpio(struct fusb30x_chip *chip)
2271 {
2272         chip->gpio_int = devm_gpiod_get_optional(chip->dev, "int-n", GPIOD_IN);
2273         if (IS_ERR(chip->gpio_int))
2274                 return PTR_ERR(chip->gpio_int);
2275
2276         /* some board support vbus with other ways */
2277         chip->gpio_vbus_5v = devm_gpiod_get_optional(chip->dev, "vbus-5v",
2278                                                      GPIOD_OUT_LOW);
2279         if (IS_ERR(chip->gpio_vbus_5v))
2280                 dev_warn(chip->dev,
2281                          "Could not get named GPIO for VBus5V!\n");
2282         else
2283                 gpiod_set_raw_value(chip->gpio_vbus_5v, 0);
2284
2285         chip->gpio_vbus_other = devm_gpiod_get_optional(chip->dev,
2286                                                         "vbus-other",
2287                                                         GPIOD_OUT_LOW);
2288         if (IS_ERR(chip->gpio_vbus_other))
2289                 dev_warn(chip->dev,
2290                          "Could not get named GPIO for VBusOther!\n");
2291         else
2292                 gpiod_set_raw_value(chip->gpio_vbus_other, 0);
2293
2294         chip->gpio_discharge = devm_gpiod_get_optional(chip->dev, "discharge",
2295                                                        GPIOD_OUT_LOW);
2296         if (IS_ERR(chip->gpio_discharge)) {
2297                 dev_warn(chip->dev,
2298                          "Could not get named GPIO for discharge!\n");
2299                 chip->gpio_discharge = NULL;
2300         }
2301
2302         return 0;
2303 }
2304
2305 static enum hrtimer_restart fusb_timer_handler(struct hrtimer *timer)
2306 {
2307         int i;
2308
2309         for (i = 0; i < fusb30x_port_used; i++) {
2310                 if (timer == &fusb30x_port_info[i]->timer_state_machine) {
2311                         if (fusb30x_port_info[i]->timer_state != T_DISABLED)
2312                                 fusb30x_port_info[i]->timer_state = 0;
2313                         break;
2314                 }
2315
2316                 if (timer == &fusb30x_port_info[i]->timer_mux_machine) {
2317                         if (fusb30x_port_info[i]->timer_mux != T_DISABLED)
2318                                 fusb30x_port_info[i]->timer_mux = 0;
2319                         break;
2320                 }
2321         }
2322
2323         if (i != fusb30x_port_used)
2324                 queue_work(fusb30x_port_info[i]->fusb30x_wq,
2325                            &fusb30x_port_info[i]->work);
2326
2327         return HRTIMER_NORESTART;
2328 }
2329
2330 static void fusb_initialize_timer(struct fusb30x_chip *chip)
2331 {
2332         hrtimer_init(&chip->timer_state_machine, CLOCK_MONOTONIC,
2333                      HRTIMER_MODE_REL);
2334         chip->timer_state_machine.function = fusb_timer_handler;
2335
2336         hrtimer_init(&chip->timer_mux_machine, CLOCK_MONOTONIC,
2337                      HRTIMER_MODE_REL);
2338         chip->timer_mux_machine.function = fusb_timer_handler;
2339
2340         chip->timer_state = T_DISABLED;
2341         chip->timer_mux = T_DISABLED;
2342 }
2343
2344 static void fusb302_work_func(struct work_struct *work)
2345 {
2346         struct fusb30x_chip *chip;
2347
2348         chip = container_of(work, struct fusb30x_chip, work);
2349         state_machine_typec(chip);
2350 }
2351
2352 static int fusb30x_probe(struct i2c_client *client,
2353                          const struct i2c_device_id *id)
2354 {
2355         struct fusb30x_chip *chip;
2356         struct PD_CAP_INFO *pd_cap_info;
2357         int ret;
2358
2359         chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
2360         if (!chip)
2361                 return -ENOMEM;
2362
2363         if (fusb30x_port_used == 0xff)
2364                 return -1;
2365
2366         chip->port_num = fusb30x_port_used++;
2367         fusb30x_port_info[chip->port_num] = chip;
2368
2369         chip->dev = &client->dev;
2370         chip->regmap = devm_regmap_init_i2c(client, &fusb302_regmap_config);
2371         if (IS_ERR(chip->regmap)) {
2372                 dev_err(&client->dev, "Failed to allocate regmap!\n");
2373                 return PTR_ERR(chip->regmap);
2374         }
2375
2376         ret = fusb_initialize_gpio(chip);
2377         if (ret)
2378                 return ret;
2379
2380         fusb_initialize_timer(chip);
2381
2382         chip->fusb30x_wq = create_workqueue("fusb302_wq");
2383         INIT_WORK(&chip->work, fusb302_work_func);
2384
2385         tcpm_init(chip);
2386         tcpm_set_rx_enable(chip, 0);
2387         chip->conn_state = unattached;
2388         tcpm_set_cc(chip, FUSB_MODE_DRP);
2389
2390         chip->n_caps_used = 1;
2391         chip->source_power_supply[0] = 0x64;
2392         chip->source_max_current[0] = 0x96;
2393
2394         /*
2395          * these two variable should be 1 if support DRP,
2396          * but now we do not support swap,
2397          * it will be blanked in future
2398          */
2399         pd_cap_info = &chip->pd_cap_info;
2400         pd_cap_info->dual_role_power = 0;
2401         pd_cap_info->data_role_swap = 0;
2402
2403         pd_cap_info->externally_powered = 1;
2404         pd_cap_info->usb_suspend_support = 0;
2405         pd_cap_info->usb_communications_cap = 0;
2406         pd_cap_info->supply_type = 0;
2407         pd_cap_info->peak_current = 0;
2408
2409         chip->extcon = devm_extcon_dev_allocate(&client->dev, fusb302_cable);
2410         if (IS_ERR(chip->extcon)) {
2411                 dev_err(&client->dev, "allocat extcon failed\n");
2412                 return PTR_ERR(chip->extcon);
2413         }
2414
2415         ret = devm_extcon_dev_register(&client->dev, chip->extcon);
2416         if (ret) {
2417                 dev_err(&client->dev, "failed to register extcon: %d\n",
2418                         ret);
2419                 return ret;
2420         }
2421
2422         ret = extcon_set_property_capability(chip->extcon, EXTCON_USB,
2423                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2424         if (ret) {
2425                 dev_err(&client->dev,
2426                         "failed to set USB property capability: %d\n",
2427                         ret);
2428                 return ret;
2429         }
2430
2431         ret = extcon_set_property_capability(chip->extcon, EXTCON_USB_HOST,
2432                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2433         if (ret) {
2434                 dev_err(&client->dev,
2435                         "failed to set USB_HOST property capability: %d\n",
2436                         ret);
2437                 return ret;
2438         }
2439
2440         ret = extcon_set_property_capability(chip->extcon, EXTCON_DISP_DP,
2441                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2442         if (ret) {
2443                 dev_err(&client->dev,
2444                         "failed to set DISP_DP property capability: %d\n",
2445                         ret);
2446                 return ret;
2447         }
2448
2449         ret = extcon_set_property_capability(chip->extcon, EXTCON_USB,
2450                                              EXTCON_PROP_USB_SS);
2451         if (ret) {
2452                 dev_err(&client->dev,
2453                         "failed to set USB USB_SS property capability: %d\n",
2454                         ret);
2455                 return ret;
2456         }
2457
2458         ret = extcon_set_property_capability(chip->extcon, EXTCON_USB_HOST,
2459                                              EXTCON_PROP_USB_SS);
2460         if (ret) {
2461                 dev_err(&client->dev,
2462                         "failed to set USB_HOST USB_SS property capability: %d\n",
2463                         ret);
2464                 return ret;
2465         }
2466
2467         ret = extcon_set_property_capability(chip->extcon, EXTCON_DISP_DP,
2468                                              EXTCON_PROP_USB_SS);
2469         if (ret) {
2470                 dev_err(&client->dev,
2471                         "failed to set DISP_DP USB_SS property capability: %d\n",
2472                         ret);
2473                 return ret;
2474         }
2475
2476         ret = extcon_set_property_capability(chip->extcon, EXTCON_CHG_USB_FAST,
2477                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2478         if (ret) {
2479                 dev_err(&client->dev,
2480                         "failed to set USB_PD property capability: %d\n", ret);
2481                 return ret;
2482         }
2483
2484         i2c_set_clientdata(client, chip);
2485
2486         spin_lock_init(&chip->irq_lock);
2487         chip->enable_irq = 1;
2488
2489         chip->gpio_int_irq = gpiod_to_irq(chip->gpio_int);
2490         if (chip->gpio_int_irq < 0) {
2491                 dev_err(&client->dev,
2492                         "Unable to request IRQ for INT_N GPIO! %d\n",
2493                         ret);
2494                 ret = chip->gpio_int_irq;
2495                 goto IRQ_ERR;
2496         }
2497
2498         ret = devm_request_threaded_irq(&client->dev,
2499                                         chip->gpio_int_irq,
2500                                         NULL,
2501                                         cc_interrupt_handler,
2502                                         IRQF_ONESHOT | IRQF_TRIGGER_LOW,
2503                                         client->name,
2504                                         chip);
2505         if (ret) {
2506                 dev_err(&client->dev, "irq request failed\n");
2507                 goto IRQ_ERR;
2508         }
2509
2510         dev_info(chip->dev, "port %d probe success\n", chip->port_num);
2511
2512         return 0;
2513
2514 IRQ_ERR:
2515         destroy_workqueue(chip->fusb30x_wq);
2516         return ret;
2517 }
2518
2519 static int fusb30x_remove(struct i2c_client *client)
2520 {
2521         struct fusb30x_chip *chip = i2c_get_clientdata(client);
2522
2523         destroy_workqueue(chip->fusb30x_wq);
2524         return 0;
2525 }
2526
2527 static void fusb30x_shutdown(struct i2c_client *client)
2528 {
2529         struct fusb30x_chip *chip = i2c_get_clientdata(client);
2530
2531         if (chip->gpio_vbus_5v)
2532                 gpiod_set_value(chip->gpio_vbus_5v, 0);
2533         if (chip->gpio_discharge) {
2534                 gpiod_set_value(chip->gpio_discharge, 1);
2535                 msleep(100);
2536                 gpiod_set_value(chip->gpio_discharge, 0);
2537         }
2538 }
2539
2540 static const struct of_device_id fusb30x_dt_match[] = {
2541         { .compatible = FUSB30X_I2C_DEVICETREE_NAME },
2542         {},
2543 };
2544 MODULE_DEVICE_TABLE(of, fusb30x_dt_match);
2545
2546 static const struct i2c_device_id fusb30x_i2c_device_id[] = {
2547         { FUSB30X_I2C_DRIVER_NAME, 0 },
2548         {}
2549 };
2550 MODULE_DEVICE_TABLE(i2c, fusb30x_i2c_device_id);
2551
2552 static struct i2c_driver fusb30x_driver = {
2553         .driver = {
2554                 .name = FUSB30X_I2C_DRIVER_NAME,
2555                 .of_match_table = of_match_ptr(fusb30x_dt_match),
2556         },
2557         .probe = fusb30x_probe,
2558         .remove = fusb30x_remove,
2559         .shutdown = fusb30x_shutdown,
2560         .id_table = fusb30x_i2c_device_id,
2561 };
2562
2563 module_i2c_driver(fusb30x_driver);
2564
2565 MODULE_LICENSE("GPL");
2566 MODULE_AUTHOR("zain wang <zain.wang@rock-chips.com>");
2567 MODULE_DESCRIPTION("fusb302 typec pd driver");