drivers/mfd/fusb302.c

   1 /*
   2  * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd
   3  * Author: Zain Wang <zain.wang@rock-chips.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * Some ideas are from chrome ec and fairchild GPL fusb302 driver.
  10  */
  11
  12 #include <linux/delay.h>
  13 #include <linux/extcon.h>
  14 #include <linux/gpio.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/module.h>
  17 #include <linux/of_gpio.h>
  18 #include <linux/regmap.h>
  19 #include <linux/power_supply.h>
  20
  21 #include "fusb302.h"
  22
  23 #define FUSB302_MAX_REG         (FUSB_REG_FIFO + 50)
  24 #define FUSB_MS_TO_NS(x)        ((s64)x * 1000 * 1000)
  25
  26 #define FUSB_MODE_DRP           0
  27 #define FUSB_MODE_UFP           1
  28 #define FUSB_MODE_DFP           2
  29 #define FUSB_MODE_ASS           3
  30
  31 #define TYPEC_CC_VOLT_OPEN      0
  32 #define TYPEC_CC_VOLT_RA        1
  33 #define TYPEC_CC_VOLT_RD        2
  34 #define TYPEC_CC_VOLT_RP        3
  35
  36 #define EVENT_CC                BIT(0)
  37 #define EVENT_RX                BIT(1)
  38 #define EVENT_TX                BIT(2)
  39 #define EVENT_REC_RESET         BIT(3)
  40 #define EVENT_WORK_CONTINUE     BIT(5)
  41 #define EVENT_TIMER_MUX         BIT(6)
  42 #define EVENT_TIMER_STATE       BIT(7)
  43 #define FLAG_EVENT              (EVENT_RX | EVENT_TIMER_MUX | \
  44                                  EVENT_TIMER_STATE)
  45
  46 #define PIN_MAP_A               BIT(0)
  47 #define PIN_MAP_B               BIT(1)
  48 #define PIN_MAP_C               BIT(2)
  49 #define PIN_MAP_D               BIT(3)
  50 #define PIN_MAP_E               BIT(4)
  51 #define PIN_MAP_F               BIT(5)
  52
  53 static u8 fusb30x_port_used;
  54 static struct fusb30x_chip *fusb30x_port_info[256];
  55
  56 static bool is_write_reg(struct device *dev, unsigned int reg)
  57 {
  58         if (reg >= FUSB_REG_FIFO)
  59                 return true;
  60         else
  61                 return ((reg < (FUSB_REG_CONTROL4 + 1)) && (reg > 0x01)) ?
  62                         true : false;
  63 }
  64
  65 static bool is_volatile_reg(struct device *dev, unsigned int reg)
  66 {
  67         if (reg > FUSB_REG_CONTROL4)
  68                 return true;
  69
  70         switch (reg) {
  71         case FUSB_REG_CONTROL0:
  72         case FUSB_REG_CONTROL1:
  73         case FUSB_REG_CONTROL3:
  74         case FUSB_REG_RESET:
  75                 return true;
  76         }
  77         return false;
  78 }
  79
  80 struct regmap_config fusb302_regmap_config = {
  81         .reg_bits = 8,
  82         .val_bits = 8,
  83         .writeable_reg = is_write_reg,
  84         .volatile_reg = is_volatile_reg,
  85         .max_register = FUSB302_MAX_REG,
  86         .cache_type = REGCACHE_RBTREE,
  87 };
  88
  89 static void dump_notify_info(struct fusb30x_chip *chip)
  90 {
  91         dev_dbg(chip->dev, "port        %d\n", chip->port_num);
  92         dev_dbg(chip->dev, "orientation %d\n", chip->notify.orientation);
  93         dev_dbg(chip->dev, "power_role  %d\n", chip->notify.power_role);
  94         dev_dbg(chip->dev, "data_role   %d\n", chip->notify.data_role);
  95         dev_dbg(chip->dev, "cc          %d\n", chip->notify.is_cc_connected);
  96         dev_dbg(chip->dev, "pd          %d\n", chip->notify.is_pd_connected);
  97         dev_dbg(chip->dev, "enter_mode  %d\n", chip->notify.is_enter_mode);
  98         dev_dbg(chip->dev, "pin support %d\n",
  99                 chip->notify.pin_assignment_support);
 100         dev_dbg(chip->dev, "pin def     %d\n", chip->notify.pin_assignment_def);
 101         dev_dbg(chip->dev, "attention   %d\n", chip->notify.attention);
 102 }
 103
 104 static const unsigned int fusb302_cable[] = {
 105         EXTCON_USB,
 106         EXTCON_USB_HOST,
 107         EXTCON_USB_VBUS_EN,
 108         EXTCON_CHG_USB_SDP,
 109         EXTCON_CHG_USB_CDP,
 110         EXTCON_CHG_USB_DCP,
 111         EXTCON_CHG_USB_SLOW,
 112         EXTCON_CHG_USB_FAST,
 113         EXTCON_DISP_DP,
 114         EXTCON_NONE,
 115 };
 116
 117 static void fusb_set_pos_power(struct fusb30x_chip *chip, int max_vol,
 118                                int max_cur)
 119 {
 120         int i;
 121         int pos_find;
 122         int tmp;
 123
 124         pos_find = 0;
 125         for (i = PD_HEADER_CNT(chip->rec_head) - 1; i >= 0; i--) {
 126                 switch (CAP_POWER_TYPE(chip->rec_load[i])) {
 127                 case 0:
 128                         /* Fixed Supply */
 129                         if ((CAP_FPDO_VOLTAGE(chip->rec_load[i]) * 50) <=
 130                             max_vol &&
 131                             (CAP_FPDO_CURRENT(chip->rec_load[i]) * 10) <=
 132                             max_cur) {
 133                                 chip->pos_power = i + 1;
 134                                 tmp = CAP_FPDO_VOLTAGE(chip->rec_load[i]);
 135                                 chip->pd_output_vol = tmp * 50;
 136                                 tmp = CAP_FPDO_CURRENT(chip->rec_load[i]);
 137                                 chip->pd_output_cur = tmp * 10;
 138                                 pos_find = 1;
 139                         }
 140                         break;
 141                 case 1:
 142                         /* Battery */
 143                         if ((CAP_VPDO_VOLTAGE(chip->rec_load[i]) * 50) <=
 144                             max_vol &&
 145                             (CAP_VPDO_CURRENT(chip->rec_load[i]) * 10) <=
 146                             max_cur) {
 147                                 chip->pos_power = i + 1;
 148                                 tmp = CAP_VPDO_VOLTAGE(chip->rec_load[i]);
 149                                 chip->pd_output_vol = tmp * 50;
 150                                 tmp = CAP_VPDO_CURRENT(chip->rec_load[i]);
 151                                 chip->pd_output_cur = tmp * 10;
 152                                 pos_find = 1;
 153                         }
 154                         break;
 155                 default:
 156                         /* not meet battery caps */
 157                         break;
 158                 }
 159                 if (pos_find)
 160                         break;
 161         }
 162 }
 163
 164 static int fusb302_set_pos_power_by_charge_ic(struct fusb30x_chip *chip)
 165 {
 166         struct power_supply *psy = NULL;
 167         union power_supply_propval val;
 168         enum power_supply_property psp;
 169         int max_vol, max_cur;
 170
 171         max_vol = 0;
 172         max_cur = 0;
 173         psy = power_supply_get_by_phandle(chip->dev->of_node, "charge-dev");
 174         if (!psy || IS_ERR(psy))
 175                 return -1;
 176
 177         psp = POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT_MAX;
 178         if (power_supply_get_property(psy, psp, &val) == 0)
 179                 max_vol = val.intval / 1000;
 180
 181         psp = POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT;
 182         if (power_supply_get_property(psy, psp, &val) == 0)
 183                 max_cur = val.intval / 1000;
 184
 185         if (max_vol > 0 && max_cur > 0)
 186                 fusb_set_pos_power(chip, max_vol, max_cur);
 187
 188         return 0;
 189 }
 190
 191 void fusb_irq_disable(struct fusb30x_chip *chip)
 192 {
 193         unsigned long irqflags = 0;
 194
 195         spin_lock_irqsave(&chip->irq_lock, irqflags);
 196         if (chip->enable_irq) {
 197                 disable_irq_nosync(chip->gpio_int_irq);
 198                 chip->enable_irq = 0;
 199         } else {
 200                 dev_warn(chip->dev, "irq have already disabled\n");
 201         }
 202         spin_unlock_irqrestore(&chip->irq_lock, irqflags);
 203 }
 204
 205 void fusb_irq_enable(struct fusb30x_chip *chip)
 206 {
 207         unsigned long irqflags = 0;
 208
 209         spin_lock_irqsave(&chip->irq_lock, irqflags);
 210         if (!chip->enable_irq) {
 211                 enable_irq(chip->gpio_int_irq);
 212                 chip->enable_irq = 1;
 213         }
 214         spin_unlock_irqrestore(&chip->irq_lock, irqflags);
 215 }
 216
 217 static void platform_fusb_notify(struct fusb30x_chip *chip)
 218 {
 219         bool plugged = 0, flip = 0, dfp = 0, ufp = 0, dp = 0, usb_ss = 0;
 220         union extcon_property_value property;
 221
 222         if (chip->notify.is_cc_connected)
 223                 chip->notify.orientation = chip->cc_polarity + 1;
 224
 225         /* avoid notify repeated */
 226         if (memcmp(&chip->notify, &chip->notify_cmp,
 227                    sizeof(struct notify_info))) {
 228                 dump_notify_info(chip);
 229                 chip->notify.attention = 0;
 230                 memcpy(&chip->notify_cmp, &chip->notify,
 231                        sizeof(struct notify_info));
 232
 233                 plugged = chip->notify.is_cc_connected ||
 234                           chip->notify.is_pd_connected;
 235                 flip = chip->notify.orientation ?
 236                        (chip->notify.orientation - 1) : 0;
 237                 dp = chip->notify.is_enter_mode;
 238
 239                 if (dp) {
 240                         dfp = 1;
 241                         usb_ss = (chip->notify.pin_assignment_def &
 242                                 (PIN_MAP_B | PIN_MAP_D | PIN_MAP_F)) ? 1 : 0;
 243                 } else if (chip->notify.data_role) {
 244                         dfp = 1;
 245                         usb_ss = 1;
 246                 } else if (plugged) {
 247                         ufp = 1;
 248                         usb_ss = 1;
 249                 }
 250
 251                 property.intval = flip;
 252                 extcon_set_property(chip->extcon, EXTCON_USB,
 253                                     EXTCON_PROP_USB_TYPEC_POLARITY, property);
 254                 extcon_set_property(chip->extcon, EXTCON_USB_HOST,
 255                                     EXTCON_PROP_USB_TYPEC_POLARITY, property);
 256                 extcon_set_property(chip->extcon, EXTCON_DISP_DP,
 257                                     EXTCON_PROP_USB_TYPEC_POLARITY, property);
 258
 259                 property.intval = usb_ss;
 260                 extcon_set_property(chip->extcon, EXTCON_USB,
 261                                     EXTCON_PROP_USB_SS, property);
 262                 extcon_set_property(chip->extcon, EXTCON_USB_HOST,
 263                                     EXTCON_PROP_USB_SS, property);
 264                 extcon_set_property(chip->extcon, EXTCON_DISP_DP,
 265                                     EXTCON_PROP_USB_SS, property);
 266                 extcon_set_state(chip->extcon, EXTCON_USB, ufp);
 267                 extcon_set_state(chip->extcon, EXTCON_USB_HOST, dfp);
 268                 extcon_set_state(chip->extcon, EXTCON_DISP_DP, dp);
 269                 extcon_sync(chip->extcon, EXTCON_USB);
 270                 extcon_sync(chip->extcon, EXTCON_USB_HOST);
 271                 extcon_sync(chip->extcon, EXTCON_DISP_DP);
 272                 if (chip->notify.power_role == 0 &&
 273                     chip->notify.is_pd_connected &&
 274                     chip->pd_output_vol > 0 && chip->pd_output_cur > 0) {
 275                         extcon_set_state(chip->extcon, EXTCON_CHG_USB_FAST, true);
 276                         property.intval =
 277                                 (chip->pd_output_cur << 15 |
 278                                  chip->pd_output_vol);
 279                         extcon_set_property(chip->extcon, EXTCON_CHG_USB_FAST,
 280                                             EXTCON_PROP_USB_TYPEC_POLARITY,
 281                                             property);
 282                         extcon_sync(chip->extcon, EXTCON_CHG_USB_FAST);
 283                 }
 284         }
 285 }
 286
 287 static bool platform_get_device_irq_state(struct fusb30x_chip *chip)
 288 {
 289         return !gpiod_get_value(chip->gpio_int);
 290 }
 291
 292 static void fusb_timer_start(struct hrtimer *timer, int ms)
 293 {
 294         ktime_t ktime;
 295
 296         ktime = ktime_set(0, FUSB_MS_TO_NS(ms));
 297         hrtimer_start(timer, ktime, HRTIMER_MODE_REL);
 298 }
 299
 300 static void platform_set_vbus_lvl_enable(struct fusb30x_chip *chip, int vbus_5v,
 301                                          int vbus_other)
 302 {
 303         bool gpio_vbus_value = 0;
 304
 305         gpio_vbus_value = gpiod_get_value(chip->gpio_vbus_5v);
 306         if (chip->gpio_vbus_5v) {
 307                 gpiod_set_raw_value(chip->gpio_vbus_5v, vbus_5v);
 308                 /* Only set state here, don't sync notifier to PMIC */
 309                 extcon_set_state(chip->extcon, EXTCON_USB_VBUS_EN, vbus_5v);
 310         } else {
 311                 extcon_set_state(chip->extcon, EXTCON_USB_VBUS_EN, vbus_5v);
 312                 extcon_sync(chip->extcon, EXTCON_USB_VBUS_EN);
 313                 dev_info(chip->dev, "fusb302 send extcon to %s vbus 5v\n", vbus_5v ? "enable" : "disable");
 314         }
 315
 316         if (chip->gpio_vbus_other)
 317                 gpiod_set_raw_value(chip->gpio_vbus_5v, vbus_other);
 318
 319         if (chip->gpio_discharge && !vbus_5v && gpio_vbus_value) {
 320                 gpiod_set_value(chip->gpio_discharge, 1);
 321                 msleep(20);
 322                 gpiod_set_value(chip->gpio_discharge, 0);
 323         }
 324 }
 325
 326 static void set_state(struct fusb30x_chip *chip, enum connection_state state)
 327 {
 328         dev_dbg(chip->dev, "port %d, state %d\n", chip->port_num, state);
 329         if (!state)
 330                 dev_info(chip->dev, "PD disabled\n");
 331         chip->conn_state = state;
 332         chip->sub_state = 0;
 333         chip->val_tmp = 0;
 334         chip->work_continue = 1;
 335 }
 336
 337 static int tcpm_get_message(struct fusb30x_chip *chip)
 338 {
 339         u8 buf[32];
 340         int len;
 341
 342         regmap_raw_read(chip->regmap, FUSB_REG_FIFO, buf, 3);
 343         chip->rec_head = (buf[1] & 0xff) | ((buf[2] << 8) & 0xff00);
 344
 345         len = PD_HEADER_CNT(chip->rec_head) << 2;
 346         regmap_raw_read(chip->regmap, FUSB_REG_FIFO, buf, len + 4);
 347
 348         memcpy(chip->rec_load, buf, len);
 349
 350         return 0;
 351 }
 352
 353 static void fusb302_flush_rx_fifo(struct fusb30x_chip *chip)
 354 {
 355         tcpm_get_message(chip);
 356 }
 357
 358 static int tcpm_get_cc(struct fusb30x_chip *chip, int *CC1, int *CC2)
 359 {
 360         u32 val;
 361         int *CC_MEASURE;
 362         u32 store;
 363
 364         *CC1 = TYPEC_CC_VOLT_OPEN;
 365         *CC2 = TYPEC_CC_VOLT_OPEN;
 366
 367         if (chip->cc_state & 0x01)
 368                 CC_MEASURE = CC1;
 369         else
 370                 CC_MEASURE = CC2;
 371
 372         if (chip->cc_state & 0x04) {
 373                 regmap_read(chip->regmap, FUSB_REG_SWITCHES0, &store);
 374                 /* measure cc1 first */
 375                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 376                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
 377                                    SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 378                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
 379                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2 |
 380                                    SWITCHES0_MEAS_CC1);
 381                 usleep_range(250, 300);
 382
 383                 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 384                 val &= STATUS0_BC_LVL;
 385                 if (val)
 386                         *CC1 = val;
 387
 388                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 389                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
 390                                    SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 391                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
 392                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2 |
 393                                    SWITCHES0_MEAS_CC2);
 394                 usleep_range(250, 300);
 395
 396                 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 397                 val &= STATUS0_BC_LVL;
 398                 if (val)
 399                         *CC2 = val;
 400                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 401                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 402                                    store);
 403         } else {
 404                 regmap_read(chip->regmap, FUSB_REG_SWITCHES0, &store);
 405                 val = store;
 406                 val &= ~(SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
 407                                 SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2);
 408                 if (chip->cc_state & 0x01) {
 409                         val |= SWITCHES0_MEAS_CC1 | SWITCHES0_PU_EN1;
 410                 } else {
 411                         val |= SWITCHES0_MEAS_CC2 | SWITCHES0_PU_EN2;
 412                 }
 413                 regmap_write(chip->regmap, FUSB_REG_SWITCHES0, val);
 414
 415                 regmap_write(chip->regmap, FUSB_REG_MEASURE, chip->cc_meas_high);
 416                 usleep_range(250, 300);
 417
 418                 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 419                 if (val & STATUS0_COMP) {
 420                         int retry = 3;
 421                         int comp_times = 0;
 422
 423                         while (retry--) {
 424                                 regmap_write(chip->regmap, FUSB_REG_MEASURE, chip->cc_meas_high);
 425                                 usleep_range(250, 300);
 426                                 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 427                                 if (val & STATUS0_COMP) {
 428                                         comp_times++;
 429                                         if (comp_times == 3) {
 430                                                 *CC_MEASURE = TYPEC_CC_VOLT_OPEN;
 431                                                 regmap_write(chip->regmap, FUSB_REG_SWITCHES0, store);
 432                                         }
 433                                 }
 434                         }
 435                 } else {
 436                         regmap_write(chip->regmap, FUSB_REG_MEASURE, chip->cc_meas_low);
 437                         regmap_read(chip->regmap, FUSB_REG_MEASURE, &val);
 438                         usleep_range(250, 300);
 439
 440                         regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 441
 442                         if (val & STATUS0_COMP)
 443                                 *CC_MEASURE = TYPEC_CC_VOLT_RD;
 444                         else
 445                                 *CC_MEASURE = TYPEC_CC_VOLT_RA;
 446                         regmap_write(chip->regmap, FUSB_REG_SWITCHES0, store);
 447                 }
 448         }
 449
 450         return 0;
 451 }
 452
 453 static int tcpm_set_cc(struct fusb30x_chip *chip, int mode)
 454 {
 455         u8 val = 0, mask;
 456
 457         val &= ~(SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 458                  SWITCHES0_PDWN1 | SWITCHES0_PDWN2);
 459
 460         mask = ~val;
 461
 462         switch (mode) {
 463         case FUSB_MODE_DFP:
 464                 if (chip->togdone_pullup)
 465                         val |= SWITCHES0_PU_EN2;
 466                 else
 467                         val |= SWITCHES0_PU_EN1;
 468                 break;
 469         case FUSB_MODE_UFP:
 470                 val |= SWITCHES0_PDWN1 | SWITCHES0_PDWN2;
 471                 break;
 472         case FUSB_MODE_DRP:
 473                 val |= SWITCHES0_PDWN1 | SWITCHES0_PDWN2;
 474                 break;
 475         case FUSB_MODE_ASS:
 476                 break;
 477         }
 478
 479         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0, mask, val);
 480         return 0;
 481 }
 482
 483 static int tcpm_set_rx_enable(struct fusb30x_chip *chip, int enable)
 484 {
 485         u8 val = 0;
 486
 487         if (enable) {
 488                 if (chip->cc_polarity)
 489                         val |= SWITCHES0_MEAS_CC2;
 490                 else
 491                         val |= SWITCHES0_MEAS_CC1;
 492                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 493                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 494                                    val);
 495                 fusb302_flush_rx_fifo(chip);
 496                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 497                                    SWITCHES1_AUTO_CRC, SWITCHES1_AUTO_CRC);
 498         } else {
 499                 /*
 500                  * bit of a hack here.
 501                  * when this function is called to disable rx (enable=0)
 502                  * using it as an indication of detach (gulp!)
 503                  * to reset our knowledge of where
 504                  * the toggle state machine landed.
 505                  */
 506                 chip->togdone_pullup = 0;
 507
 508 #ifdef  FUSB_HAVE_DRP
 509                 tcpm_set_cc(chip, FUSB_MODE_DRP);
 510                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 511                                    CONTROL2_TOG_RD_ONLY,
 512                                    CONTROL2_TOG_RD_ONLY);
 513 #endif
 514                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 515                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 516                                    0);
 517                 regmap_update_bits(chip->regmap,
 518                                    FUSB_REG_SWITCHES1, SWITCHES1_AUTO_CRC, 0);
 519         }
 520
 521         return 0;
 522 }
 523
 524 static int tcpm_set_msg_header(struct fusb30x_chip *chip)
 525 {
 526         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 527                            SWITCHES1_POWERROLE | SWITCHES1_DATAROLE,
 528                            (chip->notify.power_role << 7) |
 529                            (chip->notify.data_role << 4));
 530         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 531                            SWITCHES1_SPECREV, 2 << 5);
 532         return 0;
 533 }
 534
 535 static int tcpm_set_polarity(struct fusb30x_chip *chip, bool polarity)
 536 {
 537         u8 val = 0;
 538
 539 #ifdef FUSB_VCONN_SUPPORT
 540         if (chip->vconn_enabled) {
 541                 if (polarity)
 542                         val |= SWITCHES0_VCONN_CC1;
 543                 else
 544                         val |= SWITCHES0_VCONN_CC2;
 545         }
 546 #endif
 547
 548         if (polarity)
 549                 val |= SWITCHES0_MEAS_CC2;
 550         else
 551                 val |= SWITCHES0_MEAS_CC1;
 552
 553         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 554                            SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2 |
 555                            SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 556                            val);
 557
 558         val = 0;
 559         if (polarity)
 560                 val |= SWITCHES1_TXCC2;
 561         else
 562                 val |= SWITCHES1_TXCC1;
 563         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 564                            SWITCHES1_TXCC1 | SWITCHES1_TXCC2,
 565                            val);
 566
 567         chip->cc_polarity = polarity;
 568
 569         return 0;
 570 }
 571
 572 static int tcpm_set_vconn(struct fusb30x_chip *chip, int enable)
 573 {
 574         u8 val = 0;
 575
 576         if (enable) {
 577                 tcpm_set_polarity(chip, chip->cc_polarity);
 578         } else {
 579                 val &= ~(SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2);
 580                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 581                                    SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2,
 582                                    val);
 583         }
 584         chip->vconn_enabled = enable;
 585         return 0;
 586 }
 587
 588 static void fusb302_pd_reset(struct fusb30x_chip *chip)
 589 {
 590         regmap_write(chip->regmap, FUSB_REG_RESET, RESET_PD_RESET);
 591         regmap_reinit_cache(chip->regmap, &fusb302_regmap_config);
 592 }
 593
 594 static void tcpm_select_rp_value(struct fusb30x_chip *chip, u32 rp)
 595 {
 596         u32 control0_reg;
 597
 598         regmap_read(chip->regmap, FUSB_REG_CONTROL0, &control0_reg);
 599
 600         control0_reg &= ~CONTROL0_HOST_CUR;
 601         /*
 602          * according to the host current, the compare value is different
 603         */
 604         switch (rp) {
 605         /* host pull up current is 80ua , high voltage is 1.596v, low is 0.21v */
 606         case TYPEC_RP_USB:
 607                 chip->cc_meas_high = 0x26;
 608                 chip->cc_meas_low = 0x5;
 609                 control0_reg |= CONTROL0_HOST_CUR_USB;
 610                 break;
 611         /* host pull up current is 180ua , high voltage is 1.596v, low is 0.42v */
 612         case TYPEC_RP_1A5:
 613                 chip->cc_meas_high = 0x26;
 614                 chip->cc_meas_low = 0xa;
 615                 control0_reg |= CONTROL0_HOST_CUR_1A5;
 616                 break;
 617         /* host pull up current is 330ua , high voltage is 2.604v, low is 0.798v*/
 618         case TYPEC_RP_3A0:
 619                 chip->cc_meas_high = 0x26;
 620                 chip->cc_meas_low = 0x13;
 621                 control0_reg |= CONTROL0_HOST_CUR_3A0;
 622                 break;
 623         default:
 624                 chip->cc_meas_high = 0x26;
 625                 chip->cc_meas_low = 0xa;
 626                 control0_reg |= CONTROL0_HOST_CUR_1A5;
 627                 break;
 628         }
 629
 630         regmap_write(chip->regmap, FUSB_REG_CONTROL0, control0_reg);
 631 }
 632
 633 static void tcpm_init(struct fusb30x_chip *chip)
 634 {
 635         u8 val;
 636         u32 tmp;
 637
 638         regmap_read(chip->regmap, FUSB_REG_DEVICEID, &tmp);
 639         chip->chip_id = (u8)tmp;
 640         platform_set_vbus_lvl_enable(chip, 0, 0);
 641         chip->notify.is_cc_connected = 0;
 642         chip->cc_state = 0;
 643
 644         /* restore default settings */
 645         regmap_update_bits(chip->regmap, FUSB_REG_RESET, RESET_SW_RESET,
 646                            RESET_SW_RESET);
 647         fusb302_pd_reset(chip);
 648         /* set auto_retry and number of retries */
 649         regmap_update_bits(chip->regmap, FUSB_REG_CONTROL3,
 650                            CONTROL3_AUTO_RETRY | CONTROL3_N_RETRIES,
 651                            CONTROL3_AUTO_RETRY | CONTROL3_N_RETRIES),
 652
 653         /* set interrupts */
 654         val = 0xff;
 655         val &= ~(MASK_M_BC_LVL | MASK_M_COLLISION | MASK_M_ALERT |
 656                  MASK_M_VBUSOK);
 657         regmap_write(chip->regmap, FUSB_REG_MASK, val);
 658
 659         val = 0xff;
 660         val &= ~(MASKA_M_TOGDONE | MASKA_M_RETRYFAIL | MASKA_M_HARDSENT |
 661                  MASKA_M_TXSENT | MASKA_M_HARDRST);
 662         regmap_write(chip->regmap, FUSB_REG_MASKA, val);
 663
 664         val = 0xff;
 665         val = ~MASKB_M_GCRCSEND;
 666         regmap_write(chip->regmap, FUSB_REG_MASKB, val);
 667
 668 #ifdef  FUSB_HAVE_DRP
 669                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 670                                    CONTROL2_MODE | CONTROL2_TOGGLE,
 671                                    (1 << 1) | CONTROL2_TOGGLE);
 672
 673                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 674                                    CONTROL2_TOG_RD_ONLY,
 675                                    CONTROL2_TOG_RD_ONLY);
 676 #endif
 677
 678         tcpm_select_rp_value(chip, TYPEC_RP_1A5);
 679         /* Interrupts Enable */
 680         regmap_update_bits(chip->regmap, FUSB_REG_CONTROL0, CONTROL0_INT_MASK,
 681                            ~CONTROL0_INT_MASK);
 682
 683         tcpm_set_polarity(chip, 0);
 684         tcpm_set_vconn(chip, 0);
 685
 686         regmap_write(chip->regmap, FUSB_REG_POWER, 0xf);
 687 }
 688
 689 static void pd_execute_hard_reset(struct fusb30x_chip *chip)
 690 {
 691         chip->msg_id = 0;
 692         chip->vdm_state = 0;
 693         if (chip->notify.power_role)
 694                 set_state(chip, policy_src_transition_default);
 695         else
 696                 set_state(chip, policy_snk_transition_default);
 697 }
 698
 699 static void tcpc_alert(struct fusb30x_chip *chip, int *evt)
 700 {
 701         int interrupt, interrupta, interruptb;
 702         u32 val;
 703         static int retry;
 704
 705         regmap_read(chip->regmap, FUSB_REG_INTERRUPT, &interrupt);
 706         regmap_read(chip->regmap, FUSB_REG_INTERRUPTA, &interrupta);
 707         regmap_read(chip->regmap, FUSB_REG_INTERRUPTB, &interruptb);
 708
 709         if (interrupt & INTERRUPT_BC_LVL) {
 710                 if (chip->notify.is_cc_connected)
 711                         *evt |= EVENT_CC;
 712         }
 713
 714         if (interrupt & INTERRUPT_VBUSOK) {
 715                 if (chip->notify.is_cc_connected)
 716                         *evt |= EVENT_CC;
 717         }
 718
 719         if (interrupta & INTERRUPTA_TOGDONE) {
 720                 *evt |= EVENT_CC;
 721                 regmap_read(chip->regmap, FUSB_REG_STATUS1A, &val);
 722                 chip->cc_state = ((u8)val >> 3) & 0x07;
 723
 724                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 725                                    CONTROL2_TOGGLE,
 726                                    0);
 727
 728                 val &= ~(SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 729                          SWITCHES0_PDWN1 | SWITCHES0_PDWN2);
 730
 731                 if (chip->cc_state & 0x01)
 732                         val |= SWITCHES0_PU_EN1;
 733                 else
 734                         val |= SWITCHES0_PU_EN2;
 735
 736                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 737                                    SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 738                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
 739                                    val);
 740         }
 741
 742         if (interrupta & INTERRUPTA_TXSENT) {
 743                 *evt |= EVENT_TX;
 744                 fusb302_flush_rx_fifo(chip);
 745                 chip->tx_state = tx_success;
 746         }
 747
 748         if (interruptb & INTERRUPTB_GCRCSENT)
 749                 *evt |= EVENT_RX;
 750
 751         if (interrupta & INTERRUPTA_HARDRST) {
 752                 fusb302_pd_reset(chip);
 753                 pd_execute_hard_reset(chip);
 754                 *evt |= EVENT_REC_RESET;
 755         }
 756
 757         if (interrupta & INTERRUPTA_RETRYFAIL) {
 758                 *evt |= EVENT_TX;
 759                 chip->tx_state = tx_failed;
 760         }
 761
 762         if (interrupta & INTERRUPTA_HARDSENT) {
 763                 /*
 764                  * The fusb PD should be reset once to sync adapter PD
 765                  * signal after fusb sent hard reset cmd.This is not PD
 766                  * device if reset failed.
 767                  */
 768                 if (!retry) {
 769                         retry = 1;
 770                         fusb302_pd_reset(chip);
 771                         pd_execute_hard_reset(chip);
 772                 } else {
 773                         retry = 0;
 774                         chip->tx_state = tx_success;
 775                         chip->timer_state = T_DISABLED;
 776                         *evt |= EVENT_TX;
 777                 }
 778         }
 779 }
 780
 781 static void mux_alert(struct fusb30x_chip *chip, int *evt)
 782 {
 783         if (!chip->timer_mux) {
 784                 *evt |= EVENT_TIMER_MUX;
 785                 chip->timer_mux = T_DISABLED;
 786         }
 787
 788         if (!chip->timer_state) {
 789                 *evt |= EVENT_TIMER_STATE;
 790                 chip->timer_state = T_DISABLED;
 791         }
 792
 793         if (chip->work_continue) {
 794                 *evt |= EVENT_WORK_CONTINUE;
 795                 chip->work_continue = 0;
 796         }
 797 }
 798
 799 static void set_state_unattached(struct fusb30x_chip *chip)
 800 {
 801         dev_info(chip->dev, "connection has disconnected\n");
 802         tcpm_init(chip);
 803         tcpm_set_rx_enable(chip, 0);
 804         chip->conn_state = unattached;
 805         tcpm_set_cc(chip, FUSB_MODE_DRP);
 806
 807         /* claer notify_info */
 808         memset(&chip->notify, 0, sizeof(struct notify_info));
 809         platform_fusb_notify(chip);
 810
 811         if (chip->gpio_discharge)
 812                 gpiod_set_value(chip->gpio_discharge, 1);
 813         msleep(100);
 814         if (chip->gpio_discharge)
 815                 gpiod_set_value(chip->gpio_discharge, 0);
 816 }
 817
 818 static int tcpm_check_vbus(struct fusb30x_chip *chip)
 819 {
 820         u32 val;
 821
 822         /* Read status register */
 823         regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 824
 825         return (val & STATUS0_VBUSOK) ? 1 : 0;
 826 }
 827
 828 static void set_mesg(struct fusb30x_chip *chip, int cmd, int is_DMT)
 829 {
 830         int i;
 831         struct PD_CAP_INFO *pd_cap_info = &chip->pd_cap_info;
 832
 833         chip->send_head = ((chip->msg_id & 0x7) << 9) |
 834                          ((chip->notify.power_role & 0x1) << 8) |
 835                          (1 << 6) |
 836                          ((chip->notify.data_role & 0x1) << 5);
 837
 838         if (is_DMT) {
 839                 switch (cmd) {
 840                 case DMT_SOURCECAPABILITIES:
 841                         chip->send_head |= ((chip->n_caps_used & 0x3) << 12) | (cmd & 0xf);
 842
 843                         for (i = 0; i < chip->n_caps_used; i++) {
 844                                 chip->send_load[i] = (pd_cap_info->supply_type << 30) |
 845                                                     (pd_cap_info->dual_role_power << 29) |
 846                                                     (pd_cap_info->usb_suspend_support << 28) |
 847                                                     (pd_cap_info->externally_powered << 27) |
 848                                                     (pd_cap_info->usb_communications_cap << 26) |
 849                                                     (pd_cap_info->data_role_swap << 25) |
 850                                                     (pd_cap_info->peak_current << 20) |
 851                                                     (chip->source_power_supply[i] << 10) |
 852                                                     (chip->source_max_current[i]);
 853                         }
 854                         break;
 855                 case DMT_REQUEST:
 856                         chip->send_head |= ((1 << 12) | (cmd & 0xf));
 857                         /* send request with FVRDO */
 858                         chip->send_load[0] = (chip->pos_power << 28) |
 859                                             (0 << 27) |
 860                                             (1 << 26) |
 861                                             (0 << 25) |
 862                                             (0 << 24);
 863
 864                         switch (CAP_POWER_TYPE(chip->rec_load[chip->pos_power - 1])) {
 865                         case 0:
 866                                 /* Fixed Supply */
 867                                 chip->send_load[0] |= ((CAP_FPDO_VOLTAGE(chip->rec_load[chip->pos_power - 1]) << 10) & 0x3ff);
 868                                 chip->send_load[0] |= (CAP_FPDO_CURRENT(chip->rec_load[chip->pos_power - 1]) & 0x3ff);
 869                                 break;
 870                         case 1:
 871                                 /* Battery */
 872                                 chip->send_load[0] |= ((CAP_VPDO_VOLTAGE(chip->rec_load[chip->pos_power - 1]) << 10) & 0x3ff);
 873                                 chip->send_load[0] |= (CAP_VPDO_CURRENT(chip->rec_load[chip->pos_power - 1]) & 0x3ff);
 874                                 break;
 875                         default:
 876                                 /* not meet battery caps */
 877                                 break;
 878                         }
 879                         break;
 880                 case DMT_SINKCAPABILITIES:
 881                         break;
 882                 case DMT_VENDERDEFINED:
 883                         break;
 884                 default:
 885                         break;
 886                 }
 887         } else {
 888                 chip->send_head |= (cmd & 0xf);
 889         }
 890 }
 891
 892 static void set_vdm_mesg(struct fusb30x_chip *chip, int cmd, int type, int mode)
 893 {
 894         chip->send_head = (chip->msg_id & 0x7) << 9;
 895         chip->send_head |= (chip->notify.power_role & 0x1) << 8;
 896
 897         chip->send_head = ((chip->msg_id & 0x7) << 9) |
 898                          ((chip->notify.power_role & 0x1) << 8) |
 899                          (1 << 6) |
 900                          ((chip->notify.data_role & 0x1) << 5) |
 901                          (DMT_VENDERDEFINED & 0xf);
 902
 903         chip->send_load[0] = (1 << 15) |
 904                             (0 << 13) |
 905                             (type << 6) |
 906                             (cmd);
 907
 908         switch (cmd) {
 909         case VDM_DISCOVERY_ID:
 910         case VDM_DISCOVERY_SVIDS:
 911         case VDM_ATTENTION:
 912                 chip->send_load[0] |= (0xff00 << 16);
 913                 chip->send_head |= (1 << 12);
 914                 break;
 915         case VDM_DISCOVERY_MODES:
 916                 chip->send_load[0] |=
 917                         (chip->vdm_svid[chip->val_tmp >> 1] << 16);
 918                 chip->send_head |= (1 << 12);
 919                 break;
 920         case VDM_ENTER_MODE:
 921                 chip->send_head |= (1 << 12);
 922                 chip->send_load[0] |= (mode << 8) | (0xff01 << 16);
 923                 break;
 924         case VDM_EXIT_MODE:
 925                 chip->send_head |= (1 << 12);
 926                 chip->send_load[0] |= (0x0f << 8) | (0xff01 << 16);
 927                 break;
 928         case VDM_DP_STATUS_UPDATE:
 929                 chip->send_head |= (2 << 12);
 930                 chip->send_load[0] |= (1 << 8) | (0xff01 << 16);
 931                 chip->send_load[1] = 5;
 932                 break;
 933         case VDM_DP_CONFIG:
 934                 chip->send_head |= (2 << 12);
 935                 chip->send_load[0] |= (1 << 8) | (0xff01 << 16);
 936                 chip->send_load[1] = (chip->notify.pin_assignment_def << 8) |
 937                                     (1 << 2) | 2;
 938                 break;
 939         default:
 940                 break;
 941         }
 942 }
 943
 944 static enum tx_state policy_send_hardrst(struct fusb30x_chip *chip, int evt)
 945 {
 946         switch (chip->tx_state) {
 947         case 0:
 948                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL3,
 949                                    CONTROL3_SEND_HARDRESET,
 950                                    CONTROL3_SEND_HARDRESET);
 951                 chip->tx_state = tx_busy;
 952                 chip->timer_state = T_BMC_TIMEOUT;
 953                 fusb_timer_start(&chip->timer_state_machine,
 954                                  chip->timer_state);
 955                 break;
 956         default:
 957                 if (evt & EVENT_TIMER_STATE)
 958                         chip->tx_state = tx_success;
 959                 break;
 960         }
 961         return chip->tx_state;
 962 }
 963
 964 static enum tx_state policy_send_data(struct fusb30x_chip *chip)
 965 {
 966         u8 senddata[40];
 967         int pos = 0;
 968         u8 len;
 969
 970         switch (chip->tx_state) {
 971         case 0:
 972                 senddata[pos++] = FUSB_TKN_SYNC1;
 973                 senddata[pos++] = FUSB_TKN_SYNC1;
 974                 senddata[pos++] = FUSB_TKN_SYNC1;
 975                 senddata[pos++] = FUSB_TKN_SYNC2;
 976
 977                 len = PD_HEADER_CNT(chip->send_head) << 2;
 978                 senddata[pos++] = FUSB_TKN_PACKSYM | ((len + 2) & 0x1f);
 979
 980                 senddata[pos++] = chip->send_head & 0xff;
 981                 senddata[pos++] = (chip->send_head >> 8) & 0xff;
 982
 983                 memcpy(&senddata[pos], chip->send_load, len);
 984                 pos += len;
 985
 986                 senddata[pos++] = FUSB_TKN_JAMCRC;
 987                 senddata[pos++] = FUSB_TKN_EOP;
 988                 senddata[pos++] = FUSB_TKN_TXOFF;
 989                 senddata[pos++] = FUSB_TKN_TXON;
 990
 991                 regmap_raw_write(chip->regmap, FUSB_REG_FIFO, senddata, pos);
 992                 chip->tx_state = tx_busy;
 993                 break;
 994
 995         default:
 996                 /* wait Tx result */
 997                 break;
 998         }
 999
1000         return chip->tx_state;
1001 }
1002
1003 static void process_vdm_msg(struct fusb30x_chip *chip)
1004 {
1005         u32 vdm_header = chip->rec_load[0];
1006         int i;
1007         u32 tmp;
1008
1009         /* can't procee unstructed vdm msg */
1010         if (!GET_VDMHEAD_STRUCT_TYPE(vdm_header))
1011                 return;
1012
1013         switch (GET_VDMHEAD_CMD_TYPE(vdm_header)) {
1014         case VDM_TYPE_INIT:
1015                 switch (GET_VDMHEAD_CMD(vdm_header)) {
1016                 case VDM_ATTENTION:
1017                         dev_info(chip->dev, "attention, dp_status %x\n",
1018                                  chip->rec_load[1]);
1019                         chip->notify.attention = 1;
1020                         chip->vdm_state = 6;
1021                         break;
1022                 default:
1023                         dev_warn(chip->dev, "rec unknown init vdm msg\n");
1024                         break;
1025                 }
1026                 break;
1027         case VDM_TYPE_ACK:
1028                 switch (GET_VDMHEAD_CMD(vdm_header)) {
1029                 case VDM_DISCOVERY_ID:
1030                         chip->vdm_id = chip->rec_load[1];
1031                         break;
1032                 case VDM_DISCOVERY_SVIDS:
1033                         for (i = 0; i < 6; i++) {
1034                                 tmp = (chip->rec_load[i + 1] >> 16) &
1035                                       0x0000ffff;
1036                                 if (tmp) {
1037                                         chip->vdm_svid[i * 2] = tmp;
1038                                         chip->vdm_svid_num++;
1039                                 } else {
1040                                         break;
1041                                 }
1042
1043                                 tmp = (chip->rec_load[i + 1] & 0x0000ffff);
1044                                 if (tmp) {
1045                                         chip->vdm_svid[i * 2 + 1] = tmp;
1046                                         chip->vdm_svid_num++;
1047                                 } else {
1048                                         break;
1049                                 }
1050                         }
1051                         break;
1052                 case VDM_DISCOVERY_MODES:
1053                         /* indicate there are some vdo modes */
1054                         if (PD_HEADER_CNT(chip->rec_head) > 1) {
1055                                 /*
1056                                  * store mode config,
1057                                  * enter first mode default
1058                                  */
1059                                 if (!((chip->rec_load[1] >> 8) & 0x3f)) {
1060                                         chip->val_tmp |= 1;
1061                                         break;
1062                                 }
1063                                 chip->notify.pin_assignment_support = 0;
1064                                 chip->notify.pin_assignment_def = 0;
1065                                 chip->notify.pin_assignment_support =
1066                                         (chip->rec_load[1] >> 8) & 0x3f;
1067                                 tmp = chip->notify.pin_assignment_support;
1068                                 for (i = 0; i < 6; i++) {
1069                                         if (!(tmp & 0x20))
1070                                                 tmp = tmp << 1;
1071                                         else
1072                                                 break;
1073                                 }
1074                                 chip->notify.pin_assignment_def = 0x20 >> i;
1075                                 chip->val_tmp |= 1;
1076                         }
1077                         break;
1078                 case VDM_ENTER_MODE:
1079                         chip->val_tmp = 1;
1080                         break;
1081                 case VDM_DP_STATUS_UPDATE:
1082                         dev_dbg(chip->dev, "dp_status 0x%x\n",
1083                                 chip->rec_load[1]);
1084                         chip->val_tmp = 1;
1085                         break;
1086                 case VDM_DP_CONFIG:
1087                         chip->val_tmp = 1;
1088                         dev_info(chip->dev,
1089                                  "DP config successful, pin_assignment 0x%x\n",
1090                                  chip->notify.pin_assignment_def);
1091                         chip->notify.is_enter_mode = 1;
1092                         break;
1093                 default:
1094                         break;
1095                 }
1096                 break;
1097         case VDM_TYPE_NACK:
1098                         dev_warn(chip->dev, "REC NACK for 0x%x\n",
1099                                  GET_VDMHEAD_CMD(vdm_header));
1100                         /* disable vdm */
1101                         chip->vdm_state = 0xff;
1102                 break;
1103         }
1104 }
1105
1106 static int vdm_send_discoveryid(struct fusb30x_chip *chip, int evt)
1107 {
1108         int tmp;
1109
1110         switch (chip->vdm_send_state) {
1111         case 0:
1112                 set_vdm_mesg(chip, VDM_DISCOVERY_ID, VDM_TYPE_INIT, 0);
1113                 chip->vdm_id = 0;
1114                 chip->tx_state = 0;
1115                 chip->vdm_send_state++;
1116         case 1:
1117                 tmp = policy_send_data(chip);
1118                 if (tmp == tx_success) {
1119                         chip->vdm_send_state++;
1120                         chip->timer_state = T_SENDER_RESPONSE;
1121                         fusb_timer_start(&chip->timer_state_machine,
1122                                          chip->timer_state);
1123                 } else if (tmp == tx_failed) {
1124                         dev_warn(chip->dev, "VDM_DISCOVERY_ID send failed\n");
1125                         /* disable auto_vdm_machine */
1126                         chip->vdm_state = 0xff;
1127                 }
1128
1129                 if (chip->vdm_send_state != 2)
1130                         break;
1131         default:
1132                 if (chip->vdm_id) {
1133                         chip->vdm_send_state = 0;
1134                         return 0;
1135                 } else if (evt & EVENT_TIMER_STATE) {
1136                         dev_warn(chip->dev, "VDM_DISCOVERY_ID time out\n");
1137                         chip->vdm_state = 0xff;
1138                         chip->work_continue = 1;
1139                 }
1140                 break;
1141         }
1142         return -EINPROGRESS;
1143 }
1144
1145 static int vdm_send_discoverysvid(struct fusb30x_chip *chip, int evt)
1146 {
1147         int tmp;
1148
1149         switch (chip->vdm_send_state) {
1150         case 0:
1151                 set_vdm_mesg(chip, VDM_DISCOVERY_SVIDS, VDM_TYPE_INIT, 0);
1152                 memset(chip->vdm_svid, 0, 12);
1153                 chip->vdm_svid_num = 0;
1154                 chip->tx_state = 0;
1155                 chip->vdm_send_state++;
1156         case 1:
1157                 tmp = policy_send_data(chip);
1158                 if (tmp == tx_success) {
1159                         chip->vdm_send_state++;
1160                         chip->timer_state = T_SENDER_RESPONSE;
1161                         fusb_timer_start(&chip->timer_state_machine,
1162                                          chip->timer_state);
1163                 } else if (tmp == tx_failed) {
1164                         dev_warn(chip->dev, "VDM_DISCOVERY_SVIDS send failed\n");
1165                         /* disable auto_vdm_machine */
1166                         chip->vdm_state = 0xff;
1167                 }
1168
1169                 if (chip->vdm_send_state != 2)
1170                         break;
1171         default:
1172                 if (chip->vdm_svid_num) {
1173                         chip->vdm_send_state = 0;
1174                         return 0;
1175                 } else if (evt & EVENT_TIMER_STATE) {
1176                         dev_warn(chip->dev, "VDM_DISCOVERY_SVIDS time out\n");
1177                         chip->vdm_state = 0xff;
1178                         chip->work_continue = 1;
1179                 }
1180                 break;
1181         }
1182         return -EINPROGRESS;
1183 }
1184
1185 static int vdm_send_discoverymodes(struct fusb30x_chip *chip, int evt)
1186 {
1187         int tmp;
1188
1189         if ((chip->val_tmp >> 1) != chip->vdm_svid_num) {
1190                 switch (chip->vdm_send_state) {
1191                 case 0:
1192                         set_vdm_mesg(chip, VDM_DISCOVERY_MODES,
1193                                      VDM_TYPE_INIT, 0);
1194                         chip->tx_state = 0;
1195                         chip->vdm_send_state++;
1196                 case 1:
1197                         tmp = policy_send_data(chip);
1198                         if (tmp == tx_success) {
1199                                 chip->vdm_send_state++;
1200                                 chip->timer_state = T_SENDER_RESPONSE;
1201                                 fusb_timer_start(&chip->timer_state_machine,
1202                                                  chip->timer_state);
1203                         } else if (tmp == tx_failed) {
1204                                 dev_warn(chip->dev,
1205                                          "VDM_DISCOVERY_MODES send failed\n");
1206                                 chip->vdm_state = 0xff;
1207                         }
1208
1209                         if (chip->vdm_send_state != 2)
1210                                 break;
1211                 default:
1212                         if (chip->val_tmp & 1) {
1213                                 chip->val_tmp &= 0xfe;
1214                                 chip->val_tmp += 2;
1215                                 chip->vdm_send_state = 0;
1216                                 chip->work_continue = 1;
1217                         } else if (evt & EVENT_TIMER_STATE) {
1218                                 dev_warn(chip->dev,
1219                                          "VDM_DISCOVERY_MODES time out\n");
1220                                 chip->vdm_state = 0xff;
1221                                 chip->work_continue = 1;
1222                         }
1223                         break;
1224                 }
1225         } else {
1226                 chip->val_tmp = 0;
1227                 return 0;
1228         }
1229
1230         return -EINPROGRESS;
1231 }
1232
1233 static int vdm_send_entermode(struct fusb30x_chip *chip, int evt)
1234 {
1235         int tmp;
1236
1237         switch (chip->vdm_send_state) {
1238         case 0:
1239                 set_vdm_mesg(chip, VDM_ENTER_MODE, VDM_TYPE_INIT, 1);
1240                 chip->tx_state = 0;
1241                 chip->vdm_send_state++;
1242                 chip->notify.is_enter_mode = 0;
1243         case 1:
1244                 tmp = policy_send_data(chip);
1245                 if (tmp == tx_success) {
1246                         chip->vdm_send_state++;
1247                         chip->timer_state = T_SENDER_RESPONSE;
1248                         fusb_timer_start(&chip->timer_state_machine,
1249                                          chip->timer_state);
1250                 } else if (tmp == tx_failed) {
1251                         dev_warn(chip->dev, "VDM_ENTER_MODE send failed\n");
1252                         /* disable auto_vdm_machine */
1253                         chip->vdm_state = 0xff;
1254                 }
1255
1256                 if (chip->vdm_send_state != 2)
1257                         break;
1258         default:
1259                 if (chip->val_tmp) {
1260                         chip->val_tmp = 0;
1261                         chip->vdm_send_state = 0;
1262                         return 0;
1263                 } else if (evt & EVENT_TIMER_STATE) {
1264                         dev_warn(chip->dev, "VDM_ENTER_MODE time out\n");
1265                         chip->vdm_state = 0xff;
1266                         chip->work_continue = 1;
1267                 }
1268                 break;
1269         }
1270         return -EINPROGRESS;
1271 }
1272
1273 static int vdm_send_getdpstatus(struct fusb30x_chip *chip, int evt)
1274 {
1275         int tmp;
1276
1277         switch (chip->vdm_send_state) {
1278         case 0:
1279                 set_vdm_mesg(chip, VDM_DP_STATUS_UPDATE, VDM_TYPE_INIT, 1);
1280                 chip->tx_state = 0;
1281                 chip->vdm_send_state++;
1282         case 1:
1283                 tmp = policy_send_data(chip);
1284                 if (tmp == tx_success) {
1285                         chip->vdm_send_state++;
1286                         chip->timer_state = T_SENDER_RESPONSE;
1287                         fusb_timer_start(&chip->timer_state_machine,
1288                                          chip->timer_state);
1289                 } else if (tmp == tx_failed) {
1290                         dev_warn(chip->dev,
1291                                  "VDM_DP_STATUS_UPDATE send failed\n");
1292                         /* disable auto_vdm_machine */
1293                         chip->vdm_state = 0xff;
1294                 }
1295
1296                 if (chip->vdm_send_state != 2)
1297                         break;
1298         default:
1299                 if (chip->val_tmp) {
1300                         chip->val_tmp = 0;
1301                         chip->vdm_send_state = 0;
1302                         return 0;
1303                 } else if (evt & EVENT_TIMER_STATE) {
1304                         dev_warn(chip->dev, "VDM_DP_STATUS_UPDATE time out\n");
1305                         chip->vdm_state = 0xff;
1306                         chip->work_continue = 1;
1307                 }
1308                 break;
1309         }
1310         return -EINPROGRESS;
1311 }
1312
1313 static int vdm_send_dpconfig(struct fusb30x_chip *chip, int evt)
1314 {
1315         int tmp;
1316
1317         switch (chip->vdm_send_state) {
1318         case 0:
1319                 set_vdm_mesg(chip, VDM_DP_CONFIG, VDM_TYPE_INIT, 0);
1320                 chip->tx_state = 0;
1321                 chip->vdm_send_state++;
1322         case 1:
1323                 tmp = policy_send_data(chip);
1324                 if (tmp == tx_success) {
1325                         chip->vdm_send_state++;
1326                         chip->timer_state = T_SENDER_RESPONSE;
1327                         fusb_timer_start(&chip->timer_state_machine,
1328                                          chip->timer_state);
1329                 } else if (tmp == tx_failed) {
1330                         dev_warn(chip->dev, "vdm_send_dpconfig send failed\n");
1331                         /* disable auto_vdm_machine */
1332                         chip->vdm_state = 0xff;
1333                 }
1334
1335                 if (chip->vdm_send_state != 2)
1336                         break;
1337         default:
1338                 if (chip->val_tmp) {
1339                         chip->val_tmp = 0;
1340                         chip->vdm_send_state = 0;
1341                         return 0;
1342                 } else if (evt & EVENT_TIMER_STATE) {
1343                         dev_warn(chip->dev, "vdm_send_dpconfig time out\n");
1344                         chip->vdm_state = 0xff;
1345                         chip->work_continue = 1;
1346                 }
1347                 break;
1348         }
1349         return -EINPROGRESS;
1350 }
1351
1352 static void auto_vdm_machine(struct fusb30x_chip *chip, int evt)
1353 {
1354         switch (chip->vdm_state) {
1355         case 0:
1356                 if (vdm_send_discoveryid(chip, evt))
1357                         break;
1358                 chip->vdm_state++;
1359                 /* without break */
1360         case 1:
1361                 if (vdm_send_discoverysvid(chip, evt))
1362                         break;
1363                 chip->vdm_state++;
1364                 /* without break */
1365         case 2:
1366                 if (vdm_send_discoverymodes(chip, evt))
1367                         break;
1368                 chip->vdm_state++;
1369                 /* without break */
1370         case 3:
1371                 if (vdm_send_entermode(chip, evt))
1372                         break;
1373                 chip->vdm_state++;
1374                 /* without break */
1375         case 4:
1376                 if (vdm_send_dpconfig(chip, evt))
1377                         break;
1378                 chip->vdm_state = 6;
1379                 /* without break */
1380         case 5:
1381                 if (vdm_send_getdpstatus(chip, evt))
1382                         break;
1383                 chip->vdm_state++;
1384                 /* without break */
1385         default:
1386                 platform_fusb_notify(chip);
1387                 break;
1388         }
1389 }
1390
1391 static void fusb_state_disabled(struct fusb30x_chip *chip, int evt)
1392 {
1393         platform_fusb_notify(chip);
1394 }
1395
1396 static void fusb_state_unattached(struct fusb30x_chip *chip, int evt)
1397 {
1398         chip->notify.is_cc_connected = 0;
1399         if ((evt & EVENT_CC) && chip->cc_state) {
1400                 if (chip->cc_state & 0x04)
1401                         set_state(chip, attach_wait_sink);
1402                 else
1403                         set_state(chip, attach_wait_source);
1404
1405                 tcpm_get_cc(chip, &chip->cc1, &chip->cc2);
1406                 chip->debounce_cnt = 0;
1407                 chip->timer_mux = 2;
1408                 fusb_timer_start(&chip->timer_mux_machine, chip->timer_mux);
1409         }
1410 }
1411
1412 static void fusb_state_attach_wait_sink(struct fusb30x_chip *chip, int evt)
1413 {
1414         int cc1, cc2;
1415
1416         if (evt & EVENT_TIMER_MUX) {
1417                 tcpm_get_cc(chip, &cc1, &cc2);
1418
1419                 if ((chip->cc1 == cc1) && (chip->cc2 == cc2)) {
1420                         chip->debounce_cnt++;
1421                 } else {
1422                         chip->cc1 = cc1;
1423                         chip->cc2 = cc2;
1424                         chip->debounce_cnt = 0;
1425                 }
1426
1427                 if (chip->debounce_cnt > N_DEBOUNCE_CNT) {
1428                         if ((chip->cc1 != chip->cc2) &&
1429                             ((!chip->cc1) || (!chip->cc2))) {
1430                                 set_state(chip, attached_sink);
1431                         } else {
1432                                 set_state_unattached(chip);
1433                         }
1434                         return;
1435                 }
1436
1437                 chip->timer_mux = 2;
1438                 fusb_timer_start(&chip->timer_mux_machine,
1439                                  chip->timer_mux);
1440         }
1441 }
1442
1443 static void fusb_state_attach_wait_source(struct fusb30x_chip *chip, int evt)
1444 {
1445         int cc1, cc2;
1446
1447         if (evt & EVENT_TIMER_MUX) {
1448                 tcpm_get_cc(chip, &cc1, &cc2);
1449
1450                 if ((chip->cc1 == cc1) && (chip->cc2 == cc2)) {
1451                         if (chip->debounce_cnt++ == 0)
1452                                 platform_set_vbus_lvl_enable(chip, 1, 0);
1453                 } else {
1454                         chip->cc1 = cc1;
1455                         chip->cc2 = cc2;
1456                         chip->debounce_cnt = 0;
1457                 }
1458
1459                 if (chip->debounce_cnt > N_DEBOUNCE_CNT) {
1460                         if (((!chip->cc1) || (!chip->cc2)) &&
1461                             ((chip->cc1 == TYPEC_CC_VOLT_RD) ||
1462                              (chip->cc2 == TYPEC_CC_VOLT_RD))) {
1463                                 set_state(chip, attached_source);
1464                         } else {
1465                                 set_state_unattached(chip);
1466                         }
1467
1468                         return;
1469                 }
1470
1471                 chip->timer_mux = 2;
1472                 fusb_timer_start(&chip->timer_mux_machine,
1473                                  chip->timer_mux);
1474         }
1475 }
1476
1477 static void fusb_state_attached_source(struct fusb30x_chip *chip, int evt)
1478 {
1479         tcpm_set_polarity(chip, !(chip->cc_state & 0x01));
1480         tcpm_set_vconn(chip, 1);
1481
1482         chip->notify.is_cc_connected = 1;
1483         if (chip->cc_state & 0x01)
1484                 chip->cc_polarity = 0;
1485         else
1486                 chip->cc_polarity = 1;
1487
1488         chip->notify.power_role = 1;
1489         chip->notify.data_role = 1;
1490         chip->hardrst_count = 0;
1491         set_state(chip, policy_src_startup);
1492         dev_info(chip->dev, "CC connected in %d as DFP\n", chip->cc_polarity);
1493 }
1494
1495 static void fusb_state_attached_sink(struct fusb30x_chip *chip, int evt)
1496 {
1497         chip->notify.is_cc_connected = 1;
1498         if (chip->cc_state & 0x01)
1499                 chip->cc_polarity = 0;
1500         else
1501                 chip->cc_polarity = 1;
1502
1503         chip->notify.power_role = 0;
1504         chip->notify.data_role = 0;
1505         chip->hardrst_count = 0;
1506         set_state(chip, policy_snk_startup);
1507         dev_info(chip->dev, "CC connected in %d as UFP\n", chip->cc_polarity);
1508 }
1509
1510 static void fusb_state_src_startup(struct fusb30x_chip *chip, int evt)
1511 {
1512         chip->caps_counter = 0;
1513         chip->notify.is_pd_connected = 0;
1514         chip->msg_id = 0;
1515         chip->vdm_state = 0;
1516         chip->vdm_substate = 0;
1517         chip->vdm_send_state = 0;
1518         chip->val_tmp = 0;
1519
1520         memset(chip->partner_cap, 0, sizeof(chip->partner_cap));
1521
1522         tcpm_set_msg_header(chip);
1523         tcpm_set_polarity(chip, chip->cc_polarity);
1524         tcpm_set_rx_enable(chip, 1);
1525
1526         set_state(chip, policy_src_send_caps);
1527 }
1528
1529 static void fusb_state_src_discovery(struct fusb30x_chip *chip, int evt)
1530 {
1531         switch (chip->sub_state) {
1532         case 0:
1533                 chip->caps_counter++;
1534
1535                 if (chip->caps_counter < N_CAPS_COUNT) {
1536                         chip->timer_state = T_TYPEC_SEND_SOURCECAP;
1537                         fusb_timer_start(&chip->timer_state_machine,
1538                                          chip->timer_state);
1539                         chip->sub_state = 1;
1540                 } else {
1541                         set_state(chip, disabled);
1542                 }
1543                 break;
1544         default:
1545                 if (evt & EVENT_TIMER_STATE) {
1546                         set_state(chip, policy_src_send_caps);
1547                 } else if ((evt & EVENT_TIMER_MUX) &&
1548                            (chip->hardrst_count > N_HARDRESET_COUNT)) {
1549                         if (chip->notify.is_pd_connected)
1550                                 set_state(chip, error_recovery);
1551                         else
1552                                 set_state(chip, disabled);
1553                 }
1554                 break;
1555         }
1556 }
1557
1558 static void fusb_state_src_send_caps(struct fusb30x_chip *chip, int evt)
1559 {
1560         u32 tmp;
1561
1562         switch (chip->sub_state) {
1563         case 0:
1564                 set_mesg(chip, DMT_SOURCECAPABILITIES, DATAMESSAGE);
1565                 chip->sub_state = 1;
1566                 chip->tx_state = tx_idle;
1567                 /* without break */
1568         case 1:
1569                 tmp = policy_send_data(chip);
1570
1571                 if (tmp == tx_success) {
1572                         chip->hardrst_count = 0;
1573                         chip->caps_counter = 0;
1574                         chip->timer_state = T_SENDER_RESPONSE;
1575                         fusb_timer_start(&chip->timer_state_machine,
1576                                          chip->timer_state);
1577                         chip->timer_mux = T_DISABLED;
1578                         chip->sub_state++;
1579                 } else if (tmp == tx_failed) {
1580                         set_state(chip, policy_src_discovery);
1581                         break;
1582                 }
1583
1584                 if (!(evt & FLAG_EVENT))
1585                         break;
1586         default:
1587                 if (evt & EVENT_RX) {
1588                         if ((PD_HEADER_CNT(chip->rec_head) == 1) &&
1589                             (PD_HEADER_TYPE(chip->rec_head) == DMT_REQUEST)) {
1590                                 set_state(chip, policy_src_negotiate_cap);
1591                         } else {
1592                                 set_state(chip, policy_src_send_softrst);
1593                         }
1594                 } else if (evt & EVENT_TIMER_STATE) {
1595                         if (chip->hardrst_count <= N_HARDRESET_COUNT)
1596                                 set_state(chip, policy_src_send_hardrst);
1597                         else
1598                                 set_state(chip, disabled);
1599                 } else if (evt & EVENT_TIMER_MUX) {
1600                         if (chip->notify.is_pd_connected)
1601                                 set_state(chip, disabled);
1602                         else
1603                                 set_state(chip, error_recovery);
1604                 }
1605                 break;
1606         }
1607 }
1608
1609 static void fusb_state_src_negotiate_cap(struct fusb30x_chip *chip, int evt)
1610 {
1611         u32 tmp;
1612
1613         /* base on evb1 */
1614         tmp = (chip->rec_load[0] >> 28) & 0x07;
1615         if (tmp > chip->n_caps_used)
1616                 set_state(chip, policy_src_cap_response);
1617         else
1618                 set_state(chip, policy_src_transition_supply);
1619 }
1620
1621 static void fusb_state_src_transition_supply(struct fusb30x_chip *chip,
1622                                              int evt)
1623 {
1624         u32 tmp;
1625
1626         switch (chip->sub_state) {
1627         case 0:
1628                 set_mesg(chip, CMT_ACCEPT, CONTROLMESSAGE);
1629                 chip->tx_state = tx_idle;
1630                 chip->sub_state++;
1631                 /* without break */
1632         case 1:
1633                 tmp = policy_send_data(chip);
1634                 if (tmp == tx_success) {
1635                         chip->timer_state = T_SRC_TRANSITION;
1636                         chip->sub_state++;
1637                         fusb_timer_start(&chip->timer_state_machine,
1638                                          chip->timer_state);
1639                 } else if (tmp == tx_failed) {
1640                         set_state(chip, policy_src_send_softrst);
1641                 }
1642                 break;
1643         case 2:
1644                 if (evt & EVENT_TIMER_STATE) {
1645                         chip->notify.is_pd_connected = 1;
1646                         platform_set_vbus_lvl_enable(chip, 1, 0);
1647                         set_mesg(chip, CMT_PS_RDY, CONTROLMESSAGE);
1648                         chip->tx_state = tx_idle;
1649                         chip->sub_state++;
1650                         chip->work_continue = 1;
1651                 }
1652                 break;
1653         default:
1654                 tmp = policy_send_data(chip);
1655                 if (tmp == tx_success) {
1656                         dev_info(chip->dev,
1657                                  "PD connected as DFP, supporting 5V\n");
1658                         set_state(chip, policy_src_ready);
1659                 } else if (tmp == tx_failed) {
1660                         set_state(chip, policy_src_send_softrst);
1661                 }
1662                 break;
1663         }
1664 }
1665
1666 static void fusb_state_src_cap_response(struct fusb30x_chip *chip, int evt)
1667 {
1668         u32 tmp;
1669
1670         switch (chip->sub_state) {
1671         case 0:
1672                 set_mesg(chip, CMT_REJECT, CONTROLMESSAGE);
1673                 chip->tx_state = tx_idle;
1674                 chip->sub_state++;
1675                 /* without break */
1676         default:
1677                 tmp = policy_send_data(chip);
1678                 if (tmp == tx_success) {
1679                         if (chip->notify.is_pd_connected) {
1680                                 dev_info(chip->dev,
1681                                          "PD connected as DFP, supporting 5V\n");
1682                                 set_state(chip, policy_src_ready);
1683                         } else {
1684                                 set_state(chip, policy_src_send_hardrst);
1685                         }
1686                 } else if (tmp == tx_failed) {
1687                         set_state(chip, policy_src_send_softrst);
1688                 }
1689                 break;
1690         }
1691 }
1692
1693 static void fusb_state_src_transition_default(struct fusb30x_chip *chip,
1694                                               int evt)
1695 {
1696         switch (chip->sub_state) {
1697         case 0:
1698                 chip->notify.is_pd_connected = 0;
1699                 platform_set_vbus_lvl_enable(chip, 0, 0);
1700                 if (chip->notify.data_role)
1701                         regmap_update_bits(chip->regmap,
1702                                            FUSB_REG_SWITCHES1,
1703                                            SWITCHES1_DATAROLE,
1704                                            SWITCHES1_DATAROLE);
1705                 else
1706                         regmap_update_bits(chip->regmap,
1707                                            FUSB_REG_SWITCHES1,
1708                                            SWITCHES1_DATAROLE,
1709                                            0);
1710
1711                 chip->timer_state = T_SRC_RECOVER;
1712                 fusb_timer_start(&chip->timer_state_machine,
1713                                  chip->timer_state);
1714                 chip->sub_state++;
1715                 break;
1716         default:
1717                 if (evt & EVENT_TIMER_STATE) {
1718                         platform_set_vbus_lvl_enable(chip, 1, 0);
1719                         chip->timer_mux = T_NO_RESPONSE;
1720                         fusb_timer_start(&chip->timer_mux_machine,
1721                                          chip->timer_mux);
1722                         set_state(chip, policy_src_startup);
1723                         dev_dbg(chip->dev, "reset over-> src startup\n");
1724                 }
1725                 break;
1726         }
1727 }
1728
1729 static void fusb_state_src_ready(struct fusb30x_chip *chip, int evt)
1730 {
1731         if (evt & EVENT_RX) {
1732                 if ((PD_HEADER_CNT(chip->rec_head)) &&
1733                     (PD_HEADER_TYPE(chip->rec_head) == DMT_VENDERDEFINED)) {
1734                         process_vdm_msg(chip);
1735                         chip->work_continue = 1;
1736                         chip->timer_state = T_DISABLED;
1737                 }
1738         }
1739
1740         /* TODO: swap function would be added here later on*/
1741
1742         if (!chip->partner_cap[0])
1743                 set_state(chip, policy_src_get_sink_caps);
1744         else
1745                 auto_vdm_machine(chip, evt);
1746 }
1747
1748 static void fusb_state_src_get_sink_cap(struct fusb30x_chip *chip, int evt)
1749 {
1750         u32 tmp;
1751
1752         switch (chip->sub_state) {
1753         case 0:
1754                 set_mesg(chip, CMT_GETSINKCAP, CONTROLMESSAGE);
1755                 chip->tx_state = tx_idle;
1756                 chip->sub_state++;
1757                 /* without break */
1758         case 1:
1759                 tmp = policy_send_data(chip);
1760                 if (tmp == tx_success) {
1761                         chip->timer_state = T_SENDER_RESPONSE;
1762                         chip->sub_state++;
1763                         fusb_timer_start(&chip->timer_state_machine,
1764                                          chip->timer_state);
1765                 } else if (tmp == tx_failed) {
1766                         set_state(chip, policy_src_send_softrst);
1767                 }
1768
1769                 if (!(evt & FLAG_EVENT))
1770                         break;
1771         default:
1772                 if (evt & EVENT_RX) {
1773                         if ((PD_HEADER_CNT(chip->rec_head)) &&
1774                             (PD_HEADER_TYPE(chip->rec_head) ==
1775                              DMT_SINKCAPABILITIES)) {
1776                                 for (tmp = 0;
1777                                      tmp < PD_HEADER_CNT(chip->rec_head);
1778                                      tmp++) {
1779                                         chip->partner_cap[tmp] =
1780                                                 chip->rec_load[tmp];
1781                                 }
1782                                 set_state(chip, policy_src_ready);
1783                         } else {
1784                                 chip->partner_cap[0] = 0xffffffff;
1785                                 set_state(chip, policy_src_ready);
1786                         }
1787                 } else if (evt & EVENT_TIMER_STATE) {
1788                         dev_warn(chip->dev, "Get sink cap time out\n");
1789                         chip->partner_cap[0] = 0xffffffff;
1790                         set_state(chip, policy_src_ready);
1791                 }
1792         }
1793 }
1794
1795 static void fusb_state_src_send_hardreset(struct fusb30x_chip *chip, int evt)
1796 {
1797         u32 tmp;
1798
1799         switch (chip->sub_state) {
1800         case 0:
1801                 chip->tx_state = tx_idle;
1802                 chip->sub_state++;
1803                 /* without break */
1804         default:
1805                 tmp = policy_send_hardrst(chip, evt);
1806                 if (tmp == tx_success) {
1807                         chip->hardrst_count++;
1808                         set_state(chip, policy_src_transition_default);
1809                 } else if (tmp == tx_failed) {
1810                         /* can't reach here */
1811                         set_state(chip, error_recovery);
1812                 }
1813                 break;
1814         }
1815 }
1816
1817 static void fusb_state_src_send_softreset(struct fusb30x_chip *chip, int evt)
1818 {
1819         u32 tmp;
1820
1821         switch (chip->sub_state) {
1822         case 0:
1823                 set_mesg(chip, CMT_SOFTRESET, CONTROLMESSAGE);
1824                 chip->tx_state = tx_idle;
1825                 chip->sub_state++;
1826                 /* without break */
1827         case 1:
1828                 tmp = policy_send_data(chip);
1829                 if (tmp == tx_success) {
1830                         chip->timer_state = T_SENDER_RESPONSE;
1831                         chip->sub_state++;
1832                         fusb_timer_start(&chip->timer_state_machine,
1833                                          chip->timer_state);
1834                 } else if (tmp == tx_failed) {
1835                         set_state(chip, policy_src_send_hardrst);
1836                 }
1837
1838                 if (!(evt & FLAG_EVENT))
1839                         break;
1840         default:
1841                 if (evt & EVENT_RX) {
1842                         if ((!PD_HEADER_CNT(chip->rec_head)) &&
1843                             (PD_HEADER_TYPE(chip->rec_head) == CMT_ACCEPT))
1844                                 set_state(chip, policy_src_send_caps);
1845                 } else if (evt & EVENT_TIMER_STATE) {
1846                         set_state(chip, policy_src_send_hardrst);
1847                 }
1848                 break;
1849         }
1850 }
1851
1852 static void fusb_state_snk_startup(struct fusb30x_chip *chip, int evt)
1853 {
1854         chip->notify.is_pd_connected = 0;
1855         chip->msg_id = 0;
1856         chip->vdm_state = 0;
1857         chip->vdm_substate = 0;
1858         chip->vdm_send_state = 0;
1859         chip->val_tmp = 0;
1860         chip->pos_power = 0;
1861
1862         memset(chip->partner_cap, 0, sizeof(chip->partner_cap));
1863
1864         tcpm_set_msg_header(chip);
1865         tcpm_set_polarity(chip, chip->cc_polarity);
1866         tcpm_set_rx_enable(chip, 1);
1867         set_state(chip, policy_snk_discovery);
1868 }
1869
1870 static void fusb_state_snk_discovery(struct fusb30x_chip *chip, int evt)
1871 {
1872         set_state(chip, policy_snk_wait_caps);
1873         chip->timer_state = T_TYPEC_SINK_WAIT_CAP;
1874         fusb_timer_start(&chip->timer_state_machine,
1875                          chip->timer_state);
1876 }
1877
1878 static void fusb_state_snk_wait_caps(struct fusb30x_chip *chip, int evt)
1879 {
1880         if (evt & EVENT_RX) {
1881                 if (PD_HEADER_CNT(chip->rec_head) &&
1882                     PD_HEADER_TYPE(chip->rec_head) == DMT_SOURCECAPABILITIES) {
1883                         chip->timer_mux = T_DISABLED;
1884                         set_state(chip, policy_snk_evaluate_caps);
1885                 }
1886         } else if (evt & EVENT_TIMER_STATE) {
1887                 if (chip->hardrst_count <= N_HARDRESET_COUNT)
1888                         set_state(chip, policy_snk_send_hardrst);
1889                 else
1890                         set_state(chip, disabled);
1891         } else if ((evt & EVENT_TIMER_MUX) &&
1892                    (chip->hardrst_count > N_HARDRESET_COUNT)) {
1893                 if (chip->notify.is_pd_connected)
1894                         set_state(chip, error_recovery);
1895                 else
1896                         set_state(chip, disabled);
1897         }
1898 }
1899
1900 static void fusb_state_snk_evaluate_caps(struct fusb30x_chip *chip, int evt)
1901 {
1902         u32 tmp;
1903
1904         chip->hardrst_count = 0;
1905         chip->pos_power = 0;
1906
1907         for (tmp = 0; tmp < PD_HEADER_CNT(chip->rec_head); tmp++) {
1908                 switch (CAP_POWER_TYPE(chip->rec_load[tmp])) {
1909                 case 0:
1910                         /* Fixed Supply */
1911                         if (CAP_FPDO_VOLTAGE(chip->rec_load[tmp]) <= 100)
1912                                 chip->pos_power = tmp + 1;
1913                         break;
1914                 case 1:
1915                         /* Battery */
1916                         if (CAP_VPDO_VOLTAGE(chip->rec_load[tmp]) <= 100)
1917                                 chip->pos_power = tmp + 1;
1918                         break;
1919                 default:
1920                         /* not meet battery caps */
1921                         break;
1922                 }
1923         }
1924         fusb302_set_pos_power_by_charge_ic(chip);
1925
1926         if ((!chip->pos_power) || (chip->pos_power > 7)) {
1927                 chip->pos_power = 0;
1928                 set_state(chip, policy_snk_wait_caps);
1929         } else {
1930                 set_state(chip, policy_snk_select_cap);
1931         }
1932 }
1933
1934 static void fusb_state_snk_select_cap(struct fusb30x_chip *chip, int evt)
1935 {
1936         u32 tmp;
1937
1938         switch (chip->sub_state) {
1939         case 0:
1940                 set_mesg(chip, DMT_REQUEST, DATAMESSAGE);
1941                 chip->sub_state = 1;
1942                 chip->tx_state = tx_idle;
1943                 /* without break */
1944         case 1:
1945                 tmp = policy_send_data(chip);
1946
1947                 if (tmp == tx_success) {
1948                         chip->timer_state = T_SENDER_RESPONSE;
1949                         fusb_timer_start(&chip->timer_state_machine,
1950                                          chip->timer_state);
1951                         chip->sub_state++;
1952                 } else if (tmp == tx_failed) {
1953                         set_state(chip, policy_snk_discovery);
1954                         break;
1955                 }
1956
1957                 if (!(evt & FLAG_EVENT))
1958                         break;
1959         default:
1960                 if (evt & EVENT_RX) {
1961                         if (!PD_HEADER_CNT(chip->rec_head)) {
1962                                 switch (PD_HEADER_TYPE(chip->rec_head)) {
1963                                 case CMT_ACCEPT:
1964                                         set_state(chip,
1965                                                   policy_snk_transition_sink);
1966                                         chip->timer_state = T_PS_TRANSITION;
1967                                         fusb_timer_start(&chip->timer_state_machine,
1968                                                          chip->timer_state);
1969                                         break;
1970                                 case CMT_WAIT:
1971                                 case CMT_REJECT:
1972                                         if (chip->notify.is_pd_connected) {
1973                                                 dev_info(chip->dev,
1974                                                          "PD connected as UFP, fetching 5V\n");
1975                                                 set_state(chip,
1976                                                           policy_snk_ready);
1977                                         } else {
1978                                                 set_state(chip,
1979                                                           policy_snk_wait_caps);
1980                                                 /*
1981                                                  * make sure don't send
1982                                                  * hard reset to prevent
1983                                                  * infinite loop
1984                                                  */
1985                                                 chip->hardrst_count =
1986                                                         N_HARDRESET_COUNT + 1;
1987                                         }
1988                                         break;
1989                                 default:
1990                                         break;
1991                                 }
1992                         }
1993                 } else if (evt & EVENT_TIMER_STATE) {
1994                         set_state(chip, policy_snk_send_hardrst);
1995                 }
1996                 break;
1997         }
1998 }
1999
2000 static void fusb_state_snk_transition_sink(struct fusb30x_chip *chip, int evt)
2001 {
2002         if (evt & EVENT_RX) {
2003                 if ((!PD_HEADER_CNT(chip->rec_head)) &&
2004                     (PD_HEADER_TYPE(chip->rec_head) == CMT_PS_RDY)) {
2005                         chip->notify.is_pd_connected = 1;
2006                         dev_info(chip->dev,
2007                                  "PD connected as UFP, fetching 5V\n");
2008                         set_state(chip, policy_snk_ready);
2009                 } else if ((PD_HEADER_CNT(chip->rec_head)) &&
2010                            (PD_HEADER_TYPE(chip->rec_head) ==
2011                             DMT_SOURCECAPABILITIES)) {
2012                         set_state(chip, policy_snk_evaluate_caps);
2013                 }
2014         } else if (evt & EVENT_TIMER_STATE) {
2015                 set_state(chip, policy_snk_send_hardrst);
2016         }
2017 }
2018
2019 static void fusb_state_snk_transition_default(struct fusb30x_chip *chip,
2020                                               int evt)
2021 {
2022         switch (chip->sub_state) {
2023         case 0:
2024                 chip->notify.is_pd_connected = 0;
2025                 chip->timer_mux = T_NO_RESPONSE;
2026                 fusb_timer_start(&chip->timer_mux_machine,
2027                                  chip->timer_mux);
2028                 chip->timer_state = T_PS_HARD_RESET_MAX + T_SAFE_0V;
2029                 fusb_timer_start(&chip->timer_state_machine,
2030                                  chip->timer_state);
2031                 if (chip->notify.data_role)
2032                         tcpm_set_msg_header(chip);
2033
2034                 chip->sub_state++;
2035         case 1:
2036                 if (!tcpm_check_vbus(chip)) {
2037                         chip->sub_state++;
2038                         chip->timer_state = T_SRC_RECOVER_MAX + T_SRC_TURN_ON;
2039                         fusb_timer_start(&chip->timer_state_machine,
2040                                          chip->timer_state);
2041                 } else if (evt & EVENT_TIMER_STATE) {
2042                         set_state(chip, policy_snk_startup);
2043                 }
2044                 break;
2045         default:
2046                 if (tcpm_check_vbus(chip)) {
2047                         chip->timer_state = T_DISABLED;
2048                         set_state(chip, policy_snk_startup);
2049                 } else if (evt & EVENT_TIMER_STATE) {
2050                         set_state(chip, policy_snk_startup);
2051                 }
2052                 break;
2053         }
2054 }
2055
2056 static void fusb_state_snk_ready(struct fusb30x_chip *chip, int evt)
2057 {
2058         /* TODO: snk_ready_function would be added later on*/
2059         platform_fusb_notify(chip);
2060 }
2061
2062 static void fusb_state_snk_send_hardreset(struct fusb30x_chip *chip, int evt)
2063 {
2064         u32 tmp;
2065
2066         switch (chip->sub_state) {
2067         case 0:
2068                 chip->tx_state = tx_idle;
2069                 chip->sub_state++;
2070         default:
2071                 tmp = policy_send_hardrst(chip, evt);
2072                 if (tmp == tx_success) {
2073                         chip->hardrst_count++;
2074                         set_state(chip, policy_snk_transition_default);
2075                 } else if (tmp == tx_failed) {
2076                         set_state(chip, error_recovery);
2077                 }
2078                 break;
2079         }
2080 }
2081
2082 static void fusb_state_snk_send_softreset(struct fusb30x_chip *chip, int evt)
2083 {
2084         u32 tmp;
2085
2086         switch (chip->sub_state) {
2087         case 0:
2088                 set_mesg(chip, CMT_SOFTRESET, CONTROLMESSAGE);
2089                 chip->tx_state = tx_idle;
2090                 chip->sub_state++;
2091         case 1:
2092                 tmp = policy_send_data(chip);
2093                 if (tmp == tx_success) {
2094                         chip->timer_state = T_SENDER_RESPONSE;
2095                         chip->sub_state++;
2096                         fusb_timer_start(&chip->timer_state_machine,
2097                                          chip->timer_state);
2098                 } else if (tmp == tx_failed) {
2099                         /* can't reach here */
2100                         set_state(chip, policy_snk_send_hardrst);
2101                 }
2102
2103                 if (!(evt & FLAG_EVENT))
2104                         break;
2105         default:
2106                 if (evt & EVENT_RX) {
2107                         if ((!PD_HEADER_CNT(chip->rec_head)) &&
2108                             (PD_HEADER_TYPE(chip->rec_head) == CMT_ACCEPT))
2109                                 set_state(chip, policy_snk_wait_caps);
2110                 } else if (evt & EVENT_TIMER_STATE) {
2111                         set_state(chip, policy_snk_send_hardrst);
2112                 }
2113                 break;
2114         }
2115 }
2116
2117 static void state_machine_typec(struct fusb30x_chip *chip)
2118 {
2119         int evt = 0;
2120         int cc1, cc2;
2121
2122         tcpc_alert(chip, &evt);
2123         mux_alert(chip, &evt);
2124         if (!evt)
2125                 goto BACK;
2126
2127         if (chip->notify.is_cc_connected) {
2128                 if (evt & EVENT_CC) {
2129                         if ((chip->cc_state & 0x04) &&
2130                             (chip->conn_state !=
2131                              policy_snk_transition_default)) {
2132                                 if (!tcpm_check_vbus(chip))
2133                                         set_state_unattached(chip);
2134                         } else if (chip->conn_state !=
2135                                    policy_src_transition_default) {
2136                                 tcpm_get_cc(chip, &cc1, &cc2);
2137                                 if (!(chip->cc_state & 0x01))
2138                                         cc1 = cc2;
2139                                 if (cc1 == TYPEC_CC_VOLT_OPEN)
2140                                         set_state_unattached(chip);
2141                         }
2142                 }
2143         }
2144
2145         if (evt & EVENT_RX) {
2146                 tcpm_get_message(chip);
2147                 if ((!PD_HEADER_CNT(chip->rec_head)) &&
2148                     (PD_HEADER_TYPE(chip->rec_head) == CMT_SOFTRESET)) {
2149                         if (chip->notify.power_role)
2150                                 set_state(chip, policy_src_send_softrst);
2151                         else
2152                                 set_state(chip, policy_snk_send_softrst);
2153                 }
2154         }
2155
2156         if (evt & EVENT_TX) {
2157                 if (chip->tx_state == tx_success)
2158                         chip->msg_id++;
2159         }
2160         switch (chip->conn_state) {
2161         case disabled:
2162                 fusb_state_disabled(chip, evt);
2163                 break;
2164         case error_recovery:
2165                 set_state_unattached(chip);
2166                 break;
2167         case unattached:
2168                 fusb_state_unattached(chip, evt);
2169                 break;
2170         case attach_wait_sink:
2171                 fusb_state_attach_wait_sink(chip, evt);
2172                 break;
2173         case attach_wait_source:
2174                 fusb_state_attach_wait_source(chip, evt);
2175                 break;
2176         case attached_source:
2177                 fusb_state_attached_source(chip, evt);
2178                 break;
2179         case attached_sink:
2180                 fusb_state_attached_sink(chip, evt);
2181                 break;
2182
2183         /* POWER DELIVERY */
2184         case policy_src_startup:
2185                 fusb_state_src_startup(chip, evt);
2186                 break;
2187         case policy_src_discovery:
2188                 fusb_state_src_discovery(chip, evt);
2189                 break;
2190         case policy_src_send_caps:
2191                 fusb_state_src_send_caps(chip, evt);
2192                 if (chip->conn_state != policy_src_negotiate_cap)
2193                         break;
2194         case policy_src_negotiate_cap:
2195                 fusb_state_src_negotiate_cap(chip, evt);
2196
2197         case policy_src_transition_supply:
2198                 fusb_state_src_transition_supply(chip, evt);
2199                 break;
2200         case policy_src_cap_response:
2201                 fusb_state_src_cap_response(chip, evt);
2202                 break;
2203         case policy_src_transition_default:
2204                 fusb_state_src_transition_default(chip, evt);
2205                 break;
2206         case policy_src_ready:
2207                 fusb_state_src_ready(chip, evt);
2208                 break;
2209         case policy_src_get_sink_caps:
2210                 fusb_state_src_get_sink_cap(chip, evt);
2211                 break;
2212         case policy_src_send_hardrst:
2213                 fusb_state_src_send_hardreset(chip, evt);
2214                 break;
2215         case policy_src_send_softrst:
2216                 fusb_state_src_send_softreset(chip, evt);
2217                 break;
2218
2219         /* UFP */
2220         case policy_snk_startup:
2221                 fusb_state_snk_startup(chip, evt);
2222                 break;
2223         case policy_snk_discovery:
2224                 fusb_state_snk_discovery(chip, evt);
2225                 break;
2226         case policy_snk_wait_caps:
2227                 fusb_state_snk_wait_caps(chip, evt);
2228                 break;
2229         case policy_snk_evaluate_caps:
2230                 fusb_state_snk_evaluate_caps(chip, evt);
2231                 /* without break */
2232         case policy_snk_select_cap:
2233                 fusb_state_snk_select_cap(chip, evt);
2234                 break;
2235         case policy_snk_transition_sink:
2236                 fusb_state_snk_transition_sink(chip, evt);
2237                 break;
2238         case policy_snk_transition_default:
2239                 fusb_state_snk_transition_default(chip, evt);
2240                 break;
2241         case policy_snk_ready:
2242                 fusb_state_snk_ready(chip, evt);
2243                 break;
2244         case policy_snk_send_hardrst:
2245                 fusb_state_snk_send_hardreset(chip, evt);
2246                 break;
2247         case policy_snk_send_softrst:
2248                 fusb_state_snk_send_softreset(chip, evt);
2249                 break;
2250
2251         default:
2252                 break;
2253         }
2254
2255 BACK:
2256         if (chip->work_continue) {
2257                 queue_work(chip->fusb30x_wq, &chip->work);
2258                 return;
2259         }
2260
2261         if (!platform_get_device_irq_state(chip))
2262                 fusb_irq_enable(chip);
2263         else
2264                 queue_work(chip->fusb30x_wq, &chip->work);
2265 }
2266
2267 static irqreturn_t cc_interrupt_handler(int irq, void *dev_id)
2268 {
2269         struct fusb30x_chip *chip = dev_id;
2270
2271         queue_work(chip->fusb30x_wq, &chip->work);
2272         fusb_irq_disable(chip);
2273         return IRQ_HANDLED;
2274 }
2275
2276 static int fusb_initialize_gpio(struct fusb30x_chip *chip)
2277 {
2278         chip->gpio_int = devm_gpiod_get_optional(chip->dev, "int-n", GPIOD_IN);
2279         if (IS_ERR(chip->gpio_int))
2280                 return PTR_ERR(chip->gpio_int);
2281
2282         /* some board support vbus with other ways */
2283         chip->gpio_vbus_5v = devm_gpiod_get_optional(chip->dev, "vbus-5v",
2284                                                      GPIOD_OUT_LOW);
2285         if (IS_ERR(chip->gpio_vbus_5v))
2286                 dev_warn(chip->dev,
2287                          "Could not get named GPIO for VBus5V!\n");
2288         else
2289                 gpiod_set_raw_value(chip->gpio_vbus_5v, 0);
2290
2291         chip->gpio_vbus_other = devm_gpiod_get_optional(chip->dev,
2292                                                         "vbus-other",
2293                                                         GPIOD_OUT_LOW);
2294         if (IS_ERR(chip->gpio_vbus_other))
2295                 dev_warn(chip->dev,
2296                          "Could not get named GPIO for VBusOther!\n");
2297         else
2298                 gpiod_set_raw_value(chip->gpio_vbus_other, 0);
2299
2300         chip->gpio_discharge = devm_gpiod_get_optional(chip->dev, "discharge",
2301                                                        GPIOD_OUT_LOW);
2302         if (IS_ERR(chip->gpio_discharge)) {
2303                 dev_warn(chip->dev,
2304                          "Could not get named GPIO for discharge!\n");
2305                 chip->gpio_discharge = NULL;
2306         }
2307
2308         return 0;
2309 }
2310
2311 static enum hrtimer_restart fusb_timer_handler(struct hrtimer *timer)
2312 {
2313         int i;
2314
2315         for (i = 0; i < fusb30x_port_used; i++) {
2316                 if (timer == &fusb30x_port_info[i]->timer_state_machine) {
2317                         if (fusb30x_port_info[i]->timer_state != T_DISABLED)
2318                                 fusb30x_port_info[i]->timer_state = 0;
2319                         break;
2320                 }
2321
2322                 if (timer == &fusb30x_port_info[i]->timer_mux_machine) {
2323                         if (fusb30x_port_info[i]->timer_mux != T_DISABLED)
2324                                 fusb30x_port_info[i]->timer_mux = 0;
2325                         break;
2326                 }
2327         }
2328
2329         if (i != fusb30x_port_used)
2330                 queue_work(fusb30x_port_info[i]->fusb30x_wq,
2331                            &fusb30x_port_info[i]->work);
2332
2333         return HRTIMER_NORESTART;
2334 }
2335
2336 static void fusb_initialize_timer(struct fusb30x_chip *chip)
2337 {
2338         hrtimer_init(&chip->timer_state_machine, CLOCK_MONOTONIC,
2339                      HRTIMER_MODE_REL);
2340         chip->timer_state_machine.function = fusb_timer_handler;
2341
2342         hrtimer_init(&chip->timer_mux_machine, CLOCK_MONOTONIC,
2343                      HRTIMER_MODE_REL);
2344         chip->timer_mux_machine.function = fusb_timer_handler;
2345
2346         chip->timer_state = T_DISABLED;
2347         chip->timer_mux = T_DISABLED;
2348 }
2349
2350 static void fusb302_work_func(struct work_struct *work)
2351 {
2352         struct fusb30x_chip *chip;
2353
2354         chip = container_of(work, struct fusb30x_chip, work);
2355         state_machine_typec(chip);
2356 }
2357
2358 static int fusb30x_probe(struct i2c_client *client,
2359                          const struct i2c_device_id *id)
2360 {
2361         struct fusb30x_chip *chip;
2362         struct PD_CAP_INFO *pd_cap_info;
2363         int ret;
2364
2365         chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
2366         if (!chip)
2367                 return -ENOMEM;
2368
2369         if (fusb30x_port_used == 0xff)
2370                 return -1;
2371
2372         chip->port_num = fusb30x_port_used++;
2373         fusb30x_port_info[chip->port_num] = chip;
2374
2375         chip->dev = &client->dev;
2376         chip->regmap = devm_regmap_init_i2c(client, &fusb302_regmap_config);
2377         if (IS_ERR(chip->regmap)) {
2378                 dev_err(&client->dev, "Failed to allocate regmap!\n");
2379                 return PTR_ERR(chip->regmap);
2380         }
2381
2382         ret = fusb_initialize_gpio(chip);
2383         if (ret)
2384                 return ret;
2385
2386         fusb_initialize_timer(chip);
2387
2388         chip->fusb30x_wq = create_workqueue("fusb302_wq");
2389         INIT_WORK(&chip->work, fusb302_work_func);
2390
2391         tcpm_init(chip);
2392         tcpm_set_rx_enable(chip, 0);
2393         chip->conn_state = unattached;
2394         tcpm_set_cc(chip, FUSB_MODE_DRP);
2395
2396         chip->n_caps_used = 1;
2397         chip->source_power_supply[0] = 0x64;
2398         chip->source_max_current[0] = 0x96;
2399
2400         /*
2401          * these two variable should be 1 if support DRP,
2402          * but now we do not support swap,
2403          * it will be blanked in future
2404          */
2405         pd_cap_info = &chip->pd_cap_info;
2406         pd_cap_info->dual_role_power = 0;
2407         pd_cap_info->data_role_swap = 0;
2408
2409         pd_cap_info->externally_powered = 1;
2410         pd_cap_info->usb_suspend_support = 0;
2411         pd_cap_info->usb_communications_cap = 0;
2412         pd_cap_info->supply_type = 0;
2413         pd_cap_info->peak_current = 0;
2414
2415         chip->extcon = devm_extcon_dev_allocate(&client->dev, fusb302_cable);
2416         if (IS_ERR(chip->extcon)) {
2417                 dev_err(&client->dev, "allocat extcon failed\n");
2418                 return PTR_ERR(chip->extcon);
2419         }
2420
2421         ret = devm_extcon_dev_register(&client->dev, chip->extcon);
2422         if (ret) {
2423                 dev_err(&client->dev, "failed to register extcon: %d\n",
2424                         ret);
2425                 return ret;
2426         }
2427
2428         ret = extcon_set_property_capability(chip->extcon, EXTCON_USB,
2429                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2430         if (ret) {
2431                 dev_err(&client->dev,
2432                         "failed to set USB property capability: %d\n",
2433                         ret);
2434                 return ret;
2435         }
2436
2437         ret = extcon_set_property_capability(chip->extcon, EXTCON_USB_HOST,
2438                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2439         if (ret) {
2440                 dev_err(&client->dev,
2441                         "failed to set USB_HOST property capability: %d\n",
2442                         ret);
2443                 return ret;
2444         }
2445
2446         ret = extcon_set_property_capability(chip->extcon, EXTCON_DISP_DP,
2447                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2448         if (ret) {
2449                 dev_err(&client->dev,
2450                         "failed to set DISP_DP property capability: %d\n",
2451                         ret);
2452                 return ret;
2453         }
2454
2455         ret = extcon_set_property_capability(chip->extcon, EXTCON_USB,
2456                                              EXTCON_PROP_USB_SS);
2457         if (ret) {
2458                 dev_err(&client->dev,
2459                         "failed to set USB USB_SS property capability: %d\n",
2460                         ret);
2461                 return ret;
2462         }
2463
2464         ret = extcon_set_property_capability(chip->extcon, EXTCON_USB_HOST,
2465                                              EXTCON_PROP_USB_SS);
2466         if (ret) {
2467                 dev_err(&client->dev,
2468                         "failed to set USB_HOST USB_SS property capability: %d\n",
2469                         ret);
2470                 return ret;
2471         }
2472
2473         ret = extcon_set_property_capability(chip->extcon, EXTCON_DISP_DP,
2474                                              EXTCON_PROP_USB_SS);
2475         if (ret) {
2476                 dev_err(&client->dev,
2477                         "failed to set DISP_DP USB_SS property capability: %d\n",
2478                         ret);
2479                 return ret;
2480         }
2481
2482         ret = extcon_set_property_capability(chip->extcon, EXTCON_CHG_USB_FAST,
2483                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2484         if (ret) {
2485                 dev_err(&client->dev,
2486                         "failed to set USB_PD property capability: %d\n", ret);
2487                 return ret;
2488         }
2489
2490         i2c_set_clientdata(client, chip);
2491
2492         spin_lock_init(&chip->irq_lock);
2493         chip->enable_irq = 1;
2494
2495         chip->gpio_int_irq = gpiod_to_irq(chip->gpio_int);
2496         if (chip->gpio_int_irq < 0) {
2497                 dev_err(&client->dev,
2498                         "Unable to request IRQ for INT_N GPIO! %d\n",
2499                         ret);
2500                 ret = chip->gpio_int_irq;
2501                 goto IRQ_ERR;
2502         }
2503
2504         ret = devm_request_threaded_irq(&client->dev,
2505                                         chip->gpio_int_irq,
2506                                         NULL,
2507                                         cc_interrupt_handler,
2508                                         IRQF_ONESHOT | IRQF_TRIGGER_LOW,
2509                                         client->name,
2510                                         chip);
2511         if (ret) {
2512                 dev_err(&client->dev, "irq request failed\n");
2513                 goto IRQ_ERR;
2514         }
2515
2516         dev_info(chip->dev, "port %d probe success\n", chip->port_num);
2517
2518         return 0;
2519
2520 IRQ_ERR:
2521         destroy_workqueue(chip->fusb30x_wq);
2522         return ret;
2523 }
2524
2525 static int fusb30x_remove(struct i2c_client *client)
2526 {
2527         struct fusb30x_chip *chip = i2c_get_clientdata(client);
2528
2529         destroy_workqueue(chip->fusb30x_wq);
2530         return 0;
2531 }
2532
2533 static void fusb30x_shutdown(struct i2c_client *client)
2534 {
2535         struct fusb30x_chip *chip = i2c_get_clientdata(client);
2536
2537         if (chip->gpio_vbus_5v)
2538                 gpiod_set_value(chip->gpio_vbus_5v, 0);
2539         if (chip->gpio_discharge) {
2540                 gpiod_set_value(chip->gpio_discharge, 1);
2541                 msleep(100);
2542                 gpiod_set_value(chip->gpio_discharge, 0);
2543         }
2544 }
2545
2546 static const struct of_device_id fusb30x_dt_match[] = {
2547         { .compatible = FUSB30X_I2C_DEVICETREE_NAME },
2548         {},
2549 };
2550 MODULE_DEVICE_TABLE(of, fusb30x_dt_match);
2551
2552 static const struct i2c_device_id fusb30x_i2c_device_id[] = {
2553         { FUSB30X_I2C_DRIVER_NAME, 0 },
2554         {}
2555 };
2556 MODULE_DEVICE_TABLE(i2c, fusb30x_i2c_device_id);
2557
2558 static struct i2c_driver fusb30x_driver = {
2559         .driver = {
2560                 .name = FUSB30X_I2C_DRIVER_NAME,
2561                 .of_match_table = of_match_ptr(fusb30x_dt_match),
2562         },
2563         .probe = fusb30x_probe,
2564         .remove = fusb30x_remove,
2565         .shutdown = fusb30x_shutdown,
2566         .id_table = fusb30x_i2c_device_id,
2567 };
2568
2569 module_i2c_driver(fusb30x_driver);
2570
2571 MODULE_LICENSE("GPL");
2572 MODULE_AUTHOR("zain wang <zain.wang@rock-chips.com>");
2573 MODULE_DESCRIPTION("fusb302 typec pd driver");