drivers/mfd/fusb302.c

   1 /*
   2  * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd
   3  * Author: Zain Wang <zain.wang@rock-chips.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * Some ideas are from chrome ec and fairchild GPL fusb302 driver.
  10  */
  11
  12 #include <linux/delay.h>
  13 #include <linux/extcon.h>
  14 #include <linux/freezer.h>
  15 #include <linux/gpio.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/module.h>
  18 #include <linux/of_gpio.h>
  19 #include <linux/regmap.h>
  20 #include <linux/power_supply.h>
  21
  22 #include "fusb302.h"
  23
  24 #define FUSB302_MAX_REG         (FUSB_REG_FIFO + 50)
  25 #define FUSB_MS_TO_NS(x)        ((s64)x * 1000 * 1000)
  26
  27 #define FUSB_MODE_DRP           0
  28 #define FUSB_MODE_UFP           1
  29 #define FUSB_MODE_DFP           2
  30 #define FUSB_MODE_ASS           3
  31
  32 #define TYPEC_CC_VOLT_OPEN      0
  33 #define TYPEC_CC_VOLT_RA        1
  34 #define TYPEC_CC_VOLT_RD        2
  35 #define TYPEC_CC_VOLT_RP        3
  36
  37 #define EVENT_CC                BIT(0)
  38 #define EVENT_RX                BIT(1)
  39 #define EVENT_TX                BIT(2)
  40 #define EVENT_REC_RESET         BIT(3)
  41 #define EVENT_WORK_CONTINUE     BIT(5)
  42 #define EVENT_TIMER_MUX         BIT(6)
  43 #define EVENT_TIMER_STATE       BIT(7)
  44 #define FLAG_EVENT              (EVENT_RX | EVENT_TIMER_MUX | \
  45                                  EVENT_TIMER_STATE)
  46
  47 #define PIN_MAP_A               BIT(0)
  48 #define PIN_MAP_B               BIT(1)
  49 #define PIN_MAP_C               BIT(2)
  50 #define PIN_MAP_D               BIT(3)
  51 #define PIN_MAP_E               BIT(4)
  52 #define PIN_MAP_F               BIT(5)
  53
  54 static u8 fusb30x_port_used;
  55 static struct fusb30x_chip *fusb30x_port_info[256];
  56
  57 static bool is_write_reg(struct device *dev, unsigned int reg)
  58 {
  59         if (reg >= FUSB_REG_FIFO)
  60                 return true;
  61         else
  62                 return ((reg < (FUSB_REG_CONTROL4 + 1)) && (reg > 0x01)) ?
  63                         true : false;
  64 }
  65
  66 static bool is_volatile_reg(struct device *dev, unsigned int reg)
  67 {
  68         if (reg > FUSB_REG_CONTROL4)
  69                 return true;
  70
  71         switch (reg) {
  72         case FUSB_REG_CONTROL0:
  73         case FUSB_REG_CONTROL1:
  74         case FUSB_REG_CONTROL3:
  75         case FUSB_REG_RESET:
  76                 return true;
  77         }
  78         return false;
  79 }
  80
  81 struct regmap_config fusb302_regmap_config = {
  82         .reg_bits = 8,
  83         .val_bits = 8,
  84         .writeable_reg = is_write_reg,
  85         .volatile_reg = is_volatile_reg,
  86         .max_register = FUSB302_MAX_REG,
  87         .cache_type = REGCACHE_RBTREE,
  88 };
  89
  90 static void dump_notify_info(struct fusb30x_chip *chip)
  91 {
  92         dev_dbg(chip->dev, "port        %d\n", chip->port_num);
  93         dev_dbg(chip->dev, "orientation %d\n", chip->notify.orientation);
  94         dev_dbg(chip->dev, "power_role  %d\n", chip->notify.power_role);
  95         dev_dbg(chip->dev, "data_role   %d\n", chip->notify.data_role);
  96         dev_dbg(chip->dev, "cc          %d\n", chip->notify.is_cc_connected);
  97         dev_dbg(chip->dev, "pd          %d\n", chip->notify.is_pd_connected);
  98         dev_dbg(chip->dev, "enter_mode  %d\n", chip->notify.is_enter_mode);
  99         dev_dbg(chip->dev, "pin support %d\n",
 100                 chip->notify.pin_assignment_support);
 101         dev_dbg(chip->dev, "pin def     %d\n", chip->notify.pin_assignment_def);
 102         dev_dbg(chip->dev, "attention   %d\n", chip->notify.attention);
 103 }
 104
 105 static const unsigned int fusb302_cable[] = {
 106         EXTCON_USB,
 107         EXTCON_USB_HOST,
 108         EXTCON_USB_VBUS_EN,
 109         EXTCON_CHG_USB_SDP,
 110         EXTCON_CHG_USB_CDP,
 111         EXTCON_CHG_USB_DCP,
 112         EXTCON_CHG_USB_SLOW,
 113         EXTCON_CHG_USB_FAST,
 114         EXTCON_DISP_DP,
 115         EXTCON_NONE,
 116 };
 117
 118 static void fusb_set_pos_power(struct fusb30x_chip *chip, int max_vol,
 119                                int max_cur)
 120 {
 121         int i;
 122         int pos_find;
 123         int tmp;
 124
 125         pos_find = 0;
 126         for (i = PD_HEADER_CNT(chip->rec_head) - 1; i >= 0; i--) {
 127                 switch (CAP_POWER_TYPE(chip->rec_load[i])) {
 128                 case 0:
 129                         /* Fixed Supply */
 130                         if ((CAP_FPDO_VOLTAGE(chip->rec_load[i]) * 50) <=
 131                             max_vol &&
 132                             (CAP_FPDO_CURRENT(chip->rec_load[i]) * 10) <=
 133                             max_cur) {
 134                                 chip->pos_power = i + 1;
 135                                 tmp = CAP_FPDO_VOLTAGE(chip->rec_load[i]);
 136                                 chip->pd_output_vol = tmp * 50;
 137                                 tmp = CAP_FPDO_CURRENT(chip->rec_load[i]);
 138                                 chip->pd_output_cur = tmp * 10;
 139                                 pos_find = 1;
 140                         }
 141                         break;
 142                 case 1:
 143                         /* Battery */
 144                         if ((CAP_VPDO_VOLTAGE(chip->rec_load[i]) * 50) <=
 145                             max_vol &&
 146                             (CAP_VPDO_CURRENT(chip->rec_load[i]) * 10) <=
 147                             max_cur) {
 148                                 chip->pos_power = i + 1;
 149                                 tmp = CAP_VPDO_VOLTAGE(chip->rec_load[i]);
 150                                 chip->pd_output_vol = tmp * 50;
 151                                 tmp = CAP_VPDO_CURRENT(chip->rec_load[i]);
 152                                 chip->pd_output_cur = tmp * 10;
 153                                 pos_find = 1;
 154                         }
 155                         break;
 156                 default:
 157                         /* not meet battery caps */
 158                         break;
 159                 }
 160                 if (pos_find)
 161                         break;
 162         }
 163 }
 164
 165 static int fusb302_set_pos_power_by_charge_ic(struct fusb30x_chip *chip)
 166 {
 167         struct power_supply *psy = NULL;
 168         union power_supply_propval val;
 169         enum power_supply_property psp;
 170         int max_vol, max_cur;
 171
 172         max_vol = 0;
 173         max_cur = 0;
 174         psy = power_supply_get_by_phandle(chip->dev->of_node, "charge-dev");
 175         if (!psy || IS_ERR(psy))
 176                 return -1;
 177
 178         psp = POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT_MAX;
 179         if (power_supply_get_property(psy, psp, &val) == 0)
 180                 max_vol = val.intval / 1000;
 181
 182         psp = POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT;
 183         if (power_supply_get_property(psy, psp, &val) == 0)
 184                 max_cur = val.intval / 1000;
 185
 186         if (max_vol > 0 && max_cur > 0)
 187                 fusb_set_pos_power(chip, max_vol, max_cur);
 188
 189         return 0;
 190 }
 191
 192 void fusb_irq_disable(struct fusb30x_chip *chip)
 193 {
 194         unsigned long irqflags = 0;
 195
 196         spin_lock_irqsave(&chip->irq_lock, irqflags);
 197         if (chip->enable_irq) {
 198                 disable_irq_nosync(chip->gpio_int_irq);
 199                 chip->enable_irq = 0;
 200         } else {
 201                 dev_warn(chip->dev, "irq have already disabled\n");
 202         }
 203         spin_unlock_irqrestore(&chip->irq_lock, irqflags);
 204 }
 205
 206 void fusb_irq_enable(struct fusb30x_chip *chip)
 207 {
 208         unsigned long irqflags = 0;
 209
 210         spin_lock_irqsave(&chip->irq_lock, irqflags);
 211         if (!chip->enable_irq) {
 212                 enable_irq(chip->gpio_int_irq);
 213                 chip->enable_irq = 1;
 214         }
 215         spin_unlock_irqrestore(&chip->irq_lock, irqflags);
 216 }
 217
 218 static void platform_fusb_notify(struct fusb30x_chip *chip)
 219 {
 220         bool plugged = 0, flip = 0, dfp = 0, ufp = 0, dp = 0, usb_ss = 0;
 221         union extcon_property_value property;
 222
 223         if (chip->notify.is_cc_connected)
 224                 chip->notify.orientation = chip->cc_polarity + 1;
 225
 226         /* avoid notify repeated */
 227         if (memcmp(&chip->notify, &chip->notify_cmp,
 228                    sizeof(struct notify_info))) {
 229                 dump_notify_info(chip);
 230                 chip->notify.attention = 0;
 231                 memcpy(&chip->notify_cmp, &chip->notify,
 232                        sizeof(struct notify_info));
 233
 234                 plugged = chip->notify.is_cc_connected ||
 235                           chip->notify.is_pd_connected;
 236                 flip = chip->notify.orientation ?
 237                        (chip->notify.orientation - 1) : 0;
 238                 dp = chip->notify.is_enter_mode;
 239
 240                 if (dp) {
 241                         dfp = 1;
 242                         usb_ss = (chip->notify.pin_assignment_def &
 243                                 (PIN_MAP_B | PIN_MAP_D | PIN_MAP_F)) ? 1 : 0;
 244                 } else if (chip->notify.data_role) {
 245                         dfp = 1;
 246                         usb_ss = 1;
 247                 } else if (plugged) {
 248                         ufp = 1;
 249                         usb_ss = 1;
 250                 }
 251
 252                 if (chip->notify.power_role == 0 &&
 253                     chip->notify.is_pd_connected &&
 254                     chip->pd_output_vol > 0 && chip->pd_output_cur > 0) {
 255                         extcon_set_state(chip->extcon, EXTCON_CHG_USB_FAST,
 256                                          true);
 257                         property.intval =
 258                                 (chip->pd_output_cur << 15 |
 259                                  chip->pd_output_vol);
 260                         extcon_set_property(chip->extcon, EXTCON_CHG_USB_FAST,
 261                                             EXTCON_PROP_USB_TYPEC_POLARITY,
 262                                             property);
 263                         extcon_sync(chip->extcon, EXTCON_CHG_USB_FAST);
 264                 }
 265
 266 #ifdef CONFIG_FREEZER
 267                 /*
 268                  * If system enter PM suspend, we need to wait until
 269                  * PM resume all of devices completion, then the flag
 270                  * pm_freezing will be set to false, and we can send
 271                  * notifier to USB/DP module safety, it make sure that
 272                  * USB/DP can enable power domain successfully.
 273                  */
 274                 while (pm_freezing)
 275                         usleep_range(10000, 11000);
 276 #endif
 277
 278                 property.intval = flip;
 279                 extcon_set_property(chip->extcon, EXTCON_USB,
 280                                     EXTCON_PROP_USB_TYPEC_POLARITY, property);
 281                 extcon_set_property(chip->extcon, EXTCON_USB_HOST,
 282                                     EXTCON_PROP_USB_TYPEC_POLARITY, property);
 283                 extcon_set_property(chip->extcon, EXTCON_DISP_DP,
 284                                     EXTCON_PROP_USB_TYPEC_POLARITY, property);
 285
 286                 property.intval = usb_ss;
 287                 extcon_set_property(chip->extcon, EXTCON_USB,
 288                                     EXTCON_PROP_USB_SS, property);
 289                 extcon_set_property(chip->extcon, EXTCON_USB_HOST,
 290                                     EXTCON_PROP_USB_SS, property);
 291                 extcon_set_property(chip->extcon, EXTCON_DISP_DP,
 292                                     EXTCON_PROP_USB_SS, property);
 293                 extcon_set_state(chip->extcon, EXTCON_USB, ufp);
 294                 extcon_set_state(chip->extcon, EXTCON_USB_HOST, dfp);
 295                 extcon_set_state(chip->extcon, EXTCON_DISP_DP, dp);
 296                 extcon_sync(chip->extcon, EXTCON_USB);
 297                 extcon_sync(chip->extcon, EXTCON_USB_HOST);
 298                 extcon_sync(chip->extcon, EXTCON_DISP_DP);
 299         }
 300 }
 301
 302 static bool platform_get_device_irq_state(struct fusb30x_chip *chip)
 303 {
 304         return !gpiod_get_value(chip->gpio_int);
 305 }
 306
 307 static void fusb_timer_start(struct hrtimer *timer, int ms)
 308 {
 309         ktime_t ktime;
 310
 311         ktime = ktime_set(0, FUSB_MS_TO_NS(ms));
 312         hrtimer_start(timer, ktime, HRTIMER_MODE_REL);
 313 }
 314
 315 static void platform_set_vbus_lvl_enable(struct fusb30x_chip *chip, int vbus_5v,
 316                                          int vbus_other)
 317 {
 318         bool gpio_vbus_value = 0;
 319
 320         gpio_vbus_value = gpiod_get_value(chip->gpio_vbus_5v);
 321         if (chip->gpio_vbus_5v) {
 322                 gpiod_set_raw_value(chip->gpio_vbus_5v, vbus_5v);
 323                 /* Only set state here, don't sync notifier to PMIC */
 324                 extcon_set_state(chip->extcon, EXTCON_USB_VBUS_EN, vbus_5v);
 325         } else {
 326                 extcon_set_state(chip->extcon, EXTCON_USB_VBUS_EN, vbus_5v);
 327                 extcon_sync(chip->extcon, EXTCON_USB_VBUS_EN);
 328                 dev_info(chip->dev, "fusb302 send extcon to %s vbus 5v\n", vbus_5v ? "enable" : "disable");
 329         }
 330
 331         if (chip->gpio_vbus_other)
 332                 gpiod_set_raw_value(chip->gpio_vbus_5v, vbus_other);
 333
 334         if (chip->gpio_discharge && !vbus_5v && gpio_vbus_value) {
 335                 gpiod_set_value(chip->gpio_discharge, 1);
 336                 msleep(20);
 337                 gpiod_set_value(chip->gpio_discharge, 0);
 338         }
 339 }
 340
 341 static void set_state(struct fusb30x_chip *chip, enum connection_state state)
 342 {
 343         dev_dbg(chip->dev, "port %d, state %d\n", chip->port_num, state);
 344         if (!state)
 345                 dev_info(chip->dev, "PD disabled\n");
 346         chip->conn_state = state;
 347         chip->sub_state = 0;
 348         chip->val_tmp = 0;
 349         chip->work_continue = 1;
 350 }
 351
 352 static int tcpm_get_message(struct fusb30x_chip *chip)
 353 {
 354         u8 buf[32];
 355         int len;
 356
 357         regmap_raw_read(chip->regmap, FUSB_REG_FIFO, buf, 3);
 358         chip->rec_head = (buf[1] & 0xff) | ((buf[2] << 8) & 0xff00);
 359
 360         len = PD_HEADER_CNT(chip->rec_head) << 2;
 361         regmap_raw_read(chip->regmap, FUSB_REG_FIFO, buf, len + 4);
 362
 363         memcpy(chip->rec_load, buf, len);
 364
 365         return 0;
 366 }
 367
 368 static void fusb302_flush_rx_fifo(struct fusb30x_chip *chip)
 369 {
 370         tcpm_get_message(chip);
 371 }
 372
 373 static int tcpm_get_cc(struct fusb30x_chip *chip, int *CC1, int *CC2)
 374 {
 375         u32 val;
 376         int *CC_MEASURE;
 377         u32 store;
 378
 379         *CC1 = TYPEC_CC_VOLT_OPEN;
 380         *CC2 = TYPEC_CC_VOLT_OPEN;
 381
 382         if (chip->cc_state & 0x01)
 383                 CC_MEASURE = CC1;
 384         else
 385                 CC_MEASURE = CC2;
 386
 387         if (chip->cc_state & 0x04) {
 388                 regmap_read(chip->regmap, FUSB_REG_SWITCHES0, &store);
 389                 /* measure cc1 first */
 390                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 391                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
 392                                    SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 393                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
 394                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2 |
 395                                    SWITCHES0_MEAS_CC1);
 396                 usleep_range(250, 300);
 397
 398                 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 399                 val &= STATUS0_BC_LVL;
 400                 if (val)
 401                         *CC1 = val;
 402
 403                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 404                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
 405                                    SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 406                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
 407                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2 |
 408                                    SWITCHES0_MEAS_CC2);
 409                 usleep_range(250, 300);
 410
 411                 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 412                 val &= STATUS0_BC_LVL;
 413                 if (val)
 414                         *CC2 = val;
 415                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 416                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 417                                    store);
 418         } else {
 419                 regmap_read(chip->regmap, FUSB_REG_SWITCHES0, &store);
 420                 val = store;
 421                 val &= ~(SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
 422                                 SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2);
 423                 if (chip->cc_state & 0x01) {
 424                         val |= SWITCHES0_MEAS_CC1 | SWITCHES0_PU_EN1;
 425                 } else {
 426                         val |= SWITCHES0_MEAS_CC2 | SWITCHES0_PU_EN2;
 427                 }
 428                 regmap_write(chip->regmap, FUSB_REG_SWITCHES0, val);
 429
 430                 regmap_write(chip->regmap, FUSB_REG_MEASURE, chip->cc_meas_high);
 431                 usleep_range(250, 300);
 432
 433                 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 434                 if (val & STATUS0_COMP) {
 435                         int retry = 3;
 436                         int comp_times = 0;
 437
 438                         while (retry--) {
 439                                 regmap_write(chip->regmap, FUSB_REG_MEASURE, chip->cc_meas_high);
 440                                 usleep_range(250, 300);
 441                                 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 442                                 if (val & STATUS0_COMP) {
 443                                         comp_times++;
 444                                         if (comp_times == 3) {
 445                                                 *CC_MEASURE = TYPEC_CC_VOLT_OPEN;
 446                                                 regmap_write(chip->regmap, FUSB_REG_SWITCHES0, store);
 447                                         }
 448                                 }
 449                         }
 450                 } else {
 451                         regmap_write(chip->regmap, FUSB_REG_MEASURE, chip->cc_meas_low);
 452                         regmap_read(chip->regmap, FUSB_REG_MEASURE, &val);
 453                         usleep_range(250, 300);
 454
 455                         regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 456
 457                         if (val & STATUS0_COMP)
 458                                 *CC_MEASURE = TYPEC_CC_VOLT_RD;
 459                         else
 460                                 *CC_MEASURE = TYPEC_CC_VOLT_RA;
 461                         regmap_write(chip->regmap, FUSB_REG_SWITCHES0, store);
 462                 }
 463         }
 464
 465         return 0;
 466 }
 467
 468 static int tcpm_set_cc(struct fusb30x_chip *chip, int mode)
 469 {
 470         u8 val = 0, mask;
 471
 472         val &= ~(SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 473                  SWITCHES0_PDWN1 | SWITCHES0_PDWN2);
 474
 475         mask = ~val;
 476
 477         switch (mode) {
 478         case FUSB_MODE_DFP:
 479                 if (chip->togdone_pullup)
 480                         val |= SWITCHES0_PU_EN2;
 481                 else
 482                         val |= SWITCHES0_PU_EN1;
 483                 break;
 484         case FUSB_MODE_UFP:
 485                 val |= SWITCHES0_PDWN1 | SWITCHES0_PDWN2;
 486                 break;
 487         case FUSB_MODE_DRP:
 488                 val |= SWITCHES0_PDWN1 | SWITCHES0_PDWN2;
 489                 break;
 490         case FUSB_MODE_ASS:
 491                 break;
 492         }
 493
 494         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0, mask, val);
 495         return 0;
 496 }
 497
 498 static int tcpm_set_rx_enable(struct fusb30x_chip *chip, int enable)
 499 {
 500         u8 val = 0;
 501
 502         if (enable) {
 503                 if (chip->cc_polarity)
 504                         val |= SWITCHES0_MEAS_CC2;
 505                 else
 506                         val |= SWITCHES0_MEAS_CC1;
 507                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 508                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 509                                    val);
 510                 fusb302_flush_rx_fifo(chip);
 511                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 512                                    SWITCHES1_AUTO_CRC, SWITCHES1_AUTO_CRC);
 513         } else {
 514                 /*
 515                  * bit of a hack here.
 516                  * when this function is called to disable rx (enable=0)
 517                  * using it as an indication of detach (gulp!)
 518                  * to reset our knowledge of where
 519                  * the toggle state machine landed.
 520                  */
 521                 chip->togdone_pullup = 0;
 522
 523 #ifdef  FUSB_HAVE_DRP
 524                 tcpm_set_cc(chip, FUSB_MODE_DRP);
 525                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 526                                    CONTROL2_TOG_RD_ONLY,
 527                                    CONTROL2_TOG_RD_ONLY);
 528 #endif
 529                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 530                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 531                                    0);
 532                 regmap_update_bits(chip->regmap,
 533                                    FUSB_REG_SWITCHES1, SWITCHES1_AUTO_CRC, 0);
 534         }
 535
 536         return 0;
 537 }
 538
 539 static int tcpm_set_msg_header(struct fusb30x_chip *chip)
 540 {
 541         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 542                            SWITCHES1_POWERROLE | SWITCHES1_DATAROLE,
 543                            (chip->notify.power_role << 7) |
 544                            (chip->notify.data_role << 4));
 545         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 546                            SWITCHES1_SPECREV, 2 << 5);
 547         return 0;
 548 }
 549
 550 static int tcpm_set_polarity(struct fusb30x_chip *chip, bool polarity)
 551 {
 552         u8 val = 0;
 553
 554 #ifdef FUSB_VCONN_SUPPORT
 555         if (chip->vconn_enabled) {
 556                 if (polarity)
 557                         val |= SWITCHES0_VCONN_CC1;
 558                 else
 559                         val |= SWITCHES0_VCONN_CC2;
 560         }
 561 #endif
 562
 563         if (polarity)
 564                 val |= SWITCHES0_MEAS_CC2;
 565         else
 566                 val |= SWITCHES0_MEAS_CC1;
 567
 568         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 569                            SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2 |
 570                            SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 571                            val);
 572
 573         val = 0;
 574         if (polarity)
 575                 val |= SWITCHES1_TXCC2;
 576         else
 577                 val |= SWITCHES1_TXCC1;
 578         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 579                            SWITCHES1_TXCC1 | SWITCHES1_TXCC2,
 580                            val);
 581
 582         chip->cc_polarity = polarity;
 583
 584         return 0;
 585 }
 586
 587 static int tcpm_set_vconn(struct fusb30x_chip *chip, int enable)
 588 {
 589         u8 val = 0;
 590
 591         if (enable) {
 592                 tcpm_set_polarity(chip, chip->cc_polarity);
 593         } else {
 594                 val &= ~(SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2);
 595                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 596                                    SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2,
 597                                    val);
 598         }
 599         chip->vconn_enabled = enable;
 600         return 0;
 601 }
 602
 603 static void fusb302_pd_reset(struct fusb30x_chip *chip)
 604 {
 605         regmap_write(chip->regmap, FUSB_REG_RESET, RESET_PD_RESET);
 606         regmap_reinit_cache(chip->regmap, &fusb302_regmap_config);
 607 }
 608
 609 static void tcpm_select_rp_value(struct fusb30x_chip *chip, u32 rp)
 610 {
 611         u32 control0_reg;
 612
 613         regmap_read(chip->regmap, FUSB_REG_CONTROL0, &control0_reg);
 614
 615         control0_reg &= ~CONTROL0_HOST_CUR;
 616         /*
 617          * according to the host current, the compare value is different
 618         */
 619         switch (rp) {
 620         /* host pull up current is 80ua , high voltage is 1.596v, low is 0.21v */
 621         case TYPEC_RP_USB:
 622                 chip->cc_meas_high = 0x26;
 623                 chip->cc_meas_low = 0x5;
 624                 control0_reg |= CONTROL0_HOST_CUR_USB;
 625                 break;
 626         /* host pull up current is 180ua , high voltage is 1.596v, low is 0.42v */
 627         case TYPEC_RP_1A5:
 628                 chip->cc_meas_high = 0x26;
 629                 chip->cc_meas_low = 0xa;
 630                 control0_reg |= CONTROL0_HOST_CUR_1A5;
 631                 break;
 632         /* host pull up current is 330ua , high voltage is 2.604v, low is 0.798v*/
 633         case TYPEC_RP_3A0:
 634                 chip->cc_meas_high = 0x26;
 635                 chip->cc_meas_low = 0x13;
 636                 control0_reg |= CONTROL0_HOST_CUR_3A0;
 637                 break;
 638         default:
 639                 chip->cc_meas_high = 0x26;
 640                 chip->cc_meas_low = 0xa;
 641                 control0_reg |= CONTROL0_HOST_CUR_1A5;
 642                 break;
 643         }
 644
 645         regmap_write(chip->regmap, FUSB_REG_CONTROL0, control0_reg);
 646 }
 647
 648 static void tcpm_init(struct fusb30x_chip *chip)
 649 {
 650         u8 val;
 651         u32 tmp;
 652
 653         regmap_read(chip->regmap, FUSB_REG_DEVICEID, &tmp);
 654         chip->chip_id = (u8)tmp;
 655         platform_set_vbus_lvl_enable(chip, 0, 0);
 656         chip->notify.is_cc_connected = 0;
 657         chip->cc_state = 0;
 658
 659         /* restore default settings */
 660         regmap_update_bits(chip->regmap, FUSB_REG_RESET, RESET_SW_RESET,
 661                            RESET_SW_RESET);
 662         fusb302_pd_reset(chip);
 663         /* set auto_retry and number of retries */
 664         regmap_update_bits(chip->regmap, FUSB_REG_CONTROL3,
 665                            CONTROL3_AUTO_RETRY | CONTROL3_N_RETRIES,
 666                            CONTROL3_AUTO_RETRY | CONTROL3_N_RETRIES),
 667
 668         /* set interrupts */
 669         val = 0xff;
 670         val &= ~(MASK_M_BC_LVL | MASK_M_COLLISION | MASK_M_ALERT |
 671                  MASK_M_VBUSOK);
 672         regmap_write(chip->regmap, FUSB_REG_MASK, val);
 673
 674         val = 0xff;
 675         val &= ~(MASKA_M_TOGDONE | MASKA_M_RETRYFAIL | MASKA_M_HARDSENT |
 676                  MASKA_M_TXSENT | MASKA_M_HARDRST);
 677         regmap_write(chip->regmap, FUSB_REG_MASKA, val);
 678
 679         val = 0xff;
 680         val = ~MASKB_M_GCRCSEND;
 681         regmap_write(chip->regmap, FUSB_REG_MASKB, val);
 682
 683 #ifdef  FUSB_HAVE_DRP
 684                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 685                                    CONTROL2_MODE | CONTROL2_TOGGLE,
 686                                    (1 << 1) | CONTROL2_TOGGLE);
 687
 688                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 689                                    CONTROL2_TOG_RD_ONLY,
 690                                    CONTROL2_TOG_RD_ONLY);
 691 #endif
 692
 693         tcpm_select_rp_value(chip, TYPEC_RP_1A5);
 694         /* Interrupts Enable */
 695         regmap_update_bits(chip->regmap, FUSB_REG_CONTROL0, CONTROL0_INT_MASK,
 696                            ~CONTROL0_INT_MASK);
 697
 698         tcpm_set_polarity(chip, 0);
 699         tcpm_set_vconn(chip, 0);
 700
 701         regmap_write(chip->regmap, FUSB_REG_POWER, 0xf);
 702 }
 703
 704 static void pd_execute_hard_reset(struct fusb30x_chip *chip)
 705 {
 706         chip->msg_id = 0;
 707         chip->vdm_state = 0;
 708         if (chip->notify.power_role)
 709                 set_state(chip, policy_src_transition_default);
 710         else
 711                 set_state(chip, policy_snk_transition_default);
 712 }
 713
 714 static void tcpc_alert(struct fusb30x_chip *chip, int *evt)
 715 {
 716         int interrupt, interrupta, interruptb;
 717         u32 val;
 718
 719         regmap_read(chip->regmap, FUSB_REG_INTERRUPT, &interrupt);
 720         regmap_read(chip->regmap, FUSB_REG_INTERRUPTA, &interrupta);
 721         regmap_read(chip->regmap, FUSB_REG_INTERRUPTB, &interruptb);
 722
 723         if (interrupt & INTERRUPT_BC_LVL) {
 724                 if (chip->notify.is_cc_connected)
 725                         *evt |= EVENT_CC;
 726         }
 727
 728         if (interrupt & INTERRUPT_VBUSOK) {
 729                 if (chip->notify.is_cc_connected)
 730                         *evt |= EVENT_CC;
 731         }
 732
 733         if (interrupta & INTERRUPTA_TOGDONE) {
 734                 *evt |= EVENT_CC;
 735                 regmap_read(chip->regmap, FUSB_REG_STATUS1A, &val);
 736                 chip->cc_state = ((u8)val >> 3) & 0x07;
 737
 738                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 739                                    CONTROL2_TOGGLE,
 740                                    0);
 741
 742                 val &= ~(SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 743                          SWITCHES0_PDWN1 | SWITCHES0_PDWN2);
 744
 745                 if (chip->cc_state & 0x01)
 746                         val |= SWITCHES0_PU_EN1;
 747                 else
 748                         val |= SWITCHES0_PU_EN2;
 749
 750                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 751                                    SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 752                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
 753                                    val);
 754         }
 755
 756         if (interrupta & INTERRUPTA_TXSENT) {
 757                 *evt |= EVENT_TX;
 758                 fusb302_flush_rx_fifo(chip);
 759                 chip->tx_state = tx_success;
 760         }
 761
 762         if (interruptb & INTERRUPTB_GCRCSENT)
 763                 *evt |= EVENT_RX;
 764
 765         if (interrupta & INTERRUPTA_HARDRST) {
 766                 fusb302_pd_reset(chip);
 767                 pd_execute_hard_reset(chip);
 768                 *evt |= EVENT_REC_RESET;
 769         }
 770
 771         if (interrupta & INTERRUPTA_RETRYFAIL) {
 772                 *evt |= EVENT_TX;
 773                 chip->tx_state = tx_failed;
 774         }
 775
 776         if (interrupta & INTERRUPTA_HARDSENT) {
 777                 chip->tx_state = tx_success;
 778                 chip->timer_state = T_DISABLED;
 779                 *evt |= EVENT_TX;
 780         }
 781 }
 782
 783 static void mux_alert(struct fusb30x_chip *chip, int *evt)
 784 {
 785         if (!chip->timer_mux) {
 786                 *evt |= EVENT_TIMER_MUX;
 787                 chip->timer_mux = T_DISABLED;
 788         }
 789
 790         if (!chip->timer_state) {
 791                 *evt |= EVENT_TIMER_STATE;
 792                 chip->timer_state = T_DISABLED;
 793         }
 794
 795         if (chip->work_continue) {
 796                 *evt |= EVENT_WORK_CONTINUE;
 797                 chip->work_continue = 0;
 798         }
 799 }
 800
 801 static void set_state_unattached(struct fusb30x_chip *chip)
 802 {
 803         dev_info(chip->dev, "connection has disconnected\n");
 804         tcpm_init(chip);
 805         tcpm_set_rx_enable(chip, 0);
 806         chip->conn_state = unattached;
 807         tcpm_set_cc(chip, FUSB_MODE_DRP);
 808
 809         /* claer notify_info */
 810         memset(&chip->notify, 0, sizeof(struct notify_info));
 811         platform_fusb_notify(chip);
 812
 813         if (chip->gpio_discharge)
 814                 gpiod_set_value(chip->gpio_discharge, 1);
 815         msleep(100);
 816         if (chip->gpio_discharge)
 817                 gpiod_set_value(chip->gpio_discharge, 0);
 818 }
 819
 820 static int tcpm_check_vbus(struct fusb30x_chip *chip)
 821 {
 822         u32 val;
 823
 824         /* Read status register */
 825         regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 826
 827         return (val & STATUS0_VBUSOK) ? 1 : 0;
 828 }
 829
 830 static void set_mesg(struct fusb30x_chip *chip, int cmd, int is_DMT)
 831 {
 832         int i;
 833         struct PD_CAP_INFO *pd_cap_info = &chip->pd_cap_info;
 834
 835         chip->send_head = ((chip->msg_id & 0x7) << 9) |
 836                          ((chip->notify.power_role & 0x1) << 8) |
 837                          (1 << 6) |
 838                          ((chip->notify.data_role & 0x1) << 5);
 839
 840         if (is_DMT) {
 841                 switch (cmd) {
 842                 case DMT_SOURCECAPABILITIES:
 843                         chip->send_head |= ((chip->n_caps_used & 0x3) << 12) | (cmd & 0xf);
 844
 845                         for (i = 0; i < chip->n_caps_used; i++) {
 846                                 chip->send_load[i] = (pd_cap_info->supply_type << 30) |
 847                                                     (pd_cap_info->dual_role_power << 29) |
 848                                                     (pd_cap_info->usb_suspend_support << 28) |
 849                                                     (pd_cap_info->externally_powered << 27) |
 850                                                     (pd_cap_info->usb_communications_cap << 26) |
 851                                                     (pd_cap_info->data_role_swap << 25) |
 852                                                     (pd_cap_info->peak_current << 20) |
 853                                                     (chip->source_power_supply[i] << 10) |
 854                                                     (chip->source_max_current[i]);
 855                         }
 856                         break;
 857                 case DMT_REQUEST:
 858                         chip->send_head |= ((1 << 12) | (cmd & 0xf));
 859                         /* send request with FVRDO */
 860                         chip->send_load[0] = (chip->pos_power << 28) |
 861                                             (0 << 27) |
 862                                             (1 << 26) |
 863                                             (0 << 25) |
 864                                             (0 << 24);
 865
 866                         switch (CAP_POWER_TYPE(chip->rec_load[chip->pos_power - 1])) {
 867                         case 0:
 868                                 /* Fixed Supply */
 869                                 chip->send_load[0] |= ((CAP_FPDO_VOLTAGE(chip->rec_load[chip->pos_power - 1]) << 10) & 0x3ff);
 870                                 chip->send_load[0] |= (CAP_FPDO_CURRENT(chip->rec_load[chip->pos_power - 1]) & 0x3ff);
 871                                 break;
 872                         case 1:
 873                                 /* Battery */
 874                                 chip->send_load[0] |= ((CAP_VPDO_VOLTAGE(chip->rec_load[chip->pos_power - 1]) << 10) & 0x3ff);
 875                                 chip->send_load[0] |= (CAP_VPDO_CURRENT(chip->rec_load[chip->pos_power - 1]) & 0x3ff);
 876                                 break;
 877                         default:
 878                                 /* not meet battery caps */
 879                                 break;
 880                         }
 881                         break;
 882                 case DMT_SINKCAPABILITIES:
 883                         break;
 884                 case DMT_VENDERDEFINED:
 885                         break;
 886                 default:
 887                         break;
 888                 }
 889         } else {
 890                 chip->send_head |= (cmd & 0xf);
 891         }
 892 }
 893
 894 static void set_vdm_mesg(struct fusb30x_chip *chip, int cmd, int type, int mode)
 895 {
 896         chip->send_head = (chip->msg_id & 0x7) << 9;
 897         chip->send_head |= (chip->notify.power_role & 0x1) << 8;
 898
 899         chip->send_head = ((chip->msg_id & 0x7) << 9) |
 900                          ((chip->notify.power_role & 0x1) << 8) |
 901                          (1 << 6) |
 902                          ((chip->notify.data_role & 0x1) << 5) |
 903                          (DMT_VENDERDEFINED & 0xf);
 904
 905         chip->send_load[0] = (1 << 15) |
 906                             (0 << 13) |
 907                             (type << 6) |
 908                             (cmd);
 909
 910         switch (cmd) {
 911         case VDM_DISCOVERY_ID:
 912         case VDM_DISCOVERY_SVIDS:
 913         case VDM_ATTENTION:
 914                 chip->send_load[0] |= (0xff00 << 16);
 915                 chip->send_head |= (1 << 12);
 916                 break;
 917         case VDM_DISCOVERY_MODES:
 918                 chip->send_load[0] |=
 919                         (chip->vdm_svid[chip->val_tmp >> 1] << 16);
 920                 chip->send_head |= (1 << 12);
 921                 break;
 922         case VDM_ENTER_MODE:
 923                 chip->send_head |= (1 << 12);
 924                 chip->send_load[0] |= (mode << 8) | (0xff01 << 16);
 925                 break;
 926         case VDM_EXIT_MODE:
 927                 chip->send_head |= (1 << 12);
 928                 chip->send_load[0] |= (0x0f << 8) | (0xff01 << 16);
 929                 break;
 930         case VDM_DP_STATUS_UPDATE:
 931                 chip->send_head |= (2 << 12);
 932                 chip->send_load[0] |= (1 << 8) | (0xff01 << 16);
 933                 chip->send_load[1] = 5;
 934                 break;
 935         case VDM_DP_CONFIG:
 936                 chip->send_head |= (2 << 12);
 937                 chip->send_load[0] |= (1 << 8) | (0xff01 << 16);
 938                 chip->send_load[1] = (chip->notify.pin_assignment_def << 8) |
 939                                     (1 << 2) | 2;
 940                 break;
 941         default:
 942                 break;
 943         }
 944 }
 945
 946 static enum tx_state policy_send_hardrst(struct fusb30x_chip *chip, int evt)
 947 {
 948         switch (chip->tx_state) {
 949         case 0:
 950                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL3,
 951                                    CONTROL3_SEND_HARDRESET,
 952                                    CONTROL3_SEND_HARDRESET);
 953                 chip->tx_state = tx_busy;
 954                 chip->timer_state = T_BMC_TIMEOUT;
 955                 fusb_timer_start(&chip->timer_state_machine,
 956                                  chip->timer_state);
 957                 break;
 958         default:
 959                 if (evt & EVENT_TIMER_STATE)
 960                         chip->tx_state = tx_success;
 961                 break;
 962         }
 963         return chip->tx_state;
 964 }
 965
 966 static enum tx_state policy_send_data(struct fusb30x_chip *chip)
 967 {
 968         u8 senddata[40];
 969         int pos = 0;
 970         u8 len;
 971
 972         switch (chip->tx_state) {
 973         case 0:
 974                 senddata[pos++] = FUSB_TKN_SYNC1;
 975                 senddata[pos++] = FUSB_TKN_SYNC1;
 976                 senddata[pos++] = FUSB_TKN_SYNC1;
 977                 senddata[pos++] = FUSB_TKN_SYNC2;
 978
 979                 len = PD_HEADER_CNT(chip->send_head) << 2;
 980                 senddata[pos++] = FUSB_TKN_PACKSYM | ((len + 2) & 0x1f);
 981
 982                 senddata[pos++] = chip->send_head & 0xff;
 983                 senddata[pos++] = (chip->send_head >> 8) & 0xff;
 984
 985                 memcpy(&senddata[pos], chip->send_load, len);
 986                 pos += len;
 987
 988                 senddata[pos++] = FUSB_TKN_JAMCRC;
 989                 senddata[pos++] = FUSB_TKN_EOP;
 990                 senddata[pos++] = FUSB_TKN_TXOFF;
 991                 senddata[pos++] = FUSB_TKN_TXON;
 992
 993                 regmap_raw_write(chip->regmap, FUSB_REG_FIFO, senddata, pos);
 994                 chip->tx_state = tx_busy;
 995                 break;
 996
 997         default:
 998                 /* wait Tx result */
 999                 break;
1000         }
1001
1002         return chip->tx_state;
1003 }
1004
1005 static void process_vdm_msg(struct fusb30x_chip *chip)
1006 {
1007         u32 vdm_header = chip->rec_load[0];
1008         int i;
1009         u32 tmp;
1010
1011         /* can't procee unstructed vdm msg */
1012         if (!GET_VDMHEAD_STRUCT_TYPE(vdm_header))
1013                 return;
1014
1015         switch (GET_VDMHEAD_CMD_TYPE(vdm_header)) {
1016         case VDM_TYPE_INIT:
1017                 switch (GET_VDMHEAD_CMD(vdm_header)) {
1018                 case VDM_ATTENTION:
1019                         dev_info(chip->dev, "attention, dp_status %x\n",
1020                                  chip->rec_load[1]);
1021                         chip->notify.attention = 1;
1022                         chip->vdm_state = 6;
1023                         break;
1024                 default:
1025                         dev_warn(chip->dev, "rec unknown init vdm msg\n");
1026                         break;
1027                 }
1028                 break;
1029         case VDM_TYPE_ACK:
1030                 switch (GET_VDMHEAD_CMD(vdm_header)) {
1031                 case VDM_DISCOVERY_ID:
1032                         chip->vdm_id = chip->rec_load[1];
1033                         break;
1034                 case VDM_DISCOVERY_SVIDS:
1035                         for (i = 0; i < 6; i++) {
1036                                 tmp = (chip->rec_load[i + 1] >> 16) &
1037                                       0x0000ffff;
1038                                 if (tmp) {
1039                                         chip->vdm_svid[i * 2] = tmp;
1040                                         chip->vdm_svid_num++;
1041                                 } else {
1042                                         break;
1043                                 }
1044
1045                                 tmp = (chip->rec_load[i + 1] & 0x0000ffff);
1046                                 if (tmp) {
1047                                         chip->vdm_svid[i * 2 + 1] = tmp;
1048                                         chip->vdm_svid_num++;
1049                                 } else {
1050                                         break;
1051                                 }
1052                         }
1053                         break;
1054                 case VDM_DISCOVERY_MODES:
1055                         /* indicate there are some vdo modes */
1056                         if (PD_HEADER_CNT(chip->rec_head) > 1) {
1057                                 /*
1058                                  * store mode config,
1059                                  * enter first mode default
1060                                  */
1061                                 if (!((chip->rec_load[1] >> 8) & 0x3f)) {
1062                                         chip->val_tmp |= 1;
1063                                         break;
1064                                 }
1065                                 chip->notify.pin_assignment_support = 0;
1066                                 chip->notify.pin_assignment_def = 0;
1067                                 chip->notify.pin_assignment_support =
1068                                         (chip->rec_load[1] >> 8) & 0x3f;
1069                                 tmp = chip->notify.pin_assignment_support;
1070                                 for (i = 0; i < 6; i++) {
1071                                         if (!(tmp & 0x20))
1072                                                 tmp = tmp << 1;
1073                                         else
1074                                                 break;
1075                                 }
1076                                 chip->notify.pin_assignment_def = 0x20 >> i;
1077                                 chip->val_tmp |= 1;
1078                         }
1079                         break;
1080                 case VDM_ENTER_MODE:
1081                         chip->val_tmp = 1;
1082                         break;
1083                 case VDM_DP_STATUS_UPDATE:
1084                         dev_dbg(chip->dev, "dp_status 0x%x\n",
1085                                 chip->rec_load[1]);
1086                         chip->val_tmp = 1;
1087                         break;
1088                 case VDM_DP_CONFIG:
1089                         chip->val_tmp = 1;
1090                         dev_info(chip->dev,
1091                                  "DP config successful, pin_assignment 0x%x\n",
1092                                  chip->notify.pin_assignment_def);
1093                         chip->notify.is_enter_mode = 1;
1094                         break;
1095                 default:
1096                         break;
1097                 }
1098                 break;
1099         case VDM_TYPE_NACK:
1100                         dev_warn(chip->dev, "REC NACK for 0x%x\n",
1101                                  GET_VDMHEAD_CMD(vdm_header));
1102                         /* disable vdm */
1103                         chip->vdm_state = 0xff;
1104                 break;
1105         }
1106 }
1107
1108 static int vdm_send_discoveryid(struct fusb30x_chip *chip, int evt)
1109 {
1110         int tmp;
1111
1112         switch (chip->vdm_send_state) {
1113         case 0:
1114                 set_vdm_mesg(chip, VDM_DISCOVERY_ID, VDM_TYPE_INIT, 0);
1115                 chip->vdm_id = 0;
1116                 chip->tx_state = 0;
1117                 chip->vdm_send_state++;
1118         case 1:
1119                 tmp = policy_send_data(chip);
1120                 if (tmp == tx_success) {
1121                         chip->vdm_send_state++;
1122                         chip->timer_state = T_SENDER_RESPONSE;
1123                         fusb_timer_start(&chip->timer_state_machine,
1124                                          chip->timer_state);
1125                 } else if (tmp == tx_failed) {
1126                         dev_warn(chip->dev, "VDM_DISCOVERY_ID send failed\n");
1127                         /* disable auto_vdm_machine */
1128                         chip->vdm_state = 0xff;
1129                 }
1130
1131                 if (chip->vdm_send_state != 2)
1132                         break;
1133         default:
1134                 if (evt & EVENT_TIMER_STATE) {
1135                         dev_warn(chip->dev, "VDM_DISCOVERY_ID time out\n");
1136                         chip->vdm_state = 0xff;
1137                         chip->work_continue = 1;
1138                 }
1139
1140                 if (!chip->vdm_id)
1141                         break;
1142                 chip->vdm_send_state = 0;
1143                 return 0;
1144         }
1145         return -EINPROGRESS;
1146 }
1147
1148 static int vdm_send_discoverysvid(struct fusb30x_chip *chip, int evt)
1149 {
1150         int tmp;
1151
1152         switch (chip->vdm_send_state) {
1153         case 0:
1154                 set_vdm_mesg(chip, VDM_DISCOVERY_SVIDS, VDM_TYPE_INIT, 0);
1155                 memset(chip->vdm_svid, 0, 12);
1156                 chip->vdm_svid_num = 0;
1157                 chip->tx_state = 0;
1158                 chip->vdm_send_state++;
1159         case 1:
1160                 tmp = policy_send_data(chip);
1161                 if (tmp == tx_success) {
1162                         chip->vdm_send_state++;
1163                         chip->timer_state = T_SENDER_RESPONSE;
1164                         fusb_timer_start(&chip->timer_state_machine,
1165                                          chip->timer_state);
1166                 } else if (tmp == tx_failed) {
1167                         dev_warn(chip->dev, "VDM_DISCOVERY_SVIDS send failed\n");
1168                         /* disable auto_vdm_machine */
1169                         chip->vdm_state = 0xff;
1170                 }
1171
1172                 if (chip->vdm_send_state != 2)
1173                         break;
1174         default:
1175                 if (evt & EVENT_TIMER_STATE) {
1176                         dev_warn(chip->dev, "VDM_DISCOVERY_SVIDS time out\n");
1177                         chip->vdm_state = 0xff;
1178                         chip->work_continue = 1;
1179                 }
1180
1181                 if (!chip->vdm_svid_num)
1182                         break;
1183                 chip->vdm_send_state = 0;
1184                 return 0;
1185         }
1186         return -EINPROGRESS;
1187 }
1188
1189 static int vdm_send_discoverymodes(struct fusb30x_chip *chip, int evt)
1190 {
1191         int tmp;
1192
1193         if ((chip->val_tmp >> 1) != chip->vdm_svid_num) {
1194                 switch (chip->vdm_send_state) {
1195                 case 0:
1196                         set_vdm_mesg(chip, VDM_DISCOVERY_MODES,
1197                                      VDM_TYPE_INIT, 0);
1198                         chip->tx_state = 0;
1199                         chip->vdm_send_state++;
1200                 case 1:
1201                         tmp = policy_send_data(chip);
1202                         if (tmp == tx_success) {
1203                                 chip->vdm_send_state++;
1204                                 chip->timer_state = T_SENDER_RESPONSE;
1205                                 fusb_timer_start(&chip->timer_state_machine,
1206                                                  chip->timer_state);
1207                         } else if (tmp == tx_failed) {
1208                                 dev_warn(chip->dev,
1209                                          "VDM_DISCOVERY_MODES send failed\n");
1210                                 chip->vdm_state = 0xff;
1211                         }
1212
1213                         if (chip->vdm_send_state != 2)
1214                                 break;
1215                 default:
1216                         if (evt & EVENT_TIMER_STATE) {
1217                                 dev_warn(chip->dev,
1218                                          "VDM_DISCOVERY_MODES time out\n");
1219                                 chip->vdm_state = 0xff;
1220                                 chip->work_continue = 1;
1221                         }
1222
1223                         if (!(chip->val_tmp & 1))
1224                                 break;
1225                         chip->val_tmp &= 0xfe;
1226                         chip->val_tmp += 2;
1227                         chip->vdm_send_state = 0;
1228                         chip->work_continue = 1;
1229                         break;
1230                 }
1231         } else {
1232                 chip->val_tmp = 0;
1233                 return 0;
1234         }
1235
1236         return -EINPROGRESS;
1237 }
1238
1239 static int vdm_send_entermode(struct fusb30x_chip *chip, int evt)
1240 {
1241         int tmp;
1242
1243         switch (chip->vdm_send_state) {
1244         case 0:
1245                 set_vdm_mesg(chip, VDM_ENTER_MODE, VDM_TYPE_INIT, 1);
1246                 chip->tx_state = 0;
1247                 chip->vdm_send_state++;
1248                 chip->notify.is_enter_mode = 0;
1249         case 1:
1250                 tmp = policy_send_data(chip);
1251                 if (tmp == tx_success) {
1252                         chip->vdm_send_state++;
1253                         chip->timer_state = T_SENDER_RESPONSE;
1254                         fusb_timer_start(&chip->timer_state_machine,
1255                                          chip->timer_state);
1256                 } else if (tmp == tx_failed) {
1257                         dev_warn(chip->dev, "VDM_ENTER_MODE send failed\n");
1258                         /* disable auto_vdm_machine */
1259                         chip->vdm_state = 0xff;
1260                 }
1261
1262                 if (chip->vdm_send_state != 2)
1263                         break;
1264         default:
1265                 if (evt & EVENT_TIMER_STATE) {
1266                         dev_warn(chip->dev, "VDM_ENTER_MODE time out\n");
1267                         chip->vdm_state = 0xff;
1268                         chip->work_continue = 1;
1269                 }
1270
1271                 if (!chip->val_tmp)
1272                         break;
1273                 chip->val_tmp = 0;
1274                 chip->vdm_send_state = 0;
1275                 return 0;
1276         }
1277         return -EINPROGRESS;
1278 }
1279
1280 static int vdm_send_getdpstatus(struct fusb30x_chip *chip, int evt)
1281 {
1282         int tmp;
1283
1284         switch (chip->vdm_send_state) {
1285         case 0:
1286                 set_vdm_mesg(chip, VDM_DP_STATUS_UPDATE, VDM_TYPE_INIT, 1);
1287                 chip->tx_state = 0;
1288                 chip->vdm_send_state++;
1289         case 1:
1290                 tmp = policy_send_data(chip);
1291                 if (tmp == tx_success) {
1292                         chip->vdm_send_state++;
1293                         chip->timer_state = T_SENDER_RESPONSE;
1294                         fusb_timer_start(&chip->timer_state_machine,
1295                                          chip->timer_state);
1296                 } else if (tmp == tx_failed) {
1297                         dev_warn(chip->dev,
1298                                  "VDM_DP_STATUS_UPDATE send failed\n");
1299                         /* disable auto_vdm_machine */
1300                         chip->vdm_state = 0xff;
1301                 }
1302
1303                 if (chip->vdm_send_state != 2)
1304                         break;
1305         default:
1306                 if (evt & EVENT_TIMER_STATE) {
1307                         dev_warn(chip->dev, "VDM_DP_STATUS_UPDATE time out\n");
1308                         chip->vdm_state = 0xff;
1309                         chip->work_continue = 1;
1310                 }
1311
1312                 if (!chip->val_tmp)
1313                         break;
1314                 chip->val_tmp = 0;
1315                 chip->vdm_send_state = 0;
1316                 return 0;
1317         }
1318         return -EINPROGRESS;
1319 }
1320
1321 static int vdm_send_dpconfig(struct fusb30x_chip *chip, int evt)
1322 {
1323         int tmp;
1324
1325         switch (chip->vdm_send_state) {
1326         case 0:
1327                 set_vdm_mesg(chip, VDM_DP_CONFIG, VDM_TYPE_INIT, 0);
1328                 chip->tx_state = 0;
1329                 chip->vdm_send_state++;
1330         case 1:
1331                 tmp = policy_send_data(chip);
1332                 if (tmp == tx_success) {
1333                         chip->vdm_send_state++;
1334                         chip->timer_state = T_SENDER_RESPONSE;
1335                         fusb_timer_start(&chip->timer_state_machine,
1336                                          chip->timer_state);
1337                 } else if (tmp == tx_failed) {
1338                         dev_warn(chip->dev, "vdm_send_dpconfig send failed\n");
1339                         /* disable auto_vdm_machine */
1340                         chip->vdm_state = 0xff;
1341                 }
1342
1343                 if (chip->vdm_send_state != 2)
1344                         break;
1345         default:
1346                 if (evt & EVENT_TIMER_STATE) {
1347                         dev_warn(chip->dev, "vdm_send_dpconfig time out\n");
1348                         chip->vdm_state = 0xff;
1349                         chip->work_continue = 1;
1350                 }
1351
1352                 if (!chip->val_tmp)
1353                         break;
1354                 chip->val_tmp = 0;
1355                 chip->vdm_send_state = 0;
1356                 return 0;
1357         }
1358         return -EINPROGRESS;
1359 }
1360
1361 static void auto_vdm_machine(struct fusb30x_chip *chip, int evt)
1362 {
1363         switch (chip->vdm_state) {
1364         case 0:
1365                 if (vdm_send_discoveryid(chip, evt))
1366                         break;
1367                 chip->vdm_state++;
1368                 /* without break */
1369         case 1:
1370                 if (vdm_send_discoverysvid(chip, evt))
1371                         break;
1372                 chip->vdm_state++;
1373                 /* without break */
1374         case 2:
1375                 if (vdm_send_discoverymodes(chip, evt))
1376                         break;
1377                 chip->vdm_state++;
1378                 /* without break */
1379         case 3:
1380                 if (vdm_send_entermode(chip, evt))
1381                         break;
1382                 chip->vdm_state++;
1383                 /* without break */
1384         case 4:
1385                 if (vdm_send_dpconfig(chip, evt))
1386                         break;
1387                 chip->vdm_state = 6;
1388                 /* without break */
1389         case 5:
1390                 if (vdm_send_getdpstatus(chip, evt))
1391                         break;
1392                 chip->vdm_state++;
1393                 /* without break */
1394         default:
1395                 platform_fusb_notify(chip);
1396                 break;
1397         }
1398 }
1399
1400 static void fusb_state_disabled(struct fusb30x_chip *chip, int evt)
1401 {
1402         platform_fusb_notify(chip);
1403 }
1404
1405 static void fusb_state_unattached(struct fusb30x_chip *chip, int evt)
1406 {
1407         chip->notify.is_cc_connected = 0;
1408         if ((evt & EVENT_CC) && chip->cc_state) {
1409                 if (chip->cc_state & 0x04)
1410                         set_state(chip, attach_wait_sink);
1411                 else
1412                         set_state(chip, attach_wait_source);
1413
1414                 tcpm_get_cc(chip, &chip->cc1, &chip->cc2);
1415                 chip->debounce_cnt = 0;
1416                 chip->timer_mux = 2;
1417                 fusb_timer_start(&chip->timer_mux_machine, chip->timer_mux);
1418         }
1419 }
1420
1421 static void fusb_state_attach_wait_sink(struct fusb30x_chip *chip, int evt)
1422 {
1423         int cc1, cc2;
1424
1425         if (evt & EVENT_TIMER_MUX) {
1426                 tcpm_get_cc(chip, &cc1, &cc2);
1427
1428                 if ((chip->cc1 == cc1) && (chip->cc2 == cc2)) {
1429                         chip->debounce_cnt++;
1430                 } else {
1431                         chip->cc1 = cc1;
1432                         chip->cc2 = cc2;
1433                         chip->debounce_cnt = 0;
1434                 }
1435
1436                 if (chip->debounce_cnt > N_DEBOUNCE_CNT) {
1437                         if ((chip->cc1 != chip->cc2) &&
1438                             ((!chip->cc1) || (!chip->cc2))) {
1439                                 set_state(chip, attached_sink);
1440                         } else {
1441                                 set_state_unattached(chip);
1442                         }
1443                         return;
1444                 }
1445
1446                 chip->timer_mux = 2;
1447                 fusb_timer_start(&chip->timer_mux_machine,
1448                                  chip->timer_mux);
1449         }
1450 }
1451
1452 static void fusb_state_attach_wait_source(struct fusb30x_chip *chip, int evt)
1453 {
1454         int cc1, cc2;
1455
1456         if (evt & EVENT_TIMER_MUX) {
1457                 tcpm_get_cc(chip, &cc1, &cc2);
1458
1459                 if ((chip->cc1 == cc1) && (chip->cc2 == cc2)) {
1460                         if (chip->debounce_cnt++ == 0)
1461                                 platform_set_vbus_lvl_enable(chip, 1, 0);
1462                 } else {
1463                         chip->cc1 = cc1;
1464                         chip->cc2 = cc2;
1465                         chip->debounce_cnt = 0;
1466                 }
1467
1468                 if (chip->debounce_cnt > N_DEBOUNCE_CNT) {
1469                         if (((!chip->cc1) || (!chip->cc2)) &&
1470                             ((chip->cc1 == TYPEC_CC_VOLT_RD) ||
1471                              (chip->cc2 == TYPEC_CC_VOLT_RD))) {
1472                                 set_state(chip, attached_source);
1473                         } else {
1474                                 set_state_unattached(chip);
1475                         }
1476
1477                         return;
1478                 }
1479
1480                 chip->timer_mux = 2;
1481                 fusb_timer_start(&chip->timer_mux_machine,
1482                                  chip->timer_mux);
1483         }
1484 }
1485
1486 static void fusb_state_attached_source(struct fusb30x_chip *chip, int evt)
1487 {
1488         tcpm_set_polarity(chip, !(chip->cc_state & 0x01));
1489         tcpm_set_vconn(chip, 1);
1490
1491         chip->notify.is_cc_connected = 1;
1492         if (chip->cc_state & 0x01)
1493                 chip->cc_polarity = 0;
1494         else
1495                 chip->cc_polarity = 1;
1496
1497         chip->notify.power_role = 1;
1498         chip->notify.data_role = 1;
1499         chip->hardrst_count = 0;
1500         set_state(chip, policy_src_startup);
1501         dev_info(chip->dev, "CC connected in %d as DFP\n", chip->cc_polarity);
1502 }
1503
1504 static void fusb_state_attached_sink(struct fusb30x_chip *chip, int evt)
1505 {
1506         chip->notify.is_cc_connected = 1;
1507         if (chip->cc_state & 0x01)
1508                 chip->cc_polarity = 0;
1509         else
1510                 chip->cc_polarity = 1;
1511
1512         chip->notify.power_role = 0;
1513         chip->notify.data_role = 0;
1514         chip->hardrst_count = 0;
1515         set_state(chip, policy_snk_startup);
1516         dev_info(chip->dev, "CC connected in %d as UFP\n", chip->cc_polarity);
1517 }
1518
1519 static void fusb_state_src_startup(struct fusb30x_chip *chip, int evt)
1520 {
1521         chip->caps_counter = 0;
1522         chip->notify.is_pd_connected = 0;
1523         chip->msg_id = 0;
1524         chip->vdm_state = 0;
1525         chip->vdm_substate = 0;
1526         chip->vdm_send_state = 0;
1527         chip->val_tmp = 0;
1528
1529         memset(chip->partner_cap, 0, sizeof(chip->partner_cap));
1530
1531         tcpm_set_msg_header(chip);
1532         tcpm_set_polarity(chip, chip->cc_polarity);
1533         tcpm_set_rx_enable(chip, 1);
1534
1535         set_state(chip, policy_src_send_caps);
1536 }
1537
1538 static void fusb_state_src_discovery(struct fusb30x_chip *chip, int evt)
1539 {
1540         switch (chip->sub_state) {
1541         case 0:
1542                 chip->caps_counter++;
1543
1544                 if (chip->caps_counter < N_CAPS_COUNT) {
1545                         chip->timer_state = T_TYPEC_SEND_SOURCECAP;
1546                         fusb_timer_start(&chip->timer_state_machine,
1547                                          chip->timer_state);
1548                         chip->sub_state = 1;
1549                 } else {
1550                         set_state(chip, disabled);
1551                 }
1552                 break;
1553         default:
1554                 if (evt & EVENT_TIMER_STATE) {
1555                         set_state(chip, policy_src_send_caps);
1556                 } else if ((evt & EVENT_TIMER_MUX) &&
1557                            (chip->hardrst_count > N_HARDRESET_COUNT)) {
1558                         if (chip->notify.is_pd_connected)
1559                                 set_state(chip, error_recovery);
1560                         else
1561                                 set_state(chip, disabled);
1562                 }
1563                 break;
1564         }
1565 }
1566
1567 static void fusb_state_src_send_caps(struct fusb30x_chip *chip, int evt)
1568 {
1569         u32 tmp;
1570
1571         switch (chip->sub_state) {
1572         case 0:
1573                 set_mesg(chip, DMT_SOURCECAPABILITIES, DATAMESSAGE);
1574                 chip->sub_state = 1;
1575                 chip->tx_state = tx_idle;
1576                 /* without break */
1577         case 1:
1578                 tmp = policy_send_data(chip);
1579
1580                 if (tmp == tx_success) {
1581                         chip->hardrst_count = 0;
1582                         chip->caps_counter = 0;
1583                         chip->timer_state = T_SENDER_RESPONSE;
1584                         fusb_timer_start(&chip->timer_state_machine,
1585                                          chip->timer_state);
1586                         chip->timer_mux = T_DISABLED;
1587                         chip->sub_state++;
1588                 } else if (tmp == tx_failed) {
1589                         set_state(chip, policy_src_discovery);
1590                         break;
1591                 }
1592
1593                 if (!(evt & FLAG_EVENT))
1594                         break;
1595         default:
1596                 if (evt & EVENT_RX) {
1597                         if ((PD_HEADER_CNT(chip->rec_head) == 1) &&
1598                             (PD_HEADER_TYPE(chip->rec_head) == DMT_REQUEST)) {
1599                                 set_state(chip, policy_src_negotiate_cap);
1600                         } else {
1601                                 set_state(chip, policy_src_send_softrst);
1602                         }
1603                 } else if (evt & EVENT_TIMER_STATE) {
1604                         if (chip->hardrst_count <= N_HARDRESET_COUNT)
1605                                 set_state(chip, policy_src_send_hardrst);
1606                         else
1607                                 set_state(chip, disabled);
1608                 } else if (evt & EVENT_TIMER_MUX) {
1609                         if (chip->notify.is_pd_connected)
1610                                 set_state(chip, disabled);
1611                         else
1612                                 set_state(chip, error_recovery);
1613                 }
1614                 break;
1615         }
1616 }
1617
1618 static void fusb_state_src_negotiate_cap(struct fusb30x_chip *chip, int evt)
1619 {
1620         u32 tmp;
1621
1622         /* base on evb1 */
1623         tmp = (chip->rec_load[0] >> 28) & 0x07;
1624         if (tmp > chip->n_caps_used)
1625                 set_state(chip, policy_src_cap_response);
1626         else
1627                 set_state(chip, policy_src_transition_supply);
1628 }
1629
1630 static void fusb_state_src_transition_supply(struct fusb30x_chip *chip,
1631                                              int evt)
1632 {
1633         u32 tmp;
1634
1635         switch (chip->sub_state) {
1636         case 0:
1637                 set_mesg(chip, CMT_ACCEPT, CONTROLMESSAGE);
1638                 chip->tx_state = tx_idle;
1639                 chip->sub_state++;
1640                 /* without break */
1641         case 1:
1642                 tmp = policy_send_data(chip);
1643                 if (tmp == tx_success) {
1644                         chip->timer_state = T_SRC_TRANSITION;
1645                         chip->sub_state++;
1646                         fusb_timer_start(&chip->timer_state_machine,
1647                                          chip->timer_state);
1648                 } else if (tmp == tx_failed) {
1649                         set_state(chip, policy_src_send_softrst);
1650                 }
1651                 break;
1652         case 2:
1653                 if (evt & EVENT_TIMER_STATE) {
1654                         chip->notify.is_pd_connected = 1;
1655                         platform_set_vbus_lvl_enable(chip, 1, 0);
1656                         set_mesg(chip, CMT_PS_RDY, CONTROLMESSAGE);
1657                         chip->tx_state = tx_idle;
1658                         chip->sub_state++;
1659                         chip->work_continue = 1;
1660                 }
1661                 break;
1662         default:
1663                 tmp = policy_send_data(chip);
1664                 if (tmp == tx_success) {
1665                         dev_info(chip->dev,
1666                                  "PD connected as DFP, supporting 5V\n");
1667                         set_state(chip, policy_src_ready);
1668                 } else if (tmp == tx_failed) {
1669                         set_state(chip, policy_src_send_softrst);
1670                 }
1671                 break;
1672         }
1673 }
1674
1675 static void fusb_state_src_cap_response(struct fusb30x_chip *chip, int evt)
1676 {
1677         u32 tmp;
1678
1679         switch (chip->sub_state) {
1680         case 0:
1681                 set_mesg(chip, CMT_REJECT, CONTROLMESSAGE);
1682                 chip->tx_state = tx_idle;
1683                 chip->sub_state++;
1684                 /* without break */
1685         default:
1686                 tmp = policy_send_data(chip);
1687                 if (tmp == tx_success) {
1688                         if (chip->notify.is_pd_connected) {
1689                                 dev_info(chip->dev,
1690                                          "PD connected as DFP, supporting 5V\n");
1691                                 set_state(chip, policy_src_ready);
1692                         } else {
1693                                 set_state(chip, policy_src_send_hardrst);
1694                         }
1695                 } else if (tmp == tx_failed) {
1696                         set_state(chip, policy_src_send_softrst);
1697                 }
1698                 break;
1699         }
1700 }
1701
1702 static void fusb_state_src_transition_default(struct fusb30x_chip *chip,
1703                                               int evt)
1704 {
1705         switch (chip->sub_state) {
1706         case 0:
1707                 chip->notify.is_pd_connected = 0;
1708                 platform_set_vbus_lvl_enable(chip, 0, 0);
1709                 if (chip->notify.data_role)
1710                         regmap_update_bits(chip->regmap,
1711                                            FUSB_REG_SWITCHES1,
1712                                            SWITCHES1_DATAROLE,
1713                                            SWITCHES1_DATAROLE);
1714                 else
1715                         regmap_update_bits(chip->regmap,
1716                                            FUSB_REG_SWITCHES1,
1717                                            SWITCHES1_DATAROLE,
1718                                            0);
1719
1720                 chip->timer_state = T_SRC_RECOVER;
1721                 fusb_timer_start(&chip->timer_state_machine,
1722                                  chip->timer_state);
1723                 chip->sub_state++;
1724                 break;
1725         default:
1726                 if (evt & EVENT_TIMER_STATE) {
1727                         platform_set_vbus_lvl_enable(chip, 1, 0);
1728                         chip->timer_mux = T_NO_RESPONSE;
1729                         fusb_timer_start(&chip->timer_mux_machine,
1730                                          chip->timer_mux);
1731                         set_state(chip, policy_src_startup);
1732                         dev_dbg(chip->dev, "reset over-> src startup\n");
1733                 }
1734                 break;
1735         }
1736 }
1737
1738 static void fusb_state_src_ready(struct fusb30x_chip *chip, int evt)
1739 {
1740         if (evt & EVENT_RX) {
1741                 if ((PD_HEADER_CNT(chip->rec_head)) &&
1742                     (PD_HEADER_TYPE(chip->rec_head) == DMT_VENDERDEFINED)) {
1743                         process_vdm_msg(chip);
1744                         chip->work_continue = 1;
1745                         chip->timer_state = T_DISABLED;
1746                 }
1747         }
1748
1749         /* TODO: swap function would be added here later on*/
1750
1751         if (!chip->partner_cap[0])
1752                 set_state(chip, policy_src_get_sink_caps);
1753         else
1754                 auto_vdm_machine(chip, evt);
1755 }
1756
1757 static void fusb_state_src_get_sink_cap(struct fusb30x_chip *chip, int evt)
1758 {
1759         u32 tmp;
1760
1761         switch (chip->sub_state) {
1762         case 0:
1763                 set_mesg(chip, CMT_GETSINKCAP, CONTROLMESSAGE);
1764                 chip->tx_state = tx_idle;
1765                 chip->sub_state++;
1766                 /* without break */
1767         case 1:
1768                 tmp = policy_send_data(chip);
1769                 if (tmp == tx_success) {
1770                         chip->timer_state = T_SENDER_RESPONSE;
1771                         chip->sub_state++;
1772                         fusb_timer_start(&chip->timer_state_machine,
1773                                          chip->timer_state);
1774                 } else if (tmp == tx_failed) {
1775                         set_state(chip, policy_src_send_softrst);
1776                 }
1777
1778                 if (!(evt & FLAG_EVENT))
1779                         break;
1780         default:
1781                 if (evt & EVENT_RX) {
1782                         if ((PD_HEADER_CNT(chip->rec_head)) &&
1783                             (PD_HEADER_TYPE(chip->rec_head) ==
1784                              DMT_SINKCAPABILITIES)) {
1785                                 for (tmp = 0;
1786                                      tmp < PD_HEADER_CNT(chip->rec_head);
1787                                      tmp++) {
1788                                         chip->partner_cap[tmp] =
1789                                                 chip->rec_load[tmp];
1790                                 }
1791                                 set_state(chip, policy_src_ready);
1792                         } else {
1793                                 chip->partner_cap[0] = 0xffffffff;
1794                                 set_state(chip, policy_src_ready);
1795                         }
1796                 } else if (evt & EVENT_TIMER_STATE) {
1797                         dev_warn(chip->dev, "Get sink cap time out\n");
1798                         chip->partner_cap[0] = 0xffffffff;
1799                         set_state(chip, policy_src_ready);
1800                 }
1801         }
1802 }
1803
1804 static void fusb_state_src_send_hardreset(struct fusb30x_chip *chip, int evt)
1805 {
1806         u32 tmp;
1807
1808         switch (chip->sub_state) {
1809         case 0:
1810                 chip->tx_state = tx_idle;
1811                 chip->sub_state++;
1812                 /* without break */
1813         default:
1814                 tmp = policy_send_hardrst(chip, evt);
1815                 if (tmp == tx_success) {
1816                         chip->hardrst_count++;
1817                         set_state(chip, policy_src_transition_default);
1818                 } else if (tmp == tx_failed) {
1819                         /* can't reach here */
1820                         set_state(chip, error_recovery);
1821                 }
1822                 break;
1823         }
1824 }
1825
1826 static void fusb_state_src_send_softreset(struct fusb30x_chip *chip, int evt)
1827 {
1828         u32 tmp;
1829
1830         switch (chip->sub_state) {
1831         case 0:
1832                 set_mesg(chip, CMT_SOFTRESET, CONTROLMESSAGE);
1833                 chip->tx_state = tx_idle;
1834                 chip->sub_state++;
1835                 /* without break */
1836         case 1:
1837                 tmp = policy_send_data(chip);
1838                 if (tmp == tx_success) {
1839                         chip->timer_state = T_SENDER_RESPONSE;
1840                         chip->sub_state++;
1841                         fusb_timer_start(&chip->timer_state_machine,
1842                                          chip->timer_state);
1843                 } else if (tmp == tx_failed) {
1844                         set_state(chip, policy_src_send_hardrst);
1845                 }
1846
1847                 if (!(evt & FLAG_EVENT))
1848                         break;
1849         default:
1850                 if (evt & EVENT_RX) {
1851                         if ((!PD_HEADER_CNT(chip->rec_head)) &&
1852                             (PD_HEADER_TYPE(chip->rec_head) == CMT_ACCEPT))
1853                                 set_state(chip, policy_src_send_caps);
1854                 } else if (evt & EVENT_TIMER_STATE) {
1855                         set_state(chip, policy_src_send_hardrst);
1856                 }
1857                 break;
1858         }
1859 }
1860
1861 static void fusb_state_snk_startup(struct fusb30x_chip *chip, int evt)
1862 {
1863         chip->notify.is_pd_connected = 0;
1864         chip->msg_id = 0;
1865         chip->vdm_state = 0;
1866         chip->vdm_substate = 0;
1867         chip->vdm_send_state = 0;
1868         chip->val_tmp = 0;
1869         chip->pos_power = 0;
1870
1871         memset(chip->partner_cap, 0, sizeof(chip->partner_cap));
1872
1873         tcpm_set_msg_header(chip);
1874         tcpm_set_polarity(chip, chip->cc_polarity);
1875         tcpm_set_rx_enable(chip, 1);
1876         set_state(chip, policy_snk_discovery);
1877 }
1878
1879 static void fusb_state_snk_discovery(struct fusb30x_chip *chip, int evt)
1880 {
1881         set_state(chip, policy_snk_wait_caps);
1882         chip->timer_state = T_TYPEC_SINK_WAIT_CAP;
1883         fusb_timer_start(&chip->timer_state_machine,
1884                          chip->timer_state);
1885 }
1886
1887 static void fusb_state_snk_wait_caps(struct fusb30x_chip *chip, int evt)
1888 {
1889         if (evt & EVENT_RX) {
1890                 if (PD_HEADER_CNT(chip->rec_head) &&
1891                     PD_HEADER_TYPE(chip->rec_head) == DMT_SOURCECAPABILITIES) {
1892                         chip->timer_mux = T_DISABLED;
1893                         set_state(chip, policy_snk_evaluate_caps);
1894                 }
1895         } else if (evt & EVENT_TIMER_STATE) {
1896                 if (chip->hardrst_count <= N_HARDRESET_COUNT)
1897                         set_state(chip, policy_snk_send_hardrst);
1898                 else
1899                         set_state(chip, disabled);
1900         } else if ((evt & EVENT_TIMER_MUX) &&
1901                    (chip->hardrst_count > N_HARDRESET_COUNT)) {
1902                 if (chip->notify.is_pd_connected)
1903                         set_state(chip, error_recovery);
1904                 else
1905                         set_state(chip, disabled);
1906         }
1907 }
1908
1909 static void fusb_state_snk_evaluate_caps(struct fusb30x_chip *chip, int evt)
1910 {
1911         u32 tmp;
1912
1913         chip->hardrst_count = 0;
1914         chip->pos_power = 0;
1915
1916         for (tmp = 0; tmp < PD_HEADER_CNT(chip->rec_head); tmp++) {
1917                 switch (CAP_POWER_TYPE(chip->rec_load[tmp])) {
1918                 case 0:
1919                         /* Fixed Supply */
1920                         if (CAP_FPDO_VOLTAGE(chip->rec_load[tmp]) <= 100)
1921                                 chip->pos_power = tmp + 1;
1922                         break;
1923                 case 1:
1924                         /* Battery */
1925                         if (CAP_VPDO_VOLTAGE(chip->rec_load[tmp]) <= 100)
1926                                 chip->pos_power = tmp + 1;
1927                         break;
1928                 default:
1929                         /* not meet battery caps */
1930                         break;
1931                 }
1932         }
1933         fusb302_set_pos_power_by_charge_ic(chip);
1934
1935         if ((!chip->pos_power) || (chip->pos_power > 7)) {
1936                 chip->pos_power = 0;
1937                 set_state(chip, policy_snk_wait_caps);
1938         } else {
1939                 set_state(chip, policy_snk_select_cap);
1940         }
1941 }
1942
1943 static void fusb_state_snk_select_cap(struct fusb30x_chip *chip, int evt)
1944 {
1945         u32 tmp;
1946
1947         switch (chip->sub_state) {
1948         case 0:
1949                 set_mesg(chip, DMT_REQUEST, DATAMESSAGE);
1950                 chip->sub_state = 1;
1951                 chip->tx_state = tx_idle;
1952                 /* without break */
1953         case 1:
1954                 tmp = policy_send_data(chip);
1955
1956                 if (tmp == tx_success) {
1957                         chip->timer_state = T_SENDER_RESPONSE;
1958                         fusb_timer_start(&chip->timer_state_machine,
1959                                          chip->timer_state);
1960                         chip->sub_state++;
1961                 } else if (tmp == tx_failed) {
1962                         set_state(chip, policy_snk_discovery);
1963                         break;
1964                 }
1965
1966                 if (!(evt & FLAG_EVENT))
1967                         break;
1968         default:
1969                 if (evt & EVENT_RX) {
1970                         if (!PD_HEADER_CNT(chip->rec_head)) {
1971                                 switch (PD_HEADER_TYPE(chip->rec_head)) {
1972                                 case CMT_ACCEPT:
1973                                         set_state(chip,
1974                                                   policy_snk_transition_sink);
1975                                         chip->timer_state = T_PS_TRANSITION;
1976                                         fusb_timer_start(&chip->timer_state_machine,
1977                                                          chip->timer_state);
1978                                         break;
1979                                 case CMT_WAIT:
1980                                 case CMT_REJECT:
1981                                         if (chip->notify.is_pd_connected) {
1982                                                 dev_info(chip->dev,
1983                                                          "PD connected as UFP, fetching 5V\n");
1984                                                 set_state(chip,
1985                                                           policy_snk_ready);
1986                                         } else {
1987                                                 set_state(chip,
1988                                                           policy_snk_wait_caps);
1989                                                 /*
1990                                                  * make sure don't send
1991                                                  * hard reset to prevent
1992                                                  * infinite loop
1993                                                  */
1994                                                 chip->hardrst_count =
1995                                                         N_HARDRESET_COUNT + 1;
1996                                         }
1997                                         break;
1998                                 default:
1999                                         break;
2000                                 }
2001                         }
2002                 } else if (evt & EVENT_TIMER_STATE) {
2003                         set_state(chip, policy_snk_send_hardrst);
2004                 }
2005                 break;
2006         }
2007 }
2008
2009 static void fusb_state_snk_transition_sink(struct fusb30x_chip *chip, int evt)
2010 {
2011         if (evt & EVENT_RX) {
2012                 if ((!PD_HEADER_CNT(chip->rec_head)) &&
2013                     (PD_HEADER_TYPE(chip->rec_head) == CMT_PS_RDY)) {
2014                         chip->notify.is_pd_connected = 1;
2015                         dev_info(chip->dev,
2016                                  "PD connected as UFP, fetching 5V\n");
2017                         set_state(chip, policy_snk_ready);
2018                 } else if ((PD_HEADER_CNT(chip->rec_head)) &&
2019                            (PD_HEADER_TYPE(chip->rec_head) ==
2020                             DMT_SOURCECAPABILITIES)) {
2021                         set_state(chip, policy_snk_evaluate_caps);
2022                 }
2023         } else if (evt & EVENT_TIMER_STATE) {
2024                 set_state(chip, policy_snk_send_hardrst);
2025         }
2026 }
2027
2028 static void fusb_state_snk_transition_default(struct fusb30x_chip *chip,
2029                                               int evt)
2030 {
2031         switch (chip->sub_state) {
2032         case 0:
2033                 chip->notify.is_pd_connected = 0;
2034                 chip->timer_mux = T_NO_RESPONSE;
2035                 fusb_timer_start(&chip->timer_mux_machine,
2036                                  chip->timer_mux);
2037                 chip->timer_state = T_PS_HARD_RESET_MAX + T_SAFE_0V;
2038                 fusb_timer_start(&chip->timer_state_machine,
2039                                  chip->timer_state);
2040                 if (chip->notify.data_role)
2041                         tcpm_set_msg_header(chip);
2042
2043                 chip->sub_state++;
2044         case 1:
2045                 if (!tcpm_check_vbus(chip)) {
2046                         chip->sub_state++;
2047                         chip->timer_state = T_SRC_RECOVER_MAX + T_SRC_TURN_ON;
2048                         fusb_timer_start(&chip->timer_state_machine,
2049                                          chip->timer_state);
2050                 } else if (evt & EVENT_TIMER_STATE) {
2051                         set_state(chip, policy_snk_startup);
2052                 }
2053                 break;
2054         default:
2055                 if (tcpm_check_vbus(chip)) {
2056                         chip->timer_state = T_DISABLED;
2057                         set_state(chip, policy_snk_startup);
2058                 } else if (evt & EVENT_TIMER_STATE) {
2059                         set_state(chip, policy_snk_startup);
2060                 }
2061                 break;
2062         }
2063 }
2064
2065 static void fusb_state_snk_ready(struct fusb30x_chip *chip, int evt)
2066 {
2067         /* TODO: snk_ready_function would be added later on*/
2068         platform_fusb_notify(chip);
2069 }
2070
2071 static void fusb_state_snk_send_hardreset(struct fusb30x_chip *chip, int evt)
2072 {
2073         u32 tmp;
2074
2075         switch (chip->sub_state) {
2076         case 0:
2077                 chip->tx_state = tx_idle;
2078                 chip->sub_state++;
2079         default:
2080                 tmp = policy_send_hardrst(chip, evt);
2081                 if (tmp == tx_success) {
2082                         chip->hardrst_count++;
2083                         set_state(chip, policy_snk_transition_default);
2084                 } else if (tmp == tx_failed) {
2085                         set_state(chip, error_recovery);
2086                 }
2087                 break;
2088         }
2089 }
2090
2091 static void fusb_state_snk_send_softreset(struct fusb30x_chip *chip, int evt)
2092 {
2093         u32 tmp;
2094
2095         switch (chip->sub_state) {
2096         case 0:
2097                 set_mesg(chip, CMT_SOFTRESET, CONTROLMESSAGE);
2098                 chip->tx_state = tx_idle;
2099                 chip->sub_state++;
2100         case 1:
2101                 tmp = policy_send_data(chip);
2102                 if (tmp == tx_success) {
2103                         chip->timer_state = T_SENDER_RESPONSE;
2104                         chip->sub_state++;
2105                         fusb_timer_start(&chip->timer_state_machine,
2106                                          chip->timer_state);
2107                 } else if (tmp == tx_failed) {
2108                         /* can't reach here */
2109                         set_state(chip, policy_snk_send_hardrst);
2110                 }
2111
2112                 if (!(evt & FLAG_EVENT))
2113                         break;
2114         default:
2115                 if (evt & EVENT_RX) {
2116                         if ((!PD_HEADER_CNT(chip->rec_head)) &&
2117                             (PD_HEADER_TYPE(chip->rec_head) == CMT_ACCEPT))
2118                                 set_state(chip, policy_snk_wait_caps);
2119                 } else if (evt & EVENT_TIMER_STATE) {
2120                         set_state(chip, policy_snk_send_hardrst);
2121                 }
2122                 break;
2123         }
2124 }
2125
2126 static void state_machine_typec(struct fusb30x_chip *chip)
2127 {
2128         int evt = 0;
2129         int cc1, cc2;
2130
2131         tcpc_alert(chip, &evt);
2132         mux_alert(chip, &evt);
2133         if (!evt)
2134                 goto BACK;
2135
2136         if (chip->notify.is_cc_connected) {
2137                 if (evt & EVENT_CC) {
2138                         if ((chip->cc_state & 0x04) &&
2139                             (chip->conn_state !=
2140                              policy_snk_transition_default)) {
2141                                 if (!tcpm_check_vbus(chip))
2142                                         set_state_unattached(chip);
2143                         } else if (chip->conn_state !=
2144                                    policy_src_transition_default) {
2145                                 tcpm_get_cc(chip, &cc1, &cc2);
2146                                 if (!(chip->cc_state & 0x01))
2147                                         cc1 = cc2;
2148                                 if (cc1 == TYPEC_CC_VOLT_OPEN)
2149                                         set_state_unattached(chip);
2150                         }
2151                 }
2152         }
2153
2154         if (evt & EVENT_RX) {
2155                 tcpm_get_message(chip);
2156                 if ((!PD_HEADER_CNT(chip->rec_head)) &&
2157                     (PD_HEADER_TYPE(chip->rec_head) == CMT_SOFTRESET)) {
2158                         if (chip->notify.power_role)
2159                                 set_state(chip, policy_src_send_softrst);
2160                         else
2161                                 set_state(chip, policy_snk_send_softrst);
2162                 }
2163         }
2164
2165         if (evt & EVENT_TX) {
2166                 if (chip->tx_state == tx_success)
2167                         chip->msg_id++;
2168         }
2169         switch (chip->conn_state) {
2170         case disabled:
2171                 fusb_state_disabled(chip, evt);
2172                 break;
2173         case error_recovery:
2174                 set_state_unattached(chip);
2175                 break;
2176         case unattached:
2177                 fusb_state_unattached(chip, evt);
2178                 break;
2179         case attach_wait_sink:
2180                 fusb_state_attach_wait_sink(chip, evt);
2181                 break;
2182         case attach_wait_source:
2183                 fusb_state_attach_wait_source(chip, evt);
2184                 break;
2185         case attached_source:
2186                 fusb_state_attached_source(chip, evt);
2187                 break;
2188         case attached_sink:
2189                 fusb_state_attached_sink(chip, evt);
2190                 break;
2191
2192         /* POWER DELIVERY */
2193         case policy_src_startup:
2194                 fusb_state_src_startup(chip, evt);
2195                 break;
2196         case policy_src_discovery:
2197                 fusb_state_src_discovery(chip, evt);
2198                 break;
2199         case policy_src_send_caps:
2200                 fusb_state_src_send_caps(chip, evt);
2201                 if (chip->conn_state != policy_src_negotiate_cap)
2202                         break;
2203         case policy_src_negotiate_cap:
2204                 fusb_state_src_negotiate_cap(chip, evt);
2205
2206         case policy_src_transition_supply:
2207                 fusb_state_src_transition_supply(chip, evt);
2208                 break;
2209         case policy_src_cap_response:
2210                 fusb_state_src_cap_response(chip, evt);
2211                 break;
2212         case policy_src_transition_default:
2213                 fusb_state_src_transition_default(chip, evt);
2214                 break;
2215         case policy_src_ready:
2216                 fusb_state_src_ready(chip, evt);
2217                 break;
2218         case policy_src_get_sink_caps:
2219                 fusb_state_src_get_sink_cap(chip, evt);
2220                 break;
2221         case policy_src_send_hardrst:
2222                 fusb_state_src_send_hardreset(chip, evt);
2223                 break;
2224         case policy_src_send_softrst:
2225                 fusb_state_src_send_softreset(chip, evt);
2226                 break;
2227
2228         /* UFP */
2229         case policy_snk_startup:
2230                 fusb_state_snk_startup(chip, evt);
2231                 break;
2232         case policy_snk_discovery:
2233                 fusb_state_snk_discovery(chip, evt);
2234                 break;
2235         case policy_snk_wait_caps:
2236                 fusb_state_snk_wait_caps(chip, evt);
2237                 break;
2238         case policy_snk_evaluate_caps:
2239                 fusb_state_snk_evaluate_caps(chip, evt);
2240                 /* without break */
2241         case policy_snk_select_cap:
2242                 fusb_state_snk_select_cap(chip, evt);
2243                 break;
2244         case policy_snk_transition_sink:
2245                 fusb_state_snk_transition_sink(chip, evt);
2246                 break;
2247         case policy_snk_transition_default:
2248                 fusb_state_snk_transition_default(chip, evt);
2249                 break;
2250         case policy_snk_ready:
2251                 fusb_state_snk_ready(chip, evt);
2252                 break;
2253         case policy_snk_send_hardrst:
2254                 fusb_state_snk_send_hardreset(chip, evt);
2255                 break;
2256         case policy_snk_send_softrst:
2257                 fusb_state_snk_send_softreset(chip, evt);
2258                 break;
2259
2260         default:
2261                 break;
2262         }
2263
2264 BACK:
2265         if (chip->work_continue) {
2266                 queue_work(chip->fusb30x_wq, &chip->work);
2267                 return;
2268         }
2269
2270         if (!platform_get_device_irq_state(chip))
2271                 fusb_irq_enable(chip);
2272         else
2273                 queue_work(chip->fusb30x_wq, &chip->work);
2274 }
2275
2276 static irqreturn_t cc_interrupt_handler(int irq, void *dev_id)
2277 {
2278         struct fusb30x_chip *chip = dev_id;
2279
2280         queue_work(chip->fusb30x_wq, &chip->work);
2281         fusb_irq_disable(chip);
2282         return IRQ_HANDLED;
2283 }
2284
2285 static int fusb_initialize_gpio(struct fusb30x_chip *chip)
2286 {
2287         chip->gpio_int = devm_gpiod_get_optional(chip->dev, "int-n", GPIOD_IN);
2288         if (IS_ERR(chip->gpio_int))
2289                 return PTR_ERR(chip->gpio_int);
2290
2291         /* some board support vbus with other ways */
2292         chip->gpio_vbus_5v = devm_gpiod_get_optional(chip->dev, "vbus-5v",
2293                                                      GPIOD_OUT_LOW);
2294         if (IS_ERR(chip->gpio_vbus_5v))
2295                 dev_warn(chip->dev,
2296                          "Could not get named GPIO for VBus5V!\n");
2297         else
2298                 gpiod_set_raw_value(chip->gpio_vbus_5v, 0);
2299
2300         chip->gpio_vbus_other = devm_gpiod_get_optional(chip->dev,
2301                                                         "vbus-other",
2302                                                         GPIOD_OUT_LOW);
2303         if (IS_ERR(chip->gpio_vbus_other))
2304                 dev_warn(chip->dev,
2305                          "Could not get named GPIO for VBusOther!\n");
2306         else
2307                 gpiod_set_raw_value(chip->gpio_vbus_other, 0);
2308
2309         chip->gpio_discharge = devm_gpiod_get_optional(chip->dev, "discharge",
2310                                                        GPIOD_OUT_LOW);
2311         if (IS_ERR(chip->gpio_discharge)) {
2312                 dev_warn(chip->dev,
2313                          "Could not get named GPIO for discharge!\n");
2314                 chip->gpio_discharge = NULL;
2315         }
2316
2317         return 0;
2318 }
2319
2320 static enum hrtimer_restart fusb_timer_handler(struct hrtimer *timer)
2321 {
2322         int i;
2323
2324         for (i = 0; i < fusb30x_port_used; i++) {
2325                 if (timer == &fusb30x_port_info[i]->timer_state_machine) {
2326                         if (fusb30x_port_info[i]->timer_state != T_DISABLED)
2327                                 fusb30x_port_info[i]->timer_state = 0;
2328                         break;
2329                 }
2330
2331                 if (timer == &fusb30x_port_info[i]->timer_mux_machine) {
2332                         if (fusb30x_port_info[i]->timer_mux != T_DISABLED)
2333                                 fusb30x_port_info[i]->timer_mux = 0;
2334                         break;
2335                 }
2336         }
2337
2338         if (i != fusb30x_port_used)
2339                 queue_work(fusb30x_port_info[i]->fusb30x_wq,
2340                            &fusb30x_port_info[i]->work);
2341
2342         return HRTIMER_NORESTART;
2343 }
2344
2345 static void fusb_initialize_timer(struct fusb30x_chip *chip)
2346 {
2347         hrtimer_init(&chip->timer_state_machine, CLOCK_MONOTONIC,
2348                      HRTIMER_MODE_REL);
2349         chip->timer_state_machine.function = fusb_timer_handler;
2350
2351         hrtimer_init(&chip->timer_mux_machine, CLOCK_MONOTONIC,
2352                      HRTIMER_MODE_REL);
2353         chip->timer_mux_machine.function = fusb_timer_handler;
2354
2355         chip->timer_state = T_DISABLED;
2356         chip->timer_mux = T_DISABLED;
2357 }
2358
2359 static void fusb302_work_func(struct work_struct *work)
2360 {
2361         struct fusb30x_chip *chip;
2362
2363         chip = container_of(work, struct fusb30x_chip, work);
2364         state_machine_typec(chip);
2365 }
2366
2367 static int fusb30x_probe(struct i2c_client *client,
2368                          const struct i2c_device_id *id)
2369 {
2370         struct fusb30x_chip *chip;
2371         struct PD_CAP_INFO *pd_cap_info;
2372         int ret;
2373
2374         chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
2375         if (!chip)
2376                 return -ENOMEM;
2377
2378         if (fusb30x_port_used == 0xff)
2379                 return -1;
2380
2381         chip->port_num = fusb30x_port_used++;
2382         fusb30x_port_info[chip->port_num] = chip;
2383
2384         chip->dev = &client->dev;
2385         chip->regmap = devm_regmap_init_i2c(client, &fusb302_regmap_config);
2386         if (IS_ERR(chip->regmap)) {
2387                 dev_err(&client->dev, "Failed to allocate regmap!\n");
2388                 return PTR_ERR(chip->regmap);
2389         }
2390
2391         ret = fusb_initialize_gpio(chip);
2392         if (ret)
2393                 return ret;
2394
2395         fusb_initialize_timer(chip);
2396
2397         chip->fusb30x_wq = create_workqueue("fusb302_wq");
2398         INIT_WORK(&chip->work, fusb302_work_func);
2399
2400         tcpm_init(chip);
2401         tcpm_set_rx_enable(chip, 0);
2402         chip->conn_state = unattached;
2403         tcpm_set_cc(chip, FUSB_MODE_DRP);
2404
2405         chip->n_caps_used = 1;
2406         chip->source_power_supply[0] = 0x64;
2407         chip->source_max_current[0] = 0x96;
2408
2409         /*
2410          * these two variable should be 1 if support DRP,
2411          * but now we do not support swap,
2412          * it will be blanked in future
2413          */
2414         pd_cap_info = &chip->pd_cap_info;
2415         pd_cap_info->dual_role_power = 0;
2416         pd_cap_info->data_role_swap = 0;
2417
2418         pd_cap_info->externally_powered = 1;
2419         pd_cap_info->usb_suspend_support = 0;
2420         pd_cap_info->usb_communications_cap = 0;
2421         pd_cap_info->supply_type = 0;
2422         pd_cap_info->peak_current = 0;
2423
2424         chip->extcon = devm_extcon_dev_allocate(&client->dev, fusb302_cable);
2425         if (IS_ERR(chip->extcon)) {
2426                 dev_err(&client->dev, "allocat extcon failed\n");
2427                 return PTR_ERR(chip->extcon);
2428         }
2429
2430         ret = devm_extcon_dev_register(&client->dev, chip->extcon);
2431         if (ret) {
2432                 dev_err(&client->dev, "failed to register extcon: %d\n",
2433                         ret);
2434                 return ret;
2435         }
2436
2437         ret = extcon_set_property_capability(chip->extcon, EXTCON_USB,
2438                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2439         if (ret) {
2440                 dev_err(&client->dev,
2441                         "failed to set USB property capability: %d\n",
2442                         ret);
2443                 return ret;
2444         }
2445
2446         ret = extcon_set_property_capability(chip->extcon, EXTCON_USB_HOST,
2447                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2448         if (ret) {
2449                 dev_err(&client->dev,
2450                         "failed to set USB_HOST property capability: %d\n",
2451                         ret);
2452                 return ret;
2453         }
2454
2455         ret = extcon_set_property_capability(chip->extcon, EXTCON_DISP_DP,
2456                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2457         if (ret) {
2458                 dev_err(&client->dev,
2459                         "failed to set DISP_DP property capability: %d\n",
2460                         ret);
2461                 return ret;
2462         }
2463
2464         ret = extcon_set_property_capability(chip->extcon, EXTCON_USB,
2465                                              EXTCON_PROP_USB_SS);
2466         if (ret) {
2467                 dev_err(&client->dev,
2468                         "failed to set USB USB_SS property capability: %d\n",
2469                         ret);
2470                 return ret;
2471         }
2472
2473         ret = extcon_set_property_capability(chip->extcon, EXTCON_USB_HOST,
2474                                              EXTCON_PROP_USB_SS);
2475         if (ret) {
2476                 dev_err(&client->dev,
2477                         "failed to set USB_HOST USB_SS property capability: %d\n",
2478                         ret);
2479                 return ret;
2480         }
2481
2482         ret = extcon_set_property_capability(chip->extcon, EXTCON_DISP_DP,
2483                                              EXTCON_PROP_USB_SS);
2484         if (ret) {
2485                 dev_err(&client->dev,
2486                         "failed to set DISP_DP USB_SS property capability: %d\n",
2487                         ret);
2488                 return ret;
2489         }
2490
2491         ret = extcon_set_property_capability(chip->extcon, EXTCON_CHG_USB_FAST,
2492                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2493         if (ret) {
2494                 dev_err(&client->dev,
2495                         "failed to set USB_PD property capability: %d\n", ret);
2496                 return ret;
2497         }
2498
2499         i2c_set_clientdata(client, chip);
2500
2501         spin_lock_init(&chip->irq_lock);
2502         chip->enable_irq = 1;
2503
2504         chip->gpio_int_irq = gpiod_to_irq(chip->gpio_int);
2505         if (chip->gpio_int_irq < 0) {
2506                 dev_err(&client->dev,
2507                         "Unable to request IRQ for INT_N GPIO! %d\n",
2508                         ret);
2509                 ret = chip->gpio_int_irq;
2510                 goto IRQ_ERR;
2511         }
2512
2513         ret = devm_request_threaded_irq(&client->dev,
2514                                         chip->gpio_int_irq,
2515                                         NULL,
2516                                         cc_interrupt_handler,
2517                                         IRQF_ONESHOT | IRQF_TRIGGER_LOW,
2518                                         client->name,
2519                                         chip);
2520         if (ret) {
2521                 dev_err(&client->dev, "irq request failed\n");
2522                 goto IRQ_ERR;
2523         }
2524
2525         dev_info(chip->dev, "port %d probe success\n", chip->port_num);
2526
2527         return 0;
2528
2529 IRQ_ERR:
2530         destroy_workqueue(chip->fusb30x_wq);
2531         return ret;
2532 }
2533
2534 static int fusb30x_remove(struct i2c_client *client)
2535 {
2536         struct fusb30x_chip *chip = i2c_get_clientdata(client);
2537
2538         destroy_workqueue(chip->fusb30x_wq);
2539         return 0;
2540 }
2541
2542 static void fusb30x_shutdown(struct i2c_client *client)
2543 {
2544         struct fusb30x_chip *chip = i2c_get_clientdata(client);
2545
2546         if (chip->gpio_vbus_5v)
2547                 gpiod_set_value(chip->gpio_vbus_5v, 0);
2548         if (chip->gpio_discharge) {
2549                 gpiod_set_value(chip->gpio_discharge, 1);
2550                 msleep(100);
2551                 gpiod_set_value(chip->gpio_discharge, 0);
2552         }
2553 }
2554
2555 static const struct of_device_id fusb30x_dt_match[] = {
2556         { .compatible = FUSB30X_I2C_DEVICETREE_NAME },
2557         {},
2558 };
2559 MODULE_DEVICE_TABLE(of, fusb30x_dt_match);
2560
2561 static const struct i2c_device_id fusb30x_i2c_device_id[] = {
2562         { FUSB30X_I2C_DRIVER_NAME, 0 },
2563         {}
2564 };
2565 MODULE_DEVICE_TABLE(i2c, fusb30x_i2c_device_id);
2566
2567 static struct i2c_driver fusb30x_driver = {
2568         .driver = {
2569                 .name = FUSB30X_I2C_DRIVER_NAME,
2570                 .of_match_table = of_match_ptr(fusb30x_dt_match),
2571         },
2572         .probe = fusb30x_probe,
2573         .remove = fusb30x_remove,
2574         .shutdown = fusb30x_shutdown,
2575         .id_table = fusb30x_i2c_device_id,
2576 };
2577
2578 module_i2c_driver(fusb30x_driver);
2579
2580 MODULE_LICENSE("GPL");
2581 MODULE_AUTHOR("zain wang <zain.wang@rock-chips.com>");
2582 MODULE_DESCRIPTION("fusb302 typec pd driver");