2 * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd
3 * Author: Zain Wang <zain.wang@rock-chips.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * Some ideas are from chrome ec and fairchild GPL fusb302 driver.
12 #include <linux/delay.h>
13 #include <linux/extcon.h>
14 #include <linux/gpio.h>
15 #include <linux/interrupt.h>
16 #include <linux/module.h>
17 #include <linux/of_gpio.h>
18 #include <linux/regmap.h>
19 #include <linux/power_supply.h>
23 #define FUSB302_MAX_REG (FUSB_REG_FIFO + 50)
24 #define FUSB_MS_TO_NS(x) ((s64)x * 1000 * 1000)
26 #define FUSB_MODE_DRP 0
27 #define FUSB_MODE_UFP 1
28 #define FUSB_MODE_DFP 2
29 #define FUSB_MODE_ASS 3
31 #define TYPEC_CC_VOLT_OPEN 0
32 #define TYPEC_CC_VOLT_RA 1
33 #define TYPEC_CC_VOLT_RD 2
34 #define TYPEC_CC_VOLT_RP 3
36 #define EVENT_CC BIT(0)
37 #define EVENT_RX BIT(1)
38 #define EVENT_TX BIT(2)
39 #define EVENT_REC_RESET BIT(3)
40 #define EVENT_WORK_CONTINUE BIT(5)
41 #define EVENT_TIMER_MUX BIT(6)
42 #define EVENT_TIMER_STATE BIT(7)
43 #define FLAG_EVENT (EVENT_RX | EVENT_TIMER_MUX | \
46 #define PIN_MAP_A BIT(0)
47 #define PIN_MAP_B BIT(1)
48 #define PIN_MAP_C BIT(2)
49 #define PIN_MAP_D BIT(3)
50 #define PIN_MAP_E BIT(4)
51 #define PIN_MAP_F BIT(5)
53 static u8 fusb30x_port_used;
54 static struct fusb30x_chip *fusb30x_port_info[256];
56 static bool is_write_reg(struct device *dev, unsigned int reg)
58 if (reg >= FUSB_REG_FIFO)
61 return ((reg < (FUSB_REG_CONTROL4 + 1)) && (reg > 0x01)) ?
65 static bool is_volatile_reg(struct device *dev, unsigned int reg)
67 if (reg > FUSB_REG_CONTROL4)
71 case FUSB_REG_CONTROL0:
72 case FUSB_REG_CONTROL1:
73 case FUSB_REG_CONTROL3:
80 struct regmap_config fusb302_regmap_config = {
83 .writeable_reg = is_write_reg,
84 .volatile_reg = is_volatile_reg,
85 .max_register = FUSB302_MAX_REG,
86 .cache_type = REGCACHE_RBTREE,
89 static void dump_notify_info(struct fusb30x_chip *chip)
91 dev_dbg(chip->dev, "port %d\n", chip->port_num);
92 dev_dbg(chip->dev, "orientation %d\n", chip->notify.orientation);
93 dev_dbg(chip->dev, "power_role %d\n", chip->notify.power_role);
94 dev_dbg(chip->dev, "data_role %d\n", chip->notify.data_role);
95 dev_dbg(chip->dev, "cc %d\n", chip->notify.is_cc_connected);
96 dev_dbg(chip->dev, "pd %d\n", chip->notify.is_pd_connected);
97 dev_dbg(chip->dev, "enter_mode %d\n", chip->notify.is_enter_mode);
98 dev_dbg(chip->dev, "pin support %d\n",
99 chip->notify.pin_assignment_support);
100 dev_dbg(chip->dev, "pin def %d\n", chip->notify.pin_assignment_def);
101 dev_dbg(chip->dev, "attention %d\n", chip->notify.attention);
104 static const unsigned int fusb302_cable[] = {
117 static void fusb_set_pos_power(struct fusb30x_chip *chip, int max_vol,
125 for (i = PD_HEADER_CNT(chip->rec_head) - 1; i >= 0; i--) {
126 switch (CAP_POWER_TYPE(chip->rec_load[i])) {
129 if ((CAP_FPDO_VOLTAGE(chip->rec_load[i]) * 50) <=
131 (CAP_FPDO_CURRENT(chip->rec_load[i]) * 10) <=
133 chip->pos_power = i + 1;
134 tmp = CAP_FPDO_VOLTAGE(chip->rec_load[i]);
135 chip->pd_output_vol = tmp * 50;
136 tmp = CAP_FPDO_CURRENT(chip->rec_load[i]);
137 chip->pd_output_cur = tmp * 10;
143 if ((CAP_VPDO_VOLTAGE(chip->rec_load[i]) * 50) <=
145 (CAP_VPDO_CURRENT(chip->rec_load[i]) * 10) <=
147 chip->pos_power = i + 1;
148 tmp = CAP_VPDO_VOLTAGE(chip->rec_load[i]);
149 chip->pd_output_vol = tmp * 50;
150 tmp = CAP_VPDO_CURRENT(chip->rec_load[i]);
151 chip->pd_output_cur = tmp * 10;
156 /* not meet battery caps */
164 static int fusb302_set_pos_power_by_charge_ic(struct fusb30x_chip *chip)
166 struct power_supply *psy = NULL;
167 union power_supply_propval val;
168 enum power_supply_property psp;
169 int max_vol, max_cur;
173 psy = power_supply_get_by_phandle(chip->dev->of_node, "charge-dev");
174 if (!psy || IS_ERR(psy))
177 psp = POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT_MAX;
178 if (power_supply_get_property(psy, psp, &val) == 0)
179 max_vol = val.intval / 1000;
181 psp = POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT;
182 if (power_supply_get_property(psy, psp, &val) == 0)
183 max_cur = val.intval / 1000;
185 if (max_vol > 0 && max_cur > 0)
186 fusb_set_pos_power(chip, max_vol, max_cur);
191 void fusb_irq_disable(struct fusb30x_chip *chip)
193 unsigned long irqflags = 0;
195 spin_lock_irqsave(&chip->irq_lock, irqflags);
196 if (chip->enable_irq) {
197 disable_irq_nosync(chip->gpio_int_irq);
198 chip->enable_irq = 0;
200 dev_warn(chip->dev, "irq have already disabled\n");
202 spin_unlock_irqrestore(&chip->irq_lock, irqflags);
205 void fusb_irq_enable(struct fusb30x_chip *chip)
207 unsigned long irqflags = 0;
209 spin_lock_irqsave(&chip->irq_lock, irqflags);
210 if (!chip->enable_irq) {
211 enable_irq(chip->gpio_int_irq);
212 chip->enable_irq = 1;
214 spin_unlock_irqrestore(&chip->irq_lock, irqflags);
217 static void platform_fusb_notify(struct fusb30x_chip *chip)
219 bool plugged = 0, flip = 0, dfp = 0, ufp = 0, dp = 0, usb_ss = 0;
220 union extcon_property_value property;
222 if (chip->notify.is_cc_connected)
223 chip->notify.orientation = chip->cc_polarity + 1;
225 /* avoid notify repeated */
226 if (memcmp(&chip->notify, &chip->notify_cmp,
227 sizeof(struct notify_info))) {
228 dump_notify_info(chip);
229 chip->notify.attention = 0;
230 memcpy(&chip->notify_cmp, &chip->notify,
231 sizeof(struct notify_info));
233 plugged = chip->notify.is_cc_connected ||
234 chip->notify.is_pd_connected;
235 flip = chip->notify.orientation ?
236 (chip->notify.orientation - 1) : 0;
237 dp = chip->notify.is_enter_mode;
241 usb_ss = (chip->notify.pin_assignment_def &
242 (PIN_MAP_B | PIN_MAP_D | PIN_MAP_F)) ? 1 : 0;
243 } else if (chip->notify.data_role) {
246 } else if (plugged) {
251 property.intval = flip;
252 extcon_set_property(chip->extcon, EXTCON_USB,
253 EXTCON_PROP_USB_TYPEC_POLARITY, property);
254 extcon_set_property(chip->extcon, EXTCON_USB_HOST,
255 EXTCON_PROP_USB_TYPEC_POLARITY, property);
256 extcon_set_property(chip->extcon, EXTCON_DISP_DP,
257 EXTCON_PROP_USB_TYPEC_POLARITY, property);
259 property.intval = usb_ss;
260 extcon_set_property(chip->extcon, EXTCON_USB,
261 EXTCON_PROP_USB_SS, property);
262 extcon_set_property(chip->extcon, EXTCON_USB_HOST,
263 EXTCON_PROP_USB_SS, property);
264 extcon_set_property(chip->extcon, EXTCON_DISP_DP,
265 EXTCON_PROP_USB_SS, property);
266 extcon_set_state(chip->extcon, EXTCON_USB, ufp);
267 extcon_set_state(chip->extcon, EXTCON_USB_HOST, dfp);
268 extcon_set_state(chip->extcon, EXTCON_DISP_DP, dp);
269 extcon_sync(chip->extcon, EXTCON_USB);
270 extcon_sync(chip->extcon, EXTCON_USB_HOST);
271 extcon_sync(chip->extcon, EXTCON_DISP_DP);
272 if (chip->notify.power_role == 0 &&
273 chip->notify.is_pd_connected &&
274 chip->pd_output_vol > 0 && chip->pd_output_cur > 0) {
275 extcon_set_state(chip->extcon, EXTCON_CHG_USB_FAST, true);
277 (chip->pd_output_cur << 15 |
278 chip->pd_output_vol);
279 extcon_set_property(chip->extcon, EXTCON_CHG_USB_FAST,
280 EXTCON_PROP_USB_TYPEC_POLARITY,
282 extcon_sync(chip->extcon, EXTCON_CHG_USB_FAST);
287 static bool platform_get_device_irq_state(struct fusb30x_chip *chip)
289 return !gpiod_get_value(chip->gpio_int);
292 static void fusb_timer_start(struct hrtimer *timer, int ms)
296 ktime = ktime_set(0, FUSB_MS_TO_NS(ms));
297 hrtimer_start(timer, ktime, HRTIMER_MODE_REL);
300 static void platform_set_vbus_lvl_enable(struct fusb30x_chip *chip, int vbus_5v,
303 if (chip->gpio_vbus_5v) {
304 gpiod_set_raw_value(chip->gpio_vbus_5v, vbus_5v);
305 /* Only set state here, don't sync notifier to PMIC */
306 extcon_set_state(chip->extcon, EXTCON_USB_VBUS_EN, vbus_5v);
308 extcon_set_state(chip->extcon, EXTCON_USB_VBUS_EN, vbus_5v);
309 extcon_sync(chip->extcon, EXTCON_USB_VBUS_EN);
310 dev_info(chip->dev, "fusb302 send extcon to enable vbus 5v\n");
313 if (chip->gpio_vbus_other)
314 gpiod_set_raw_value(chip->gpio_vbus_5v, vbus_other);
317 static void set_state(struct fusb30x_chip *chip, enum connection_state state)
319 dev_dbg(chip->dev, "port %d, state %d\n", chip->port_num, state);
321 dev_info(chip->dev, "PD disabled\n");
322 chip->conn_state = state;
325 chip->work_continue = 1;
328 static int tcpm_get_message(struct fusb30x_chip *chip)
333 regmap_raw_read(chip->regmap, FUSB_REG_FIFO, buf, 3);
334 chip->rec_head = (buf[1] & 0xff) | ((buf[2] << 8) & 0xff00);
336 len = PD_HEADER_CNT(chip->rec_head) << 2;
337 regmap_raw_read(chip->regmap, FUSB_REG_FIFO, buf, len + 4);
339 memcpy(chip->rec_load, buf, len);
344 static void fusb302_flush_rx_fifo(struct fusb30x_chip *chip)
346 tcpm_get_message(chip);
349 static int tcpm_get_cc(struct fusb30x_chip *chip, int *CC1, int *CC2)
355 *CC1 = TYPEC_CC_VOLT_OPEN;
356 *CC2 = TYPEC_CC_VOLT_OPEN;
358 if (chip->cc_state & 0x01)
363 if (chip->cc_state & 0x04) {
364 regmap_read(chip->regmap, FUSB_REG_SWITCHES0, &store);
366 /* measure cc1 first */
367 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
368 SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
369 SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
370 SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
371 SWITCHES0_PDWN1 | SWITCHES0_PDWN2 |
373 usleep_range(250, 300);
375 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
376 val &= STATUS0_BC_LVL;
380 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
381 SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
382 SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
383 SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
384 SWITCHES0_PDWN1 | SWITCHES0_PDWN2 |
386 usleep_range(250, 300);
388 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
389 val &= STATUS0_BC_LVL;
393 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
394 SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
397 if (chip->cc_state & 0x01) {
398 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
408 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
419 regmap_write(chip->regmap, FUSB_REG_MEASURE, 0x26 << 2);
420 usleep_range(250, 300);
422 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
424 if (val & STATUS0_COMP) {
425 *CC_MEASURE = TYPEC_CC_VOLT_OPEN;
427 regmap_write(chip->regmap, FUSB_REG_MEASURE, 0x05 << 2);
428 usleep_range(250, 300);
430 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
432 if (val & STATUS0_COMP)
433 *CC_MEASURE = TYPEC_CC_VOLT_RA;
435 *CC_MEASURE = TYPEC_CC_VOLT_RD;
441 static int tcpm_set_cc(struct fusb30x_chip *chip, int mode)
445 val &= ~(SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
446 SWITCHES0_PDWN1 | SWITCHES0_PDWN2);
452 if (chip->togdone_pullup)
453 val |= SWITCHES0_PU_EN2;
455 val |= SWITCHES0_PU_EN1;
458 val |= SWITCHES0_PDWN1 | SWITCHES0_PDWN2;
461 val |= SWITCHES0_PDWN1 | SWITCHES0_PDWN2;
467 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0, mask, val);
471 static int tcpm_set_rx_enable(struct fusb30x_chip *chip, int enable)
476 if (chip->cc_polarity)
477 val |= SWITCHES0_MEAS_CC2;
479 val |= SWITCHES0_MEAS_CC1;
480 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
481 SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
483 fusb302_flush_rx_fifo(chip);
484 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
485 SWITCHES1_AUTO_CRC, SWITCHES1_AUTO_CRC);
488 * bit of a hack here.
489 * when this function is called to disable rx (enable=0)
490 * using it as an indication of detach (gulp!)
491 * to reset our knowledge of where
492 * the toggle state machine landed.
494 chip->togdone_pullup = 0;
497 tcpm_set_cc(chip, FUSB_MODE_DRP);
498 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
499 CONTROL2_TOG_RD_ONLY,
500 CONTROL2_TOG_RD_ONLY);
502 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
503 SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
505 regmap_update_bits(chip->regmap,
506 FUSB_REG_SWITCHES1, SWITCHES1_AUTO_CRC, 0);
512 static int tcpm_set_msg_header(struct fusb30x_chip *chip)
514 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
515 SWITCHES1_POWERROLE | SWITCHES1_DATAROLE,
516 (chip->notify.power_role << 7) |
517 (chip->notify.data_role << 4));
518 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
519 SWITCHES1_SPECREV, 2 << 5);
523 static int tcpm_set_polarity(struct fusb30x_chip *chip, bool polarity)
527 #ifdef FUSB_VCONN_SUPPORT
528 if (chip->vconn_enabled) {
530 val |= SWITCHES0_VCONN_CC1;
532 val |= SWITCHES0_VCONN_CC2;
537 val |= SWITCHES0_MEAS_CC2;
539 val |= SWITCHES0_MEAS_CC1;
541 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
542 SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2 |
543 SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
548 val |= SWITCHES1_TXCC2;
550 val |= SWITCHES1_TXCC1;
551 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
552 SWITCHES1_TXCC1 | SWITCHES1_TXCC2,
555 chip->cc_polarity = polarity;
560 static int tcpm_set_vconn(struct fusb30x_chip *chip, int enable)
565 tcpm_set_polarity(chip, chip->cc_polarity);
567 val &= ~(SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2);
568 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
569 SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2,
572 chip->vconn_enabled = enable;
576 static void fusb302_pd_reset(struct fusb30x_chip *chip)
578 regmap_write(chip->regmap, FUSB_REG_RESET, RESET_PD_RESET);
579 regmap_reinit_cache(chip->regmap, &fusb302_regmap_config);
582 static void tcpm_init(struct fusb30x_chip *chip)
587 regmap_read(chip->regmap, FUSB_REG_DEVICEID, &tmp);
588 chip->chip_id = (u8)tmp;
589 platform_set_vbus_lvl_enable(chip, 0, 0);
590 chip->notify.is_cc_connected = 0;
593 /* restore default settings */
594 regmap_update_bits(chip->regmap, FUSB_REG_RESET, RESET_SW_RESET,
596 fusb302_pd_reset(chip);
597 /* set auto_retry and number of retries */
598 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL3,
599 CONTROL3_AUTO_RETRY | CONTROL3_N_RETRIES,
600 CONTROL3_AUTO_RETRY | CONTROL3_N_RETRIES),
604 val &= ~(MASK_M_BC_LVL | MASK_M_COLLISION | MASK_M_ALERT |
606 regmap_write(chip->regmap, FUSB_REG_MASK, val);
609 val &= ~(MASKA_M_TOGDONE | MASKA_M_RETRYFAIL | MASKA_M_HARDSENT |
610 MASKA_M_TXSENT | MASKA_M_HARDRST);
611 regmap_write(chip->regmap, FUSB_REG_MASKA, val);
614 val = ~MASKB_M_GCRCSEND;
615 regmap_write(chip->regmap, FUSB_REG_MASKB, val);
618 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
619 CONTROL2_MODE | CONTROL2_TOGGLE,
620 (1 << 1) | CONTROL2_TOGGLE);
622 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
623 CONTROL2_TOG_RD_ONLY,
624 CONTROL2_TOG_RD_ONLY);
626 /* Interrupts Enable */
627 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL0, CONTROL0_INT_MASK,
630 tcpm_set_polarity(chip, 0);
631 tcpm_set_vconn(chip, 0);
633 regmap_write(chip->regmap, FUSB_REG_POWER, 0xf);
636 static void pd_execute_hard_reset(struct fusb30x_chip *chip)
640 if (chip->notify.power_role)
641 set_state(chip, policy_src_transition_default);
643 set_state(chip, policy_snk_transition_default);
646 static void tcpc_alert(struct fusb30x_chip *chip, int *evt)
648 int interrupt, interrupta, interruptb;
651 regmap_read(chip->regmap, FUSB_REG_INTERRUPT, &interrupt);
652 regmap_read(chip->regmap, FUSB_REG_INTERRUPTA, &interrupta);
653 regmap_read(chip->regmap, FUSB_REG_INTERRUPTB, &interruptb);
655 if (interrupt & INTERRUPT_BC_LVL) {
656 if (chip->notify.is_cc_connected)
660 if (interrupt & INTERRUPT_VBUSOK) {
661 if (chip->notify.is_cc_connected)
665 if (interrupta & INTERRUPTA_TOGDONE) {
667 regmap_read(chip->regmap, FUSB_REG_STATUS1A, &val);
668 chip->cc_state = ((u8)val >> 3) & 0x07;
670 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
674 val &= ~(SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
675 SWITCHES0_PDWN1 | SWITCHES0_PDWN2);
677 if (chip->cc_state | 0x01)
678 val |= SWITCHES0_PU_EN1;
680 val |= SWITCHES0_PU_EN2;
682 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
683 SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
684 SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
688 if (interrupta & INTERRUPTA_TXSENT) {
690 fusb302_flush_rx_fifo(chip);
691 chip->tx_state = tx_success;
694 if (interruptb & INTERRUPTB_GCRCSENT)
697 if (interrupta & INTERRUPTA_HARDRST) {
698 fusb302_pd_reset(chip);
699 pd_execute_hard_reset(chip);
700 *evt |= EVENT_REC_RESET;
703 if (interrupta & INTERRUPTA_RETRYFAIL) {
705 chip->tx_state = tx_failed;
708 if (interrupta & INTERRUPTA_HARDSENT) {
709 chip->tx_state = tx_success;
710 chip->timer_state = T_DISABLED;
715 static void mux_alert(struct fusb30x_chip *chip, int *evt)
717 if (!chip->timer_mux) {
718 *evt |= EVENT_TIMER_MUX;
719 chip->timer_mux = T_DISABLED;
722 if (!chip->timer_state) {
723 *evt |= EVENT_TIMER_STATE;
724 chip->timer_state = T_DISABLED;
727 if (chip->work_continue) {
728 *evt |= EVENT_WORK_CONTINUE;
729 chip->work_continue = 0;
733 static void set_state_unattached(struct fusb30x_chip *chip)
735 dev_info(chip->dev, "connection has disconnected\n");
737 tcpm_set_rx_enable(chip, 0);
738 chip->conn_state = unattached;
739 tcpm_set_cc(chip, FUSB_MODE_DRP);
741 /* claer notify_info */
742 memset(&chip->notify, 0, sizeof(struct notify_info));
743 platform_fusb_notify(chip);
748 static int tcpm_check_vbus(struct fusb30x_chip *chip)
752 /* Read status register */
753 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
755 return (val & STATUS0_VBUSOK) ? 1 : 0;
758 static void set_mesg(struct fusb30x_chip *chip, int cmd, int is_DMT)
761 struct PD_CAP_INFO *pd_cap_info = &chip->pd_cap_info;
763 chip->send_head = ((chip->msg_id & 0x7) << 9) |
764 ((chip->notify.power_role & 0x1) << 8) |
766 ((chip->notify.data_role & 0x1) << 5);
770 case DMT_SOURCECAPABILITIES:
771 chip->send_head |= ((chip->n_caps_used & 0x3) << 12) | (cmd & 0xf);
773 for (i = 0; i < chip->n_caps_used; i++) {
774 chip->send_load[i] = (pd_cap_info->supply_type << 30) |
775 (pd_cap_info->dual_role_power << 29) |
776 (pd_cap_info->usb_suspend_support << 28) |
777 (pd_cap_info->externally_powered << 27) |
778 (pd_cap_info->usb_communications_cap << 26) |
779 (pd_cap_info->data_role_swap << 25) |
780 (pd_cap_info->peak_current << 20) |
781 (chip->source_power_supply[i] << 10) |
782 (chip->source_max_current[i]);
786 chip->send_head |= ((1 << 12) | (cmd & 0xf));
787 /* send request with FVRDO */
788 chip->send_load[0] = (chip->pos_power << 28) |
794 switch (CAP_POWER_TYPE(chip->rec_load[chip->pos_power - 1])) {
797 chip->send_load[0] |= ((CAP_FPDO_VOLTAGE(chip->rec_load[chip->pos_power - 1]) << 10) & 0x3ff);
798 chip->send_load[0] |= (CAP_FPDO_CURRENT(chip->rec_load[chip->pos_power - 1]) & 0x3ff);
802 chip->send_load[0] |= ((CAP_VPDO_VOLTAGE(chip->rec_load[chip->pos_power - 1]) << 10) & 0x3ff);
803 chip->send_load[0] |= (CAP_VPDO_CURRENT(chip->rec_load[chip->pos_power - 1]) & 0x3ff);
806 /* not meet battery caps */
810 case DMT_SINKCAPABILITIES:
812 case DMT_VENDERDEFINED:
818 chip->send_head |= (cmd & 0xf);
822 static void set_vdm_mesg(struct fusb30x_chip *chip, int cmd, int type, int mode)
824 chip->send_head = (chip->msg_id & 0x7) << 9;
825 chip->send_head |= (chip->notify.power_role & 0x1) << 8;
827 chip->send_head = ((chip->msg_id & 0x7) << 9) |
828 ((chip->notify.power_role & 0x1) << 8) |
830 ((chip->notify.data_role & 0x1) << 5) |
831 (DMT_VENDERDEFINED & 0xf);
833 chip->send_load[0] = (1 << 15) |
839 case VDM_DISCOVERY_ID:
840 case VDM_DISCOVERY_SVIDS:
842 chip->send_load[0] |= (0xff00 << 16);
843 chip->send_head |= (1 << 12);
845 case VDM_DISCOVERY_MODES:
846 chip->send_load[0] |=
847 (chip->vdm_svid[chip->val_tmp >> 1] << 16);
848 chip->send_head |= (1 << 12);
851 chip->send_head |= (1 << 12);
852 chip->send_load[0] |= (mode << 8) | (0xff01 << 16);
855 chip->send_head |= (1 << 12);
856 chip->send_load[0] |= (0x0f << 8) | (0xff01 << 16);
858 case VDM_DP_STATUS_UPDATE:
859 chip->send_head |= (2 << 12);
860 chip->send_load[0] |= (1 << 8) | (0xff01 << 16);
861 chip->send_load[1] = 5;
864 chip->send_head |= (2 << 12);
865 chip->send_load[0] |= (1 << 8) | (0xff01 << 16);
866 chip->send_load[1] = (chip->notify.pin_assignment_def << 8) |
874 static enum tx_state policy_send_hardrst(struct fusb30x_chip *chip, int evt)
876 switch (chip->tx_state) {
878 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL3,
879 CONTROL3_SEND_HARDRESET,
880 CONTROL3_SEND_HARDRESET);
881 chip->tx_state = tx_busy;
882 chip->timer_state = T_BMC_TIMEOUT;
883 fusb_timer_start(&chip->timer_state_machine,
887 if (evt & EVENT_TIMER_STATE)
888 chip->tx_state = tx_success;
891 return chip->tx_state;
894 static enum tx_state policy_send_data(struct fusb30x_chip *chip)
900 switch (chip->tx_state) {
902 senddata[pos++] = FUSB_TKN_SYNC1;
903 senddata[pos++] = FUSB_TKN_SYNC1;
904 senddata[pos++] = FUSB_TKN_SYNC1;
905 senddata[pos++] = FUSB_TKN_SYNC2;
907 len = PD_HEADER_CNT(chip->send_head) << 2;
908 senddata[pos++] = FUSB_TKN_PACKSYM | ((len + 2) & 0x1f);
910 senddata[pos++] = chip->send_head & 0xff;
911 senddata[pos++] = (chip->send_head >> 8) & 0xff;
913 memcpy(&senddata[pos], chip->send_load, len);
916 senddata[pos++] = FUSB_TKN_JAMCRC;
917 senddata[pos++] = FUSB_TKN_EOP;
918 senddata[pos++] = FUSB_TKN_TXOFF;
919 senddata[pos++] = FUSB_TKN_TXON;
921 regmap_raw_write(chip->regmap, FUSB_REG_FIFO, senddata, pos);
922 chip->tx_state = tx_busy;
930 return chip->tx_state;
933 static void process_vdm_msg(struct fusb30x_chip *chip)
935 u32 vdm_header = chip->rec_load[0];
939 /* can't procee unstructed vdm msg */
940 if (!GET_VDMHEAD_STRUCT_TYPE(vdm_header))
943 switch (GET_VDMHEAD_CMD_TYPE(vdm_header)) {
945 switch (GET_VDMHEAD_CMD(vdm_header)) {
947 dev_info(chip->dev, "attention, dp_status %x\n",
949 chip->notify.attention = 1;
953 dev_warn(chip->dev, "rec unknown init vdm msg\n");
958 switch (GET_VDMHEAD_CMD(vdm_header)) {
959 case VDM_DISCOVERY_ID:
960 chip->vdm_id = chip->rec_load[1];
962 case VDM_DISCOVERY_SVIDS:
963 for (i = 0; i < 6; i++) {
964 tmp = (chip->rec_load[i + 1] >> 16) &
967 chip->vdm_svid[i * 2] = tmp;
968 chip->vdm_svid_num++;
973 tmp = (chip->rec_load[i + 1] & 0x0000ffff);
975 chip->vdm_svid[i * 2 + 1] = tmp;
976 chip->vdm_svid_num++;
982 case VDM_DISCOVERY_MODES:
983 /* indicate there are some vdo modes */
984 if (PD_HEADER_CNT(chip->rec_head) > 1) {
987 * enter first mode default
989 if (!((chip->rec_load[1] >> 8) & 0x3f)) {
993 chip->notify.pin_assignment_support = 0;
994 chip->notify.pin_assignment_def = 0;
995 chip->notify.pin_assignment_support =
996 (chip->rec_load[1] >> 8) & 0x3f;
997 tmp = chip->notify.pin_assignment_support;
998 for (i = 0; i < 6; i++) {
1004 chip->notify.pin_assignment_def = 0x20 >> i;
1008 case VDM_ENTER_MODE:
1011 case VDM_DP_STATUS_UPDATE:
1012 dev_dbg(chip->dev, "dp_status 0x%x\n",
1019 "DP config successful, pin_assignment 0x%x\n",
1020 chip->notify.pin_assignment_def);
1021 chip->notify.is_enter_mode = 1;
1028 dev_warn(chip->dev, "REC NACK for 0x%x\n",
1029 GET_VDMHEAD_CMD(vdm_header));
1031 chip->vdm_state = 0xff;
1036 static int vdm_send_discoveryid(struct fusb30x_chip *chip, int evt)
1040 switch (chip->vdm_send_state) {
1042 set_vdm_mesg(chip, VDM_DISCOVERY_ID, VDM_TYPE_INIT, 0);
1045 chip->vdm_send_state++;
1047 tmp = policy_send_data(chip);
1048 if (tmp == tx_success) {
1049 chip->vdm_send_state++;
1050 chip->timer_state = T_SENDER_RESPONSE;
1051 fusb_timer_start(&chip->timer_state_machine,
1053 } else if (tmp == tx_failed) {
1054 dev_warn(chip->dev, "VDM_DISCOVERY_ID send failed\n");
1055 /* disable auto_vdm_machine */
1056 chip->vdm_state = 0xff;
1059 if (chip->vdm_send_state != 2)
1062 if (evt & EVENT_TIMER_STATE) {
1063 dev_warn(chip->dev, "VDM_DISCOVERY_ID time out\n");
1064 chip->vdm_state = 0xff;
1065 chip->work_continue = 1;
1070 chip->vdm_send_state = 0;
1073 return -EINPROGRESS;
1076 static int vdm_send_discoverysvid(struct fusb30x_chip *chip, int evt)
1080 switch (chip->vdm_send_state) {
1082 set_vdm_mesg(chip, VDM_DISCOVERY_SVIDS, VDM_TYPE_INIT, 0);
1083 memset(chip->vdm_svid, 0, 12);
1084 chip->vdm_svid_num = 0;
1086 chip->vdm_send_state++;
1088 tmp = policy_send_data(chip);
1089 if (tmp == tx_success) {
1090 chip->vdm_send_state++;
1091 chip->timer_state = T_SENDER_RESPONSE;
1092 fusb_timer_start(&chip->timer_state_machine,
1094 } else if (tmp == tx_failed) {
1095 dev_warn(chip->dev, "VDM_DISCOVERY_SVIDS send failed\n");
1096 /* disable auto_vdm_machine */
1097 chip->vdm_state = 0xff;
1100 if (chip->vdm_send_state != 2)
1103 if (evt & EVENT_TIMER_STATE) {
1104 dev_warn(chip->dev, "VDM_DISCOVERY_SVIDS time out\n");
1105 chip->vdm_state = 0xff;
1106 chip->work_continue = 1;
1109 if (!chip->vdm_svid_num)
1111 chip->vdm_send_state = 0;
1114 return -EINPROGRESS;
1117 static int vdm_send_discoverymodes(struct fusb30x_chip *chip, int evt)
1121 if ((chip->val_tmp >> 1) != chip->vdm_svid_num) {
1122 switch (chip->vdm_send_state) {
1124 set_vdm_mesg(chip, VDM_DISCOVERY_MODES,
1127 chip->vdm_send_state++;
1129 tmp = policy_send_data(chip);
1130 if (tmp == tx_success) {
1131 chip->vdm_send_state++;
1132 chip->timer_state = T_SENDER_RESPONSE;
1133 fusb_timer_start(&chip->timer_state_machine,
1135 } else if (tmp == tx_failed) {
1137 "VDM_DISCOVERY_MODES send failed\n");
1138 chip->vdm_state = 0xff;
1141 if (chip->vdm_send_state != 2)
1144 if (evt & EVENT_TIMER_STATE) {
1146 "VDM_DISCOVERY_MODES time out\n");
1147 chip->vdm_state = 0xff;
1148 chip->work_continue = 1;
1151 if (!(chip->val_tmp & 1))
1153 chip->val_tmp &= 0xfe;
1155 chip->vdm_send_state = 0;
1156 chip->work_continue = 1;
1164 return -EINPROGRESS;
1167 static int vdm_send_entermode(struct fusb30x_chip *chip, int evt)
1171 switch (chip->vdm_send_state) {
1173 set_vdm_mesg(chip, VDM_ENTER_MODE, VDM_TYPE_INIT, 1);
1175 chip->vdm_send_state++;
1176 chip->notify.is_enter_mode = 0;
1178 tmp = policy_send_data(chip);
1179 if (tmp == tx_success) {
1180 chip->vdm_send_state++;
1181 chip->timer_state = T_SENDER_RESPONSE;
1182 fusb_timer_start(&chip->timer_state_machine,
1184 } else if (tmp == tx_failed) {
1185 dev_warn(chip->dev, "VDM_ENTER_MODE send failed\n");
1186 /* disable auto_vdm_machine */
1187 chip->vdm_state = 0xff;
1190 if (chip->vdm_send_state != 2)
1193 if (evt & EVENT_TIMER_STATE) {
1194 dev_warn(chip->dev, "VDM_ENTER_MODE time out\n");
1195 chip->vdm_state = 0xff;
1196 chip->work_continue = 1;
1202 chip->vdm_send_state = 0;
1205 return -EINPROGRESS;
1208 static int vdm_send_getdpstatus(struct fusb30x_chip *chip, int evt)
1212 switch (chip->vdm_send_state) {
1214 set_vdm_mesg(chip, VDM_DP_STATUS_UPDATE, VDM_TYPE_INIT, 1);
1216 chip->vdm_send_state++;
1218 tmp = policy_send_data(chip);
1219 if (tmp == tx_success) {
1220 chip->vdm_send_state++;
1221 chip->timer_state = T_SENDER_RESPONSE;
1222 fusb_timer_start(&chip->timer_state_machine,
1224 } else if (tmp == tx_failed) {
1226 "VDM_DP_STATUS_UPDATE send failed\n");
1227 /* disable auto_vdm_machine */
1228 chip->vdm_state = 0xff;
1231 if (chip->vdm_send_state != 2)
1234 if (evt & EVENT_TIMER_STATE) {
1235 dev_warn(chip->dev, "VDM_DP_STATUS_UPDATE time out\n");
1236 chip->vdm_state = 0xff;
1237 chip->work_continue = 1;
1243 chip->vdm_send_state = 0;
1246 return -EINPROGRESS;
1249 static int vdm_send_dpconfig(struct fusb30x_chip *chip, int evt)
1253 switch (chip->vdm_send_state) {
1255 set_vdm_mesg(chip, VDM_DP_CONFIG, VDM_TYPE_INIT, 0);
1257 chip->vdm_send_state++;
1259 tmp = policy_send_data(chip);
1260 if (tmp == tx_success) {
1261 chip->vdm_send_state++;
1262 chip->timer_state = T_SENDER_RESPONSE;
1263 fusb_timer_start(&chip->timer_state_machine,
1265 } else if (tmp == tx_failed) {
1266 dev_warn(chip->dev, "vdm_send_dpconfig send failed\n");
1267 /* disable auto_vdm_machine */
1268 chip->vdm_state = 0xff;
1271 if (chip->vdm_send_state != 2)
1274 if (evt & EVENT_TIMER_STATE) {
1275 dev_warn(chip->dev, "vdm_send_dpconfig time out\n");
1276 chip->vdm_state = 0xff;
1277 chip->work_continue = 1;
1283 chip->vdm_send_state = 0;
1286 return -EINPROGRESS;
1289 static void auto_vdm_machine(struct fusb30x_chip *chip, int evt)
1291 switch (chip->vdm_state) {
1293 if (vdm_send_discoveryid(chip, evt))
1298 if (vdm_send_discoverysvid(chip, evt))
1303 if (vdm_send_discoverymodes(chip, evt))
1308 if (vdm_send_entermode(chip, evt))
1313 if (vdm_send_dpconfig(chip, evt))
1315 chip->vdm_state = 6;
1318 if (vdm_send_getdpstatus(chip, evt))
1323 platform_fusb_notify(chip);
1328 static void fusb_state_disabled(struct fusb30x_chip *chip, int evt)
1330 platform_fusb_notify(chip);
1333 static void fusb_state_unattached(struct fusb30x_chip *chip, int evt)
1335 chip->notify.is_cc_connected = 0;
1336 if ((evt & EVENT_CC) && chip->cc_state) {
1337 if (chip->cc_state & 0x04)
1338 set_state(chip, attach_wait_sink);
1340 set_state(chip, attach_wait_source);
1342 tcpm_get_cc(chip, &chip->cc1, &chip->cc2);
1343 chip->debounce_cnt = 0;
1344 chip->timer_mux = 2;
1345 fusb_timer_start(&chip->timer_mux_machine, chip->timer_mux);
1349 static void fusb_state_attach_wait_sink(struct fusb30x_chip *chip, int evt)
1353 if (evt & EVENT_TIMER_MUX) {
1354 tcpm_get_cc(chip, &cc1, &cc2);
1356 if ((chip->cc1 == cc1) && (chip->cc2 == cc2)) {
1357 chip->debounce_cnt++;
1361 chip->debounce_cnt = 0;
1364 if (chip->debounce_cnt > N_DEBOUNCE_CNT) {
1365 if ((chip->cc1 != chip->cc2) &&
1366 ((!chip->cc1) || (!chip->cc2))) {
1367 set_state(chip, attached_sink);
1369 set_state_unattached(chip);
1374 chip->timer_mux = 2;
1375 fusb_timer_start(&chip->timer_mux_machine,
1380 static void fusb_state_attach_wait_source(struct fusb30x_chip *chip, int evt)
1384 if (evt & EVENT_TIMER_MUX) {
1385 tcpm_get_cc(chip, &cc1, &cc2);
1387 if ((chip->cc1 == cc1) && (chip->cc2 == cc2)) {
1388 chip->debounce_cnt++;
1392 chip->debounce_cnt = 0;
1395 if (chip->debounce_cnt > N_DEBOUNCE_CNT) {
1396 if (((!chip->cc1) || (!chip->cc2)) &&
1397 ((chip->cc1 == TYPEC_CC_VOLT_RD) ||
1398 (chip->cc2 == TYPEC_CC_VOLT_RD))) {
1399 set_state(chip, attached_source);
1401 set_state_unattached(chip);
1407 chip->timer_mux = 2;
1408 fusb_timer_start(&chip->timer_mux_machine,
1413 static void fusb_state_attached_source(struct fusb30x_chip *chip, int evt)
1415 tcpm_set_polarity(chip, !(chip->cc_state & 0x01));
1416 platform_set_vbus_lvl_enable(chip, 1, 0);
1417 tcpm_set_vconn(chip, 1);
1419 chip->notify.is_cc_connected = 1;
1420 if (chip->cc_state & 0x01)
1421 chip->cc_polarity = 0;
1423 chip->cc_polarity = 1;
1425 chip->notify.power_role = 1;
1426 chip->notify.data_role = 1;
1427 chip->hardrst_count = 0;
1428 set_state(chip, policy_src_startup);
1429 dev_info(chip->dev, "CC connected in %d as DFP\n", chip->cc_polarity);
1432 static void fusb_state_attached_sink(struct fusb30x_chip *chip, int evt)
1434 chip->notify.is_cc_connected = 1;
1435 if (chip->cc_state & 0x01)
1436 chip->cc_polarity = 0;
1438 chip->cc_polarity = 1;
1440 chip->notify.power_role = 0;
1441 chip->notify.data_role = 0;
1442 chip->hardrst_count = 0;
1443 set_state(chip, policy_snk_startup);
1444 dev_info(chip->dev, "CC connected in %d as UFP\n", chip->cc_polarity);
1447 static void fusb_state_src_startup(struct fusb30x_chip *chip, int evt)
1449 chip->caps_counter = 0;
1450 chip->notify.is_pd_connected = 0;
1452 chip->vdm_state = 0;
1453 chip->vdm_substate = 0;
1454 chip->vdm_send_state = 0;
1457 memset(chip->partner_cap, 0, sizeof(chip->partner_cap));
1459 tcpm_set_msg_header(chip);
1460 tcpm_set_polarity(chip, chip->cc_polarity);
1461 tcpm_set_rx_enable(chip, 1);
1463 set_state(chip, policy_src_send_caps);
1466 static void fusb_state_src_discovery(struct fusb30x_chip *chip, int evt)
1468 switch (chip->sub_state) {
1470 chip->caps_counter++;
1472 if (chip->caps_counter < N_CAPS_COUNT) {
1473 chip->timer_state = T_TYPEC_SEND_SOURCECAP;
1474 fusb_timer_start(&chip->timer_state_machine,
1476 chip->sub_state = 1;
1478 set_state(chip, disabled);
1482 if (evt & EVENT_TIMER_STATE) {
1483 set_state(chip, policy_src_send_caps);
1484 } else if ((evt & EVENT_TIMER_MUX) &&
1485 (chip->hardrst_count > N_HARDRESET_COUNT)) {
1486 if (chip->notify.is_pd_connected)
1487 set_state(chip, error_recovery);
1489 set_state(chip, disabled);
1495 static void fusb_state_src_send_caps(struct fusb30x_chip *chip, int evt)
1499 switch (chip->sub_state) {
1501 set_mesg(chip, DMT_SOURCECAPABILITIES, DATAMESSAGE);
1502 chip->sub_state = 1;
1503 chip->tx_state = tx_idle;
1506 tmp = policy_send_data(chip);
1508 if (tmp == tx_success) {
1509 chip->hardrst_count = 0;
1510 chip->caps_counter = 0;
1511 chip->timer_state = T_SENDER_RESPONSE;
1512 fusb_timer_start(&chip->timer_state_machine,
1514 chip->timer_mux = T_DISABLED;
1516 } else if (tmp == tx_failed) {
1517 set_state(chip, policy_src_discovery);
1521 if (!(evt & FLAG_EVENT))
1524 if (evt & EVENT_RX) {
1525 if ((PD_HEADER_CNT(chip->rec_head) == 1) &&
1526 (PD_HEADER_TYPE(chip->rec_head) == DMT_REQUEST)) {
1527 set_state(chip, policy_src_negotiate_cap);
1529 set_state(chip, policy_src_send_softrst);
1531 } else if (evt & EVENT_TIMER_STATE) {
1532 if (chip->hardrst_count <= N_HARDRESET_COUNT)
1533 set_state(chip, policy_src_send_hardrst);
1535 set_state(chip, disabled);
1536 } else if (evt & EVENT_TIMER_MUX) {
1537 if (chip->notify.is_pd_connected)
1538 set_state(chip, disabled);
1540 set_state(chip, error_recovery);
1546 static void fusb_state_src_negotiate_cap(struct fusb30x_chip *chip, int evt)
1551 tmp = (chip->rec_load[0] >> 28) & 0x07;
1552 if (tmp > chip->n_caps_used)
1553 set_state(chip, policy_src_cap_response);
1555 set_state(chip, policy_src_transition_supply);
1558 static void fusb_state_src_transition_supply(struct fusb30x_chip *chip,
1563 switch (chip->sub_state) {
1565 set_mesg(chip, CMT_ACCEPT, CONTROLMESSAGE);
1566 chip->tx_state = tx_idle;
1570 tmp = policy_send_data(chip);
1571 if (tmp == tx_success) {
1572 chip->timer_state = T_SRC_TRANSITION;
1574 fusb_timer_start(&chip->timer_state_machine,
1576 } else if (tmp == tx_failed) {
1577 set_state(chip, policy_src_send_softrst);
1581 if (evt & EVENT_TIMER_STATE) {
1582 chip->notify.is_pd_connected = 1;
1583 platform_set_vbus_lvl_enable(chip, 1, 0);
1584 set_mesg(chip, CMT_PS_RDY, CONTROLMESSAGE);
1585 chip->tx_state = tx_idle;
1587 chip->work_continue = 1;
1591 tmp = policy_send_data(chip);
1592 if (tmp == tx_success) {
1594 "PD connected as DFP, supporting 5V\n");
1595 set_state(chip, policy_src_ready);
1596 } else if (tmp == tx_failed) {
1597 set_state(chip, policy_src_send_softrst);
1603 static void fusb_state_src_cap_response(struct fusb30x_chip *chip, int evt)
1607 switch (chip->sub_state) {
1609 set_mesg(chip, CMT_REJECT, CONTROLMESSAGE);
1610 chip->tx_state = tx_idle;
1614 tmp = policy_send_data(chip);
1615 if (tmp == tx_success) {
1616 if (chip->notify.is_pd_connected) {
1618 "PD connected as DFP, supporting 5V\n");
1619 set_state(chip, policy_src_ready);
1621 set_state(chip, policy_src_send_hardrst);
1623 } else if (tmp == tx_failed) {
1624 set_state(chip, policy_src_send_softrst);
1630 static void fusb_state_src_transition_default(struct fusb30x_chip *chip,
1633 switch (chip->sub_state) {
1635 chip->notify.is_pd_connected = 0;
1636 platform_set_vbus_lvl_enable(chip, 0, 0);
1637 if (chip->notify.data_role)
1638 regmap_update_bits(chip->regmap,
1641 SWITCHES1_DATAROLE);
1643 regmap_update_bits(chip->regmap,
1648 chip->timer_state = T_SRC_RECOVER;
1649 fusb_timer_start(&chip->timer_state_machine,
1654 if (evt & EVENT_TIMER_STATE) {
1655 platform_set_vbus_lvl_enable(chip, 1, 0);
1656 chip->timer_mux = T_NO_RESPONSE;
1657 fusb_timer_start(&chip->timer_mux_machine,
1659 set_state(chip, policy_src_startup);
1660 dev_dbg(chip->dev, "reset over-> src startup\n");
1666 static void fusb_state_src_ready(struct fusb30x_chip *chip, int evt)
1668 if (evt & EVENT_RX) {
1669 if ((PD_HEADER_CNT(chip->rec_head)) &&
1670 (PD_HEADER_TYPE(chip->rec_head) == DMT_VENDERDEFINED)) {
1671 process_vdm_msg(chip);
1672 chip->work_continue = 1;
1673 chip->timer_state = T_DISABLED;
1677 /* TODO: swap function would be added here later on*/
1679 if (!chip->partner_cap[0])
1680 set_state(chip, policy_src_get_sink_caps);
1682 auto_vdm_machine(chip, evt);
1685 static void fusb_state_src_get_sink_cap(struct fusb30x_chip *chip, int evt)
1689 switch (chip->sub_state) {
1691 set_mesg(chip, CMT_GETSINKCAP, CONTROLMESSAGE);
1692 chip->tx_state = tx_idle;
1696 tmp = policy_send_data(chip);
1697 if (tmp == tx_success) {
1698 chip->timer_state = T_SENDER_RESPONSE;
1700 fusb_timer_start(&chip->timer_state_machine,
1702 } else if (tmp == tx_failed) {
1703 set_state(chip, policy_src_send_softrst);
1706 if (!(evt & FLAG_EVENT))
1709 if (evt & EVENT_RX) {
1710 if ((PD_HEADER_CNT(chip->rec_head)) &&
1711 (PD_HEADER_TYPE(chip->rec_head) ==
1712 DMT_SINKCAPABILITIES)) {
1714 tmp < PD_HEADER_CNT(chip->rec_head);
1716 chip->partner_cap[tmp] =
1717 chip->rec_load[tmp];
1719 set_state(chip, policy_src_ready);
1721 chip->partner_cap[0] = 0xffffffff;
1722 set_state(chip, policy_src_ready);
1724 } else if (evt & EVENT_TIMER_STATE) {
1725 dev_warn(chip->dev, "Get sink cap time out\n");
1726 chip->partner_cap[0] = 0xffffffff;
1727 set_state(chip, policy_src_ready);
1732 static void fusb_state_src_send_hardreset(struct fusb30x_chip *chip, int evt)
1736 switch (chip->sub_state) {
1738 chip->tx_state = tx_idle;
1742 tmp = policy_send_hardrst(chip, evt);
1743 if (tmp == tx_success) {
1744 chip->hardrst_count++;
1745 set_state(chip, policy_src_transition_default);
1746 } else if (tmp == tx_failed) {
1747 /* can't reach here */
1748 set_state(chip, error_recovery);
1754 static void fusb_state_src_send_softreset(struct fusb30x_chip *chip, int evt)
1758 switch (chip->sub_state) {
1760 set_mesg(chip, CMT_SOFTRESET, CONTROLMESSAGE);
1761 chip->tx_state = tx_idle;
1765 tmp = policy_send_data(chip);
1766 if (tmp == tx_success) {
1767 chip->timer_state = T_SENDER_RESPONSE;
1769 fusb_timer_start(&chip->timer_state_machine,
1771 } else if (tmp == tx_failed) {
1772 set_state(chip, policy_src_send_hardrst);
1775 if (!(evt & FLAG_EVENT))
1778 if (evt & EVENT_RX) {
1779 if ((!PD_HEADER_CNT(chip->rec_head)) &&
1780 (PD_HEADER_TYPE(chip->rec_head) == CMT_ACCEPT))
1781 set_state(chip, policy_src_send_caps);
1782 } else if (evt & EVENT_TIMER_STATE) {
1783 set_state(chip, policy_src_send_hardrst);
1789 static void fusb_state_snk_startup(struct fusb30x_chip *chip, int evt)
1791 chip->notify.is_pd_connected = 0;
1793 chip->vdm_state = 0;
1794 chip->vdm_substate = 0;
1795 chip->vdm_send_state = 0;
1797 chip->pos_power = 0;
1799 memset(chip->partner_cap, 0, sizeof(chip->partner_cap));
1801 tcpm_set_msg_header(chip);
1802 tcpm_set_polarity(chip, chip->cc_polarity);
1803 tcpm_set_rx_enable(chip, 1);
1804 set_state(chip, policy_snk_discovery);
1807 static void fusb_state_snk_discovery(struct fusb30x_chip *chip, int evt)
1809 set_state(chip, policy_snk_wait_caps);
1810 chip->timer_state = T_TYPEC_SINK_WAIT_CAP;
1811 fusb_timer_start(&chip->timer_state_machine,
1815 static void fusb_state_snk_wait_caps(struct fusb30x_chip *chip, int evt)
1817 if (evt & EVENT_RX) {
1818 if (PD_HEADER_CNT(chip->rec_head) &&
1819 PD_HEADER_TYPE(chip->rec_head) == DMT_SOURCECAPABILITIES) {
1820 chip->timer_mux = T_DISABLED;
1821 set_state(chip, policy_snk_evaluate_caps);
1823 } else if (evt & EVENT_TIMER_STATE) {
1824 if (chip->hardrst_count <= N_HARDRESET_COUNT)
1825 set_state(chip, policy_snk_send_hardrst);
1827 set_state(chip, disabled);
1828 } else if ((evt & EVENT_TIMER_MUX) &&
1829 (chip->hardrst_count > N_HARDRESET_COUNT)) {
1830 if (chip->notify.is_pd_connected)
1831 set_state(chip, error_recovery);
1833 set_state(chip, disabled);
1837 static void fusb_state_snk_evaluate_caps(struct fusb30x_chip *chip, int evt)
1841 chip->hardrst_count = 0;
1842 chip->pos_power = 0;
1844 for (tmp = 0; tmp < PD_HEADER_CNT(chip->rec_head); tmp++) {
1845 switch (CAP_POWER_TYPE(chip->rec_load[tmp])) {
1848 if (CAP_FPDO_VOLTAGE(chip->rec_load[tmp]) <= 100)
1849 chip->pos_power = tmp + 1;
1853 if (CAP_VPDO_VOLTAGE(chip->rec_load[tmp]) <= 100)
1854 chip->pos_power = tmp + 1;
1857 /* not meet battery caps */
1861 fusb302_set_pos_power_by_charge_ic(chip);
1863 if ((!chip->pos_power) || (chip->pos_power > 7)) {
1864 chip->pos_power = 0;
1865 set_state(chip, policy_snk_wait_caps);
1867 set_state(chip, policy_snk_select_cap);
1871 static void fusb_state_snk_select_cap(struct fusb30x_chip *chip, int evt)
1875 switch (chip->sub_state) {
1877 set_mesg(chip, DMT_REQUEST, DATAMESSAGE);
1878 chip->sub_state = 1;
1879 chip->tx_state = tx_idle;
1882 tmp = policy_send_data(chip);
1884 if (tmp == tx_success) {
1885 chip->timer_state = T_SENDER_RESPONSE;
1886 fusb_timer_start(&chip->timer_state_machine,
1889 } else if (tmp == tx_failed) {
1890 set_state(chip, policy_snk_discovery);
1894 if (!(evt & FLAG_EVENT))
1897 if (evt & EVENT_RX) {
1898 if (!PD_HEADER_CNT(chip->rec_head)) {
1899 switch (PD_HEADER_TYPE(chip->rec_head)) {
1902 policy_snk_transition_sink);
1903 chip->timer_state = T_PS_TRANSITION;
1904 fusb_timer_start(&chip->timer_state_machine,
1909 if (chip->notify.is_pd_connected) {
1911 "PD connected as UFP, fetching 5V\n");
1916 policy_snk_wait_caps);
1918 * make sure don't send
1919 * hard reset to prevent
1922 chip->hardrst_count =
1923 N_HARDRESET_COUNT + 1;
1930 } else if (evt & EVENT_TIMER_STATE) {
1931 set_state(chip, policy_snk_send_hardrst);
1937 static void fusb_state_snk_transition_sink(struct fusb30x_chip *chip, int evt)
1939 if (evt & EVENT_RX) {
1940 if ((!PD_HEADER_CNT(chip->rec_head)) &&
1941 (PD_HEADER_TYPE(chip->rec_head) == CMT_PS_RDY)) {
1942 chip->notify.is_pd_connected = 1;
1944 "PD connected as UFP, fetching 5V\n");
1945 set_state(chip, policy_snk_ready);
1946 } else if ((PD_HEADER_CNT(chip->rec_head)) &&
1947 (PD_HEADER_TYPE(chip->rec_head) ==
1948 DMT_SOURCECAPABILITIES)) {
1949 set_state(chip, policy_snk_evaluate_caps);
1951 } else if (evt & EVENT_TIMER_STATE) {
1952 set_state(chip, policy_snk_send_hardrst);
1956 static void fusb_state_snk_transition_default(struct fusb30x_chip *chip,
1959 switch (chip->sub_state) {
1961 chip->notify.is_pd_connected = 0;
1962 chip->timer_mux = T_NO_RESPONSE;
1963 fusb_timer_start(&chip->timer_mux_machine,
1965 chip->timer_state = T_PS_HARD_RESET_MAX + T_SAFE_0V;
1966 fusb_timer_start(&chip->timer_state_machine,
1968 if (chip->notify.data_role)
1969 tcpm_set_msg_header(chip);
1973 if (!tcpm_check_vbus(chip)) {
1975 chip->timer_state = T_SRC_RECOVER_MAX + T_SRC_TURN_ON;
1976 fusb_timer_start(&chip->timer_state_machine,
1978 } else if (evt & EVENT_TIMER_STATE) {
1979 set_state(chip, policy_snk_startup);
1983 if (tcpm_check_vbus(chip)) {
1984 chip->timer_state = T_DISABLED;
1985 set_state(chip, policy_snk_startup);
1986 } else if (evt & EVENT_TIMER_STATE) {
1987 set_state(chip, policy_snk_startup);
1993 static void fusb_state_snk_ready(struct fusb30x_chip *chip, int evt)
1995 /* TODO: snk_ready_function would be added later on*/
1996 platform_fusb_notify(chip);
1999 static void fusb_state_snk_send_hardreset(struct fusb30x_chip *chip, int evt)
2003 switch (chip->sub_state) {
2005 chip->tx_state = tx_idle;
2008 tmp = policy_send_hardrst(chip, evt);
2009 if (tmp == tx_success) {
2010 chip->hardrst_count++;
2011 set_state(chip, policy_snk_transition_default);
2012 } else if (tmp == tx_failed) {
2013 set_state(chip, error_recovery);
2019 static void fusb_state_snk_send_softreset(struct fusb30x_chip *chip, int evt)
2023 switch (chip->sub_state) {
2025 set_mesg(chip, CMT_SOFTRESET, CONTROLMESSAGE);
2026 chip->tx_state = tx_idle;
2029 tmp = policy_send_data(chip);
2030 if (tmp == tx_success) {
2031 chip->timer_state = T_SENDER_RESPONSE;
2033 fusb_timer_start(&chip->timer_state_machine,
2035 } else if (tmp == tx_failed) {
2036 /* can't reach here */
2037 set_state(chip, policy_snk_send_hardrst);
2040 if (!(evt & FLAG_EVENT))
2043 if (evt & EVENT_RX) {
2044 if ((!PD_HEADER_CNT(chip->rec_head)) &&
2045 (PD_HEADER_TYPE(chip->rec_head) == CMT_ACCEPT))
2046 set_state(chip, policy_snk_wait_caps);
2047 } else if (evt & EVENT_TIMER_STATE) {
2048 set_state(chip, policy_snk_send_hardrst);
2054 static void state_machine_typec(struct fusb30x_chip *chip)
2059 tcpc_alert(chip, &evt);
2060 mux_alert(chip, &evt);
2064 if (chip->notify.is_cc_connected) {
2065 if (evt & EVENT_CC) {
2066 if ((chip->cc_state & 0x04) &&
2067 (chip->conn_state !=
2068 policy_snk_transition_default)) {
2069 if (!tcpm_check_vbus(chip))
2070 set_state_unattached(chip);
2071 } else if (chip->conn_state !=
2072 policy_src_transition_default) {
2073 tcpm_get_cc(chip, &cc1, &cc2);
2074 if (!(chip->cc_state & 0x01))
2076 if (cc1 == TYPEC_CC_VOLT_OPEN)
2077 set_state_unattached(chip);
2082 if (evt & EVENT_RX) {
2083 tcpm_get_message(chip);
2084 if ((!PD_HEADER_CNT(chip->rec_head)) &&
2085 (PD_HEADER_TYPE(chip->rec_head) == CMT_SOFTRESET)) {
2086 if (chip->notify.power_role)
2087 set_state(chip, policy_src_send_softrst);
2089 set_state(chip, policy_snk_send_softrst);
2093 if (evt & EVENT_TX) {
2094 if (chip->tx_state == tx_success)
2097 switch (chip->conn_state) {
2099 fusb_state_disabled(chip, evt);
2101 case error_recovery:
2102 set_state_unattached(chip);
2105 fusb_state_unattached(chip, evt);
2107 case attach_wait_sink:
2108 fusb_state_attach_wait_sink(chip, evt);
2110 case attach_wait_source:
2111 fusb_state_attach_wait_source(chip, evt);
2113 case attached_source:
2114 fusb_state_attached_source(chip, evt);
2117 fusb_state_attached_sink(chip, evt);
2120 /* POWER DELIVERY */
2121 case policy_src_startup:
2122 fusb_state_src_startup(chip, evt);
2124 case policy_src_discovery:
2125 fusb_state_src_discovery(chip, evt);
2127 case policy_src_send_caps:
2128 fusb_state_src_send_caps(chip, evt);
2129 if (chip->conn_state != policy_src_negotiate_cap)
2131 case policy_src_negotiate_cap:
2132 fusb_state_src_negotiate_cap(chip, evt);
2134 case policy_src_transition_supply:
2135 fusb_state_src_transition_supply(chip, evt);
2137 case policy_src_cap_response:
2138 fusb_state_src_cap_response(chip, evt);
2140 case policy_src_transition_default:
2141 fusb_state_src_transition_default(chip, evt);
2143 case policy_src_ready:
2144 fusb_state_src_ready(chip, evt);
2146 case policy_src_get_sink_caps:
2147 fusb_state_src_get_sink_cap(chip, evt);
2149 case policy_src_send_hardrst:
2150 fusb_state_src_send_hardreset(chip, evt);
2152 case policy_src_send_softrst:
2153 fusb_state_src_send_softreset(chip, evt);
2157 case policy_snk_startup:
2158 fusb_state_snk_startup(chip, evt);
2160 case policy_snk_discovery:
2161 fusb_state_snk_discovery(chip, evt);
2163 case policy_snk_wait_caps:
2164 fusb_state_snk_wait_caps(chip, evt);
2166 case policy_snk_evaluate_caps:
2167 fusb_state_snk_evaluate_caps(chip, evt);
2169 case policy_snk_select_cap:
2170 fusb_state_snk_select_cap(chip, evt);
2172 case policy_snk_transition_sink:
2173 fusb_state_snk_transition_sink(chip, evt);
2175 case policy_snk_transition_default:
2176 fusb_state_snk_transition_default(chip, evt);
2178 case policy_snk_ready:
2179 fusb_state_snk_ready(chip, evt);
2181 case policy_snk_send_hardrst:
2182 fusb_state_snk_send_hardreset(chip, evt);
2184 case policy_snk_send_softrst:
2185 fusb_state_snk_send_softreset(chip, evt);
2193 if (chip->work_continue) {
2194 queue_work(chip->fusb30x_wq, &chip->work);
2198 if (!platform_get_device_irq_state(chip))
2199 fusb_irq_enable(chip);
2201 queue_work(chip->fusb30x_wq, &chip->work);
2204 static irqreturn_t cc_interrupt_handler(int irq, void *dev_id)
2206 struct fusb30x_chip *chip = dev_id;
2208 queue_work(chip->fusb30x_wq, &chip->work);
2209 fusb_irq_disable(chip);
2213 static int fusb_initialize_gpio(struct fusb30x_chip *chip)
2215 chip->gpio_int = devm_gpiod_get_optional(chip->dev, "int-n", GPIOD_IN);
2216 if (IS_ERR(chip->gpio_int))
2217 return PTR_ERR(chip->gpio_int);
2219 /* some board support vbus with other ways */
2220 chip->gpio_vbus_5v = devm_gpiod_get_optional(chip->dev, "vbus-5v",
2222 if (IS_ERR(chip->gpio_vbus_5v))
2224 "Could not get named GPIO for VBus5V!\n");
2226 gpiod_set_raw_value(chip->gpio_vbus_5v, 0);
2228 chip->gpio_vbus_other = devm_gpiod_get_optional(chip->dev,
2231 if (IS_ERR(chip->gpio_vbus_other))
2233 "Could not get named GPIO for VBusOther!\n");
2235 gpiod_set_raw_value(chip->gpio_vbus_other, 0);
2240 static enum hrtimer_restart fusb_timer_handler(struct hrtimer *timer)
2244 for (i = 0; i < fusb30x_port_used; i++) {
2245 if (timer == &fusb30x_port_info[i]->timer_state_machine) {
2246 if (fusb30x_port_info[i]->timer_state != T_DISABLED)
2247 fusb30x_port_info[i]->timer_state = 0;
2251 if (timer == &fusb30x_port_info[i]->timer_mux_machine) {
2252 if (fusb30x_port_info[i]->timer_mux != T_DISABLED)
2253 fusb30x_port_info[i]->timer_mux = 0;
2258 if (i != fusb30x_port_used)
2259 queue_work(fusb30x_port_info[i]->fusb30x_wq,
2260 &fusb30x_port_info[i]->work);
2262 return HRTIMER_NORESTART;
2265 static void fusb_initialize_timer(struct fusb30x_chip *chip)
2267 hrtimer_init(&chip->timer_state_machine, CLOCK_MONOTONIC,
2269 chip->timer_state_machine.function = fusb_timer_handler;
2271 hrtimer_init(&chip->timer_mux_machine, CLOCK_MONOTONIC,
2273 chip->timer_mux_machine.function = fusb_timer_handler;
2275 chip->timer_state = T_DISABLED;
2276 chip->timer_mux = T_DISABLED;
2279 static void fusb302_work_func(struct work_struct *work)
2281 struct fusb30x_chip *chip;
2283 chip = container_of(work, struct fusb30x_chip, work);
2284 state_machine_typec(chip);
2287 static int fusb30x_probe(struct i2c_client *client,
2288 const struct i2c_device_id *id)
2290 struct fusb30x_chip *chip;
2291 struct PD_CAP_INFO *pd_cap_info;
2294 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
2298 if (fusb30x_port_used == 0xff)
2301 chip->port_num = fusb30x_port_used++;
2302 fusb30x_port_info[chip->port_num] = chip;
2304 chip->dev = &client->dev;
2305 chip->regmap = devm_regmap_init_i2c(client, &fusb302_regmap_config);
2306 if (IS_ERR(chip->regmap)) {
2307 dev_err(&client->dev, "Failed to allocate regmap!\n");
2308 return PTR_ERR(chip->regmap);
2311 ret = fusb_initialize_gpio(chip);
2315 fusb_initialize_timer(chip);
2317 chip->fusb30x_wq = create_workqueue("fusb302_wq");
2318 INIT_WORK(&chip->work, fusb302_work_func);
2321 tcpm_set_rx_enable(chip, 0);
2322 chip->conn_state = unattached;
2323 tcpm_set_cc(chip, FUSB_MODE_DRP);
2325 chip->n_caps_used = 1;
2326 chip->source_power_supply[0] = 0x64;
2327 chip->source_max_current[0] = 0x96;
2330 * these two variable should be 1 if support DRP,
2331 * but now we do not support swap,
2332 * it will be blanked in future
2334 pd_cap_info = &chip->pd_cap_info;
2335 pd_cap_info->dual_role_power = 0;
2336 pd_cap_info->data_role_swap = 0;
2338 pd_cap_info->externally_powered = 1;
2339 pd_cap_info->usb_suspend_support = 0;
2340 pd_cap_info->usb_communications_cap = 0;
2341 pd_cap_info->supply_type = 0;
2342 pd_cap_info->peak_current = 0;
2344 chip->extcon = devm_extcon_dev_allocate(&client->dev, fusb302_cable);
2345 if (IS_ERR(chip->extcon)) {
2346 dev_err(&client->dev, "allocat extcon failed\n");
2347 return PTR_ERR(chip->extcon);
2350 ret = devm_extcon_dev_register(&client->dev, chip->extcon);
2352 dev_err(&client->dev, "failed to register extcon: %d\n",
2357 ret = extcon_set_property_capability(chip->extcon, EXTCON_USB,
2358 EXTCON_PROP_USB_TYPEC_POLARITY);
2360 dev_err(&client->dev,
2361 "failed to set USB property capability: %d\n",
2366 ret = extcon_set_property_capability(chip->extcon, EXTCON_USB_HOST,
2367 EXTCON_PROP_USB_TYPEC_POLARITY);
2369 dev_err(&client->dev,
2370 "failed to set USB_HOST property capability: %d\n",
2375 ret = extcon_set_property_capability(chip->extcon, EXTCON_DISP_DP,
2376 EXTCON_PROP_USB_TYPEC_POLARITY);
2378 dev_err(&client->dev,
2379 "failed to set DISP_DP property capability: %d\n",
2384 ret = extcon_set_property_capability(chip->extcon, EXTCON_USB,
2385 EXTCON_PROP_USB_SS);
2387 dev_err(&client->dev,
2388 "failed to set USB USB_SS property capability: %d\n",
2393 ret = extcon_set_property_capability(chip->extcon, EXTCON_USB_HOST,
2394 EXTCON_PROP_USB_SS);
2396 dev_err(&client->dev,
2397 "failed to set USB_HOST USB_SS property capability: %d\n",
2402 ret = extcon_set_property_capability(chip->extcon, EXTCON_DISP_DP,
2403 EXTCON_PROP_USB_SS);
2405 dev_err(&client->dev,
2406 "failed to set DISP_DP USB_SS property capability: %d\n",
2411 ret = extcon_set_property_capability(chip->extcon, EXTCON_CHG_USB_FAST,
2412 EXTCON_PROP_USB_TYPEC_POLARITY);
2414 dev_err(&client->dev,
2415 "failed to set USB_PD property capability: %d\n", ret);
2419 i2c_set_clientdata(client, chip);
2421 spin_lock_init(&chip->irq_lock);
2422 chip->enable_irq = 1;
2424 chip->gpio_int_irq = gpiod_to_irq(chip->gpio_int);
2425 if (chip->gpio_int_irq < 0) {
2426 dev_err(&client->dev,
2427 "Unable to request IRQ for INT_N GPIO! %d\n",
2429 ret = chip->gpio_int_irq;
2433 ret = devm_request_threaded_irq(&client->dev,
2436 cc_interrupt_handler,
2437 IRQF_ONESHOT | IRQF_TRIGGER_LOW,
2441 dev_err(&client->dev, "irq request failed\n");
2445 dev_info(chip->dev, "port %d probe success\n", chip->port_num);
2450 destroy_workqueue(chip->fusb30x_wq);
2454 static int fusb30x_remove(struct i2c_client *client)
2456 struct fusb30x_chip *chip = i2c_get_clientdata(client);
2458 destroy_workqueue(chip->fusb30x_wq);
2462 static const struct of_device_id fusb30x_dt_match[] = {
2463 { .compatible = FUSB30X_I2C_DEVICETREE_NAME },
2466 MODULE_DEVICE_TABLE(of, fusb30x_dt_match);
2468 static const struct i2c_device_id fusb30x_i2c_device_id[] = {
2469 { FUSB30X_I2C_DRIVER_NAME, 0 },
2472 MODULE_DEVICE_TABLE(i2c, fusb30x_i2c_device_id);
2474 static struct i2c_driver fusb30x_driver = {
2476 .name = FUSB30X_I2C_DRIVER_NAME,
2477 .of_match_table = of_match_ptr(fusb30x_dt_match),
2479 .probe = fusb30x_probe,
2480 .remove = fusb30x_remove,
2481 .id_table = fusb30x_i2c_device_id,
2484 module_i2c_driver(fusb30x_driver);
2486 MODULE_LICENSE("GPL");
2487 MODULE_AUTHOR("zain wang <zain.wang@rock-chips.com>");
2488 MODULE_DESCRIPTION("fusb302 typec pd driver");