2 * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #define pr_fmt(fmt) "%s: " fmt, __func__
16 #include <linux/kernel.h>
17 #include <linux/interrupt.h>
18 #include <linux/irqchip/chained_irq.h>
19 #include <linux/irq.h>
20 #include <linux/irqdomain.h>
21 #include <linux/module.h>
22 #include <linux/platform_device.h>
23 #include <linux/slab.h>
24 #include <linux/err.h>
25 #include <linux/ssbi.h>
26 #include <linux/regmap.h>
27 #include <linux/of_platform.h>
28 #include <linux/mfd/core.h>
29 #include <linux/mfd/pm8xxx/core.h>
31 #define SSBI_REG_ADDR_IRQ_BASE 0x1BB
33 #define SSBI_REG_ADDR_IRQ_ROOT (SSBI_REG_ADDR_IRQ_BASE + 0)
34 #define SSBI_REG_ADDR_IRQ_M_STATUS1 (SSBI_REG_ADDR_IRQ_BASE + 1)
35 #define SSBI_REG_ADDR_IRQ_M_STATUS2 (SSBI_REG_ADDR_IRQ_BASE + 2)
36 #define SSBI_REG_ADDR_IRQ_M_STATUS3 (SSBI_REG_ADDR_IRQ_BASE + 3)
37 #define SSBI_REG_ADDR_IRQ_M_STATUS4 (SSBI_REG_ADDR_IRQ_BASE + 4)
38 #define SSBI_REG_ADDR_IRQ_BLK_SEL (SSBI_REG_ADDR_IRQ_BASE + 5)
39 #define SSBI_REG_ADDR_IRQ_IT_STATUS (SSBI_REG_ADDR_IRQ_BASE + 6)
40 #define SSBI_REG_ADDR_IRQ_CONFIG (SSBI_REG_ADDR_IRQ_BASE + 7)
41 #define SSBI_REG_ADDR_IRQ_RT_STATUS (SSBI_REG_ADDR_IRQ_BASE + 8)
43 #define PM_IRQF_LVL_SEL 0x01 /* level select */
44 #define PM_IRQF_MASK_FE 0x02 /* mask falling edge */
45 #define PM_IRQF_MASK_RE 0x04 /* mask rising edge */
46 #define PM_IRQF_CLR 0x08 /* clear interrupt */
47 #define PM_IRQF_BITS_MASK 0x70
48 #define PM_IRQF_BITS_SHIFT 4
49 #define PM_IRQF_WRITE 0x80
51 #define PM_IRQF_MASK_ALL (PM_IRQF_MASK_FE | \
54 #define REG_HWREV 0x002 /* PMIC4 revision */
55 #define REG_HWREV_2 0x0E8 /* PMIC4 revision 2 */
57 #define PM8921_NR_IRQS 256
61 struct regmap *regmap;
62 spinlock_t pm_irq_lock;
63 struct irq_domain *irqdomain;
64 unsigned int num_irqs;
65 unsigned int num_blocks;
66 unsigned int num_masters;
72 struct pm_irq_chip *irq_chip;
75 static int pm8xxx_read_block_irq(struct pm_irq_chip *chip, unsigned int bp,
80 spin_lock(&chip->pm_irq_lock);
81 rc = regmap_write(chip->regmap, SSBI_REG_ADDR_IRQ_BLK_SEL, bp);
83 pr_err("Failed Selecting Block %d rc=%d\n", bp, rc);
87 rc = regmap_read(chip->regmap, SSBI_REG_ADDR_IRQ_IT_STATUS, ip);
89 pr_err("Failed Reading Status rc=%d\n", rc);
91 spin_unlock(&chip->pm_irq_lock);
96 pm8xxx_config_irq(struct pm_irq_chip *chip, unsigned int bp, unsigned int cp)
100 spin_lock(&chip->pm_irq_lock);
101 rc = regmap_write(chip->regmap, SSBI_REG_ADDR_IRQ_BLK_SEL, bp);
103 pr_err("Failed Selecting Block %d rc=%d\n", bp, rc);
108 rc = regmap_write(chip->regmap, SSBI_REG_ADDR_IRQ_CONFIG, cp);
110 pr_err("Failed Configuring IRQ rc=%d\n", rc);
112 spin_unlock(&chip->pm_irq_lock);
116 static int pm8xxx_irq_block_handler(struct pm_irq_chip *chip, int block)
118 int pmirq, irq, i, ret = 0;
121 ret = pm8xxx_read_block_irq(chip, block, &bits);
123 pr_err("Failed reading %d block ret=%d", block, ret);
127 pr_err("block bit set in master but no irqs: %d", block);
132 for (i = 0; i < 8; i++) {
133 if (bits & (1 << i)) {
134 pmirq = block * 8 + i;
135 irq = irq_find_mapping(chip->irqdomain, pmirq);
136 generic_handle_irq(irq);
142 static int pm8xxx_irq_master_handler(struct pm_irq_chip *chip, int master)
144 unsigned int blockbits;
145 int block_number, i, ret = 0;
147 ret = regmap_read(chip->regmap, SSBI_REG_ADDR_IRQ_M_STATUS1 + master,
150 pr_err("Failed to read master %d ret=%d\n", master, ret);
154 pr_err("master bit set in root but no blocks: %d", master);
158 for (i = 0; i < 8; i++)
159 if (blockbits & (1 << i)) {
160 block_number = master * 8 + i; /* block # */
161 ret |= pm8xxx_irq_block_handler(chip, block_number);
166 static void pm8xxx_irq_handler(unsigned int irq, struct irq_desc *desc)
168 struct pm_irq_chip *chip = irq_desc_get_handler_data(desc);
169 struct irq_chip *irq_chip = irq_desc_get_chip(desc);
171 int i, ret, masters = 0;
173 chained_irq_enter(irq_chip, desc);
175 ret = regmap_read(chip->regmap, SSBI_REG_ADDR_IRQ_ROOT, &root);
177 pr_err("Can't read root status ret=%d\n", ret);
181 /* on pm8xxx series masters start from bit 1 of the root */
184 /* Read allowed masters for blocks. */
185 for (i = 0; i < chip->num_masters; i++)
186 if (masters & (1 << i))
187 pm8xxx_irq_master_handler(chip, i);
189 chained_irq_exit(irq_chip, desc);
192 static void pm8xxx_irq_mask_ack(struct irq_data *d)
194 struct pm_irq_chip *chip = irq_data_get_irq_chip_data(d);
195 unsigned int pmirq = irqd_to_hwirq(d);
202 config = chip->config[pmirq] | PM_IRQF_MASK_ALL | PM_IRQF_CLR;
203 pm8xxx_config_irq(chip, block, config);
206 static void pm8xxx_irq_unmask(struct irq_data *d)
208 struct pm_irq_chip *chip = irq_data_get_irq_chip_data(d);
209 unsigned int pmirq = irqd_to_hwirq(d);
216 config = chip->config[pmirq];
217 pm8xxx_config_irq(chip, block, config);
220 static int pm8xxx_irq_set_type(struct irq_data *d, unsigned int flow_type)
222 struct pm_irq_chip *chip = irq_data_get_irq_chip_data(d);
223 unsigned int pmirq = irqd_to_hwirq(d);
230 chip->config[pmirq] = (irq_bit << PM_IRQF_BITS_SHIFT)
232 if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
233 if (flow_type & IRQF_TRIGGER_RISING)
234 chip->config[pmirq] &= ~PM_IRQF_MASK_RE;
235 if (flow_type & IRQF_TRIGGER_FALLING)
236 chip->config[pmirq] &= ~PM_IRQF_MASK_FE;
238 chip->config[pmirq] |= PM_IRQF_LVL_SEL;
240 if (flow_type & IRQF_TRIGGER_HIGH)
241 chip->config[pmirq] &= ~PM_IRQF_MASK_RE;
243 chip->config[pmirq] &= ~PM_IRQF_MASK_FE;
246 config = chip->config[pmirq] | PM_IRQF_CLR;
247 return pm8xxx_config_irq(chip, block, config);
250 static int pm8xxx_irq_set_wake(struct irq_data *d, unsigned int on)
255 static struct irq_chip pm8xxx_irq_chip = {
257 .irq_mask_ack = pm8xxx_irq_mask_ack,
258 .irq_unmask = pm8xxx_irq_unmask,
259 .irq_set_type = pm8xxx_irq_set_type,
260 .irq_set_wake = pm8xxx_irq_set_wake,
261 .flags = IRQCHIP_MASK_ON_SUSPEND,
265 * pm8xxx_get_irq_stat - get the status of the irq line
266 * @chip: pointer to identify a pmic irq controller
267 * @irq: the irq number
269 * The pm8xxx gpio and mpp rely on the interrupt block to read
270 * the values on their pins. This function is to facilitate reading
271 * the status of a gpio or an mpp line. The caller has to convert the
272 * gpio number to irq number.
275 * an int indicating the value read on that line
277 static int pm8xxx_get_irq_stat(struct pm_irq_chip *chip, int irq)
280 unsigned int block, bits, bit;
282 struct irq_data *irq_data = irq_get_irq_data(irq);
284 pmirq = irq_data->hwirq;
289 spin_lock_irqsave(&chip->pm_irq_lock, flags);
291 rc = regmap_write(chip->regmap, SSBI_REG_ADDR_IRQ_BLK_SEL, block);
293 pr_err("Failed Selecting block irq=%d pmirq=%d blk=%d rc=%d\n",
294 irq, pmirq, block, rc);
298 rc = regmap_read(chip->regmap, SSBI_REG_ADDR_IRQ_RT_STATUS, &bits);
300 pr_err("Failed Configuring irq=%d pmirq=%d blk=%d rc=%d\n",
301 irq, pmirq, block, rc);
305 rc = (bits & (1 << bit)) ? 1 : 0;
308 spin_unlock_irqrestore(&chip->pm_irq_lock, flags);
313 static int pm8xxx_irq_domain_map(struct irq_domain *d, unsigned int irq,
314 irq_hw_number_t hwirq)
316 struct pm_irq_chip *chip = d->host_data;
318 irq_set_chip_and_handler(irq, &pm8xxx_irq_chip, handle_level_irq);
319 irq_set_chip_data(irq, chip);
321 set_irq_flags(irq, IRQF_VALID);
323 irq_set_noprobe(irq);
328 static const struct irq_domain_ops pm8xxx_irq_domain_ops = {
329 .xlate = irq_domain_xlate_twocell,
330 .map = pm8xxx_irq_domain_map,
333 static int pm8921_readb(const struct device *dev, u16 addr, u8 *val)
335 const struct pm8xxx_drvdata *pm8921_drvdata = dev_get_drvdata(dev);
336 const struct pm8921 *pmic = pm8921_drvdata->pm_chip_data;
338 return ssbi_read(pmic->dev->parent, addr, val, 1);
341 static int pm8921_writeb(const struct device *dev, u16 addr, u8 val)
343 const struct pm8xxx_drvdata *pm8921_drvdata = dev_get_drvdata(dev);
344 const struct pm8921 *pmic = pm8921_drvdata->pm_chip_data;
346 return ssbi_write(pmic->dev->parent, addr, &val, 1);
349 static int pm8921_read_buf(const struct device *dev, u16 addr, u8 *buf,
352 const struct pm8xxx_drvdata *pm8921_drvdata = dev_get_drvdata(dev);
353 const struct pm8921 *pmic = pm8921_drvdata->pm_chip_data;
355 return ssbi_read(pmic->dev->parent, addr, buf, cnt);
358 static int pm8921_write_buf(const struct device *dev, u16 addr, u8 *buf,
361 const struct pm8xxx_drvdata *pm8921_drvdata = dev_get_drvdata(dev);
362 const struct pm8921 *pmic = pm8921_drvdata->pm_chip_data;
364 return ssbi_write(pmic->dev->parent, addr, buf, cnt);
367 static int pm8921_read_irq_stat(const struct device *dev, int irq)
369 const struct pm8xxx_drvdata *pm8921_drvdata = dev_get_drvdata(dev);
370 const struct pm8921 *pmic = pm8921_drvdata->pm_chip_data;
372 return pm8xxx_get_irq_stat(pmic->irq_chip, irq);
375 static struct pm8xxx_drvdata pm8921_drvdata = {
376 .pmic_readb = pm8921_readb,
377 .pmic_writeb = pm8921_writeb,
378 .pmic_read_buf = pm8921_read_buf,
379 .pmic_write_buf = pm8921_write_buf,
380 .pmic_read_irq_stat = pm8921_read_irq_stat,
383 static const struct regmap_config ssbi_regmap_config = {
386 .max_register = 0x3ff,
388 .reg_read = ssbi_reg_read,
389 .reg_write = ssbi_reg_write
392 static const struct of_device_id pm8921_id_table[] = {
393 { .compatible = "qcom,pm8058", },
394 { .compatible = "qcom,pm8921", },
397 MODULE_DEVICE_TABLE(of, pm8921_id_table);
399 static int pm8921_probe(struct platform_device *pdev)
402 struct regmap *regmap;
407 struct pm_irq_chip *chip;
408 unsigned int nirqs = PM8921_NR_IRQS;
410 irq = platform_get_irq(pdev, 0);
414 pmic = devm_kzalloc(&pdev->dev, sizeof(struct pm8921), GFP_KERNEL);
416 pr_err("Cannot alloc pm8921 struct\n");
420 regmap = devm_regmap_init(&pdev->dev, NULL, pdev->dev.parent,
421 &ssbi_regmap_config);
423 return PTR_ERR(regmap);
425 /* Read PMIC chip revision */
426 rc = regmap_read(regmap, REG_HWREV, &val);
428 pr_err("Failed to read hw rev reg %d:rc=%d\n", REG_HWREV, rc);
431 pr_info("PMIC revision 1: %02X\n", val);
434 /* Read PMIC chip revision 2 */
435 rc = regmap_read(regmap, REG_HWREV_2, &val);
437 pr_err("Failed to read hw rev 2 reg %d:rc=%d\n",
441 pr_info("PMIC revision 2: %02X\n", val);
442 rev |= val << BITS_PER_BYTE;
444 pmic->dev = &pdev->dev;
445 pm8921_drvdata.pm_chip_data = pmic;
446 platform_set_drvdata(pdev, &pm8921_drvdata);
448 chip = devm_kzalloc(&pdev->dev, sizeof(*chip) +
449 sizeof(chip->config[0]) * nirqs,
454 pmic->irq_chip = chip;
455 chip->dev = &pdev->dev;
456 chip->regmap = regmap;
457 chip->num_irqs = nirqs;
458 chip->num_blocks = DIV_ROUND_UP(chip->num_irqs, 8);
459 chip->num_masters = DIV_ROUND_UP(chip->num_blocks, 8);
460 spin_lock_init(&chip->pm_irq_lock);
462 chip->irqdomain = irq_domain_add_linear(pdev->dev.of_node, nirqs,
463 &pm8xxx_irq_domain_ops,
465 if (!chip->irqdomain)
468 irq_set_handler_data(irq, chip);
469 irq_set_chained_handler(irq, pm8xxx_irq_handler);
470 irq_set_irq_wake(irq, 1);
472 rc = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
474 irq_set_chained_handler(irq, NULL);
475 irq_set_handler_data(irq, NULL);
476 irq_domain_remove(chip->irqdomain);
482 static int pm8921_remove_child(struct device *dev, void *unused)
484 platform_device_unregister(to_platform_device(dev));
488 static int pm8921_remove(struct platform_device *pdev)
490 int irq = platform_get_irq(pdev, 0);
491 struct pm8921 *pmic = pm8921_drvdata.pm_chip_data;
492 struct pm_irq_chip *chip = pmic->irq_chip;
494 device_for_each_child(&pdev->dev, NULL, pm8921_remove_child);
495 irq_set_chained_handler(irq, NULL);
496 irq_set_handler_data(irq, NULL);
497 irq_domain_remove(chip->irqdomain);
502 static struct platform_driver pm8921_driver = {
503 .probe = pm8921_probe,
504 .remove = pm8921_remove,
506 .name = "pm8921-core",
507 .owner = THIS_MODULE,
508 .of_match_table = pm8921_id_table,
512 static int __init pm8921_init(void)
514 return platform_driver_register(&pm8921_driver);
516 subsys_initcall(pm8921_init);
518 static void __exit pm8921_exit(void)
520 platform_driver_unregister(&pm8921_driver);
522 module_exit(pm8921_exit);
524 MODULE_LICENSE("GPL v2");
525 MODULE_DESCRIPTION("PMIC 8921 core driver");
526 MODULE_VERSION("1.0");
527 MODULE_ALIAS("platform:pm8921-core");