drivers/mfd/pm8921-core.c

   1 /*
   2  * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 and
   6  * only version 2 as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  */
  13
  14 #define pr_fmt(fmt) "%s: " fmt, __func__
  15
  16 #include <linux/kernel.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/irqchip/chained_irq.h>
  19 #include <linux/irq.h>
  20 #include <linux/module.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/slab.h>
  23 #include <linux/err.h>
  24 #include <linux/ssbi.h>
  25 #include <linux/mfd/core.h>
  26 #include <linux/mfd/pm8xxx/pm8921.h>
  27 #include <linux/mfd/pm8xxx/core.h>
  28 #include <linux/mfd/pm8xxx/irq.h>
  29
  30 #define SSBI_REG_ADDR_IRQ_BASE          0x1BB
  31
  32 #define SSBI_REG_ADDR_IRQ_ROOT          (SSBI_REG_ADDR_IRQ_BASE + 0)
  33 #define SSBI_REG_ADDR_IRQ_M_STATUS1     (SSBI_REG_ADDR_IRQ_BASE + 1)
  34 #define SSBI_REG_ADDR_IRQ_M_STATUS2     (SSBI_REG_ADDR_IRQ_BASE + 2)
  35 #define SSBI_REG_ADDR_IRQ_M_STATUS3     (SSBI_REG_ADDR_IRQ_BASE + 3)
  36 #define SSBI_REG_ADDR_IRQ_M_STATUS4     (SSBI_REG_ADDR_IRQ_BASE + 4)
  37 #define SSBI_REG_ADDR_IRQ_BLK_SEL       (SSBI_REG_ADDR_IRQ_BASE + 5)
  38 #define SSBI_REG_ADDR_IRQ_IT_STATUS     (SSBI_REG_ADDR_IRQ_BASE + 6)
  39 #define SSBI_REG_ADDR_IRQ_CONFIG        (SSBI_REG_ADDR_IRQ_BASE + 7)
  40 #define SSBI_REG_ADDR_IRQ_RT_STATUS     (SSBI_REG_ADDR_IRQ_BASE + 8)
  41
  42 #define PM_IRQF_LVL_SEL                 0x01    /* level select */
  43 #define PM_IRQF_MASK_FE                 0x02    /* mask falling edge */
  44 #define PM_IRQF_MASK_RE                 0x04    /* mask rising edge */
  45 #define PM_IRQF_CLR                     0x08    /* clear interrupt */
  46 #define PM_IRQF_BITS_MASK               0x70
  47 #define PM_IRQF_BITS_SHIFT              4
  48 #define PM_IRQF_WRITE                   0x80
  49
  50 #define PM_IRQF_MASK_ALL                (PM_IRQF_MASK_FE | \
  51                                         PM_IRQF_MASK_RE)
  52
  53 #define REG_HWREV               0x002  /* PMIC4 revision */
  54 #define REG_HWREV_2             0x0E8  /* PMIC4 revision 2 */
  55
  56 struct pm_irq_chip {
  57         struct device           *dev;
  58         spinlock_t              pm_irq_lock;
  59         unsigned int            devirq;
  60         unsigned int            irq_base;
  61         unsigned int            num_irqs;
  62         unsigned int            num_blocks;
  63         unsigned int            num_masters;
  64         u8                      config[0];
  65 };
  66
  67 struct pm8921 {
  68         struct device                   *dev;
  69         struct pm_irq_chip              *irq_chip;
  70 };
  71
  72 static int pm8xxx_read_root_irq(const struct pm_irq_chip *chip, u8 *rp)
  73 {
  74         return pm8xxx_readb(chip->dev, SSBI_REG_ADDR_IRQ_ROOT, rp);
  75 }
  76
  77 static int pm8xxx_read_master_irq(const struct pm_irq_chip *chip, u8 m, u8 *bp)
  78 {
  79         return pm8xxx_readb(chip->dev,
  80                         SSBI_REG_ADDR_IRQ_M_STATUS1 + m, bp);
  81 }
  82
  83 static int pm8xxx_read_block_irq(struct pm_irq_chip *chip, u8 bp, u8 *ip)
  84 {
  85         int     rc;
  86
  87         spin_lock(&chip->pm_irq_lock);
  88         rc = pm8xxx_writeb(chip->dev, SSBI_REG_ADDR_IRQ_BLK_SEL, bp);
  89         if (rc) {
  90                 pr_err("Failed Selecting Block %d rc=%d\n", bp, rc);
  91                 goto bail;
  92         }
  93
  94         rc = pm8xxx_readb(chip->dev, SSBI_REG_ADDR_IRQ_IT_STATUS, ip);
  95         if (rc)
  96                 pr_err("Failed Reading Status rc=%d\n", rc);
  97 bail:
  98         spin_unlock(&chip->pm_irq_lock);
  99         return rc;
 100 }
 101
 102 static int pm8xxx_config_irq(struct pm_irq_chip *chip, u8 bp, u8 cp)
 103 {
 104         int     rc;
 105
 106         spin_lock(&chip->pm_irq_lock);
 107         rc = pm8xxx_writeb(chip->dev, SSBI_REG_ADDR_IRQ_BLK_SEL, bp);
 108         if (rc) {
 109                 pr_err("Failed Selecting Block %d rc=%d\n", bp, rc);
 110                 goto bail;
 111         }
 112
 113         cp |= PM_IRQF_WRITE;
 114         rc = pm8xxx_writeb(chip->dev, SSBI_REG_ADDR_IRQ_CONFIG, cp);
 115         if (rc)
 116                 pr_err("Failed Configuring IRQ rc=%d\n", rc);
 117 bail:
 118         spin_unlock(&chip->pm_irq_lock);
 119         return rc;
 120 }
 121
 122 static int pm8xxx_irq_block_handler(struct pm_irq_chip *chip, int block)
 123 {
 124         int pmirq, irq, i, ret = 0;
 125         u8 bits;
 126
 127         ret = pm8xxx_read_block_irq(chip, block, &bits);
 128         if (ret) {
 129                 pr_err("Failed reading %d block ret=%d", block, ret);
 130                 return ret;
 131         }
 132         if (!bits) {
 133                 pr_err("block bit set in master but no irqs: %d", block);
 134                 return 0;
 135         }
 136
 137         /* Check IRQ bits */
 138         for (i = 0; i < 8; i++) {
 139                 if (bits & (1 << i)) {
 140                         pmirq = block * 8 + i;
 141                         irq = pmirq + chip->irq_base;
 142                         generic_handle_irq(irq);
 143                 }
 144         }
 145         return 0;
 146 }
 147
 148 static int pm8xxx_irq_master_handler(struct pm_irq_chip *chip, int master)
 149 {
 150         u8 blockbits;
 151         int block_number, i, ret = 0;
 152
 153         ret = pm8xxx_read_master_irq(chip, master, &blockbits);
 154         if (ret) {
 155                 pr_err("Failed to read master %d ret=%d\n", master, ret);
 156                 return ret;
 157         }
 158         if (!blockbits) {
 159                 pr_err("master bit set in root but no blocks: %d", master);
 160                 return 0;
 161         }
 162
 163         for (i = 0; i < 8; i++)
 164                 if (blockbits & (1 << i)) {
 165                         block_number = master * 8 + i;  /* block # */
 166                         ret |= pm8xxx_irq_block_handler(chip, block_number);
 167                 }
 168         return ret;
 169 }
 170
 171 static void pm8xxx_irq_handler(unsigned int irq, struct irq_desc *desc)
 172 {
 173         struct pm_irq_chip *chip = irq_desc_get_handler_data(desc);
 174         struct irq_chip *irq_chip = irq_desc_get_chip(desc);
 175         u8      root;
 176         int     i, ret, masters = 0;
 177
 178         chained_irq_enter(irq_chip, desc);
 179
 180         ret = pm8xxx_read_root_irq(chip, &root);
 181         if (ret) {
 182                 pr_err("Can't read root status ret=%d\n", ret);
 183                 return;
 184         }
 185
 186         /* on pm8xxx series masters start from bit 1 of the root */
 187         masters = root >> 1;
 188
 189         /* Read allowed masters for blocks. */
 190         for (i = 0; i < chip->num_masters; i++)
 191                 if (masters & (1 << i))
 192                         pm8xxx_irq_master_handler(chip, i);
 193
 194         chained_irq_exit(irq_chip, desc);
 195 }
 196
 197 static void pm8xxx_irq_mask_ack(struct irq_data *d)
 198 {
 199         struct pm_irq_chip *chip = irq_data_get_irq_chip_data(d);
 200         unsigned int pmirq = d->irq - chip->irq_base;
 201         int     master, irq_bit;
 202         u8      block, config;
 203
 204         block = pmirq / 8;
 205         master = block / 8;
 206         irq_bit = pmirq % 8;
 207
 208         config = chip->config[pmirq] | PM_IRQF_MASK_ALL | PM_IRQF_CLR;
 209         pm8xxx_config_irq(chip, block, config);
 210 }
 211
 212 static void pm8xxx_irq_unmask(struct irq_data *d)
 213 {
 214         struct pm_irq_chip *chip = irq_data_get_irq_chip_data(d);
 215         unsigned int pmirq = d->irq - chip->irq_base;
 216         int     master, irq_bit;
 217         u8      block, config;
 218
 219         block = pmirq / 8;
 220         master = block / 8;
 221         irq_bit = pmirq % 8;
 222
 223         config = chip->config[pmirq];
 224         pm8xxx_config_irq(chip, block, config);
 225 }
 226
 227 static int pm8xxx_irq_set_type(struct irq_data *d, unsigned int flow_type)
 228 {
 229         struct pm_irq_chip *chip = irq_data_get_irq_chip_data(d);
 230         unsigned int pmirq = d->irq - chip->irq_base;
 231         int master, irq_bit;
 232         u8 block, config;
 233
 234         block = pmirq / 8;
 235         master = block / 8;
 236         irq_bit  = pmirq % 8;
 237
 238         chip->config[pmirq] = (irq_bit << PM_IRQF_BITS_SHIFT)
 239                                                         | PM_IRQF_MASK_ALL;
 240         if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
 241                 if (flow_type & IRQF_TRIGGER_RISING)
 242                         chip->config[pmirq] &= ~PM_IRQF_MASK_RE;
 243                 if (flow_type & IRQF_TRIGGER_FALLING)
 244                         chip->config[pmirq] &= ~PM_IRQF_MASK_FE;
 245         } else {
 246                 chip->config[pmirq] |= PM_IRQF_LVL_SEL;
 247
 248                 if (flow_type & IRQF_TRIGGER_HIGH)
 249                         chip->config[pmirq] &= ~PM_IRQF_MASK_RE;
 250                 else
 251                         chip->config[pmirq] &= ~PM_IRQF_MASK_FE;
 252         }
 253
 254         config = chip->config[pmirq] | PM_IRQF_CLR;
 255         return pm8xxx_config_irq(chip, block, config);
 256 }
 257
 258 static int pm8xxx_irq_set_wake(struct irq_data *d, unsigned int on)
 259 {
 260         return 0;
 261 }
 262
 263 static struct irq_chip pm8xxx_irq_chip = {
 264         .name           = "pm8xxx",
 265         .irq_mask_ack   = pm8xxx_irq_mask_ack,
 266         .irq_unmask     = pm8xxx_irq_unmask,
 267         .irq_set_type   = pm8xxx_irq_set_type,
 268         .irq_set_wake   = pm8xxx_irq_set_wake,
 269         .flags          = IRQCHIP_MASK_ON_SUSPEND,
 270 };
 271
 272 /**
 273  * pm8xxx_get_irq_stat - get the status of the irq line
 274  * @chip: pointer to identify a pmic irq controller
 275  * @irq: the irq number
 276  *
 277  * The pm8xxx gpio and mpp rely on the interrupt block to read
 278  * the values on their pins. This function is to facilitate reading
 279  * the status of a gpio or an mpp line. The caller has to convert the
 280  * gpio number to irq number.
 281  *
 282  * RETURNS:
 283  * an int indicating the value read on that line
 284  */
 285 static int pm8xxx_get_irq_stat(struct pm_irq_chip *chip, int irq)
 286 {
 287         int pmirq, rc;
 288         u8  block, bits, bit;
 289         unsigned long flags;
 290
 291         if (chip == NULL || irq < chip->irq_base ||
 292                         irq >= chip->irq_base + chip->num_irqs)
 293                 return -EINVAL;
 294
 295         pmirq = irq - chip->irq_base;
 296
 297         block = pmirq / 8;
 298         bit = pmirq % 8;
 299
 300         spin_lock_irqsave(&chip->pm_irq_lock, flags);
 301
 302         rc = pm8xxx_writeb(chip->dev, SSBI_REG_ADDR_IRQ_BLK_SEL, block);
 303         if (rc) {
 304                 pr_err("Failed Selecting block irq=%d pmirq=%d blk=%d rc=%d\n",
 305                         irq, pmirq, block, rc);
 306                 goto bail_out;
 307         }
 308
 309         rc = pm8xxx_readb(chip->dev, SSBI_REG_ADDR_IRQ_RT_STATUS, &bits);
 310         if (rc) {
 311                 pr_err("Failed Configuring irq=%d pmirq=%d blk=%d rc=%d\n",
 312                         irq, pmirq, block, rc);
 313                 goto bail_out;
 314         }
 315
 316         rc = (bits & (1 << bit)) ? 1 : 0;
 317
 318 bail_out:
 319         spin_unlock_irqrestore(&chip->pm_irq_lock, flags);
 320
 321         return rc;
 322 }
 323
 324 static struct pm_irq_chip *pm8xxx_irq_init(struct device *dev,
 325                                 const struct pm8xxx_irq_platform_data *pdata)
 326 {
 327         struct pm_irq_chip  *chip;
 328         int devirq, rc;
 329         unsigned int pmirq;
 330
 331         if (!pdata) {
 332                 pr_err("No platform data\n");
 333                 return ERR_PTR(-EINVAL);
 334         }
 335
 336         devirq = pdata->devirq;
 337         if (devirq < 0) {
 338                 pr_err("missing devirq\n");
 339                 rc = devirq;
 340                 return ERR_PTR(-EINVAL);
 341         }
 342
 343         chip = kzalloc(sizeof(struct pm_irq_chip)
 344                         + sizeof(u8) * pdata->irq_cdata.nirqs, GFP_KERNEL);
 345         if (!chip) {
 346                 pr_err("Cannot alloc pm_irq_chip struct\n");
 347                 return ERR_PTR(-EINVAL);
 348         }
 349
 350         chip->dev = dev;
 351         chip->devirq = devirq;
 352         chip->irq_base = pdata->irq_base;
 353         chip->num_irqs = pdata->irq_cdata.nirqs;
 354         chip->num_blocks = DIV_ROUND_UP(chip->num_irqs, 8);
 355         chip->num_masters = DIV_ROUND_UP(chip->num_blocks, 8);
 356         spin_lock_init(&chip->pm_irq_lock);
 357
 358         for (pmirq = 0; pmirq < chip->num_irqs; pmirq++) {
 359                 irq_set_chip_and_handler(chip->irq_base + pmirq,
 360                                 &pm8xxx_irq_chip,
 361                                 handle_level_irq);
 362                 irq_set_chip_data(chip->irq_base + pmirq, chip);
 363 #ifdef CONFIG_ARM
 364                 set_irq_flags(chip->irq_base + pmirq, IRQF_VALID);
 365 #else
 366                 irq_set_noprobe(chip->irq_base + pmirq);
 367 #endif
 368         }
 369
 370         irq_set_irq_type(devirq, pdata->irq_trigger_flag);
 371         irq_set_handler_data(devirq, chip);
 372         irq_set_chained_handler(devirq, pm8xxx_irq_handler);
 373         irq_set_irq_wake(devirq, 1);
 374
 375         return chip;
 376 }
 377
 378 static int pm8xxx_irq_exit(struct pm_irq_chip *chip)
 379 {
 380         irq_set_chained_handler(chip->devirq, NULL);
 381         kfree(chip);
 382         return 0;
 383 }
 384
 385 static int pm8921_readb(const struct device *dev, u16 addr, u8 *val)
 386 {
 387         const struct pm8xxx_drvdata *pm8921_drvdata = dev_get_drvdata(dev);
 388         const struct pm8921 *pmic = pm8921_drvdata->pm_chip_data;
 389
 390         return ssbi_read(pmic->dev->parent, addr, val, 1);
 391 }
 392
 393 static int pm8921_writeb(const struct device *dev, u16 addr, u8 val)
 394 {
 395         const struct pm8xxx_drvdata *pm8921_drvdata = dev_get_drvdata(dev);
 396         const struct pm8921 *pmic = pm8921_drvdata->pm_chip_data;
 397
 398         return ssbi_write(pmic->dev->parent, addr, &val, 1);
 399 }
 400
 401 static int pm8921_read_buf(const struct device *dev, u16 addr, u8 *buf,
 402                                                                         int cnt)
 403 {
 404         const struct pm8xxx_drvdata *pm8921_drvdata = dev_get_drvdata(dev);
 405         const struct pm8921 *pmic = pm8921_drvdata->pm_chip_data;
 406
 407         return ssbi_read(pmic->dev->parent, addr, buf, cnt);
 408 }
 409
 410 static int pm8921_write_buf(const struct device *dev, u16 addr, u8 *buf,
 411                                                                         int cnt)
 412 {
 413         const struct pm8xxx_drvdata *pm8921_drvdata = dev_get_drvdata(dev);
 414         const struct pm8921 *pmic = pm8921_drvdata->pm_chip_data;
 415
 416         return ssbi_write(pmic->dev->parent, addr, buf, cnt);
 417 }
 418
 419 static int pm8921_read_irq_stat(const struct device *dev, int irq)
 420 {
 421         const struct pm8xxx_drvdata *pm8921_drvdata = dev_get_drvdata(dev);
 422         const struct pm8921 *pmic = pm8921_drvdata->pm_chip_data;
 423
 424         return pm8xxx_get_irq_stat(pmic->irq_chip, irq);
 425 }
 426
 427 static struct pm8xxx_drvdata pm8921_drvdata = {
 428         .pmic_readb             = pm8921_readb,
 429         .pmic_writeb            = pm8921_writeb,
 430         .pmic_read_buf          = pm8921_read_buf,
 431         .pmic_write_buf         = pm8921_write_buf,
 432         .pmic_read_irq_stat     = pm8921_read_irq_stat,
 433 };
 434
 435 static int pm8921_add_subdevices(const struct pm8921_platform_data
 436                                            *pdata,
 437                                            struct pm8921 *pmic,
 438                                            u32 rev)
 439 {
 440         int ret = 0, irq_base = 0;
 441         struct pm_irq_chip *irq_chip;
 442
 443         if (pdata->irq_pdata) {
 444                 pdata->irq_pdata->irq_cdata.nirqs = PM8921_NR_IRQS;
 445                 pdata->irq_pdata->irq_cdata.rev = rev;
 446                 irq_base = pdata->irq_pdata->irq_base;
 447                 irq_chip = pm8xxx_irq_init(pmic->dev, pdata->irq_pdata);
 448
 449                 if (IS_ERR(irq_chip)) {
 450                         pr_err("Failed to init interrupts ret=%ld\n",
 451                                         PTR_ERR(irq_chip));
 452                         return PTR_ERR(irq_chip);
 453                 }
 454                 pmic->irq_chip = irq_chip;
 455         }
 456         return ret;
 457 }
 458
 459 static int pm8921_probe(struct platform_device *pdev)
 460 {
 461         const struct pm8921_platform_data *pdata = dev_get_platdata(&pdev->dev);
 462         struct pm8921 *pmic;
 463         int rc;
 464         u8 val;
 465         u32 rev;
 466
 467         if (!pdata) {
 468                 pr_err("missing platform data\n");
 469                 return -EINVAL;
 470         }
 471
 472         pmic = devm_kzalloc(&pdev->dev, sizeof(struct pm8921), GFP_KERNEL);
 473         if (!pmic) {
 474                 pr_err("Cannot alloc pm8921 struct\n");
 475                 return -ENOMEM;
 476         }
 477
 478         /* Read PMIC chip revision */
 479         rc = ssbi_read(pdev->dev.parent, REG_HWREV, &val, sizeof(val));
 480         if (rc) {
 481                 pr_err("Failed to read hw rev reg %d:rc=%d\n", REG_HWREV, rc);
 482                 return rc;
 483         }
 484         pr_info("PMIC revision 1: %02X\n", val);
 485         rev = val;
 486
 487         /* Read PMIC chip revision 2 */
 488         rc = ssbi_read(pdev->dev.parent, REG_HWREV_2, &val, sizeof(val));
 489         if (rc) {
 490                 pr_err("Failed to read hw rev 2 reg %d:rc=%d\n",
 491                         REG_HWREV_2, rc);
 492                 return rc;
 493         }
 494         pr_info("PMIC revision 2: %02X\n", val);
 495         rev |= val << BITS_PER_BYTE;
 496
 497         pmic->dev = &pdev->dev;
 498         pm8921_drvdata.pm_chip_data = pmic;
 499         platform_set_drvdata(pdev, &pm8921_drvdata);
 500
 501         rc = pm8921_add_subdevices(pdata, pmic, rev);
 502         if (rc) {
 503                 pr_err("Cannot add subdevices rc=%d\n", rc);
 504                 goto err;
 505         }
 506
 507         /* gpio might not work if no irq device is found */
 508         WARN_ON(pmic->irq_chip == NULL);
 509
 510         return 0;
 511
 512 err:
 513         mfd_remove_devices(pmic->dev);
 514         return rc;
 515 }
 516
 517 static int pm8921_remove(struct platform_device *pdev)
 518 {
 519         struct pm8xxx_drvdata *drvdata;
 520         struct pm8921 *pmic = NULL;
 521
 522         drvdata = platform_get_drvdata(pdev);
 523         if (drvdata)
 524                 pmic = drvdata->pm_chip_data;
 525         if (pmic) {
 526                 mfd_remove_devices(pmic->dev);
 527                 if (pmic->irq_chip) {
 528                         pm8xxx_irq_exit(pmic->irq_chip);
 529                         pmic->irq_chip = NULL;
 530                 }
 531         }
 532
 533         return 0;
 534 }
 535
 536 static struct platform_driver pm8921_driver = {
 537         .probe          = pm8921_probe,
 538         .remove         = pm8921_remove,
 539         .driver         = {
 540                 .name   = "pm8921-core",
 541                 .owner  = THIS_MODULE,
 542         },
 543 };
 544
 545 static int __init pm8921_init(void)
 546 {
 547         return platform_driver_register(&pm8921_driver);
 548 }
 549 subsys_initcall(pm8921_init);
 550
 551 static void __exit pm8921_exit(void)
 552 {
 553         platform_driver_unregister(&pm8921_driver);
 554 }
 555 module_exit(pm8921_exit);
 556
 557 MODULE_LICENSE("GPL v2");
 558 MODULE_DESCRIPTION("PMIC 8921 core driver");
 559 MODULE_VERSION("1.0");
 560 MODULE_ALIAS("platform:pm8921-core");