mfd: rtsx: Read vendor setting from config space
[firefly-linux-kernel-4.4.55.git] / drivers / mfd / rts5209.c
1 /* Driver for Realtek PCI-Express card reader
2  *
3  * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License as published by the
7  * Free Software Foundation; either version 2, or (at your option) any
8  * later version.
9  *
10  * This program is distributed in the hope that it will be useful, but
11  * WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13  * General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, see <http://www.gnu.org/licenses/>.
17  *
18  * Author:
19  *   Wei WANG <wei_wang@realsil.com.cn>
20  *   No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
21  */
22
23 #include <linux/module.h>
24 #include <linux/delay.h>
25 #include <linux/mfd/rtsx_pci.h>
26
27 #include "rtsx_pcr.h"
28
29 static u8 rts5209_get_ic_version(struct rtsx_pcr *pcr)
30 {
31         u8 val;
32
33         val = rtsx_pci_readb(pcr, 0x1C);
34         return val & 0x0F;
35 }
36
37 static void rts5209_fetch_vendor_settings(struct rtsx_pcr *pcr)
38 {
39         u32 reg;
40
41         rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);
42         dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
43
44         if (rts5209_vendor_setting1_valid(reg)) {
45                 if (rts5209_reg_check_ms_pmos(reg))
46                         pcr->flags |= PCR_MS_PMOS;
47                 pcr->aspm_en = rts5209_reg_to_aspm(reg);
48         }
49
50         rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg);
51         dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
52
53         if (rts5209_vendor_setting2_valid(reg)) {
54                 pcr->sd30_drive_sel_1v8 =
55                         rts5209_reg_to_sd30_drive_sel_1v8(reg);
56                 pcr->sd30_drive_sel_3v3 =
57                         rts5209_reg_to_sd30_drive_sel_3v3(reg);
58                 pcr->card_drive_sel = rts5209_reg_to_card_drive_sel(reg);
59         }
60 }
61
62 static int rts5209_extra_init_hw(struct rtsx_pcr *pcr)
63 {
64         rtsx_pci_init_cmd(pcr);
65
66         /* Turn off LED */
67         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_GPIO, 0xFF, 0x03);
68         /* Configure GPIO as output */
69         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_GPIO_DIR, 0xFF, 0x03);
70         /* Configure driving */
71         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DRIVE_SEL,
72                         0xFF, pcr->sd30_drive_sel_3v3);
73
74         return rtsx_pci_send_cmd(pcr, 100);
75 }
76
77 static int rts5209_optimize_phy(struct rtsx_pcr *pcr)
78 {
79         return rtsx_pci_write_phy_register(pcr, 0x00, 0xB966);
80 }
81
82 static int rts5209_turn_on_led(struct rtsx_pcr *pcr)
83 {
84         return rtsx_pci_write_register(pcr, CARD_GPIO, 0x01, 0x00);
85 }
86
87 static int rts5209_turn_off_led(struct rtsx_pcr *pcr)
88 {
89         return rtsx_pci_write_register(pcr, CARD_GPIO, 0x01, 0x01);
90 }
91
92 static int rts5209_enable_auto_blink(struct rtsx_pcr *pcr)
93 {
94         return rtsx_pci_write_register(pcr, CARD_AUTO_BLINK, 0xFF, 0x0D);
95 }
96
97 static int rts5209_disable_auto_blink(struct rtsx_pcr *pcr)
98 {
99         return rtsx_pci_write_register(pcr, CARD_AUTO_BLINK, 0x08, 0x00);
100 }
101
102 static int rts5209_card_power_on(struct rtsx_pcr *pcr, int card)
103 {
104         int err;
105         u8 pwr_mask, partial_pwr_on, pwr_on;
106
107         pwr_mask = SD_POWER_MASK;
108         partial_pwr_on = SD_PARTIAL_POWER_ON;
109         pwr_on = SD_POWER_ON;
110
111         if ((pcr->flags & PCR_MS_PMOS) && (card == RTSX_MS_CARD)) {
112                 pwr_mask = MS_POWER_MASK;
113                 partial_pwr_on = MS_PARTIAL_POWER_ON;
114                 pwr_on = MS_POWER_ON;
115         }
116
117         rtsx_pci_init_cmd(pcr);
118         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
119                         pwr_mask, partial_pwr_on);
120         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
121                         LDO3318_PWR_MASK, 0x04);
122         err = rtsx_pci_send_cmd(pcr, 100);
123         if (err < 0)
124                 return err;
125
126         /* To avoid too large in-rush current */
127         udelay(150);
128
129         rtsx_pci_init_cmd(pcr);
130         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL, pwr_mask, pwr_on);
131         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
132                         LDO3318_PWR_MASK, 0x00);
133         err = rtsx_pci_send_cmd(pcr, 100);
134         if (err < 0)
135                 return err;
136
137         return 0;
138 }
139
140 static int rts5209_card_power_off(struct rtsx_pcr *pcr, int card)
141 {
142         u8 pwr_mask, pwr_off;
143
144         pwr_mask = SD_POWER_MASK;
145         pwr_off = SD_POWER_OFF;
146
147         if ((pcr->flags & PCR_MS_PMOS) && (card == RTSX_MS_CARD)) {
148                 pwr_mask = MS_POWER_MASK;
149                 pwr_off = MS_POWER_OFF;
150         }
151
152         rtsx_pci_init_cmd(pcr);
153         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
154                         pwr_mask | PMOS_STRG_MASK, pwr_off | PMOS_STRG_400mA);
155         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
156                         LDO3318_PWR_MASK, 0x06);
157         return rtsx_pci_send_cmd(pcr, 100);
158 }
159
160 static int rts5209_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
161 {
162         int err;
163
164         if (voltage == OUTPUT_3V3) {
165                 err = rtsx_pci_write_register(pcr,
166                                 SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_3v3);
167                 if (err < 0)
168                         return err;
169                 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4FC0 | 0x24);
170                 if (err < 0)
171                         return err;
172         } else if (voltage == OUTPUT_1V8) {
173                 err = rtsx_pci_write_register(pcr,
174                                 SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_1v8);
175                 if (err < 0)
176                         return err;
177                 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4C40 | 0x24);
178                 if (err < 0)
179                         return err;
180         } else {
181                 return -EINVAL;
182         }
183
184         return 0;
185 }
186
187 static const struct pcr_ops rts5209_pcr_ops = {
188         .fetch_vendor_settings = rts5209_fetch_vendor_settings,
189         .extra_init_hw = rts5209_extra_init_hw,
190         .optimize_phy = rts5209_optimize_phy,
191         .turn_on_led = rts5209_turn_on_led,
192         .turn_off_led = rts5209_turn_off_led,
193         .enable_auto_blink = rts5209_enable_auto_blink,
194         .disable_auto_blink = rts5209_disable_auto_blink,
195         .card_power_on = rts5209_card_power_on,
196         .card_power_off = rts5209_card_power_off,
197         .switch_output_voltage = rts5209_switch_output_voltage,
198         .cd_deglitch = NULL,
199         .conv_clk_and_div_n = NULL,
200 };
201
202 /* SD Pull Control Enable:
203  *     SD_DAT[3:0] ==> pull up
204  *     SD_CD       ==> pull up
205  *     SD_WP       ==> pull up
206  *     SD_CMD      ==> pull up
207  *     SD_CLK      ==> pull down
208  */
209 static const u32 rts5209_sd_pull_ctl_enable_tbl[] = {
210         RTSX_REG_PAIR(CARD_PULL_CTL1, 0xAA),
211         RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA),
212         RTSX_REG_PAIR(CARD_PULL_CTL3, 0xE9),
213         0,
214 };
215
216 /* SD Pull Control Disable:
217  *     SD_DAT[3:0] ==> pull down
218  *     SD_CD       ==> pull up
219  *     SD_WP       ==> pull down
220  *     SD_CMD      ==> pull down
221  *     SD_CLK      ==> pull down
222  */
223 static const u32 rts5209_sd_pull_ctl_disable_tbl[] = {
224         RTSX_REG_PAIR(CARD_PULL_CTL1, 0x55),
225         RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
226         RTSX_REG_PAIR(CARD_PULL_CTL3, 0xD5),
227         0,
228 };
229
230 /* MS Pull Control Enable:
231  *     MS CD       ==> pull up
232  *     others      ==> pull down
233  */
234 static const u32 rts5209_ms_pull_ctl_enable_tbl[] = {
235         RTSX_REG_PAIR(CARD_PULL_CTL4, 0x55),
236         RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
237         RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
238         0,
239 };
240
241 /* MS Pull Control Disable:
242  *     MS CD       ==> pull up
243  *     others      ==> pull down
244  */
245 static const u32 rts5209_ms_pull_ctl_disable_tbl[] = {
246         RTSX_REG_PAIR(CARD_PULL_CTL4, 0x55),
247         RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
248         RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
249         0,
250 };
251
252 void rts5209_init_params(struct rtsx_pcr *pcr)
253 {
254         pcr->extra_caps = EXTRA_CAPS_SD_SDR50 |
255                 EXTRA_CAPS_SD_SDR104 | EXTRA_CAPS_MMC_8BIT;
256         pcr->num_slots = 2;
257         pcr->ops = &rts5209_pcr_ops;
258
259         pcr->flags = 0;
260         pcr->card_drive_sel = RTS5209_CARD_DRIVE_DEFAULT;
261         pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;
262         pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;
263         pcr->aspm_en = ASPM_L1_EN;
264
265         pcr->ic_version = rts5209_get_ic_version(pcr);
266         pcr->sd_pull_ctl_enable_tbl = rts5209_sd_pull_ctl_enable_tbl;
267         pcr->sd_pull_ctl_disable_tbl = rts5209_sd_pull_ctl_disable_tbl;
268         pcr->ms_pull_ctl_enable_tbl = rts5209_ms_pull_ctl_enable_tbl;
269         pcr->ms_pull_ctl_disable_tbl = rts5209_ms_pull_ctl_disable_tbl;
270 }