Merge branch 'sh-pfc-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/geert...
[firefly-linux-kernel-4.4.55.git] / drivers / mfd / stmpe.c
1 /*
2  * ST Microelectronics MFD: stmpe's driver
3  *
4  * Copyright (C) ST-Ericsson SA 2010
5  *
6  * License Terms: GNU General Public License, version 2
7  * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
8  */
9
10 #include <linux/err.h>
11 #include <linux/gpio.h>
12 #include <linux/export.h>
13 #include <linux/kernel.h>
14 #include <linux/interrupt.h>
15 #include <linux/irq.h>
16 #include <linux/irqdomain.h>
17 #include <linux/of.h>
18 #include <linux/of_gpio.h>
19 #include <linux/pm.h>
20 #include <linux/slab.h>
21 #include <linux/mfd/core.h>
22 #include <linux/delay.h>
23 #include <linux/regulator/consumer.h>
24 #include "stmpe.h"
25
26 static int __stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
27 {
28         return stmpe->variant->enable(stmpe, blocks, true);
29 }
30
31 static int __stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
32 {
33         return stmpe->variant->enable(stmpe, blocks, false);
34 }
35
36 static int __stmpe_reg_read(struct stmpe *stmpe, u8 reg)
37 {
38         int ret;
39
40         ret = stmpe->ci->read_byte(stmpe, reg);
41         if (ret < 0)
42                 dev_err(stmpe->dev, "failed to read reg %#x: %d\n", reg, ret);
43
44         dev_vdbg(stmpe->dev, "rd: reg %#x => data %#x\n", reg, ret);
45
46         return ret;
47 }
48
49 static int __stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
50 {
51         int ret;
52
53         dev_vdbg(stmpe->dev, "wr: reg %#x <= %#x\n", reg, val);
54
55         ret = stmpe->ci->write_byte(stmpe, reg, val);
56         if (ret < 0)
57                 dev_err(stmpe->dev, "failed to write reg %#x: %d\n", reg, ret);
58
59         return ret;
60 }
61
62 static int __stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
63 {
64         int ret;
65
66         ret = __stmpe_reg_read(stmpe, reg);
67         if (ret < 0)
68                 return ret;
69
70         ret &= ~mask;
71         ret |= val;
72
73         return __stmpe_reg_write(stmpe, reg, ret);
74 }
75
76 static int __stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length,
77                               u8 *values)
78 {
79         int ret;
80
81         ret = stmpe->ci->read_block(stmpe, reg, length, values);
82         if (ret < 0)
83                 dev_err(stmpe->dev, "failed to read regs %#x: %d\n", reg, ret);
84
85         dev_vdbg(stmpe->dev, "rd: reg %#x (%d) => ret %#x\n", reg, length, ret);
86         stmpe_dump_bytes("stmpe rd: ", values, length);
87
88         return ret;
89 }
90
91 static int __stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
92                         const u8 *values)
93 {
94         int ret;
95
96         dev_vdbg(stmpe->dev, "wr: regs %#x (%d)\n", reg, length);
97         stmpe_dump_bytes("stmpe wr: ", values, length);
98
99         ret = stmpe->ci->write_block(stmpe, reg, length, values);
100         if (ret < 0)
101                 dev_err(stmpe->dev, "failed to write regs %#x: %d\n", reg, ret);
102
103         return ret;
104 }
105
106 /**
107  * stmpe_enable - enable blocks on an STMPE device
108  * @stmpe:      Device to work on
109  * @blocks:     Mask of blocks (enum stmpe_block values) to enable
110  */
111 int stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
112 {
113         int ret;
114
115         mutex_lock(&stmpe->lock);
116         ret = __stmpe_enable(stmpe, blocks);
117         mutex_unlock(&stmpe->lock);
118
119         return ret;
120 }
121 EXPORT_SYMBOL_GPL(stmpe_enable);
122
123 /**
124  * stmpe_disable - disable blocks on an STMPE device
125  * @stmpe:      Device to work on
126  * @blocks:     Mask of blocks (enum stmpe_block values) to enable
127  */
128 int stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
129 {
130         int ret;
131
132         mutex_lock(&stmpe->lock);
133         ret = __stmpe_disable(stmpe, blocks);
134         mutex_unlock(&stmpe->lock);
135
136         return ret;
137 }
138 EXPORT_SYMBOL_GPL(stmpe_disable);
139
140 /**
141  * stmpe_reg_read() - read a single STMPE register
142  * @stmpe:      Device to read from
143  * @reg:        Register to read
144  */
145 int stmpe_reg_read(struct stmpe *stmpe, u8 reg)
146 {
147         int ret;
148
149         mutex_lock(&stmpe->lock);
150         ret = __stmpe_reg_read(stmpe, reg);
151         mutex_unlock(&stmpe->lock);
152
153         return ret;
154 }
155 EXPORT_SYMBOL_GPL(stmpe_reg_read);
156
157 /**
158  * stmpe_reg_write() - write a single STMPE register
159  * @stmpe:      Device to write to
160  * @reg:        Register to write
161  * @val:        Value to write
162  */
163 int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
164 {
165         int ret;
166
167         mutex_lock(&stmpe->lock);
168         ret = __stmpe_reg_write(stmpe, reg, val);
169         mutex_unlock(&stmpe->lock);
170
171         return ret;
172 }
173 EXPORT_SYMBOL_GPL(stmpe_reg_write);
174
175 /**
176  * stmpe_set_bits() - set the value of a bitfield in a STMPE register
177  * @stmpe:      Device to write to
178  * @reg:        Register to write
179  * @mask:       Mask of bits to set
180  * @val:        Value to set
181  */
182 int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
183 {
184         int ret;
185
186         mutex_lock(&stmpe->lock);
187         ret = __stmpe_set_bits(stmpe, reg, mask, val);
188         mutex_unlock(&stmpe->lock);
189
190         return ret;
191 }
192 EXPORT_SYMBOL_GPL(stmpe_set_bits);
193
194 /**
195  * stmpe_block_read() - read multiple STMPE registers
196  * @stmpe:      Device to read from
197  * @reg:        First register
198  * @length:     Number of registers
199  * @values:     Buffer to write to
200  */
201 int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, u8 *values)
202 {
203         int ret;
204
205         mutex_lock(&stmpe->lock);
206         ret = __stmpe_block_read(stmpe, reg, length, values);
207         mutex_unlock(&stmpe->lock);
208
209         return ret;
210 }
211 EXPORT_SYMBOL_GPL(stmpe_block_read);
212
213 /**
214  * stmpe_block_write() - write multiple STMPE registers
215  * @stmpe:      Device to write to
216  * @reg:        First register
217  * @length:     Number of registers
218  * @values:     Values to write
219  */
220 int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
221                       const u8 *values)
222 {
223         int ret;
224
225         mutex_lock(&stmpe->lock);
226         ret = __stmpe_block_write(stmpe, reg, length, values);
227         mutex_unlock(&stmpe->lock);
228
229         return ret;
230 }
231 EXPORT_SYMBOL_GPL(stmpe_block_write);
232
233 /**
234  * stmpe_set_altfunc()- set the alternate function for STMPE pins
235  * @stmpe:      Device to configure
236  * @pins:       Bitmask of pins to affect
237  * @block:      block to enable alternate functions for
238  *
239  * @pins is assumed to have a bit set for each of the bits whose alternate
240  * function is to be changed, numbered according to the GPIOXY numbers.
241  *
242  * If the GPIO module is not enabled, this function automatically enables it in
243  * order to perform the change.
244  */
245 int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins, enum stmpe_block block)
246 {
247         struct stmpe_variant_info *variant = stmpe->variant;
248         u8 regaddr = stmpe->regs[STMPE_IDX_GPAFR_U_MSB];
249         int af_bits = variant->af_bits;
250         int numregs = DIV_ROUND_UP(stmpe->num_gpios * af_bits, 8);
251         int mask = (1 << af_bits) - 1;
252         u8 regs[8];
253         int af, afperreg, ret;
254
255         if (!variant->get_altfunc)
256                 return 0;
257
258         afperreg = 8 / af_bits;
259         mutex_lock(&stmpe->lock);
260
261         ret = __stmpe_enable(stmpe, STMPE_BLOCK_GPIO);
262         if (ret < 0)
263                 goto out;
264
265         ret = __stmpe_block_read(stmpe, regaddr, numregs, regs);
266         if (ret < 0)
267                 goto out;
268
269         af = variant->get_altfunc(stmpe, block);
270
271         while (pins) {
272                 int pin = __ffs(pins);
273                 int regoffset = numregs - (pin / afperreg) - 1;
274                 int pos = (pin % afperreg) * (8 / afperreg);
275
276                 regs[regoffset] &= ~(mask << pos);
277                 regs[regoffset] |= af << pos;
278
279                 pins &= ~(1 << pin);
280         }
281
282         ret = __stmpe_block_write(stmpe, regaddr, numregs, regs);
283
284 out:
285         mutex_unlock(&stmpe->lock);
286         return ret;
287 }
288 EXPORT_SYMBOL_GPL(stmpe_set_altfunc);
289
290 /*
291  * GPIO (all variants)
292  */
293
294 static struct resource stmpe_gpio_resources[] = {
295         /* Start and end filled dynamically */
296         {
297                 .flags  = IORESOURCE_IRQ,
298         },
299 };
300
301 static const struct mfd_cell stmpe_gpio_cell = {
302         .name           = "stmpe-gpio",
303         .of_compatible  = "st,stmpe-gpio",
304         .resources      = stmpe_gpio_resources,
305         .num_resources  = ARRAY_SIZE(stmpe_gpio_resources),
306 };
307
308 static const struct mfd_cell stmpe_gpio_cell_noirq = {
309         .name           = "stmpe-gpio",
310         .of_compatible  = "st,stmpe-gpio",
311         /* gpio cell resources consist of an irq only so no resources here */
312 };
313
314 /*
315  * Keypad (1601, 2401, 2403)
316  */
317
318 static struct resource stmpe_keypad_resources[] = {
319         {
320                 .name   = "KEYPAD",
321                 .flags  = IORESOURCE_IRQ,
322         },
323         {
324                 .name   = "KEYPAD_OVER",
325                 .flags  = IORESOURCE_IRQ,
326         },
327 };
328
329 static const struct mfd_cell stmpe_keypad_cell = {
330         .name           = "stmpe-keypad",
331         .of_compatible  = "st,stmpe-keypad",
332         .resources      = stmpe_keypad_resources,
333         .num_resources  = ARRAY_SIZE(stmpe_keypad_resources),
334 };
335
336 /*
337  * STMPE801
338  */
339 static const u8 stmpe801_regs[] = {
340         [STMPE_IDX_CHIP_ID]     = STMPE801_REG_CHIP_ID,
341         [STMPE_IDX_ICR_LSB]     = STMPE801_REG_SYS_CTRL,
342         [STMPE_IDX_GPMR_LSB]    = STMPE801_REG_GPIO_MP_STA,
343         [STMPE_IDX_GPSR_LSB]    = STMPE801_REG_GPIO_SET_PIN,
344         [STMPE_IDX_GPCR_LSB]    = STMPE801_REG_GPIO_SET_PIN,
345         [STMPE_IDX_GPDR_LSB]    = STMPE801_REG_GPIO_DIR,
346         [STMPE_IDX_IEGPIOR_LSB] = STMPE801_REG_GPIO_INT_EN,
347         [STMPE_IDX_ISGPIOR_MSB] = STMPE801_REG_GPIO_INT_STA,
348
349 };
350
351 static struct stmpe_variant_block stmpe801_blocks[] = {
352         {
353                 .cell   = &stmpe_gpio_cell,
354                 .irq    = 0,
355                 .block  = STMPE_BLOCK_GPIO,
356         },
357 };
358
359 static struct stmpe_variant_block stmpe801_blocks_noirq[] = {
360         {
361                 .cell   = &stmpe_gpio_cell_noirq,
362                 .block  = STMPE_BLOCK_GPIO,
363         },
364 };
365
366 static int stmpe801_enable(struct stmpe *stmpe, unsigned int blocks,
367                            bool enable)
368 {
369         if (blocks & STMPE_BLOCK_GPIO)
370                 return 0;
371         else
372                 return -EINVAL;
373 }
374
375 static struct stmpe_variant_info stmpe801 = {
376         .name           = "stmpe801",
377         .id_val         = STMPE801_ID,
378         .id_mask        = 0xffff,
379         .num_gpios      = 8,
380         .regs           = stmpe801_regs,
381         .blocks         = stmpe801_blocks,
382         .num_blocks     = ARRAY_SIZE(stmpe801_blocks),
383         .num_irqs       = STMPE801_NR_INTERNAL_IRQS,
384         .enable         = stmpe801_enable,
385 };
386
387 static struct stmpe_variant_info stmpe801_noirq = {
388         .name           = "stmpe801",
389         .id_val         = STMPE801_ID,
390         .id_mask        = 0xffff,
391         .num_gpios      = 8,
392         .regs           = stmpe801_regs,
393         .blocks         = stmpe801_blocks_noirq,
394         .num_blocks     = ARRAY_SIZE(stmpe801_blocks_noirq),
395         .enable         = stmpe801_enable,
396 };
397
398 /*
399  * Touchscreen (STMPE811 or STMPE610)
400  */
401
402 static struct resource stmpe_ts_resources[] = {
403         {
404                 .name   = "TOUCH_DET",
405                 .flags  = IORESOURCE_IRQ,
406         },
407         {
408                 .name   = "FIFO_TH",
409                 .flags  = IORESOURCE_IRQ,
410         },
411 };
412
413 static const struct mfd_cell stmpe_ts_cell = {
414         .name           = "stmpe-ts",
415         .of_compatible  = "st,stmpe-ts",
416         .resources      = stmpe_ts_resources,
417         .num_resources  = ARRAY_SIZE(stmpe_ts_resources),
418 };
419
420 /*
421  * STMPE811 or STMPE610
422  */
423
424 static const u8 stmpe811_regs[] = {
425         [STMPE_IDX_CHIP_ID]     = STMPE811_REG_CHIP_ID,
426         [STMPE_IDX_ICR_LSB]     = STMPE811_REG_INT_CTRL,
427         [STMPE_IDX_IER_LSB]     = STMPE811_REG_INT_EN,
428         [STMPE_IDX_ISR_MSB]     = STMPE811_REG_INT_STA,
429         [STMPE_IDX_GPMR_LSB]    = STMPE811_REG_GPIO_MP_STA,
430         [STMPE_IDX_GPSR_LSB]    = STMPE811_REG_GPIO_SET_PIN,
431         [STMPE_IDX_GPCR_LSB]    = STMPE811_REG_GPIO_CLR_PIN,
432         [STMPE_IDX_GPDR_LSB]    = STMPE811_REG_GPIO_DIR,
433         [STMPE_IDX_GPRER_LSB]   = STMPE811_REG_GPIO_RE,
434         [STMPE_IDX_GPFER_LSB]   = STMPE811_REG_GPIO_FE,
435         [STMPE_IDX_GPAFR_U_MSB] = STMPE811_REG_GPIO_AF,
436         [STMPE_IDX_IEGPIOR_LSB] = STMPE811_REG_GPIO_INT_EN,
437         [STMPE_IDX_ISGPIOR_MSB] = STMPE811_REG_GPIO_INT_STA,
438         [STMPE_IDX_GPEDR_MSB]   = STMPE811_REG_GPIO_ED,
439 };
440
441 static struct stmpe_variant_block stmpe811_blocks[] = {
442         {
443                 .cell   = &stmpe_gpio_cell,
444                 .irq    = STMPE811_IRQ_GPIOC,
445                 .block  = STMPE_BLOCK_GPIO,
446         },
447         {
448                 .cell   = &stmpe_ts_cell,
449                 .irq    = STMPE811_IRQ_TOUCH_DET,
450                 .block  = STMPE_BLOCK_TOUCHSCREEN,
451         },
452 };
453
454 static int stmpe811_enable(struct stmpe *stmpe, unsigned int blocks,
455                            bool enable)
456 {
457         unsigned int mask = 0;
458
459         if (blocks & STMPE_BLOCK_GPIO)
460                 mask |= STMPE811_SYS_CTRL2_GPIO_OFF;
461
462         if (blocks & STMPE_BLOCK_ADC)
463                 mask |= STMPE811_SYS_CTRL2_ADC_OFF;
464
465         if (blocks & STMPE_BLOCK_TOUCHSCREEN)
466                 mask |= STMPE811_SYS_CTRL2_TSC_OFF;
467
468         return __stmpe_set_bits(stmpe, STMPE811_REG_SYS_CTRL2, mask,
469                                 enable ? 0 : mask);
470 }
471
472 static int stmpe811_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
473 {
474         /* 0 for touchscreen, 1 for GPIO */
475         return block != STMPE_BLOCK_TOUCHSCREEN;
476 }
477
478 static struct stmpe_variant_info stmpe811 = {
479         .name           = "stmpe811",
480         .id_val         = 0x0811,
481         .id_mask        = 0xffff,
482         .num_gpios      = 8,
483         .af_bits        = 1,
484         .regs           = stmpe811_regs,
485         .blocks         = stmpe811_blocks,
486         .num_blocks     = ARRAY_SIZE(stmpe811_blocks),
487         .num_irqs       = STMPE811_NR_INTERNAL_IRQS,
488         .enable         = stmpe811_enable,
489         .get_altfunc    = stmpe811_get_altfunc,
490 };
491
492 /* Similar to 811, except number of gpios */
493 static struct stmpe_variant_info stmpe610 = {
494         .name           = "stmpe610",
495         .id_val         = 0x0811,
496         .id_mask        = 0xffff,
497         .num_gpios      = 6,
498         .af_bits        = 1,
499         .regs           = stmpe811_regs,
500         .blocks         = stmpe811_blocks,
501         .num_blocks     = ARRAY_SIZE(stmpe811_blocks),
502         .num_irqs       = STMPE811_NR_INTERNAL_IRQS,
503         .enable         = stmpe811_enable,
504         .get_altfunc    = stmpe811_get_altfunc,
505 };
506
507 /*
508  * STMPE1601
509  */
510
511 static const u8 stmpe1601_regs[] = {
512         [STMPE_IDX_CHIP_ID]     = STMPE1601_REG_CHIP_ID,
513         [STMPE_IDX_ICR_LSB]     = STMPE1601_REG_ICR_LSB,
514         [STMPE_IDX_IER_LSB]     = STMPE1601_REG_IER_LSB,
515         [STMPE_IDX_ISR_MSB]     = STMPE1601_REG_ISR_MSB,
516         [STMPE_IDX_GPMR_LSB]    = STMPE1601_REG_GPIO_MP_LSB,
517         [STMPE_IDX_GPSR_LSB]    = STMPE1601_REG_GPIO_SET_LSB,
518         [STMPE_IDX_GPCR_LSB]    = STMPE1601_REG_GPIO_CLR_LSB,
519         [STMPE_IDX_GPDR_LSB]    = STMPE1601_REG_GPIO_SET_DIR_LSB,
520         [STMPE_IDX_GPRER_LSB]   = STMPE1601_REG_GPIO_RE_LSB,
521         [STMPE_IDX_GPFER_LSB]   = STMPE1601_REG_GPIO_FE_LSB,
522         [STMPE_IDX_GPPUR_LSB]   = STMPE1601_REG_GPIO_PU_LSB,
523         [STMPE_IDX_GPAFR_U_MSB] = STMPE1601_REG_GPIO_AF_U_MSB,
524         [STMPE_IDX_IEGPIOR_LSB] = STMPE1601_REG_INT_EN_GPIO_MASK_LSB,
525         [STMPE_IDX_ISGPIOR_MSB] = STMPE1601_REG_INT_STA_GPIO_MSB,
526         [STMPE_IDX_GPEDR_MSB]   = STMPE1601_REG_GPIO_ED_MSB,
527 };
528
529 static struct stmpe_variant_block stmpe1601_blocks[] = {
530         {
531                 .cell   = &stmpe_gpio_cell,
532                 .irq    = STMPE1601_IRQ_GPIOC,
533                 .block  = STMPE_BLOCK_GPIO,
534         },
535         {
536                 .cell   = &stmpe_keypad_cell,
537                 .irq    = STMPE1601_IRQ_KEYPAD,
538                 .block  = STMPE_BLOCK_KEYPAD,
539         },
540 };
541
542 /* supported autosleep timeout delay (in msecs) */
543 static const int stmpe_autosleep_delay[] = {
544         4, 16, 32, 64, 128, 256, 512, 1024,
545 };
546
547 static int stmpe_round_timeout(int timeout)
548 {
549         int i;
550
551         for (i = 0; i < ARRAY_SIZE(stmpe_autosleep_delay); i++) {
552                 if (stmpe_autosleep_delay[i] >= timeout)
553                         return i;
554         }
555
556         /*
557          * requests for delays longer than supported should not return the
558          * longest supported delay
559          */
560         return -EINVAL;
561 }
562
563 static int stmpe_autosleep(struct stmpe *stmpe, int autosleep_timeout)
564 {
565         int ret;
566
567         if (!stmpe->variant->enable_autosleep)
568                 return -ENOSYS;
569
570         mutex_lock(&stmpe->lock);
571         ret = stmpe->variant->enable_autosleep(stmpe, autosleep_timeout);
572         mutex_unlock(&stmpe->lock);
573
574         return ret;
575 }
576
577 /*
578  * Both stmpe 1601/2403 support same layout for autosleep
579  */
580 static int stmpe1601_autosleep(struct stmpe *stmpe,
581                 int autosleep_timeout)
582 {
583         int ret, timeout;
584
585         /* choose the best available timeout */
586         timeout = stmpe_round_timeout(autosleep_timeout);
587         if (timeout < 0) {
588                 dev_err(stmpe->dev, "invalid timeout\n");
589                 return timeout;
590         }
591
592         ret = __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2,
593                         STMPE1601_AUTOSLEEP_TIMEOUT_MASK,
594                         timeout);
595         if (ret < 0)
596                 return ret;
597
598         return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2,
599                         STPME1601_AUTOSLEEP_ENABLE,
600                         STPME1601_AUTOSLEEP_ENABLE);
601 }
602
603 static int stmpe1601_enable(struct stmpe *stmpe, unsigned int blocks,
604                             bool enable)
605 {
606         unsigned int mask = 0;
607
608         if (blocks & STMPE_BLOCK_GPIO)
609                 mask |= STMPE1601_SYS_CTRL_ENABLE_GPIO;
610         else
611                 mask &= ~STMPE1601_SYS_CTRL_ENABLE_GPIO;
612
613         if (blocks & STMPE_BLOCK_KEYPAD)
614                 mask |= STMPE1601_SYS_CTRL_ENABLE_KPC;
615         else
616                 mask &= ~STMPE1601_SYS_CTRL_ENABLE_KPC;
617
618         if (blocks & STMPE_BLOCK_PWM)
619                 mask |= STMPE1601_SYS_CTRL_ENABLE_SPWM;
620         else
621                 mask &= ~STMPE1601_SYS_CTRL_ENABLE_SPWM;
622
623         return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL, mask,
624                                 enable ? mask : 0);
625 }
626
627 static int stmpe1601_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
628 {
629         switch (block) {
630         case STMPE_BLOCK_PWM:
631                 return 2;
632
633         case STMPE_BLOCK_KEYPAD:
634                 return 1;
635
636         case STMPE_BLOCK_GPIO:
637         default:
638                 return 0;
639         }
640 }
641
642 static struct stmpe_variant_info stmpe1601 = {
643         .name           = "stmpe1601",
644         .id_val         = 0x0210,
645         .id_mask        = 0xfff0,       /* at least 0x0210 and 0x0212 */
646         .num_gpios      = 16,
647         .af_bits        = 2,
648         .regs           = stmpe1601_regs,
649         .blocks         = stmpe1601_blocks,
650         .num_blocks     = ARRAY_SIZE(stmpe1601_blocks),
651         .num_irqs       = STMPE1601_NR_INTERNAL_IRQS,
652         .enable         = stmpe1601_enable,
653         .get_altfunc    = stmpe1601_get_altfunc,
654         .enable_autosleep       = stmpe1601_autosleep,
655 };
656
657 /*
658  * STMPE1801
659  */
660 static const u8 stmpe1801_regs[] = {
661         [STMPE_IDX_CHIP_ID]     = STMPE1801_REG_CHIP_ID,
662         [STMPE_IDX_ICR_LSB]     = STMPE1801_REG_INT_CTRL_LOW,
663         [STMPE_IDX_IER_LSB]     = STMPE1801_REG_INT_EN_MASK_LOW,
664         [STMPE_IDX_ISR_LSB]     = STMPE1801_REG_INT_STA_LOW,
665         [STMPE_IDX_GPMR_LSB]    = STMPE1801_REG_GPIO_MP_LOW,
666         [STMPE_IDX_GPSR_LSB]    = STMPE1801_REG_GPIO_SET_LOW,
667         [STMPE_IDX_GPCR_LSB]    = STMPE1801_REG_GPIO_CLR_LOW,
668         [STMPE_IDX_GPDR_LSB]    = STMPE1801_REG_GPIO_SET_DIR_LOW,
669         [STMPE_IDX_GPRER_LSB]   = STMPE1801_REG_GPIO_RE_LOW,
670         [STMPE_IDX_GPFER_LSB]   = STMPE1801_REG_GPIO_FE_LOW,
671         [STMPE_IDX_GPPUR_LSB]   = STMPE1801_REG_GPIO_PULL_UP_LOW,
672         [STMPE_IDX_IEGPIOR_LSB] = STMPE1801_REG_INT_EN_GPIO_MASK_LOW,
673         [STMPE_IDX_ISGPIOR_LSB] = STMPE1801_REG_INT_STA_GPIO_LOW,
674 };
675
676 static struct stmpe_variant_block stmpe1801_blocks[] = {
677         {
678                 .cell   = &stmpe_gpio_cell,
679                 .irq    = STMPE1801_IRQ_GPIOC,
680                 .block  = STMPE_BLOCK_GPIO,
681         },
682         {
683                 .cell   = &stmpe_keypad_cell,
684                 .irq    = STMPE1801_IRQ_KEYPAD,
685                 .block  = STMPE_BLOCK_KEYPAD,
686         },
687 };
688
689 static int stmpe1801_enable(struct stmpe *stmpe, unsigned int blocks,
690                             bool enable)
691 {
692         unsigned int mask = 0;
693         if (blocks & STMPE_BLOCK_GPIO)
694                 mask |= STMPE1801_MSK_INT_EN_GPIO;
695
696         if (blocks & STMPE_BLOCK_KEYPAD)
697                 mask |= STMPE1801_MSK_INT_EN_KPC;
698
699         return __stmpe_set_bits(stmpe, STMPE1801_REG_INT_EN_MASK_LOW, mask,
700                                 enable ? mask : 0);
701 }
702
703 static int stmpe1801_reset(struct stmpe *stmpe)
704 {
705         unsigned long timeout;
706         int ret = 0;
707
708         ret = __stmpe_set_bits(stmpe, STMPE1801_REG_SYS_CTRL,
709                 STMPE1801_MSK_SYS_CTRL_RESET, STMPE1801_MSK_SYS_CTRL_RESET);
710         if (ret < 0)
711                 return ret;
712
713         timeout = jiffies + msecs_to_jiffies(100);
714         while (time_before(jiffies, timeout)) {
715                 ret = __stmpe_reg_read(stmpe, STMPE1801_REG_SYS_CTRL);
716                 if (ret < 0)
717                         return ret;
718                 if (!(ret & STMPE1801_MSK_SYS_CTRL_RESET))
719                         return 0;
720                 usleep_range(100, 200);
721         }
722         return -EIO;
723 }
724
725 static struct stmpe_variant_info stmpe1801 = {
726         .name           = "stmpe1801",
727         .id_val         = STMPE1801_ID,
728         .id_mask        = 0xfff0,
729         .num_gpios      = 18,
730         .af_bits        = 0,
731         .regs           = stmpe1801_regs,
732         .blocks         = stmpe1801_blocks,
733         .num_blocks     = ARRAY_SIZE(stmpe1801_blocks),
734         .num_irqs       = STMPE1801_NR_INTERNAL_IRQS,
735         .enable         = stmpe1801_enable,
736         /* stmpe1801 do not have any gpio alternate function */
737         .get_altfunc    = NULL,
738 };
739
740 /*
741  * STMPE24XX
742  */
743
744 static const u8 stmpe24xx_regs[] = {
745         [STMPE_IDX_CHIP_ID]     = STMPE24XX_REG_CHIP_ID,
746         [STMPE_IDX_ICR_LSB]     = STMPE24XX_REG_ICR_LSB,
747         [STMPE_IDX_IER_LSB]     = STMPE24XX_REG_IER_LSB,
748         [STMPE_IDX_ISR_MSB]     = STMPE24XX_REG_ISR_MSB,
749         [STMPE_IDX_GPMR_LSB]    = STMPE24XX_REG_GPMR_LSB,
750         [STMPE_IDX_GPSR_LSB]    = STMPE24XX_REG_GPSR_LSB,
751         [STMPE_IDX_GPCR_LSB]    = STMPE24XX_REG_GPCR_LSB,
752         [STMPE_IDX_GPDR_LSB]    = STMPE24XX_REG_GPDR_LSB,
753         [STMPE_IDX_GPRER_LSB]   = STMPE24XX_REG_GPRER_LSB,
754         [STMPE_IDX_GPFER_LSB]   = STMPE24XX_REG_GPFER_LSB,
755         [STMPE_IDX_GPPUR_LSB]   = STMPE24XX_REG_GPPUR_LSB,
756         [STMPE_IDX_GPPDR_LSB]   = STMPE24XX_REG_GPPDR_LSB,
757         [STMPE_IDX_GPAFR_U_MSB] = STMPE24XX_REG_GPAFR_U_MSB,
758         [STMPE_IDX_IEGPIOR_LSB] = STMPE24XX_REG_IEGPIOR_LSB,
759         [STMPE_IDX_ISGPIOR_MSB] = STMPE24XX_REG_ISGPIOR_MSB,
760         [STMPE_IDX_GPEDR_MSB]   = STMPE24XX_REG_GPEDR_MSB,
761 };
762
763 static struct stmpe_variant_block stmpe24xx_blocks[] = {
764         {
765                 .cell   = &stmpe_gpio_cell,
766                 .irq    = STMPE24XX_IRQ_GPIOC,
767                 .block  = STMPE_BLOCK_GPIO,
768         },
769         {
770                 .cell   = &stmpe_keypad_cell,
771                 .irq    = STMPE24XX_IRQ_KEYPAD,
772                 .block  = STMPE_BLOCK_KEYPAD,
773         },
774 };
775
776 static int stmpe24xx_enable(struct stmpe *stmpe, unsigned int blocks,
777                             bool enable)
778 {
779         unsigned int mask = 0;
780
781         if (blocks & STMPE_BLOCK_GPIO)
782                 mask |= STMPE24XX_SYS_CTRL_ENABLE_GPIO;
783
784         if (blocks & STMPE_BLOCK_KEYPAD)
785                 mask |= STMPE24XX_SYS_CTRL_ENABLE_KPC;
786
787         return __stmpe_set_bits(stmpe, STMPE24XX_REG_SYS_CTRL, mask,
788                                 enable ? mask : 0);
789 }
790
791 static int stmpe24xx_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
792 {
793         switch (block) {
794         case STMPE_BLOCK_ROTATOR:
795                 return 2;
796
797         case STMPE_BLOCK_KEYPAD:
798                 return 1;
799
800         case STMPE_BLOCK_GPIO:
801         default:
802                 return 0;
803         }
804 }
805
806 static struct stmpe_variant_info stmpe2401 = {
807         .name           = "stmpe2401",
808         .id_val         = 0x0101,
809         .id_mask        = 0xffff,
810         .num_gpios      = 24,
811         .af_bits        = 2,
812         .regs           = stmpe24xx_regs,
813         .blocks         = stmpe24xx_blocks,
814         .num_blocks     = ARRAY_SIZE(stmpe24xx_blocks),
815         .num_irqs       = STMPE24XX_NR_INTERNAL_IRQS,
816         .enable         = stmpe24xx_enable,
817         .get_altfunc    = stmpe24xx_get_altfunc,
818 };
819
820 static struct stmpe_variant_info stmpe2403 = {
821         .name           = "stmpe2403",
822         .id_val         = 0x0120,
823         .id_mask        = 0xffff,
824         .num_gpios      = 24,
825         .af_bits        = 2,
826         .regs           = stmpe24xx_regs,
827         .blocks         = stmpe24xx_blocks,
828         .num_blocks     = ARRAY_SIZE(stmpe24xx_blocks),
829         .num_irqs       = STMPE24XX_NR_INTERNAL_IRQS,
830         .enable         = stmpe24xx_enable,
831         .get_altfunc    = stmpe24xx_get_altfunc,
832         .enable_autosleep       = stmpe1601_autosleep, /* same as stmpe1601 */
833 };
834
835 static struct stmpe_variant_info *stmpe_variant_info[STMPE_NBR_PARTS] = {
836         [STMPE610]      = &stmpe610,
837         [STMPE801]      = &stmpe801,
838         [STMPE811]      = &stmpe811,
839         [STMPE1601]     = &stmpe1601,
840         [STMPE1801]     = &stmpe1801,
841         [STMPE2401]     = &stmpe2401,
842         [STMPE2403]     = &stmpe2403,
843 };
844
845 /*
846  * These devices can be connected in a 'no-irq' configuration - the irq pin
847  * is not used and the device cannot interrupt the CPU. Here we only list
848  * devices which support this configuration - the driver will fail probing
849  * for any devices not listed here which are configured in this way.
850  */
851 static struct stmpe_variant_info *stmpe_noirq_variant_info[STMPE_NBR_PARTS] = {
852         [STMPE801]      = &stmpe801_noirq,
853 };
854
855 static irqreturn_t stmpe_irq(int irq, void *data)
856 {
857         struct stmpe *stmpe = data;
858         struct stmpe_variant_info *variant = stmpe->variant;
859         int num = DIV_ROUND_UP(variant->num_irqs, 8);
860         u8 israddr;
861         u8 isr[3];
862         int ret;
863         int i;
864
865         if (variant->id_val == STMPE801_ID) {
866                 int base = irq_create_mapping(stmpe->domain, 0);
867
868                 handle_nested_irq(base);
869                 return IRQ_HANDLED;
870         }
871
872         if (variant->id_val == STMPE1801_ID)
873                 israddr = stmpe->regs[STMPE_IDX_ISR_LSB];
874         else
875                 israddr = stmpe->regs[STMPE_IDX_ISR_MSB];
876
877         ret = stmpe_block_read(stmpe, israddr, num, isr);
878         if (ret < 0)
879                 return IRQ_NONE;
880
881         for (i = 0; i < num; i++) {
882                 int bank = num - i - 1;
883                 u8 status = isr[i];
884                 u8 clear;
885
886                 status &= stmpe->ier[bank];
887                 if (!status)
888                         continue;
889
890                 clear = status;
891                 while (status) {
892                         int bit = __ffs(status);
893                         int line = bank * 8 + bit;
894                         int nestedirq = irq_create_mapping(stmpe->domain, line);
895
896                         handle_nested_irq(nestedirq);
897                         status &= ~(1 << bit);
898                 }
899
900                 stmpe_reg_write(stmpe, israddr + i, clear);
901         }
902
903         return IRQ_HANDLED;
904 }
905
906 static void stmpe_irq_lock(struct irq_data *data)
907 {
908         struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
909
910         mutex_lock(&stmpe->irq_lock);
911 }
912
913 static void stmpe_irq_sync_unlock(struct irq_data *data)
914 {
915         struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
916         struct stmpe_variant_info *variant = stmpe->variant;
917         int num = DIV_ROUND_UP(variant->num_irqs, 8);
918         int i;
919
920         for (i = 0; i < num; i++) {
921                 u8 new = stmpe->ier[i];
922                 u8 old = stmpe->oldier[i];
923
924                 if (new == old)
925                         continue;
926
927                 stmpe->oldier[i] = new;
928                 stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_IER_LSB] - i, new);
929         }
930
931         mutex_unlock(&stmpe->irq_lock);
932 }
933
934 static void stmpe_irq_mask(struct irq_data *data)
935 {
936         struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
937         int offset = data->hwirq;
938         int regoffset = offset / 8;
939         int mask = 1 << (offset % 8);
940
941         stmpe->ier[regoffset] &= ~mask;
942 }
943
944 static void stmpe_irq_unmask(struct irq_data *data)
945 {
946         struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
947         int offset = data->hwirq;
948         int regoffset = offset / 8;
949         int mask = 1 << (offset % 8);
950
951         stmpe->ier[regoffset] |= mask;
952 }
953
954 static struct irq_chip stmpe_irq_chip = {
955         .name                   = "stmpe",
956         .irq_bus_lock           = stmpe_irq_lock,
957         .irq_bus_sync_unlock    = stmpe_irq_sync_unlock,
958         .irq_mask               = stmpe_irq_mask,
959         .irq_unmask             = stmpe_irq_unmask,
960 };
961
962 static int stmpe_irq_map(struct irq_domain *d, unsigned int virq,
963                                 irq_hw_number_t hwirq)
964 {
965         struct stmpe *stmpe = d->host_data;
966         struct irq_chip *chip = NULL;
967
968         if (stmpe->variant->id_val != STMPE801_ID)
969                 chip = &stmpe_irq_chip;
970
971         irq_set_chip_data(virq, stmpe);
972         irq_set_chip_and_handler(virq, chip, handle_edge_irq);
973         irq_set_nested_thread(virq, 1);
974         irq_set_noprobe(virq);
975
976         return 0;
977 }
978
979 static void stmpe_irq_unmap(struct irq_domain *d, unsigned int virq)
980 {
981                 irq_set_chip_and_handler(virq, NULL, NULL);
982                 irq_set_chip_data(virq, NULL);
983 }
984
985 static const struct irq_domain_ops stmpe_irq_ops = {
986         .map    = stmpe_irq_map,
987         .unmap  = stmpe_irq_unmap,
988         .xlate  = irq_domain_xlate_twocell,
989 };
990
991 static int stmpe_irq_init(struct stmpe *stmpe, struct device_node *np)
992 {
993         int base = 0;
994         int num_irqs = stmpe->variant->num_irqs;
995
996         stmpe->domain = irq_domain_add_simple(np, num_irqs, base,
997                                               &stmpe_irq_ops, stmpe);
998         if (!stmpe->domain) {
999                 dev_err(stmpe->dev, "Failed to create irqdomain\n");
1000                 return -ENOSYS;
1001         }
1002
1003         return 0;
1004 }
1005
1006 static int stmpe_chip_init(struct stmpe *stmpe)
1007 {
1008         unsigned int irq_trigger = stmpe->pdata->irq_trigger;
1009         int autosleep_timeout = stmpe->pdata->autosleep_timeout;
1010         struct stmpe_variant_info *variant = stmpe->variant;
1011         u8 icr = 0;
1012         unsigned int id;
1013         u8 data[2];
1014         int ret;
1015
1016         ret = stmpe_block_read(stmpe, stmpe->regs[STMPE_IDX_CHIP_ID],
1017                                ARRAY_SIZE(data), data);
1018         if (ret < 0)
1019                 return ret;
1020
1021         id = (data[0] << 8) | data[1];
1022         if ((id & variant->id_mask) != variant->id_val) {
1023                 dev_err(stmpe->dev, "unknown chip id: %#x\n", id);
1024                 return -EINVAL;
1025         }
1026
1027         dev_info(stmpe->dev, "%s detected, chip id: %#x\n", variant->name, id);
1028
1029         /* Disable all modules -- subdrivers should enable what they need. */
1030         ret = stmpe_disable(stmpe, ~0);
1031         if (ret)
1032                 return ret;
1033
1034         if (id == STMPE1801_ID) {
1035                 ret =  stmpe1801_reset(stmpe);
1036                 if (ret < 0)
1037                         return ret;
1038         }
1039
1040         if (stmpe->irq >= 0) {
1041                 if (id == STMPE801_ID)
1042                         icr = STMPE801_REG_SYS_CTRL_INT_EN;
1043                 else
1044                         icr = STMPE_ICR_LSB_GIM;
1045
1046                 /* STMPE801 doesn't support Edge interrupts */
1047                 if (id != STMPE801_ID) {
1048                         if (irq_trigger == IRQF_TRIGGER_FALLING ||
1049                                         irq_trigger == IRQF_TRIGGER_RISING)
1050                                 icr |= STMPE_ICR_LSB_EDGE;
1051                 }
1052
1053                 if (irq_trigger == IRQF_TRIGGER_RISING ||
1054                                 irq_trigger == IRQF_TRIGGER_HIGH) {
1055                         if (id == STMPE801_ID)
1056                                 icr |= STMPE801_REG_SYS_CTRL_INT_HI;
1057                         else
1058                                 icr |= STMPE_ICR_LSB_HIGH;
1059                 }
1060         }
1061
1062         if (stmpe->pdata->autosleep) {
1063                 ret = stmpe_autosleep(stmpe, autosleep_timeout);
1064                 if (ret)
1065                         return ret;
1066         }
1067
1068         return stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_ICR_LSB], icr);
1069 }
1070
1071 static int stmpe_add_device(struct stmpe *stmpe, const struct mfd_cell *cell)
1072 {
1073         return mfd_add_devices(stmpe->dev, stmpe->pdata->id, cell, 1,
1074                                NULL, 0, stmpe->domain);
1075 }
1076
1077 static int stmpe_devices_init(struct stmpe *stmpe)
1078 {
1079         struct stmpe_variant_info *variant = stmpe->variant;
1080         unsigned int platform_blocks = stmpe->pdata->blocks;
1081         int ret = -EINVAL;
1082         int i, j;
1083
1084         for (i = 0; i < variant->num_blocks; i++) {
1085                 struct stmpe_variant_block *block = &variant->blocks[i];
1086
1087                 if (!(platform_blocks & block->block))
1088                         continue;
1089
1090                 for (j = 0; j < block->cell->num_resources; j++) {
1091                         struct resource *res =
1092                                 (struct resource *) &block->cell->resources[j];
1093
1094                         /* Dynamically fill in a variant's IRQ. */
1095                         if (res->flags & IORESOURCE_IRQ)
1096                                 res->start = res->end = block->irq + j;
1097                 }
1098
1099                 platform_blocks &= ~block->block;
1100                 ret = stmpe_add_device(stmpe, block->cell);
1101                 if (ret)
1102                         return ret;
1103         }
1104
1105         if (platform_blocks)
1106                 dev_warn(stmpe->dev,
1107                          "platform wants blocks (%#x) not present on variant",
1108                          platform_blocks);
1109
1110         return ret;
1111 }
1112
1113 static void stmpe_of_probe(struct stmpe_platform_data *pdata,
1114                            struct device_node *np)
1115 {
1116         struct device_node *child;
1117
1118         pdata->id = of_alias_get_id(np, "stmpe-i2c");
1119         if (pdata->id < 0)
1120                 pdata->id = -1;
1121
1122         pdata->irq_gpio = of_get_named_gpio_flags(np, "irq-gpio", 0,
1123                                 &pdata->irq_trigger);
1124         if (gpio_is_valid(pdata->irq_gpio))
1125                 pdata->irq_over_gpio = 1;
1126         else
1127                 pdata->irq_trigger = IRQF_TRIGGER_NONE;
1128
1129         of_property_read_u32(np, "st,autosleep-timeout",
1130                         &pdata->autosleep_timeout);
1131
1132         pdata->autosleep = (pdata->autosleep_timeout) ? true : false;
1133
1134         for_each_child_of_node(np, child) {
1135                 if (!strcmp(child->name, "stmpe_gpio")) {
1136                         pdata->blocks |= STMPE_BLOCK_GPIO;
1137                 } else if (!strcmp(child->name, "stmpe_keypad")) {
1138                         pdata->blocks |= STMPE_BLOCK_KEYPAD;
1139                 } else if (!strcmp(child->name, "stmpe_touchscreen")) {
1140                         pdata->blocks |= STMPE_BLOCK_TOUCHSCREEN;
1141                 } else if (!strcmp(child->name, "stmpe_adc")) {
1142                         pdata->blocks |= STMPE_BLOCK_ADC;
1143                 } else if (!strcmp(child->name, "stmpe_pwm")) {
1144                         pdata->blocks |= STMPE_BLOCK_PWM;
1145                 } else if (!strcmp(child->name, "stmpe_rotator")) {
1146                         pdata->blocks |= STMPE_BLOCK_ROTATOR;
1147                 }
1148         }
1149 }
1150
1151 /* Called from client specific probe routines */
1152 int stmpe_probe(struct stmpe_client_info *ci, enum stmpe_partnum partnum)
1153 {
1154         struct stmpe_platform_data *pdata = dev_get_platdata(ci->dev);
1155         struct device_node *np = ci->dev->of_node;
1156         struct stmpe *stmpe;
1157         int ret;
1158
1159         if (!pdata) {
1160                 if (!np)
1161                         return -EINVAL;
1162
1163                 pdata = devm_kzalloc(ci->dev, sizeof(*pdata), GFP_KERNEL);
1164                 if (!pdata)
1165                         return -ENOMEM;
1166
1167                 stmpe_of_probe(pdata, np);
1168
1169                 if (of_find_property(np, "interrupts", NULL) == NULL)
1170                         ci->irq = -1;
1171         }
1172
1173         stmpe = devm_kzalloc(ci->dev, sizeof(struct stmpe), GFP_KERNEL);
1174         if (!stmpe)
1175                 return -ENOMEM;
1176
1177         mutex_init(&stmpe->irq_lock);
1178         mutex_init(&stmpe->lock);
1179
1180         stmpe->dev = ci->dev;
1181         stmpe->client = ci->client;
1182         stmpe->pdata = pdata;
1183         stmpe->ci = ci;
1184         stmpe->partnum = partnum;
1185         stmpe->variant = stmpe_variant_info[partnum];
1186         stmpe->regs = stmpe->variant->regs;
1187         stmpe->num_gpios = stmpe->variant->num_gpios;
1188         stmpe->vcc = devm_regulator_get_optional(ci->dev, "vcc");
1189         if (!IS_ERR(stmpe->vcc)) {
1190                 ret = regulator_enable(stmpe->vcc);
1191                 if (ret)
1192                         dev_warn(ci->dev, "failed to enable VCC supply\n");
1193         }
1194         stmpe->vio = devm_regulator_get_optional(ci->dev, "vio");
1195         if (!IS_ERR(stmpe->vio)) {
1196                 ret = regulator_enable(stmpe->vio);
1197                 if (ret)
1198                         dev_warn(ci->dev, "failed to enable VIO supply\n");
1199         }
1200         dev_set_drvdata(stmpe->dev, stmpe);
1201
1202         if (ci->init)
1203                 ci->init(stmpe);
1204
1205         if (pdata->irq_over_gpio) {
1206                 ret = devm_gpio_request_one(ci->dev, pdata->irq_gpio,
1207                                 GPIOF_DIR_IN, "stmpe");
1208                 if (ret) {
1209                         dev_err(stmpe->dev, "failed to request IRQ GPIO: %d\n",
1210                                         ret);
1211                         return ret;
1212                 }
1213
1214                 stmpe->irq = gpio_to_irq(pdata->irq_gpio);
1215         } else {
1216                 stmpe->irq = ci->irq;
1217         }
1218
1219         if (stmpe->irq < 0) {
1220                 /* use alternate variant info for no-irq mode, if supported */
1221                 dev_info(stmpe->dev,
1222                         "%s configured in no-irq mode by platform data\n",
1223                         stmpe->variant->name);
1224                 if (!stmpe_noirq_variant_info[stmpe->partnum]) {
1225                         dev_err(stmpe->dev,
1226                                 "%s does not support no-irq mode!\n",
1227                                 stmpe->variant->name);
1228                         return -ENODEV;
1229                 }
1230                 stmpe->variant = stmpe_noirq_variant_info[stmpe->partnum];
1231         } else if (pdata->irq_trigger == IRQF_TRIGGER_NONE) {
1232                 pdata->irq_trigger = irq_get_trigger_type(stmpe->irq);
1233         }
1234
1235         ret = stmpe_chip_init(stmpe);
1236         if (ret)
1237                 return ret;
1238
1239         if (stmpe->irq >= 0) {
1240                 ret = stmpe_irq_init(stmpe, np);
1241                 if (ret)
1242                         return ret;
1243
1244                 ret = devm_request_threaded_irq(ci->dev, stmpe->irq, NULL,
1245                                 stmpe_irq, pdata->irq_trigger | IRQF_ONESHOT,
1246                                 "stmpe", stmpe);
1247                 if (ret) {
1248                         dev_err(stmpe->dev, "failed to request IRQ: %d\n",
1249                                         ret);
1250                         return ret;
1251                 }
1252         }
1253
1254         ret = stmpe_devices_init(stmpe);
1255         if (!ret)
1256                 return 0;
1257
1258         dev_err(stmpe->dev, "failed to add children\n");
1259         mfd_remove_devices(stmpe->dev);
1260
1261         return ret;
1262 }
1263
1264 int stmpe_remove(struct stmpe *stmpe)
1265 {
1266         if (!IS_ERR(stmpe->vio))
1267                 regulator_disable(stmpe->vio);
1268         if (!IS_ERR(stmpe->vcc))
1269                 regulator_disable(stmpe->vcc);
1270
1271         mfd_remove_devices(stmpe->dev);
1272
1273         return 0;
1274 }
1275
1276 #ifdef CONFIG_PM
1277 static int stmpe_suspend(struct device *dev)
1278 {
1279         struct stmpe *stmpe = dev_get_drvdata(dev);
1280
1281         if (stmpe->irq >= 0 && device_may_wakeup(dev))
1282                 enable_irq_wake(stmpe->irq);
1283
1284         return 0;
1285 }
1286
1287 static int stmpe_resume(struct device *dev)
1288 {
1289         struct stmpe *stmpe = dev_get_drvdata(dev);
1290
1291         if (stmpe->irq >= 0 && device_may_wakeup(dev))
1292                 disable_irq_wake(stmpe->irq);
1293
1294         return 0;
1295 }
1296
1297 const struct dev_pm_ops stmpe_dev_pm_ops = {
1298         .suspend        = stmpe_suspend,
1299         .resume         = stmpe_resume,
1300 };
1301 #endif