2 * wm831x-spi.c -- SPI access for Wolfson WM831x PMICs
4 * Copyright 2009,2010 Wolfson Microelectronics PLC.
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/spi/spi.h>
18 #include <linux/gpio.h>
19 #include <linux/input.h>
20 #include <linux/platform_device.h>
22 #include <linux/mfd/wm831x/core.h>
23 #include <linux/mfd/wm831x/pdata.h>
24 #include <linux/mfd/wm831x/irq.h>
25 #include <linux/mfd/wm831x/auxadc.h>
26 #include <linux/mfd/wm831x/otp.h>
27 #include <linux/mfd/wm831x/regulator.h>
28 #include <linux/mfd/wm831x/pmu.h>
33 #define WM831X_BUCKV_MAX_SELECTOR 0x68
34 #define WM831X_BUCKP_MAX_SELECTOR 0x66
36 #define WM831X_DCDC_MODE_FAST 0
37 #define WM831X_DCDC_MODE_NORMAL 1
38 #define WM831X_DCDC_MODE_IDLE 2
39 #define WM831X_DCDC_MODE_STANDBY 3
41 //#define WM831X_DCDC_MAX_NAME 6
43 /* Register offsets in control block */
44 #define WM831X_DCDC_CONTROL_1 0
45 #define WM831X_DCDC_CONTROL_2 1
46 #define WM831X_DCDC_ON_CONFIG 2
47 #define WM831X_DCDC_SLEEP_CONTROL 3
48 #define WM831X_DCDC_DVS_CONTROL 4
51 #define WM831X_LDO_CONTROL 0
52 #define WM831X_LDO_ON_CONTROL 1
53 #define WM831X_LDO_SLEEP_CONTROL 2
55 #define WM831X_ALIVE_LDO_ON_CONTROL 0
56 #define WM831X_ALIVE_LDO_SLEEP_CONTROL 1
58 static int wm831x_spi_read_device(struct wm831x *wm831x, unsigned short reg,
59 int bytes, void *dest)
65 /* Go register at a time */
66 for (r = reg; r < reg + (bytes / 2); r++) {
67 tx_val = cpu_to_be16(r | 0x8000);
69 ret = spi_write_then_read(wm831x->control_data,
70 (u8 *)&tx_val, 2, (u8 *)d, 2);
74 //*d = be16_to_cpu(*d);
82 static int wm831x_spi_write_device(struct wm831x *wm831x, unsigned short reg,
85 struct spi_device *spi = wm831x->control_data;
90 /* Go register at a time */
91 for (r = reg; r < reg + (bytes / 2); r++) {
92 data[0] = cpu_to_be16(r);
94 //printk("%s:reg=0x%x,data=0x%x\n",__FUNCTION__,be16_to_cpu(data[0]),be16_to_cpu(data[1]));
95 ret = spi_write(spi, (char *)&data, sizeof(data));
104 int wm831x_isinkv_values[WM831X_ISINK_MAX_ISEL + 1] = {
162 EXPORT_SYMBOL_GPL(wm831x_isinkv_values);
164 static int wm831x_reg_locked(struct wm831x *wm831x, unsigned short reg)
170 case WM831X_WATCHDOG:
171 case WM831X_DC4_CONTROL:
172 case WM831X_ON_PIN_CONTROL:
173 case WM831X_BACKUP_CHARGER_CONTROL:
174 case WM831X_CHARGER_CONTROL_1:
175 case WM831X_CHARGER_CONTROL_2:
184 * wm831x_reg_unlock: Unlock user keyed registers
186 * The WM831x has a user key preventing writes to particularly
187 * critical registers. This function locks those registers,
188 * allowing writes to them.
190 void wm831x_reg_lock(struct wm831x *wm831x)
194 ret = wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0);
196 dev_vdbg(wm831x->dev, "Registers locked\n");
198 mutex_lock(&wm831x->io_lock);
199 WARN_ON(wm831x->locked);
201 mutex_unlock(&wm831x->io_lock);
203 dev_err(wm831x->dev, "Failed to lock registers: %d\n", ret);
207 EXPORT_SYMBOL_GPL(wm831x_reg_lock);
210 * wm831x_reg_unlock: Unlock user keyed registers
212 * The WM831x has a user key preventing writes to particularly
213 * critical registers. This function locks those registers,
214 * preventing spurious writes.
216 int wm831x_reg_unlock(struct wm831x *wm831x)
220 /* 0x9716 is the value required to unlock the registers */
221 ret = wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0x9716);
223 dev_vdbg(wm831x->dev, "Registers unlocked\n");
225 mutex_lock(&wm831x->io_lock);
226 WARN_ON(!wm831x->locked);
228 mutex_unlock(&wm831x->io_lock);
233 EXPORT_SYMBOL_GPL(wm831x_reg_unlock);
235 static int wm831x_read(struct wm831x *wm831x, unsigned short reg,
236 int bytes, void *dest)
244 ret = wm831x->read_dev(wm831x, reg, bytes, dest);
248 for (i = 0; i < bytes / 2; i++) {
249 buf[i] = be16_to_cpu(buf[i]);
251 dev_vdbg(wm831x->dev, "Read %04x from R%d(0x%x)\n",
252 buf[i], reg + i, reg + i);
259 * wm831x_reg_read: Read a single WM831x register.
261 * @wm831x: Device to read from.
262 * @reg: Register to read.
264 int wm831x_reg_read(struct wm831x *wm831x, unsigned short reg)
269 mutex_lock(&wm831x->io_lock);
271 ret = wm831x_read(wm831x, reg, 2, &val);
273 mutex_unlock(&wm831x->io_lock);
280 EXPORT_SYMBOL_GPL(wm831x_reg_read);
283 * wm831x_bulk_read: Read multiple WM831x registers
285 * @wm831x: Device to read from
286 * @reg: First register
287 * @count: Number of registers
288 * @buf: Buffer to fill.
290 int wm831x_bulk_read(struct wm831x *wm831x, unsigned short reg,
295 mutex_lock(&wm831x->io_lock);
297 ret = wm831x_read(wm831x, reg, count * 2, buf);
299 mutex_unlock(&wm831x->io_lock);
303 EXPORT_SYMBOL_GPL(wm831x_bulk_read);
305 static int wm831x_write(struct wm831x *wm831x, unsigned short reg,
306 int bytes, void *src)
314 for (i = 0; i < bytes / 2; i++) {
315 if (wm831x_reg_locked(wm831x, reg))
318 dev_vdbg(wm831x->dev, "Write %04x to R%d(0x%x)\n",
319 buf[i], reg + i, reg + i);
321 buf[i] = cpu_to_be16(buf[i]);
324 return wm831x->write_dev(wm831x, reg, bytes, src);
328 * wm831x_reg_write: Write a single WM831x register.
330 * @wm831x: Device to write to.
331 * @reg: Register to write to.
332 * @val: Value to write.
334 int wm831x_reg_write(struct wm831x *wm831x, unsigned short reg,
339 mutex_lock(&wm831x->io_lock);
341 ret = wm831x_write(wm831x, reg, 2, &val);
343 mutex_unlock(&wm831x->io_lock);
347 EXPORT_SYMBOL_GPL(wm831x_reg_write);
350 static int wm831x_init(struct wm831x *wm831x)
354 wm831x_reg_write(wm831x, WM831X_POWER_STATE, 0x8804); //900ma
356 /*wm831x_irq_init:irq=252,180 mask irq*/
357 wm831x_reg_write(wm831x, 0x4019, 0xffff);
358 wm831x_reg_write(wm831x, 0x401a, 0xffff);
359 wm831x_reg_write(wm831x, 0x401b, 0xffff);
360 wm831x_reg_write(wm831x, 0x401c, 0xffff);
361 wm831x_reg_write(wm831x, 0x401d, 0xffff);
362 wm831x_reg_write(wm831x, 0x4018, 0xffff);//wm831x_reg_write(wm831x, 0x4018, 0x0);
363 wm831x_reg_write(wm831x, 0x4019, 0xffff);
365 /*regulator: DCDC1: 600 <--> 1800 mV */
366 //wm831x_reg_write(wm831x, 0x401c, 0xfffe);
367 //wm831x_reg_write(wm831x, 0x401c, 0xfefe);
369 /*regulator: DCDC2: 600 <--> 1800 mV*/
370 //wm831x_reg_write(wm831x, 0x401c, 0xfefc);
371 //wm831x_reg_write(wm831x, 0x401c, 0xfcfc);
373 /* regulator: DCDC3: 850 <--> 3400 mV */
374 //wm831x_reg_write(wm831x, 0x401c, 0xfcf8);
376 /*regulator: DCDC4: 0 <--> 30000 mV */
377 //wm831x_reg_write(wm831x, 0x401c, 0xfcf0);
379 /*wm831x_isink_enable*/
380 wm831x_reg_write(wm831x, 0x404e, 0x8500);
381 wm831x_reg_write(wm831x, 0x404e, 0xc500);
383 /*wm831x_isink_probe:line=203,irq=220*/
384 //wm831x_reg_write(wm831x, 0x401a, 0xffbf);
385 //wm831x_reg_write(wm831x, 0x401a, 0xff3f);
388 /*regulator: LDO1: 900 <--> 3300 mV */
389 //wm831x_reg_write(wm831x, 0x401b, 0xfffe);
391 /*regulator: LDO2: 900 <--> 3300 mV*/
392 //wm831x_reg_write(wm831x, 0x401b, 0xfffc);
394 /*regulator: LDO3: 900 <--> 3300 mV */
395 //wm831x_reg_write(wm831x, 0x401b, 0xfff8);
397 /*regulator: LDO4: 900 <--> 3300 mV */
398 //wm831x_reg_write(wm831x, 0x401b, 0xfff0);
400 /* regulator: LDO5: 900 <--> 3300 mV */
401 //wm831x_reg_write(wm831x, 0x401b, 0xffe0);
403 /*regulator: LDO6: 900 <--> 3300 mV */
404 //wm831x_reg_write(wm831x, 0x401b, 0xffc0);
406 /*regulator: LDO7: 1000 <--> 3500 mV */
407 //wm831x_reg_write(wm831x, 0x401b, 0xff80);
409 /*regulator: LDO8: 1000 <--> 3500 mV */
410 //wm831x_reg_write(wm831x, 0x401b, 0xff00);
412 /*regulator: LDO9: 1000 <--> 3500 mV */
413 //wm831x_reg_write(wm831x, 0x401b, 0xfe00);
415 /*regulator: LDO10: 1000 <--> 3500 mV */
416 //wm831x_reg_write(wm831x, 0x401b, 0xfc00);
418 /*regulator: LDO11: 1200 <--> 1550 mV */
419 wm831x_reg_write(wm831x, 0x4008, 0x9716);
420 wm831x_reg_write(wm831x, 0x4006, 0x8463);
422 /*wm831x_post_init set dcdc3=3000000mV end*/
423 wm831x_reg_write(wm831x, 0x4051, 0xfa49);
424 wm831x_reg_write(wm831x, 0x4062, 0x2156);
427 /*wm831x_post_init set ldo10=3000000mV end*/
428 wm831x_reg_write(wm831x, 0x4084, 0x201a);
430 /*wm831x_post_init set dcdc2=1300000mV end8*/
431 wm831x_reg_write(wm831x, 0x405d, 0x4140);
433 /* wm831x_post_init set dcdc1=1800000mV end*/
434 wm831x_reg_write(wm831x, 0x4058, 0x6168);
436 /*wm831x_post_init set ldo1=1800000mV end*/
437 wm831x_reg_write(wm831x, 0x4069, 0x6010);
439 /*wm831x_post_init set ldo4=2500000mV end*/
440 wm831x_reg_write(wm831x, 0x4072, 0x8017);
442 /*wm831x_post_init set ldo7=3300000mV end*/
443 wm831x_reg_write(wm831x, 0x407b, 0xa01d);
445 /*wm831x_post_init set dcdc4=-22mV end*/
446 wm831x_reg_write(wm831x, 0x4050, 0xf);
448 /*wm831x_post_init set ldo2=3000000mV end*/
449 wm831x_reg_write(wm831x, 0x406c, 0x1c);
450 wm831x_reg_write(wm831x, 0x4051, 0x24b);
452 /*wm831x_post_init set ldo3=1800000mV end*/
453 wm831x_reg_write(wm831x, 0x406f, 0x10);
454 wm831x_reg_write(wm831x, 0x4051, 0x24f);
456 /*wm831x_post_init set ldo5=3000000mV end*/
457 wm831x_reg_write(wm831x, 0x4075, 0x1c);
458 wm831x_reg_write(wm831x, 0x4051, 0x25f);
460 /*wm831x_post_init set ldo6=2800000mV end*/
461 wm831x_reg_write(wm831x, 0x4078, 0x1a);
462 wm831x_reg_write(wm831x, 0x4051, 0x27f);
464 /*wm831x_post_init set ldo8=1200000mV end*/
465 wm831x_reg_write(wm831x, 0x407e, 0x4);
466 wm831x_reg_write(wm831x, 0x4051, 0x2ff);
468 /*wm831x_post_init set ldo9=3000000mV end*/
469 wm831x_reg_write(wm831x, 0x4081, 0x1a);
470 wm831x_reg_write(wm831x, 0x4051, 0x3ff);
472 wm831x_reg_write(wm831x, 0x4008, 0x0);
474 wm831x_reg_write(wm831x, 0x4008, 0x9716);
475 wm831x_reg_write(wm831x, 0x4064, 0x104);
476 wm831x_reg_write(wm831x, 0x4008, 0x0);
477 wm831x_reg_write(wm831x, 0x4050, 0x7);
479 /* backlight brightness=255*/
480 wm831x_reg_write(wm831x, 0x404e, 0xc500);
481 wm831x_reg_write(wm831x, 0x4050, 0xf);
482 wm831x_reg_write(wm831x, 0x404e, 0xc535);
483 wm831x_reg_write(wm831x, 0x404e, 0xc535);
486 /*wm831x-rtc wm831x-rtc: rtc core: registered wm831x as rtc0*/
487 //wm831x_reg_write(wm831x, 0x4019, 0xeef7);
488 //wm831x_reg_write(wm831x, 0x4019, 0xeef3);
490 /*wm831x_power_probe:wm831x_power initialized*/
491 wm831x_reg_write(wm831x, 0x4008, 0x9716);
492 wm831x_reg_write(wm831x, 0x404b, 0x8812);
494 wm831x_reg_write(wm831x, 0x4008, 0x0);
495 wm831x_reg_write(wm831x, 0x4008, 0x9716);
496 wm831x_reg_write(wm831x, 0x4048, 0x9c21);
498 wm831x_reg_write(wm831x, 0x4048, 0x9c21);
500 wm831x_reg_write(wm831x, 0x4049, 0x44ff);
501 wm831x_reg_write(wm831x, 0x4001, 0x57);
502 wm831x_reg_write(wm831x, 0x4008, 0x0);
503 //wm831x_reg_write(wm831x, 0x4019, 0x6ef3);
504 //wm831x_reg_write(wm831x, 0x4019, 0x2ef3);
506 /*device-mapper: uevent: version 1.0.3*/
507 wm831x_reg_write(wm831x, 0x402e, 0x8000);
508 wm831x_reg_write(wm831x, 0x4014, 0x8);
509 wm831x_reg_write(wm831x, 0x402f, 0x400);
510 wm831x_reg_write(wm831x, 0x402e, 0xc000);
512 /*gpu: power on... done!*/
513 wm831x_reg_write(wm831x, 0x402e, 0x0);
514 wm831x_reg_write(wm831x, 0x4011, 0x2100);
515 wm831x_reg_write(wm831x, 0x402e, 0x8000);
516 wm831x_reg_write(wm831x, 0x402f, 0x200);
517 wm831x_reg_write(wm831x, 0x402e, 0xc000);
520 /*wm831x_isink_is_enabled:line=85*/
521 /*wm831x-rtc wm831x-rtc: setting system clock to 1970-01-02 04:18:35 UTC (101915)*/
522 wm831x_reg_write(wm831x, 0x402e, 0x0);
523 wm831x_reg_write(wm831x, 0x4011, 0x100);
525 wm831x_reg_write(wm831x, 0x402e, 0x8000);
526 wm831x_reg_write(wm831x, 0x402f, 0x100);
527 wm831x_reg_write(wm831x, 0x402e, 0xc000);
528 wm831x_reg_write(wm831x, 0x4011, 0x100);
529 wm831x_reg_write(wm831x, 0x402e, 0x0);
531 printk("%s\n",__FUNCTION__);
535 extern void rk29_send_power_key(int state);
536 static int gNumInt = 0, gNumTimer = 0;
537 static struct timer_list irq_timer;
538 static struct wm831x *gwm831x;
540 void wm831x_power_off(void)
542 wm831x_reg_write(gwm831x, WM831X_POWER_STATE, 0);//power off
545 static void wm831x_irq_timer(unsigned long data)
547 struct wm831x *wm831x = (struct wm831x *)data;
548 int pin = irq_to_gpio(wm831x->irq);
552 if(gpio_get_value(pin) > 0)
559 rk29_send_power_key(0);
565 irq_timer.expires = jiffies + msecs_to_jiffies(20);
566 add_timer(&irq_timer);
570 static void wm831x_irq_worker(struct work_struct *work)
572 struct wm831x *wm831x = container_of(work, struct wm831x, irq_work);
573 wm831x_reg_write(wm831x, WM831X_INTERRUPT_STATUS_1, 0xffff);//clear all intterupt
575 rk29_send_power_key(1);
576 enable_irq(wm831x->irq);
577 wake_unlock(&wm831x->irq_wake);
578 //printk("%s,irq=%d\n",__FUNCTION__,wm831x->irq);
581 static irqreturn_t wm831x_irq_thread(int irq, void *data)
583 struct wm831x *wm831x = data;
585 disable_irq_nosync(irq);
586 wake_lock(&wm831x->irq_wake);
587 queue_work(wm831x->irq_wq, &wm831x->irq_work);
592 static int __devinit wm831x_spi_probe(struct spi_device *spi)
594 struct wm831x *wm831x;
595 enum wm831x_parent type;
598 /* Currently SPI support for ID tables is unmerged, we're faking it */
599 if (strcmp(spi->modalias, "wm8310") == 0)
601 else if (strcmp(spi->modalias, "wm8311") == 0)
603 else if (strcmp(spi->modalias, "wm8312") == 0)
605 else if (strcmp(spi->modalias, "wm8320") == 0)
607 else if (strcmp(spi->modalias, "wm8321") == 0)
609 else if (strcmp(spi->modalias, "wm8325") == 0)
612 dev_err(&spi->dev, "Unknown device type\n");
616 wm831x = kzalloc(sizeof(struct wm831x), GFP_KERNEL);
620 spi->bits_per_word = 16;
621 spi->mode = SPI_MODE_0;
624 ret = gpio_request(gpio, "wm831x");
626 printk( "failed to request rk gpio irq for wm831x \n");
629 gpio_pull_updown(gpio, GPIOPullUp);
631 printk("failed to pull up gpio irq for wm831x \n");
634 irq = gpio_to_irq(gpio);
636 dev_set_drvdata(&spi->dev, wm831x);
637 wm831x->dev = &spi->dev;
638 wm831x->control_data = spi;
639 wm831x->read_dev = wm831x_spi_read_device;
640 wm831x->write_dev = wm831x_spi_write_device;
642 mutex_init(&wm831x->io_lock);
646 wm831x->irq_wq = create_singlethread_workqueue("wm831x-irq");
647 if (!wm831x->irq_wq) {
648 dev_err(wm831x->dev, "Failed to allocate IRQ worker\n");
652 INIT_WORK(&wm831x->irq_work, wm831x_irq_worker);
653 wake_lock_init(&wm831x->irq_wake, WAKE_LOCK_SUSPEND, "wm831x_irq_wake");
655 ret = request_threaded_irq(irq, wm831x_irq_thread, NULL,
659 dev_err(wm831x->dev, "Failed to request IRQ %d: %d\n",
664 enable_irq_wake(irq); // so wm831x irq can wake up system
665 /* only support on intterupt */
666 wm831x_reg_write(wm831x, WM831X_SYSTEM_INTERRUPTS_MASK, 0xefff);
667 wm831x_reg_write(wm831x, WM831X_INTERRUPT_STATUS_1_MASK, 0xefff);
669 setup_timer(&irq_timer, wm831x_irq_timer, (unsigned long)wm831x);
670 irq_timer.expires = jiffies+2000;
671 add_timer(&irq_timer);
674 //return wm831x_device_init(wm831x, type, irq);
677 static int __devexit wm831x_spi_remove(struct spi_device *spi)
679 struct wm831x *wm831x = dev_get_drvdata(&spi->dev);
681 //wm831x_device_exit(wm831x);
686 static int wm831x_spi_suspend(struct spi_device *spi, pm_message_t m)
688 struct wm831x *wm831x = dev_get_drvdata(&spi->dev);
690 //return wm831x_device_suspend(wm831x);
693 static int wm831x_spi_resume(struct spi_device *spi)
698 static struct spi_driver wm8310_spi_driver = {
701 .bus = &spi_bus_type,
702 .owner = THIS_MODULE,
704 .probe = wm831x_spi_probe,
705 .remove = __devexit_p(wm831x_spi_remove),
706 .suspend = wm831x_spi_suspend,
707 .resume = wm831x_spi_resume,
710 static struct spi_driver wm8311_spi_driver = {
713 .bus = &spi_bus_type,
714 .owner = THIS_MODULE,
716 .probe = wm831x_spi_probe,
717 .remove = __devexit_p(wm831x_spi_remove),
718 .suspend = wm831x_spi_suspend,
721 static struct spi_driver wm8312_spi_driver = {
724 .bus = &spi_bus_type,
725 .owner = THIS_MODULE,
727 .probe = wm831x_spi_probe,
728 .remove = __devexit_p(wm831x_spi_remove),
729 .suspend = wm831x_spi_suspend,
732 static struct spi_driver wm8320_spi_driver = {
735 .bus = &spi_bus_type,
736 .owner = THIS_MODULE,
738 .probe = wm831x_spi_probe,
739 .remove = __devexit_p(wm831x_spi_remove),
740 .suspend = wm831x_spi_suspend,
743 static struct spi_driver wm8321_spi_driver = {
746 .bus = &spi_bus_type,
747 .owner = THIS_MODULE,
749 .probe = wm831x_spi_probe,
750 .remove = __devexit_p(wm831x_spi_remove),
751 .suspend = wm831x_spi_suspend,
754 static struct spi_driver wm8325_spi_driver = {
757 .bus = &spi_bus_type,
758 .owner = THIS_MODULE,
760 .probe = wm831x_spi_probe,
761 .remove = __devexit_p(wm831x_spi_remove),
762 .suspend = wm831x_spi_suspend,
765 static int __init wm831x_spi_init(void)
769 ret = spi_register_driver(&wm8310_spi_driver);
771 pr_err("Failed to register WM8310 SPI driver: %d\n", ret);
773 ret = spi_register_driver(&wm8311_spi_driver);
775 pr_err("Failed to register WM8311 SPI driver: %d\n", ret);
777 ret = spi_register_driver(&wm8312_spi_driver);
779 pr_err("Failed to register WM8312 SPI driver: %d\n", ret);
781 ret = spi_register_driver(&wm8320_spi_driver);
783 pr_err("Failed to register WM8320 SPI driver: %d\n", ret);
785 ret = spi_register_driver(&wm8321_spi_driver);
787 pr_err("Failed to register WM8321 SPI driver: %d\n", ret);
789 ret = spi_register_driver(&wm8325_spi_driver);
791 pr_err("Failed to register WM8325 SPI driver: %d\n", ret);
795 subsys_initcall(wm831x_spi_init);
797 static void __exit wm831x_spi_exit(void)
799 spi_unregister_driver(&wm8325_spi_driver);
800 spi_unregister_driver(&wm8321_spi_driver);
801 spi_unregister_driver(&wm8320_spi_driver);
802 spi_unregister_driver(&wm8312_spi_driver);
803 spi_unregister_driver(&wm8311_spi_driver);
804 spi_unregister_driver(&wm8310_spi_driver);
806 module_exit(wm831x_spi_exit);
808 MODULE_DESCRIPTION("SPI support for WM831x/2x AudioPlus PMICs");
809 MODULE_LICENSE("GPL");
810 MODULE_AUTHOR("Mark Brown");