2 * IBM Accelerator Family 'GenWQE'
4 * (C) Copyright IBM Corp. 2013
6 * Author: Frank Haverkamp <haver@linux.vnet.ibm.com>
7 * Author: Joerg-Stephan Vogt <jsvogt@de.ibm.com>
8 * Author: Michael Jung <mijung@de.ibm.com>
9 * Author: Michael Ruettger <michael@ibmra.de>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License (version 2 only)
13 * as published by the Free Software Foundation.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
22 * Module initialization and PCIe setup. Card health monitoring and
23 * recovery functionality. Character device creation and deletion are
24 * controlled from here.
27 #include <linux/module.h>
28 #include <linux/types.h>
29 #include <linux/pci.h>
30 #include <linux/err.h>
31 #include <linux/aer.h>
32 #include <linux/string.h>
33 #include <linux/sched.h>
34 #include <linux/wait.h>
35 #include <linux/delay.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/module.h>
38 #include <linux/notifier.h>
39 #include <linux/device.h>
40 #include <linux/log2.h>
42 #include "card_base.h"
43 #include "card_ddcb.h"
45 MODULE_AUTHOR("Frank Haverkamp <haver@linux.vnet.ibm.com>");
46 MODULE_AUTHOR("Michael Ruettger <michael@ibmra.de>");
47 MODULE_AUTHOR("Joerg-Stephan Vogt <jsvogt@de.ibm.com>");
48 MODULE_AUTHOR("Michal Jung <mijung@de.ibm.com>");
50 MODULE_DESCRIPTION("GenWQE Card");
51 MODULE_VERSION(DRV_VERS_STRING);
52 MODULE_LICENSE("GPL");
54 static char genwqe_driver_name[] = GENWQE_DEVNAME;
55 static struct class *class_genwqe;
56 static struct dentry *debugfs_genwqe;
57 static struct genwqe_dev *genwqe_devices[GENWQE_CARD_NO_MAX];
59 /* PCI structure for identifying device by PCI vendor and device ID */
60 static const struct pci_device_id genwqe_device_table[] = {
61 { .vendor = PCI_VENDOR_ID_IBM,
62 .device = PCI_DEVICE_GENWQE,
63 .subvendor = PCI_SUBVENDOR_ID_IBM,
64 .subdevice = PCI_SUBSYSTEM_ID_GENWQE5,
65 .class = (PCI_CLASSCODE_GENWQE5 << 8),
69 /* Initial SR-IOV bring-up image */
70 { .vendor = PCI_VENDOR_ID_IBM,
71 .device = PCI_DEVICE_GENWQE,
72 .subvendor = PCI_SUBVENDOR_ID_IBM_SRIOV,
73 .subdevice = PCI_SUBSYSTEM_ID_GENWQE5_SRIOV,
74 .class = (PCI_CLASSCODE_GENWQE5_SRIOV << 8),
78 { .vendor = PCI_VENDOR_ID_IBM, /* VF Vendor ID */
79 .device = 0x0000, /* VF Device ID */
80 .subvendor = PCI_SUBVENDOR_ID_IBM_SRIOV,
81 .subdevice = PCI_SUBSYSTEM_ID_GENWQE5_SRIOV,
82 .class = (PCI_CLASSCODE_GENWQE5_SRIOV << 8),
87 { .vendor = PCI_VENDOR_ID_IBM,
88 .device = PCI_DEVICE_GENWQE,
89 .subvendor = PCI_SUBVENDOR_ID_IBM_SRIOV,
90 .subdevice = PCI_SUBSYSTEM_ID_GENWQE5,
91 .class = (PCI_CLASSCODE_GENWQE5_SRIOV << 8),
95 { .vendor = PCI_VENDOR_ID_IBM, /* VF Vendor ID */
96 .device = 0x0000, /* VF Device ID */
97 .subvendor = PCI_SUBVENDOR_ID_IBM_SRIOV,
98 .subdevice = PCI_SUBSYSTEM_ID_GENWQE5,
99 .class = (PCI_CLASSCODE_GENWQE5_SRIOV << 8),
103 /* Even one more ... */
104 { .vendor = PCI_VENDOR_ID_IBM,
105 .device = PCI_DEVICE_GENWQE,
106 .subvendor = PCI_SUBVENDOR_ID_IBM,
107 .subdevice = PCI_SUBSYSTEM_ID_GENWQE5_NEW,
108 .class = (PCI_CLASSCODE_GENWQE5 << 8),
112 { 0, } /* 0 terminated list. */
115 MODULE_DEVICE_TABLE(pci, genwqe_device_table);
118 * genwqe_dev_alloc() - Create and prepare a new card descriptor
120 * Return: Pointer to card descriptor, or ERR_PTR(err) on error
122 static struct genwqe_dev *genwqe_dev_alloc(void)
124 unsigned int i = 0, j;
125 struct genwqe_dev *cd;
127 for (i = 0; i < GENWQE_CARD_NO_MAX; i++) {
128 if (genwqe_devices[i] == NULL)
131 if (i >= GENWQE_CARD_NO_MAX)
132 return ERR_PTR(-ENODEV);
134 cd = kzalloc(sizeof(struct genwqe_dev), GFP_KERNEL);
136 return ERR_PTR(-ENOMEM);
139 cd->class_genwqe = class_genwqe;
140 cd->debugfs_genwqe = debugfs_genwqe;
143 * This comes from kernel config option and can be overritten via
146 cd->use_platform_recovery = CONFIG_GENWQE_PLATFORM_ERROR_RECOVERY;
148 init_waitqueue_head(&cd->queue_waitq);
150 spin_lock_init(&cd->file_lock);
151 INIT_LIST_HEAD(&cd->file_list);
153 cd->card_state = GENWQE_CARD_UNUSED;
154 spin_lock_init(&cd->print_lock);
156 cd->ddcb_software_timeout = genwqe_ddcb_software_timeout;
157 cd->kill_timeout = genwqe_kill_timeout;
159 for (j = 0; j < GENWQE_MAX_VFS; j++)
160 cd->vf_jobtimeout_msec[j] = genwqe_vf_jobtimeout_msec;
162 genwqe_devices[i] = cd;
166 static void genwqe_dev_free(struct genwqe_dev *cd)
171 genwqe_devices[cd->card_idx] = NULL;
176 * genwqe_bus_reset() - Card recovery
178 * pci_reset_function() will recover the device and ensure that the
179 * registers are accessible again when it completes with success. If
180 * not, the card will stay dead and registers will be unaccessible
183 static int genwqe_bus_reset(struct genwqe_dev *cd)
186 struct pci_dev *pci_dev = cd->pci_dev;
189 if (cd->err_inject & GENWQE_INJECT_BUS_RESET_FAILURE)
194 pci_iounmap(pci_dev, mmio);
196 bars = pci_select_bars(pci_dev, IORESOURCE_MEM);
197 pci_release_selected_regions(pci_dev, bars);
200 * Firmware/BIOS might change memory mapping during bus reset.
201 * Settings like enable bus-mastering, ... are backuped and
202 * restored by the pci_reset_function().
204 dev_dbg(&pci_dev->dev, "[%s] pci_reset function ...\n", __func__);
205 rc = pci_reset_function(pci_dev);
207 dev_err(&pci_dev->dev,
208 "[%s] err: failed reset func (rc %d)\n", __func__, rc);
211 dev_dbg(&pci_dev->dev, "[%s] done with rc=%d\n", __func__, rc);
214 * Here is the right spot to clear the register read
215 * failure. pci_bus_reset() does this job in real systems.
217 cd->err_inject &= ~(GENWQE_INJECT_HARDWARE_FAILURE |
218 GENWQE_INJECT_GFIR_FATAL |
219 GENWQE_INJECT_GFIR_INFO);
221 rc = pci_request_selected_regions(pci_dev, bars, genwqe_driver_name);
223 dev_err(&pci_dev->dev,
224 "[%s] err: request bars failed (%d)\n", __func__, rc);
228 cd->mmio = pci_iomap(pci_dev, 0, 0);
229 if (cd->mmio == NULL) {
230 dev_err(&pci_dev->dev,
231 "[%s] err: mapping BAR0 failed\n", __func__);
238 * Hardware circumvention section. Certain bitstreams in our test-lab
239 * had different kinds of problems. Here is where we adjust those
240 * bitstreams to function will with this version of our device driver.
242 * Thise circumventions are applied to the physical function only.
243 * The magical numbers below are identifying development/manufacturing
244 * versions of the bitstream used on the card.
246 * Turn off error reporting for old/manufacturing images.
249 bool genwqe_need_err_masking(struct genwqe_dev *cd)
251 return (cd->slu_unitcfg & 0xFFFF0ull) < 0x32170ull;
254 static void genwqe_tweak_hardware(struct genwqe_dev *cd)
256 struct pci_dev *pci_dev = cd->pci_dev;
258 /* Mask FIRs for development images */
259 if (((cd->slu_unitcfg & 0xFFFF0ull) >= 0x32000ull) &&
260 ((cd->slu_unitcfg & 0xFFFF0ull) <= 0x33250ull)) {
261 dev_warn(&pci_dev->dev,
262 "FIRs masked due to bitstream %016llx.%016llx\n",
263 cd->slu_unitcfg, cd->app_unitcfg);
265 __genwqe_writeq(cd, IO_APP_SEC_LEM_DEBUG_OVR,
266 0xFFFFFFFFFFFFFFFFull);
268 __genwqe_writeq(cd, IO_APP_ERR_ACT_MASK,
269 0x0000000000000000ull);
274 * genwqe_recovery_on_fatal_gfir_required() - Version depended actions
276 * Bitstreams older than 2013-02-17 have a bug where fatal GFIRs must
277 * be ignored. This is e.g. true for the bitstream we gave to the card
278 * manufacturer, but also for some old bitstreams we released to our
281 int genwqe_recovery_on_fatal_gfir_required(struct genwqe_dev *cd)
283 return (cd->slu_unitcfg & 0xFFFF0ull) >= 0x32170ull;
286 int genwqe_flash_readback_fails(struct genwqe_dev *cd)
288 return (cd->slu_unitcfg & 0xFFFF0ull) < 0x32170ull;
292 * genwqe_T_psec() - Calculate PF/VF timeout register content
294 * Note: From a design perspective it turned out to be a bad idea to
295 * use codes here to specifiy the frequency/speed values. An old
296 * driver cannot understand new codes and is therefore always a
297 * problem. Better is to measure out the value or put the
298 * speed/frequency directly into a register which is always a valid
299 * value for old as well as for new software.
302 static int genwqe_T_psec(struct genwqe_dev *cd)
304 u16 speed; /* 1/f -> 250, 200, 166, 175 */
305 static const int T[] = { 4000, 5000, 6000, 5714 };
307 speed = (u16)((cd->slu_unitcfg >> 28) & 0x0full);
308 if (speed >= ARRAY_SIZE(T))
309 return -1; /* illegal value */
315 * genwqe_setup_pf_jtimer() - Setup PF hardware timeouts for DDCB execution
317 * Do this _after_ card_reset() is called. Otherwise the values will
318 * vanish. The settings need to be done when the queues are inactive.
320 * The max. timeout value is 2^(10+x) * T (6ns for 166MHz) * 15/16.
321 * The min. timeout value is 2^(10+x) * T (6ns for 166MHz) * 14/16.
323 static bool genwqe_setup_pf_jtimer(struct genwqe_dev *cd)
325 u32 T = genwqe_T_psec(cd);
328 if (genwqe_pf_jobtimeout_msec == 0)
331 /* PF: large value needed, flash update 2sec per block */
332 x = ilog2(genwqe_pf_jobtimeout_msec *
333 16000000000uL/(T * 15)) - 10;
335 genwqe_write_vreg(cd, IO_SLC_VF_APPJOB_TIMEOUT,
336 0xff00 | (x & 0xff), 0);
341 * genwqe_setup_vf_jtimer() - Setup VF hardware timeouts for DDCB execution
343 static bool genwqe_setup_vf_jtimer(struct genwqe_dev *cd)
345 struct pci_dev *pci_dev = cd->pci_dev;
347 u32 T = genwqe_T_psec(cd);
350 for (vf = 0; vf < pci_sriov_get_totalvfs(pci_dev); vf++) {
352 if (cd->vf_jobtimeout_msec[vf] == 0)
355 x = ilog2(cd->vf_jobtimeout_msec[vf] *
356 16000000000uL/(T * 15)) - 10;
358 genwqe_write_vreg(cd, IO_SLC_VF_APPJOB_TIMEOUT,
359 0xff00 | (x & 0xff), vf + 1);
364 static int genwqe_ffdc_buffs_alloc(struct genwqe_dev *cd)
366 unsigned int type, e = 0;
368 for (type = 0; type < GENWQE_DBG_UNITS; type++) {
370 case GENWQE_DBG_UNIT0:
371 e = genwqe_ffdc_buff_size(cd, 0);
373 case GENWQE_DBG_UNIT1:
374 e = genwqe_ffdc_buff_size(cd, 1);
376 case GENWQE_DBG_UNIT2:
377 e = genwqe_ffdc_buff_size(cd, 2);
379 case GENWQE_DBG_REGS:
380 e = GENWQE_FFDC_REGS;
384 /* currently support only the debug units mentioned here */
385 cd->ffdc[type].entries = e;
386 cd->ffdc[type].regs = kmalloc(e * sizeof(struct genwqe_reg),
389 * regs == NULL is ok, the using code treats this as no regs,
390 * Printing warning is ok in this case.
396 static void genwqe_ffdc_buffs_free(struct genwqe_dev *cd)
400 for (type = 0; type < GENWQE_DBG_UNITS; type++) {
401 kfree(cd->ffdc[type].regs);
402 cd->ffdc[type].regs = NULL;
406 static int genwqe_read_ids(struct genwqe_dev *cd)
410 struct pci_dev *pci_dev = cd->pci_dev;
412 cd->slu_unitcfg = __genwqe_readq(cd, IO_SLU_UNITCFG);
413 if (cd->slu_unitcfg == IO_ILLEGAL_VALUE) {
414 dev_err(&pci_dev->dev,
415 "err: SLUID=%016llx\n", cd->slu_unitcfg);
420 slu_id = genwqe_get_slu_id(cd);
421 if (slu_id < GENWQE_SLU_ARCH_REQ || slu_id == 0xff) {
422 dev_err(&pci_dev->dev,
423 "err: incompatible SLU Architecture %u\n", slu_id);
428 cd->app_unitcfg = __genwqe_readq(cd, IO_APP_UNITCFG);
429 if (cd->app_unitcfg == IO_ILLEGAL_VALUE) {
430 dev_err(&pci_dev->dev,
431 "err: APPID=%016llx\n", cd->app_unitcfg);
435 genwqe_read_app_id(cd, cd->app_name, sizeof(cd->app_name));
438 * Is access to all registers possible? If we are a VF the
439 * answer is obvious. If we run fully virtualized, we need to
440 * check if we can access all registers. If we do not have
441 * full access we will cause an UR and some informational FIRs
442 * in the PF, but that should not harm.
444 if (pci_dev->is_virtfn)
445 cd->is_privileged = 0;
447 cd->is_privileged = (__genwqe_readq(cd, IO_SLU_BITSTREAM)
448 != IO_ILLEGAL_VALUE);
454 static int genwqe_start(struct genwqe_dev *cd)
457 struct pci_dev *pci_dev = cd->pci_dev;
459 err = genwqe_read_ids(cd);
463 if (genwqe_is_privileged(cd)) {
464 /* do this after the tweaks. alloc fail is acceptable */
465 genwqe_ffdc_buffs_alloc(cd);
466 genwqe_stop_traps(cd);
468 /* Collect registers e.g. FIRs, UNITIDs, traces ... */
469 genwqe_read_ffdc_regs(cd, cd->ffdc[GENWQE_DBG_REGS].regs,
470 cd->ffdc[GENWQE_DBG_REGS].entries, 0);
472 genwqe_ffdc_buff_read(cd, GENWQE_DBG_UNIT0,
473 cd->ffdc[GENWQE_DBG_UNIT0].regs,
474 cd->ffdc[GENWQE_DBG_UNIT0].entries);
476 genwqe_ffdc_buff_read(cd, GENWQE_DBG_UNIT1,
477 cd->ffdc[GENWQE_DBG_UNIT1].regs,
478 cd->ffdc[GENWQE_DBG_UNIT1].entries);
480 genwqe_ffdc_buff_read(cd, GENWQE_DBG_UNIT2,
481 cd->ffdc[GENWQE_DBG_UNIT2].regs,
482 cd->ffdc[GENWQE_DBG_UNIT2].entries);
484 genwqe_start_traps(cd);
486 if (cd->card_state == GENWQE_CARD_FATAL_ERROR) {
487 dev_warn(&pci_dev->dev,
488 "[%s] chip reload/recovery!\n", __func__);
491 * Stealth Mode: Reload chip on either hot
494 cd->softreset = 0x7Cull;
495 __genwqe_writeq(cd, IO_SLC_CFGREG_SOFTRESET,
498 err = genwqe_bus_reset(cd);
500 dev_err(&pci_dev->dev,
501 "[%s] err: bus reset failed!\n",
507 * Re-read the IDs because
508 * it could happen that the bitstream load
511 err = genwqe_read_ids(cd);
517 err = genwqe_setup_service_layer(cd); /* does a reset to the card */
519 dev_err(&pci_dev->dev,
520 "[%s] err: could not setup servicelayer!\n", __func__);
525 if (genwqe_is_privileged(cd)) { /* code is running _after_ reset */
526 genwqe_tweak_hardware(cd);
528 genwqe_setup_pf_jtimer(cd);
529 genwqe_setup_vf_jtimer(cd);
532 err = genwqe_device_create(cd);
534 dev_err(&pci_dev->dev,
535 "err: chdev init failed! (err=%d)\n", err);
536 goto out_release_service_layer;
540 out_release_service_layer:
541 genwqe_release_service_layer(cd);
543 if (genwqe_is_privileged(cd))
544 genwqe_ffdc_buffs_free(cd);
549 * genwqe_stop() - Stop card operation
552 * As long as genwqe_thread runs we might access registers during
553 * error data capture. Same is with the genwqe_health_thread.
554 * When genwqe_bus_reset() fails this function might called two times:
555 * first by the genwqe_health_thread() and later by genwqe_remove() to
556 * unbind the device. We must be able to survive that.
558 * This function must be robust enough to be called twice.
560 static int genwqe_stop(struct genwqe_dev *cd)
562 genwqe_finish_queue(cd); /* no register access */
563 genwqe_device_remove(cd); /* device removed, procs killed */
564 genwqe_release_service_layer(cd); /* here genwqe_thread is stopped */
566 if (genwqe_is_privileged(cd)) {
567 pci_disable_sriov(cd->pci_dev); /* access pci config space */
568 genwqe_ffdc_buffs_free(cd);
575 * genwqe_recover_card() - Try to recover the card if it is possible
577 * If fatal_err is set no register access is possible anymore. It is
578 * likely that genwqe_start fails in that situation. Proper error
579 * handling is required in this case.
581 * genwqe_bus_reset() will cause the pci code to call genwqe_remove()
582 * and later genwqe_probe() for all virtual functions.
584 static int genwqe_recover_card(struct genwqe_dev *cd, int fatal_err)
587 struct pci_dev *pci_dev = cd->pci_dev;
592 * Make sure chip is not reloaded to maintain FFDC. Write SLU
593 * Reset Register, CPLDReset field to 0.
596 cd->softreset = 0x70ull;
597 __genwqe_writeq(cd, IO_SLC_CFGREG_SOFTRESET, cd->softreset);
600 rc = genwqe_bus_reset(cd);
602 dev_err(&pci_dev->dev,
603 "[%s] err: card recovery impossible!\n", __func__);
607 rc = genwqe_start(cd);
609 dev_err(&pci_dev->dev,
610 "[%s] err: failed to launch device!\n", __func__);
616 static int genwqe_health_check_cond(struct genwqe_dev *cd, u64 *gfir)
618 *gfir = __genwqe_readq(cd, IO_SLC_CFGREG_GFIR);
619 return (*gfir & GFIR_ERR_TRIGGER) &&
620 genwqe_recovery_on_fatal_gfir_required(cd);
624 * genwqe_fir_checking() - Check the fault isolation registers of the card
626 * If this code works ok, can be tried out with help of the genwqe_poke tool:
627 * sudo ./tools/genwqe_poke 0x8 0xfefefefefef
629 * Now the relevant FIRs/sFIRs should be printed out and the driver should
630 * invoke recovery (devices are removed and readded).
632 static u64 genwqe_fir_checking(struct genwqe_dev *cd)
634 int j, iterations = 0;
635 u64 mask, fir, fec, uid, gfir, gfir_masked, sfir, sfec;
636 u32 fir_addr, fir_clr_addr, fec_addr, sfir_addr, sfec_addr;
637 struct pci_dev *pci_dev = cd->pci_dev;
641 if (iterations > 16) {
642 dev_err(&pci_dev->dev, "* exit looping after %d times\n",
647 gfir = __genwqe_readq(cd, IO_SLC_CFGREG_GFIR);
649 dev_err(&pci_dev->dev, "* 0x%08x 0x%016llx\n",
650 IO_SLC_CFGREG_GFIR, gfir);
651 if (gfir == IO_ILLEGAL_VALUE)
655 * Avoid printing when to GFIR bit is on prevents contignous
656 * printout e.g. for the following bug:
657 * FIR set without a 2ndary FIR/FIR cannot be cleared
658 * Comment out the following if to get the prints:
663 gfir_masked = gfir & GFIR_ERR_TRIGGER; /* fatal errors */
665 for (uid = 0; uid < GENWQE_MAX_UNITS; uid++) { /* 0..2 in zEDC */
667 /* read the primary FIR (pfir) */
668 fir_addr = (uid << 24) + 0x08;
669 fir = __genwqe_readq(cd, fir_addr);
671 continue; /* no error in this unit */
673 dev_err(&pci_dev->dev, "* 0x%08x 0x%016llx\n", fir_addr, fir);
674 if (fir == IO_ILLEGAL_VALUE)
677 /* read primary FEC */
678 fec_addr = (uid << 24) + 0x18;
679 fec = __genwqe_readq(cd, fec_addr);
681 dev_err(&pci_dev->dev, "* 0x%08x 0x%016llx\n", fec_addr, fec);
682 if (fec == IO_ILLEGAL_VALUE)
685 for (j = 0, mask = 1ULL; j < 64; j++, mask <<= 1) {
687 /* secondary fir empty, skip it */
688 if ((fir & mask) == 0x0)
691 sfir_addr = (uid << 24) + 0x100 + 0x08 * j;
692 sfir = __genwqe_readq(cd, sfir_addr);
694 if (sfir == IO_ILLEGAL_VALUE)
696 dev_err(&pci_dev->dev,
697 "* 0x%08x 0x%016llx\n", sfir_addr, sfir);
699 sfec_addr = (uid << 24) + 0x300 + 0x08 * j;
700 sfec = __genwqe_readq(cd, sfec_addr);
702 if (sfec == IO_ILLEGAL_VALUE)
704 dev_err(&pci_dev->dev,
705 "* 0x%08x 0x%016llx\n", sfec_addr, sfec);
707 gfir = __genwqe_readq(cd, IO_SLC_CFGREG_GFIR);
708 if (gfir == IO_ILLEGAL_VALUE)
711 /* gfir turned on during routine! get out and
713 if ((gfir_masked == 0x0) &&
714 (gfir & GFIR_ERR_TRIGGER)) {
718 /* do not clear if we entered with a fatal gfir */
719 if (gfir_masked == 0x0) {
721 /* NEW clear by mask the logged bits */
722 sfir_addr = (uid << 24) + 0x100 + 0x08 * j;
723 __genwqe_writeq(cd, sfir_addr, sfir);
725 dev_dbg(&pci_dev->dev,
726 "[HM] Clearing 2ndary FIR 0x%08x "
727 "with 0x%016llx\n", sfir_addr, sfir);
730 * note, these cannot be error-Firs
731 * since gfir_masked is 0 after sfir
732 * was read. Also, it is safe to do
733 * this write if sfir=0. Still need to
734 * clear the primary. This just means
735 * there is no secondary FIR.
738 /* clear by mask the logged bit. */
739 fir_clr_addr = (uid << 24) + 0x10;
740 __genwqe_writeq(cd, fir_clr_addr, mask);
742 dev_dbg(&pci_dev->dev,
743 "[HM] Clearing primary FIR 0x%08x "
744 "with 0x%016llx\n", fir_clr_addr,
749 gfir = __genwqe_readq(cd, IO_SLC_CFGREG_GFIR);
750 if (gfir == IO_ILLEGAL_VALUE)
753 if ((gfir_masked == 0x0) && (gfir & GFIR_ERR_TRIGGER)) {
755 * Check once more that it didn't go on after all the
758 dev_dbg(&pci_dev->dev, "ACK! Another FIR! Recursing %d!\n",
765 return IO_ILLEGAL_VALUE;
769 * genwqe_pci_fundamental_reset() - trigger a PCIe fundamental reset on the slot
771 * Note: pci_set_pcie_reset_state() is not implemented on all archs, so this
772 * reset method will not work in all cases.
774 * Return: 0 on success or error code from pci_set_pcie_reset_state()
776 static int genwqe_pci_fundamental_reset(struct pci_dev *pci_dev)
781 * lock pci config space access from userspace,
782 * save state and issue PCIe fundamental reset
784 pci_cfg_access_lock(pci_dev);
785 pci_save_state(pci_dev);
786 rc = pci_set_pcie_reset_state(pci_dev, pcie_warm_reset);
788 /* keep PCIe reset asserted for 250ms */
790 pci_set_pcie_reset_state(pci_dev, pcie_deassert_reset);
791 /* Wait for 2s to reload flash and train the link */
794 pci_restore_state(pci_dev);
795 pci_cfg_access_unlock(pci_dev);
800 static int genwqe_platform_recovery(struct genwqe_dev *cd)
802 struct pci_dev *pci_dev = cd->pci_dev;
805 dev_info(&pci_dev->dev,
806 "[%s] resetting card for error recovery\n", __func__);
808 /* Clear out error injection flags */
809 cd->err_inject &= ~(GENWQE_INJECT_HARDWARE_FAILURE |
810 GENWQE_INJECT_GFIR_FATAL |
811 GENWQE_INJECT_GFIR_INFO);
815 /* Try recoverying the card with fundamental reset */
816 rc = genwqe_pci_fundamental_reset(pci_dev);
818 rc = genwqe_start(cd);
820 dev_info(&pci_dev->dev,
821 "[%s] card recovered\n", __func__);
823 dev_err(&pci_dev->dev,
824 "[%s] err: cannot start card services! (err=%d)\n",
827 dev_err(&pci_dev->dev,
828 "[%s] card reset failed\n", __func__);
835 * genwqe_reload_bistream() - reload card bitstream
837 * Set the appropriate register and call fundamental reset to reaload the card
840 * Return: 0 on success, error code otherwise
842 static int genwqe_reload_bistream(struct genwqe_dev *cd)
844 struct pci_dev *pci_dev = cd->pci_dev;
847 dev_info(&pci_dev->dev,
848 "[%s] resetting card for bitstream reload\n",
854 * Cause a CPLD reprogram with the 'next_bitstream'
855 * partition on PCIe hot or fundamental reset
857 __genwqe_writeq(cd, IO_SLC_CFGREG_SOFTRESET,
858 (cd->softreset & 0xcull) | 0x70ull);
860 rc = genwqe_pci_fundamental_reset(pci_dev);
863 * A fundamental reset failure can be caused
864 * by lack of support on the arch, so we just
865 * log the error and try to start the card
868 dev_err(&pci_dev->dev,
869 "[%s] err: failed to reset card for bitstream reload\n",
873 rc = genwqe_start(cd);
875 dev_err(&pci_dev->dev,
876 "[%s] err: cannot start card services! (err=%d)\n",
880 dev_info(&pci_dev->dev,
881 "[%s] card reloaded\n", __func__);
887 * genwqe_health_thread() - Health checking thread
889 * This thread is only started for the PF of the card.
891 * This thread monitors the health of the card. A critical situation
892 * is when we read registers which contain -1 (IO_ILLEGAL_VALUE). In
893 * this case we need to be recovered from outside. Writing to
894 * registers will very likely not work either.
896 * This thread must only exit if kthread_should_stop() becomes true.
898 * Condition for the health-thread to trigger:
899 * a) when a kthread_stop() request comes in or
900 * b) a critical GFIR occured
902 * Informational GFIRs are checked and potentially printed in
903 * health_check_interval seconds.
905 static int genwqe_health_thread(void *data)
907 int rc, should_stop = 0;
908 struct genwqe_dev *cd = data;
909 struct pci_dev *pci_dev = cd->pci_dev;
910 u64 gfir, gfir_masked, slu_unitcfg, app_unitcfg;
913 while (!kthread_should_stop()) {
914 rc = wait_event_interruptible_timeout(cd->health_waitq,
915 (genwqe_health_check_cond(cd, &gfir) ||
916 (should_stop = kthread_should_stop())),
917 genwqe_health_check_interval * HZ);
922 if (gfir == IO_ILLEGAL_VALUE) {
923 dev_err(&pci_dev->dev,
924 "[%s] GFIR=%016llx\n", __func__, gfir);
928 slu_unitcfg = __genwqe_readq(cd, IO_SLU_UNITCFG);
929 if (slu_unitcfg == IO_ILLEGAL_VALUE) {
930 dev_err(&pci_dev->dev,
931 "[%s] SLU_UNITCFG=%016llx\n",
932 __func__, slu_unitcfg);
936 app_unitcfg = __genwqe_readq(cd, IO_APP_UNITCFG);
937 if (app_unitcfg == IO_ILLEGAL_VALUE) {
938 dev_err(&pci_dev->dev,
939 "[%s] APP_UNITCFG=%016llx\n",
940 __func__, app_unitcfg);
944 gfir = __genwqe_readq(cd, IO_SLC_CFGREG_GFIR);
945 if (gfir == IO_ILLEGAL_VALUE) {
946 dev_err(&pci_dev->dev,
947 "[%s] %s: GFIR=%016llx\n", __func__,
948 (gfir & GFIR_ERR_TRIGGER) ? "err" : "info",
953 gfir_masked = genwqe_fir_checking(cd);
954 if (gfir_masked == IO_ILLEGAL_VALUE)
958 * GFIR ErrorTrigger bits set => reset the card!
959 * Never do this for old/manufacturing images!
961 if ((gfir_masked) && !cd->skip_recovery &&
962 genwqe_recovery_on_fatal_gfir_required(cd)) {
964 cd->card_state = GENWQE_CARD_FATAL_ERROR;
966 rc = genwqe_recover_card(cd, 0);
968 /* FIXME Card is unusable and needs unbind! */
973 if (cd->card_state == GENWQE_CARD_RELOAD_BITSTREAM) {
974 /* Userspace requested card bitstream reload */
975 rc = genwqe_reload_bistream(cd);
980 cd->last_gfir = gfir;
987 if (cd->use_platform_recovery) {
989 * Since we use raw accessors, EEH errors won't be detected
990 * by the platform until we do a non-raw MMIO or config space
993 readq(cd->mmio + IO_SLC_CFGREG_GFIR);
995 /* We do nothing if the card is going over PCI recovery */
996 if (pci_channel_offline(pci_dev))
1000 * If it's supported by the platform, we try a fundamental reset
1001 * to recover from a fatal error. Otherwise, we continue to wait
1002 * for an external recovery procedure to take care of it.
1004 rc = genwqe_platform_recovery(cd);
1006 goto health_thread_begin;
1009 dev_err(&pci_dev->dev,
1010 "[%s] card unusable. Please trigger unbind!\n", __func__);
1012 /* Bring down logical devices to inform user space via udev remove. */
1013 cd->card_state = GENWQE_CARD_FATAL_ERROR;
1016 /* genwqe_bus_reset failed(). Now wait for genwqe_remove(). */
1017 while (!kthread_should_stop())
1023 static int genwqe_health_check_start(struct genwqe_dev *cd)
1027 if (genwqe_health_check_interval <= 0)
1028 return 0; /* valid for disabling the service */
1030 /* moved before request_irq() */
1031 /* init_waitqueue_head(&cd->health_waitq); */
1033 cd->health_thread = kthread_run(genwqe_health_thread, cd,
1034 GENWQE_DEVNAME "%d_health",
1036 if (IS_ERR(cd->health_thread)) {
1037 rc = PTR_ERR(cd->health_thread);
1038 cd->health_thread = NULL;
1044 static int genwqe_health_thread_running(struct genwqe_dev *cd)
1046 return cd->health_thread != NULL;
1049 static int genwqe_health_check_stop(struct genwqe_dev *cd)
1053 if (!genwqe_health_thread_running(cd))
1056 rc = kthread_stop(cd->health_thread);
1057 cd->health_thread = NULL;
1062 * genwqe_pci_setup() - Allocate PCIe related resources for our card
1064 static int genwqe_pci_setup(struct genwqe_dev *cd)
1067 struct pci_dev *pci_dev = cd->pci_dev;
1069 bars = pci_select_bars(pci_dev, IORESOURCE_MEM);
1070 err = pci_enable_device_mem(pci_dev);
1072 dev_err(&pci_dev->dev,
1073 "err: failed to enable pci memory (err=%d)\n", err);
1077 /* Reserve PCI I/O and memory resources */
1078 err = pci_request_selected_regions(pci_dev, bars, genwqe_driver_name);
1080 dev_err(&pci_dev->dev,
1081 "[%s] err: request bars failed (%d)\n", __func__, err);
1083 goto err_disable_device;
1086 /* check for 64-bit DMA address supported (DAC) */
1087 if (!pci_set_dma_mask(pci_dev, DMA_BIT_MASK(64))) {
1088 err = pci_set_consistent_dma_mask(pci_dev, DMA_BIT_MASK(64));
1090 dev_err(&pci_dev->dev,
1091 "err: DMA64 consistent mask error\n");
1093 goto out_release_resources;
1095 /* check for 32-bit DMA address supported (SAC) */
1096 } else if (!pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32))) {
1097 err = pci_set_consistent_dma_mask(pci_dev, DMA_BIT_MASK(32));
1099 dev_err(&pci_dev->dev,
1100 "err: DMA32 consistent mask error\n");
1102 goto out_release_resources;
1105 dev_err(&pci_dev->dev,
1106 "err: neither DMA32 nor DMA64 supported\n");
1108 goto out_release_resources;
1111 pci_set_master(pci_dev);
1112 pci_enable_pcie_error_reporting(pci_dev);
1114 /* EEH recovery requires PCIe fundamental reset */
1115 pci_dev->needs_freset = 1;
1117 /* request complete BAR-0 space (length = 0) */
1118 cd->mmio_len = pci_resource_len(pci_dev, 0);
1119 cd->mmio = pci_iomap(pci_dev, 0, 0);
1120 if (cd->mmio == NULL) {
1121 dev_err(&pci_dev->dev,
1122 "[%s] err: mapping BAR0 failed\n", __func__);
1124 goto out_release_resources;
1127 cd->num_vfs = pci_sriov_get_totalvfs(pci_dev);
1129 err = genwqe_read_ids(cd);
1136 pci_iounmap(pci_dev, cd->mmio);
1137 out_release_resources:
1138 pci_release_selected_regions(pci_dev, bars);
1140 pci_disable_device(pci_dev);
1146 * genwqe_pci_remove() - Free PCIe related resources for our card
1148 static void genwqe_pci_remove(struct genwqe_dev *cd)
1151 struct pci_dev *pci_dev = cd->pci_dev;
1154 pci_iounmap(pci_dev, cd->mmio);
1156 bars = pci_select_bars(pci_dev, IORESOURCE_MEM);
1157 pci_release_selected_regions(pci_dev, bars);
1158 pci_disable_device(pci_dev);
1162 * genwqe_probe() - Device initialization
1163 * @pdev: PCI device information struct
1165 * Callable for multiple cards. This function is called on bind.
1167 * Return: 0 if succeeded, < 0 when failed
1169 static int genwqe_probe(struct pci_dev *pci_dev,
1170 const struct pci_device_id *id)
1173 struct genwqe_dev *cd;
1175 genwqe_init_crc32();
1177 cd = genwqe_dev_alloc();
1179 dev_err(&pci_dev->dev, "err: could not alloc mem (err=%d)!\n",
1184 dev_set_drvdata(&pci_dev->dev, cd);
1185 cd->pci_dev = pci_dev;
1187 err = genwqe_pci_setup(cd);
1189 dev_err(&pci_dev->dev,
1190 "err: problems with PCI setup (err=%d)\n", err);
1194 err = genwqe_start(cd);
1196 dev_err(&pci_dev->dev,
1197 "err: cannot start card services! (err=%d)\n", err);
1198 goto out_pci_remove;
1201 if (genwqe_is_privileged(cd)) {
1202 err = genwqe_health_check_start(cd);
1204 dev_err(&pci_dev->dev,
1205 "err: cannot start health checking! "
1207 goto out_stop_services;
1215 genwqe_pci_remove(cd);
1217 genwqe_dev_free(cd);
1222 * genwqe_remove() - Called when device is removed (hot-plugable)
1224 * Or when driver is unloaded respecitively when unbind is done.
1226 static void genwqe_remove(struct pci_dev *pci_dev)
1228 struct genwqe_dev *cd = dev_get_drvdata(&pci_dev->dev);
1230 genwqe_health_check_stop(cd);
1233 * genwqe_stop() must survive if it is called twice
1234 * sequentially. This happens when the health thread calls it
1235 * and fails on genwqe_bus_reset().
1238 genwqe_pci_remove(cd);
1239 genwqe_dev_free(cd);
1243 * genwqe_err_error_detected() - Error detection callback
1245 * This callback is called by the PCI subsystem whenever a PCI bus
1246 * error is detected.
1248 static pci_ers_result_t genwqe_err_error_detected(struct pci_dev *pci_dev,
1249 enum pci_channel_state state)
1251 struct genwqe_dev *cd;
1253 dev_err(&pci_dev->dev, "[%s] state=%d\n", __func__, state);
1255 cd = dev_get_drvdata(&pci_dev->dev);
1257 return PCI_ERS_RESULT_DISCONNECT;
1260 genwqe_health_check_stop(cd);
1264 * On permanent failure, the PCI code will call device remove
1265 * after the return of this function.
1266 * genwqe_stop() can be called twice.
1268 if (state == pci_channel_io_perm_failure) {
1269 return PCI_ERS_RESULT_DISCONNECT;
1271 genwqe_pci_remove(cd);
1272 return PCI_ERS_RESULT_NEED_RESET;
1276 static pci_ers_result_t genwqe_err_slot_reset(struct pci_dev *pci_dev)
1279 struct genwqe_dev *cd = dev_get_drvdata(&pci_dev->dev);
1281 rc = genwqe_pci_setup(cd);
1283 return PCI_ERS_RESULT_RECOVERED;
1285 dev_err(&pci_dev->dev,
1286 "err: problems with PCI setup (err=%d)\n", rc);
1287 return PCI_ERS_RESULT_DISCONNECT;
1291 static pci_ers_result_t genwqe_err_result_none(struct pci_dev *dev)
1293 return PCI_ERS_RESULT_NONE;
1296 static void genwqe_err_resume(struct pci_dev *pci_dev)
1299 struct genwqe_dev *cd = dev_get_drvdata(&pci_dev->dev);
1301 rc = genwqe_start(cd);
1303 rc = genwqe_health_check_start(cd);
1305 dev_err(&pci_dev->dev,
1306 "err: cannot start health checking! (err=%d)\n",
1309 dev_err(&pci_dev->dev,
1310 "err: cannot start card services! (err=%d)\n", rc);
1314 static int genwqe_sriov_configure(struct pci_dev *dev, int numvfs)
1316 struct genwqe_dev *cd = dev_get_drvdata(&dev->dev);
1319 genwqe_setup_vf_jtimer(cd);
1320 pci_enable_sriov(dev, numvfs);
1324 pci_disable_sriov(dev);
1330 static struct pci_error_handlers genwqe_err_handler = {
1331 .error_detected = genwqe_err_error_detected,
1332 .mmio_enabled = genwqe_err_result_none,
1333 .link_reset = genwqe_err_result_none,
1334 .slot_reset = genwqe_err_slot_reset,
1335 .resume = genwqe_err_resume,
1338 static struct pci_driver genwqe_driver = {
1339 .name = genwqe_driver_name,
1340 .id_table = genwqe_device_table,
1341 .probe = genwqe_probe,
1342 .remove = genwqe_remove,
1343 .sriov_configure = genwqe_sriov_configure,
1344 .err_handler = &genwqe_err_handler,
1348 * genwqe_init_module() - Driver registration and initialization
1350 static int __init genwqe_init_module(void)
1354 class_genwqe = class_create(THIS_MODULE, GENWQE_DEVNAME);
1355 if (IS_ERR(class_genwqe)) {
1356 pr_err("[%s] create class failed\n", __func__);
1360 debugfs_genwqe = debugfs_create_dir(GENWQE_DEVNAME, NULL);
1361 if (!debugfs_genwqe) {
1366 rc = pci_register_driver(&genwqe_driver);
1368 pr_err("[%s] pci_reg_driver (rc=%d)\n", __func__, rc);
1375 debugfs_remove(debugfs_genwqe);
1377 class_destroy(class_genwqe);
1382 * genwqe_exit_module() - Driver exit
1384 static void __exit genwqe_exit_module(void)
1386 pci_unregister_driver(&genwqe_driver);
1387 debugfs_remove(debugfs_genwqe);
1388 class_destroy(class_genwqe);
1391 module_init(genwqe_init_module);
1392 module_exit(genwqe_exit_module);