drivers/misc/iwmc3200top/iwmc3200top.h

   1 /*
   2  * iwmc3200top - Intel Wireless MultiCom 3200 Top Driver
   3  * drivers/misc/iwmc3200top/iwmc3200top.h
   4  *
   5  * Copyright (C) 2009 Intel Corporation. All rights reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License version
   9  * 2 as published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  19  * 02110-1301, USA.
  20  *
  21  *
  22  * Author Name: Maxim Grabarnik <maxim.grabarnink@intel.com>
  23  *  -
  24  *
  25  */
  26
  27 #ifndef __IWMC3200TOP_H__
  28 #define __IWMC3200TOP_H__
  29
  30 #include <linux/workqueue.h>
  31
  32 #define DRV_NAME "iwmc3200top"
  33
  34 #define IWMC_SDIO_BLK_SIZE                      256
  35 #define IWMC_DEFAULT_TR_BLK                     64
  36 #define IWMC_SDIO_DATA_ADDR                     0x0
  37 #define IWMC_SDIO_INTR_ENABLE_ADDR              0x14
  38 #define IWMC_SDIO_INTR_STATUS_ADDR              0x13
  39 #define IWMC_SDIO_INTR_CLEAR_ADDR               0x13
  40 #define IWMC_SDIO_INTR_GET_SIZE_ADDR            0x2C
  41
  42 #define COMM_HUB_HEADER_LENGTH 16
  43 #define LOGGER_HEADER_LENGTH   10
  44
  45
  46 #define BARKER_DNLOAD_BT_POS            0
  47 #define BARKER_DNLOAD_BT_MSK            BIT(BARKER_DNLOAD_BT_POS)
  48 #define BARKER_DNLOAD_GPS_POS           1
  49 #define BARKER_DNLOAD_GPS_MSK           BIT(BARKER_DNLOAD_GPS_POS)
  50 #define BARKER_DNLOAD_TOP_POS           2
  51 #define BARKER_DNLOAD_TOP_MSK           BIT(BARKER_DNLOAD_TOP_POS)
  52 #define BARKER_DNLOAD_RESERVED1_POS     3
  53 #define BARKER_DNLOAD_RESERVED1_MSK     BIT(BARKER_DNLOAD_RESERVED1_POS)
  54 #define BARKER_DNLOAD_JUMP_POS          4
  55 #define BARKER_DNLOAD_JUMP_MSK          BIT(BARKER_DNLOAD_JUMP_POS)
  56 #define BARKER_DNLOAD_SYNC_POS          5
  57 #define BARKER_DNLOAD_SYNC_MSK          BIT(BARKER_DNLOAD_SYNC_POS)
  58 #define BARKER_DNLOAD_RESERVED2_POS     6
  59 #define BARKER_DNLOAD_RESERVED2_MSK     (0x3 << BARKER_DNLOAD_RESERVED2_POS)
  60 #define BARKER_DNLOAD_BARKER_POS        8
  61 #define BARKER_DNLOAD_BARKER_MSK        (0xffffff << BARKER_DNLOAD_BARKER_POS)
  62
  63 #define IWMC_BARKER_REBOOT      (0xdeadbe << BARKER_DNLOAD_BARKER_POS)
  64 /* whole field barker */
  65 #define IWMC_BARKER_ACK         0xfeedbabe
  66
  67 #define IWMC_CMD_SIGNATURE      0xcbbc
  68
  69 #define CMD_HDR_OPCODE_POS              0
  70 #define CMD_HDR_OPCODE_MSK_MSK          (0xf << CMD_HDR_OPCODE_MSK_POS)
  71 #define CMD_HDR_RESPONSE_CODE_POS       4
  72 #define CMD_HDR_RESPONSE_CODE_MSK       (0xf << CMD_HDR_RESPONSE_CODE_POS)
  73 #define CMD_HDR_USE_CHECKSUM_POS        8
  74 #define CMD_HDR_USE_CHECKSUM_MSK        BIT(CMD_HDR_USE_CHECKSUM_POS)
  75 #define CMD_HDR_RESPONSE_REQUIRED_POS   9
  76 #define CMD_HDR_RESPONSE_REQUIRED_MSK   BIT(CMD_HDR_RESPONSE_REQUIRED_POS)
  77 #define CMD_HDR_DIRECT_ACCESS_POS       10
  78 #define CMD_HDR_DIRECT_ACCESS_MSK       BIT(CMD_HDR_DIRECT_ACCESS_POS)
  79 #define CMD_HDR_RESERVED_POS            11
  80 #define CMD_HDR_RESERVED_MSK            BIT(0x1f << CMD_HDR_RESERVED_POS)
  81 #define CMD_HDR_SIGNATURE_POS           16
  82 #define CMD_HDR_SIGNATURE_MSK           BIT(0xffff << CMD_HDR_SIGNATURE_POS)
  83
  84 enum {
  85         IWMC_OPCODE_PING = 0,
  86         IWMC_OPCODE_READ = 1,
  87         IWMC_OPCODE_WRITE = 2,
  88         IWMC_OPCODE_JUMP = 3,
  89         IWMC_OPCODE_REBOOT = 4,
  90         IWMC_OPCODE_PERSISTENT_WRITE = 5,
  91         IWMC_OPCODE_PERSISTENT_READ = 6,
  92         IWMC_OPCODE_READ_MODIFY_WRITE = 7,
  93         IWMC_OPCODE_LAST_COMMAND = 15
  94 };
  95
  96 struct iwmct_fw_load_hdr {
  97         __le32 cmd;
  98         __le32 target_addr;
  99         __le32 data_size;
 100         __le32 block_chksm;
 101         u8 data[0];
 102 };
 103
 104 /**
 105  * struct iwmct_fw_hdr
 106  * holds all sw components versions
 107  */
 108 struct iwmct_fw_hdr {
 109         u8 top_major;
 110         u8 top_minor;
 111         u8 top_revision;
 112         u8 gps_major;
 113         u8 gps_minor;
 114         u8 gps_revision;
 115         u8 bt_major;
 116         u8 bt_minor;
 117         u8 bt_revision;
 118         u8 tic_name[31];
 119 };
 120
 121 /**
 122  * struct iwmct_fw_sec_hdr
 123  * @type: function type
 124  * @data_size: section's data size
 125  * @target_addr: download address
 126  */
 127 struct iwmct_fw_sec_hdr {
 128         u8 type[4];
 129         __le32 data_size;
 130         __le32 target_addr;
 131 };
 132
 133 /**
 134  * struct iwmct_parser
 135  * @file: fw image
 136  * @file_size: fw size
 137  * @cur_pos: position in file
 138  * @buf: temp buf for download
 139  * @buf_size: size of buf
 140  * @entry_point: address to jump in fw kick-off
 141  */
 142 struct iwmct_parser {
 143         const u8 *file;
 144         size_t file_size;
 145         size_t cur_pos;
 146         u8 *buf;
 147         size_t buf_size;
 148         u32 entry_point;
 149         struct iwmct_fw_hdr versions;
 150 };
 151
 152
 153 struct iwmct_work_struct {
 154         struct list_head list;
 155         ssize_t iosize;
 156 };
 157
 158 struct iwmct_dbg {
 159         int blocks;
 160         bool dump;
 161         bool jump;
 162         bool direct;
 163         bool checksum;
 164         bool fw_download;
 165         int block_size;
 166         int download_trans_blks;
 167
 168         char label_fw[256];
 169 };
 170
 171 struct iwmct_debugfs;
 172
 173 struct iwmct_priv {
 174         struct sdio_func *func;
 175         struct iwmct_debugfs *dbgfs;
 176         struct iwmct_parser parser;
 177         atomic_t reset;
 178         atomic_t dev_sync;
 179         u32 trans_len;
 180         u32 barker;
 181         struct iwmct_dbg dbg;
 182
 183         /* drivers work queue */
 184         struct workqueue_struct *wq;
 185         struct workqueue_struct *bus_rescan_wq;
 186         struct work_struct bus_rescan_worker;
 187         struct work_struct isr_worker;
 188
 189         /* drivers wait queue */
 190         wait_queue_head_t wait_q;
 191
 192         /* rx request list */
 193         struct list_head read_req_list;
 194 };
 195
 196 extern int iwmct_tx(struct iwmct_priv *priv, unsigned int addr,
 197                 void *src, int count);
 198
 199 extern int iwmct_fw_load(struct iwmct_priv *priv);
 200
 201 extern void iwmct_dbg_init_params(struct iwmct_priv *drv);
 202 extern void iwmct_dbg_init_drv_attrs(struct device_driver *drv);
 203 extern void iwmct_dbg_remove_drv_attrs(struct device_driver *drv);
 204 extern int iwmct_send_hcmd(struct iwmct_priv *priv, u8 *cmd, u16 len);
 205
 206 #endif  /*  __IWMC3200TOP_H__  */