3 * Intel Management Engine Interface (Intel MEI) Linux driver
4 * Copyright (c) 2003-2012, Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 #include <linux/module.h>
17 #include <linux/moduleparam.h>
18 #include <linux/kernel.h>
19 #include <linux/device.h>
21 #include <linux/errno.h>
22 #include <linux/types.h>
23 #include <linux/fcntl.h>
24 #include <linux/aio.h>
25 #include <linux/pci.h>
26 #include <linux/poll.h>
27 #include <linux/ioctl.h>
28 #include <linux/cdev.h>
29 #include <linux/sched.h>
30 #include <linux/uuid.h>
31 #include <linux/compat.h>
32 #include <linux/jiffies.h>
33 #include <linux/interrupt.h>
34 #include <linux/miscdevice.h>
36 #include <linux/pm_runtime.h>
38 #include <linux/mei.h>
42 #include "hw-me-regs.h"
45 /* mei_pci_tbl - PCI Device ID Table */
46 static const struct pci_device_id mei_me_pci_tbl[] = {
47 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82946GZ)},
48 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82G35)},
49 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82Q965)},
50 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82G965)},
51 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82GM965)},
52 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82GME965)},
53 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82Q35)},
54 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82G33)},
55 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82Q33)},
56 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82X38)},
57 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_3200)},
58 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_6)},
59 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_7)},
60 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_8)},
61 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_9)},
62 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_10)},
63 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_1)},
64 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_2)},
65 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_3)},
66 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_4)},
67 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_1)},
68 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_2)},
69 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_3)},
70 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_4)},
71 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_IBXPK_1)},
72 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_IBXPK_2)},
73 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_CPT_1)},
74 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PBG_1)},
75 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_1)},
76 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_2)},
77 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_3)},
78 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_H)},
79 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_W)},
80 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_LP)},
81 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_HR)},
82 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_WPT_LP)},
84 /* required last entry */
88 MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl);
91 * mei_quirk_probe - probe for devices that doesn't valid ME interface
93 * @pdev: PCI device structure
94 * @ent: entry into pci_device_table
96 * returns true if ME Interface is valid, false otherwise
98 static bool mei_me_quirk_probe(struct pci_dev *pdev,
99 const struct pci_device_id *ent)
102 /* Cougar Point || Patsburg */
103 if (ent->device == MEI_DEV_ID_CPT_1 ||
104 ent->device == MEI_DEV_ID_PBG_1) {
105 pci_read_config_dword(pdev, PCI_CFG_HFS_2, ®);
106 /* make sure that bit 9 (NM) is up and bit 10 (DM) is down */
107 if ((reg & 0x600) == 0x200)
112 if (ent->device == MEI_DEV_ID_LPT_H ||
113 ent->device == MEI_DEV_ID_LPT_W ||
114 ent->device == MEI_DEV_ID_LPT_HR) {
115 /* Read ME FW Status check for SPS Firmware */
116 pci_read_config_dword(pdev, PCI_CFG_HFS_1, ®);
117 /* if bits [19:16] = 15, running SPS Firmware */
118 if ((reg & 0xf0000) == 0xf0000)
125 dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
129 * mei_probe - Device Initialization Routine
131 * @pdev: PCI device structure
132 * @ent: entry in kcs_pci_tbl
134 * returns 0 on success, <0 on failure.
136 static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
138 struct mei_device *dev;
139 struct mei_me_hw *hw;
143 if (!mei_me_quirk_probe(pdev, ent)) {
149 err = pci_enable_device(pdev);
151 dev_err(&pdev->dev, "failed to enable pci device.\n");
154 /* set PCI host mastering */
155 pci_set_master(pdev);
156 /* pci request regions for mei driver */
157 err = pci_request_regions(pdev, KBUILD_MODNAME);
159 dev_err(&pdev->dev, "failed to get pci regions.\n");
163 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) ||
164 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
166 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
168 err = dma_set_coherent_mask(&pdev->dev,
172 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
173 goto release_regions;
177 /* allocates and initializes the mei dev structure */
178 dev = mei_me_dev_init(pdev);
181 goto release_regions;
184 /* mapping IO device memory */
185 hw->mem_addr = pci_iomap(pdev, 0, 0);
187 dev_err(&pdev->dev, "mapping I/O device memory failure.\n");
191 pci_enable_msi(pdev);
193 /* request and enable interrupt */
194 if (pci_dev_msi_enabled(pdev))
195 err = request_threaded_irq(pdev->irq,
197 mei_me_irq_thread_handler,
198 IRQF_ONESHOT, KBUILD_MODNAME, dev);
200 err = request_threaded_irq(pdev->irq,
201 mei_me_irq_quick_handler,
202 mei_me_irq_thread_handler,
203 IRQF_SHARED, KBUILD_MODNAME, dev);
206 dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n",
211 if (mei_start(dev)) {
212 dev_err(&pdev->dev, "init hw failure.\n");
217 pm_runtime_set_autosuspend_delay(&pdev->dev, MEI_ME_RPM_TIMEOUT);
218 pm_runtime_use_autosuspend(&pdev->dev);
220 err = mei_register(dev);
224 pci_set_drvdata(pdev, dev);
226 schedule_delayed_work(&dev->timer_work, HZ);
228 if (mei_pg_is_enabled(dev))
229 pm_runtime_put_noidle(&pdev->dev);
231 dev_dbg(&pdev->dev, "initialization successful.\n");
236 mei_cancel_work(dev);
237 mei_disable_interrupts(dev);
238 free_irq(pdev->irq, dev);
240 pci_disable_msi(pdev);
241 pci_iounmap(pdev, hw->mem_addr);
245 pci_release_regions(pdev);
247 pci_disable_device(pdev);
249 dev_err(&pdev->dev, "initialization failed.\n");
254 * mei_remove - Device Removal Routine
256 * @pdev: PCI device structure
258 * mei_remove is called by the PCI subsystem to alert the driver
259 * that it should release a PCI device.
261 static void mei_me_remove(struct pci_dev *pdev)
263 struct mei_device *dev;
264 struct mei_me_hw *hw;
266 dev = pci_get_drvdata(pdev);
270 if (mei_pg_is_enabled(dev))
271 pm_runtime_get_noresume(&pdev->dev);
276 dev_dbg(&pdev->dev, "stop\n");
279 /* disable interrupts */
280 mei_disable_interrupts(dev);
282 free_irq(pdev->irq, dev);
283 pci_disable_msi(pdev);
286 pci_iounmap(pdev, hw->mem_addr);
292 pci_release_regions(pdev);
293 pci_disable_device(pdev);
297 #ifdef CONFIG_PM_SLEEP
298 static int mei_me_pci_suspend(struct device *device)
300 struct pci_dev *pdev = to_pci_dev(device);
301 struct mei_device *dev = pci_get_drvdata(pdev);
306 dev_dbg(&pdev->dev, "suspend\n");
310 mei_disable_interrupts(dev);
312 free_irq(pdev->irq, dev);
313 pci_disable_msi(pdev);
318 static int mei_me_pci_resume(struct device *device)
320 struct pci_dev *pdev = to_pci_dev(device);
321 struct mei_device *dev;
324 dev = pci_get_drvdata(pdev);
328 pci_enable_msi(pdev);
330 /* request and enable interrupt */
331 if (pci_dev_msi_enabled(pdev))
332 err = request_threaded_irq(pdev->irq,
334 mei_me_irq_thread_handler,
335 IRQF_ONESHOT, KBUILD_MODNAME, dev);
337 err = request_threaded_irq(pdev->irq,
338 mei_me_irq_quick_handler,
339 mei_me_irq_thread_handler,
340 IRQF_SHARED, KBUILD_MODNAME, dev);
343 dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n",
348 err = mei_restart(dev);
352 /* Start timer if stopped in suspend */
353 schedule_delayed_work(&dev->timer_work, HZ);
357 #endif /* CONFIG_PM_SLEEP */
359 #ifdef CONFIG_PM_RUNTIME
360 static int mei_me_pm_runtime_idle(struct device *device)
362 struct pci_dev *pdev = to_pci_dev(device);
363 struct mei_device *dev;
365 dev_dbg(&pdev->dev, "rpm: me: runtime_idle\n");
367 dev = pci_get_drvdata(pdev);
370 if (mei_write_is_idle(dev))
371 pm_schedule_suspend(device, MEI_ME_RPM_TIMEOUT * 2);
376 static int mei_me_pm_runtime_suspend(struct device *device)
378 struct pci_dev *pdev = to_pci_dev(device);
379 struct mei_device *dev;
382 dev_dbg(&pdev->dev, "rpm: me: runtime suspend\n");
384 dev = pci_get_drvdata(pdev);
388 mutex_lock(&dev->device_lock);
390 if (mei_write_is_idle(dev))
391 ret = mei_me_pg_set_sync(dev);
395 mutex_unlock(&dev->device_lock);
397 dev_dbg(&pdev->dev, "rpm: me: runtime suspend ret=%d\n", ret);
402 static int mei_me_pm_runtime_resume(struct device *device)
404 struct pci_dev *pdev = to_pci_dev(device);
405 struct mei_device *dev;
408 dev_dbg(&pdev->dev, "rpm: me: runtime resume\n");
410 dev = pci_get_drvdata(pdev);
414 mutex_lock(&dev->device_lock);
416 ret = mei_me_pg_unset_sync(dev);
418 mutex_unlock(&dev->device_lock);
420 dev_dbg(&pdev->dev, "rpm: me: runtime resume ret = %d\n", ret);
424 #endif /* CONFIG_PM_RUNTIME */
427 static const struct dev_pm_ops mei_me_pm_ops = {
428 SET_SYSTEM_SLEEP_PM_OPS(mei_me_pci_suspend,
431 mei_me_pm_runtime_suspend,
432 mei_me_pm_runtime_resume,
433 mei_me_pm_runtime_idle)
436 #define MEI_ME_PM_OPS (&mei_me_pm_ops)
438 #define MEI_ME_PM_OPS NULL
439 #endif /* CONFIG_PM */
441 * PCI driver structure
443 static struct pci_driver mei_me_driver = {
444 .name = KBUILD_MODNAME,
445 .id_table = mei_me_pci_tbl,
446 .probe = mei_me_probe,
447 .remove = mei_me_remove,
448 .shutdown = mei_me_remove,
449 .driver.pm = MEI_ME_PM_OPS,
452 module_pci_driver(mei_me_driver);
454 MODULE_AUTHOR("Intel Corporation");
455 MODULE_DESCRIPTION("Intel(R) Management Engine Interface");
456 MODULE_LICENSE("GPL v2");