2 * Portions copyright (C) 2003 Russell King, PXA MMCI Driver
3 * Portions copyright (C) 2004-2005 Pierre Ossman, W83L51xD SD/MMC driver
5 * Copyright 2008 Embedded Alley Solutions, Inc.
6 * Copyright 2009-2011 Freescale Semiconductor, Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
23 #include <linux/kernel.h>
24 #include <linux/init.h>
25 #include <linux/ioport.h>
27 #include <linux/of_device.h>
28 #include <linux/of_gpio.h>
29 #include <linux/platform_device.h>
30 #include <linux/delay.h>
31 #include <linux/interrupt.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/dmaengine.h>
34 #include <linux/highmem.h>
35 #include <linux/clk.h>
36 #include <linux/err.h>
37 #include <linux/completion.h>
38 #include <linux/mmc/host.h>
39 #include <linux/mmc/mmc.h>
40 #include <linux/mmc/sdio.h>
41 #include <linux/mmc/slot-gpio.h>
42 #include <linux/gpio.h>
43 #include <linux/regulator/consumer.h>
44 #include <linux/module.h>
45 #include <linux/stmp_device.h>
46 #include <linux/spi/mxs-spi.h>
48 #define DRIVER_NAME "mxs-mmc"
50 #define MXS_MMC_IRQ_BITS (BM_SSP_CTRL1_SDIO_IRQ | \
51 BM_SSP_CTRL1_RESP_ERR_IRQ | \
52 BM_SSP_CTRL1_RESP_TIMEOUT_IRQ | \
53 BM_SSP_CTRL1_DATA_TIMEOUT_IRQ | \
54 BM_SSP_CTRL1_DATA_CRC_IRQ | \
55 BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ | \
56 BM_SSP_CTRL1_RECV_TIMEOUT_IRQ | \
57 BM_SSP_CTRL1_FIFO_OVERRUN_IRQ)
59 /* card detect polling timeout */
60 #define MXS_MMC_DETECT_TIMEOUT (HZ/2)
66 struct mmc_request *mrq;
67 struct mmc_command *cmd;
68 struct mmc_data *data;
70 unsigned char bus_width;
75 static int mxs_mmc_get_cd(struct mmc_host *mmc)
77 struct mxs_mmc_host *host = mmc_priv(mmc);
78 struct mxs_ssp *ssp = &host->ssp;
81 present = !(readl(ssp->base + HW_SSP_STATUS(ssp)) &
82 BM_SSP_STATUS_CARD_DETECT);
84 if (mmc->caps2 & MMC_CAP2_CD_ACTIVE_HIGH)
90 static int mxs_mmc_reset(struct mxs_mmc_host *host)
92 struct mxs_ssp *ssp = &host->ssp;
96 ret = stmp_reset_block(ssp->base);
100 ctrl0 = BM_SSP_CTRL0_IGNORE_CRC;
101 ctrl1 = BF_SSP(0x3, CTRL1_SSP_MODE) |
102 BF_SSP(0x7, CTRL1_WORD_LENGTH) |
103 BM_SSP_CTRL1_DMA_ENABLE |
104 BM_SSP_CTRL1_POLARITY |
105 BM_SSP_CTRL1_RECV_TIMEOUT_IRQ_EN |
106 BM_SSP_CTRL1_DATA_CRC_IRQ_EN |
107 BM_SSP_CTRL1_DATA_TIMEOUT_IRQ_EN |
108 BM_SSP_CTRL1_RESP_TIMEOUT_IRQ_EN |
109 BM_SSP_CTRL1_RESP_ERR_IRQ_EN;
111 writel(BF_SSP(0xffff, TIMING_TIMEOUT) |
112 BF_SSP(2, TIMING_CLOCK_DIVIDE) |
113 BF_SSP(0, TIMING_CLOCK_RATE),
114 ssp->base + HW_SSP_TIMING(ssp));
116 if (host->sdio_irq_en) {
117 ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
118 ctrl1 |= BM_SSP_CTRL1_SDIO_IRQ_EN;
121 writel(ctrl0, ssp->base + HW_SSP_CTRL0);
122 writel(ctrl1, ssp->base + HW_SSP_CTRL1(ssp));
126 static void mxs_mmc_start_cmd(struct mxs_mmc_host *host,
127 struct mmc_command *cmd);
129 static void mxs_mmc_request_done(struct mxs_mmc_host *host)
131 struct mmc_command *cmd = host->cmd;
132 struct mmc_data *data = host->data;
133 struct mmc_request *mrq = host->mrq;
134 struct mxs_ssp *ssp = &host->ssp;
136 if (mmc_resp_type(cmd) & MMC_RSP_PRESENT) {
137 if (mmc_resp_type(cmd) & MMC_RSP_136) {
138 cmd->resp[3] = readl(ssp->base + HW_SSP_SDRESP0(ssp));
139 cmd->resp[2] = readl(ssp->base + HW_SSP_SDRESP1(ssp));
140 cmd->resp[1] = readl(ssp->base + HW_SSP_SDRESP2(ssp));
141 cmd->resp[0] = readl(ssp->base + HW_SSP_SDRESP3(ssp));
143 cmd->resp[0] = readl(ssp->base + HW_SSP_SDRESP0(ssp));
148 dma_unmap_sg(mmc_dev(host->mmc), data->sg,
149 data->sg_len, ssp->dma_dir);
151 * If there was an error on any block, we mark all
152 * data blocks as being in error.
155 data->bytes_xfered = data->blocks * data->blksz;
157 data->bytes_xfered = 0;
161 mxs_mmc_start_cmd(host, mrq->stop);
167 mmc_request_done(host->mmc, mrq);
170 static void mxs_mmc_dma_irq_callback(void *param)
172 struct mxs_mmc_host *host = param;
174 mxs_mmc_request_done(host);
177 static irqreturn_t mxs_mmc_irq_handler(int irq, void *dev_id)
179 struct mxs_mmc_host *host = dev_id;
180 struct mmc_command *cmd = host->cmd;
181 struct mmc_data *data = host->data;
182 struct mxs_ssp *ssp = &host->ssp;
185 spin_lock(&host->lock);
187 stat = readl(ssp->base + HW_SSP_CTRL1(ssp));
188 writel(stat & MXS_MMC_IRQ_BITS,
189 ssp->base + HW_SSP_CTRL1(ssp) + STMP_OFFSET_REG_CLR);
191 spin_unlock(&host->lock);
193 if ((stat & BM_SSP_CTRL1_SDIO_IRQ) && (stat & BM_SSP_CTRL1_SDIO_IRQ_EN))
194 mmc_signal_sdio_irq(host->mmc);
196 if (stat & BM_SSP_CTRL1_RESP_TIMEOUT_IRQ)
197 cmd->error = -ETIMEDOUT;
198 else if (stat & BM_SSP_CTRL1_RESP_ERR_IRQ)
202 if (stat & (BM_SSP_CTRL1_DATA_TIMEOUT_IRQ |
203 BM_SSP_CTRL1_RECV_TIMEOUT_IRQ))
204 data->error = -ETIMEDOUT;
205 else if (stat & BM_SSP_CTRL1_DATA_CRC_IRQ)
206 data->error = -EILSEQ;
207 else if (stat & (BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ |
208 BM_SSP_CTRL1_FIFO_OVERRUN_IRQ))
215 static struct dma_async_tx_descriptor *mxs_mmc_prep_dma(
216 struct mxs_mmc_host *host, unsigned long flags)
218 struct mxs_ssp *ssp = &host->ssp;
219 struct dma_async_tx_descriptor *desc;
220 struct mmc_data *data = host->data;
221 struct scatterlist * sgl;
226 dma_map_sg(mmc_dev(host->mmc), data->sg,
227 data->sg_len, ssp->dma_dir);
229 sg_len = data->sg_len;
232 sgl = (struct scatterlist *) ssp->ssp_pio_words;
233 sg_len = SSP_PIO_NUM;
236 desc = dmaengine_prep_slave_sg(ssp->dmach,
237 sgl, sg_len, ssp->slave_dirn, flags);
239 desc->callback = mxs_mmc_dma_irq_callback;
240 desc->callback_param = host;
243 dma_unmap_sg(mmc_dev(host->mmc), data->sg,
244 data->sg_len, ssp->dma_dir);
250 static void mxs_mmc_bc(struct mxs_mmc_host *host)
252 struct mxs_ssp *ssp = &host->ssp;
253 struct mmc_command *cmd = host->cmd;
254 struct dma_async_tx_descriptor *desc;
255 u32 ctrl0, cmd0, cmd1;
257 ctrl0 = BM_SSP_CTRL0_ENABLE | BM_SSP_CTRL0_IGNORE_CRC;
258 cmd0 = BF_SSP(cmd->opcode, CMD0_CMD) | BM_SSP_CMD0_APPEND_8CYC;
261 if (host->sdio_irq_en) {
262 ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
263 cmd0 |= BM_SSP_CMD0_CONT_CLKING_EN | BM_SSP_CMD0_SLOW_CLKING_EN;
266 ssp->ssp_pio_words[0] = ctrl0;
267 ssp->ssp_pio_words[1] = cmd0;
268 ssp->ssp_pio_words[2] = cmd1;
269 ssp->dma_dir = DMA_NONE;
270 ssp->slave_dirn = DMA_TRANS_NONE;
271 desc = mxs_mmc_prep_dma(host, DMA_CTRL_ACK);
275 dmaengine_submit(desc);
276 dma_async_issue_pending(ssp->dmach);
280 dev_warn(mmc_dev(host->mmc),
281 "%s: failed to prep dma\n", __func__);
284 static void mxs_mmc_ac(struct mxs_mmc_host *host)
286 struct mxs_ssp *ssp = &host->ssp;
287 struct mmc_command *cmd = host->cmd;
288 struct dma_async_tx_descriptor *desc;
289 u32 ignore_crc, get_resp, long_resp;
290 u32 ctrl0, cmd0, cmd1;
292 ignore_crc = (mmc_resp_type(cmd) & MMC_RSP_CRC) ?
293 0 : BM_SSP_CTRL0_IGNORE_CRC;
294 get_resp = (mmc_resp_type(cmd) & MMC_RSP_PRESENT) ?
295 BM_SSP_CTRL0_GET_RESP : 0;
296 long_resp = (mmc_resp_type(cmd) & MMC_RSP_136) ?
297 BM_SSP_CTRL0_LONG_RESP : 0;
299 ctrl0 = BM_SSP_CTRL0_ENABLE | ignore_crc | get_resp | long_resp;
300 cmd0 = BF_SSP(cmd->opcode, CMD0_CMD);
303 if (host->sdio_irq_en) {
304 ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
305 cmd0 |= BM_SSP_CMD0_CONT_CLKING_EN | BM_SSP_CMD0_SLOW_CLKING_EN;
308 ssp->ssp_pio_words[0] = ctrl0;
309 ssp->ssp_pio_words[1] = cmd0;
310 ssp->ssp_pio_words[2] = cmd1;
311 ssp->dma_dir = DMA_NONE;
312 ssp->slave_dirn = DMA_TRANS_NONE;
313 desc = mxs_mmc_prep_dma(host, DMA_CTRL_ACK);
317 dmaengine_submit(desc);
318 dma_async_issue_pending(ssp->dmach);
322 dev_warn(mmc_dev(host->mmc),
323 "%s: failed to prep dma\n", __func__);
326 static unsigned short mxs_ns_to_ssp_ticks(unsigned clock_rate, unsigned ns)
328 const unsigned int ssp_timeout_mul = 4096;
330 * Calculate ticks in ms since ns are large numbers
333 const unsigned int clock_per_ms = clock_rate / 1000;
334 const unsigned int ms = ns / 1000;
335 const unsigned int ticks = ms * clock_per_ms;
336 const unsigned int ssp_ticks = ticks / ssp_timeout_mul;
338 WARN_ON(ssp_ticks == 0);
342 static void mxs_mmc_adtc(struct mxs_mmc_host *host)
344 struct mmc_command *cmd = host->cmd;
345 struct mmc_data *data = cmd->data;
346 struct dma_async_tx_descriptor *desc;
347 struct scatterlist *sgl = data->sg, *sg;
348 unsigned int sg_len = data->sg_len;
351 unsigned short dma_data_dir, timeout;
352 enum dma_transfer_direction slave_dirn;
353 unsigned int data_size = 0, log2_blksz;
354 unsigned int blocks = data->blocks;
356 struct mxs_ssp *ssp = &host->ssp;
358 u32 ignore_crc, get_resp, long_resp, read;
359 u32 ctrl0, cmd0, cmd1, val;
361 ignore_crc = (mmc_resp_type(cmd) & MMC_RSP_CRC) ?
362 0 : BM_SSP_CTRL0_IGNORE_CRC;
363 get_resp = (mmc_resp_type(cmd) & MMC_RSP_PRESENT) ?
364 BM_SSP_CTRL0_GET_RESP : 0;
365 long_resp = (mmc_resp_type(cmd) & MMC_RSP_136) ?
366 BM_SSP_CTRL0_LONG_RESP : 0;
368 if (data->flags & MMC_DATA_WRITE) {
369 dma_data_dir = DMA_TO_DEVICE;
370 slave_dirn = DMA_MEM_TO_DEV;
373 dma_data_dir = DMA_FROM_DEVICE;
374 slave_dirn = DMA_DEV_TO_MEM;
375 read = BM_SSP_CTRL0_READ;
378 ctrl0 = BF_SSP(host->bus_width, CTRL0_BUS_WIDTH) |
379 ignore_crc | get_resp | long_resp |
380 BM_SSP_CTRL0_DATA_XFER | read |
381 BM_SSP_CTRL0_WAIT_FOR_IRQ |
384 cmd0 = BF_SSP(cmd->opcode, CMD0_CMD);
386 /* get logarithm to base 2 of block size for setting register */
387 log2_blksz = ilog2(data->blksz);
390 * take special care of the case that data size from data->sg
391 * is not equal to blocks x blksz
393 for_each_sg(sgl, sg, sg_len, i)
394 data_size += sg->length;
396 if (data_size != data->blocks * data->blksz)
399 /* xfer count, block size and count need to be set differently */
400 if (ssp_is_old(ssp)) {
401 ctrl0 |= BF_SSP(data_size, CTRL0_XFER_COUNT);
402 cmd0 |= BF_SSP(log2_blksz, CMD0_BLOCK_SIZE) |
403 BF_SSP(blocks - 1, CMD0_BLOCK_COUNT);
405 writel(data_size, ssp->base + HW_SSP_XFER_SIZE);
406 writel(BF_SSP(log2_blksz, BLOCK_SIZE_BLOCK_SIZE) |
407 BF_SSP(blocks - 1, BLOCK_SIZE_BLOCK_COUNT),
408 ssp->base + HW_SSP_BLOCK_SIZE);
411 if ((cmd->opcode == MMC_STOP_TRANSMISSION) ||
412 (cmd->opcode == SD_IO_RW_EXTENDED))
413 cmd0 |= BM_SSP_CMD0_APPEND_8CYC;
417 if (host->sdio_irq_en) {
418 ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
419 cmd0 |= BM_SSP_CMD0_CONT_CLKING_EN | BM_SSP_CMD0_SLOW_CLKING_EN;
422 /* set the timeout count */
423 timeout = mxs_ns_to_ssp_ticks(ssp->clk_rate, data->timeout_ns);
424 val = readl(ssp->base + HW_SSP_TIMING(ssp));
425 val &= ~(BM_SSP_TIMING_TIMEOUT);
426 val |= BF_SSP(timeout, TIMING_TIMEOUT);
427 writel(val, ssp->base + HW_SSP_TIMING(ssp));
430 ssp->ssp_pio_words[0] = ctrl0;
431 ssp->ssp_pio_words[1] = cmd0;
432 ssp->ssp_pio_words[2] = cmd1;
433 ssp->dma_dir = DMA_NONE;
434 ssp->slave_dirn = DMA_TRANS_NONE;
435 desc = mxs_mmc_prep_dma(host, 0);
440 WARN_ON(host->data != NULL);
442 ssp->dma_dir = dma_data_dir;
443 ssp->slave_dirn = slave_dirn;
444 desc = mxs_mmc_prep_dma(host, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
448 dmaengine_submit(desc);
449 dma_async_issue_pending(ssp->dmach);
452 dev_warn(mmc_dev(host->mmc),
453 "%s: failed to prep dma\n", __func__);
456 static void mxs_mmc_start_cmd(struct mxs_mmc_host *host,
457 struct mmc_command *cmd)
461 switch (mmc_cmd_type(cmd)) {
475 dev_warn(mmc_dev(host->mmc),
476 "%s: unknown MMC command\n", __func__);
481 static void mxs_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
483 struct mxs_mmc_host *host = mmc_priv(mmc);
485 WARN_ON(host->mrq != NULL);
487 mxs_mmc_start_cmd(host, mrq->cmd);
490 static void mxs_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
492 struct mxs_mmc_host *host = mmc_priv(mmc);
494 if (ios->bus_width == MMC_BUS_WIDTH_8)
496 else if (ios->bus_width == MMC_BUS_WIDTH_4)
502 mxs_ssp_set_clk_rate(&host->ssp, ios->clock);
505 static void mxs_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
507 struct mxs_mmc_host *host = mmc_priv(mmc);
508 struct mxs_ssp *ssp = &host->ssp;
511 spin_lock_irqsave(&host->lock, flags);
513 host->sdio_irq_en = enable;
516 writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
517 ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
518 writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
519 ssp->base + HW_SSP_CTRL1(ssp) + STMP_OFFSET_REG_SET);
521 writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
522 ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
523 writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
524 ssp->base + HW_SSP_CTRL1(ssp) + STMP_OFFSET_REG_CLR);
527 spin_unlock_irqrestore(&host->lock, flags);
529 if (enable && readl(ssp->base + HW_SSP_STATUS(ssp)) &
530 BM_SSP_STATUS_SDIO_IRQ)
531 mmc_signal_sdio_irq(host->mmc);
535 static const struct mmc_host_ops mxs_mmc_ops = {
536 .request = mxs_mmc_request,
537 .get_ro = mmc_gpio_get_ro,
538 .get_cd = mxs_mmc_get_cd,
539 .set_ios = mxs_mmc_set_ios,
540 .enable_sdio_irq = mxs_mmc_enable_sdio_irq,
543 static struct platform_device_id mxs_ssp_ids[] = {
546 .driver_data = IMX23_SSP,
549 .driver_data = IMX28_SSP,
554 MODULE_DEVICE_TABLE(platform, mxs_ssp_ids);
556 static const struct of_device_id mxs_mmc_dt_ids[] = {
557 { .compatible = "fsl,imx23-mmc", .data = (void *) IMX23_SSP, },
558 { .compatible = "fsl,imx28-mmc", .data = (void *) IMX28_SSP, },
561 MODULE_DEVICE_TABLE(of, mxs_mmc_dt_ids);
563 static int mxs_mmc_probe(struct platform_device *pdev)
565 const struct of_device_id *of_id =
566 of_match_device(mxs_mmc_dt_ids, &pdev->dev);
567 struct device_node *np = pdev->dev.of_node;
568 struct mxs_mmc_host *host;
569 struct mmc_host *mmc;
570 struct resource *iores;
571 int ret = 0, irq_err, gpio;
572 struct regulator *reg_vmmc;
573 enum of_gpio_flags flags;
577 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
578 irq_err = platform_get_irq(pdev, 0);
579 if (!iores || irq_err < 0)
582 mmc = mmc_alloc_host(sizeof(struct mxs_mmc_host), &pdev->dev);
586 host = mmc_priv(mmc);
588 ssp->dev = &pdev->dev;
589 ssp->base = devm_ioremap_resource(&pdev->dev, iores);
590 if (IS_ERR(ssp->base)) {
591 ret = PTR_ERR(ssp->base);
595 ssp->devid = (enum mxs_ssp_id) of_id->data;
598 host->sdio_irq_en = 0;
600 reg_vmmc = devm_regulator_get(&pdev->dev, "vmmc");
601 if (!IS_ERR(reg_vmmc)) {
602 ret = regulator_enable(reg_vmmc);
605 "Failed to enable vmmc regulator: %d\n", ret);
610 ssp->clk = devm_clk_get(&pdev->dev, NULL);
611 if (IS_ERR(ssp->clk)) {
612 ret = PTR_ERR(ssp->clk);
615 clk_prepare_enable(ssp->clk);
617 ret = mxs_mmc_reset(host);
619 dev_err(&pdev->dev, "Failed to reset mmc: %d\n", ret);
620 goto out_clk_disable;
623 ssp->dmach = dma_request_slave_channel(&pdev->dev, "rx-tx");
625 dev_err(mmc_dev(host->mmc),
626 "%s: failed to request dma\n", __func__);
628 goto out_clk_disable;
631 /* set mmc core parameters */
632 mmc->ops = &mxs_mmc_ops;
633 mmc->caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED |
634 MMC_CAP_SDIO_IRQ | MMC_CAP_NEEDS_POLL;
636 of_property_read_u32(np, "bus-width", &bus_width);
638 mmc->caps |= MMC_CAP_4_BIT_DATA;
639 else if (bus_width == 8)
640 mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA;
641 if (of_property_read_bool(np, "broken-cd"))
642 mmc->caps |= MMC_CAP_NEEDS_POLL;
643 if (of_property_read_bool(np, "non-removable"))
644 mmc->caps |= MMC_CAP_NONREMOVABLE;
645 gpio = of_get_named_gpio_flags(np, "wp-gpios", 0, &flags);
646 if (gpio_is_valid(gpio)) {
647 ret = mmc_gpio_request_ro(mmc, gpio);
649 goto out_clk_disable;
650 if (!(flags & OF_GPIO_ACTIVE_LOW))
651 mmc->caps2 |= MMC_CAP2_RO_ACTIVE_HIGH;
654 if (of_property_read_bool(np, "cd-inverted"))
655 mmc->caps2 |= MMC_CAP2_CD_ACTIVE_HIGH;
658 mmc->f_max = 288000000;
659 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
662 mmc->max_blk_size = 1 << 0xf;
663 mmc->max_blk_count = (ssp_is_old(ssp)) ? 0xff : 0xffffff;
664 mmc->max_req_size = (ssp_is_old(ssp)) ? 0xffff : 0xffffffff;
665 mmc->max_seg_size = dma_get_max_seg_size(ssp->dmach->device->dev);
667 platform_set_drvdata(pdev, mmc);
669 ret = devm_request_irq(&pdev->dev, irq_err, mxs_mmc_irq_handler, 0,
674 spin_lock_init(&host->lock);
676 ret = mmc_add_host(mmc);
680 dev_info(mmc_dev(host->mmc), "initialized\n");
686 dma_release_channel(ssp->dmach);
688 clk_disable_unprepare(ssp->clk);
694 static int mxs_mmc_remove(struct platform_device *pdev)
696 struct mmc_host *mmc = platform_get_drvdata(pdev);
697 struct mxs_mmc_host *host = mmc_priv(mmc);
698 struct mxs_ssp *ssp = &host->ssp;
700 mmc_remove_host(mmc);
703 dma_release_channel(ssp->dmach);
705 clk_disable_unprepare(ssp->clk);
713 static int mxs_mmc_suspend(struct device *dev)
715 struct mmc_host *mmc = dev_get_drvdata(dev);
716 struct mxs_mmc_host *host = mmc_priv(mmc);
717 struct mxs_ssp *ssp = &host->ssp;
719 clk_disable_unprepare(ssp->clk);
723 static int mxs_mmc_resume(struct device *dev)
725 struct mmc_host *mmc = dev_get_drvdata(dev);
726 struct mxs_mmc_host *host = mmc_priv(mmc);
727 struct mxs_ssp *ssp = &host->ssp;
729 clk_prepare_enable(ssp->clk);
733 static const struct dev_pm_ops mxs_mmc_pm_ops = {
734 .suspend = mxs_mmc_suspend,
735 .resume = mxs_mmc_resume,
739 static struct platform_driver mxs_mmc_driver = {
740 .probe = mxs_mmc_probe,
741 .remove = mxs_mmc_remove,
742 .id_table = mxs_ssp_ids,
745 .owner = THIS_MODULE,
747 .pm = &mxs_mmc_pm_ops,
749 .of_match_table = mxs_mmc_dt_ids,
753 module_platform_driver(mxs_mmc_driver);
755 MODULE_DESCRIPTION("FREESCALE MXS MMC peripheral");
756 MODULE_AUTHOR("Freescale Semiconductor");
757 MODULE_LICENSE("GPL");
758 MODULE_ALIAS("platform:" DRIVER_NAME);