drivers/mmc/host/rk2818-sdmmc.c

   1 /* drivers/mmc/host/rk2818-sdmmc.c
   2  *
   3  * Copyright (C) 2010 ROCKCHIP, Inc.
   4  *
   5  * This software is licensed under the terms of the GNU General Public
   6  * License version 2, as published by the Free Software Foundation, and
   7  * may be copied, distributed, and modified under those terms.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  */
  15 #include <linux/blkdev.h>
  16 #include <linux/clk.h>
  17 #include <linux/debugfs.h>
  18 #include <linux/device.h>
  19 #include <linux/dma-mapping.h>
  20 #include <linux/err.h>
  21 #include <linux/init.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/ioport.h>
  24 #include <linux/module.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/scatterlist.h>
  27 #include <linux/seq_file.h>
  28 #include <linux/stat.h>
  29 #include <linux/delay.h>
  30 #include <linux/irq.h>
  31 #include <linux/mmc/host.h>
  32 #include <linux/mmc/mmc.h>
  33
  34 #include <mach/board.h>
  35 #include <mach/rk2818_iomap.h>
  36 #include <mach/gpio.h>
  37 #include <asm/dma.h>
  38 #include <asm/scatterlist.h>
  39
  40 #include "rk2818-sdmmc.h"
  41
  42 struct mmc_host *wifi_mmc_host = NULL;
  43
  44 int  sdmmc0_disable_Irq_ForRemoval;
  45 int hotplug_global_ctl;
  46 struct rk2818_sdmmc_host *mmc0_host;
  47
  48
  49 #define RK2818_MCI_DATA_ERROR_FLAGS     (SDMMC_INT_DRTO | SDMMC_INT_DCRC | SDMMC_INT_HTO | SDMMC_INT_SBE | SDMMC_INT_EBE)
  50 #define RK2818_MCI_CMD_ERROR_FLAGS      (SDMMC_INT_RTO | SDMMC_INT_RCRC | SDMMC_INT_RE | SDMMC_INT_HLE)
  51 #define RK2818_MCI_ERROR_FLAGS          (RK2818_MCI_DATA_ERROR_FLAGS | RK2818_MCI_CMD_ERROR_FLAGS | SDMMC_INT_HLE)
  52 #define RK2818_MCI_SEND_STATUS          1
  53 #define RK2818_MCI_RECV_STATUS          2
  54 #define RK2818_MCI_DMA_THRESHOLD        16
  55
  56 enum {
  57         EVENT_CMD_COMPLETE = 0,
  58         EVENT_XFER_COMPLETE,
  59         EVENT_DATA_COMPLETE,
  60         EVENT_DATA_ERROR,
  61         EVENT_XFER_ERROR
  62 };
  63
  64
  65 enum rk2818_sdmmc_state {
  66         STATE_IDLE = 0,
  67         STATE_SENDING_CMD,
  68         STATE_SENDING_DATA,
  69         STATE_DATA_BUSY,
  70         STATE_SENDING_STOP,
  71         STATE_DATA_ERROR,
  72 };
  73
  74 struct rk2818_sdmmc_host {
  75         struct device           *dev;
  76         struct clk              *clk;
  77         spinlock_t              lock;
  78         void __iomem            *regs;
  79
  80         struct scatterlist      *sg;
  81         unsigned int            pio_offset;
  82         struct resource         *mem;
  83         struct mmc_request      *mrq;
  84         struct mmc_command      *cmd;
  85         struct mmc_data         *data;
  86
  87         int                             dma_chn;
  88         int                     id;
  89         unsigned int    use_dma:1;
  90         unsigned int    no_detect:1;
  91         char                    dma_name[8];
  92
  93         u32                     cmd_status;
  94         u32                     data_status;
  95         u32                     stop_cmdr;
  96         u32                     dir_status;
  97         struct tasklet_struct   tasklet;
  98         unsigned long           pending_events;
  99         unsigned long           completed_events;
 100         enum rk2818_sdmmc_state state;
 101         struct list_head        queue;
 102
 103         u32                     bus_hz;
 104         u32                     current_speed;
 105         struct platform_device  *pdev;
 106
 107         struct mmc_host         *mmc;
 108         u32                     ctype;
 109
 110         struct list_head        queue_node;
 111
 112         unsigned int            clock;
 113         unsigned long           flags;
 114 #define RK2818_MMC_CARD_PRESENT 0
 115 #define RK2818_MMC_CARD_NEED_INIT       1
 116 #define RK2818_MMC_SHUTDOWN             2
 117         int                     irq;
 118         unsigned int cmd_tmo;
 119         struct mmc_command stop_mannual;
 120
 121         struct timer_list       detect_timer;
 122 };
 123
 124 #define MMC_DEBUG 0
 125 #if MMC_DEBUG
 126 #define xjhprintk(msg...) printk(msg)
 127 #else
 128 #define xjhprintk(msg...)
 129 #endif
 130
 131 #define rk2818_sdmmc_test_and_clear_pending(host, event)                \
 132         test_and_clear_bit(event, &host->pending_events)
 133 #define rk2818_sdmmc_set_completed(host, event)                 \
 134         set_bit(event, &host->completed_events)
 135
 136 #define rk2818_sdmmc_set_pending(host, event)                           \
 137         set_bit(event, &host->pending_events)
 138
 139 static void rk2818_sdmmc_read_data_pio(struct rk2818_sdmmc_host *host);
 140 #if defined (CONFIG_DEBUG_FS)
 141
 142 static int rk2818_sdmmc_req_show(struct seq_file *s, void *v)
 143 {
 144         struct rk2818_sdmmc_host        *host = s->private;
 145         struct mmc_request      *mrq;
 146         struct mmc_command      *cmd;
 147         struct mmc_command      *stop;
 148         struct mmc_data         *data;
 149
 150         spin_lock(&host->lock);
 151         mrq = host->mrq;
 152
 153         if (mrq) {
 154                 cmd = mrq->cmd;
 155                 data = mrq->data;
 156                 stop = mrq->stop;
 157
 158                 if (cmd)
 159                         seq_printf(s,
 160                                 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
 161                                 cmd->opcode, cmd->arg, cmd->flags,
 162                                 cmd->resp[0], cmd->resp[1], cmd->resp[2],
 163                                 cmd->resp[2], cmd->error);
 164                 if (data)
 165                         seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
 166                                 data->bytes_xfered, data->blocks,
 167                                 data->blksz, data->flags, data->error);
 168                 if (stop)
 169                         seq_printf(s,
 170                                 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
 171                                 stop->opcode, stop->arg, stop->flags,
 172                                 stop->resp[0], stop->resp[1], stop->resp[2],
 173                                 stop->resp[2], stop->error);
 174         }
 175
 176         spin_unlock(&host->lock);
 177
 178         return 0;
 179 }
 180
 181 static int rk2818_sdmmc_req_open(struct inode *inode, struct file *file)
 182 {
 183         return single_open(file, rk2818_sdmmc_req_show, inode->i_private);
 184 }
 185
 186 static const struct file_operations rk2818_sdmmc_req_fops = {
 187         .owner          = THIS_MODULE,
 188         .open           = rk2818_sdmmc_req_open,
 189         .read           = seq_read,
 190         .llseek         = seq_lseek,
 191         .release        = single_release,
 192 };
 193
 194 static int rk2818_sdmmc_regs_show(struct seq_file *s, void *v)
 195 {
 196         struct rk2818_sdmmc_host        *host = s->private;
 197
 198         seq_printf(s, "STATUS:   0x%08x\n",readl(host->regs + SDMMC_STATUS));
 199         seq_printf(s, "RINTSTS:  0x%08x\n",readl(host->regs + SDMMC_RINTSTS));
 200         seq_printf(s, "CMD:      0x%08x\n", readl(host->regs + SDMMC_CMD));
 201         seq_printf(s, "CTRL:     0x%08x\n", readl(host->regs + SDMMC_CTRL));
 202         seq_printf(s, "INTMASK:  0x%08x\n", readl(host->regs + SDMMC_INTMASK));
 203         seq_printf(s, "CLKENA:   0x%08x\n", readl(host->regs + SDMMC_CLKENA));
 204
 205         return 0;
 206 }
 207
 208 static int rk2818_sdmmc_regs_open(struct inode *inode, struct file *file)
 209 {
 210         return single_open(file, rk2818_sdmmc_regs_show, inode->i_private);
 211 }
 212
 213 static const struct file_operations rk2818_sdmmc_regs_fops = {
 214         .owner          = THIS_MODULE,
 215         .open           = rk2818_sdmmc_regs_open,
 216         .read           = seq_read,
 217         .llseek         = seq_lseek,
 218         .release        = single_release,
 219 };
 220
 221 static void rk2818_sdmmc_init_debugfs(struct rk2818_sdmmc_host *host)
 222 {
 223         struct mmc_host         *mmc = host->mmc;
 224         struct dentry           *root;
 225         struct dentry           *node;
 226
 227         root = mmc->debugfs_root;
 228         if (!root)
 229                 return;
 230
 231         node = debugfs_create_file("regs", S_IRUSR, root, host,
 232                         &rk2818_sdmmc_regs_fops);
 233         if (IS_ERR(node))
 234                 return;
 235         if (!node)
 236                 goto err;
 237
 238         node = debugfs_create_file("req", S_IRUSR, root, host, &rk2818_sdmmc_req_fops);
 239         if (!node)
 240                 goto err;
 241
 242         node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state);
 243         if (!node)
 244                 goto err;
 245
 246         node = debugfs_create_x32("pending_events", S_IRUSR, root,
 247                                      (u32 *)&host->pending_events);
 248         if (!node)
 249                 goto err;
 250
 251         node = debugfs_create_x32("completed_events", S_IRUSR, root,
 252                                      (u32 *)&host->completed_events);
 253         if (!node)
 254                 goto err;
 255
 256         return;
 257
 258 err:
 259         dev_err(&mmc->class_dev, "failed to initialize debugfs for host\n");
 260 }
 261 #endif
 262 static void rk2818_show_regs(struct rk2818_sdmmc_host *host)
 263 {
 264         unsigned long cpsr_tmp;
 265
 266         xjhprintk("--------[xjh] SD/MMC/SDIO Registers-----------------\n");
 267         xjhprintk("SDMMC_CTRL:\t0x%x\n",readl(host->regs + SDMMC_CTRL));
 268         xjhprintk("SDMMC_PWREN:\t0x%x\n",readl(host->regs + SDMMC_PWREN));
 269         xjhprintk("SDMMC_CLKDIV:\t0x%x\n",readl(host->regs + SDMMC_CLKDIV));
 270         xjhprintk("SDMMC_CLKSRC:\t0x%x\n",readl(host->regs + SDMMC_CLKSRC));
 271         xjhprintk("SDMMC_CLKENA:\t0x%x\n",readl(host->regs + SDMMC_CLKENA));
 272         xjhprintk("SDMMC_TMOUT:\t0x%x\n",readl(host->regs + SDMMC_TMOUT));
 273         xjhprintk("SDMMC_CTYPE:\t0x%x\n",readl(host->regs + SDMMC_CTYPE));
 274         xjhprintk("SDMMC_BLKSIZ:\t0x%x\n",readl(host->regs + SDMMC_BLKSIZ));
 275         xjhprintk("SDMMC_BYTCNT:\t0x%x\n",readl(host->regs + SDMMC_BYTCNT));
 276         xjhprintk("SDMMC_INTMASK:\t0x%x\n",readl(host->regs + SDMMC_INTMASK));
 277         xjhprintk("SDMMC_CMDARG:\t0x%x\n",readl(host->regs + SDMMC_CMDARG));
 278         xjhprintk("SDMMC_CMD:\t0x%x\n",readl(host->regs + SDMMC_CMD));
 279         xjhprintk("SDMMC_RESP0:\t0x%x\n",readl(host->regs + SDMMC_RESP0));
 280         xjhprintk("SDMMC_RESP1:\t0x%x\n",readl(host->regs + SDMMC_RESP1));
 281         xjhprintk("SDMMC_RESP2:\t0x%x\n",readl(host->regs + SDMMC_RESP2));
 282         xjhprintk("SDMMC_RESP3:\t0x%x\n",readl(host->regs + SDMMC_RESP3));
 283         xjhprintk("SDMMC_MINTSTS:\t0x%x\n",readl(host->regs + SDMMC_MINTSTS));
 284         xjhprintk("SDMMC_RINTSTS:\t0x%x\n",readl(host->regs + SDMMC_RINTSTS));
 285         xjhprintk("SDMMC_STATUS:\t0x%x\n",readl(host->regs + SDMMC_STATUS));
 286         xjhprintk("SDMMC_FIFOTH:\t0x%x\n",readl(host->regs + SDMMC_FIFOTH));
 287         xjhprintk("SDMMC_CDETECT:\t0x%x\n",readl(host->regs + SDMMC_CDETECT));
 288         xjhprintk("SDMMC_WRTPRT:\t0x%x\n",readl(host->regs + SDMMC_WRTPRT));
 289         xjhprintk("SDMMC_TCBCNT:\t0x%x\n",readl(host->regs + SDMMC_TCBCNT));
 290         xjhprintk("SDMMC_TBBCNT:\t0x%x\n",readl(host->regs + SDMMC_TBBCNT));
 291         xjhprintk("SDMMC_DEBNCE:\t0x%x\n",readl(host->regs + SDMMC_DEBNCE));
 292         xjhprintk("-------- Host states-----------------\n");
 293         xjhprintk("host->state:\t0x%x\n",host->state);
 294         xjhprintk("host->pending_events:\t0x%x\n",host->pending_events);
 295         xjhprintk("host->cmd_status:\t0x%x\n",host->cmd_status);
 296         xjhprintk("host->data_status:\t0x%x\n",host->data_status);
 297         xjhprintk("host->stop_cmdr:\t0x%x\n",host->stop_cmdr);
 298         xjhprintk("host->dir_status:\t0x%x\n",host->dir_status);
 299         xjhprintk("host->completed_events:\t0x%x\n",host->completed_events);
 300         xjhprintk("host->dma_chn:\t0x%x\n",host->dma_chn);
 301         xjhprintk("host->use_dma:\t0x%x\n",host->use_dma);
 302         xjhprintk("host->no_detect:\t0x%x\n",host->no_detect);
 303         xjhprintk("host->bus_hz:\t0x%x\n",host->bus_hz);
 304         xjhprintk("host->current_speed:\t0x%x\n",host->current_speed);
 305         xjhprintk("host->ctype:\t0x%x\n",host->ctype);
 306         xjhprintk("host->clock:\t0x%x\n",host->clock);
 307         xjhprintk("host->flags:\t0x%x\n",host->flags);
 308         xjhprintk("host->irq:\t0x%x\n",host->irq);
 309         xjhprintk("-------- rk2818 CPU register-----------------\n");
 310         __asm__ volatile ("mrs  %0, cpsr                @ local_irq_save\n":"=r" (cpsr_tmp)::"memory", "cc" );
 311         xjhprintk("cpsr:\t0x%x\n",cpsr_tmp);
 312
 313
 314
 315 }
 316
 317 static void rk2818_sdmmc_set_power(struct rk2818_sdmmc_host *host, u32 ocr_avail)
 318 {
 319         if(ocr_avail == 0)
 320                 writel(0, host->regs + SDMMC_PWREN);
 321         else
 322                 writel(1, host->regs + SDMMC_PWREN);
 323 }
 324 static inline unsigned ns_to_clocks(unsigned clkrate, unsigned ns)
 325 {
 326         u32 clks;
 327         if (clkrate > 1000000)
 328                 clks =  (ns * (clkrate / 1000000) + 999) / 1000;
 329         else
 330                 clks =  ((ns/1000) * (clkrate / 1000) + 999) / 1000;
 331
 332         return clks;
 333 }
 334
 335 static void rk2818_sdmmc_set_timeout(struct rk2818_sdmmc_host *host, struct mmc_data *data)
 336 {
 337         unsigned timeout;
 338
 339         timeout = ns_to_clocks(host->clock, data->timeout_ns) + data->timeout_clks;
 340
 341         dev_dbg(host->dev, "tmo req:%d + %d reg:%d clk:%d\n",
 342                 data->timeout_ns, data->timeout_clks, timeout, host->clock);
 343         writel((timeout << 8) | (80), host->regs + SDMMC_TMOUT);
 344 }
 345
 346 static u32 rk2818_sdmmc_prepare_command(struct mmc_host *mmc,
 347                                  struct mmc_command *cmd)
 348 {
 349         struct mmc_data *data;
 350         u32             cmdr;
 351
 352         cmd->error = -EINPROGRESS;
 353         cmdr = cmd->opcode;
 354
 355         if(cmdr == 12)
 356                 cmdr |= SDMMC_CMD_STOP;
 357         else if(cmdr == 13)
 358                 cmdr &= ~SDMMC_CMD_PRV_DAT_WAIT;
 359         else
 360                 cmdr |= SDMMC_CMD_PRV_DAT_WAIT;
 361
 362         if (cmd->flags & MMC_RSP_PRESENT) {
 363                 cmdr |= SDMMC_CMD_RESP_EXP; // expect the respond, need to set this bit
 364                 if (cmd->flags & MMC_RSP_136)
 365                         cmdr |= SDMMC_CMD_RESP_LONG; // expect long respond
 366
 367                 if(cmd->flags & MMC_RSP_CRC)
 368                         cmdr |= SDMMC_CMD_RESP_CRC;
 369         }
 370
 371         data = cmd->data;
 372         if (data) {
 373                 cmdr |= SDMMC_CMD_DAT_EXP;
 374                 if (data->flags & MMC_DATA_STREAM)
 375                         cmdr |= SDMMC_CMD_STRM_MODE; //  set stream mode
 376                 if (data->flags & MMC_DATA_WRITE)
 377                     cmdr |= SDMMC_CMD_DAT_WR;
 378
 379         }
 380         return cmdr;
 381 }
 382
 383
 384 static void rk2818_sdmmc_start_command(struct rk2818_sdmmc_host *host,
 385                 struct mmc_command *cmd, u32 cmd_flags)
 386 {
 387         int tmo = 5000;
 388         unsigned long flags;
 389         int retry = 4;
 390         host->cmd = cmd;
 391         dev_dbg(host->dev, "start cmd:%d ARGR=0x%08x CMDR=0x%08x\n",
 392                                         cmd->opcode, cmd->arg, cmd_flags);
 393         local_irq_save(flags);
 394         writel(cmd->arg, host->regs + SDMMC_CMDARG); // write to CMDARG register
 395         writel(cmd_flags | SDMMC_CMD_START, host->regs + SDMMC_CMD); // write to CMD register
 396         local_irq_restore(flags);
 397
 398         /* wait until CIU accepts the command */
 399         while (--tmo && (readl(host->regs + SDMMC_CMD) & SDMMC_CMD_START))
 400                 cpu_relax();
 401         if(!tmo) {
 402                 tmo = 5000;
 403                 xjhprintk("%s start cmd %d error. retry again!!!\n",__FUNCTION__ ,cmd->opcode);
 404                 rk2818_show_regs(host);
 405                 rk2818_sdmmc_set_completed(host, EVENT_CMD_COMPLETE);
 406                 host->cmd_status |= SDMMC_INT_RE;
 407                 tasklet_schedule(&host->tasklet);
 408                 retry --;
 409         //      if(retry)
 410         //              goto START_CMD;
 411         }
 412         #if 0
 413         tmo = 60;
 414         host->cmd_tmo = 0;
 415         while(--tmo && !host->cmd_tmo)
 416         {
 417                 mdelay(5);
 418                 //cpu_relax();
 419
 420         }
 421         if(!tmo)
 422         {
 423                 xjhprintk("cmd %d response time out(not receive INT)\n",cmd->opcode);
 424                 rk2818_sdmmc_set_completed(host, EVENT_CMD_COMPLETE);
 425                 host->cmd_status |= SDMMC_INT_RE;
 426                 tasklet_schedule(&host->tasklet);
 427         }
 428         #endif
 429 }
 430
 431 static void send_stop_cmd(struct rk2818_sdmmc_host *host, struct mmc_data *data)
 432 {
 433         unsigned long flags;
 434         unsigned long fifo_left;
 435         /*µÈ´ýÇ°Ãæ´«Êä´¦ÀíÍê³É*/
 436         int time_out =60;
 437         while(readl(host->regs + SDMMC_STATUS) & (SDMMC_STAUTS_DATA_BUSY)) {
 438                 mdelay(5);
 439                 time_out --;
 440
 441                 if(!time_out){
 442                         time_out =60;
 443                         xjhprintk("card busy now,can not issuse req! \nreset DMA and FIFO\n");
 444                          local_irq_save(flags);
 445
 446                 //      writel(readl(host->regs + SDMMC_CTRL) | ( SDMMC_CTRL_DMA_RESET )  & ~SDMMC_CTRL_DMA_ENABLE, host->regs + SDMMC_CTRL);
 447                         /* wait till resets clear */
 448                 //      while (readl(host->regs + SDMMC_CTRL) & ( SDMMC_CTRL_DMA_RESET));
 449
 450                         writel(readl(host->regs + SDMMC_CTRL) | ( SDMMC_CTRL_FIFO_RESET ), host->regs + SDMMC_CTRL);
 451                          /* wait till resets clear */
 452                         while (readl(host->regs + SDMMC_CTRL) & ( SDMMC_CTRL_FIFO_RESET));
 453                          local_irq_restore(flags);
 454                 }
 455                 //cpu_relax();
 456         }
 457
 458         #if 1
 459
 460         fifo_left = readl(host->regs + SDMMC_STATUS);
 461
 462         if((fifo_left & SDMMC_STAUTS_FIFO_FULL) && (fifo_left & SDMMC_STAUTS_FIFO_RX_WATERMARK))
 463         {
 464                 xjhprintk("%s read operation reach water mark\n",__FUNCTION__);
 465                 rk2818_show_regs(host);
 466                 while(SDMMC_GET_FCNT(readl(host->regs + SDMMC_STATUS))>>2)
 467                         readl(host->regs + SDMMC_DATA);         //discard the no use data
 468
 469                 rk2818_show_regs(host);
 470
 471         }
 472         #endif
 473         /*¼ì²éFIFO,Èç¹û²»Îª¿Õ£¬Çå¿Õ*/
 474         if(!(readl(host->regs + SDMMC_STATUS) & SDMMC_STAUTS_FIFO_EMPTY)) {
 475                 xjhprintk("%s: FIFO not empty, clear it\n",__FUNCTION__);
 476                 rk2818_show_regs(host);
 477                  local_irq_save(flags);
 478         //      writel(readl(host->regs + SDMMC_CTRL) | ( SDMMC_CTRL_DMA_RESET ), host->regs + SDMMC_CTRL);
 479                 /* wait till resets clear */
 480         //      while (readl(host->regs + SDMMC_CTRL) & ( SDMMC_CTRL_DMA_RESET));
 481
 482                 writel(readl(host->regs + SDMMC_CTRL) | ( SDMMC_CTRL_FIFO_RESET ), host->regs + SDMMC_CTRL);
 483                  /* wait till resets clear */
 484                 while (readl(host->regs + SDMMC_CTRL) & ( SDMMC_CTRL_FIFO_RESET));
 485                  local_irq_restore(flags);
 486                 //cpu_relax();
 487         }
 488
 489         rk2818_sdmmc_start_command(host, data->stop, host->stop_cmdr);
 490 }
 491
 492 static void rk2818_sdmmc_dma_cleanup(struct rk2818_sdmmc_host *host)
 493 {
 494         struct mmc_data                 *data = host->data;
 495         if (data)
 496                 dma_unmap_sg(host->dev, data->sg, data->sg_len,
 497                      ((data->flags & MMC_DATA_WRITE)? DMA_TO_DEVICE : DMA_FROM_DEVICE));
 498 }
 499
 500 static void rk2818_sdmmc_stop_dma(struct rk2818_sdmmc_host *host)
 501 {
 502         if (host->dma_chn >= 0) {
 503                 xjhprintk("[xjh] %s enter host->state %d\n", __FUNCTION__, host->state);
 504                 writel(readl(host->regs + SDMMC_CTRL) & ~SDMMC_CTRL_DMA_ENABLE,
 505                                 host->regs +SDMMC_CTRL);
 506                 //disable_dma(host->dma_chn);
 507                 if (strncmp(host->dma_name, "sdio", strlen("sdio")) != 0)
 508                         free_dma(host->dma_chn);
 509                 host->dma_chn = -1;
 510                 rk2818_sdmmc_dma_cleanup(host);
 511                 rk2818_sdmmc_set_pending(host, EVENT_XFER_COMPLETE);//[xjh]  Èç¹ûÊý¾Ý¶ÁÐ´¹ý³Ì±»°Îµô£¬ÐèÒªÉèÖÃÕâ¸ö×´Ì¬
 512                 xjhprintk("[xjh] %s exit\n", __FUNCTION__);
 513         } else {
 514                 /* Data transfer was stopped by the interrupt handler */
 515                 rk2818_sdmmc_set_pending(host, EVENT_XFER_COMPLETE);
 516         }
 517 }
 518
 519 /* This function is called by the DMA driver from tasklet context. */
 520 static void rk2818_sdmmc_dma_complete(int chn, void *arg)
 521 {
 522         struct rk2818_sdmmc_host        *host = arg;
 523         struct mmc_data         *data = host->data;
 524
 525         dev_dbg(host->dev, "DMA complete\n");
 526
 527         spin_lock(&host->lock);
 528         //disable dma
 529         writel(readl(host->regs + SDMMC_CTRL) & ~SDMMC_CTRL_DMA_ENABLE,
 530                                 host->regs +SDMMC_CTRL);
 531         rk2818_sdmmc_dma_cleanup(host);
 532         //disable_dma(host->dma_chn);
 533         if (strncmp(host->dma_name, "sdio", strlen("sdio")) != 0)
 534                 free_dma(host->dma_chn);
 535         host->dma_chn = -1;
 536         if (data) {
 537
 538                 rk2818_sdmmc_set_pending(host, EVENT_XFER_COMPLETE);
 539                 tasklet_schedule(&host->tasklet);
 540         }
 541         spin_unlock(&host->lock);
 542 }
 543 static int rk2818_sdmmc_submit_data_dma(struct rk2818_sdmmc_host *host, struct mmc_data *data)
 544 {
 545         struct scatterlist              *sg;
 546         unsigned int                    i;
 547         dev_dbg(host->dev, "sg_len=%d\n", data->sg_len);
 548         host->dma_chn = -1;
 549         if(host->use_dma == 0)
 550                 return -ENOSYS;
 551 #if 0
 552         if (data->blocks * data->blksz < RK2818_MCI_DMA_THRESHOLD)
 553                 return -EINVAL;
 554 #endif
 555         if (data->blksz & 3)
 556                 return -EINVAL;
 557         for_each_sg(data->sg, sg, data->sg_len, i) {
 558                 if (sg->offset & 3 || sg->length & 3)
 559                         return -EINVAL;
 560         }
 561         if (strncmp(host->dma_name, "sdio", strlen("sdio")) != 0) {
 562                 for(i = 0; i < MAX_SG_CHN; i++) {
 563                         if(request_dma(i, host->dma_name) == 0) {
 564                                 host->dma_chn = i;
 565                                 break;
 566                         }
 567                 }
 568                 if(i == MAX_SG_CHN)
 569                         return -EINVAL;
 570         }
 571         else
 572                 host->dma_chn = 1;
 573         dma_map_sg(host->dev, data->sg, data->sg_len,
 574                         (data->flags & MMC_DATA_READ)? DMA_FROM_DEVICE : DMA_TO_DEVICE);
 575         for_each_sg(data->sg, sg, data->sg_len, i) {
 576                 dev_dbg(host->dev, "sg[%d]  addr: 0x%08x, len: %d", i, sg->dma_address, sg->length);
 577         }
 578         set_dma_sg(host->dma_chn, data->sg, data->sg_len);
 579         //printk("2.....\n");
 580         set_dma_mode(host->dma_chn,
 581                                 (data->flags & MMC_DATA_READ)? DMA_MODE_READ : DMA_MODE_WRITE);
 582         //printk("3.....\n");
 583         set_dma_handler(host->dma_chn, rk2818_sdmmc_dma_complete, (void *)host, DMA_IRQ_DELAY_MODE);
 584         //printk("4.....\n");
 585         writel(readl(host->regs + SDMMC_CTRL) | SDMMC_CTRL_DMA_ENABLE,
 586                                 host->regs +SDMMC_CTRL);
 587         //printk("5.....\n");
 588         enable_dma(host->dma_chn);
 589         //printk("6.....\n");
 590         dev_dbg(host->dev,"DMA enable, \n");
 591         return 0;
 592 }
 593
 594 static void rk2818_sdmmc_submit_data(struct rk2818_sdmmc_host *host, struct mmc_data *data)
 595 {
 596         data->error = -EINPROGRESS;
 597
 598         WARN_ON(host->data);
 599         host->sg = NULL;
 600         host->data = data;
 601
 602         if (rk2818_sdmmc_submit_data_dma(host, data)) {
 603                 host->sg = data->sg;
 604                 host->pio_offset = 0;
 605                 if (data->flags & MMC_DATA_READ)
 606                         host->dir_status = RK2818_MCI_RECV_STATUS;
 607                 else
 608                         host->dir_status = RK2818_MCI_SEND_STATUS;
 609                 writel(readl(host->regs + SDMMC_CTRL) & ~SDMMC_CTRL_DMA_ENABLE,
 610                                 host->regs +SDMMC_CTRL);
 611         }
 612 }
 613 #if 0
 614 #define mci_send_cmd(host,cmd,arg) {    \
 615     writel(arg, host->regs + SDMMC_CMDARG);             \
 616     writel(SDMMC_CMD_START | cmd, host->regs + SDMMC_CMD);              \
 617     while (readl(host->regs + SDMMC_CMD) & SDMMC_CMD_START); \
 618 }
 619 #else
 620 static void mci_send_cmd(struct rk2818_sdmmc_host *host,unsigned int cmd,int arg)
 621 {
 622         int tmo = 5000;
 623         int retry = 4;
 624
 625     writel(arg, host->regs + SDMMC_CMDARG);
 626     writel(SDMMC_CMD_START | cmd, host->regs + SDMMC_CMD);
 627         while (--tmo && readl(host->regs + SDMMC_CMD) & SDMMC_CMD_START);
 628         if(!tmo) {
 629                 tmo = 5000;
 630                 xjhprintk("%s set register error. retry again!!!\n",__FUNCTION__);
 631                 retry --;
 632         //      if(retry)
 633         //              goto START_CMD;
 634         }
 635 }
 636
 637 #endif
 638
 639 #if 1
 640 void inline rk2818_sdmmc_setup_bus(struct rk2818_sdmmc_host *host)
 641 {
 642         ;
 643 }
 644 #else
 645 void rk2818_sdmmc_setup_bus(struct rk2818_sdmmc_host *host)
 646 {
 647         u32 div;
 648
 649         if (host->clock != host->current_speed) {
 650                 div  = (((host->bus_hz + (host->bus_hz / 5)) / host->clock)) >> 1;
 651
 652                 dev_dbg(host->dev, "Bus speed = %dHz div:%d (actual %dHz)\n",
 653                         host->clock, div, (host->bus_hz / div) >> 1);
 654                 xjhprintk("Bus speed = %dHz div:%d (actual %dHz)\n",
 655                         host->clock, div, (host->bus_hz / div) >> 1);
 656
 657                 /* store the actual clock for calculations */
 658                 host->clock = (host->bus_hz / div) >> 1;
 659                 /* disable clock */
 660                 writel(0, host->regs + SDMMC_CLKENA);
 661                 writel(0, host->regs + SDMMC_CLKSRC);
 662                 /* inform CIU */
 663                 mci_send_cmd(host, SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0);
 664                 /* set clock to desired speed */
 665                 writel(div, host->regs + SDMMC_CLKDIV);
 666                 /* inform CIU */
 667                 mci_send_cmd(host, SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0);
 668                 /* enable clock */
 669                 writel(SDMMC_CLKEN_ENABLE, host->regs + SDMMC_CLKENA);
 670                 /* inform CIU */
 671                  mci_send_cmd(host, SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0);
 672
 673                 host->current_speed = host->clock;
 674         }
 675
 676         /* Set the current host bus width */
 677         writel(host->ctype, host->regs + SDMMC_CTYPE);
 678 }
 679 #endif
 680
 681
 682 static void rk2818_sdmmc_start_request(struct rk2818_sdmmc_host *host)
 683 {
 684         struct mmc_request      *mrq;
 685         struct mmc_command      *cmd;
 686         struct mmc_data         *data;
 687         u32                     cmdflags;
 688         unsigned long flags;
 689
 690         int time_out =60;
 691
 692         mrq = host->mrq;
 693
 694         //rk2818_sdmmc_setup_bus(host);
 695
 696         /*µÈ´ýÇ°Ãæ´«Êä´¦ÀíÍê³É*/
 697         while(readl(host->regs + SDMMC_STATUS) & (SDMMC_STAUTS_DATA_BUSY)) {
 698                 mdelay(5);
 699                 time_out --;
 700
 701                 if(!time_out){
 702                         time_out =60;
 703                         xjhprintk("card busy now,can not issuse req! \nreset DMA and FIFO\n");
 704                          local_irq_save(flags);
 705
 706                 //      writel(readl(host->regs + SDMMC_CTRL) | ( SDMMC_CTRL_DMA_RESET )  & ~SDMMC_CTRL_DMA_ENABLE, host->regs + SDMMC_CTRL);
 707                         /* wait till resets clear */
 708                 //      while (readl(host->regs + SDMMC_CTRL) & ( SDMMC_CTRL_DMA_RESET));
 709
 710                         writel(readl(host->regs + SDMMC_CTRL) | ( SDMMC_CTRL_FIFO_RESET ), host->regs + SDMMC_CTRL);
 711                          /* wait till resets clear */
 712                         while (readl(host->regs + SDMMC_CTRL) & ( SDMMC_CTRL_FIFO_RESET));
 713                          local_irq_restore(flags);
 714                 }
 715                 //cpu_relax();
 716         }
 717         /*¼ì²éFIFO,Èç¹û²»Îª¿Õ£¬Çå¿Õ*/
 718         if(!(readl(host->regs + SDMMC_STATUS) & SDMMC_STAUTS_FIFO_EMPTY)) {
 719                 xjhprintk("%s: FIFO not empty, clear it\n",__FUNCTION__);
 720                 rk2818_show_regs(host);
 721                  local_irq_save(flags);
 722         //      writel(readl(host->regs + SDMMC_CTRL) | ( SDMMC_CTRL_DMA_RESET ), host->regs + SDMMC_CTRL);
 723                 /* wait till resets clear */
 724         //      while (readl(host->regs + SDMMC_CTRL) & ( SDMMC_CTRL_DMA_RESET));
 725
 726                 writel(readl(host->regs + SDMMC_CTRL) | ( SDMMC_CTRL_FIFO_RESET ), host->regs + SDMMC_CTRL);
 727                  /* wait till resets clear */
 728                 while (readl(host->regs + SDMMC_CTRL) & ( SDMMC_CTRL_FIFO_RESET));
 729                  local_irq_restore(flags);
 730                 //cpu_relax();
 731         }
 732
 733         host->mrq = mrq;
 734
 735         host->pending_events = 0;
 736         host->completed_events = 0;
 737         host->data_status = 0;
 738
 739         data = mrq->data;
 740         if (data) {
 741                 rk2818_sdmmc_set_timeout(host, data);
 742                 writel(data->blksz * data->blocks, host->regs + SDMMC_BYTCNT);
 743                 writel(data->blksz, host->regs + SDMMC_BLKSIZ);
 744         }
 745
 746         cmd = mrq->cmd;
 747         cmdflags = rk2818_sdmmc_prepare_command(host->mmc, cmd);
 748
 749         if (unlikely(test_and_clear_bit(RK2818_MMC_CARD_NEED_INIT, &host->flags)))
 750             cmdflags |= SDMMC_CMD_INIT;
 751
 752         if (data)
 753                 rk2818_sdmmc_submit_data(host, data);
 754
 755         rk2818_sdmmc_start_command(host, cmd, cmdflags);
 756         if (mrq->stop)
 757         {
 758                 host->stop_cmdr = rk2818_sdmmc_prepare_command(host->mmc, mrq->stop);
 759                 dev_dbg(host->dev, "mrq stop: stop_cmdr = %d", host->stop_cmdr);
 760         }
 761
 762 }
 763
 764
 765
 766 static void rk2818_sdmmc_queue_request(struct rk2818_sdmmc_host *host, struct mmc_request *mrq)
 767 {
 768         dev_dbg(host->dev, "queue request: state=%d\n",
 769                         host->state);
 770
 771         spin_lock(&host->lock);
 772         host->mrq = mrq;
 773         if (host->state == STATE_IDLE) {
 774                 host->state = STATE_SENDING_CMD;
 775                 rk2818_sdmmc_start_request(host);
 776         } else {
 777                 list_add_tail(&host->queue_node, &host->queue);
 778         }
 779         spin_unlock(&host->lock);
 780 }
 781
 782
 783 static void rk2818_sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
 784 {
 785         struct rk2818_sdmmc_host        *host = mmc_priv(mmc);
 786
 787         WARN_ON(host->mrq);
 788         #if 0
 789         if (!test_bit(RK2818_MMC_CARD_PRESENT, &host->flags)) {
 790                 mrq->cmd->error = -ENOMEDIUM;
 791                 mmc_request_done(mmc, mrq);
 792                 return;
 793         }
 794         #endif
 795
 796         rk2818_sdmmc_queue_request(host, mrq);
 797 }
 798
 799 static void rk2818_sdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 800 {
 801         struct rk2818_sdmmc_host        *host = mmc_priv(mmc);
 802         u32 div;
 803         unsigned long flags;
 804
 805         xjhprintk("%s bus_width %x ios->clock %x host->clock %x ocr %x\n",
 806                         __FUNCTION__,ios->bus_width, ios->clock, host->clock, host->mmc->ocr_avail);
 807
 808         host->ctype = 0; // set default 1 bit mode
 809         switch (ios->bus_width) {
 810         case MMC_BUS_WIDTH_1:
 811                 host->ctype = 0;
 812                 break;
 813         case MMC_BUS_WIDTH_4:
 814                 host->ctype = SDMMC_CTYPE_4BIT;
 815                 break;
 816         }
 817
 818         spin_lock_irqsave(&host->lock,flags);
 819         /* Set the current host bus width */
 820         writel(host->ctype, host->regs + SDMMC_CTYPE);
 821
 822         if(ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
 823                 writel(readl(host->regs + SDMMC_CTRL) | SDMMC_CTRL_OD_PULLUP, host->regs + SDMMC_CTRL);
 824         else
 825                 writel(readl(host->regs + SDMMC_CTRL) & ~SDMMC_CTRL_OD_PULLUP, host->regs + SDMMC_CTRL);
 826         spin_unlock_irqrestore(&host->lock,flags);
 827
 828         if (ios->clock && (host->current_speed != ios->clock)) {
 829                 /*
 830                  * Use mirror of ios->clock to prevent race with mmc
 831                  * core ios update when finding the minimum.
 832                  */
 833                 div  = (((host->bus_hz + (host->bus_hz / 5)) / ios->clock)) >> 1;
 834                 xjhprintk("Bus speed = %dHz div:%d (actual %dHz)\n",
 835                         host->clock, div, (host->bus_hz / div) >> 1);
 836
 837                 /* store the actual clock for calculations */
 838                 host->clock = (host->bus_hz / div) >> 1;
 839                 /*µÈ´ý¿¨Æ¬´«ÊäÍê³É*/
 840                 while(readl(host->regs + SDMMC_STATUS) & (SDMMC_STAUTS_MC_BUSY | SDMMC_STAUTS_DATA_BUSY)){
 841                         udelay(10);
 842                         xjhprintk("SD/MMC busy now(status 0x%x),can not change clock\n",readl(host->regs + SDMMC_STATUS));
 843                         //cpu_relax();
 844                 }
 845                 spin_lock_irqsave(&host->lock,flags);
 846                 /* disable clock */
 847                 writel(0, host->regs + SDMMC_CLKENA);
 848                 writel(0, host->regs + SDMMC_CLKSRC);
 849                 /* inform CIU */
 850                 mci_send_cmd(host, SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0);
 851                 /* set clock to desired speed */
 852                 writel(div, host->regs + SDMMC_CLKDIV);
 853                 /* inform CIU */
 854                 mci_send_cmd(host, SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0);
 855                 /* enable clock */
 856                 if(host->pdev->id == 0) //sdmmc0 endable low power mode
 857                         writel(SDMMC_CLKEN_LOW_PWR | SDMMC_CLKEN_ENABLE, host->regs + SDMMC_CLKENA);
 858                 else
 859                         writel(SDMMC_CLKEN_ENABLE, host->regs + SDMMC_CLKENA);
 860                 /* inform CIU */
 861                  mci_send_cmd(host, SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0);
 862
 863                 host->current_speed= ios->clock;
 864
 865                 spin_unlock_irqrestore(&host->lock,flags);
 866
 867         }
 868         #if 0
 869         else {
 870                 spin_lock(&host->lock);
 871                 host->clock = 0;
 872                 spin_unlock(&host->lock);
 873         }
 874         #endif
 875         spin_lock_irqsave(&host->lock,flags);
 876
 877         switch (ios->power_mode) {
 878         case MMC_POWER_UP:
 879                 set_bit(RK2818_MMC_CARD_NEED_INIT, &host->flags);
 880                 rk2818_sdmmc_set_power(host, host->mmc->ocr_avail);
 881                 break;
 882         default:
 883                 //rk2818_sdmmc_set_power(host, 0);
 884                 break;
 885         }
 886         spin_unlock_irqrestore(&host->lock,flags);
 887
 888 }
 889
 890
 891
 892 static int rk2818_sdmmc_get_ro(struct mmc_host *mmc)
 893 {
 894         struct rk2818_sdmmc_host *host = mmc_priv(mmc);
 895         u32 wrtprt = readl(host->regs + SDMMC_WRTPRT);
 896
 897         return (wrtprt & SDMMC_WRITE_PROTECT)?1:0;
 898 }
 899
 900
 901 static int rk2818_sdmmc_get_cd(struct mmc_host *mmc)
 902 {
 903         struct rk2818_sdmmc_host *host = mmc_priv(mmc);
 904         u32 cdetect = readl(host->regs + SDMMC_CDETECT);
 905
 906         return (cdetect & SDMMC_CARD_DETECT_N)?0:1;
 907
 908 }
 909
 910 static void rk2818_sdmmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
 911 {
 912         u32 intmask;
 913         unsigned long flags;
 914         struct rk2818_sdmmc_host *host = mmc_priv(mmc);
 915         spin_lock_irqsave(&host->lock, flags);
 916         intmask = readl(host->regs + SDMMC_INTMASK);
 917         if(enable)
 918                 writel(intmask | SDMMC_INT_SDIO, host->regs + SDMMC_INTMASK);
 919         else
 920                 writel(intmask & ~SDMMC_INT_SDIO, host->regs + SDMMC_INTMASK);
 921         spin_unlock_irqrestore(&host->lock, flags);
 922 }
 923
 924 static const struct mmc_host_ops rk2818_sdmmc_ops[] = {
 925         {
 926                 .request        = rk2818_sdmmc_request,
 927                 .set_ios        = rk2818_sdmmc_set_ios,
 928                 .get_ro         = rk2818_sdmmc_get_ro,
 929                 .get_cd         = rk2818_sdmmc_get_cd,
 930         },
 931         {
 932                 .request        = rk2818_sdmmc_request,
 933                 .set_ios        = rk2818_sdmmc_set_ios,
 934                 .enable_sdio_irq = rk2818_sdmmc_enable_sdio_irq,
 935         },
 936 };
 937
 938 static void rk2818_sdmmc_request_end(struct rk2818_sdmmc_host *host, struct mmc_request *mrq)
 939         __releases(&host->lock)
 940         __acquires(&host->lock)
 941 {
 942         struct mmc_host         *prev_mmc = host->mmc;
 943         unsigned long flags;
 944         int time_out =60;
 945         unsigned long fifo_left;
 946
 947         WARN_ON(host->cmd || host->data);
 948         host->mrq = NULL;
 949
 950
 951         /*µÈ´ýÇ°Ãæ´«Êä´¦ÀíÍê³É*/
 952         while(readl(host->regs + SDMMC_STATUS) & (SDMMC_STAUTS_DATA_BUSY)) {
 953                 mdelay(5);
 954                 time_out --;
 955
 956                 if(!time_out){
 957                         time_out =60;
 958                         xjhprintk("req done:card busy for a long time!!!reset DMA and FIFO\n");
 959                          local_irq_save(flags);
 960
 961         //              writel(readl(host->regs + SDMMC_CTRL) | ( SDMMC_CTRL_DMA_RESET )  & ~SDMMC_CTRL_DMA_ENABLE, host->regs + SDMMC_CTRL);
 962                         /* wait till resets clear */
 963         //              while (readl(host->regs + SDMMC_CTRL) & ( SDMMC_CTRL_DMA_RESET));
 964
 965                         writel(readl(host->regs + SDMMC_CTRL) | ( SDMMC_CTRL_FIFO_RESET ), host->regs + SDMMC_CTRL);
 966                          /* wait till resets clear */
 967                         while (readl(host->regs + SDMMC_CTRL) & ( SDMMC_CTRL_FIFO_RESET));
 968                          local_irq_restore(flags);
 969                 }
 970                 //cpu_relax();
 971         }
 972
 973         #if 1
 974         fifo_left = readl(host->regs + SDMMC_STATUS);
 975
 976         if((fifo_left & SDMMC_STAUTS_FIFO_FULL) && (fifo_left & SDMMC_STAUTS_FIFO_RX_WATERMARK))
 977         {
 978                 xjhprintk("%s read operation reach water mark\n",__FUNCTION__);
 979                 rk2818_show_regs(host);
 980                 while(SDMMC_GET_FCNT(readl(host->regs + SDMMC_STATUS))>>2)
 981                         readl(host->regs + SDMMC_DATA);         //discard the no use data
 982                 rk2818_show_regs(host);
 983
 984         }
 985         #endif
 986         /*¼ì²éFIFO,Èç¹û²»Îª¿Õ£¬Çå¿Õ*/
 987         if(!(readl(host->regs + SDMMC_STATUS) & SDMMC_STAUTS_FIFO_EMPTY)) {
 988                 xjhprintk("%s: FIFO not empty, clear it\n",__FUNCTION__);
 989                 rk2818_show_regs(host);
 990                  local_irq_save(flags);
 991         //      writel(readl(host->regs + SDMMC_CTRL) | ( SDMMC_CTRL_DMA_RESET ), host->regs + SDMMC_CTRL);
 992                 /* wait till resets clear */
 993         //      while (readl(host->regs + SDMMC_CTRL) & ( SDMMC_CTRL_DMA_RESET));
 994
 995                 writel(readl(host->regs + SDMMC_CTRL) | ( SDMMC_CTRL_FIFO_RESET ), host->regs + SDMMC_CTRL);
 996                  /* wait till resets clear */
 997                 while (readl(host->regs + SDMMC_CTRL) & ( SDMMC_CTRL_FIFO_RESET));
 998                  local_irq_restore(flags);
 999                 //cpu_relax();
1000         }
1001
1002         if (!list_empty(&host->queue)) {
1003                 host = list_entry(host->queue.next,
1004                                 struct rk2818_sdmmc_host, queue_node);
1005                 list_del(&host->queue_node);
1006                 dev_dbg(host->dev, "list not empty: %s is next\n",
1007                                 mmc_hostname(host->mmc));
1008                 host->state = STATE_SENDING_CMD;
1009                 rk2818_sdmmc_start_request(host);
1010         } else {
1011                 dev_dbg(host->dev, "list empty\n");
1012                 host->state = STATE_IDLE;
1013         }
1014
1015         spin_unlock(&host->lock);
1016         mmc_request_done(prev_mmc, mrq);
1017
1018         spin_lock(&host->lock);
1019 }
1020
1021 static void rk2818_sdmmc_command_complete(struct rk2818_sdmmc_host *host,
1022                         struct mmc_command *cmd)
1023 {
1024         u32             status = host->cmd_status;
1025
1026         host->cmd_status = 0;
1027
1028         if(cmd->flags & MMC_RSP_PRESENT) {
1029
1030             if(cmd->flags & MMC_RSP_136) {
1031
1032                         cmd->resp[3] = readl(host->regs + SDMMC_RESP0);
1033                         cmd->resp[2] = readl(host->regs + SDMMC_RESP1);
1034                         cmd->resp[1] = readl(host->regs + SDMMC_RESP2);
1035                         cmd->resp[0] = readl(host->regs + SDMMC_RESP3);
1036             } else {
1037                 cmd->resp[0] = readl(host->regs + SDMMC_RESP0);
1038                         cmd->resp[1] = 0;
1039                         cmd->resp[2] = 0;
1040                         cmd->resp[3] = 0;
1041             }
1042         }
1043
1044         if (status & SDMMC_INT_RTO)
1045                 cmd->error = -ETIMEDOUT;
1046         else if ((cmd->flags & MMC_RSP_CRC) && (status & SDMMC_INT_RCRC))
1047                 cmd->error = -EILSEQ;
1048         else if (status & SDMMC_INT_RE)
1049                 cmd->error = -EIO;
1050         else if(status & SDMMC_INT_HLE)
1051                 cmd->error = -EIO;
1052         else
1053                 cmd->error = 0;
1054
1055         if (cmd->error) {
1056                 dev_dbg(host->dev,
1057                         "command error: status=0x%08x resp=0x%08x\n"
1058                         "cmd=0x%08x arg=0x%08x flg=0x%08x err=%d\n",
1059                         status, cmd->resp[0],
1060                         cmd->opcode, cmd->arg, cmd->flags, cmd->error);
1061
1062
1063                 if (cmd->data) {
1064                         host->data = NULL;
1065                         rk2818_sdmmc_stop_dma(host);
1066                 }
1067         }
1068 }
1069
1070 static void rk2818_sdmmc_tasklet_func(unsigned long priv)
1071 {
1072         struct rk2818_sdmmc_host        *host = (struct rk2818_sdmmc_host *)priv;
1073         struct mmc_request      *mrq = host->mrq;
1074         struct mmc_data         *data = host->data;
1075         enum rk2818_sdmmc_state state = host->state;
1076         enum rk2818_sdmmc_state prev_state;
1077         u32                     status;
1078         int timeout=5000;
1079
1080         spin_lock(&host->lock);
1081
1082         state = host->state;
1083         do {
1084                 prev_state = state;
1085                 timeout --;
1086                 if(!timeout)
1087                 {
1088                         timeout = 5000;
1089                         xjhprintk("%s\n",__FUNCTION__);
1090                 }
1091
1092                 switch (state) {
1093                 case STATE_IDLE:
1094                         break;
1095
1096                 case STATE_SENDING_CMD:
1097                         if (!rk2818_sdmmc_test_and_clear_pending(host,
1098                                                 EVENT_CMD_COMPLETE))
1099                                 break;
1100
1101                         host->cmd = NULL;
1102                         rk2818_sdmmc_set_completed(host, EVENT_CMD_COMPLETE);
1103                         rk2818_sdmmc_command_complete(host, mrq->cmd);
1104                         //if (!mrq->data || cmd->error) {
1105                         if (!mrq->data || mrq->cmd->error) {
1106                                 rk2818_sdmmc_request_end(host, host->mrq);
1107                                 goto unlock;
1108                         }
1109
1110                         prev_state = state = STATE_SENDING_DATA;
1111                         /* fall through */
1112
1113                 case STATE_SENDING_DATA:
1114                         if (rk2818_sdmmc_test_and_clear_pending(host,
1115                                                 EVENT_DATA_ERROR)) {
1116                                 xjhprintk("[xjh] %s data->stop %p\n", __FUNCTION__,data->stop);
1117                                 rk2818_sdmmc_stop_dma(host);
1118                                 #if 0
1119                                 if (data->stop)
1120                                         send_stop_cmd(host, data);
1121                                 #else
1122                                 if (data->stop)
1123                                         send_stop_cmd(host, data);
1124                                 else //cmd17 or cmd24
1125                                 {
1126                                         xjhprintk("%s>> send stop command mannualy\n",__FUNCTION__);
1127                                         host->stop_mannual.opcode = MMC_STOP_TRANSMISSION;
1128                                         host->stop_mannual.arg = 0;
1129                                         host->stop_mannual.flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC;
1130                                         host->stop_cmdr = 0x414c;
1131
1132                                         host->mrq->stop = &host->stop_mannual;
1133                                         data->stop = &host->stop_mannual;
1134                                         send_stop_cmd(host, data);
1135                                 }
1136                                 #endif
1137                                 state = STATE_DATA_ERROR;
1138                                 xjhprintk("[xjh] %s sendging data error\n", __FUNCTION__);
1139                                 break;
1140                         }
1141
1142                         if (!rk2818_sdmmc_test_and_clear_pending(host,
1143                                                 EVENT_XFER_COMPLETE))
1144                                 break;
1145                         rk2818_sdmmc_set_completed(host, EVENT_XFER_COMPLETE);
1146                         prev_state = state = STATE_DATA_BUSY;
1147                         /* fall through */
1148
1149                 case STATE_DATA_BUSY:
1150                         if (!rk2818_sdmmc_test_and_clear_pending(host,
1151                                                 EVENT_DATA_COMPLETE))
1152                                 break;
1153
1154                         host->data = NULL;
1155                         rk2818_sdmmc_set_completed(host, EVENT_DATA_COMPLETE);
1156                         status = host->data_status;
1157
1158                         if (unlikely(status & RK2818_MCI_DATA_ERROR_FLAGS)) {
1159                                 xjhprintk("[xjh] %s data error\n", __FUNCTION__);
1160                                 if (status & SDMMC_INT_DRTO) {
1161                                         dev_err(host->dev,
1162                                                         "data timeout error\n");
1163                                         data->error = -ETIMEDOUT;
1164                                 } else if (status & SDMMC_INT_DCRC) {
1165                                         dev_err(host->dev,
1166                                                         "data CRC error\n");
1167                                         data->error = -EILSEQ;
1168                                 } else {
1169                                         dev_err(host->dev,
1170                                                 "data FIFO error (status=%08x)\n",
1171                                                 status);
1172                                         data->error = -EIO;
1173                                 }
1174                         }
1175                         else {
1176                                 data->bytes_xfered = data->blocks * data->blksz;
1177                                 data->error = 0;
1178                         }
1179
1180                         if (!data->stop) {
1181                                 rk2818_sdmmc_request_end(host, host->mrq);
1182                                 goto unlock;
1183                         }
1184
1185                         prev_state = state = STATE_SENDING_STOP;
1186                         if (!data->error)
1187                                 send_stop_cmd(host, data);
1188                         /* fall through */
1189
1190                 case STATE_SENDING_STOP:
1191                         if (!rk2818_sdmmc_test_and_clear_pending(host,
1192                                                 EVENT_CMD_COMPLETE))
1193                                 break;
1194
1195                         //xjhprintk("[xjh] %s sending stop cmd end\n", __FUNCTION__);
1196                         host->cmd = NULL;
1197                         rk2818_sdmmc_command_complete(host, mrq->stop);
1198                         rk2818_sdmmc_request_end(host, host->mrq);
1199                         goto unlock;
1200                 case STATE_DATA_ERROR:
1201                         if (!rk2818_sdmmc_test_and_clear_pending(host,
1202                                                 EVENT_XFER_COMPLETE))
1203                                 break;
1204                         #if 0
1205                         //[xjh]  cmd17Ã»ÓÐ²úÉúDTOÖÐ¶Ï£¬EVENT_DATA_COMPLETEÃ»ÓÐ±»ÉèÖÃ£¬ÐèÒªÊÖ¹¤ÉèÖÃ
1206                         //ÎªºÎcmd17³ö´íºó²»ÄÜ²úÉúDTOÖÐ¶Ï£¬ÐèÒª½øÒ»²½²éÃ÷???????
1207                         if((host->mrq->cmd->opcode == 17)) {
1208                                 xjhprintk("%s cmd%d was interrupt(host->pending_events %x)\n",
1209                                                 __FUNCTION__,host->mrq->cmd->opcode,host->pending_events);
1210                         //      rk2818_sdmmc_set_pending(host, EVENT_DATA_COMPLETE);
1211                         }
1212                         #endif
1213
1214                         state = STATE_DATA_BUSY;
1215                         break;
1216                 }
1217         } while (state != prev_state);
1218
1219         host->state = state;
1220
1221 unlock:
1222         spin_unlock(&host->lock);
1223
1224 }
1225
1226
1227
1228 inline static void rk2818_sdmmc_push_data(struct rk2818_sdmmc_host *host, void *buf, int cnt)
1229 {
1230     u32* pData = (u32*)buf;
1231
1232         dev_dbg(host->dev, "push data(cnt=%d)\n",cnt);
1233
1234     if (cnt % 4 != 0)
1235                 cnt = (cnt>>2) +1;
1236         else
1237         cnt = cnt >> 2;
1238     while (cnt > 0) {
1239                 writel(*pData++, host->regs + SDMMC_DATA);
1240         cnt--;
1241     }
1242 }
1243
1244 inline static void rk2818_sdmmc_pull_data(struct rk2818_sdmmc_host *host, void *buf,int cnt)
1245 {
1246     u32* pData = (u32*)buf;
1247
1248         dev_dbg(host->dev, "pull data(cnt=%d)\n",cnt);
1249
1250
1251     if (cnt % 4 != 0)
1252                 cnt = (cnt>>2) +1;
1253         else
1254         cnt = cnt >> 2;
1255     while (cnt > 0) {
1256         *pData++ = readl(host->regs + SDMMC_DATA);
1257         cnt--;
1258     }
1259 }
1260
1261 static void rk2818_sdmmc_read_data_pio(struct rk2818_sdmmc_host *host)
1262 {
1263         struct scatterlist      *sg = host->sg;
1264         void                    *buf = sg_virt(sg);
1265         unsigned int            offset = host->pio_offset;
1266         struct mmc_data         *data = host->data;
1267         u32                     status;
1268         unsigned int            nbytes = 0,len,old_len,count =0;
1269         xjhprintk("[xjh] %s enter,sg->length 0x%x\n", __FUNCTION__, sg->length);
1270
1271         do {
1272                 len = SDMMC_GET_FCNT(readl(host->regs + SDMMC_STATUS)) << 2;
1273                 if(count == 0)
1274                         old_len = len;
1275                 if (likely(offset + len <= sg->length)) {
1276                         rk2818_sdmmc_pull_data(host, (void *)(buf + offset),len);
1277
1278                         offset += len;
1279                         nbytes += len;
1280
1281                         if (offset == sg->length) {
1282                                 flush_dcache_page(sg_page(sg));
1283                                 host->sg = sg = sg_next(sg);
1284                                 if (!sg)
1285                                         goto done;
1286                                 offset = 0;
1287                                 buf = sg_virt(sg);
1288                         }
1289                 } else {
1290                         unsigned int remaining = sg->length - offset;
1291                         rk2818_sdmmc_pull_data(host, (void *)(buf + offset),remaining);
1292                         nbytes += remaining;
1293
1294                         flush_dcache_page(sg_page(sg));
1295                         host->sg = sg = sg_next(sg);
1296                         if (!sg)
1297                                 goto done;
1298                         offset = len - remaining;
1299                         buf = sg_virt(sg);
1300                         rk2818_sdmmc_pull_data(host, buf, offset);
1301                         nbytes += offset;
1302                 }
1303
1304                 status = readl(host->regs + SDMMC_MINTSTS);
1305                 writel(SDMMC_INT_RXDR, host->regs + SDMMC_RINTSTS); // clear RXDR interrupt
1306                 if (status & RK2818_MCI_DATA_ERROR_FLAGS) {
1307                         host->data_status = status;
1308                         data->bytes_xfered += nbytes;
1309                         smp_wmb();
1310                         rk2818_sdmmc_set_pending(host, EVENT_DATA_ERROR);
1311                         tasklet_schedule(&host->tasklet);
1312                         return;
1313                 }
1314                 count ++;
1315         } while (status & SDMMC_INT_RXDR); // if the RXDR is ready let read again
1316         len = SDMMC_GET_FCNT(readl(host->regs + SDMMC_STATUS));
1317         host->pio_offset = offset;
1318         data->bytes_xfered += nbytes;
1319         xjhprintk("[xjh] %s exit-1\n", __FUNCTION__);
1320         return;
1321
1322 done:
1323         data->bytes_xfered += nbytes;
1324         smp_wmb();
1325         rk2818_sdmmc_set_pending(host, EVENT_XFER_COMPLETE);
1326         xjhprintk("[xjh] %s exit-2\n", __FUNCTION__);
1327 }
1328
1329 static void rk2818_sdmmc_write_data_pio(struct rk2818_sdmmc_host *host)
1330 {
1331         struct scatterlist      *sg = host->sg;
1332         void                    *buf = sg_virt(sg);
1333         unsigned int            offset = host->pio_offset;
1334         struct mmc_data         *data = host->data;
1335         u32                     status;
1336         unsigned int            nbytes = 0,len;
1337
1338         do {
1339
1340                 len = SDMMC_FIFO_SZ - (SDMMC_GET_FCNT(readl(host->regs + SDMMC_STATUS)) << 2);
1341                 if (likely(offset + len <= sg->length)) {
1342                         rk2818_sdmmc_push_data(host, (void *)(buf + offset),len);
1343
1344                         offset += len;
1345                         nbytes += len;
1346                         if (offset == sg->length) {
1347                                 host->sg = sg = sg_next(sg);
1348                                 if (!sg)
1349                                         goto done;
1350
1351                                 offset = 0;
1352                                 buf = sg_virt(sg);
1353                         }
1354                 } else {
1355                         unsigned int remaining = sg->length - offset;
1356
1357                         rk2818_sdmmc_push_data(host, (void *)(buf + offset), remaining);
1358                         nbytes += remaining;
1359
1360                         host->sg = sg = sg_next(sg);
1361                         if (!sg) {
1362                                 goto done;
1363                         }
1364
1365                         offset = len - remaining;
1366                         buf = sg_virt(sg);
1367                         rk2818_sdmmc_push_data(host, (void *)buf, offset);
1368                         nbytes += offset;
1369                 }
1370
1371                 status = readl(host->regs + SDMMC_MINTSTS);
1372                 writel(SDMMC_INT_TXDR, host->regs + SDMMC_RINTSTS); // clear RXDR interrupt
1373                 if (status & RK2818_MCI_DATA_ERROR_FLAGS) {
1374                         host->data_status = status;
1375                         data->bytes_xfered += nbytes;
1376                         smp_wmb();
1377                         rk2818_sdmmc_set_pending(host, EVENT_DATA_ERROR);
1378                         tasklet_schedule(&host->tasklet);
1379                         return;
1380                 }
1381         } while (status & SDMMC_INT_TXDR); // if TXDR, let write again
1382
1383         host->pio_offset = offset;
1384         data->bytes_xfered += nbytes;
1385
1386         return;
1387
1388 done:
1389         data->bytes_xfered += nbytes;
1390         smp_wmb();
1391         rk2818_sdmmc_set_pending(host, EVENT_XFER_COMPLETE);
1392 }
1393
1394 static void rk2818_sdmmc_cmd_interrupt(struct rk2818_sdmmc_host *host, u32 status)
1395 {
1396         if(!host->cmd_status)
1397                 host->cmd_status = status;
1398         smp_wmb();
1399         rk2818_sdmmc_set_pending(host, EVENT_CMD_COMPLETE);
1400         tasklet_schedule(&host->tasklet);
1401 }
1402
1403 static irqreturn_t rk2818_sdmmc_interrupt(int irq, void *data)
1404 {
1405         struct rk2818_sdmmc_host        *host = data;
1406         u32                     status,  pending;
1407         unsigned int            pass_count = 0;
1408         bool present;
1409         bool present_old;
1410
1411         spin_lock(&host->lock);
1412         do {
1413                 status = readl(host->regs + SDMMC_RINTSTS);
1414                 pending = readl(host->regs + SDMMC_MINTSTS);// read only mask reg
1415                 if (!pending)
1416                         break;
1417                 if(pending & SDMMC_INT_CD) {
1418                     writel(SDMMC_INT_CD, host->regs + SDMMC_RINTSTS);  // clear interrupt
1419
1420                         present = rk2818_sdmmc_get_cd(host->mmc);
1421                         present_old = test_bit(RK2818_MMC_CARD_PRESENT, &host->flags);
1422                         if(present != present_old) {
1423
1424                                 if (present != 0) {
1425                                         set_bit(RK2818_MMC_CARD_PRESENT, &host->flags);
1426                                 } else {
1427                                         clear_bit(RK2818_MMC_CARD_PRESENT, &host->flags);
1428                                 }
1429
1430                                 if(host->pdev->id ==0) {        //sdmmc0
1431                                         xjhprintk("[xjh] %s >> %s >> %d sd/mmc insert/remove occur: Removal %d present %d present_old %d\n",
1432                                                         __FILE__, __FUNCTION__,__LINE__,sdmmc0_disable_Irq_ForRemoval,present,present_old);
1433                                         if(0 == sdmmc0_disable_Irq_ForRemoval) {
1434                                                 mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(20));
1435                                                 if(!test_bit(RK2818_MMC_CARD_PRESENT, &host->flags))
1436                                                         sdmmc0_disable_Irq_ForRemoval = 1;
1437                                         }
1438                                         else
1439                                                 mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(RK28_SDMMC0_SWITCH_POLL_DELAY));
1440                                 } else {        //sdio
1441                                                 mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(20));
1442                                 }
1443                         }
1444                 }
1445
1446                 if(pending & RK2818_MCI_CMD_ERROR_FLAGS) {
1447                     writel(RK2818_MCI_CMD_ERROR_FLAGS, host->regs + SDMMC_RINTSTS);  //  clear interrupt
1448                     if(status & SDMMC_INT_HLE)
1449                     {
1450                             xjhprintk("[xjh] %s :cmd transfer error(int status 0x%x cmd %d host->state %d pending_events %d)\n",
1451                                         __FUNCTION__,status,host->cmd->opcode,host->state,host->pending_events);
1452
1453                     }
1454                     host->cmd_status = status;
1455                         smp_wmb();
1456                     rk2818_sdmmc_set_pending(host, EVENT_CMD_COMPLETE);
1457                     tasklet_schedule(&host->tasklet);
1458                         host->cmd_tmo = 1;
1459                         xjhprintk("[xjh] %s :cmd transfer error(int status 0x%x cmd %d host->state %d pending_events %d)\n",
1460                                         __FUNCTION__,status,host->cmd->opcode,host->state,host->pending_events);
1461                 }
1462
1463                 if (pending & RK2818_MCI_DATA_ERROR_FLAGS) { // if there is an error, let report DATA_ERROR
1464                         writel(RK2818_MCI_DATA_ERROR_FLAGS, host->regs + SDMMC_RINTSTS);  // clear interrupt
1465                         host->data_status = status;
1466                         smp_wmb();
1467                         rk2818_sdmmc_set_pending(host, EVENT_DATA_ERROR);
1468                         tasklet_schedule(&host->tasklet);
1469                         xjhprintk("[xjh] %s :data transfer error(int status 0x%x host->state %d pending_events %d)\n",
1470                                         __FUNCTION__,status,host->state,host->pending_events);
1471                 }
1472
1473
1474                 if(pending & SDMMC_INT_DTO) {
1475                     writel(SDMMC_INT_DTO, host->regs + SDMMC_RINTSTS);  // clear interrupt
1476                     if (!host->data_status)
1477                                 host->data_status = status;
1478                         smp_wmb();
1479                  /*   if(host->dir_status == RK2818_MCI_RECV_STATUS) {
1480                                 if(host->sg)
1481                                         rk2818_sdmmc_read_data_pio(host);
1482                     }*/
1483                     rk2818_sdmmc_set_pending(host, EVENT_DATA_COMPLETE);
1484                     tasklet_schedule(&host->tasklet);
1485                 }
1486
1487                 if (pending & SDMMC_INT_RXDR) {
1488                     writel(SDMMC_INT_RXDR, host->regs + SDMMC_RINTSTS);  //  clear interrupt
1489                     if(host->sg)
1490                             rk2818_sdmmc_read_data_pio(host);
1491                 }
1492
1493                 if (pending & SDMMC_INT_TXDR) {
1494                     writel(SDMMC_INT_TXDR, host->regs + SDMMC_RINTSTS);  //  clear interrupt
1495                     if(host->sg) {
1496                                 rk2818_sdmmc_write_data_pio(host);
1497                     }
1498                 }
1499
1500                 if (pending & SDMMC_INT_CMD_DONE) {
1501                         writel(SDMMC_INT_CMD_DONE, host->regs + SDMMC_RINTSTS);  //  clear interrupt
1502                     rk2818_sdmmc_cmd_interrupt(host, status);
1503                         host->cmd_tmo = 1;
1504
1505                 }
1506                 if(pending & SDMMC_INT_SDIO) {
1507                         writel(SDMMC_INT_SDIO, host->regs + SDMMC_RINTSTS);
1508                         mmc_signal_sdio_irq(host->mmc);
1509                 }
1510         } while (pass_count++ < 5);
1511
1512         spin_unlock(&host->lock);
1513
1514
1515         //return IRQ_HANDLED;
1516         return pass_count ? IRQ_HANDLED : IRQ_NONE;
1517 }
1518
1519 static void rk2818_sdmmc_detect_change(unsigned long host_data)
1520 {
1521         struct rk2818_sdmmc_host *host = (struct rk2818_sdmmc_host *) host_data;
1522         //bool present;
1523         //bool present_old;
1524         //unsigned long flags;
1525         #if 0
1526         mrq = host->mrq;
1527         if (mrq) {
1528
1529                 host->data = NULL;
1530                 host->cmd = NULL;
1531                 xjhprintk("[xjh] %s >> %s >> %d stage 2\n", __FILE__, __FUNCTION__,__LINE__);
1532
1533                 switch (host->state) {
1534                 case STATE_IDLE:
1535                         break;
1536                 case STATE_SENDING_CMD:
1537                         mrq->cmd->error = -ENOMEDIUM;
1538                         if (!mrq->data)
1539                                 break;
1540                         /* fall through */
1541                 case STATE_SENDING_DATA:
1542                         mrq->data->error = -ENOMEDIUM;
1543                         xjhprintk("[xjh] %s host %p\n", __FUNCTION__,host);
1544                         rk2818_sdmmc_stop_dma(host);
1545                         break;
1546                 case STATE_DATA_BUSY:
1547                 case STATE_DATA_ERROR:
1548                         if (mrq->data->error == -EINPROGRESS)
1549                                 mrq->data->error = -ENOMEDIUM;
1550                         if (!mrq->stop)
1551                                 break;
1552                 case STATE_SENDING_STOP:
1553                         mrq->stop->error = -ENOMEDIUM;
1554                         break;
1555                 }
1556
1557                 rk2818_sdmmc_request_end(host, mrq);
1558         }
1559         #endif
1560
1561  // spin_lock( &sdmmc0_spinlock);
1562 //      xjhprintk("%s....%s....%d        **** timer open, then enable IRQ_OF_removal/insertion*****xbw****\n",__FUNCTION__,__FILE__,__LINE__);
1563 //      sdmmc0_disable_Irq_ForRemoval = 0; //´ò¿ªÖÐ¶Ï
1564 //      spin_unlock( &sdmmc0_spinlock);
1565
1566         mmc_detect_change(host->mmc, 0);
1567
1568 }
1569
1570
1571 /*--------------------add communication interface with applications ---------------------------------*/
1572 int resetTimes = 0;//Í³¼ÆÁ¬ÐøresetµÄ´ÎÊý¡£
1573 ssize_t sdmmc_reset_store(struct kobject *kobj, struct kobj_attribute *attr,
1574                          const char *buf, size_t count)
1575 {
1576         //»òÕß´Ókobj×·ËÝµ½rk2818_sdmmc_host£¬½ÓÏÂÀ´³¢ÊÔ
1577     struct rk2818_sdmmc_host *host =  mmc0_host;
1578     struct mmc_host *mmc = host->mmc;
1579     int currentTimes=0;
1580         unsigned long flags;
1581
1582     if( !strncmp(buf,"RemoveDone" , strlen("RemoveDone")) )
1583     {
1584         xjhprintk("%s------mmc receive the message of %s -----\n", __func__ , buf);
1585
1586         local_irq_save(flags);
1587         del_timer(&host->detect_timer);
1588         sdmmc0_disable_Irq_ForRemoval = 0; //´ò¿ªÖÐ¶Ï
1589         local_irq_restore(flags);
1590
1591        //Ö÷¶¯Ö´ÐÐÒ»´Î¼ì²â, ÈôÓÐ¿¨´æÔÚ
1592        if(rk2818_sdmmc_get_cd(host->mmc)) {
1593                 //      mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(20));
1594                         set_bit(RK2818_MMC_CARD_PRESENT, &host->flags);
1595                     mmc_detect_change(mmc, 0);
1596         }
1597     }
1598     else if( !strncmp(buf,"Removing" , strlen("Removing")) )
1599     {
1600         xjhprintk("%s------mmc receive the message of %s -----\n", __func__ , buf);
1601
1602         //vold is removing, so modify the timer.
1603         mod_timer(&host->detect_timer, jiffies +msecs_to_jiffies(RK28_SDMMC0_SWITCH_POLL_DELAY));
1604     }
1605     else if( !strncmp(buf,"to_reset!" , strlen("to_reset!")) )
1606     {
1607         xjhprintk("%s------mmc receive the message of %s -----\n", __func__ , buf);
1608
1609         //ÉèÖÃresetµÄÔÊÐí´ÎÊý
1610         ++resetTimes;
1611         currentTimes = resetTimes;
1612
1613         //Á¬Ðøµ÷ÓÃreset³¬¹ý´ÎÊý£¬²»Ö´ÐÐ¡£
1614         if(currentTimes <= 3)
1615         {
1616             xjhprintk("%s....%s....%d   **** Begin to call rk28_sdmmc_reset() Times=%d *****xbw****\n",__FUNCTION__,__FILE__,__LINE__, resetTimes);
1617            // rk28_sdmmc_reset();
1618         }
1619     }
1620     else if(!strncmp(buf,"mounted!" , strlen("mounted!")))
1621     {
1622         xjhprintk("%s------mmc receive the message of %s -----\n", __func__ , buf);
1623         resetTimes = 0;
1624     }
1625         else if(!strncmp(buf,"dump_reg" , strlen("dump_reg")))
1626         {
1627                 unsigned long cpsr_tmp;
1628                 xjhprintk("-------- SD/MMC/SDIO dump Registers-----------------\n");
1629                 xjhprintk("SDMMC_CTRL:\t0x%x\n",readl(host->regs + SDMMC_CTRL));
1630                 xjhprintk("SDMMC_PWREN:\t0x%x\n",readl(host->regs + SDMMC_PWREN));
1631                 xjhprintk("SDMMC_CLKDIV:\t0x%x\n",readl(host->regs + SDMMC_CLKDIV));
1632                 xjhprintk("SDMMC_CLKSRC:\t0x%x\n",readl(host->regs + SDMMC_CLKSRC));
1633                 xjhprintk("SDMMC_CLKENA:\t0x%x\n",readl(host->regs + SDMMC_CLKENA));
1634                 xjhprintk("SDMMC_TMOUT:\t0x%x\n",readl(host->regs + SDMMC_TMOUT));
1635                 xjhprintk("SDMMC_CTYPE:\t0x%x\n",readl(host->regs + SDMMC_CTYPE));
1636                 xjhprintk("SDMMC_BLKSIZ:\t0x%x\n",readl(host->regs + SDMMC_BLKSIZ));
1637                 xjhprintk("SDMMC_BYTCNT:\t0x%x\n",readl(host->regs + SDMMC_BYTCNT));
1638                 xjhprintk("SDMMC_INTMASK:\t0x%x\n",readl(host->regs + SDMMC_INTMASK));
1639                 xjhprintk("SDMMC_CMDARG:\t0x%x\n",readl(host->regs + SDMMC_CMDARG));
1640                 xjhprintk("SDMMC_CMD:\t0x%x\n",readl(host->regs + SDMMC_CMD));
1641                 xjhprintk("SDMMC_RESP0:\t0x%x\n",readl(host->regs + SDMMC_RESP0));
1642                 xjhprintk("SDMMC_RESP1:\t0x%x\n",readl(host->regs + SDMMC_RESP1));
1643                 xjhprintk("SDMMC_RESP2:\t0x%x\n",readl(host->regs + SDMMC_RESP2));
1644                 xjhprintk("SDMMC_RESP3:\t0x%x\n",readl(host->regs + SDMMC_RESP3));
1645                 xjhprintk("SDMMC_MINTSTS:\t0x%x\n",readl(host->regs + SDMMC_MINTSTS));
1646                 xjhprintk("SDMMC_RINTSTS:\t0x%x\n",readl(host->regs + SDMMC_RINTSTS));
1647                 xjhprintk("SDMMC_STATUS:\t0x%x\n",readl(host->regs + SDMMC_STATUS));
1648                 xjhprintk("SDMMC_FIFOTH:\t0x%x\n",readl(host->regs + SDMMC_FIFOTH));
1649                 xjhprintk("SDMMC_CDETECT:\t0x%x\n",readl(host->regs + SDMMC_CDETECT));
1650                 xjhprintk("SDMMC_WRTPRT:\t0x%x\n",readl(host->regs + SDMMC_WRTPRT));
1651                 xjhprintk("SDMMC_TCBCNT:\t0x%x\n",readl(host->regs + SDMMC_TCBCNT));
1652                 xjhprintk("SDMMC_TBBCNT:\t0x%x\n",readl(host->regs + SDMMC_TBBCNT));
1653                 xjhprintk("SDMMC_DEBNCE:\t0x%x\n",readl(host->regs + SDMMC_DEBNCE));
1654                 xjhprintk("-------- Host states-----------------\n");
1655                 xjhprintk("host->state:\t0x%x\n",host->state);
1656                 xjhprintk("host->pending_events:\t0x%x\n",host->pending_events);
1657                 xjhprintk("host->cmd_status:\t0x%x\n",host->cmd_status);
1658                 xjhprintk("host->data_status:\t0x%x\n",host->data_status);
1659                 xjhprintk("host->stop_cmdr:\t0x%x\n",host->stop_cmdr);
1660                 xjhprintk("host->dir_status:\t0x%x\n",host->dir_status);
1661                 xjhprintk("host->completed_events:\t0x%x\n",host->completed_events);
1662                 xjhprintk("host->dma_chn:\t0x%x\n",host->dma_chn);
1663                 xjhprintk("host->use_dma:\t0x%x\n",host->use_dma);
1664                 xjhprintk("host->no_detect:\t0x%x\n",host->no_detect);
1665                 xjhprintk("host->bus_hz:\t0x%x\n",host->bus_hz);
1666                 xjhprintk("host->current_speed:\t0x%x\n",host->current_speed);
1667                 xjhprintk("host->ctype:\t0x%x\n",host->ctype);
1668                 xjhprintk("host->clock:\t0x%x\n",host->clock);
1669                 xjhprintk("host->flags:\t0x%x\n",host->flags);
1670                 xjhprintk("host->irq:\t0x%x\n",host->irq);
1671                 xjhprintk("-------- rk2818 CPU register-----------------\n");
1672                 __asm__ volatile ("mrs  %0, cpsr                @ local_irq_save\n":"=r" (cpsr_tmp)::"memory", "cc"     );
1673                 xjhprintk("cpsr:\t0x%x\n",cpsr_tmp);
1674
1675
1676         }
1677
1678     return count;
1679 }
1680
1681
1682
1683 struct kobj_attribute mmc_reset_attrs =
1684 {
1685         .attr = {
1686                 .name = "rescan",
1687                 .mode = 0777},
1688         .show = NULL,
1689         .store = sdmmc_reset_store,
1690 };
1691 struct attribute *mmc_attrs[] =
1692 {
1693         &mmc_reset_attrs.attr,
1694         NULL
1695 };
1696
1697 static struct kobj_type mmc_kset_ktype = {
1698         .sysfs_ops      = &kobj_sysfs_ops,
1699         .default_attrs = &mmc_attrs[0],
1700 };
1701 static int rk28_sdmmc0_add_attr( struct platform_device *pdev )
1702 {
1703         int result;
1704                  struct kobject *parentkobject;
1705         struct kobject * me = kmalloc(sizeof(struct kobject) , GFP_KERNEL );
1706         if( !me )
1707                 return -ENOMEM;
1708         memset(me ,0,sizeof(struct kobject));
1709         kobject_init( me , &mmc_kset_ktype );
1710         //result = kobject_add( me , &pdev->dev.kobj , "%s", "RESET" );
1711         parentkobject = &pdev->dev.kobj ;
1712                  result = kobject_add( me , parentkobject->parent->parent, "%s", "resetSdCard" );
1713         return result;
1714 }
1715
1716 /*-------------------end of add communication interface with applications ---------------------------------*/
1717
1718 static int rk2818_sdmmc_probe(struct platform_device *pdev)
1719 {
1720         struct rk2818_sdmmc_host *host = NULL;
1721         struct mmc_host *mmc;
1722         struct resource *res;
1723         struct rk2818_sdmmc_platform_data *pdata;
1724         int     ret = 0;
1725         int tmo = 200;
1726
1727         pdata = pdev->dev.platform_data;
1728         if (!pdata) {
1729                 dev_err(&pdev->dev, "No platform data\n");
1730                 return -EINVAL;
1731         }
1732         if(pdata->cfg_gpio)
1733                 pdata->cfg_gpio(pdev);
1734
1735         mmc = mmc_alloc_host(sizeof(struct rk2818_sdmmc_host), &pdev->dev);
1736         if (!mmc)
1737         {
1738                 dev_err(&pdev->dev, "Mmc alloc host failture\n");
1739                 return -ENOMEM;
1740         }
1741         host = mmc_priv(mmc);
1742
1743         host->mmc = mmc;
1744         host->pdev = pdev;
1745         host->dev = &pdev->dev;
1746         host->dma_chn = -1;
1747
1748         host->use_dma = pdata->use_dma;
1749         host->no_detect = pdata->no_detect;
1750         memcpy(host->dma_name, pdata->dma_name, 8);
1751
1752         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1753         if (!res)
1754         {
1755                 dev_err(&pdev->dev, "Cannot find IO resource\n");
1756                 ret = -ENOENT;
1757                 goto err_free_host;
1758         }
1759         host->mem = request_mem_region(res->start, resource_size(res), pdev->name);
1760         if(host->mem == NULL)
1761         {
1762                 dev_err(&pdev->dev, "Cannot request IO\n");
1763                 ret = -ENXIO;
1764                 goto err_free_host;
1765         }
1766         host->regs = ioremap(res->start, res->end - res->start + 1);
1767         if (!host->regs)
1768         {
1769                 dev_err(&pdev->dev, "Cannot map IO\n");
1770                 ret = -ENXIO;
1771             goto err_release_resource;
1772         }
1773
1774         host->irq = ret =  platform_get_irq(pdev, 0);
1775         if (ret < 0)
1776         {
1777                 dev_err(&pdev->dev, "Cannot find IRQ\n");
1778                 goto err_free_map;
1779         }
1780
1781
1782         spin_lock_init(&host->lock);
1783         INIT_LIST_HEAD(&host->queue);
1784
1785         host->clk = clk_get(&pdev->dev, "sdmmc");
1786         if (IS_ERR(host->clk)) {
1787                 dev_err(&pdev->dev, "failed to find clock source.\n");
1788                 ret = PTR_ERR(host->clk);
1789                 host->clk = NULL;
1790                 goto err_free_map;
1791         }
1792     clk_enable(host->clk);
1793         host->bus_hz = clk_get_rate(host->clk);
1794
1795         writel((SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET | SDMMC_CTRL_INT_ENABLE), host->regs + SDMMC_CTRL);
1796         while (--tmo && readl(host->regs + SDMMC_CTRL) &
1797                         (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET))
1798                 udelay(5);
1799         if(--tmo < 0){
1800                 dev_err(&pdev->dev, "failed to reset controller and fifo(timeout = 1ms).\n");
1801             goto err_free_clk;
1802         }
1803
1804         writel(0xFFFFFFFF, host->regs + SDMMC_RINTSTS);
1805         writel(0, host->regs + SDMMC_INTMASK); // disable all mmc interrupt first
1806
1807         /* Put in max timeout */
1808         writel(0xFFFFFFFF, host->regs + SDMMC_TMOUT);
1809
1810     /* DMA Size = 8, RXMark = 15, TXMark = 16 */
1811         writel((3 << 28) | (15 << 16) | 16, host->regs + SDMMC_FIFOTH);
1812         /* disable clock to CIU */
1813         writel(0, host->regs + SDMMC_CLKENA);
1814         writel(0, host->regs + SDMMC_CLKSRC);
1815
1816         tasklet_init(&host->tasklet, rk2818_sdmmc_tasklet_func, (unsigned long)host);
1817
1818         ret = request_irq(host->irq, rk2818_sdmmc_interrupt, 0, dev_name(&pdev->dev), host);
1819         if (ret){
1820                 dev_err(&pdev->dev, "Cannot claim IRQ %d.\n", host->irq);
1821             goto err_free_clk;
1822         }
1823
1824
1825         platform_set_drvdata(pdev, host);
1826         dev_dbg(host->dev, "pdev->id = %d\n", pdev->id);
1827         mmc->ops = &(rk2818_sdmmc_ops[pdev->id]);
1828
1829         mmc->f_min = host->bus_hz/510;
1830         mmc->f_max = host->bus_hz/2;
1831         dev_dbg(&pdev->dev, "bus_hz = %u\n", host->bus_hz);
1832         mmc->ocr_avail = pdata->host_ocr_avail;
1833         mmc->caps = pdata->host_caps;
1834
1835         mmc->max_phys_segs = 64;
1836         mmc->max_hw_segs = 64;
1837         mmc->max_blk_size = 4095;
1838         mmc->max_blk_count = 512;
1839         mmc->max_req_size = 4095 * 512;
1840         mmc->max_seg_size = 4095 * 4;
1841
1842         rk2818_sdmmc_set_power(host, 0);
1843
1844         /* Create card detect handler thread for the host */
1845         setup_timer(&host->detect_timer, rk2818_sdmmc_detect_change,
1846                         (unsigned long)host);
1847
1848         writel(0xFFFFFFFF, host->regs + SDMMC_RINTSTS);
1849         writel(SDMMC_INT_CMD_DONE | SDMMC_INT_DTO | RK2818_MCI_ERROR_FLAGS | SDMMC_INT_CD,
1850                         host->regs + SDMMC_INTMASK);
1851
1852 #if 0
1853         /* Assume card is present initially */
1854         if(rk2818_sdmmc_get_cd(host->mmc) == 0 &&strncmp(host->dma_name, "sdio", strlen("sdio")) == 0)
1855         {
1856                 dev_err(&pdev->dev, "failed to detect sdio.\n");
1857                 return 0;
1858         }
1859         else if(rk2818_sdmmc_get_cd(host->mmc) != 0)
1860                 set_bit(RK2818_MMC_CARD_PRESENT, &host->flags);
1861         else
1862                 clear_bit(RK2818_MMC_CARD_PRESENT, &host->flags);
1863 #endif
1864
1865         ret = mmc_add_host(mmc);
1866
1867
1868         if (strncmp(host->dma_name, "sdio", strlen("sdio")) == 0)
1869         {
1870                 wifi_mmc_host = mmc;
1871                 if(request_dma(1, host->dma_name) == 0)
1872                         host->dma_chn = 1;
1873                 else
1874                 {
1875                         ret = -EINVAL;
1876                         goto err_remove_host;
1877                 }
1878         }
1879
1880         if(ret)
1881         {
1882                 dev_err(&pdev->dev, "failed to add mmc host.\n");
1883                 goto err_free_irq;
1884         }
1885         if (strncmp(host->dma_name, "sd_mmc", strlen("sd_mmc")) == 0) {
1886                 xjhprintk("[xjh] sdmmc0 add interface with application\n");
1887                 sdmmc0_disable_Irq_ForRemoval = 0; //´ò¿ªÖÐ¶Ï
1888                 mmc0_host = host;
1889                 rk28_sdmmc0_add_attr(pdev);
1890         }
1891
1892 #if defined (CONFIG_DEBUG_FS)
1893         rk2818_sdmmc_init_debugfs(host);
1894 #endif
1895         writel(SDMMC_CTRL_INT_ENABLE, host->regs + SDMMC_CTRL); // enable mci interrupt
1896
1897         dev_dbg(&pdev->dev, "RK2818 MMC controller used as %s, at irq %d\n",
1898                                 host->dma_name, host->irq);
1899         return 0;
1900 err_remove_host:
1901         mmc_remove_host(host->mmc);
1902 err_free_irq:
1903         free_irq(host->irq, host);
1904 err_free_clk:
1905         clk_disable(host->clk);
1906         clk_put(host->clk);
1907 err_free_map:
1908         iounmap(host->regs);
1909 err_release_resource:
1910         release_resource(host->mem);
1911 err_free_host:
1912         kfree(host);
1913         return ret;
1914 }
1915
1916 static int __exit rk2818_sdmmc_remove(struct platform_device *pdev)
1917 {
1918         struct rk2818_sdmmc_host *host = platform_get_drvdata(pdev);
1919
1920         if (strncmp(host->dma_name, "sdio", 4) == 0)
1921                 wifi_mmc_host = NULL;
1922
1923         writel(0xFFFFFFFF, host->regs + SDMMC_RINTSTS);
1924         writel(0, host->regs + SDMMC_INTMASK); // disable all mmc interrupt first
1925
1926         platform_set_drvdata(pdev, NULL);
1927
1928         dev_dbg(&pdev->dev, "remove host\n");
1929
1930         writel(0, host->regs + SDMMC_CLKENA);
1931         writel(0, host->regs + SDMMC_CLKSRC);
1932
1933         del_timer_sync(&host->detect_timer);
1934         set_bit(RK2818_MMC_SHUTDOWN, &host->flags);
1935         mmc_remove_host(host->mmc);
1936         mmc_free_host(host->mmc);
1937
1938         clk_disable(host->clk);
1939         clk_put(host->clk);
1940         free_irq(host->irq, host);
1941         iounmap(host->regs);
1942         release_resource(host->mem);
1943         kfree(host);
1944         return 0;
1945 }
1946
1947 static int rk2818_sdmmc_suspend(struct platform_device *pdev, pm_message_t state)
1948 {
1949         struct rk2818_sdmmc_host *host = platform_get_drvdata(pdev);
1950 #ifdef CONFIG_PM
1951         writel(0, host->regs + SDMMC_CLKENA);
1952         clk_disable(host->clk);
1953 #endif
1954         return 0;
1955 }
1956
1957 static int rk2818_sdmmc_resume(struct platform_device *pdev)
1958 {
1959         struct rk2818_sdmmc_host *host = platform_get_drvdata(pdev);
1960 #ifdef CONFIG_PM
1961         clk_enable(host->clk);
1962         writel(SDMMC_CLKEN_ENABLE, host->regs + SDMMC_CLKENA);
1963 #endif
1964         return 0;
1965 }
1966
1967 static struct platform_driver rk2818_sdmmc_driver = {
1968         .probe          = rk2818_sdmmc_probe,
1969         .suspend    = rk2818_sdmmc_suspend,
1970         .resume     = rk2818_sdmmc_resume,
1971         .remove         = __exit_p(rk2818_sdmmc_remove),
1972         .driver         = {
1973                 .name           = "rk2818_sdmmc",
1974         },
1975 };
1976
1977 static int __init rk2818_sdmmc_init(void)
1978 {
1979         return platform_driver_register(&rk2818_sdmmc_driver);
1980 }
1981
1982 static void __exit rk2818_sdmmc_exit(void)
1983 {
1984         platform_driver_unregister(&rk2818_sdmmc_driver);
1985 }
1986
1987 module_init(rk2818_sdmmc_init);
1988 module_exit(rk2818_sdmmc_exit);
1989
1990 MODULE_DESCRIPTION("Driver for RK2818 SDMMC controller");
1991 MODULE_LICENSE("GPL");
1992 MODULE_AUTHOR("kfx kfx@rock-chips.com");
1993