update sdmmc when dma err stop and flush dma
[firefly-linux-kernel-4.4.55.git] / drivers / mmc / host / rk29_sdmmc.c
1 /* drivers/mmc/host/rk29_sdmmc.c
2  *
3  * Copyright (C) 2010 ROCKCHIP, Inc.
4  *
5  * This software is licensed under the terms of the GNU General Public
6  * License version 2, as published by the Free Software Foundation, and
7  * may be copied, distributed, and modified under those terms.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  */
15  
16 #include <linux/blkdev.h>
17 #include <linux/clk.h>
18 #include <linux/debugfs.h>
19 #include <linux/device.h>
20 #include <linux/dma-mapping.h>
21 #include <linux/err.h>
22 #include <linux/init.h>
23 #include <linux/interrupt.h>
24 #include <linux/ioport.h>
25 #include <linux/module.h>
26 #include <linux/platform_device.h>
27 #include <linux/scatterlist.h>
28 #include <linux/seq_file.h>
29 #include <linux/stat.h>
30 #include <linux/delay.h>
31 #include <linux/irq.h>
32 #include <linux/mmc/host.h>
33 #include <linux/mmc/mmc.h>
34
35 #include <mach/board.h>
36 #include <mach/rk29_iomap.h>
37 #include <mach/gpio.h>
38 #include <asm/dma.h>
39 #include <mach/rk29-dma-pl330.h>
40 #include <asm/scatterlist.h>
41
42 #include "rk2818-sdmmc.h"
43
44 #define RK29_SDMMC_DATA_ERROR_FLAGS     (SDMMC_INT_DRTO | SDMMC_INT_DCRC | SDMMC_INT_HTO | SDMMC_INT_SBE | SDMMC_INT_EBE)
45 #define RK29_SDMMC_CMD_ERROR_FLAGS      (SDMMC_INT_RTO | SDMMC_INT_RCRC | SDMMC_INT_RE | SDMMC_INT_HLE)
46 #define RK29_SDMMC_ERROR_FLAGS          (RK29_SDMMC_DATA_ERROR_FLAGS | RK29_SDMMC_CMD_ERROR_FLAGS | SDMMC_INT_HLE)
47 #define RK29_SDMMC_SEND_STATUS          1
48 #define RK29_SDMMC_RECV_STATUS          2
49 #define RK29_SDMMC_DMA_THRESHOLD        16
50
51 enum {
52         EVENT_CMD_COMPLETE = 0,
53         EVENT_XFER_COMPLETE,
54         EVENT_DATA_COMPLETE,
55         EVENT_DATA_ERROR,
56         EVENT_XFER_ERROR
57 };
58
59 enum rk29_sdmmc_state {
60         STATE_IDLE = 0,
61         STATE_SENDING_CMD,
62         STATE_SENDING_DATA,
63         STATE_DATA_BUSY,
64         STATE_SENDING_STOP,
65         STATE_DATA_ERROR,
66 };
67
68 static struct rk29_dma_client rk29_dma_sdmmc0_client = {
69         .name = "rk29-dma-sdmmc0",
70 };
71
72 static struct rk29_dma_client rk29_dma_sdio1_client = {
73         .name = "rk29-dma-sdio1",
74 };
75
76 struct rk29_sdmmc {
77         spinlock_t              lock;
78         void __iomem            *regs;
79         struct clk              *clk;
80         struct scatterlist      *sg;
81         unsigned int            pio_offset;
82         struct mmc_request      *mrq;
83         struct mmc_request      *curr_mrq;
84         struct mmc_command      *cmd;
85         struct mmc_data         *data;
86         int                     dma_chn;
87         dma_addr_t              dma_addr;;
88         //dma_sg_ll_t           *sg_cpu;
89         unsigned int    use_dma:1;
90         char                    dma_name[8];
91         u32                     cmd_status;
92         u32                     data_status;
93         u32                     stop_cmdr;
94         u32                     dir_status;
95         struct tasklet_struct   tasklet;
96         unsigned long           pending_events;
97         unsigned long           completed_events;
98         enum rk29_sdmmc_state   state;
99         struct list_head        queue;
100         u32                     bus_hz;
101         u32                     current_speed;
102         struct platform_device  *pdev;
103         struct mmc_host         *mmc;
104         u32                     ctype;
105         struct list_head        queue_node;
106         unsigned int            clock;
107         unsigned long           flags;
108 #define RK29_SDMMC_CARD_PRESENT 0
109 #define RK29_SDMMC_CARD_NEED_INIT       1
110 #define RK29_SDMMC_SHUTDOWN             2
111         int                     id;
112         int                     irq;
113         struct timer_list       detect_timer;
114         unsigned int            oldstatus;
115 };
116
117 #define rk29_sdmmc_test_and_clear_pending(host, event)          \
118         test_and_clear_bit(event, &host->pending_events)
119 #define rk29_sdmmc_set_completed(host, event)                   \
120         set_bit(event, &host->completed_events)
121
122 #define rk29_sdmmc_set_pending(host, event)                             \
123         set_bit(event, &host->pending_events)
124
125 static void rk29_sdmmc_write(unsigned char  __iomem     *regbase, unsigned int regOff,unsigned int val)
126 {
127         __raw_writel(val,regbase + regOff);
128 }
129
130 static unsigned int rk29_sdmmc_read(unsigned char  __iomem      *regbase, unsigned int regOff)
131 {
132         return __raw_readl(regbase + regOff);
133 }
134
135
136 #if defined (CONFIG_DEBUG_FS)
137 /*
138  * The debugfs stuff below is mostly optimized away when
139  * CONFIG_DEBUG_FS is not set.
140  */
141 static int rk29_sdmmc_req_show(struct seq_file *s, void *v)
142 {
143         struct rk29_sdmmc       *host = s->private;
144         struct mmc_request      *mrq;
145         struct mmc_command      *cmd;
146         struct mmc_command      *stop;
147         struct mmc_data         *data;
148
149         /* Make sure we get a consistent snapshot */
150         spin_lock(&host->lock);
151         mrq = host->mrq;
152
153         if (mrq) {
154                 cmd = mrq->cmd;
155                 data = mrq->data;
156                 stop = mrq->stop;
157
158                 if (cmd)
159                         seq_printf(s,
160                                 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
161                                 cmd->opcode, cmd->arg, cmd->flags,
162                                 cmd->resp[0], cmd->resp[1], cmd->resp[2],
163                                 cmd->resp[2], cmd->error);
164                 if (data)
165                         seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
166                                 data->bytes_xfered, data->blocks,
167                                 data->blksz, data->flags, data->error);
168                 if (stop)
169                         seq_printf(s,
170                                 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
171                                 stop->opcode, stop->arg, stop->flags,
172                                 stop->resp[0], stop->resp[1], stop->resp[2],
173                                 stop->resp[2], stop->error);
174         }
175
176         spin_unlock(&host->lock);
177
178         return 0;
179 }
180
181 static int rk29_sdmmc_req_open(struct inode *inode, struct file *file)
182 {
183         return single_open(file, rk29_sdmmc_req_show, inode->i_private);
184 }
185
186 static const struct file_operations rk29_sdmmc_req_fops = {
187         .owner          = THIS_MODULE,
188         .open           = rk29_sdmmc_req_open,
189         .read           = seq_read,
190         .llseek         = seq_lseek,
191         .release        = single_release,
192 };
193
194 static int rk29_sdmmc_regs_show(struct seq_file *s, void *v)
195 {
196         struct rk29_sdmmc       *host = s->private;
197
198         seq_printf(s, "SDMMC_CTRL:   \t0x%08x\n", SDMMC_CTRL);
199         seq_printf(s, "SDMMC_PWREN:  \t0x%08x\n", SDMMC_PWREN);
200         seq_printf(s, "SDMMC_CLKDIV: \t0x%08x\n", SDMMC_CLKDIV);
201         seq_printf(s, "SDMMC_CLKSRC: \t0x%08x\n", SDMMC_CLKSRC);
202         seq_printf(s, "SDMMC_CLKENA: \t0x%08x\n", SDMMC_CLKENA);
203         seq_printf(s, "SDMMC_TMOUT:  \t0x%08x\n", SDMMC_TMOUT);
204         seq_printf(s, "SDMMC_CTYPE:  \t0x%08x\n", SDMMC_CTYPE);
205         seq_printf(s, "SDMMC_BLKSIZ: \t0x%08x\n", SDMMC_BLKSIZ);
206         seq_printf(s, "SDMMC_BYTCNT: \t0x%08x\n", SDMMC_BYTCNT);
207         seq_printf(s, "SDMMC_INTMASK:\t0x%08x\n", SDMMC_INTMASK);
208         seq_printf(s, "SDMMC_CMDARG: \t0x%08x\n", SDMMC_CMDARG);
209         seq_printf(s, "SDMMC_CMD:    \t0x%08x\n", SDMMC_CMD);
210         seq_printf(s, "SDMMC_RESP0:  \t0x%08x\n", SDMMC_RESP0);
211         seq_printf(s, "SDMMC_RESP1:  \t0x%08x\n", SDMMC_RESP1);
212         seq_printf(s, "SDMMC_RESP2:  \t0x%08x\n", SDMMC_RESP2);
213         seq_printf(s, "SDMMC_RESP3:  \t0x%08x\n", SDMMC_RESP3);
214         seq_printf(s, "SDMMC_MINTSTS:\t0x%08x\n", SDMMC_MINTSTS);
215         seq_printf(s, "SDMMC_RINTSTS:\t0x%08x\n", SDMMC_RINTSTS);
216         seq_printf(s, "SDMMC_STATUS: \t0x%08x\n", SDMMC_STATUS);
217         seq_printf(s, "SDMMC_FIFOTH: \t0x%08x\n", SDMMC_FIFOTH);
218         seq_printf(s, "SDMMC_CDETECT:\t0x%08x\n", SDMMC_CDETECT);
219         seq_printf(s, "SDMMC_WRTPRT: \t0x%08x\n", SDMMC_WRTPRT);
220         seq_printf(s, "SDMMC_TCBCNT: \t0x%08x\n", SDMMC_TCBCNT);
221         seq_printf(s, "SDMMC_TBBCNT: \t0x%08x\n", SDMMC_TBBCNT);
222         seq_printf(s, "SDMMC_DEBNCE: \t0x%08x\n", SDMMC_DEBNCE);
223
224         return 0;
225 }
226
227 static int rk29_sdmmc_regs_open(struct inode *inode, struct file *file)
228 {
229         return single_open(file, rk29_sdmmc_regs_show, inode->i_private);
230 }
231
232 static const struct file_operations rk29_sdmmc_regs_fops = {
233         .owner          = THIS_MODULE,
234         .open           = rk29_sdmmc_regs_open,
235         .read           = seq_read,
236         .llseek         = seq_lseek,
237         .release        = single_release,
238 };
239
240 static void rk29_sdmmc_init_debugfs(struct rk29_sdmmc *host)
241 {
242         struct mmc_host         *mmc = host->mmc;
243         struct dentry           *root;
244         struct dentry           *node;
245
246         root = mmc->debugfs_root;
247         if (!root)
248                 return;
249
250         node = debugfs_create_file("regs", S_IRUSR, root, host,
251                         &rk29_sdmmc_regs_fops);
252         if (IS_ERR(node))
253                 return;
254         if (!node)
255                 goto err;
256
257         node = debugfs_create_file("req", S_IRUSR, root, host, &rk29_sdmmc_req_fops);
258         if (!node)
259                 goto err;
260
261         node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state);
262         if (!node)
263                 goto err;
264
265         node = debugfs_create_x32("pending_events", S_IRUSR, root,
266                                      (u32 *)&host->pending_events);
267         if (!node)
268                 goto err;
269
270         node = debugfs_create_x32("completed_events", S_IRUSR, root,
271                                      (u32 *)&host->completed_events);
272         if (!node)
273                 goto err;
274
275         return;
276
277 err:
278         dev_err(&mmc->class_dev, "failed to initialize debugfs for host\n");
279 }
280 #endif
281
282 static inline unsigned ns_to_clocks(unsigned clkrate, unsigned ns)
283 {
284         u32 clks;
285         if (clkrate > 1000000)
286                 clks =  (ns * (clkrate / 1000000) + 999) / 1000;
287         else
288                 clks =  ((ns/1000) * (clkrate / 1000) + 999) / 1000;
289
290         return clks;
291 }
292
293 static void rk29_sdmmc_set_timeout(struct rk29_sdmmc *host,struct mmc_data *data)
294 {
295         unsigned timeout;
296
297         timeout = ns_to_clocks(host->clock, data->timeout_ns) + data->timeout_clks;
298         rk29_sdmmc_write(host->regs, SDMMC_TMOUT, 0xffffffff);
299         ///rk29_sdmmc_write(host->regs, SDMMC_TMOUT, (timeout << 8) | (70));
300 }
301
302 static u32 rk29_sdmmc_prepare_command(struct mmc_host *mmc,
303                                  struct mmc_command *cmd)
304 {
305         struct mmc_data *data;
306         u32             cmdr;
307         
308         cmd->error = -EINPROGRESS;
309         cmdr = cmd->opcode;
310
311         if(cmdr == 12) 
312                 cmdr |= SDMMC_CMD_STOP;
313         else 
314                 cmdr |= SDMMC_CMD_PRV_DAT_WAIT;
315
316         if (cmd->flags & MMC_RSP_PRESENT) {
317                 cmdr |= SDMMC_CMD_RESP_EXP; // expect the respond, need to set this bit
318                 if (cmd->flags & MMC_RSP_136) 
319                         cmdr |= SDMMC_CMD_RESP_LONG; // expect long respond
320                 
321                 if(cmd->flags & MMC_RSP_CRC) 
322                         cmdr |= SDMMC_CMD_RESP_CRC;
323         }
324
325         data = cmd->data;
326         if (data) {
327                 cmdr |= SDMMC_CMD_DAT_EXP;
328                 if (data->flags & MMC_DATA_STREAM) 
329                         cmdr |= SDMMC_CMD_STRM_MODE; //  set stream mode
330                 if (data->flags & MMC_DATA_WRITE) 
331                     cmdr |= SDMMC_CMD_DAT_WR;
332         }
333         return cmdr;
334 }
335
336
337 static void rk29_sdmmc_start_command(struct rk29_sdmmc *host,
338                 struct mmc_command *cmd, u32 cmd_flags)
339 {
340         int tmo = 5000;
341         host->cmd = cmd;
342         dev_vdbg(&host->pdev->dev,
343                         "start cmd:%d ARGR=0x%08x CMDR=0x%08x\n",
344                         cmd->opcode, cmd->arg, cmd_flags);
345         rk29_sdmmc_write(host->regs, SDMMC_CMDARG, cmd->arg); // write to SDMMC_CMDARG register
346         rk29_sdmmc_write(host->regs, SDMMC_CMD, cmd_flags | SDMMC_CMD_START); // write to SDMMC_CMD register
347
348         /* wait until CIU accepts the command */
349         while (--tmo && (rk29_sdmmc_read(host->regs, SDMMC_CMD) & SDMMC_CMD_START)) 
350                 cpu_relax();
351         if(!tmo){
352                 printk("Enter:%s %d start tmo err!!\n",__FUNCTION__,__LINE__);  
353         }
354 }
355
356 static void send_stop_cmd(struct rk29_sdmmc *host, struct mmc_data *data)
357 {
358         int time_out=100, time_out2=3;
359         unsigned long flags;
360         
361         /*µÈ´ýÇ°Ãæ´«Êä´¦ÀíÍê³É*/
362         while(rk29_sdmmc_read(host->regs, SDMMC_STATUS) & (SDMMC_STAUTS_DATA_BUSY)) {
363                 mdelay(5);
364                 time_out --;            
365                 if(!time_out){
366                         time_out =60;
367                         local_irq_save(flags);  
368                         rk29_sdmmc_write( host->regs, SDMMC_CTRL, rk29_sdmmc_read(host->regs, SDMMC_CTRL) | ( SDMMC_CTRL_FIFO_RESET ));
369                          /* wait till resets clear */
370                         while (rk29_sdmmc_read(host->regs, SDMMC_CTRL) & ( SDMMC_CTRL_FIFO_RESET));
371                         local_irq_restore(flags);
372                         time_out2--;
373                         if(!time_out2)
374                                 break;
375                         
376                 }
377         }
378         /*¼ì²éFIFO,Èç¹û²»Îª¿Õ£¬Çå¿Õ*/
379         if(!(rk29_sdmmc_read(host->regs, SDMMC_STATUS) & SDMMC_STAUTS_FIFO_EMPTY)) {
380                 local_irq_save(flags);  
381                 rk29_sdmmc_write(host->regs, SDMMC_CTRL, rk29_sdmmc_read(host->regs, SDMMC_CTRL) | ( SDMMC_CTRL_FIFO_RESET ));
382                  /* wait till resets clear */
383                 while (readl(host->regs + SDMMC_CTRL) & ( SDMMC_CTRL_FIFO_RESET));
384                 local_irq_restore(flags);
385         }
386         rk29_sdmmc_start_command(host, data->stop, host->stop_cmdr);
387 }
388
389 static void rk29_sdmmc_dma_cleanup(struct rk29_sdmmc *host)
390 {
391         struct mmc_data                 *data = host->data;
392         if (data) 
393                 dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len,
394                      ((data->flags & MMC_DATA_WRITE)
395                       ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
396 }
397
398 static void rk29_sdmmc_stop_dma(struct rk29_sdmmc *host)
399 {
400         if(host->use_dma == 0)
401                 return;
402         if (host->dma_chn > 0) {
403                 //dma_stop_channel(host->dma_chn);
404                 rk29_dma_ctrl(host->dma_chn,RK29_DMAOP_STOP);
405                 rk29_sdmmc_dma_cleanup(host);
406         } else {
407                 /* Data transfer was stopped by the interrupt handler */
408                 rk29_sdmmc_set_pending(host, EVENT_XFER_COMPLETE);
409         }
410 }
411
412 /* This function is called by the DMA driver from tasklet context. */
413 static void rk29_sdmmc_dma_complete(void *arg, int size, enum rk29_dma_buffresult result)  ///(int chn, dma_irq_type_t type, void *arg)
414 {
415         struct rk29_sdmmc       *host = arg;
416         struct mmc_data         *data = host->data;
417
418         if(host->use_dma == 0)
419                 return;
420         dev_vdbg(&host->pdev->dev, "DMA complete\n");
421                         
422         spin_lock(&host->lock);
423         rk29_sdmmc_dma_cleanup(host);
424         /*
425          * If the card was removed, data will be NULL. No point trying
426          * to send the stop command or waiting for NBUSY in this case.
427          */
428         if (data) {
429                 rk29_sdmmc_set_pending(host, EVENT_XFER_COMPLETE);
430                 tasklet_schedule(&host->tasklet);
431         }
432         spin_unlock(&host->lock);
433         if(result != RK29_RES_OK){
434                 rk29_dma_ctrl(host->dma_chn,RK29_DMAOP_STOP);
435                 rk29_dma_ctrl(host->dma_chn,RK29_DMAOP_FLUSH);
436                 rk29_sdmmc_write(host->regs, SDMMC_CTRL, (rk29_sdmmc_read(host->regs, SDMMC_CTRL))&(~SDMMC_CTRL_DMA_ENABLE));
437                 printk("%s: sdio dma complete err\n",__FUNCTION__);
438         }
439 }
440
441 static int rk29_sdmmc_submit_data_dma(struct rk29_sdmmc *host, struct mmc_data *data)
442 {
443         struct scatterlist              *sg;
444         unsigned int                    i,direction;
445         int dma_len=0;
446         
447         if(host->use_dma == 0)
448                 return -ENOSYS;
449         /* If we don't have a channel, we can't do DMA */
450         if (host->dma_chn < 0)
451                 return -ENODEV;
452
453         /*
454          * We don't do DMA on "complex" transfers, i.e. with
455          * non-word-aligned buffers or lengths. Also, we don't bother
456          * with all the DMA setup overhead for short transfers.
457          */
458 #if 0
459         if (data->blocks * data->blksz < RK29_SDMMC_DMA_THRESHOLD)
460                 return -EINVAL;
461 #endif
462         if (data->blksz & 3)
463                 return -EINVAL;
464         for_each_sg(data->sg, sg, data->sg_len, i) {
465                 if (sg->offset & 3 || sg->length & 3)
466                         return -EINVAL;
467         }
468         if (data->flags & MMC_DATA_READ)
469                 direction = RK29_DMASRC_HW;  
470         else
471                 direction = RK29_DMASRC_MEM;                                            
472     rk29_dma_devconfig(host->dma_chn, direction, (unsigned long )(host->dma_addr));
473         dma_len = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, 
474                         (data->flags & MMC_DATA_READ)? DMA_FROM_DEVICE : DMA_TO_DEVICE);                                                                           
475         for (i = 0; i < dma_len; i++)                              
476         rk29_dma_enqueue(host->dma_chn, host, sg_dma_address(&data->sg[i]),sg_dma_len(&data->sg[i]));  // data->sg->dma_address, data->sg->length);             
477         rk29_sdmmc_write(host->regs, SDMMC_CTRL, (rk29_sdmmc_read(host->regs, SDMMC_CTRL))|SDMMC_CTRL_DMA_ENABLE);// enable dma
478         rk29_dma_ctrl(host->dma_chn, RK29_DMAOP_START); 
479         return 0;
480 }
481
482 static void rk29_sdmmc_submit_data(struct rk29_sdmmc *host, struct mmc_data *data)
483 {
484         data->error = -EINPROGRESS;
485
486         WARN_ON(host->data);
487         host->sg = NULL;
488         host->data = data;
489
490         if (rk29_sdmmc_submit_data_dma(host, data)) {
491                 host->sg = data->sg;
492                 host->pio_offset = 0;
493                 if (data->flags & MMC_DATA_READ)
494                         host->dir_status = RK29_SDMMC_RECV_STATUS;
495                 else 
496                         host->dir_status = RK29_SDMMC_SEND_STATUS;
497
498                 rk29_sdmmc_write(host->regs, SDMMC_CTRL, (rk29_sdmmc_read(host->regs, SDMMC_CTRL))&(~SDMMC_CTRL_DMA_ENABLE));
499         }
500
501 }
502
503 static void sdmmc_send_cmd(struct rk29_sdmmc *host, unsigned int cmd, int arg)
504 {
505         int tmo = 10000;
506         
507         rk29_sdmmc_write(host->regs, SDMMC_CMDARG, arg);
508         rk29_sdmmc_write(host->regs, SDMMC_CMD, SDMMC_CMD_START | cmd);         
509         while (--tmo && readl(host->regs + SDMMC_CMD) & SDMMC_CMD_START); 
510         if(!tmo) {
511                 printk("%s %d set cmd register timeout error!!!\n",__FUNCTION__,__LINE__);
512         } 
513 }
514
515 void rk29_sdmmc_setup_bus(struct rk29_sdmmc *host)
516 {
517         u32 div;
518
519         if (host->clock != host->current_speed) {
520                 div  = (((host->bus_hz + (host->bus_hz / 5)) / host->clock)) >> 1;
521                 
522                 /* store the actual clock for calculations */
523                 host->clock = (host->bus_hz / div) >> 1;
524                 /* disable clock */
525                 rk29_sdmmc_write(host->regs, SDMMC_CLKENA, 0);
526                 rk29_sdmmc_write(host->regs, SDMMC_CLKSRC,0);
527                 /* inform CIU */
528                 sdmmc_send_cmd(host, SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0);
529                 /* set clock to desired speed */
530                 rk29_sdmmc_write(host->regs, SDMMC_CLKDIV, div);
531                 /* inform CIU */
532                 sdmmc_send_cmd(host, SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0);
533                 /* enable clock */
534                 rk29_sdmmc_write(host->regs, SDMMC_CLKENA, SDMMC_CLKEN_ENABLE);
535                 /* inform CIU */
536                 sdmmc_send_cmd(host, SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0);
537
538                 host->current_speed = host->clock;
539         }
540
541         /* Set the current  bus width */
542         rk29_sdmmc_write(host->regs, SDMMC_CTYPE, host->ctype);
543 }
544
545 static void rk29_sdmmc_start_request(struct rk29_sdmmc *host)
546 {
547         struct mmc_request      *mrq;
548         struct mmc_command      *cmd;
549         struct mmc_data         *data;
550         u32                     cmdflags;
551         int time_out=100, time_out2=3;
552         unsigned long flags;
553         
554         mrq = host->mrq;
555         /*µÈ´ýÇ°Ãæ´«Êä´¦ÀíÍê³É*/
556         while(rk29_sdmmc_read(host->regs, SDMMC_STATUS) & (SDMMC_STAUTS_DATA_BUSY)) {
557                 mdelay(5);
558                 time_out --;            
559                 if(!time_out){
560                         time_out =60;
561                         local_irq_save(flags);  
562                         rk29_sdmmc_write( host->regs, SDMMC_CTRL, rk29_sdmmc_read(host->regs, SDMMC_CTRL) | ( SDMMC_CTRL_FIFO_RESET ));
563                          /* wait till resets clear */
564                         while (rk29_sdmmc_read(host->regs, SDMMC_CTRL) & ( SDMMC_CTRL_FIFO_RESET));
565                         local_irq_restore(flags);
566                         time_out2--;
567                         if(!time_out2)
568                                 break;
569                         
570                 }
571         }
572         /*¼ì²éFIFO,Èç¹û²»Îª¿Õ£¬Çå¿Õ*/
573         if(!(rk29_sdmmc_read(host->regs, SDMMC_STATUS) & SDMMC_STAUTS_FIFO_EMPTY)) {
574                 local_irq_save(flags);  
575                 rk29_sdmmc_write(host->regs, SDMMC_CTRL, rk29_sdmmc_read(host->regs, SDMMC_CTRL) | ( SDMMC_CTRL_FIFO_RESET ));
576                  /* wait till resets clear */
577                 while (readl(host->regs + SDMMC_CTRL) & ( SDMMC_CTRL_FIFO_RESET));
578                 local_irq_restore(flags);
579         }
580         /* Slot specific timing and width adjustment */
581         rk29_sdmmc_setup_bus(host);
582         host->curr_mrq = mrq;
583         host->pending_events = 0;
584         host->completed_events = 0;
585         host->data_status = 0;
586         data = mrq->data;
587         if (data) {
588                 rk29_sdmmc_set_timeout(host,data);
589                 rk29_sdmmc_write(host->regs, SDMMC_BYTCNT,data->blksz*data->blocks);
590                 rk29_sdmmc_write(host->regs, SDMMC_BLKSIZ,data->blksz);
591         }
592         cmd = mrq->cmd;
593         cmdflags = rk29_sdmmc_prepare_command(host->mmc, cmd);
594         if (unlikely(test_and_clear_bit(RK29_SDMMC_CARD_NEED_INIT, &host->flags))) 
595             cmdflags |= SDMMC_CMD_INIT; //this is the first command, let set send the initializtion clock
596         
597         if (data) //we may need to move this code to mci_start_command
598                 rk29_sdmmc_submit_data(host, data);
599
600         rk29_sdmmc_start_command(host, cmd, cmdflags);
601
602         if (mrq->stop) 
603                 host->stop_cmdr = rk29_sdmmc_prepare_command(host->mmc, mrq->stop);
604         
605 }
606
607 static void rk29_sdmmc_queue_request(struct rk29_sdmmc *host,struct mmc_request *mrq)
608 {
609         spin_lock(&host->lock);
610         host->mrq = mrq;
611         if (host->state == STATE_IDLE) {
612                 host->state = STATE_SENDING_CMD;
613                 rk29_sdmmc_start_request(host);
614         } else {
615                 list_add_tail(&host->queue_node, &host->queue);
616         }
617         spin_unlock(&host->lock);
618 }
619  
620 static void rk29_sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
621 {
622         struct rk29_sdmmc *host = mmc_priv(mmc);
623
624         WARN_ON(host->mrq);
625         
626         if (!test_bit(RK29_SDMMC_CARD_PRESENT, &host->flags)) {
627                 mrq->cmd->error = -ENOMEDIUM;
628                 mmc_request_done(mmc, mrq);
629                 return;
630         }
631         
632         rk29_sdmmc_queue_request(host,mrq);
633 }
634
635 static void rk29_sdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
636 {
637         struct rk29_sdmmc *host = mmc_priv(mmc);;
638
639         host->ctype = 0; // set default 1 bit mode
640
641         switch (ios->bus_width) {
642         case MMC_BUS_WIDTH_1:
643                 host->ctype = 0;
644                 break;
645         case MMC_BUS_WIDTH_4:
646                 host->ctype = SDMMC_CTYPE_4BIT;
647                 break;
648         }
649         if (ios->clock) {
650                 spin_lock(&host->lock);
651                 /*
652                  * Use mirror of ios->clock to prevent race with mmc
653                  * core ios update when finding the minimum.
654                  */
655                 host->clock = ios->clock;
656
657                 spin_unlock(&host->lock);
658         } else {
659                 spin_lock(&host->lock);
660                 host->clock = 0;
661                 spin_unlock(&host->lock);
662         }
663         switch (ios->power_mode) {
664         case MMC_POWER_UP:
665                 set_bit(RK29_SDMMC_CARD_NEED_INIT, &host->flags);
666                 rk29_sdmmc_write(host->regs, SDMMC_PWREN, 1);
667                 break;
668         default:
669                 break;
670         }
671 }
672
673 static int rk29_sdmmc_get_ro(struct mmc_host *mmc)
674 {
675         struct rk29_sdmmc *host = mmc_priv(mmc);
676         u32 wrtprt = rk29_sdmmc_read(host->regs, SDMMC_WRTPRT);
677
678         return (wrtprt & SDMMC_WRITE_PROTECT)?1:0;
679 }
680
681
682 static int rk29_sdmmc_get_cd(struct mmc_host *mmc)
683 {
684         struct rk29_sdmmc *host = mmc_priv(mmc);
685         u32 cdetect = rk29_sdmmc_read(host->regs, SDMMC_CDETECT);
686         return (cdetect & SDMMC_CARD_DETECT_N)?0:1;
687 }
688
689 static void rk29_sdmmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
690 {
691         u32 intmask;
692         unsigned long flags;
693         struct rk29_sdmmc *host = mmc_priv(mmc);
694         
695         spin_lock_irqsave(&host->lock, flags);
696         intmask = rk29_sdmmc_read(host->regs, SDMMC_INTMASK);
697         if(enable)
698                 rk29_sdmmc_write(host->regs, SDMMC_INTMASK, intmask | SDMMC_INT_SDIO);
699         else
700                 rk29_sdmmc_write(host->regs, SDMMC_INTMASK, intmask & ~SDMMC_INT_SDIO);
701         spin_unlock_irqrestore(&host->lock, flags);
702 }
703
704 static const struct mmc_host_ops rk29_sdmmc_ops[] = {
705         {
706                 .request        = rk29_sdmmc_request,
707                 .set_ios        = rk29_sdmmc_set_ios,
708                 .get_ro         = rk29_sdmmc_get_ro,
709                 .get_cd         = rk29_sdmmc_get_cd,
710         },
711         {
712                 .request        = rk29_sdmmc_request,
713                 .set_ios        = rk29_sdmmc_set_ios,
714                 .enable_sdio_irq = rk29_sdmmc_enable_sdio_irq,
715         },
716 };
717
718 static void rk29_sdmmc_request_end(struct rk29_sdmmc *host, struct mmc_request *mrq)
719         __releases(&host->lock)
720         __acquires(&host->lock)
721 {
722         struct mmc_host         *prev_mmc = host->mmc;
723         unsigned long flags;
724         int time_out=100, time_out2=3;
725         
726         WARN_ON(host->cmd || host->data);
727         host->curr_mrq = NULL;
728         host->mrq = NULL;
729         /*µÈ´ýÇ°Ãæ´«Êä´¦ÀíÍê³É*/
730         while(rk29_sdmmc_read(host->regs, SDMMC_STATUS) & (SDMMC_STAUTS_DATA_BUSY)) {
731                 mdelay(5);
732                 time_out --;            
733                 if(!time_out){
734                         time_out =60;
735                         local_irq_save(flags);  
736                         rk29_sdmmc_write( host->regs, SDMMC_CTRL, rk29_sdmmc_read(host->regs, SDMMC_CTRL) | ( SDMMC_CTRL_FIFO_RESET ));
737                          /* wait till resets clear */
738                         while (rk29_sdmmc_read(host->regs, SDMMC_CTRL) & ( SDMMC_CTRL_FIFO_RESET));
739                         local_irq_restore(flags);
740                         time_out2--;
741                         if(!time_out2)
742                                 break;
743                 }
744         }
745         /*¼ì²éFIFO,Èç¹û²»Îª¿Õ£¬Çå¿Õ*/
746         if(!(rk29_sdmmc_read(host->regs, SDMMC_STATUS) & SDMMC_STAUTS_FIFO_EMPTY)) {
747                 local_irq_save(flags);  
748                 rk29_sdmmc_write(host->regs, SDMMC_CTRL, rk29_sdmmc_read(host->regs, SDMMC_CTRL) | ( SDMMC_CTRL_FIFO_RESET ));
749                  /* wait till resets clear */
750                 while (readl(host->regs + SDMMC_CTRL) & ( SDMMC_CTRL_FIFO_RESET));
751                 local_irq_restore(flags);
752         }
753         if (!list_empty(&host->queue)) {
754                 host = list_entry(host->queue.next,
755                                 struct rk29_sdmmc, queue_node);
756                 list_del(&host->queue_node);
757                 host->state = STATE_SENDING_CMD;
758                 rk29_sdmmc_start_request(host);
759         } else {
760                 dev_vdbg(&host->pdev->dev, "list empty\n");
761                 host->state = STATE_IDLE;
762         }
763
764         spin_unlock(&host->lock);
765         mmc_request_done(prev_mmc, mrq);
766
767         spin_lock(&host->lock);
768 }
769
770 static void rk29_sdmmc_command_complete(struct rk29_sdmmc *host,
771                         struct mmc_command *cmd)
772 {
773         u32             status = host->cmd_status;
774
775         host->cmd_status = 0;
776
777         if(cmd->flags & MMC_RSP_PRESENT) {
778
779             if(cmd->flags & MMC_RSP_136) {
780
781                 /* Read the response from the card (up to 16 bytes).
782                  * RK29 SDMMC controller saves bits 127-96 in SDMMC_RESP3
783                  * for easy parsing. But the UNSTUFF_BITS macro in core/mmc.c
784                  * core/sd.c expect those bits be in resp[0]. Hence
785                  * reverse the response word order.
786                  */
787                 cmd->resp[3] = rk29_sdmmc_read(host->regs, SDMMC_RESP0);
788                 cmd->resp[2] = rk29_sdmmc_read(host->regs, SDMMC_RESP1);
789                 cmd->resp[1] = rk29_sdmmc_read(host->regs, SDMMC_RESP2);
790                 cmd->resp[0] = rk29_sdmmc_read(host->regs, SDMMC_RESP3);
791             } else {
792                 cmd->resp[0] = rk29_sdmmc_read(host->regs, SDMMC_RESP0);
793                         cmd->resp[1] = 0;
794                         cmd->resp[2] = 0;
795                         cmd->resp[3] = 0;
796             }
797         }
798
799         if (status & SDMMC_INT_RTO)
800                 cmd->error = -ETIMEDOUT;
801         else if ((cmd->flags & MMC_RSP_CRC) && (status & SDMMC_INT_RCRC))
802                 cmd->error = -EILSEQ;
803         else if (status & SDMMC_INT_RE)
804                 cmd->error = -EIO;
805         else
806                 cmd->error = 0;
807
808         if (cmd->error) {
809                 dev_vdbg(&host->pdev->dev,
810                         "command error: status=0x%08x resp=0x%08x\n"
811                         "cmd=0x%08x arg=0x%08x flg=0x%08x err=%d\n", 
812                         status, cmd->resp[0], 
813                         cmd->opcode, cmd->arg, cmd->flags, cmd->error);
814
815                 if (cmd->data) {
816                         host->data = NULL;
817                         rk29_sdmmc_stop_dma(host);
818                 }
819         } 
820 }
821
822 static void rk29_sdmmc_tasklet_func(unsigned long priv)
823 {
824         struct rk29_sdmmc       *host = (struct rk29_sdmmc *)priv;
825         struct mmc_request      *mrq = host->curr_mrq;
826         struct mmc_data         *data = host->data;
827         struct mmc_command      *cmd = host->cmd;
828         enum rk29_sdmmc_state   state = host->state;
829         enum rk29_sdmmc_state   prev_state;
830         u32                     status;
831
832         spin_lock(&host->lock);
833
834         state = host->state;
835
836         do {
837                 prev_state = state;
838
839                 switch (state) {
840                 case STATE_IDLE:
841                         break;
842
843                 case STATE_SENDING_CMD:                 
844                         if (!rk29_sdmmc_test_and_clear_pending(host,
845                                                 EVENT_CMD_COMPLETE))
846                                 break;
847
848                         host->cmd = NULL;
849                         rk29_sdmmc_set_completed(host, EVENT_CMD_COMPLETE);
850                         rk29_sdmmc_command_complete(host, mrq->cmd);
851                         if (!mrq->data || cmd->error) {
852                                 rk29_sdmmc_request_end(host, host->curr_mrq);
853                                 goto unlock;
854                         }
855
856                         prev_state = state = STATE_SENDING_DATA;
857                         /* fall through */
858
859                 case STATE_SENDING_DATA:
860                         if (rk29_sdmmc_test_and_clear_pending(host,
861                                                 EVENT_DATA_ERROR)) {
862                                 rk29_sdmmc_stop_dma(host);
863                                 if (data->stop)
864                                         send_stop_cmd(host, data);
865                                 state = STATE_DATA_ERROR;
866                                 break;
867                         }
868
869                         if (!rk29_sdmmc_test_and_clear_pending(host,
870                                                 EVENT_XFER_COMPLETE))
871                                 break;
872
873                         rk29_sdmmc_set_completed(host, EVENT_XFER_COMPLETE);
874                         prev_state = state = STATE_DATA_BUSY;
875                         /* fall through */
876
877                 case STATE_DATA_BUSY:
878                         if (!rk29_sdmmc_test_and_clear_pending(host,
879                                                 EVENT_DATA_COMPLETE))
880                                 break;  
881                         host->data = NULL;
882                         rk29_sdmmc_set_completed(host, EVENT_DATA_COMPLETE);
883                         status = host->data_status;
884                         if (unlikely(status & RK29_SDMMC_DATA_ERROR_FLAGS)) {
885                                 if (status & SDMMC_INT_DRTO) {
886                                         dev_err(&host->pdev->dev,
887                                                         "data timeout error\n");
888                                         data->error = -ETIMEDOUT;
889                                 } else if (status & SDMMC_INT_DCRC) {
890                                         dev_err(&host->pdev->dev,
891                                                         "data CRC error\n");
892                                         data->error = -EILSEQ;
893                                 } else {
894                                         dev_err(&host->pdev->dev,
895                                                 "data FIFO error (status=%08x)\n",
896                                                 status);
897                                         data->error = -EIO;
898                                 }
899                         }
900                         else {
901                                 data->bytes_xfered = data->blocks * data->blksz;
902                                 data->error = 0;
903                         }
904
905                         if (!data->stop) {
906                                 rk29_sdmmc_request_end(host, host->curr_mrq);
907                                 goto unlock;
908                         }
909
910                         prev_state = state = STATE_SENDING_STOP;
911                         if (!data->error)
912                                 send_stop_cmd(host, data);
913                         /* fall through */
914
915                 case STATE_SENDING_STOP:
916                         if (!rk29_sdmmc_test_and_clear_pending(host,
917                                                 EVENT_CMD_COMPLETE))
918                                 break;
919
920                         host->cmd = NULL;
921                         rk29_sdmmc_command_complete(host, mrq->stop);
922                         rk29_sdmmc_request_end(host, host->curr_mrq);
923                         goto unlock;
924                 case STATE_DATA_ERROR:
925                         if (!rk29_sdmmc_test_and_clear_pending(host,
926                                                 EVENT_XFER_COMPLETE))
927                                 break;
928
929                         state = STATE_DATA_BUSY;
930                         break;
931                 }
932         } while (state != prev_state);
933
934         host->state = state;
935
936 unlock:
937         spin_unlock(&host->lock);
938
939 }
940
941
942
943 inline static void rk29_sdmmc_push_data(struct rk29_sdmmc *host, void *buf,int cnt)
944 {
945     u32* pData = (u32*)buf;
946
947     if (cnt % 4 != 0) 
948                 cnt = (cnt>>2) +1;
949         else
950         cnt = cnt >> 2;
951     while (cnt > 0) {
952         rk29_sdmmc_write(host->regs, SDMMC_DATA,*pData++);
953         cnt--;
954     }
955 }
956
957 inline static void rk29_sdmmc_pull_data(struct rk29_sdmmc *host,void *buf,int cnt)
958 {
959     u32* pData = (u32*)buf;
960     
961     if (cnt % 4 != 0) 
962                 cnt = (cnt>>2) +1;
963         else
964         cnt = cnt >> 2;
965     while (cnt > 0) {       
966         *pData++ = rk29_sdmmc_read(host->regs, SDMMC_DATA);
967         cnt--;
968     }
969 }
970
971 static void rk29_sdmmc_read_data_pio(struct rk29_sdmmc *host)
972 {
973         struct scatterlist      *sg = host->sg;
974         void                    *buf = sg_virt(sg);
975         unsigned int            offset = host->pio_offset;
976         struct mmc_data         *data = host->data;
977         u32                     status;
978         unsigned int            nbytes = 0,len,old_len,count =0;
979         
980         do {
981                 len = SDMMC_GET_FCNT(rk29_sdmmc_read(host->regs, SDMMC_STATUS)) << 2;
982                 if(count == 0) 
983                         old_len = len;
984                 if (likely(offset + len <= sg->length)) {
985                         rk29_sdmmc_pull_data(host, (void *)(buf + offset),len);
986
987                         offset += len;
988                         nbytes += len;
989
990                         if (offset == sg->length) {
991                                 flush_dcache_page(sg_page(sg));
992                                 host->sg = sg = sg_next(sg);
993                                 if (!sg)
994                                         goto done;
995                                 offset = 0;
996                                 buf = sg_virt(sg);
997                         }
998                 } else {
999                         unsigned int remaining = sg->length - offset;
1000                         rk29_sdmmc_pull_data(host, (void *)(buf + offset),remaining);
1001                         nbytes += remaining;
1002
1003                         flush_dcache_page(sg_page(sg));
1004                         host->sg = sg = sg_next(sg);
1005                         if (!sg)
1006                                 goto done;
1007                         offset = len - remaining;
1008                         buf = sg_virt(sg);
1009                         rk29_sdmmc_pull_data(host, buf,offset);
1010                         nbytes += offset;
1011                 }
1012
1013                 status = rk29_sdmmc_read(host->regs, SDMMC_MINTSTS);
1014                 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_RXDR); // clear RXDR interrupt
1015                 if (status & RK29_SDMMC_DATA_ERROR_FLAGS) {
1016                         host->data_status = status;
1017                         data->bytes_xfered += nbytes;
1018                         smp_wmb();
1019                         rk29_sdmmc_set_pending(host, EVENT_DATA_ERROR);
1020                         tasklet_schedule(&host->tasklet);
1021                         return;
1022                 }
1023                 count ++;
1024         } while (status & SDMMC_INT_RXDR); // if the RXDR is ready let read again
1025         len = SDMMC_GET_FCNT(rk29_sdmmc_read(host->regs, SDMMC_STATUS));
1026         host->pio_offset = offset;
1027         data->bytes_xfered += nbytes;
1028         return;
1029
1030 done:
1031         data->bytes_xfered += nbytes;
1032         smp_wmb();
1033         rk29_sdmmc_set_pending(host, EVENT_XFER_COMPLETE);
1034 }
1035
1036 static void rk29_sdmmc_write_data_pio(struct rk29_sdmmc *host)
1037 {
1038         struct scatterlist      *sg = host->sg;
1039         void                    *buf = sg_virt(sg);
1040         unsigned int            offset = host->pio_offset;
1041         struct mmc_data         *data = host->data;
1042         u32                     status;
1043         unsigned int            nbytes = 0,len;
1044
1045         do {
1046
1047                 len = SDMMC_FIFO_SZ - (SDMMC_GET_FCNT(rk29_sdmmc_read(host->regs, SDMMC_STATUS)) << 2);
1048                 if (likely(offset + len <= sg->length)) {
1049                         rk29_sdmmc_push_data(host, (void *)(buf + offset),len);
1050
1051                         offset += len;
1052                         nbytes += len;
1053                         if (offset == sg->length) {
1054                                 host->sg = sg = sg_next(sg);
1055                                 if (!sg)
1056                                         goto done;
1057
1058                                 offset = 0;
1059                                 buf = sg_virt(sg);
1060                         }
1061                 } else {
1062                         unsigned int remaining = sg->length - offset;
1063                         rk29_sdmmc_push_data(host, (void *)(buf + offset), remaining);
1064                         nbytes += remaining;
1065
1066                         host->sg = sg = sg_next(sg);
1067                         if (!sg) {
1068                                 goto done;
1069                         }
1070
1071                         offset = len - remaining;
1072                         buf = sg_virt(sg);
1073                         rk29_sdmmc_push_data(host, (void *)buf, offset);
1074                         nbytes += offset;
1075                 }
1076
1077                 status = rk29_sdmmc_read(host->regs, SDMMC_MINTSTS);
1078                 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_TXDR); // clear RXDR interrupt
1079                 if (status & RK29_SDMMC_DATA_ERROR_FLAGS) {
1080                         host->data_status = status;
1081                         data->bytes_xfered += nbytes;
1082                         smp_wmb();
1083                         rk29_sdmmc_set_pending(host, EVENT_DATA_ERROR);
1084                         tasklet_schedule(&host->tasklet);
1085                         return;
1086                 }
1087         } while (status & SDMMC_INT_TXDR); // if TXDR, let write again
1088
1089         host->pio_offset = offset;
1090         data->bytes_xfered += nbytes;
1091
1092         return;
1093
1094 done:
1095         data->bytes_xfered += nbytes;
1096         smp_wmb();
1097         rk29_sdmmc_set_pending(host, EVENT_XFER_COMPLETE);
1098 }
1099
1100 static void rk29_sdmmc_cmd_interrupt(struct rk29_sdmmc *host, u32 status)
1101 {
1102         if(!host->cmd_status) 
1103                 host->cmd_status = status;
1104
1105         smp_wmb();
1106         rk29_sdmmc_set_pending(host, EVENT_CMD_COMPLETE);
1107         tasklet_schedule(&host->tasklet);
1108 }
1109
1110 #if 0
1111 static int rk29_sdmmc1_card_get_cd(struct mmc_host *mmc)
1112 {
1113         struct rk29_sdmmc *host = mmc_priv(mmc);
1114         struct rk29_sdmmc_platform_data *pdata = host->pdev->dev.platform_data;
1115         return gpio_get_value(pdata->detect_irq);
1116 }
1117
1118 static int rk29_sdmmc1_card_change_cd_trigger_type(struct mmc_host *mmc, unsigned int type)
1119 {
1120        struct rk29_sdmmc *host = mmc_priv(mmc);
1121        struct rk29_sdmmc_platform_data *pdata = host->pdev->dev.platform_data;
1122        return set_irq_type(gpio_to_irq(pdata->detect_irq), type);
1123 }
1124
1125
1126 static irqreturn_t rk29_sdmmc1_card_detect_interrupt(int irq, void *dev_id)
1127 {
1128        struct rk29_sdmmc *host = dev_id;
1129        bool present, present_old; 
1130        
1131        present = rk29_sdmmc1_card_get_cd(host->mmc);
1132        present_old = test_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1133        if (present != present_old) {
1134              if (present != 0) {
1135                   set_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1136              } else {
1137                   clear_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1138              }
1139              mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(200));
1140        }
1141        rk29_sdmmc1_card_change_cd_trigger_type(host->mmc, (present ? IRQF_TRIGGER_FALLING: IRQF_TRIGGER_RISING)); 
1142    
1143        return IRQ_HANDLED;
1144
1145 }
1146 #endif
1147
1148 static irqreturn_t rk29_sdmmc_interrupt(int irq, void *dev_id)
1149 {
1150         struct rk29_sdmmc       *host = dev_id;
1151         u32                     status,  pending;
1152         unsigned int            pass_count = 0;
1153         bool present;
1154         bool present_old;
1155
1156         spin_lock(&host->lock);
1157         do {
1158                 status = rk29_sdmmc_read(host->regs, SDMMC_RINTSTS);
1159                 pending = rk29_sdmmc_read(host->regs, SDMMC_MINTSTS);// read only mask reg
1160                 if (!pending)
1161                         break;  
1162                 if(pending & SDMMC_INT_CD) {
1163                     writel(SDMMC_INT_CD, host->regs + SDMMC_RINTSTS);  // clear sd detect int
1164                         present = rk29_sdmmc_get_cd(host->mmc);
1165                         present_old = test_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1166                         if(present != present_old) {
1167                                 if (present != 0) {
1168                                         set_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1169                                 } else {
1170                                         clear_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1171                                 }                                                       
1172                                 mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(20));
1173                         }
1174                 }       
1175                 if(pending & RK29_SDMMC_CMD_ERROR_FLAGS) {
1176                     rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,RK29_SDMMC_CMD_ERROR_FLAGS);  //  clear interrupt
1177                     host->cmd_status = status;
1178                     smp_wmb();
1179                     rk29_sdmmc_set_pending(host, EVENT_CMD_COMPLETE);
1180                     tasklet_schedule(&host->tasklet);
1181                 }
1182
1183                 if (pending & RK29_SDMMC_DATA_ERROR_FLAGS) { // if there is an error, let report DATA_ERROR
1184                         rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,RK29_SDMMC_DATA_ERROR_FLAGS);  // clear interrupt
1185                         host->data_status = status;
1186                         smp_wmb();
1187                         rk29_sdmmc_set_pending(host, EVENT_DATA_ERROR);
1188                         tasklet_schedule(&host->tasklet);
1189                 }
1190
1191
1192                 if(pending & SDMMC_INT_DTO) {
1193                     rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_DTO);  // clear interrupt
1194                     if (!host->data_status)
1195                                 host->data_status = status;
1196                     smp_wmb();
1197                     if(host->dir_status == RK29_SDMMC_RECV_STATUS) {
1198                         if(host->sg != NULL) 
1199                                 rk29_sdmmc_read_data_pio(host);
1200                     }
1201                     rk29_sdmmc_set_pending(host, EVENT_DATA_COMPLETE);
1202                     tasklet_schedule(&host->tasklet);
1203                 }
1204
1205                 if (pending & SDMMC_INT_RXDR) {
1206                     rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_RXDR);  //  clear interrupt
1207                     if(host->sg) 
1208                             rk29_sdmmc_read_data_pio(host);
1209                 }
1210
1211                 if (pending & SDMMC_INT_TXDR) {
1212                     rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_TXDR);  //  clear interrupt
1213                     if(host->sg) 
1214                                 rk29_sdmmc_write_data_pio(host);
1215                     
1216                 }
1217
1218                 if (pending & SDMMC_INT_CMD_DONE) {
1219                     rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_CMD_DONE);  //  clear interrupt
1220                     rk29_sdmmc_cmd_interrupt(host, status);
1221                 }
1222                 if(pending & SDMMC_INT_SDIO) {
1223                                 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_SDIO);
1224                                 mmc_signal_sdio_irq(host->mmc);
1225                 }
1226         } while (pass_count++ < 5);
1227         spin_unlock(&host->lock);
1228         return pass_count ? IRQ_HANDLED : IRQ_NONE;
1229 }
1230
1231 /*
1232  *
1233  * MMC card detect thread, kicked off from detect interrupt, 1 timer 
1234  *
1235  */
1236 static void rk29_sdmmc_detect_change(unsigned long data)
1237 {
1238         struct mmc_request *mrq;
1239         struct rk29_sdmmc *host = (struct rk29_sdmmc *)data;;
1240    
1241         smp_rmb();
1242         if (test_bit(RK29_SDMMC_SHUTDOWN, &host->flags))
1243                 return;         
1244         spin_lock(&host->lock); 
1245         /* Clean up queue if present */
1246         mrq = host->mrq;
1247         if (mrq) {
1248                 if (mrq == host->curr_mrq) {
1249                         /* reset all blocks */
1250                         rk29_sdmmc_write(host->regs, SDMMC_CTRL, (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
1251                         /* wait till resets clear */
1252                         while (rk29_sdmmc_read(host->regs, SDMMC_CTRL) & (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
1253                         /* FIFO threshold settings  */
1254                         rk29_sdmmc_write(host->regs, SDMMC_FIFOTH, ((0x3 << 28) | (0x0f << 16) | (0x10 << 0))); // RXMark = 15, TXMark = 16, DMA Size = 16
1255                         rk29_sdmmc_write(host->regs, SDMMC_PWREN, 1);
1256                         rk29_sdmmc_write(host->regs, SDMMC_CTRL, rk29_sdmmc_read(host->regs, SDMMC_CTRL) | SDMMC_CTRL_INT_ENABLE);
1257                         host->data = NULL;
1258                         host->cmd = NULL;
1259  
1260                         switch (host->state) {
1261                         case STATE_IDLE:
1262                                 break;
1263                         case STATE_SENDING_CMD:
1264                                 mrq->cmd->error = -ENOMEDIUM;
1265                                 if (!mrq->data)
1266                                         break;
1267                                 /* fall through */
1268                         case STATE_SENDING_DATA:
1269                                 mrq->data->error = -ENOMEDIUM;
1270                                 rk29_sdmmc_stop_dma(host);
1271                                 break;
1272                         case STATE_DATA_BUSY:
1273                         case STATE_DATA_ERROR:
1274                                 if (mrq->data->error == -EINPROGRESS)
1275                                         mrq->data->error = -ENOMEDIUM;
1276                                 if (!mrq->stop)
1277                                         break;
1278                                 /* fall through */
1279                         case STATE_SENDING_STOP:
1280                                 mrq->stop->error = -ENOMEDIUM;
1281                                 break;
1282                         }
1283
1284                                 rk29_sdmmc_request_end(host, mrq);
1285                         } else {
1286                                 list_del(&host->queue_node);
1287                                 mrq->cmd->error = -ENOMEDIUM;
1288                                 if (mrq->data)
1289                                         mrq->data->error = -ENOMEDIUM;
1290                                 if (mrq->stop)
1291                                         mrq->stop->error = -ENOMEDIUM;
1292                                 spin_unlock(&host->lock);
1293                                 mmc_request_done(host->mmc, mrq);
1294                                 spin_lock(&host->lock);
1295                 }
1296                 }       
1297         spin_unlock(&host->lock);       
1298         mmc_detect_change(host->mmc, 0);        
1299 }
1300
1301 static void rk29_sdmmc1_check_status(unsigned long data)
1302 {
1303         struct rk29_sdmmc *host = (struct rk29_sdmmc *)data;
1304         struct rk29_sdmmc_platform_data *pdata = host->pdev->dev.platform_data;
1305         unsigned int status;
1306
1307         status = pdata->status(mmc_dev(host->mmc));
1308
1309         if (status ^ host->oldstatus)
1310         {
1311                 pr_info("%s: slot status change detected(%d-%d)\n",mmc_hostname(host->mmc), host->oldstatus, status);
1312                 if (status) {
1313                     set_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1314                     mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(200));
1315                 }
1316                 else {
1317                     clear_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1318                     rk29_sdmmc_detect_change((unsigned long)host);
1319                 }
1320         }
1321
1322         host->oldstatus = status;
1323 }
1324
1325 static void rk29_sdmmc1_status_notify_cb(int card_present, void *dev_id)
1326 {
1327         struct rk29_sdmmc *host = dev_id;
1328         printk(KERN_INFO "%s, card_present %d\n", mmc_hostname(host->mmc), card_present);
1329         rk29_sdmmc1_check_status((unsigned long)host);
1330 }
1331
1332 static int rk29_sdmmc_probe(struct platform_device *pdev)
1333 {
1334         struct mmc_host                 *mmc;
1335         struct rk29_sdmmc               *host;
1336         struct resource                 *regs;
1337         struct rk29_sdmmc_platform_data *pdata;
1338         int                             irq;
1339         int                             ret = 0;
1340
1341         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1342         if (!regs)
1343                 return -ENXIO;
1344
1345         irq = platform_get_irq(pdev, 0);
1346         if (irq < 0)
1347                 return irq;
1348         mmc = mmc_alloc_host(sizeof(struct rk29_sdmmc), &pdev->dev);
1349         if (!mmc)
1350                 return -ENOMEM; 
1351         host = mmc_priv(mmc);
1352         host->mmc = mmc;
1353         host->pdev = pdev;
1354         pdata = pdev->dev.platform_data;
1355         if (!pdata) {
1356                 dev_err(&pdev->dev, "Platform data missing\n");
1357                 ret = -ENODEV;
1358                 goto err_freehost;
1359         }
1360         if(pdata->io_init)
1361                 pdata->io_init();
1362         spin_lock_init(&host->lock);
1363         INIT_LIST_HEAD(&host->queue);
1364         ret = -ENOMEM;
1365         host->regs = ioremap(regs->start, regs->end - regs->start);
1366         if (!host->regs)
1367             goto err_freemap;   
1368         memcpy(host->dma_name, pdata->dma_name, 8);    
1369         host->use_dma = pdata->use_dma;     
1370         if(host->use_dma){
1371                 if(strncmp(host->dma_name, "sdio", strlen("sdio")) == 0){
1372                         rk29_dma_request(DMACH_SDIO, &rk29_dma_sdio1_client, NULL);
1373                         host->dma_chn = DMACH_SDIO;
1374                 }
1375                 if(strncmp(host->dma_name, "sd_mmc", strlen("sd_mmc")) == 0){   
1376                         rk29_dma_request(DMACH_SDMMC, &rk29_dma_sdmmc0_client, NULL);
1377                         host->dma_chn = DMACH_SDMMC;
1378                 }       
1379                 rk29_dma_config(host->dma_chn, 16);
1380                 rk29_dma_set_buffdone_fn(host->dma_chn, rk29_sdmmc_dma_complete);       
1381                 host->dma_addr = regs->start + SDMMC_DATA;
1382         }               
1383         host->clk = clk_get(&pdev->dev, "sdmmc");
1384         clk_set_rate(host->clk,52000000);
1385         clk_enable(host->clk);
1386         clk_enable(clk_get(&pdev->dev, "sdmmc_ahb"));
1387         host->bus_hz = clk_get_rate(host->clk);  ///40000000;  ////cgu_get_clk_freq(CGU_SB_SD_MMC_CCLK_IN_ID); 
1388
1389         /* reset all blocks */
1390         rk29_sdmmc_write(host->regs, SDMMC_CTRL,(SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
1391         /* wait till resets clear */
1392         while (rk29_sdmmc_read(host->regs, SDMMC_CTRL) & (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
1393          /* Clear the interrupts for the host controller */
1394         rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, 0xFFFFFFFF);
1395         rk29_sdmmc_write(host->regs, SDMMC_INTMASK, 0); // disable all mmc interrupt first
1396         /* Put in max timeout */
1397         rk29_sdmmc_write(host->regs, SDMMC_TMOUT, 0xFFFFFFFF);
1398
1399         /* FIFO threshold settings  */
1400         rk29_sdmmc_write(host->regs, SDMMC_FIFOTH, ((0x3 << 28) | (0x0f << 16) | (0x10 << 0))); // RXMark = 15, TXMark = 16, DMA Size = 16
1401         /* disable clock to CIU */
1402         rk29_sdmmc_write(host->regs, SDMMC_CLKENA,0);
1403         rk29_sdmmc_write(host->regs, SDMMC_CLKSRC,0);
1404         rk29_sdmmc_write(host->regs, SDMMC_PWREN, 1);
1405         tasklet_init(&host->tasklet, rk29_sdmmc_tasklet_func, (unsigned long)host);
1406         ret = request_irq(irq, rk29_sdmmc_interrupt, 0, dev_name(&pdev->dev), host);
1407         if (ret)
1408             goto err_dmaunmap;
1409        
1410 #if 0 
1411         /* register sdmmc1 card detect interrupt route */ 
1412         if ((pdev->id == 1) && (pdata->detect_irq != 0)) {
1413                 irq = gpio_to_irq(pdata->detect_irq);
1414                 if (irq < 0)  {
1415                         printk("%s: request gpio irq failed\n", __FUNCTION__);
1416                         goto err_dmaunmap;
1417                 }
1418         
1419                 ret = request_irq(irq, rk29_sdmmc1_card_detect_interrupt, IRQF_TRIGGER_RISING, dev_name(&pdev->dev), host);
1420                 if (ret) {
1421                         printk("%s: sdmmc1 request detect interrupt failed\n", __FUNCTION__);
1422                         goto err_dmaunmap;
1423                 }
1424          
1425         }
1426 #endif
1427         /* setup sdmmc1 wifi card detect change */
1428         if (pdata->register_status_notify) {
1429             pdata->register_status_notify(rk29_sdmmc1_status_notify_cb, host);
1430         }
1431
1432         /* Assume card is present initially */
1433         if(rk29_sdmmc_get_cd(host->mmc))
1434                 set_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1435         else
1436                 clear_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1437
1438         /* sdmmc1 wifi card slot status initially */
1439         if (pdata->status) {
1440             host->oldstatus = pdata->status(mmc_dev(host->mmc));
1441             if (host->oldstatus)  {
1442                 set_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1443             }else {
1444                 clear_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1445             }
1446         }
1447
1448         platform_set_drvdata(pdev, host);       
1449         mmc->ops = &rk29_sdmmc_ops[pdev->id];
1450         mmc->f_min = host->bus_hz/510;
1451         mmc->f_max = host->bus_hz/2;  //2;  ///20; //max f is clock to mmc_clk/2
1452         mmc->ocr_avail = pdata->host_ocr_avail;
1453         mmc->caps = pdata->host_caps;
1454         mmc->max_phys_segs = 64;
1455         mmc->max_hw_segs = 64;
1456         mmc->max_blk_size = 4095;  //65536; /* SDMMC_BLKSIZ is 16 bits*/
1457         mmc->max_blk_count = 65535;  ///512;
1458         mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1459         mmc->max_seg_size = mmc->max_req_size;  
1460         
1461         mmc_add_host(mmc);
1462 #if defined (CONFIG_DEBUG_FS)
1463         rk29_sdmmc_init_debugfs(host);
1464 #endif
1465         /* Create card detect handler thread  */
1466         setup_timer(&host->detect_timer, rk29_sdmmc_detect_change,(unsigned long)host);
1467         // enable interrupt for command done, data over, data empty, receive ready and error such as transmit, receive timeout, crc error
1468         rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, 0xFFFFFFFF);
1469         if(host->use_dma)
1470                 rk29_sdmmc_write(host->regs, SDMMC_INTMASK,SDMMC_INT_CMD_DONE | SDMMC_INT_DTO | RK29_SDMMC_ERROR_FLAGS | SDMMC_INT_CD);
1471         else
1472                 rk29_sdmmc_write(host->regs, SDMMC_INTMASK,SDMMC_INT_CMD_DONE | SDMMC_INT_DTO | SDMMC_INT_TXDR | SDMMC_INT_RXDR | RK29_SDMMC_ERROR_FLAGS | SDMMC_INT_CD);
1473         rk29_sdmmc_write(host->regs, SDMMC_CTRL,SDMMC_CTRL_INT_ENABLE); // enable mci interrupt
1474         rk29_sdmmc_write(host->regs, SDMMC_CLKENA,1);
1475         dev_info(&pdev->dev, "RK29 SDMMC controller at irq %d\n", irq);
1476         return 0;
1477 err_dmaunmap:
1478         if(host->use_dma){
1479                 if(strncmp(host->dma_name, "sdio", strlen("sdio")) == 0)
1480                         rk29_dma_free(DMACH_SDIO, &rk29_dma_sdio1_client);
1481                 if(strncmp(host->dma_name, "sd_mmc", strlen("sd_mmc")) == 0)    
1482                         rk29_dma_free(DMACH_SDMMC, &rk29_dma_sdmmc0_client);
1483         }
1484 err_freemap:
1485         iounmap(host->regs);
1486 err_freehost:
1487         kfree(host);
1488         return ret;
1489 }
1490
1491
1492
1493 static int __exit rk29_sdmmc_remove(struct platform_device *pdev)
1494 {
1495         struct rk29_sdmmc *host = platform_get_drvdata(pdev);
1496
1497         rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, 0xFFFFFFFF);
1498         rk29_sdmmc_write(host->regs, SDMMC_INTMASK, 0); // disable all mmc interrupt first
1499         
1500         /* Shutdown detect IRQ and kill detect thread */
1501         del_timer_sync(&host->detect_timer);
1502
1503         /* Debugfs stuff is cleaned up by mmc core */
1504         set_bit(RK29_SDMMC_SHUTDOWN, &host->flags);
1505         smp_wmb();
1506         mmc_remove_host(host->mmc);
1507         mmc_free_host(host->mmc);
1508
1509         /* disable clock to CIU */
1510         rk29_sdmmc_write(host->regs, SDMMC_CLKENA,0);
1511         rk29_sdmmc_write(host->regs, SDMMC_CLKSRC,0);
1512         
1513         free_irq(platform_get_irq(pdev, 0), host);
1514         if(host->use_dma){
1515                 if(strncmp(host->dma_name, "sdio", strlen("sdio")) == 0)
1516                         rk29_dma_free(DMACH_SDIO, &rk29_dma_sdio1_client);
1517                 if(strncmp(host->dma_name, "sd_mmc", strlen("sd_mmc")) == 0)    
1518                         rk29_dma_free(DMACH_SDMMC, &rk29_dma_sdmmc0_client);
1519         }
1520         iounmap(host->regs);
1521
1522         kfree(host);
1523         return 0;
1524 }
1525
1526 static int rk29_sdmmc_suspend(struct platform_device *pdev, pm_message_t state)
1527 {
1528 #ifdef CONFIG_PM
1529         struct rk29_sdmmc *host = platform_get_drvdata(pdev);
1530         rk29_sdmmc_write(host->regs, SDMMC_CLKENA, 0);
1531         clk_disable(host->clk);
1532 #endif
1533         return 0;
1534 }
1535
1536 static int rk29_sdmmc_resume(struct platform_device *pdev)
1537 {
1538 #ifdef CONFIG_PM
1539         struct rk29_sdmmc *host = platform_get_drvdata(pdev);
1540         clk_enable(host->clk);
1541 #endif
1542         return 0;
1543 }
1544
1545 static struct platform_driver rk29_sdmmc_driver = {
1546         .suspend    = rk29_sdmmc_suspend,
1547         .resume     = rk29_sdmmc_resume,
1548         .remove         = __exit_p(rk29_sdmmc_remove),
1549         .driver         = {
1550                 .name           = "rk29_sdmmc",
1551         },
1552 };
1553
1554 static int __init rk29_sdmmc_init(void)
1555 {
1556         return platform_driver_probe(&rk29_sdmmc_driver, rk29_sdmmc_probe);
1557 }
1558
1559 static void __exit rk29_sdmmc_exit(void)
1560 {
1561         platform_driver_unregister(&rk29_sdmmc_driver);
1562 }
1563
1564 module_init(rk29_sdmmc_init);
1565 module_exit(rk29_sdmmc_exit);
1566
1567 MODULE_DESCRIPTION("Rk29 Multimedia Card Interface driver");
1568 MODULE_AUTHOR("Rockchips");
1569 MODULE_LICENSE("GPL v2");
1570