2 * Freescale eSDHC i.MX controller driver for the platform bus.
4 * derived from the OF-version.
6 * Copyright (c) 2010 Pengutronix e.K.
7 * Author: Wolfram Sang <w.sang@pengutronix.de>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License.
15 #include <linux/delay.h>
16 #include <linux/err.h>
17 #include <linux/clk.h>
18 #include <linux/gpio.h>
19 #include <linux/slab.h>
20 #include <linux/mmc/host.h>
21 #include <linux/mmc/mmc.h>
22 #include <linux/mmc/sdio.h>
23 #include <mach/esdhc.h>
24 #include "sdhci-pltfm.h"
25 #include "sdhci-esdhc.h"
27 /* VENDOR SPEC register */
28 #define SDHCI_VENDOR_SPEC 0xC0
29 #define SDHCI_VENDOR_SPEC_SDIO_QUIRK 0x00000002
32 * The CMDTYPE of the CMD register (offset 0xE) should be set to
33 * "11" when the STOP CMD12 is issued on imx53 to abort one
34 * open ended multi-blk IO. Otherwise the TC INT wouldn't
36 * In exact block transfer, the controller doesn't complete the
37 * operations automatically as required at the end of the
38 * transfer and remains on hold if the abort command is not sent.
39 * As a result, the TC flag is not asserted and SW received timeout
40 * exeception. Bit1 of Vendor Spec registor is used to fix it.
42 #define ESDHC_FLAG_MULTIBLK_NO_INT (1 << 1)
51 struct pltfm_imx_data {
54 enum imx_esdhc_type devtype;
55 struct esdhc_platform_data boarddata;
58 static struct platform_device_id imx_esdhc_devtype[] = {
60 .name = "sdhci-esdhc-imx25",
61 .driver_data = IMX25_ESDHC,
63 .name = "sdhci-esdhc-imx35",
64 .driver_data = IMX35_ESDHC,
66 .name = "sdhci-esdhc-imx51",
67 .driver_data = IMX51_ESDHC,
69 .name = "sdhci-esdhc-imx53",
70 .driver_data = IMX53_ESDHC,
75 MODULE_DEVICE_TABLE(platform, imx_esdhc_devtype);
77 static inline int is_imx25_esdhc(struct pltfm_imx_data *data)
79 return data->devtype == IMX25_ESDHC;
82 static inline int is_imx35_esdhc(struct pltfm_imx_data *data)
84 return data->devtype == IMX35_ESDHC;
87 static inline int is_imx51_esdhc(struct pltfm_imx_data *data)
89 return data->devtype == IMX51_ESDHC;
92 static inline int is_imx53_esdhc(struct pltfm_imx_data *data)
94 return data->devtype == IMX53_ESDHC;
97 static inline void esdhc_clrset_le(struct sdhci_host *host, u32 mask, u32 val, int reg)
99 void __iomem *base = host->ioaddr + (reg & ~0x3);
100 u32 shift = (reg & 0x3) * 8;
102 writel(((readl(base) & ~(mask << shift)) | (val << shift)), base);
105 static u32 esdhc_readl_le(struct sdhci_host *host, int reg)
107 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
108 struct pltfm_imx_data *imx_data = pltfm_host->priv;
109 struct esdhc_platform_data *boarddata = &imx_data->boarddata;
111 /* fake CARD_PRESENT flag */
112 u32 val = readl(host->ioaddr + reg);
114 if (unlikely((reg == SDHCI_PRESENT_STATE)
115 && gpio_is_valid(boarddata->cd_gpio))) {
116 if (gpio_get_value(boarddata->cd_gpio))
117 /* no card, if a valid gpio says so... */
118 val &= ~SDHCI_CARD_PRESENT;
120 /* ... in all other cases assume card is present */
121 val |= SDHCI_CARD_PRESENT;
127 static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg)
129 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
130 struct pltfm_imx_data *imx_data = pltfm_host->priv;
131 struct esdhc_platform_data *boarddata = &imx_data->boarddata;
133 if (unlikely((reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE)
134 && (boarddata->cd_type == ESDHC_CD_GPIO)))
136 * these interrupts won't work with a custom card_detect gpio
138 val &= ~(SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT);
140 if (unlikely((imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT)
141 && (reg == SDHCI_INT_STATUS)
142 && (val & SDHCI_INT_DATA_END))) {
144 v = readl(host->ioaddr + SDHCI_VENDOR_SPEC);
145 v &= ~SDHCI_VENDOR_SPEC_SDIO_QUIRK;
146 writel(v, host->ioaddr + SDHCI_VENDOR_SPEC);
149 writel(val, host->ioaddr + reg);
152 static u16 esdhc_readw_le(struct sdhci_host *host, int reg)
154 if (unlikely(reg == SDHCI_HOST_VERSION))
157 return readw(host->ioaddr + reg);
160 static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
162 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
163 struct pltfm_imx_data *imx_data = pltfm_host->priv;
166 case SDHCI_TRANSFER_MODE:
168 * Postpone this write, we must do it together with a
169 * command write that is down below.
171 if ((imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT)
172 && (host->cmd->opcode == SD_IO_RW_EXTENDED)
173 && (host->cmd->data->blocks > 1)
174 && (host->cmd->data->flags & MMC_DATA_READ)) {
176 v = readl(host->ioaddr + SDHCI_VENDOR_SPEC);
177 v |= SDHCI_VENDOR_SPEC_SDIO_QUIRK;
178 writel(v, host->ioaddr + SDHCI_VENDOR_SPEC);
180 imx_data->scratchpad = val;
183 if ((host->cmd->opcode == MMC_STOP_TRANSMISSION)
184 && (imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT))
185 val |= SDHCI_CMD_ABORTCMD;
186 writel(val << 16 | imx_data->scratchpad,
187 host->ioaddr + SDHCI_TRANSFER_MODE);
189 case SDHCI_BLOCK_SIZE:
190 val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);
193 esdhc_clrset_le(host, 0xffff, val, reg);
196 static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg)
201 case SDHCI_POWER_CONTROL:
203 * FSL put some DMA bits here
204 * If your board has a regulator, code should be here
207 case SDHCI_HOST_CONTROL:
208 /* FSL messed up here, so we can just keep those two */
209 new_val = val & (SDHCI_CTRL_LED | SDHCI_CTRL_4BITBUS);
210 /* ensure the endianess */
211 new_val |= ESDHC_HOST_CONTROL_LE;
212 /* DMA mode bits are shifted */
213 new_val |= (val & SDHCI_CTRL_DMA_MASK) << 5;
215 esdhc_clrset_le(host, 0xffff, new_val, reg);
218 esdhc_clrset_le(host, 0xff, val, reg);
221 * The esdhc has a design violation to SDHC spec which tells
222 * that software reset should not affect card detection circuit.
223 * But esdhc clears its SYSCTL register bits [0..2] during the
224 * software reset. This will stop those clocks that card detection
225 * circuit relies on. To work around it, we turn the clocks on back
226 * to keep card detection circuit functional.
228 if ((reg == SDHCI_SOFTWARE_RESET) && (val & 1))
229 esdhc_clrset_le(host, 0x7, 0x7, ESDHC_SYSTEM_CONTROL);
232 static unsigned int esdhc_pltfm_get_max_clock(struct sdhci_host *host)
234 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
236 return clk_get_rate(pltfm_host->clk);
239 static unsigned int esdhc_pltfm_get_min_clock(struct sdhci_host *host)
241 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
243 return clk_get_rate(pltfm_host->clk) / 256 / 16;
246 static unsigned int esdhc_pltfm_get_ro(struct sdhci_host *host)
248 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
249 struct pltfm_imx_data *imx_data = pltfm_host->priv;
250 struct esdhc_platform_data *boarddata = &imx_data->boarddata;
252 switch (boarddata->wp_type) {
254 if (gpio_is_valid(boarddata->wp_gpio))
255 return gpio_get_value(boarddata->wp_gpio);
256 case ESDHC_WP_CONTROLLER:
257 return !(readl(host->ioaddr + SDHCI_PRESENT_STATE) &
258 SDHCI_WRITE_PROTECT);
266 static struct sdhci_ops sdhci_esdhc_ops = {
267 .read_l = esdhc_readl_le,
268 .read_w = esdhc_readw_le,
269 .write_l = esdhc_writel_le,
270 .write_w = esdhc_writew_le,
271 .write_b = esdhc_writeb_le,
272 .set_clock = esdhc_set_clock,
273 .get_max_clock = esdhc_pltfm_get_max_clock,
274 .get_min_clock = esdhc_pltfm_get_min_clock,
275 .get_ro = esdhc_pltfm_get_ro,
278 static struct sdhci_pltfm_data sdhci_esdhc_imx_pdata = {
279 .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_ADMA
280 | SDHCI_QUIRK_BROKEN_CARD_DETECTION,
281 /* ADMA has issues. Might be fixable */
282 .ops = &sdhci_esdhc_ops,
285 static irqreturn_t cd_irq(int irq, void *data)
287 struct sdhci_host *sdhost = (struct sdhci_host *)data;
289 tasklet_schedule(&sdhost->card_tasklet);
293 static int __devinit sdhci_esdhc_imx_probe(struct platform_device *pdev)
295 struct sdhci_pltfm_host *pltfm_host;
296 struct sdhci_host *host;
297 struct esdhc_platform_data *boarddata;
300 struct pltfm_imx_data *imx_data;
302 host = sdhci_pltfm_init(pdev, &sdhci_esdhc_imx_pdata);
304 return PTR_ERR(host);
306 pltfm_host = sdhci_priv(host);
308 imx_data = kzalloc(sizeof(struct pltfm_imx_data), GFP_KERNEL);
312 imx_data->devtype = pdev->id_entry->driver_data;
313 pltfm_host->priv = imx_data;
315 clk = clk_get(mmc_dev(host->mmc), NULL);
317 dev_err(mmc_dev(host->mmc), "clk err\n");
322 pltfm_host->clk = clk;
324 if (!is_imx25_esdhc(imx_data))
325 host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
327 if (is_imx25_esdhc(imx_data) || is_imx35_esdhc(imx_data))
328 /* Fix errata ENGcm07207 present on i.MX25 and i.MX35 */
329 host->quirks |= SDHCI_QUIRK_NO_MULTIBLOCK;
331 if (is_imx53_esdhc(imx_data))
332 imx_data->flags |= ESDHC_FLAG_MULTIBLK_NO_INT;
334 if (!host->mmc->parent->platform_data) {
335 dev_err(mmc_dev(host->mmc), "no board data!\n");
339 imx_data->boarddata = *((struct esdhc_platform_data *)
340 host->mmc->parent->platform_data);
341 boarddata = &imx_data->boarddata;
344 if (boarddata->wp_type == ESDHC_WP_GPIO) {
345 err = gpio_request_one(boarddata->wp_gpio, GPIOF_IN, "ESDHC_WP");
347 dev_warn(mmc_dev(host->mmc),
348 "no write-protect pin available!\n");
349 boarddata->wp_gpio = -EINVAL;
352 boarddata->wp_gpio = -EINVAL;
356 if (boarddata->cd_type != ESDHC_CD_GPIO)
357 boarddata->cd_gpio = -EINVAL;
359 switch (boarddata->cd_type) {
361 err = gpio_request_one(boarddata->cd_gpio, GPIOF_IN, "ESDHC_CD");
363 dev_err(mmc_dev(host->mmc),
364 "no card-detect pin available!\n");
365 goto no_card_detect_pin;
368 err = request_irq(gpio_to_irq(boarddata->cd_gpio), cd_irq,
369 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
370 mmc_hostname(host->mmc), host);
372 dev_err(mmc_dev(host->mmc), "request irq error\n");
373 goto no_card_detect_irq;
377 case ESDHC_CD_CONTROLLER:
378 /* we have a working card_detect back */
379 host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
382 case ESDHC_CD_PERMANENT:
383 host->mmc->caps = MMC_CAP_NONREMOVABLE;
390 err = sdhci_add_host(host);
397 if (gpio_is_valid(boarddata->cd_gpio))
398 free_irq(gpio_to_irq(boarddata->cd_gpio), host);
400 if (gpio_is_valid(boarddata->cd_gpio))
401 gpio_free(boarddata->cd_gpio);
402 if (gpio_is_valid(boarddata->wp_gpio))
403 gpio_free(boarddata->wp_gpio);
406 clk_disable(pltfm_host->clk);
407 clk_put(pltfm_host->clk);
410 sdhci_pltfm_free(pdev);
414 static int __devexit sdhci_esdhc_imx_remove(struct platform_device *pdev)
416 struct sdhci_host *host = platform_get_drvdata(pdev);
417 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
418 struct pltfm_imx_data *imx_data = pltfm_host->priv;
419 struct esdhc_platform_data *boarddata = &imx_data->boarddata;
420 int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff);
422 sdhci_remove_host(host, dead);
424 if (gpio_is_valid(boarddata->wp_gpio))
425 gpio_free(boarddata->wp_gpio);
427 if (gpio_is_valid(boarddata->cd_gpio)) {
428 free_irq(gpio_to_irq(boarddata->cd_gpio), host);
429 gpio_free(boarddata->cd_gpio);
432 clk_disable(pltfm_host->clk);
433 clk_put(pltfm_host->clk);
436 sdhci_pltfm_free(pdev);
441 static struct platform_driver sdhci_esdhc_imx_driver = {
443 .name = "sdhci-esdhc-imx",
444 .owner = THIS_MODULE,
446 .id_table = imx_esdhc_devtype,
447 .probe = sdhci_esdhc_imx_probe,
448 .remove = __devexit_p(sdhci_esdhc_imx_remove),
450 .suspend = sdhci_pltfm_suspend,
451 .resume = sdhci_pltfm_resume,
455 static int __init sdhci_esdhc_imx_init(void)
457 return platform_driver_register(&sdhci_esdhc_imx_driver);
459 module_init(sdhci_esdhc_imx_init);
461 static void __exit sdhci_esdhc_imx_exit(void)
463 platform_driver_unregister(&sdhci_esdhc_imx_driver);
465 module_exit(sdhci_esdhc_imx_exit);
467 MODULE_DESCRIPTION("SDHCI driver for Freescale i.MX eSDHC");
468 MODULE_AUTHOR("Wolfram Sang <w.sang@pengutronix.de>");
469 MODULE_LICENSE("GPL v2");