2 * Freescale eSDHC i.MX controller driver for the platform bus.
4 * derived from the OF-version.
6 * Copyright (c) 2010 Pengutronix e.K.
7 * Author: Wolfram Sang <w.sang@pengutronix.de>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License.
15 #include <linux/delay.h>
16 #include <linux/err.h>
17 #include <linux/clk.h>
18 #include <linux/mmc/host.h>
19 #include <linux/mmc/sdhci-pltfm.h>
21 #include "sdhci-pltfm.h"
22 #include "sdhci-esdhc.h"
24 static inline void esdhc_clrset_le(struct sdhci_host *host, u32 mask, u32 val, int reg)
26 void __iomem *base = host->ioaddr + (reg & ~0x3);
27 u32 shift = (reg & 0x3) * 8;
29 writel(((readl(base) & ~(mask << shift)) | (val << shift)), base);
32 static u16 esdhc_readw_le(struct sdhci_host *host, int reg)
34 if (unlikely(reg == SDHCI_HOST_VERSION))
37 return readw(host->ioaddr + reg);
40 static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
42 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
45 case SDHCI_TRANSFER_MODE:
47 * Postpone this write, we must do it together with a
48 * command write that is down below.
50 pltfm_host->scratchpad = val;
53 writel(val << 16 | pltfm_host->scratchpad,
54 host->ioaddr + SDHCI_TRANSFER_MODE);
56 case SDHCI_BLOCK_SIZE:
57 val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);
60 esdhc_clrset_le(host, 0xffff, val, reg);
63 static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg)
68 case SDHCI_POWER_CONTROL:
70 * FSL put some DMA bits here
71 * If your board has a regulator, code should be here
74 case SDHCI_HOST_CONTROL:
75 /* FSL messed up here, so we can just keep those two */
76 new_val = val & (SDHCI_CTRL_LED | SDHCI_CTRL_4BITBUS);
77 /* ensure the endianess */
78 new_val |= ESDHC_HOST_CONTROL_LE;
79 /* DMA mode bits are shifted */
80 new_val |= (val & SDHCI_CTRL_DMA_MASK) << 5;
82 esdhc_clrset_le(host, 0xffff, new_val, reg);
85 esdhc_clrset_le(host, 0xff, val, reg);
88 static unsigned int esdhc_pltfm_get_max_clock(struct sdhci_host *host)
90 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
92 return clk_get_rate(pltfm_host->clk);
95 static unsigned int esdhc_pltfm_get_min_clock(struct sdhci_host *host)
97 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
99 return clk_get_rate(pltfm_host->clk) / 256 / 16;
102 static int esdhc_pltfm_init(struct sdhci_host *host, struct sdhci_pltfm_data *pdata)
104 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
107 clk = clk_get(mmc_dev(host->mmc), NULL);
109 dev_err(mmc_dev(host->mmc), "clk err\n");
113 pltfm_host->clk = clk;
118 static void esdhc_pltfm_exit(struct sdhci_host *host)
120 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
122 clk_disable(pltfm_host->clk);
123 clk_put(pltfm_host->clk);
126 static struct sdhci_ops sdhci_esdhc_ops = {
127 .read_w = esdhc_readw_le,
128 .write_w = esdhc_writew_le,
129 .write_b = esdhc_writeb_le,
130 .set_clock = esdhc_set_clock,
131 .get_max_clock = esdhc_pltfm_get_max_clock,
132 .get_min_clock = esdhc_pltfm_get_min_clock,
135 struct sdhci_pltfm_data sdhci_esdhc_imx_pdata = {
136 .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_NO_MULTIBLOCK
137 | SDHCI_QUIRK_BROKEN_ADMA,
138 /* ADMA has issues. Might be fixable */
139 /* NO_MULTIBLOCK might be MX35 only (Errata: ENGcm07207) */
140 .ops = &sdhci_esdhc_ops,
141 .init = esdhc_pltfm_init,
142 .exit = esdhc_pltfm_exit,