1 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
3 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version.
10 * Thanks to the following companies for their support:
12 * - JMicron (hardware and technical support)
15 #include <linux/delay.h>
16 #include <linux/highmem.h>
17 #include <linux/module.h>
18 #include <linux/pci.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/slab.h>
21 #include <linux/device.h>
22 #include <linux/mmc/host.h>
23 #include <linux/scatterlist.h>
25 #include <linux/gpio.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/mmc/sdhci-pci-data.h>
34 #define PCI_DEVICE_ID_INTEL_PCH_SDIO0 0x8809
35 #define PCI_DEVICE_ID_INTEL_PCH_SDIO1 0x880a
36 #define PCI_DEVICE_ID_INTEL_BYT_EMMC 0x0f14
37 #define PCI_DEVICE_ID_INTEL_BYT_SDIO 0x0f15
38 #define PCI_DEVICE_ID_INTEL_BYT_SD 0x0f16
44 #define PCI_SDHCI_IFPIO 0x00
45 #define PCI_SDHCI_IFDMA 0x01
46 #define PCI_SDHCI_IFVENDOR 0x02
48 #define PCI_SLOT_INFO 0x40 /* 8 bits */
49 #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
50 #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
54 struct sdhci_pci_chip;
55 struct sdhci_pci_slot;
57 struct sdhci_pci_fixes {
60 bool allow_runtime_pm;
62 int (*probe) (struct sdhci_pci_chip *);
64 int (*probe_slot) (struct sdhci_pci_slot *);
65 void (*remove_slot) (struct sdhci_pci_slot *, int);
67 int (*suspend) (struct sdhci_pci_chip *);
68 int (*resume) (struct sdhci_pci_chip *);
71 struct sdhci_pci_slot {
72 struct sdhci_pci_chip *chip;
73 struct sdhci_host *host;
74 struct sdhci_pci_data *data;
82 struct sdhci_pci_chip {
87 bool allow_runtime_pm;
88 const struct sdhci_pci_fixes *fixes;
90 int num_slots; /* Slots on controller */
91 struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
95 /*****************************************************************************\
97 * Hardware specific quirk handling *
99 \*****************************************************************************/
101 static int ricoh_probe(struct sdhci_pci_chip *chip)
103 if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
104 chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
105 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
109 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
112 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
113 & SDHCI_TIMEOUT_CLK_MASK) |
115 ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
116 & SDHCI_CLOCK_BASE_MASK) |
118 SDHCI_TIMEOUT_CLK_UNIT |
125 static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
127 /* Apply a delay to allow controller to settle */
128 /* Otherwise it becomes confused if card state changed
134 static const struct sdhci_pci_fixes sdhci_ricoh = {
135 .probe = ricoh_probe,
136 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
137 SDHCI_QUIRK_FORCE_DMA |
138 SDHCI_QUIRK_CLOCK_BEFORE_RESET,
141 static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
142 .probe_slot = ricoh_mmc_probe_slot,
143 .resume = ricoh_mmc_resume,
144 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
145 SDHCI_QUIRK_CLOCK_BEFORE_RESET |
146 SDHCI_QUIRK_NO_CARD_NO_RESET |
147 SDHCI_QUIRK_MISSING_CAPS
150 static const struct sdhci_pci_fixes sdhci_ene_712 = {
151 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
152 SDHCI_QUIRK_BROKEN_DMA,
155 static const struct sdhci_pci_fixes sdhci_ene_714 = {
156 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
157 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
158 SDHCI_QUIRK_BROKEN_DMA,
161 static const struct sdhci_pci_fixes sdhci_cafe = {
162 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
163 SDHCI_QUIRK_NO_BUSY_IRQ |
164 SDHCI_QUIRK_BROKEN_CARD_DETECTION |
165 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
168 static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
170 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
175 * ADMA operation is disabled for Moorestown platform due to
178 static int mrst_hc_probe(struct sdhci_pci_chip *chip)
181 * slots number is fixed here for MRST as SDIO3/5 are never used and
182 * have hardware bugs.
188 static int pch_hc_probe_slot(struct sdhci_pci_slot *slot)
190 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
194 #ifdef CONFIG_PM_RUNTIME
196 static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id)
198 struct sdhci_pci_slot *slot = dev_id;
199 struct sdhci_host *host = slot->host;
201 mmc_detect_change(host->mmc, msecs_to_jiffies(200));
205 static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
207 int err, irq, gpio = slot->cd_gpio;
209 slot->cd_gpio = -EINVAL;
210 slot->cd_irq = -EINVAL;
212 if (!gpio_is_valid(gpio))
215 err = gpio_request(gpio, "sd_cd");
219 err = gpio_direction_input(gpio);
223 irq = gpio_to_irq(gpio);
227 err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING |
228 IRQF_TRIGGER_FALLING, "sd_cd", slot);
232 slot->cd_gpio = gpio;
240 dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n");
243 static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
245 if (slot->cd_irq >= 0)
246 free_irq(slot->cd_irq, slot);
247 if (gpio_is_valid(slot->cd_gpio))
248 gpio_free(slot->cd_gpio);
253 static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
257 static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
263 static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot)
265 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
266 slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC |
267 MMC_CAP2_HC_ERASE_SZ;
271 static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot)
273 slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
277 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
278 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
279 .probe_slot = mrst_hc_probe_slot,
282 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
283 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
284 .probe = mrst_hc_probe,
287 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
288 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
289 .allow_runtime_pm = true,
292 static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = {
293 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
294 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
295 .allow_runtime_pm = true,
296 .probe_slot = mfd_sdio_probe_slot,
299 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = {
300 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
301 .allow_runtime_pm = true,
302 .probe_slot = mfd_emmc_probe_slot,
305 static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = {
306 .quirks = SDHCI_QUIRK_BROKEN_ADMA,
307 .probe_slot = pch_hc_probe_slot,
310 static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
312 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
313 slot->host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ;
317 static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
319 slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
323 static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = {
324 .allow_runtime_pm = true,
325 .probe_slot = byt_emmc_probe_slot,
328 static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = {
329 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
330 .allow_runtime_pm = true,
331 .probe_slot = byt_sdio_probe_slot,
334 static const struct sdhci_pci_fixes sdhci_intel_byt_sd = {
335 .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON,
336 .allow_runtime_pm = true,
339 /* O2Micro extra registers */
340 #define O2_SD_LOCK_WP 0xD3
341 #define O2_SD_MULTI_VCC3V 0xEE
342 #define O2_SD_CLKREQ 0xEC
343 #define O2_SD_CAPS 0xE0
344 #define O2_SD_ADMA1 0xE2
345 #define O2_SD_ADMA2 0xE7
346 #define O2_SD_INF_MOD 0xF1
348 static int o2_probe(struct sdhci_pci_chip *chip)
353 switch (chip->pdev->device) {
354 case PCI_DEVICE_ID_O2_8220:
355 case PCI_DEVICE_ID_O2_8221:
356 case PCI_DEVICE_ID_O2_8320:
357 case PCI_DEVICE_ID_O2_8321:
358 /* This extra setup is required due to broken ADMA. */
359 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
363 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
365 /* Set Multi 3 to VCC3V# */
366 pci_write_config_byte(chip->pdev, O2_SD_MULTI_VCC3V, 0x08);
368 /* Disable CLK_REQ# support after media DET */
369 ret = pci_read_config_byte(chip->pdev, O2_SD_CLKREQ, &scratch);
373 pci_write_config_byte(chip->pdev, O2_SD_CLKREQ, scratch);
375 /* Choose capabilities, enable SDMA. We have to write 0x01
376 * to the capabilities register first to unlock it.
378 ret = pci_read_config_byte(chip->pdev, O2_SD_CAPS, &scratch);
382 pci_write_config_byte(chip->pdev, O2_SD_CAPS, scratch);
383 pci_write_config_byte(chip->pdev, O2_SD_CAPS, 0x73);
385 /* Disable ADMA1/2 */
386 pci_write_config_byte(chip->pdev, O2_SD_ADMA1, 0x39);
387 pci_write_config_byte(chip->pdev, O2_SD_ADMA2, 0x08);
389 /* Disable the infinite transfer mode */
390 ret = pci_read_config_byte(chip->pdev, O2_SD_INF_MOD, &scratch);
394 pci_write_config_byte(chip->pdev, O2_SD_INF_MOD, scratch);
397 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
401 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
407 static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
412 ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
417 * Turn PMOS on [bit 0], set over current detection to 2.4 V
418 * [bit 1:2] and enable over current debouncing [bit 6].
425 ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
432 static int jmicron_probe(struct sdhci_pci_chip *chip)
437 if (chip->pdev->revision == 0) {
438 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
439 SDHCI_QUIRK_32BIT_DMA_SIZE |
440 SDHCI_QUIRK_32BIT_ADMA_SIZE |
441 SDHCI_QUIRK_RESET_AFTER_REQUEST |
442 SDHCI_QUIRK_BROKEN_SMALL_PIO;
446 * JMicron chips can have two interfaces to the same hardware
447 * in order to work around limitations in Microsoft's driver.
448 * We need to make sure we only bind to one of them.
450 * This code assumes two things:
452 * 1. The PCI code adds subfunctions in order.
454 * 2. The MMC interface has a lower subfunction number
455 * than the SD interface.
457 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
458 mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
459 else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
460 mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;
463 struct pci_dev *sd_dev;
466 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
467 mmcdev, sd_dev)) != NULL) {
468 if ((PCI_SLOT(chip->pdev->devfn) ==
469 PCI_SLOT(sd_dev->devfn)) &&
470 (chip->pdev->bus == sd_dev->bus))
476 dev_info(&chip->pdev->dev, "Refusing to bind to "
477 "secondary interface.\n");
483 * JMicron chips need a bit of a nudge to enable the power
486 ret = jmicron_pmos(chip, 1);
488 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
492 /* quirk for unsable RO-detection on JM388 chips */
493 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD ||
494 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
495 chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT;
500 static void jmicron_enable_mmc(struct sdhci_host *host, int on)
504 scratch = readb(host->ioaddr + 0xC0);
511 writeb(scratch, host->ioaddr + 0xC0);
514 static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
516 if (slot->chip->pdev->revision == 0) {
519 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
520 version = (version & SDHCI_VENDOR_VER_MASK) >>
521 SDHCI_VENDOR_VER_SHIFT;
524 * Older versions of the chip have lots of nasty glitches
525 * in the ADMA engine. It's best just to avoid it
529 slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
532 /* JM388 MMC doesn't support 1.8V while SD supports it */
533 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
534 slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
535 MMC_VDD_29_30 | MMC_VDD_30_31 |
536 MMC_VDD_165_195; /* allow 1.8V */
537 slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
538 MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */
542 * The secondary interface requires a bit set to get the
545 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
546 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
547 jmicron_enable_mmc(slot->host, 1);
549 slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;
554 static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
559 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
560 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
561 jmicron_enable_mmc(slot->host, 0);
564 static int jmicron_suspend(struct sdhci_pci_chip *chip)
568 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
569 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
570 for (i = 0; i < chip->num_slots; i++)
571 jmicron_enable_mmc(chip->slots[i]->host, 0);
577 static int jmicron_resume(struct sdhci_pci_chip *chip)
581 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
582 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
583 for (i = 0; i < chip->num_slots; i++)
584 jmicron_enable_mmc(chip->slots[i]->host, 1);
587 ret = jmicron_pmos(chip, 1);
589 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
596 static const struct sdhci_pci_fixes sdhci_o2 = {
600 static const struct sdhci_pci_fixes sdhci_jmicron = {
601 .probe = jmicron_probe,
603 .probe_slot = jmicron_probe_slot,
604 .remove_slot = jmicron_remove_slot,
606 .suspend = jmicron_suspend,
607 .resume = jmicron_resume,
610 /* SysKonnect CardBus2SDIO extra registers */
611 #define SYSKT_CTRL 0x200
612 #define SYSKT_RDFIFO_STAT 0x204
613 #define SYSKT_WRFIFO_STAT 0x208
614 #define SYSKT_POWER_DATA 0x20c
615 #define SYSKT_POWER_330 0xef
616 #define SYSKT_POWER_300 0xf8
617 #define SYSKT_POWER_184 0xcc
618 #define SYSKT_POWER_CMD 0x20d
619 #define SYSKT_POWER_START (1 << 7)
620 #define SYSKT_POWER_STATUS 0x20e
621 #define SYSKT_POWER_STATUS_OK (1 << 0)
622 #define SYSKT_BOARD_REV 0x210
623 #define SYSKT_CHIP_REV 0x211
624 #define SYSKT_CONF_DATA 0x212
625 #define SYSKT_CONF_DATA_1V8 (1 << 2)
626 #define SYSKT_CONF_DATA_2V5 (1 << 1)
627 #define SYSKT_CONF_DATA_3V3 (1 << 0)
629 static int syskt_probe(struct sdhci_pci_chip *chip)
631 if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
632 chip->pdev->class &= ~0x0000FF;
633 chip->pdev->class |= PCI_SDHCI_IFDMA;
638 static int syskt_probe_slot(struct sdhci_pci_slot *slot)
642 u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
643 u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
644 dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
645 "board rev %d.%d, chip rev %d.%d\n",
646 board_rev >> 4, board_rev & 0xf,
647 chip_rev >> 4, chip_rev & 0xf);
648 if (chip_rev >= 0x20)
649 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
651 writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
652 writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
654 tm = 10; /* Wait max 1 ms */
656 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
657 if (ps & SYSKT_POWER_STATUS_OK)
662 dev_err(&slot->chip->pdev->dev,
663 "power regulator never stabilized");
664 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
671 static const struct sdhci_pci_fixes sdhci_syskt = {
672 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
673 .probe = syskt_probe,
674 .probe_slot = syskt_probe_slot,
677 static int via_probe(struct sdhci_pci_chip *chip)
679 if (chip->pdev->revision == 0x10)
680 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
685 static const struct sdhci_pci_fixes sdhci_via = {
689 static const struct pci_device_id pci_ids[] = {
691 .vendor = PCI_VENDOR_ID_RICOH,
692 .device = PCI_DEVICE_ID_RICOH_R5C822,
693 .subvendor = PCI_ANY_ID,
694 .subdevice = PCI_ANY_ID,
695 .driver_data = (kernel_ulong_t)&sdhci_ricoh,
699 .vendor = PCI_VENDOR_ID_RICOH,
701 .subvendor = PCI_ANY_ID,
702 .subdevice = PCI_ANY_ID,
703 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
707 .vendor = PCI_VENDOR_ID_RICOH,
709 .subvendor = PCI_ANY_ID,
710 .subdevice = PCI_ANY_ID,
711 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
715 .vendor = PCI_VENDOR_ID_RICOH,
717 .subvendor = PCI_ANY_ID,
718 .subdevice = PCI_ANY_ID,
719 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
723 .vendor = PCI_VENDOR_ID_ENE,
724 .device = PCI_DEVICE_ID_ENE_CB712_SD,
725 .subvendor = PCI_ANY_ID,
726 .subdevice = PCI_ANY_ID,
727 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
731 .vendor = PCI_VENDOR_ID_ENE,
732 .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
733 .subvendor = PCI_ANY_ID,
734 .subdevice = PCI_ANY_ID,
735 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
739 .vendor = PCI_VENDOR_ID_ENE,
740 .device = PCI_DEVICE_ID_ENE_CB714_SD,
741 .subvendor = PCI_ANY_ID,
742 .subdevice = PCI_ANY_ID,
743 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
747 .vendor = PCI_VENDOR_ID_ENE,
748 .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
749 .subvendor = PCI_ANY_ID,
750 .subdevice = PCI_ANY_ID,
751 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
755 .vendor = PCI_VENDOR_ID_MARVELL,
756 .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
757 .subvendor = PCI_ANY_ID,
758 .subdevice = PCI_ANY_ID,
759 .driver_data = (kernel_ulong_t)&sdhci_cafe,
763 .vendor = PCI_VENDOR_ID_JMICRON,
764 .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
765 .subvendor = PCI_ANY_ID,
766 .subdevice = PCI_ANY_ID,
767 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
771 .vendor = PCI_VENDOR_ID_JMICRON,
772 .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
773 .subvendor = PCI_ANY_ID,
774 .subdevice = PCI_ANY_ID,
775 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
779 .vendor = PCI_VENDOR_ID_JMICRON,
780 .device = PCI_DEVICE_ID_JMICRON_JMB388_SD,
781 .subvendor = PCI_ANY_ID,
782 .subdevice = PCI_ANY_ID,
783 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
787 .vendor = PCI_VENDOR_ID_JMICRON,
788 .device = PCI_DEVICE_ID_JMICRON_JMB388_ESD,
789 .subvendor = PCI_ANY_ID,
790 .subdevice = PCI_ANY_ID,
791 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
795 .vendor = PCI_VENDOR_ID_SYSKONNECT,
797 .subvendor = PCI_ANY_ID,
798 .subdevice = PCI_ANY_ID,
799 .driver_data = (kernel_ulong_t)&sdhci_syskt,
803 .vendor = PCI_VENDOR_ID_VIA,
805 .subvendor = PCI_ANY_ID,
806 .subdevice = PCI_ANY_ID,
807 .driver_data = (kernel_ulong_t)&sdhci_via,
811 .vendor = PCI_VENDOR_ID_INTEL,
812 .device = PCI_DEVICE_ID_INTEL_MRST_SD0,
813 .subvendor = PCI_ANY_ID,
814 .subdevice = PCI_ANY_ID,
815 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
819 .vendor = PCI_VENDOR_ID_INTEL,
820 .device = PCI_DEVICE_ID_INTEL_MRST_SD1,
821 .subvendor = PCI_ANY_ID,
822 .subdevice = PCI_ANY_ID,
823 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
827 .vendor = PCI_VENDOR_ID_INTEL,
828 .device = PCI_DEVICE_ID_INTEL_MRST_SD2,
829 .subvendor = PCI_ANY_ID,
830 .subdevice = PCI_ANY_ID,
831 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
835 .vendor = PCI_VENDOR_ID_INTEL,
836 .device = PCI_DEVICE_ID_INTEL_MFD_SD,
837 .subvendor = PCI_ANY_ID,
838 .subdevice = PCI_ANY_ID,
839 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sd,
843 .vendor = PCI_VENDOR_ID_INTEL,
844 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
845 .subvendor = PCI_ANY_ID,
846 .subdevice = PCI_ANY_ID,
847 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
851 .vendor = PCI_VENDOR_ID_INTEL,
852 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
853 .subvendor = PCI_ANY_ID,
854 .subdevice = PCI_ANY_ID,
855 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
859 .vendor = PCI_VENDOR_ID_INTEL,
860 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
861 .subvendor = PCI_ANY_ID,
862 .subdevice = PCI_ANY_ID,
863 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
867 .vendor = PCI_VENDOR_ID_INTEL,
868 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
869 .subvendor = PCI_ANY_ID,
870 .subdevice = PCI_ANY_ID,
871 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
875 .vendor = PCI_VENDOR_ID_INTEL,
876 .device = PCI_DEVICE_ID_INTEL_PCH_SDIO0,
877 .subvendor = PCI_ANY_ID,
878 .subdevice = PCI_ANY_ID,
879 .driver_data = (kernel_ulong_t)&sdhci_intel_pch_sdio,
883 .vendor = PCI_VENDOR_ID_INTEL,
884 .device = PCI_DEVICE_ID_INTEL_PCH_SDIO1,
885 .subvendor = PCI_ANY_ID,
886 .subdevice = PCI_ANY_ID,
887 .driver_data = (kernel_ulong_t)&sdhci_intel_pch_sdio,
891 .vendor = PCI_VENDOR_ID_INTEL,
892 .device = PCI_DEVICE_ID_INTEL_BYT_EMMC,
893 .subvendor = PCI_ANY_ID,
894 .subdevice = PCI_ANY_ID,
895 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
899 .vendor = PCI_VENDOR_ID_INTEL,
900 .device = PCI_DEVICE_ID_INTEL_BYT_SDIO,
901 .subvendor = PCI_ANY_ID,
902 .subdevice = PCI_ANY_ID,
903 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sdio,
907 .vendor = PCI_VENDOR_ID_INTEL,
908 .device = PCI_DEVICE_ID_INTEL_BYT_SD,
909 .subvendor = PCI_ANY_ID,
910 .subdevice = PCI_ANY_ID,
911 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sd,
915 .vendor = PCI_VENDOR_ID_O2,
916 .device = PCI_DEVICE_ID_O2_8120,
917 .subvendor = PCI_ANY_ID,
918 .subdevice = PCI_ANY_ID,
919 .driver_data = (kernel_ulong_t)&sdhci_o2,
923 .vendor = PCI_VENDOR_ID_O2,
924 .device = PCI_DEVICE_ID_O2_8220,
925 .subvendor = PCI_ANY_ID,
926 .subdevice = PCI_ANY_ID,
927 .driver_data = (kernel_ulong_t)&sdhci_o2,
931 .vendor = PCI_VENDOR_ID_O2,
932 .device = PCI_DEVICE_ID_O2_8221,
933 .subvendor = PCI_ANY_ID,
934 .subdevice = PCI_ANY_ID,
935 .driver_data = (kernel_ulong_t)&sdhci_o2,
939 .vendor = PCI_VENDOR_ID_O2,
940 .device = PCI_DEVICE_ID_O2_8320,
941 .subvendor = PCI_ANY_ID,
942 .subdevice = PCI_ANY_ID,
943 .driver_data = (kernel_ulong_t)&sdhci_o2,
947 .vendor = PCI_VENDOR_ID_O2,
948 .device = PCI_DEVICE_ID_O2_8321,
949 .subvendor = PCI_ANY_ID,
950 .subdevice = PCI_ANY_ID,
951 .driver_data = (kernel_ulong_t)&sdhci_o2,
954 { /* Generic SD host controller */
955 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
958 { /* end: all zeroes */ },
961 MODULE_DEVICE_TABLE(pci, pci_ids);
963 /*****************************************************************************\
965 * SDHCI core callbacks *
967 \*****************************************************************************/
969 static int sdhci_pci_enable_dma(struct sdhci_host *host)
971 struct sdhci_pci_slot *slot;
972 struct pci_dev *pdev;
975 slot = sdhci_priv(host);
976 pdev = slot->chip->pdev;
978 if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
979 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
980 (host->flags & SDHCI_USE_SDMA)) {
981 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
982 "doesn't fully claim to support it.\n");
985 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
989 pci_set_master(pdev);
994 static int sdhci_pci_bus_width(struct sdhci_host *host, int width)
998 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
1001 case MMC_BUS_WIDTH_8:
1002 ctrl |= SDHCI_CTRL_8BITBUS;
1003 ctrl &= ~SDHCI_CTRL_4BITBUS;
1005 case MMC_BUS_WIDTH_4:
1006 ctrl |= SDHCI_CTRL_4BITBUS;
1007 ctrl &= ~SDHCI_CTRL_8BITBUS;
1010 ctrl &= ~(SDHCI_CTRL_8BITBUS | SDHCI_CTRL_4BITBUS);
1014 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1019 static void sdhci_pci_hw_reset(struct sdhci_host *host)
1021 struct sdhci_pci_slot *slot = sdhci_priv(host);
1022 int rst_n_gpio = slot->rst_n_gpio;
1024 if (!gpio_is_valid(rst_n_gpio))
1026 gpio_set_value_cansleep(rst_n_gpio, 0);
1027 /* For eMMC, minimum is 1us but give it 10us for good measure */
1029 gpio_set_value_cansleep(rst_n_gpio, 1);
1030 /* For eMMC, minimum is 200us but give it 300us for good measure */
1031 usleep_range(300, 1000);
1034 static const struct sdhci_ops sdhci_pci_ops = {
1035 .enable_dma = sdhci_pci_enable_dma,
1036 .platform_bus_width = sdhci_pci_bus_width,
1037 .hw_reset = sdhci_pci_hw_reset,
1040 /*****************************************************************************\
1044 \*****************************************************************************/
1048 static int sdhci_pci_suspend(struct device *dev)
1050 struct pci_dev *pdev = to_pci_dev(dev);
1051 struct sdhci_pci_chip *chip;
1052 struct sdhci_pci_slot *slot;
1053 mmc_pm_flag_t slot_pm_flags;
1054 mmc_pm_flag_t pm_flags = 0;
1057 chip = pci_get_drvdata(pdev);
1061 for (i = 0; i < chip->num_slots; i++) {
1062 slot = chip->slots[i];
1066 ret = sdhci_suspend_host(slot->host);
1069 goto err_pci_suspend;
1071 slot_pm_flags = slot->host->mmc->pm_flags;
1072 if (slot_pm_flags & MMC_PM_WAKE_SDIO_IRQ)
1073 sdhci_enable_irq_wakeups(slot->host);
1075 pm_flags |= slot_pm_flags;
1078 if (chip->fixes && chip->fixes->suspend) {
1079 ret = chip->fixes->suspend(chip);
1081 goto err_pci_suspend;
1084 pci_save_state(pdev);
1085 if (pm_flags & MMC_PM_KEEP_POWER) {
1086 if (pm_flags & MMC_PM_WAKE_SDIO_IRQ) {
1087 pci_pme_active(pdev, true);
1088 pci_enable_wake(pdev, PCI_D3hot, 1);
1090 pci_set_power_state(pdev, PCI_D3hot);
1092 pci_enable_wake(pdev, PCI_D3hot, 0);
1093 pci_disable_device(pdev);
1094 pci_set_power_state(pdev, PCI_D3hot);
1101 sdhci_resume_host(chip->slots[i]->host);
1105 static int sdhci_pci_resume(struct device *dev)
1107 struct pci_dev *pdev = to_pci_dev(dev);
1108 struct sdhci_pci_chip *chip;
1109 struct sdhci_pci_slot *slot;
1112 chip = pci_get_drvdata(pdev);
1116 pci_set_power_state(pdev, PCI_D0);
1117 pci_restore_state(pdev);
1118 ret = pci_enable_device(pdev);
1122 if (chip->fixes && chip->fixes->resume) {
1123 ret = chip->fixes->resume(chip);
1128 for (i = 0; i < chip->num_slots; i++) {
1129 slot = chip->slots[i];
1133 ret = sdhci_resume_host(slot->host);
1141 #else /* CONFIG_PM */
1143 #define sdhci_pci_suspend NULL
1144 #define sdhci_pci_resume NULL
1146 #endif /* CONFIG_PM */
1148 #ifdef CONFIG_PM_RUNTIME
1150 static int sdhci_pci_runtime_suspend(struct device *dev)
1152 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1153 struct sdhci_pci_chip *chip;
1154 struct sdhci_pci_slot *slot;
1157 chip = pci_get_drvdata(pdev);
1161 for (i = 0; i < chip->num_slots; i++) {
1162 slot = chip->slots[i];
1166 ret = sdhci_runtime_suspend_host(slot->host);
1169 goto err_pci_runtime_suspend;
1172 if (chip->fixes && chip->fixes->suspend) {
1173 ret = chip->fixes->suspend(chip);
1175 goto err_pci_runtime_suspend;
1180 err_pci_runtime_suspend:
1182 sdhci_runtime_resume_host(chip->slots[i]->host);
1186 static int sdhci_pci_runtime_resume(struct device *dev)
1188 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1189 struct sdhci_pci_chip *chip;
1190 struct sdhci_pci_slot *slot;
1193 chip = pci_get_drvdata(pdev);
1197 if (chip->fixes && chip->fixes->resume) {
1198 ret = chip->fixes->resume(chip);
1203 for (i = 0; i < chip->num_slots; i++) {
1204 slot = chip->slots[i];
1208 ret = sdhci_runtime_resume_host(slot->host);
1216 static int sdhci_pci_runtime_idle(struct device *dev)
1223 #define sdhci_pci_runtime_suspend NULL
1224 #define sdhci_pci_runtime_resume NULL
1225 #define sdhci_pci_runtime_idle NULL
1229 static const struct dev_pm_ops sdhci_pci_pm_ops = {
1230 .suspend = sdhci_pci_suspend,
1231 .resume = sdhci_pci_resume,
1232 .runtime_suspend = sdhci_pci_runtime_suspend,
1233 .runtime_resume = sdhci_pci_runtime_resume,
1234 .runtime_idle = sdhci_pci_runtime_idle,
1237 /*****************************************************************************\
1239 * Device probing/removal *
1241 \*****************************************************************************/
1243 static struct sdhci_pci_slot *sdhci_pci_probe_slot(
1244 struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar,
1247 struct sdhci_pci_slot *slot;
1248 struct sdhci_host *host;
1249 int ret, bar = first_bar + slotno;
1251 if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
1252 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
1253 return ERR_PTR(-ENODEV);
1256 if (pci_resource_len(pdev, bar) < 0x100) {
1257 dev_err(&pdev->dev, "Invalid iomem size. You may "
1258 "experience problems.\n");
1261 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1262 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
1263 return ERR_PTR(-ENODEV);
1266 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1267 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
1268 return ERR_PTR(-ENODEV);
1271 host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
1273 dev_err(&pdev->dev, "cannot allocate host\n");
1274 return ERR_CAST(host);
1277 slot = sdhci_priv(host);
1281 slot->pci_bar = bar;
1282 slot->rst_n_gpio = -EINVAL;
1283 slot->cd_gpio = -EINVAL;
1285 /* Retrieve platform data if there is any */
1286 if (*sdhci_pci_get_data)
1287 slot->data = sdhci_pci_get_data(pdev, slotno);
1290 if (slot->data->setup) {
1291 ret = slot->data->setup(slot->data);
1293 dev_err(&pdev->dev, "platform setup failed\n");
1297 slot->rst_n_gpio = slot->data->rst_n_gpio;
1298 slot->cd_gpio = slot->data->cd_gpio;
1301 host->hw_name = "PCI";
1302 host->ops = &sdhci_pci_ops;
1303 host->quirks = chip->quirks;
1304 host->quirks2 = chip->quirks2;
1306 host->irq = pdev->irq;
1308 ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
1310 dev_err(&pdev->dev, "cannot request region\n");
1314 host->ioaddr = pci_ioremap_bar(pdev, bar);
1315 if (!host->ioaddr) {
1316 dev_err(&pdev->dev, "failed to remap registers\n");
1321 if (chip->fixes && chip->fixes->probe_slot) {
1322 ret = chip->fixes->probe_slot(slot);
1327 if (gpio_is_valid(slot->rst_n_gpio)) {
1328 if (!gpio_request(slot->rst_n_gpio, "eMMC_reset")) {
1329 gpio_direction_output(slot->rst_n_gpio, 1);
1330 slot->host->mmc->caps |= MMC_CAP_HW_RESET;
1332 dev_warn(&pdev->dev, "failed to request rst_n_gpio\n");
1333 slot->rst_n_gpio = -EINVAL;
1337 host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
1338 host->mmc->slotno = slotno;
1339 host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
1341 ret = sdhci_add_host(host);
1345 sdhci_pci_add_own_cd(slot);
1350 if (gpio_is_valid(slot->rst_n_gpio))
1351 gpio_free(slot->rst_n_gpio);
1353 if (chip->fixes && chip->fixes->remove_slot)
1354 chip->fixes->remove_slot(slot, 0);
1357 iounmap(host->ioaddr);
1360 pci_release_region(pdev, bar);
1363 if (slot->data && slot->data->cleanup)
1364 slot->data->cleanup(slot->data);
1367 sdhci_free_host(host);
1369 return ERR_PTR(ret);
1372 static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
1377 sdhci_pci_remove_own_cd(slot);
1380 scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
1381 if (scratch == (u32)-1)
1384 sdhci_remove_host(slot->host, dead);
1386 if (gpio_is_valid(slot->rst_n_gpio))
1387 gpio_free(slot->rst_n_gpio);
1389 if (slot->chip->fixes && slot->chip->fixes->remove_slot)
1390 slot->chip->fixes->remove_slot(slot, dead);
1392 if (slot->data && slot->data->cleanup)
1393 slot->data->cleanup(slot->data);
1395 pci_release_region(slot->chip->pdev, slot->pci_bar);
1397 sdhci_free_host(slot->host);
1400 static void sdhci_pci_runtime_pm_allow(struct device *dev)
1402 pm_runtime_put_noidle(dev);
1403 pm_runtime_allow(dev);
1404 pm_runtime_set_autosuspend_delay(dev, 50);
1405 pm_runtime_use_autosuspend(dev);
1406 pm_suspend_ignore_children(dev, 1);
1409 static void sdhci_pci_runtime_pm_forbid(struct device *dev)
1411 pm_runtime_forbid(dev);
1412 pm_runtime_get_noresume(dev);
1415 static int sdhci_pci_probe(struct pci_dev *pdev,
1416 const struct pci_device_id *ent)
1418 struct sdhci_pci_chip *chip;
1419 struct sdhci_pci_slot *slot;
1421 u8 slots, first_bar;
1424 BUG_ON(pdev == NULL);
1425 BUG_ON(ent == NULL);
1427 dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1428 (int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
1430 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1434 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1435 dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
1439 BUG_ON(slots > MAX_SLOTS);
1441 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1445 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1447 if (first_bar > 5) {
1448 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
1452 ret = pci_enable_device(pdev);
1456 chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
1463 chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data;
1465 chip->quirks = chip->fixes->quirks;
1466 chip->quirks2 = chip->fixes->quirks2;
1467 chip->allow_runtime_pm = chip->fixes->allow_runtime_pm;
1469 chip->num_slots = slots;
1471 pci_set_drvdata(pdev, chip);
1473 if (chip->fixes && chip->fixes->probe) {
1474 ret = chip->fixes->probe(chip);
1479 slots = chip->num_slots; /* Quirk may have changed this */
1481 for (i = 0; i < slots; i++) {
1482 slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i);
1484 for (i--; i >= 0; i--)
1485 sdhci_pci_remove_slot(chip->slots[i]);
1486 ret = PTR_ERR(slot);
1490 chip->slots[i] = slot;
1493 if (chip->allow_runtime_pm)
1494 sdhci_pci_runtime_pm_allow(&pdev->dev);
1499 pci_set_drvdata(pdev, NULL);
1503 pci_disable_device(pdev);
1507 static void sdhci_pci_remove(struct pci_dev *pdev)
1510 struct sdhci_pci_chip *chip;
1512 chip = pci_get_drvdata(pdev);
1515 if (chip->allow_runtime_pm)
1516 sdhci_pci_runtime_pm_forbid(&pdev->dev);
1518 for (i = 0; i < chip->num_slots; i++)
1519 sdhci_pci_remove_slot(chip->slots[i]);
1521 pci_set_drvdata(pdev, NULL);
1525 pci_disable_device(pdev);
1528 static struct pci_driver sdhci_driver = {
1529 .name = "sdhci-pci",
1530 .id_table = pci_ids,
1531 .probe = sdhci_pci_probe,
1532 .remove = sdhci_pci_remove,
1534 .pm = &sdhci_pci_pm_ops
1538 module_pci_driver(sdhci_driver);
1540 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1541 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1542 MODULE_LICENSE("GPL");