1 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
3 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version.
10 * Thanks to the following companies for their support:
12 * - JMicron (hardware and technical support)
15 #include <linux/delay.h>
16 #include <linux/highmem.h>
17 #include <linux/module.h>
18 #include <linux/pci.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/slab.h>
21 #include <linux/device.h>
22 #include <linux/mmc/host.h>
23 #include <linux/scatterlist.h>
25 #include <linux/gpio.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/mmc/sdhci-pci-data.h>
35 #define PCI_SDHCI_IFPIO 0x00
36 #define PCI_SDHCI_IFDMA 0x01
37 #define PCI_SDHCI_IFVENDOR 0x02
39 #define PCI_SLOT_INFO 0x40 /* 8 bits */
40 #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
41 #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
45 struct sdhci_pci_chip;
46 struct sdhci_pci_slot;
48 struct sdhci_pci_fixes {
50 bool allow_runtime_pm;
52 int (*probe) (struct sdhci_pci_chip *);
54 int (*probe_slot) (struct sdhci_pci_slot *);
55 void (*remove_slot) (struct sdhci_pci_slot *, int);
57 int (*suspend) (struct sdhci_pci_chip *);
58 int (*resume) (struct sdhci_pci_chip *);
61 struct sdhci_pci_slot {
62 struct sdhci_pci_chip *chip;
63 struct sdhci_host *host;
64 struct sdhci_pci_data *data;
72 struct sdhci_pci_chip {
76 bool allow_runtime_pm;
77 const struct sdhci_pci_fixes *fixes;
79 int num_slots; /* Slots on controller */
80 struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
84 /*****************************************************************************\
86 * Hardware specific quirk handling *
88 \*****************************************************************************/
90 static int ricoh_probe(struct sdhci_pci_chip *chip)
92 if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
93 chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
94 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
98 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
101 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
102 & SDHCI_TIMEOUT_CLK_MASK) |
104 ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
105 & SDHCI_CLOCK_BASE_MASK) |
107 SDHCI_TIMEOUT_CLK_UNIT |
113 static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
115 /* Apply a delay to allow controller to settle */
116 /* Otherwise it becomes confused if card state changed
122 static const struct sdhci_pci_fixes sdhci_ricoh = {
123 .probe = ricoh_probe,
124 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
125 SDHCI_QUIRK_FORCE_DMA |
126 SDHCI_QUIRK_CLOCK_BEFORE_RESET,
129 static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
130 .probe_slot = ricoh_mmc_probe_slot,
131 .resume = ricoh_mmc_resume,
132 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
133 SDHCI_QUIRK_CLOCK_BEFORE_RESET |
134 SDHCI_QUIRK_NO_CARD_NO_RESET |
135 SDHCI_QUIRK_MISSING_CAPS
138 static const struct sdhci_pci_fixes sdhci_ene_712 = {
139 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
140 SDHCI_QUIRK_BROKEN_DMA,
143 static const struct sdhci_pci_fixes sdhci_ene_714 = {
144 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
145 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
146 SDHCI_QUIRK_BROKEN_DMA,
149 static const struct sdhci_pci_fixes sdhci_cafe = {
150 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
151 SDHCI_QUIRK_NO_BUSY_IRQ |
152 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
155 static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
157 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
162 * ADMA operation is disabled for Moorestown platform due to
165 static int mrst_hc_probe(struct sdhci_pci_chip *chip)
168 * slots number is fixed here for MRST as SDIO3/5 are never used and
169 * have hardware bugs.
175 #ifdef CONFIG_PM_RUNTIME
177 static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id)
179 struct sdhci_pci_slot *slot = dev_id;
180 struct sdhci_host *host = slot->host;
182 mmc_detect_change(host->mmc, msecs_to_jiffies(200));
186 static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
188 int err, irq, gpio = slot->cd_gpio;
190 slot->cd_gpio = -EINVAL;
191 slot->cd_irq = -EINVAL;
193 if (!gpio_is_valid(gpio))
196 err = gpio_request(gpio, "sd_cd");
200 err = gpio_direction_input(gpio);
204 irq = gpio_to_irq(gpio);
208 err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING |
209 IRQF_TRIGGER_FALLING, "sd_cd", slot);
213 slot->cd_gpio = gpio;
221 dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n");
224 static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
226 if (slot->cd_irq >= 0)
227 free_irq(slot->cd_irq, slot);
228 if (gpio_is_valid(slot->cd_gpio))
229 gpio_free(slot->cd_gpio);
234 static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
238 static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
244 static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot)
246 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
247 slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC |
248 MMC_CAP2_HC_ERASE_SZ;
252 static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot)
254 slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
258 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
259 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
260 .probe_slot = mrst_hc_probe_slot,
263 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
264 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
265 .probe = mrst_hc_probe,
268 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
269 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
270 .allow_runtime_pm = true,
273 static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = {
274 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
275 .allow_runtime_pm = true,
276 .probe_slot = mfd_sdio_probe_slot,
279 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = {
280 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
281 .allow_runtime_pm = true,
282 .probe_slot = mfd_emmc_probe_slot,
285 /* O2Micro extra registers */
286 #define O2_SD_LOCK_WP 0xD3
287 #define O2_SD_MULTI_VCC3V 0xEE
288 #define O2_SD_CLKREQ 0xEC
289 #define O2_SD_CAPS 0xE0
290 #define O2_SD_ADMA1 0xE2
291 #define O2_SD_ADMA2 0xE7
292 #define O2_SD_INF_MOD 0xF1
294 static int o2_probe(struct sdhci_pci_chip *chip)
299 switch (chip->pdev->device) {
300 case PCI_DEVICE_ID_O2_8220:
301 case PCI_DEVICE_ID_O2_8221:
302 case PCI_DEVICE_ID_O2_8320:
303 case PCI_DEVICE_ID_O2_8321:
304 /* This extra setup is required due to broken ADMA. */
305 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
309 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
311 /* Set Multi 3 to VCC3V# */
312 pci_write_config_byte(chip->pdev, O2_SD_MULTI_VCC3V, 0x08);
314 /* Disable CLK_REQ# support after media DET */
315 ret = pci_read_config_byte(chip->pdev, O2_SD_CLKREQ, &scratch);
319 pci_write_config_byte(chip->pdev, O2_SD_CLKREQ, scratch);
321 /* Choose capabilities, enable SDMA. We have to write 0x01
322 * to the capabilities register first to unlock it.
324 ret = pci_read_config_byte(chip->pdev, O2_SD_CAPS, &scratch);
328 pci_write_config_byte(chip->pdev, O2_SD_CAPS, scratch);
329 pci_write_config_byte(chip->pdev, O2_SD_CAPS, 0x73);
331 /* Disable ADMA1/2 */
332 pci_write_config_byte(chip->pdev, O2_SD_ADMA1, 0x39);
333 pci_write_config_byte(chip->pdev, O2_SD_ADMA2, 0x08);
335 /* Disable the infinite transfer mode */
336 ret = pci_read_config_byte(chip->pdev, O2_SD_INF_MOD, &scratch);
340 pci_write_config_byte(chip->pdev, O2_SD_INF_MOD, scratch);
343 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
347 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
353 static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
358 ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
363 * Turn PMOS on [bit 0], set over current detection to 2.4 V
364 * [bit 1:2] and enable over current debouncing [bit 6].
371 ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
378 static int jmicron_probe(struct sdhci_pci_chip *chip)
383 if (chip->pdev->revision == 0) {
384 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
385 SDHCI_QUIRK_32BIT_DMA_SIZE |
386 SDHCI_QUIRK_32BIT_ADMA_SIZE |
387 SDHCI_QUIRK_RESET_AFTER_REQUEST |
388 SDHCI_QUIRK_BROKEN_SMALL_PIO;
392 * JMicron chips can have two interfaces to the same hardware
393 * in order to work around limitations in Microsoft's driver.
394 * We need to make sure we only bind to one of them.
396 * This code assumes two things:
398 * 1. The PCI code adds subfunctions in order.
400 * 2. The MMC interface has a lower subfunction number
401 * than the SD interface.
403 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
404 mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
405 else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
406 mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;
409 struct pci_dev *sd_dev;
412 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
413 mmcdev, sd_dev)) != NULL) {
414 if ((PCI_SLOT(chip->pdev->devfn) ==
415 PCI_SLOT(sd_dev->devfn)) &&
416 (chip->pdev->bus == sd_dev->bus))
422 dev_info(&chip->pdev->dev, "Refusing to bind to "
423 "secondary interface.\n");
429 * JMicron chips need a bit of a nudge to enable the power
432 ret = jmicron_pmos(chip, 1);
434 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
438 /* quirk for unsable RO-detection on JM388 chips */
439 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD ||
440 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
441 chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT;
446 static void jmicron_enable_mmc(struct sdhci_host *host, int on)
450 scratch = readb(host->ioaddr + 0xC0);
457 writeb(scratch, host->ioaddr + 0xC0);
460 static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
462 if (slot->chip->pdev->revision == 0) {
465 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
466 version = (version & SDHCI_VENDOR_VER_MASK) >>
467 SDHCI_VENDOR_VER_SHIFT;
470 * Older versions of the chip have lots of nasty glitches
471 * in the ADMA engine. It's best just to avoid it
475 slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
478 /* JM388 MMC doesn't support 1.8V while SD supports it */
479 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
480 slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
481 MMC_VDD_29_30 | MMC_VDD_30_31 |
482 MMC_VDD_165_195; /* allow 1.8V */
483 slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
484 MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */
488 * The secondary interface requires a bit set to get the
491 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
492 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
493 jmicron_enable_mmc(slot->host, 1);
495 slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;
500 static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
505 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
506 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
507 jmicron_enable_mmc(slot->host, 0);
510 static int jmicron_suspend(struct sdhci_pci_chip *chip)
514 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
515 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
516 for (i = 0; i < chip->num_slots; i++)
517 jmicron_enable_mmc(chip->slots[i]->host, 0);
523 static int jmicron_resume(struct sdhci_pci_chip *chip)
527 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
528 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
529 for (i = 0; i < chip->num_slots; i++)
530 jmicron_enable_mmc(chip->slots[i]->host, 1);
533 ret = jmicron_pmos(chip, 1);
535 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
542 static const struct sdhci_pci_fixes sdhci_o2 = {
546 static const struct sdhci_pci_fixes sdhci_jmicron = {
547 .probe = jmicron_probe,
549 .probe_slot = jmicron_probe_slot,
550 .remove_slot = jmicron_remove_slot,
552 .suspend = jmicron_suspend,
553 .resume = jmicron_resume,
556 /* SysKonnect CardBus2SDIO extra registers */
557 #define SYSKT_CTRL 0x200
558 #define SYSKT_RDFIFO_STAT 0x204
559 #define SYSKT_WRFIFO_STAT 0x208
560 #define SYSKT_POWER_DATA 0x20c
561 #define SYSKT_POWER_330 0xef
562 #define SYSKT_POWER_300 0xf8
563 #define SYSKT_POWER_184 0xcc
564 #define SYSKT_POWER_CMD 0x20d
565 #define SYSKT_POWER_START (1 << 7)
566 #define SYSKT_POWER_STATUS 0x20e
567 #define SYSKT_POWER_STATUS_OK (1 << 0)
568 #define SYSKT_BOARD_REV 0x210
569 #define SYSKT_CHIP_REV 0x211
570 #define SYSKT_CONF_DATA 0x212
571 #define SYSKT_CONF_DATA_1V8 (1 << 2)
572 #define SYSKT_CONF_DATA_2V5 (1 << 1)
573 #define SYSKT_CONF_DATA_3V3 (1 << 0)
575 static int syskt_probe(struct sdhci_pci_chip *chip)
577 if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
578 chip->pdev->class &= ~0x0000FF;
579 chip->pdev->class |= PCI_SDHCI_IFDMA;
584 static int syskt_probe_slot(struct sdhci_pci_slot *slot)
588 u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
589 u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
590 dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
591 "board rev %d.%d, chip rev %d.%d\n",
592 board_rev >> 4, board_rev & 0xf,
593 chip_rev >> 4, chip_rev & 0xf);
594 if (chip_rev >= 0x20)
595 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
597 writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
598 writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
600 tm = 10; /* Wait max 1 ms */
602 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
603 if (ps & SYSKT_POWER_STATUS_OK)
608 dev_err(&slot->chip->pdev->dev,
609 "power regulator never stabilized");
610 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
617 static const struct sdhci_pci_fixes sdhci_syskt = {
618 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
619 .probe = syskt_probe,
620 .probe_slot = syskt_probe_slot,
623 static int via_probe(struct sdhci_pci_chip *chip)
625 if (chip->pdev->revision == 0x10)
626 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
631 static const struct sdhci_pci_fixes sdhci_via = {
635 static const struct pci_device_id pci_ids[] __devinitdata = {
637 .vendor = PCI_VENDOR_ID_RICOH,
638 .device = PCI_DEVICE_ID_RICOH_R5C822,
639 .subvendor = PCI_ANY_ID,
640 .subdevice = PCI_ANY_ID,
641 .driver_data = (kernel_ulong_t)&sdhci_ricoh,
645 .vendor = PCI_VENDOR_ID_RICOH,
647 .subvendor = PCI_ANY_ID,
648 .subdevice = PCI_ANY_ID,
649 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
653 .vendor = PCI_VENDOR_ID_RICOH,
655 .subvendor = PCI_ANY_ID,
656 .subdevice = PCI_ANY_ID,
657 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
661 .vendor = PCI_VENDOR_ID_RICOH,
663 .subvendor = PCI_ANY_ID,
664 .subdevice = PCI_ANY_ID,
665 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
669 .vendor = PCI_VENDOR_ID_ENE,
670 .device = PCI_DEVICE_ID_ENE_CB712_SD,
671 .subvendor = PCI_ANY_ID,
672 .subdevice = PCI_ANY_ID,
673 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
677 .vendor = PCI_VENDOR_ID_ENE,
678 .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
679 .subvendor = PCI_ANY_ID,
680 .subdevice = PCI_ANY_ID,
681 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
685 .vendor = PCI_VENDOR_ID_ENE,
686 .device = PCI_DEVICE_ID_ENE_CB714_SD,
687 .subvendor = PCI_ANY_ID,
688 .subdevice = PCI_ANY_ID,
689 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
693 .vendor = PCI_VENDOR_ID_ENE,
694 .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
695 .subvendor = PCI_ANY_ID,
696 .subdevice = PCI_ANY_ID,
697 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
701 .vendor = PCI_VENDOR_ID_MARVELL,
702 .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
703 .subvendor = PCI_ANY_ID,
704 .subdevice = PCI_ANY_ID,
705 .driver_data = (kernel_ulong_t)&sdhci_cafe,
709 .vendor = PCI_VENDOR_ID_JMICRON,
710 .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
711 .subvendor = PCI_ANY_ID,
712 .subdevice = PCI_ANY_ID,
713 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
717 .vendor = PCI_VENDOR_ID_JMICRON,
718 .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
719 .subvendor = PCI_ANY_ID,
720 .subdevice = PCI_ANY_ID,
721 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
725 .vendor = PCI_VENDOR_ID_JMICRON,
726 .device = PCI_DEVICE_ID_JMICRON_JMB388_SD,
727 .subvendor = PCI_ANY_ID,
728 .subdevice = PCI_ANY_ID,
729 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
733 .vendor = PCI_VENDOR_ID_JMICRON,
734 .device = PCI_DEVICE_ID_JMICRON_JMB388_ESD,
735 .subvendor = PCI_ANY_ID,
736 .subdevice = PCI_ANY_ID,
737 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
741 .vendor = PCI_VENDOR_ID_SYSKONNECT,
743 .subvendor = PCI_ANY_ID,
744 .subdevice = PCI_ANY_ID,
745 .driver_data = (kernel_ulong_t)&sdhci_syskt,
749 .vendor = PCI_VENDOR_ID_VIA,
751 .subvendor = PCI_ANY_ID,
752 .subdevice = PCI_ANY_ID,
753 .driver_data = (kernel_ulong_t)&sdhci_via,
757 .vendor = PCI_VENDOR_ID_INTEL,
758 .device = PCI_DEVICE_ID_INTEL_MRST_SD0,
759 .subvendor = PCI_ANY_ID,
760 .subdevice = PCI_ANY_ID,
761 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
765 .vendor = PCI_VENDOR_ID_INTEL,
766 .device = PCI_DEVICE_ID_INTEL_MRST_SD1,
767 .subvendor = PCI_ANY_ID,
768 .subdevice = PCI_ANY_ID,
769 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
773 .vendor = PCI_VENDOR_ID_INTEL,
774 .device = PCI_DEVICE_ID_INTEL_MRST_SD2,
775 .subvendor = PCI_ANY_ID,
776 .subdevice = PCI_ANY_ID,
777 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
781 .vendor = PCI_VENDOR_ID_INTEL,
782 .device = PCI_DEVICE_ID_INTEL_MFD_SD,
783 .subvendor = PCI_ANY_ID,
784 .subdevice = PCI_ANY_ID,
785 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sd,
789 .vendor = PCI_VENDOR_ID_INTEL,
790 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
791 .subvendor = PCI_ANY_ID,
792 .subdevice = PCI_ANY_ID,
793 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
797 .vendor = PCI_VENDOR_ID_INTEL,
798 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
799 .subvendor = PCI_ANY_ID,
800 .subdevice = PCI_ANY_ID,
801 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
805 .vendor = PCI_VENDOR_ID_INTEL,
806 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
807 .subvendor = PCI_ANY_ID,
808 .subdevice = PCI_ANY_ID,
809 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
813 .vendor = PCI_VENDOR_ID_INTEL,
814 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
815 .subvendor = PCI_ANY_ID,
816 .subdevice = PCI_ANY_ID,
817 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
821 .vendor = PCI_VENDOR_ID_O2,
822 .device = PCI_DEVICE_ID_O2_8120,
823 .subvendor = PCI_ANY_ID,
824 .subdevice = PCI_ANY_ID,
825 .driver_data = (kernel_ulong_t)&sdhci_o2,
829 .vendor = PCI_VENDOR_ID_O2,
830 .device = PCI_DEVICE_ID_O2_8220,
831 .subvendor = PCI_ANY_ID,
832 .subdevice = PCI_ANY_ID,
833 .driver_data = (kernel_ulong_t)&sdhci_o2,
837 .vendor = PCI_VENDOR_ID_O2,
838 .device = PCI_DEVICE_ID_O2_8221,
839 .subvendor = PCI_ANY_ID,
840 .subdevice = PCI_ANY_ID,
841 .driver_data = (kernel_ulong_t)&sdhci_o2,
845 .vendor = PCI_VENDOR_ID_O2,
846 .device = PCI_DEVICE_ID_O2_8320,
847 .subvendor = PCI_ANY_ID,
848 .subdevice = PCI_ANY_ID,
849 .driver_data = (kernel_ulong_t)&sdhci_o2,
853 .vendor = PCI_VENDOR_ID_O2,
854 .device = PCI_DEVICE_ID_O2_8321,
855 .subvendor = PCI_ANY_ID,
856 .subdevice = PCI_ANY_ID,
857 .driver_data = (kernel_ulong_t)&sdhci_o2,
860 { /* Generic SD host controller */
861 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
864 { /* end: all zeroes */ },
867 MODULE_DEVICE_TABLE(pci, pci_ids);
869 /*****************************************************************************\
871 * SDHCI core callbacks *
873 \*****************************************************************************/
875 static int sdhci_pci_enable_dma(struct sdhci_host *host)
877 struct sdhci_pci_slot *slot;
878 struct pci_dev *pdev;
881 slot = sdhci_priv(host);
882 pdev = slot->chip->pdev;
884 if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
885 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
886 (host->flags & SDHCI_USE_SDMA)) {
887 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
888 "doesn't fully claim to support it.\n");
891 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
895 pci_set_master(pdev);
900 static int sdhci_pci_8bit_width(struct sdhci_host *host, int width)
904 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
907 case MMC_BUS_WIDTH_8:
908 ctrl |= SDHCI_CTRL_8BITBUS;
909 ctrl &= ~SDHCI_CTRL_4BITBUS;
911 case MMC_BUS_WIDTH_4:
912 ctrl |= SDHCI_CTRL_4BITBUS;
913 ctrl &= ~SDHCI_CTRL_8BITBUS;
916 ctrl &= ~(SDHCI_CTRL_8BITBUS | SDHCI_CTRL_4BITBUS);
920 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
925 static void sdhci_pci_hw_reset(struct sdhci_host *host)
927 struct sdhci_pci_slot *slot = sdhci_priv(host);
928 int rst_n_gpio = slot->rst_n_gpio;
930 if (!gpio_is_valid(rst_n_gpio))
932 gpio_set_value_cansleep(rst_n_gpio, 0);
933 /* For eMMC, minimum is 1us but give it 10us for good measure */
935 gpio_set_value_cansleep(rst_n_gpio, 1);
936 /* For eMMC, minimum is 200us but give it 300us for good measure */
937 usleep_range(300, 1000);
940 static struct sdhci_ops sdhci_pci_ops = {
941 .enable_dma = sdhci_pci_enable_dma,
942 .platform_8bit_width = sdhci_pci_8bit_width,
943 .hw_reset = sdhci_pci_hw_reset,
946 /*****************************************************************************\
950 \*****************************************************************************/
954 static int sdhci_pci_suspend(struct device *dev)
956 struct pci_dev *pdev = to_pci_dev(dev);
957 struct sdhci_pci_chip *chip;
958 struct sdhci_pci_slot *slot;
959 mmc_pm_flag_t slot_pm_flags;
960 mmc_pm_flag_t pm_flags = 0;
963 chip = pci_get_drvdata(pdev);
967 for (i = 0; i < chip->num_slots; i++) {
968 slot = chip->slots[i];
972 ret = sdhci_suspend_host(slot->host);
975 goto err_pci_suspend;
977 slot_pm_flags = slot->host->mmc->pm_flags;
978 if (slot_pm_flags & MMC_PM_WAKE_SDIO_IRQ)
979 sdhci_enable_irq_wakeups(slot->host);
981 pm_flags |= slot_pm_flags;
984 if (chip->fixes && chip->fixes->suspend) {
985 ret = chip->fixes->suspend(chip);
987 goto err_pci_suspend;
990 pci_save_state(pdev);
991 if (pm_flags & MMC_PM_KEEP_POWER) {
992 if (pm_flags & MMC_PM_WAKE_SDIO_IRQ) {
993 pci_pme_active(pdev, true);
994 pci_enable_wake(pdev, PCI_D3hot, 1);
996 pci_set_power_state(pdev, PCI_D3hot);
998 pci_enable_wake(pdev, PCI_D3hot, 0);
999 pci_disable_device(pdev);
1000 pci_set_power_state(pdev, PCI_D3hot);
1007 sdhci_resume_host(chip->slots[i]->host);
1011 static int sdhci_pci_resume(struct device *dev)
1013 struct pci_dev *pdev = to_pci_dev(dev);
1014 struct sdhci_pci_chip *chip;
1015 struct sdhci_pci_slot *slot;
1018 chip = pci_get_drvdata(pdev);
1022 pci_set_power_state(pdev, PCI_D0);
1023 pci_restore_state(pdev);
1024 ret = pci_enable_device(pdev);
1028 if (chip->fixes && chip->fixes->resume) {
1029 ret = chip->fixes->resume(chip);
1034 for (i = 0; i < chip->num_slots; i++) {
1035 slot = chip->slots[i];
1039 ret = sdhci_resume_host(slot->host);
1047 #else /* CONFIG_PM */
1049 #define sdhci_pci_suspend NULL
1050 #define sdhci_pci_resume NULL
1052 #endif /* CONFIG_PM */
1054 #ifdef CONFIG_PM_RUNTIME
1056 static int sdhci_pci_runtime_suspend(struct device *dev)
1058 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1059 struct sdhci_pci_chip *chip;
1060 struct sdhci_pci_slot *slot;
1063 chip = pci_get_drvdata(pdev);
1067 for (i = 0; i < chip->num_slots; i++) {
1068 slot = chip->slots[i];
1072 ret = sdhci_runtime_suspend_host(slot->host);
1075 goto err_pci_runtime_suspend;
1078 if (chip->fixes && chip->fixes->suspend) {
1079 ret = chip->fixes->suspend(chip);
1081 goto err_pci_runtime_suspend;
1086 err_pci_runtime_suspend:
1088 sdhci_runtime_resume_host(chip->slots[i]->host);
1092 static int sdhci_pci_runtime_resume(struct device *dev)
1094 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1095 struct sdhci_pci_chip *chip;
1096 struct sdhci_pci_slot *slot;
1099 chip = pci_get_drvdata(pdev);
1103 if (chip->fixes && chip->fixes->resume) {
1104 ret = chip->fixes->resume(chip);
1109 for (i = 0; i < chip->num_slots; i++) {
1110 slot = chip->slots[i];
1114 ret = sdhci_runtime_resume_host(slot->host);
1122 static int sdhci_pci_runtime_idle(struct device *dev)
1129 #define sdhci_pci_runtime_suspend NULL
1130 #define sdhci_pci_runtime_resume NULL
1131 #define sdhci_pci_runtime_idle NULL
1135 static const struct dev_pm_ops sdhci_pci_pm_ops = {
1136 .suspend = sdhci_pci_suspend,
1137 .resume = sdhci_pci_resume,
1138 .runtime_suspend = sdhci_pci_runtime_suspend,
1139 .runtime_resume = sdhci_pci_runtime_resume,
1140 .runtime_idle = sdhci_pci_runtime_idle,
1143 /*****************************************************************************\
1145 * Device probing/removal *
1147 \*****************************************************************************/
1149 static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot(
1150 struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar,
1153 struct sdhci_pci_slot *slot;
1154 struct sdhci_host *host;
1155 int ret, bar = first_bar + slotno;
1157 if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
1158 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
1159 return ERR_PTR(-ENODEV);
1162 if (pci_resource_len(pdev, bar) != 0x100) {
1163 dev_err(&pdev->dev, "Invalid iomem size. You may "
1164 "experience problems.\n");
1167 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1168 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
1169 return ERR_PTR(-ENODEV);
1172 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1173 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
1174 return ERR_PTR(-ENODEV);
1177 host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
1179 dev_err(&pdev->dev, "cannot allocate host\n");
1180 return ERR_CAST(host);
1183 slot = sdhci_priv(host);
1187 slot->pci_bar = bar;
1188 slot->rst_n_gpio = -EINVAL;
1189 slot->cd_gpio = -EINVAL;
1191 /* Retrieve platform data if there is any */
1192 if (*sdhci_pci_get_data)
1193 slot->data = sdhci_pci_get_data(pdev, slotno);
1196 if (slot->data->setup) {
1197 ret = slot->data->setup(slot->data);
1199 dev_err(&pdev->dev, "platform setup failed\n");
1203 slot->rst_n_gpio = slot->data->rst_n_gpio;
1204 slot->cd_gpio = slot->data->cd_gpio;
1207 host->hw_name = "PCI";
1208 host->ops = &sdhci_pci_ops;
1209 host->quirks = chip->quirks;
1211 host->irq = pdev->irq;
1213 ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
1215 dev_err(&pdev->dev, "cannot request region\n");
1219 host->ioaddr = pci_ioremap_bar(pdev, bar);
1220 if (!host->ioaddr) {
1221 dev_err(&pdev->dev, "failed to remap registers\n");
1226 if (chip->fixes && chip->fixes->probe_slot) {
1227 ret = chip->fixes->probe_slot(slot);
1232 if (gpio_is_valid(slot->rst_n_gpio)) {
1233 if (!gpio_request(slot->rst_n_gpio, "eMMC_reset")) {
1234 gpio_direction_output(slot->rst_n_gpio, 1);
1235 slot->host->mmc->caps |= MMC_CAP_HW_RESET;
1237 dev_warn(&pdev->dev, "failed to request rst_n_gpio\n");
1238 slot->rst_n_gpio = -EINVAL;
1242 host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
1244 ret = sdhci_add_host(host);
1248 sdhci_pci_add_own_cd(slot);
1253 if (gpio_is_valid(slot->rst_n_gpio))
1254 gpio_free(slot->rst_n_gpio);
1256 if (chip->fixes && chip->fixes->remove_slot)
1257 chip->fixes->remove_slot(slot, 0);
1260 iounmap(host->ioaddr);
1263 pci_release_region(pdev, bar);
1266 if (slot->data && slot->data->cleanup)
1267 slot->data->cleanup(slot->data);
1270 sdhci_free_host(host);
1272 return ERR_PTR(ret);
1275 static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
1280 sdhci_pci_remove_own_cd(slot);
1283 scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
1284 if (scratch == (u32)-1)
1287 sdhci_remove_host(slot->host, dead);
1289 if (gpio_is_valid(slot->rst_n_gpio))
1290 gpio_free(slot->rst_n_gpio);
1292 if (slot->chip->fixes && slot->chip->fixes->remove_slot)
1293 slot->chip->fixes->remove_slot(slot, dead);
1295 if (slot->data && slot->data->cleanup)
1296 slot->data->cleanup(slot->data);
1298 pci_release_region(slot->chip->pdev, slot->pci_bar);
1300 sdhci_free_host(slot->host);
1303 static void __devinit sdhci_pci_runtime_pm_allow(struct device *dev)
1305 pm_runtime_put_noidle(dev);
1306 pm_runtime_allow(dev);
1307 pm_runtime_set_autosuspend_delay(dev, 50);
1308 pm_runtime_use_autosuspend(dev);
1309 pm_suspend_ignore_children(dev, 1);
1312 static void __devexit sdhci_pci_runtime_pm_forbid(struct device *dev)
1314 pm_runtime_forbid(dev);
1315 pm_runtime_get_noresume(dev);
1318 static int __devinit sdhci_pci_probe(struct pci_dev *pdev,
1319 const struct pci_device_id *ent)
1321 struct sdhci_pci_chip *chip;
1322 struct sdhci_pci_slot *slot;
1324 u8 slots, first_bar;
1327 BUG_ON(pdev == NULL);
1328 BUG_ON(ent == NULL);
1330 dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1331 (int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
1333 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1337 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1338 dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
1342 BUG_ON(slots > MAX_SLOTS);
1344 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1348 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1350 if (first_bar > 5) {
1351 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
1355 ret = pci_enable_device(pdev);
1359 chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
1366 chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data;
1368 chip->quirks = chip->fixes->quirks;
1369 chip->allow_runtime_pm = chip->fixes->allow_runtime_pm;
1371 chip->num_slots = slots;
1373 pci_set_drvdata(pdev, chip);
1375 if (chip->fixes && chip->fixes->probe) {
1376 ret = chip->fixes->probe(chip);
1381 slots = chip->num_slots; /* Quirk may have changed this */
1383 for (i = 0; i < slots; i++) {
1384 slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i);
1386 for (i--; i >= 0; i--)
1387 sdhci_pci_remove_slot(chip->slots[i]);
1388 ret = PTR_ERR(slot);
1392 chip->slots[i] = slot;
1395 if (chip->allow_runtime_pm)
1396 sdhci_pci_runtime_pm_allow(&pdev->dev);
1401 pci_set_drvdata(pdev, NULL);
1405 pci_disable_device(pdev);
1409 static void __devexit sdhci_pci_remove(struct pci_dev *pdev)
1412 struct sdhci_pci_chip *chip;
1414 chip = pci_get_drvdata(pdev);
1417 if (chip->allow_runtime_pm)
1418 sdhci_pci_runtime_pm_forbid(&pdev->dev);
1420 for (i = 0; i < chip->num_slots; i++)
1421 sdhci_pci_remove_slot(chip->slots[i]);
1423 pci_set_drvdata(pdev, NULL);
1427 pci_disable_device(pdev);
1430 static struct pci_driver sdhci_driver = {
1431 .name = "sdhci-pci",
1432 .id_table = pci_ids,
1433 .probe = sdhci_pci_probe,
1434 .remove = __devexit_p(sdhci_pci_remove),
1436 .pm = &sdhci_pci_pm_ops
1440 /*****************************************************************************\
1442 * Driver init/exit *
1444 \*****************************************************************************/
1446 static int __init sdhci_drv_init(void)
1448 return pci_register_driver(&sdhci_driver);
1451 static void __exit sdhci_drv_exit(void)
1453 pci_unregister_driver(&sdhci_driver);
1456 module_init(sdhci_drv_init);
1457 module_exit(sdhci_drv_exit);
1459 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1460 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1461 MODULE_LICENSE("GPL");