2 * MTD SPI driver for ST M25Pxx (and similar) serial flash chips
4 * Author: Mike Lavender, mike@steroidmicros.com
6 * Copyright (c) 2005, Intec Automation Inc.
8 * Some parts are based on lart.c by Abraham Van Der Merwe
10 * Cleaned up and generalized based on mtd_dataflash.c
12 * This code is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
18 #include <linux/err.h>
19 #include <linux/errno.h>
20 #include <linux/module.h>
21 #include <linux/device.h>
23 #include <linux/mtd/mtd.h>
24 #include <linux/mtd/partitions.h>
26 #include <linux/spi/spi.h>
27 #include <linux/spi/flash.h>
28 #include <linux/mtd/spi-nor.h>
30 #define MAX_CMD_SIZE 6
32 struct spi_device *spi;
33 struct spi_nor spi_nor;
35 u8 command[MAX_CMD_SIZE];
38 static int m25p80_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len)
40 struct m25p *flash = nor->priv;
41 struct spi_device *spi = flash->spi;
44 ret = spi_write_then_read(spi, &code, 1, val, len);
46 dev_err(&spi->dev, "error %d reading %x\n", ret, code);
51 static void m25p_addr2cmd(struct spi_nor *nor, unsigned int addr, u8 *cmd)
53 /* opcode is in cmd[0] */
54 cmd[1] = addr >> (nor->addr_width * 8 - 8);
55 cmd[2] = addr >> (nor->addr_width * 8 - 16);
56 cmd[3] = addr >> (nor->addr_width * 8 - 24);
57 cmd[4] = addr >> (nor->addr_width * 8 - 32);
60 static int m25p_cmdsz(struct spi_nor *nor)
62 return 1 + nor->addr_width;
65 static int m25p80_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len,
68 struct m25p *flash = nor->priv;
69 struct spi_device *spi = flash->spi;
71 flash->command[0] = opcode;
73 memcpy(&flash->command[1], buf, len);
75 return spi_write(spi, flash->command, len + 1);
78 static void m25p80_write(struct spi_nor *nor, loff_t to, size_t len,
79 size_t *retlen, const u_char *buf)
81 struct m25p *flash = nor->priv;
82 struct spi_device *spi = flash->spi;
83 struct spi_transfer t[2] = {};
85 int cmd_sz = m25p_cmdsz(nor);
89 if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second)
92 flash->command[0] = nor->program_opcode;
93 m25p_addr2cmd(nor, to, flash->command);
95 t[0].tx_buf = flash->command;
97 spi_message_add_tail(&t[0], &m);
101 spi_message_add_tail(&t[1], &m);
105 *retlen += m.actual_length - cmd_sz;
108 static inline unsigned int m25p80_rx_nbits(struct spi_nor *nor)
110 switch (nor->flash_read) {
121 * Read an address range from the nor chip. The address range
122 * may be any size provided it is within the physical boundaries.
124 static int m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
125 size_t *retlen, u_char *buf)
127 struct m25p *flash = nor->priv;
128 struct spi_device *spi = flash->spi;
129 struct spi_transfer t[2];
130 struct spi_message m;
131 unsigned int dummy = nor->read_dummy;
133 /* convert the dummy cycles to the number of bytes */
136 spi_message_init(&m);
137 memset(t, 0, (sizeof t));
139 flash->command[0] = nor->read_opcode;
140 m25p_addr2cmd(nor, from, flash->command);
142 t[0].tx_buf = flash->command;
143 t[0].len = m25p_cmdsz(nor) + dummy;
144 spi_message_add_tail(&t[0], &m);
147 t[1].rx_nbits = m25p80_rx_nbits(nor);
149 spi_message_add_tail(&t[1], &m);
153 *retlen = m.actual_length - m25p_cmdsz(nor) - dummy;
157 static int m25p80_erase(struct spi_nor *nor, loff_t offset)
159 struct m25p *flash = nor->priv;
161 dev_dbg(nor->dev, "%dKiB at 0x%08x\n",
162 flash->mtd.erasesize / 1024, (u32)offset);
164 /* Set up command buffer. */
165 flash->command[0] = nor->erase_opcode;
166 m25p_addr2cmd(nor, offset, flash->command);
168 spi_write(flash->spi, flash->command, m25p_cmdsz(nor));
174 * board specific setup should have ensured the SPI clock used here
175 * matches what the READ command supports, at least until this driver
176 * understands FAST_READ (for clocks over 25 MHz).
178 static int m25p_probe(struct spi_device *spi)
180 struct mtd_part_parser_data ppdata;
181 struct flash_platform_data *data;
184 enum read_mode mode = SPI_NOR_NORMAL;
185 char *flash_name = NULL;
188 data = dev_get_platdata(&spi->dev);
190 flash = devm_kzalloc(&spi->dev, sizeof(*flash), GFP_KERNEL);
194 nor = &flash->spi_nor;
196 /* install the hooks */
197 nor->read = m25p80_read;
198 nor->write = m25p80_write;
199 nor->erase = m25p80_erase;
200 nor->write_reg = m25p80_write_reg;
201 nor->read_reg = m25p80_read_reg;
203 nor->dev = &spi->dev;
204 nor->mtd = &flash->mtd;
207 spi_set_drvdata(spi, flash);
208 flash->mtd.priv = nor;
211 if (spi->mode & SPI_RX_QUAD)
213 else if (spi->mode & SPI_RX_DUAL)
216 if (data && data->name)
217 flash->mtd.name = data->name;
219 /* For some (historical?) reason many platforms provide two different
220 * names in flash_platform_data: "name" and "type". Quite often name is
221 * set to "m25p80" and then "type" provides a real chip name.
222 * If that's the case, respect "type" and ignore a "name".
224 if (data && data->type)
225 flash_name = data->type;
227 flash_name = spi->modalias;
229 ret = spi_nor_scan(nor, flash_name, mode);
233 ppdata.of_node = spi->dev.of_node;
235 return mtd_device_parse_register(&flash->mtd, NULL, &ppdata,
236 data ? data->parts : NULL,
237 data ? data->nr_parts : 0);
241 static int m25p_remove(struct spi_device *spi)
243 struct m25p *flash = spi_get_drvdata(spi);
245 /* Clean up MTD stuff. */
246 return mtd_device_unregister(&flash->mtd);
250 * Do NOT add to this array without reading the following:
252 * Historically, many flash devices are bound to this driver by their name. But
253 * since most of these flash are compatible to some extent, and their
254 * differences can often be differentiated by the JEDEC read-ID command, we
255 * encourage new users to add support to the spi-nor library, and simply bind
256 * against a generic string here (e.g., "jedec,spi-nor").
258 * Many flash names are kept here in this list (as well as in spi-nor.c) to
259 * keep them available as module aliases for existing platforms.
261 static const struct spi_device_id m25p_ids[] = {
263 * Entries not used in DTs that should be safe to drop after replacing
264 * them with "nor-jedec" in platform data.
266 {"s25sl064a"}, {"w25x16"}, {"m25p10"}, {"m25px64"},
269 * Entries that were used in DTs without "nor-jedec" fallback and should
270 * be kept for backward compatibility.
272 {"at25df321a"}, {"at25df641"}, {"at26df081a"},
274 {"mx25l4005a"}, {"mx25l1606e"}, {"mx25l6405d"}, {"mx25l12805d"},
275 {"mx25l25635e"},{"mx66l51235l"},
276 {"n25q064"}, {"n25q128a11"}, {"n25q128a13"}, {"n25q512a"},
277 {"s25fl256s1"}, {"s25fl512s"}, {"s25sl12801"}, {"s25fl008k"},
279 {"sst25vf040b"},{"sst25vf016b"},{"sst25vf032b"},{"sst25wf040"},
280 {"m25p40"}, {"m25p80"}, {"m25p16"}, {"m25p32"},
281 {"m25p64"}, {"m25p128"},
282 {"w25x80"}, {"w25x32"}, {"w25q32"}, {"w25q32dw"},
283 {"w25q80bl"}, {"w25q128"}, {"w25q256"},
285 /* Flashes that can't be detected using JEDEC */
286 {"m25p05-nonjedec"}, {"m25p10-nonjedec"}, {"m25p20-nonjedec"},
287 {"m25p40-nonjedec"}, {"m25p80-nonjedec"}, {"m25p16-nonjedec"},
288 {"m25p32-nonjedec"}, {"m25p64-nonjedec"}, {"m25p128-nonjedec"},
292 MODULE_DEVICE_TABLE(spi, m25p_ids);
294 static const struct of_device_id m25p_of_table[] = {
296 * Generic compatibility for SPI NOR that can be identified by the
297 * JEDEC READ ID opcode (0x9F). Use this, if possible.
299 { .compatible = "jedec,spi-nor" },
302 MODULE_DEVICE_TABLE(of, m25p_of_table);
304 static struct spi_driver m25p80_driver = {
307 .owner = THIS_MODULE,
308 .of_match_table = m25p_of_table,
310 .id_table = m25p_ids,
312 .remove = m25p_remove,
314 /* REVISIT: many of these chips have deep power-down modes, which
315 * should clearly be entered on suspend() to minimize power use.
316 * And also when they're otherwise idle...
320 module_spi_driver(m25p80_driver);
322 MODULE_LICENSE("GPL");
323 MODULE_AUTHOR("Mike Lavender");
324 MODULE_DESCRIPTION("MTD SPI driver for ST M25Pxx flash chips");