2 * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework
4 * Largely derived from at91_dataflash.c:
5 * Copyright (C) 2003-2005 SAN People (Pty) Ltd
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
12 #include <linux/module.h>
13 #include <linux/slab.h>
14 #include <linux/delay.h>
15 #include <linux/device.h>
16 #include <linux/mutex.h>
17 #include <linux/err.h>
18 #include <linux/math64.h>
20 #include <linux/of_device.h>
22 #include <linux/spi/spi.h>
23 #include <linux/spi/flash.h>
25 #include <linux/mtd/mtd.h>
26 #include <linux/mtd/partitions.h>
29 * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in
30 * each chip, which may be used for double buffered I/O; but this driver
31 * doesn't (yet) use these for any kind of i/o overlap or prefetching.
33 * Sometimes DataFlash is packaged in MMC-format cards, although the
34 * MMC stack can't (yet?) distinguish between MMC and DataFlash
35 * protocols during enumeration.
38 /* reads can bypass the buffers */
39 #define OP_READ_CONTINUOUS 0xE8
40 #define OP_READ_PAGE 0xD2
42 /* group B requests can run even while status reports "busy" */
43 #define OP_READ_STATUS 0xD7 /* group B */
45 /* move data between host and buffer */
46 #define OP_READ_BUFFER1 0xD4 /* group B */
47 #define OP_READ_BUFFER2 0xD6 /* group B */
48 #define OP_WRITE_BUFFER1 0x84 /* group B */
49 #define OP_WRITE_BUFFER2 0x87 /* group B */
52 #define OP_ERASE_PAGE 0x81
53 #define OP_ERASE_BLOCK 0x50
55 /* move data between buffer and flash */
56 #define OP_TRANSFER_BUF1 0x53
57 #define OP_TRANSFER_BUF2 0x55
58 #define OP_MREAD_BUFFER1 0xD4
59 #define OP_MREAD_BUFFER2 0xD6
60 #define OP_MWERASE_BUFFER1 0x83
61 #define OP_MWERASE_BUFFER2 0x86
62 #define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */
63 #define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */
65 /* write to buffer, then write-erase to flash */
66 #define OP_PROGRAM_VIA_BUF1 0x82
67 #define OP_PROGRAM_VIA_BUF2 0x85
69 /* compare buffer to flash */
70 #define OP_COMPARE_BUF1 0x60
71 #define OP_COMPARE_BUF2 0x61
73 /* read flash to buffer, then write-erase to flash */
74 #define OP_REWRITE_VIA_BUF1 0x58
75 #define OP_REWRITE_VIA_BUF2 0x59
77 /* newer chips report JEDEC manufacturer and device IDs; chip
78 * serial number and OTP bits; and per-sector writeprotect.
80 #define OP_READ_ID 0x9F
81 #define OP_READ_SECURITY 0x77
82 #define OP_WRITE_SECURITY_REVC 0x9A
83 #define OP_WRITE_SECURITY 0x9B /* revision D */
90 unsigned short page_offset; /* offset in flash address */
91 unsigned int page_size; /* of bytes per page */
94 struct spi_device *spi;
100 static const struct of_device_id dataflash_dt_ids[] = {
101 { .compatible = "atmel,at45", },
102 { .compatible = "atmel,dataflash", },
105 MODULE_DEVICE_TABLE(of, dataflash_dt_ids);
108 /* ......................................................................... */
111 * Return the status of the DataFlash device.
113 static inline int dataflash_status(struct spi_device *spi)
115 /* NOTE: at45db321c over 25 MHz wants to write
116 * a dummy byte after the opcode...
118 return spi_w8r8(spi, OP_READ_STATUS);
122 * Poll the DataFlash device until it is READY.
123 * This usually takes 5-20 msec or so; more for sector erase.
125 static int dataflash_waitready(struct spi_device *spi)
130 status = dataflash_status(spi);
132 pr_debug("%s: status %d?\n",
133 dev_name(&spi->dev), status);
137 if (status & (1 << 7)) /* RDY/nBSY */
144 /* ......................................................................... */
147 * Erase pages of flash.
149 static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
151 struct dataflash *priv = mtd->priv;
152 struct spi_device *spi = priv->spi;
153 struct spi_transfer x = { };
154 struct spi_message msg;
155 unsigned blocksize = priv->page_size << 3;
159 pr_debug("%s: erase addr=0x%llx len 0x%llx\n",
160 dev_name(&spi->dev), (long long)instr->addr,
161 (long long)instr->len);
163 div_u64_rem(instr->len, priv->page_size, &rem);
166 div_u64_rem(instr->addr, priv->page_size, &rem);
170 spi_message_init(&msg);
172 x.tx_buf = command = priv->command;
174 spi_message_add_tail(&x, &msg);
176 mutex_lock(&priv->lock);
177 while (instr->len > 0) {
178 unsigned int pageaddr;
182 /* Calculate flash page address; use block erase (for speed) if
183 * we're at a block boundary and need to erase the whole block.
185 pageaddr = div_u64(instr->addr, priv->page_size);
186 do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize;
187 pageaddr = pageaddr << priv->page_offset;
189 command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
190 command[1] = (uint8_t)(pageaddr >> 16);
191 command[2] = (uint8_t)(pageaddr >> 8);
194 pr_debug("ERASE %s: (%x) %x %x %x [%i]\n",
195 do_block ? "block" : "page",
196 command[0], command[1], command[2], command[3],
199 status = spi_sync(spi, &msg);
200 (void) dataflash_waitready(spi);
203 printk(KERN_ERR "%s: erase %x, err %d\n",
204 dev_name(&spi->dev), pageaddr, status);
205 /* REVISIT: can retry instr->retries times; or
206 * giveup and instr->fail_addr = instr->addr;
212 instr->addr += blocksize;
213 instr->len -= blocksize;
215 instr->addr += priv->page_size;
216 instr->len -= priv->page_size;
219 mutex_unlock(&priv->lock);
221 /* Inform MTD subsystem that erase is complete */
222 instr->state = MTD_ERASE_DONE;
223 mtd_erase_callback(instr);
229 * Read from the DataFlash device.
230 * from : Start offset in flash device
231 * len : Amount to read
232 * retlen : About of data actually read
233 * buf : Buffer containing the data
235 static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
236 size_t *retlen, u_char *buf)
238 struct dataflash *priv = mtd->priv;
239 struct spi_transfer x[2] = { };
240 struct spi_message msg;
245 pr_debug("%s: read 0x%x..0x%x\n", dev_name(&priv->spi->dev),
246 (unsigned)from, (unsigned)(from + len));
248 /* Calculate flash page/byte address */
249 addr = (((unsigned)from / priv->page_size) << priv->page_offset)
250 + ((unsigned)from % priv->page_size);
252 command = priv->command;
254 pr_debug("READ: (%x) %x %x %x\n",
255 command[0], command[1], command[2], command[3]);
257 spi_message_init(&msg);
259 x[0].tx_buf = command;
261 spi_message_add_tail(&x[0], &msg);
265 spi_message_add_tail(&x[1], &msg);
267 mutex_lock(&priv->lock);
269 /* Continuous read, max clock = f(car) which may be less than
270 * the peak rate available. Some chips support commands with
271 * fewer "don't care" bytes. Both buffers stay unchanged.
273 command[0] = OP_READ_CONTINUOUS;
274 command[1] = (uint8_t)(addr >> 16);
275 command[2] = (uint8_t)(addr >> 8);
276 command[3] = (uint8_t)(addr >> 0);
277 /* plus 4 "don't care" bytes */
279 status = spi_sync(priv->spi, &msg);
280 mutex_unlock(&priv->lock);
283 *retlen = msg.actual_length - 8;
286 pr_debug("%s: read %x..%x --> %d\n",
287 dev_name(&priv->spi->dev),
288 (unsigned)from, (unsigned)(from + len),
294 * Write to the DataFlash device.
295 * to : Start offset in flash device
296 * len : Amount to write
297 * retlen : Amount of data actually written
298 * buf : Buffer containing the data
300 static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
301 size_t * retlen, const u_char * buf)
303 struct dataflash *priv = mtd->priv;
304 struct spi_device *spi = priv->spi;
305 struct spi_transfer x[2] = { };
306 struct spi_message msg;
307 unsigned int pageaddr, addr, offset, writelen;
308 size_t remaining = len;
309 u_char *writebuf = (u_char *) buf;
310 int status = -EINVAL;
313 pr_debug("%s: write 0x%x..0x%x\n",
314 dev_name(&spi->dev), (unsigned)to, (unsigned)(to + len));
316 spi_message_init(&msg);
318 x[0].tx_buf = command = priv->command;
320 spi_message_add_tail(&x[0], &msg);
322 pageaddr = ((unsigned)to / priv->page_size);
323 offset = ((unsigned)to % priv->page_size);
324 if (offset + len > priv->page_size)
325 writelen = priv->page_size - offset;
329 mutex_lock(&priv->lock);
330 while (remaining > 0) {
331 pr_debug("write @ %i:%i len=%i\n",
332 pageaddr, offset, writelen);
335 * (a) each page in a sector must be rewritten at least
336 * once every 10K sibling erase/program operations.
337 * (b) for pages that are already erased, we could
338 * use WRITE+MWRITE not PROGRAM for ~30% speedup.
339 * (c) WRITE to buffer could be done while waiting for
340 * a previous MWRITE/MWERASE to complete ...
341 * (d) error handling here seems to be mostly missing.
343 * Two persistent bits per page, plus a per-sector counter,
344 * could support (a) and (b) ... we might consider using
345 * the second half of sector zero, which is just one block,
346 * to track that state. (On AT91, that sector should also
347 * support boot-from-DataFlash.)
350 addr = pageaddr << priv->page_offset;
352 /* (1) Maybe transfer partial page to Buffer1 */
353 if (writelen != priv->page_size) {
354 command[0] = OP_TRANSFER_BUF1;
355 command[1] = (addr & 0x00FF0000) >> 16;
356 command[2] = (addr & 0x0000FF00) >> 8;
359 pr_debug("TRANSFER: (%x) %x %x %x\n",
360 command[0], command[1], command[2], command[3]);
362 status = spi_sync(spi, &msg);
364 pr_debug("%s: xfer %u -> %d\n",
365 dev_name(&spi->dev), addr, status);
367 (void) dataflash_waitready(priv->spi);
370 /* (2) Program full page via Buffer1 */
372 command[0] = OP_PROGRAM_VIA_BUF1;
373 command[1] = (addr & 0x00FF0000) >> 16;
374 command[2] = (addr & 0x0000FF00) >> 8;
375 command[3] = (addr & 0x000000FF);
377 pr_debug("PROGRAM: (%x) %x %x %x\n",
378 command[0], command[1], command[2], command[3]);
380 x[1].tx_buf = writebuf;
382 spi_message_add_tail(x + 1, &msg);
383 status = spi_sync(spi, &msg);
384 spi_transfer_del(x + 1);
386 pr_debug("%s: pgm %u/%u -> %d\n",
387 dev_name(&spi->dev), addr, writelen, status);
389 (void) dataflash_waitready(priv->spi);
392 #ifdef CONFIG_MTD_DATAFLASH_WRITE_VERIFY
394 /* (3) Compare to Buffer1 */
395 addr = pageaddr << priv->page_offset;
396 command[0] = OP_COMPARE_BUF1;
397 command[1] = (addr & 0x00FF0000) >> 16;
398 command[2] = (addr & 0x0000FF00) >> 8;
401 pr_debug("COMPARE: (%x) %x %x %x\n",
402 command[0], command[1], command[2], command[3]);
404 status = spi_sync(spi, &msg);
406 pr_debug("%s: compare %u -> %d\n",
407 dev_name(&spi->dev), addr, status);
409 status = dataflash_waitready(priv->spi);
411 /* Check result of the compare operation */
412 if (status & (1 << 6)) {
413 printk(KERN_ERR "%s: compare page %u, err %d\n",
414 dev_name(&spi->dev), pageaddr, status);
421 #endif /* CONFIG_MTD_DATAFLASH_WRITE_VERIFY */
423 remaining = remaining - writelen;
426 writebuf += writelen;
429 if (remaining > priv->page_size)
430 writelen = priv->page_size;
432 writelen = remaining;
434 mutex_unlock(&priv->lock);
439 /* ......................................................................... */
441 #ifdef CONFIG_MTD_DATAFLASH_OTP
443 static int dataflash_get_otp_info(struct mtd_info *mtd, size_t len,
444 size_t *retlen, struct otp_info *info)
446 /* Report both blocks as identical: bytes 0..64, locked.
447 * Unless the user block changed from all-ones, we can't
448 * tell whether it's still writable; so we assume it isn't.
453 *retlen = sizeof(*info);
457 static ssize_t otp_read(struct spi_device *spi, unsigned base,
458 uint8_t *buf, loff_t off, size_t len)
460 struct spi_message m;
463 struct spi_transfer t;
469 if ((off + len) > 64)
472 spi_message_init(&m);
474 l = 4 + base + off + len;
475 scratch = kzalloc(l, GFP_KERNEL);
479 /* OUT: OP_READ_SECURITY, 3 don't-care bytes, zeroes
480 * IN: ignore 4 bytes, data bytes 0..N (max 127)
482 scratch[0] = OP_READ_SECURITY;
484 memset(&t, 0, sizeof t);
488 spi_message_add_tail(&t, &m);
490 dataflash_waitready(spi);
492 status = spi_sync(spi, &m);
494 memcpy(buf, scratch + 4 + base + off, len);
502 static int dataflash_read_fact_otp(struct mtd_info *mtd,
503 loff_t from, size_t len, size_t *retlen, u_char *buf)
505 struct dataflash *priv = mtd->priv;
508 /* 64 bytes, from 0..63 ... start at 64 on-chip */
509 mutex_lock(&priv->lock);
510 status = otp_read(priv->spi, 64, buf, from, len);
511 mutex_unlock(&priv->lock);
519 static int dataflash_read_user_otp(struct mtd_info *mtd,
520 loff_t from, size_t len, size_t *retlen, u_char *buf)
522 struct dataflash *priv = mtd->priv;
525 /* 64 bytes, from 0..63 ... start at 0 on-chip */
526 mutex_lock(&priv->lock);
527 status = otp_read(priv->spi, 0, buf, from, len);
528 mutex_unlock(&priv->lock);
536 static int dataflash_write_user_otp(struct mtd_info *mtd,
537 loff_t from, size_t len, size_t *retlen, u_char *buf)
539 struct spi_message m;
540 const size_t l = 4 + 64;
542 struct spi_transfer t;
543 struct dataflash *priv = mtd->priv;
548 * Attempting to write beyond the end of OTP memory,
549 * no data can be written.
555 /* Truncate the write to fit into OTP memory. */
556 if ((from + len) > 64)
559 /* OUT: OP_WRITE_SECURITY, 3 zeroes, 64 data-or-zero bytes
562 scratch = kzalloc(l, GFP_KERNEL);
565 scratch[0] = OP_WRITE_SECURITY;
566 memcpy(scratch + 4 + from, buf, len);
568 spi_message_init(&m);
570 memset(&t, 0, sizeof t);
573 spi_message_add_tail(&t, &m);
575 /* Write the OTP bits, if they've not yet been written.
576 * This modifies SRAM buffer1.
578 mutex_lock(&priv->lock);
579 dataflash_waitready(priv->spi);
580 status = spi_sync(priv->spi, &m);
581 mutex_unlock(&priv->lock);
592 static char *otp_setup(struct mtd_info *device, char revision)
594 device->_get_fact_prot_info = dataflash_get_otp_info;
595 device->_read_fact_prot_reg = dataflash_read_fact_otp;
596 device->_get_user_prot_info = dataflash_get_otp_info;
597 device->_read_user_prot_reg = dataflash_read_user_otp;
599 /* rev c parts (at45db321c and at45db1281 only!) use a
600 * different write procedure; not (yet?) implemented.
603 device->_write_user_prot_reg = dataflash_write_user_otp;
610 static char *otp_setup(struct mtd_info *device, char revision)
617 /* ......................................................................... */
620 * Register DataFlash device with MTD subsystem.
622 static int add_dataflash_otp(struct spi_device *spi, char *name, int nr_pages,
623 int pagesize, int pageoffset, char revision)
625 struct dataflash *priv;
626 struct mtd_info *device;
627 struct mtd_part_parser_data ppdata;
628 struct flash_platform_data *pdata = dev_get_platdata(&spi->dev);
632 priv = kzalloc(sizeof *priv, GFP_KERNEL);
636 mutex_init(&priv->lock);
638 priv->page_size = pagesize;
639 priv->page_offset = pageoffset;
641 /* name must be usable with cmdlinepart */
642 sprintf(priv->name, "spi%d.%d-%s",
643 spi->master->bus_num, spi->chip_select,
647 device->name = (pdata && pdata->name) ? pdata->name : priv->name;
648 device->size = nr_pages * pagesize;
649 device->erasesize = pagesize;
650 device->writesize = pagesize;
651 device->owner = THIS_MODULE;
652 device->type = MTD_DATAFLASH;
653 device->flags = MTD_WRITEABLE;
654 device->_erase = dataflash_erase;
655 device->_read = dataflash_read;
656 device->_write = dataflash_write;
659 device->dev.parent = &spi->dev;
662 otp_tag = otp_setup(device, revision);
664 dev_info(&spi->dev, "%s (%lld KBytes) pagesize %d bytes%s\n",
665 name, (long long)((device->size + 1023) >> 10),
667 spi_set_drvdata(spi, priv);
669 ppdata.of_node = spi->dev.of_node;
670 err = mtd_device_parse_register(device, NULL, &ppdata,
671 pdata ? pdata->parts : NULL,
672 pdata ? pdata->nr_parts : 0);
681 static inline int add_dataflash(struct spi_device *spi, char *name,
682 int nr_pages, int pagesize, int pageoffset)
684 return add_dataflash_otp(spi, name, nr_pages, pagesize,
691 /* JEDEC id has a high byte of zero plus three data bytes:
692 * the manufacturer id, then a two byte device id.
696 /* The size listed here is what works with OP_ERASE_PAGE. */
702 #define SUP_POW2PS 0x0002 /* supports 2^N byte pages */
703 #define IS_POW2PS 0x0001 /* uses 2^N byte pages */
706 static struct flash_info dataflash_data[] = {
709 * NOTE: chips with SUP_POW2PS (rev D and up) need two entries,
710 * one with IS_POW2PS and the other without. The entry with the
711 * non-2^N byte page size can't name exact chip revisions without
712 * losing backwards compatibility for cmdlinepart.
714 * These newer chips also support 128-byte security registers (with
715 * 64 bytes one-time-programmable) and software write-protection.
717 { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS},
718 { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
720 { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS},
721 { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},
723 { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS},
724 { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS},
726 { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS},
727 { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS},
729 { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS},
730 { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS},
732 { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */
734 { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS},
735 { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS},
737 { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS},
738 { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
741 static struct flash_info *jedec_probe(struct spi_device *spi)
744 uint8_t code = OP_READ_ID;
747 struct flash_info *info;
750 /* JEDEC also defines an optional "extended device information"
751 * string for after vendor-specific data, after the three bytes
752 * we use here. Supporting some chips might require using it.
754 * If the vendor ID isn't Atmel's (0x1f), assume this call failed.
755 * That's not an error; only rev C and newer chips handle it, and
756 * only Atmel sells these chips.
758 tmp = spi_write_then_read(spi, &code, 1, id, 3);
760 pr_debug("%s: error %d reading JEDEC ID\n",
761 dev_name(&spi->dev), tmp);
773 for (tmp = 0, info = dataflash_data;
774 tmp < ARRAY_SIZE(dataflash_data);
776 if (info->jedec_id == jedec) {
777 pr_debug("%s: OTP, sector protect%s\n",
779 (info->flags & SUP_POW2PS)
780 ? ", binary pagesize" : ""
782 if (info->flags & SUP_POW2PS) {
783 status = dataflash_status(spi);
785 pr_debug("%s: status error %d\n",
786 dev_name(&spi->dev), status);
787 return ERR_PTR(status);
790 if (info->flags & IS_POW2PS)
793 if (!(info->flags & IS_POW2PS))
802 * Treat other chips as errors ... we won't know the right page
803 * size (it might be binary) even when we can tell which density
804 * class is involved (legacy chip id scheme).
806 dev_warn(&spi->dev, "JEDEC id %06x not handled\n", jedec);
807 return ERR_PTR(-ENODEV);
811 * Detect and initialize DataFlash device, using JEDEC IDs on newer chips
812 * or else the ID code embedded in the status bits:
814 * Device Density ID code #Pages PageSize Offset
815 * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
816 * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9
817 * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
818 * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
819 * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
820 * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
821 * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
822 * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
824 static int dataflash_probe(struct spi_device *spi)
827 struct flash_info *info;
830 * Try to detect dataflash by JEDEC ID.
831 * If it succeeds we know we have either a C or D part.
832 * D will support power of 2 pagesize option.
833 * Both support the security register, though with different
836 info = jedec_probe(spi);
838 return PTR_ERR(info);
840 return add_dataflash_otp(spi, info->name, info->nr_pages,
841 info->pagesize, info->pageoffset,
842 (info->flags & SUP_POW2PS) ? 'd' : 'c');
845 * Older chips support only legacy commands, identifing
846 * capacity using bits in the status byte.
848 status = dataflash_status(spi);
849 if (status <= 0 || status == 0xff) {
850 pr_debug("%s: status error %d\n",
851 dev_name(&spi->dev), status);
852 if (status == 0 || status == 0xff)
857 /* if there's a device there, assume it's dataflash.
858 * board setup should have set spi->max_speed_max to
859 * match f(car) for continuous reads, mode 0 or 3.
861 switch (status & 0x3c) {
862 case 0x0c: /* 0 0 1 1 x x */
863 status = add_dataflash(spi, "AT45DB011B", 512, 264, 9);
865 case 0x14: /* 0 1 0 1 x x */
866 status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9);
868 case 0x1c: /* 0 1 1 1 x x */
869 status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9);
871 case 0x24: /* 1 0 0 1 x x */
872 status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9);
874 case 0x2c: /* 1 0 1 1 x x */
875 status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10);
877 case 0x34: /* 1 1 0 1 x x */
878 status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10);
880 case 0x38: /* 1 1 1 x x x */
882 status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11);
884 /* obsolete AT45DB1282 not (yet?) supported */
886 dev_info(&spi->dev, "unsupported device (%x)\n",
892 pr_debug("%s: add_dataflash --> %d\n", dev_name(&spi->dev),
898 static int dataflash_remove(struct spi_device *spi)
900 struct dataflash *flash = spi_get_drvdata(spi);
903 pr_debug("%s: remove\n", dev_name(&spi->dev));
905 status = mtd_device_unregister(&flash->mtd);
911 static struct spi_driver dataflash_driver = {
913 .name = "mtd_dataflash",
914 .of_match_table = of_match_ptr(dataflash_dt_ids),
917 .probe = dataflash_probe,
918 .remove = dataflash_remove,
920 /* FIXME: investigate suspend and resume... */
923 module_spi_driver(dataflash_driver);
925 MODULE_LICENSE("GPL");
926 MODULE_AUTHOR("Andrew Victor, David Brownell");
927 MODULE_DESCRIPTION("MTD DataFlash driver");
928 MODULE_ALIAS("spi:mtd_dataflash");