drivers/mtd/nand/rk29_nand.c

   1
   2 /*
   3  * drivers/mtd/nand/rk29_nand.c
   4  *
   5  * Copyright (C) 2010 RockChip, Inc.
   6  * Author: hxy@rock-chips.com
   7  *
   8  * This software is licensed under the terms of the GNU General Public
   9  * License version 2, as published by the Free Software Foundation, and
  10  * may be copied, distributed, and modified under those terms.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/delay.h>
  20 #include <linux/slab.h>
  21 #include <linux/init.h>
  22 #include <linux/mtd/mtd.h>
  23 #include <linux/mtd/nand.h>
  24 #include <linux/mtd/partitions.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/device.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/clk.h>
  29 #include <linux/cpufreq.h>
  30 #include <linux/err.h>
  31 #include <linux/io.h>
  32
  33 #include <mach/rk29_nand.h>
  34 #include <mach/rk29_iomap.h>
  35 #include <mach/iomux.h>
  36
  37 #define PROGRAM_BUSY_COUNT   10000
  38 #define ERASE_BUSY_COUNT            20000
  39 #define READ_BUSY_COUNT             5000
  40 #define RESET_BUSY_COUNT                        20000
  41
  42 /* Define delays in microsec for NAND device operations */
  43 #define TROP_US_DELAY   2000
  44 #define NAND_FLAG_WRITE 1
  45
  46 #if 1
  47 #define FLASH_DEBUG(x...) do{printk(x);}while(0)
  48 #else
  49 #define FLASH_DEBUG(s,x...)
  50 #endif
  51
  52 #ifdef CONFIG_DM9000_USE_NAND_CONTROL
  53 static DEFINE_MUTEX(rknand_mutex);
  54 #define RKNAND_LOCK()   do { int panic = in_interrupt() | in_atomic(); if (!panic) mutex_lock(&rknand_mutex); } while (0)
  55 #define RKNAND_UNLOCK() do { int panic = in_interrupt() | in_atomic(); if (!panic) mutex_unlock(&rknand_mutex); } while (0)
  56 #else
  57 #define RKNAND_LOCK()   do {} while (0)
  58 #define RKNAND_UNLOCK() do {} while (0)
  59 #endif
  60
  61 struct rk29_nand_mtd {
  62         struct mtd_info         mtd;
  63         struct nand_chip                nand;
  64         struct mtd_partition    *parts;
  65         struct device           *dev;
  66        const struct rk29_nand_flash *flash_info;
  67
  68         struct clk                      *clk;
  69         unsigned long                   clk_rate;
  70         void __iomem                    *regs;
  71         int                                     cs;                     // support muliple nand chip,record current chip select
  72         u_char                          accesstime;
  73 #ifdef CONFIG_CPU_FREQ
  74         struct notifier_block   freq_transition;
  75 #endif
  76
  77 };
  78 static int read_in_refresh = 0;
  79 static int gbRefresh = 0;
  80
  81 /* OOB placement block for use with software ecc generation */
  82 static struct nand_ecclayout nand_sw_eccoob_8 = {
  83         .eccbytes = 48,
  84         .eccpos = { 8, 9, 10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,
  85                           32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55},
  86         .oobfree = {{0,8},{56, 72}}
  87 };
  88
  89 /* OOB placement block for use with hardware ecc generation */
  90 static struct nand_ecclayout nand_hw_eccoob_16 = {
  91         .eccbytes = 28,
  92         .eccpos = { 4,  5, 6,  7,  8, 9, 10,11,12,13,14,15,16,17,
  93                           18,19,20,21,22,23,24,25,26,27,28,29,30,31},
  94         .oobfree = {{0, 4}}
  95 };
  96
  97 #ifdef CONFIG_MTD_PARTITIONS
  98 static const char *part_probes[] = { "cmdlinepart", NULL };
  99 #endif
 100
 101 static void rk29_nand_wait_ready( struct mtd_info *mtd )
 102 {
 103         struct nand_chip *nand_chip = mtd->priv;
 104         struct rk29_nand_mtd *master = nand_chip->priv;
 105         pNANDC pRK29NC=  (pNANDC)(master->regs);
 106         uint32_t timeout = 1000;
 107
 108         while (timeout>0)
 109         {
 110              timeout --;
 111           if(pRK29NC->FMCTL&FMC_FRDY)
 112                  break;
 113            udelay(1);
 114         }
 115         return;
 116 }
 117
 118 static void rk29_nand_wait_busy(struct mtd_info *mtd, uint32_t timeout)
 119 {
 120
 121     struct nand_chip *nand_chip = mtd->priv;
 122         struct rk29_nand_mtd *master = nand_chip->priv;
 123         pNANDC pRK29NC=  (pNANDC)(master->regs);
 124
 125         while (timeout > 0)
 126         {
 127                 timeout--;
 128                 udelay(1);
 129                 if ( pRK29NC->FMCTL& FMC_FRDY)
 130                         break;
 131
 132         }
 133
 134     return;
 135 }
 136
 137 static void rk29_nand_wait_bchdone(struct mtd_info *mtd, uint32_t timeout)
 138 {
 139
 140     struct nand_chip *nand_chip = mtd->priv;
 141         struct rk29_nand_mtd *master = nand_chip->priv;
 142         pNANDC pRK29NC=  (pNANDC)(master->regs);
 143
 144         while (timeout > 0)
 145         {
 146                 timeout--;
 147                 udelay(1);
 148                 if(pRK29NC->BCHST[0] &(1<<1))
 149                         break;
 150         }
 151
 152     return;
 153 }
 154
 155 // only for dma mode
 156 static void wait_op_done(struct mtd_info *mtd, int max_retries, uint16_t param)
 157 {
 158        struct nand_chip *nand_chip = mtd->priv;
 159         struct rk29_nand_mtd *master = nand_chip->priv;
 160         pNANDC pRK29NC=  (pNANDC)(master->regs);
 161
 162         while (max_retries-- > 0) {
 163                 udelay(1);
 164                 if (pRK29NC->FLCTL & FL_RDY)
 165                         break;
 166         }
 167 }
 168
 169 static int rk29_nand_dev_ready(struct mtd_info *mtd)
 170 {
 171         struct nand_chip *nand_chip = mtd->priv;
 172         struct rk29_nand_mtd *master = nand_chip->priv;
 173         pNANDC pRK29NC=  (pNANDC)(master->regs);
 174
 175         if(pRK29NC->FMCTL& FMC_FRDY)
 176            return 1;
 177         else
 178            return 0;
 179 }
 180 void mark_reserve_region(struct mtd_info *mtd,struct nand_bbt_descr *td,struct nand_bbt_descr *md)
 181 {
 182     int i, block, nrblocks, tdblock, update = 0;
 183     struct nand_chip *this = mtd->priv;
 184     uint8_t oldval, newval;
 185
 186     tdblock = (td->maxblocks >= md->maxblocks)?td->maxblocks:md->maxblocks;
 187     nrblocks = (int)(mtd->size >> this->bbt_erase_shift);
 188     block = nrblocks - tdblock - RK29_RESERVE_BLOCK_NUM;
 189     block <<= 1;
 190
 191     for(i=0; i<RK29_RESERVE_BLOCK_NUM; i++) {
 192             oldval = this->bbt[(block>>3)];
 193             newval = oldval|(0x2 << (block & 0x06));
 194             this->bbt[(block>>3)] = newval;
 195             if (oldval != newval)
 196                 update = 1;
 197             block += 2;
 198         }
 199
 200     if(update&&td->reserved_block_code)
 201     {
 202         printk("mark_reserve_region need update!\n");
 203         nand_update_bbt(mtd, (loff_t)(block - 2) <<
 204                 (this->bbt_erase_shift - 1));
 205     }
 206 }
 207
 208 EXPORT_SYMBOL_GPL(mark_reserve_region);
 209
 210 static int rk29_nand_erase(struct mtd_info *mtd, int srcAddr)
 211 {
 212     struct nand_chip *this = mtd->priv;
 213     int status;
 214
 215     //printk(">>>>>>> erase page [%d]\n", srcAddr>>this->page_shift);
 216     this->select_chip(mtd, 0);
 217     this->cmdfunc(mtd, NAND_CMD_ERASE1, -1, srcAddr>>this->page_shift);
 218         this->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
 219     status = this->waitfunc(mtd, this);
 220     if(status&NAND_STATUS_FAIL){
 221         FLASH_DEBUG("%s: %s erase failed!\n", __FILE__,__FUNCTION__);
 222         return -1;
 223         }
 224     return 0;
 225 }
 226
 227 static int rk29_get_swap_block_erased(struct mtd_info *mtd, int bdown)
 228 {
 229     struct nand_chip *this = mtd->priv;
 230     struct nand_bbt_descr *td = this->bbt_td;
 231     struct nand_bbt_descr *md = this->bbt_md;
 232     int nrblocks, block, tdblock, startblock, i, fward;
 233
 234     tdblock = (td->maxblocks > md->maxblocks)?td->maxblocks:md->maxblocks;
 235     nrblocks = (int)(mtd->size >> this->bbt_erase_shift);
 236     if(bdown){
 237         startblock = nrblocks-tdblock-1;
 238         fward = -1;
 239         }
 240     else{
 241         startblock = nrblocks-tdblock-RK29_RESERVE_BLOCK_NUM;
 242         fward = 1;
 243         }
 244
 245     for(i=0; i<RK29_RESERVE_BLOCK_NUM; i++){
 246         block = startblock + fward*i;
 247         if(((this->bbt[block>>2]>>(2*(block & 0x03)))&0x03)==0x02){
 248             if(rk29_nand_erase(mtd, block<<this->phys_erase_shift)){
 249                 mtd->block_markbad(mtd, block<<this->phys_erase_shift);
 250                 FLASH_DEBUG("%s: %s erase failed!\n", __FILE__,__FUNCTION__);
 251                 }
 252             else{
 253                 return block<<this->phys_erase_shift;
 254                 }
 255         }
 256     }
 257     return 0;
 258 }
 259
 260 static int rk29_block_copy(struct mtd_info *mtd, int srcAddr, int dstAddr, int bSetFlag)
 261 {
 262     struct nand_chip *this = mtd->priv;
 263     uint8_t *buf=(uint8_t*)kmalloc(mtd->writesize+32, GFP_KERNEL);
 264     int    i,status,pagePblock,src_page,dst_page,src_block;
 265     u_char oob[4], oob_bak[4];
 266
 267     if(!buf){
 268         printk("%s:kmalloc failed!\n", __FUNCTION__);
 269         return -1;
 270         }
 271
 272     pagePblock = mtd->erasesize/mtd->writesize;
 273     src_page = srcAddr>>this->page_shift;
 274     src_block = srcAddr>>this->phys_erase_shift;
 275     dst_page = dstAddr>>this->page_shift;
 276
 277     memcpy(oob_bak, (u_char *)(this->oob_poi + this->ops.ooboffs),4);
 278     if(bSetFlag){
 279         uint8_t block_1_8, block_2_8;
 280
 281         if(src_block >= 65535){
 282             printk("block num err\n");
 283             kfree(buf);
 284             return -1;
 285             }
 286
 287         block_1_8 = src_block&0xFF;
 288         block_2_8 = (src_block>>8)&0xFF;
 289
 290         oob[0]='S';
 291         oob[1]='W';
 292         oob[2]=block_1_8;
 293         oob[3]=block_2_8;
 294         }
 295     else{
 296         oob[0]=0xFF;
 297         oob[1]=0xFF;
 298         oob[2]=0xFF;
 299         oob[3]=0xFF;
 300         }
 301     memcpy((u_char *)(this->oob_poi + this->ops.ooboffs),(u_char *)oob,4);
 302
 303     this->select_chip(mtd, 0);
 304     for(i=0;i<pagePblock;i++){
 305         this->cmdfunc(mtd, NAND_CMD_READ0, 0x00, src_page);
 306         status = this->ecc.read_page(mtd, this, buf, src_page);
 307         if(status==-2){
 308             FLASH_DEBUG("%s: %s read_page failed status=[%d]!\n", __FILE__,__FUNCTION__, status);
 309             kfree(buf);
 310             return -1;
 311         }
 312
 313         this->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, dst_page);
 314         this->ecc.write_page_raw(mtd, this, buf);
 315         this->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
 316         status = this->waitfunc(mtd, this);
 317         if(status&NAND_STATUS_FAIL){
 318             FLASH_DEBUG("%s: %s write_page failed status=[%d]!\n", __FILE__,__FUNCTION__, status);
 319             kfree(buf);
 320             return -1;
 321             }
 322
 323         src_page++;
 324         dst_page++;
 325     }
 326
 327     kfree(buf);
 328     memcpy((u_char *)(this->oob_poi + this->ops.ooboffs), oob_bak, 4);
 329
 330     return 0;
 331 }
 332
 333 #if NAND_FLAG_WRITE
 334 static int rk29_flag_check(struct mtd_info *mtd, uint8_t *buf)
 335 {
 336     int i;
 337
 338     if(buf[0] == 'R' && buf[1] == 'K'
 339         && buf[2] == '2' && buf[3] == '9'
 340         && buf[4] == '1' && buf[5] == '8')
 341         {
 342         return 0;
 343         }
 344      else{
 345         for(i=0;i<mtd->writesize;i++){
 346             if(buf[i]!=0xFF)
 347                 return 1;
 348             }
 349         return 2;
 350         }
 351 }
 352
 353 static int rk29_get_flag_page(struct mtd_info *mtd, int bdown)
 354 {
 355     struct nand_chip *this = mtd->priv;
 356     struct nand_bbt_descr *td = this->bbt_td;
 357     struct nand_bbt_descr *md = this->bbt_md;
 358     int nrblocks, block, tdblock, startblock, i, status, fward, j, src_page, pageState;
 359     uint8_t *buf=(uint8_t*)kmalloc(mtd->writesize+32, GFP_KERNEL);
 360
 361     if(!buf){
 362         printk("%s:kmalloc failed!\n", __FUNCTION__);
 363         return 0;
 364         }
 365
 366     tdblock = (td->maxblocks > md->maxblocks)?td->maxblocks:md->maxblocks;
 367     nrblocks = (int)(mtd->size >> this->bbt_erase_shift);
 368     if(bdown){
 369         startblock = nrblocks-tdblock-1;
 370         fward = -1;
 371         }
 372     else{
 373         startblock = nrblocks-tdblock-RK29_RESERVE_BLOCK_NUM;
 374         fward = 1;
 375         }
 376     this->select_chip(mtd, 0);
 377     for(i=0; i<RK29_RESERVE_BLOCK_NUM - 3; i++){
 378         block = startblock + fward*i;
 379         if(((this->bbt[block>>2]>>(2*(block & 0x03)))&0x03)==0x02){
 380             for(j=0; j<(1<<(this->phys_erase_shift-this->page_shift)); j++){
 381                 src_page = (block<<(this->phys_erase_shift-this->page_shift))+j;
 382                 this->cmdfunc(mtd, NAND_CMD_READ0, 0x00, src_page);
 383                 status = this->ecc.read_page_raw(mtd, this, buf, src_page);
 384                 if(status==-2){
 385                     FLASH_DEBUG("%s: %s read_page failed status=[%d]!\n", __FILE__,__FUNCTION__, status);
 386                     kfree(buf);
 387                     return 0;
 388                 }
 389                 if(j==0){
 390                     u_char oob[4];
 391                     memcpy(oob, (u_char *)(this->oob_poi + this->ops.ooboffs),4);
 392                     if((oob[0]!='R')||(oob[1]!='K')||(oob[2]!='F')||(oob[3]!='G')){
 393                         if(rk29_nand_erase(mtd, block<<this->phys_erase_shift)){
 394                             mtd->block_markbad(mtd, block<<this->phys_erase_shift);
 395                             break;
 396                             }
 397                         //printk("get a free block [%d]!\n", block);
 398                         }
 399                     this->cmdfunc(mtd, NAND_CMD_READ0, 0x00, src_page);
 400                     status = this->ecc.read_page_raw(mtd, this, buf, src_page);
 401                     if(status==-2){
 402                         FLASH_DEBUG("%s: %s read_page failed status=[%d]!\n", __FILE__,__FUNCTION__, status);
 403                         kfree(buf);
 404                         return 0;
 405                         }
 406                     }
 407                 pageState = rk29_flag_check(mtd, buf);
 408                 //printk("src_page = [%d] pageState = [%d]\n", src_page, pageState);
 409                 if(pageState == 0){
 410                     continue;
 411                     }
 412                 else if(pageState == 1){
 413                     if(rk29_nand_erase(mtd, block<<this->phys_erase_shift)){
 414                         mtd->block_markbad(mtd, block<<this->phys_erase_shift);
 415                         break;
 416                         }
 417                     kfree(buf);
 418                     //printk("rk29_get_flag_page: block<<(this->phys_erase_shift-this->page_shift = [%d]\n", block<<(this->phys_erase_shift-this->page_shift));
 419                     return block<<(this->phys_erase_shift-this->page_shift);
 420                     }
 421                 else{
 422                     kfree(buf);
 423                     //printk("rk29_get_flag_page: src_page = [%d]\n", src_page);
 424                     return src_page;
 425                     }
 426             }
 427         }
 428     }
 429     kfree(buf);
 430     return 0;
 431 }
 432
 433 static int rk29_nand_refresh_flag(struct mtd_info *mtd, int srcAddr, int swapAddr)
 434 {
 435     int flagAddr, status;
 436     struct nand_chip *this = mtd->priv;
 437     uint8_t *buf=(uint8_t*)kmalloc(mtd->writesize+32, GFP_KERNEL);
 438     u_char oob[4];
 439
 440     if(!buf){
 441         printk("%s:kmalloc failed!\n", __FUNCTION__);
 442         return 0;
 443         }
 444
 445
 446     flagAddr = rk29_get_flag_page(mtd, 1);
 447     if(flagAddr){
 448         buf[0] = 'R';
 449         buf[1] = 'K';
 450         buf[2] = '2';
 451         buf[3] = '9';
 452         buf[4] = '1';
 453         buf[5] = '8';
 454         buf[6] = (uint8_t)(srcAddr&0xFF);
 455         buf[7] = (uint8_t)((srcAddr>>8)&0xFF);
 456         buf[8] = (uint8_t)((srcAddr>>16)&0xFF);
 457         buf[9] = (uint8_t)((srcAddr>>24)&0xFF);
 458         memset(&buf[10], 0x88, mtd->writesize-10);
 459
 460         oob[0]='R';
 461         oob[1]='K';
 462         oob[2]='F';
 463         oob[3]='G';
 464         memcpy((u_char *)(this->oob_poi + this->ops.ooboffs),oob,4);
 465
 466         this->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, flagAddr);
 467         this->ecc.write_page_raw(mtd, this, buf);
 468         this->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
 469         status = this->waitfunc(mtd, this);
 470         if(status&NAND_STATUS_FAIL){
 471             FLASH_DEBUG("%s: %s write_page failed status=[%d]!\n", __FILE__,__FUNCTION__, status);
 472             kfree(buf);
 473             return -1;
 474             }
 475         //printk("rk29_nand_refresh_flag: page = [%d]\n", flagAddr);
 476         }
 477     kfree(buf);
 478     return 0;
 479 }
 480 #endif
 481
 482 int rk29_nand_refresh(struct mtd_info *mtd, int srcAddr)
 483 {
 484     struct nand_chip *this = mtd->priv;
 485     int swapAddr;
 486     int ret = 0;
 487
 488     if(!gbRefresh){
 489         printk("bbt is not ready!\n");
 490         return 0;
 491         }
 492
 493     srcAddr = (srcAddr>>this->phys_erase_shift)<<this->phys_erase_shift;
 494
 495     swapAddr = rk29_get_swap_block_erased(mtd, 0);
 496     printk("%s swapAddr[%d] srcAddr[%d]\n", __FUNCTION__, swapAddr, srcAddr);
 497
 498 #if NAND_FLAG_WRITE
 499     rk29_nand_refresh_flag(mtd, srcAddr, swapAddr);
 500 #endif
 501
 502     read_in_refresh = 1;
 503     if(!swapAddr){
 504         printk("no swap block fined!!!\n");
 505         ret = -1;
 506         goto nand_refresh_error;
 507         }
 508
 509     if(rk29_nand_erase(mtd, swapAddr)){
 510         printk("rk29_nand_erase[0x%x] failed!\n", srcAddr);
 511         ret = -1;
 512         goto nand_refresh_error;
 513         }
 514
 515     if(rk29_block_copy(mtd, srcAddr, swapAddr, 1)){
 516         printk("rk29_block_copy[0x%x ---> 0x%x] failed!\n", srcAddr, swapAddr);
 517         ret = -1;
 518         goto nand_refresh_error;
 519         }
 520
 521     if(rk29_nand_erase(mtd, srcAddr)){
 522         printk("rk29_nand_erase[0x%x] failed!\n", srcAddr);
 523         ret = -1;
 524         goto nand_refresh_error;
 525         }
 526
 527     if(rk29_block_copy(mtd, swapAddr, srcAddr, 0)){
 528         printk("rk29_block_copy[0x%x ---> 0x%x] failed!\n", swapAddr, srcAddr);
 529         ret = -1;
 530         goto nand_refresh_error;
 531         }
 532     if(rk29_nand_erase(mtd, swapAddr)){
 533         printk("rk29_nand_erase[0x%x] failed!\n", srcAddr);
 534         ret = -1;
 535         goto nand_refresh_error;
 536         }
 537 nand_refresh_error:
 538     read_in_refresh = 0;
 539     return ret;
 540 }
 541
 542 EXPORT_SYMBOL_GPL(rk29_nand_refresh);
 543
 544
 545 static int rk29_nand_check_hwecc(struct mtd_info *mtd, int page)
 546 {
 547         struct nand_chip *nand_chip = mtd->priv;
 548         struct rk29_nand_mtd *master = nand_chip->priv;
 549         pNANDC pRK29NC=  (pNANDC)(master->regs);
 550
 551        if((pRK29NC->BCHST[0]&0x1) && (pRK29NC->BCHST[0]&0x4))
 552         {
 553         FLASH_DEBUG("%s: %s BCH FAIL!!!page=[%d]\n", __FILE__,__FUNCTION__, page);
 554         dump_stack();
 555         return 2;
 556         }
 557
 558     if((((pRK29NC->BCHST[0])>>3)&0x1F) >= 12 /*|| refreshTestCnt++%10000 == 0*/)
 559     {
 560         return 1;
 561     }
 562
 563     if(pRK29NC->BCHST[0]&0x2){
 564             return 0;
 565             }
 566         else{
 567             FLASH_DEBUG("%s: %s Flash BCH no done!!!\n", __FILE__,__FUNCTION__);
 568             return 2;
 569             }
 570 }
 571 /*
 572 *  ÉèÖÃÆ¬Ñ¡
 573 */
 574 static void rk29_nand_select_chip(struct mtd_info *mtd, int chip)
 575 {
 576         struct nand_chip *nand_chip = mtd->priv;
 577         struct rk29_nand_mtd *master = nand_chip->priv;
 578         pNANDC pRK29NC=  (pNANDC)(master->regs);
 579
 580
 581         if( chip<0 )
 582              pRK29NC->FMCTL &=0xffffff00;   // release chip select
 583         else
 584           {
 585                master->cs = chip;
 586                 pRK29NC->FMCTL &=0xffffff00;
 587                 pRK29NC ->FMCTL |= 0x1<<chip;  // select chip
 588           }
 589
 590 }
 591
 592 /*
 593  *   ¶ÁÒ»¸ö×Ö½ÚÊý¾Ý
 594 */
 595 static u_char rk29_nand_read_byte(struct mtd_info *mtd)
 596 {
 597         struct nand_chip *nand_chip = mtd->priv;
 598         struct rk29_nand_mtd *master = nand_chip->priv;
 599         pNANDC pRK29NC=  (pNANDC)(master->regs);
 600
 601         u_char ret = 0;
 602
 603         ret = (u_char)(pRK29NC ->chip[master->cs].data);
 604
 605         return ret;
 606 }
 607
 608 /*
 609  *   ¶ÁÒ»¸öword ³¤¶ÈÊý¾Ý
 610 */
 611 static u16 rk29_nand_read_word(struct mtd_info *mtd)
 612 {
 613         struct nand_chip *nand_chip = mtd->priv;
 614         struct rk29_nand_mtd *master = nand_chip->priv;
 615         pNANDC pRK29NC=  (pNANDC)(master->regs);
 616
 617
 618         u_char tmp1 = 0,tmp2=0;
 619         u16 ret=0;
 620
 621         tmp1 = (u_char)(pRK29NC ->chip[master->cs].data);
 622         tmp2 = (u_char)(pRK29NC ->chip[master->cs].data);
 623
 624         ret =   (tmp2 <<8)|tmp1;
 625
 626         return ret;
 627 }
 628
 629 static void rk29_nand_read_buf(struct mtd_info *mtd, u_char* const buf, int len)
 630 {
 631        struct nand_chip *nand_chip = mtd->priv;
 632         struct rk29_nand_mtd *master = nand_chip->priv;
 633         pNANDC pRK29NC=  (pNANDC)(master->regs);
 634         uint32_t  i, chipnr;
 635
 636        RKNAND_LOCK();
 637
 638        chipnr = master->cs ;
 639
 640         rk29_nand_select_chip(mtd,chipnr);
 641
 642
 643
 644         if ( len < mtd->writesize )   // read oob
 645         {
 646                 pRK29NC ->BCHCTL = BCH_RST;
 647                pRK29NC ->FLCTL = (0<<4)|FL_COR_EN|(0x1<<5)|FL_BYPASS|FL_START ;
 648                 wait_op_done(mtd,TROP_US_DELAY,0);
 649                 rk29_nand_wait_bchdone(mtd,TROP_US_DELAY) ;
 650                 memcpy(buf,(u_char *)(pRK29NC->spare),4);  //  only use nandc sram0
 651         }
 652         else
 653        {
 654            pRK29NC->FLCTL |= FL_BYPASS;  // dma mode
 655             for(i=0;i<mtd->writesize/0x400;i++)
 656                 {
 657                        pRK29NC ->BCHCTL = BCH_RST;
 658                 pRK29NC ->FLCTL = (0<<4)|FL_COR_EN|(0x1<<5)|FL_BYPASS|FL_START ;
 659                         wait_op_done(mtd,TROP_US_DELAY,0);
 660                         rk29_nand_wait_bchdone(mtd,TROP_US_DELAY) ;
 661                 memcpy(buf+i*0x400,(u_char *)(pRK29NC->buf),0x400);  //  only use nandc sram0
 662                 }
 663         }
 664
 665
 666
 667         rk29_nand_select_chip(mtd,-1);
 668
 669         RKNAND_UNLOCK();
 670
 671
 672         return;
 673
 674 }
 675
 676 static void rk29_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
 677 {
 678        struct nand_chip *nand_chip = mtd->priv;
 679         struct rk29_nand_mtd *master = nand_chip->priv;
 680         pNANDC pRK29NC=  (pNANDC)(master->regs);
 681
 682         uint32_t  i = 0, chipnr;
 683
 684
 685          RKNAND_LOCK();
 686
 687          chipnr = master->cs ;
 688
 689         rk29_nand_select_chip(mtd,chipnr);
 690
 691          pRK29NC->FLCTL |= FL_BYPASS;  // dma mode
 692
 693
 694           for(i=0;i<mtd->writesize/0x400;i++)
 695             {
 696                memcpy((u_char *)(pRK29NC->buf),buf+i*0x400,0x400);  //  only use nandc sram0
 697                 pRK29NC ->BCHCTL =BCH_WR|BCH_RST;
 698                 pRK29NC ->FLCTL = (0<<4)|FL_COR_EN|0x1<<5|FL_RDN|FL_BYPASS|FL_START;
 699                 wait_op_done(mtd,TROP_US_DELAY,0);
 700             }
 701
 702
 703
 704        rk29_nand_select_chip(mtd,-1);
 705
 706           RKNAND_UNLOCK();
 707
 708
 709 }
 710
 711
 712 static void rk29_nand_cmdfunc(struct mtd_info *mtd, unsigned command,int column, int page_addr)
 713 {
 714        struct nand_chip *nand_chip = mtd->priv;
 715         struct rk29_nand_mtd *master = nand_chip->priv;
 716         pNANDC pRK29NC=  (pNANDC)(master->regs);
 717
 718         switch (command) {
 719
 720        case NAND_CMD_READID:
 721                 pRK29NC ->chip[master->cs].cmd = command;
 722                 pRK29NC ->chip[master->cs].addr = 0x0;
 723               udelay(1);
 724                 rk29_nand_wait_busy(mtd,READ_BUSY_COUNT);
 725                 break;
 726
 727        case NAND_CMD_READ0:
 728               pRK29NC ->chip[master->cs].cmd = command;
 729                if ( column>= 0 )
 730                  {
 731                    pRK29NC ->chip[master->cs].addr = column & 0xff;
 732                    if( mtd->writesize > 512)
 733                          pRK29NC ->chip[master->cs].addr = (column >> 8) & 0xff;
 734                  }
 735                 if ( page_addr>=0 )
 736                    {
 737                         pRK29NC ->chip[master->cs].addr = page_addr & 0xff;
 738                         pRK29NC ->chip[master->cs].addr = (page_addr >> 8) & 0xFF;
 739                         pRK29NC ->chip[master->cs].addr = (page_addr >> 16) & 0xff;
 740                    }
 741                 if( mtd->writesize > 512)
 742                     pRK29NC ->chip[master->cs].cmd = NAND_CMD_READSTART;
 743
 744               udelay(1);
 745                 rk29_nand_wait_busy(mtd,READ_BUSY_COUNT);
 746
 747                 break;
 748
 749         case NAND_CMD_READ1:
 750               pRK29NC ->chip[master->cs].cmd = command;
 751                         rk29_nand_wait_ready(mtd);
 752                 break;
 753
 754        case NAND_CMD_READOOB:
 755                 pRK29NC ->BCHCTL = 0x0;
 756                 if( mtd->writesize > 512 )
 757                         command = NAND_CMD_READ0;  // È«²¿¶Á£¬°üÀ¨¶Áoob
 758
 759                 pRK29NC ->chip[master->cs].cmd = command;
 760
 761               if ( mtd->writesize >512 )
 762                {
 763                         if ( column>= 0 )
 764                          {
 765                            pRK29NC ->chip[master->cs].addr = column  & 0xff;
 766                              pRK29NC ->chip[master->cs].addr = ( column   >> 8) & 0xff;
 767                          }
 768                         if ( page_addr>=0 )
 769                            {
 770                                 pRK29NC ->chip[master->cs].addr = page_addr & 0xff;
 771                                 pRK29NC ->chip[master->cs].addr = (page_addr >> 8) & 0xFF;
 772                                 pRK29NC ->chip[master->cs].addr = (page_addr >> 16) & 0xff;
 773                            }
 774                         pRK29NC ->chip[master->cs].cmd = NAND_CMD_READSTART;
 775               }
 776                 else
 777                 {
 778                    pRK29NC ->chip[master->cs].addr = column;
 779                 }
 780                 udelay(1);
 781                 rk29_nand_wait_busy(mtd,READ_BUSY_COUNT);
 782
 783
 784                 break;
 785
 786         case NAND_CMD_PAGEPROG:
 787                 pRK29NC ->FMCTL |= FMC_WP;  //½â³ýÐ´±£»¤
 788                 pRK29NC ->chip[master->cs].cmd = command;
 789                 udelay(1);
 790                 rk29_nand_wait_busy(mtd,PROGRAM_BUSY_COUNT);
 791                 break;
 792
 793         case NAND_CMD_ERASE1:
 794                 pRK29NC ->FMCTL |= FMC_WP;  //½â³ýÐ´±£»¤
 795                 pRK29NC ->BCHCTL = 0x0;
 796                 pRK29NC ->chip[master->cs].cmd  = command;
 797                 if ( page_addr>=0 )
 798                    {
 799                         pRK29NC ->chip[master->cs].addr = page_addr & 0xff;
 800                         pRK29NC ->chip[master->cs].addr = (page_addr>>8)&0xff;
 801                         pRK29NC ->chip[master->cs].addr = (page_addr>>16)&0xff;
 802                    }
 803                 break;
 804
 805         case NAND_CMD_ERASE2:
 806                 pRK29NC ->FMCTL |= FMC_WP;  //½â³ýÐ´±£»¤
 807                 pRK29NC ->chip[master->cs].cmd  = command;
 808                 rk29_nand_wait_busy(mtd,ERASE_BUSY_COUNT);
 809                 break;
 810
 811         case NAND_CMD_SEQIN:
 812                 pRK29NC ->FMCTL |= FMC_WP;  //½â³ýÐ´±£»¤
 813                 pRK29NC ->chip[master->cs].cmd  = command;
 814                 if ( column>= 0 )
 815                   {
 816                    pRK29NC ->chip[master->cs].addr = column;
 817                      if( mtd->writesize > 512)
 818                        pRK29NC ->chip[master->cs].addr = (column >> 8) & 0xff;
 819                   }
 820                 if( page_addr>=0 )
 821                   {
 822                         pRK29NC ->chip[master->cs].addr = page_addr & 0xff;
 823                         pRK29NC ->chip[master->cs].addr = (page_addr>>8)&0xff;
 824                         pRK29NC ->chip[master->cs].addr = (page_addr>>16)&0xff;
 825                  }
 826
 827                 break;
 828
 829         case NAND_CMD_STATUS:
 830                 pRK29NC ->BCHCTL = 0x0;
 831                 pRK29NC ->chip[master->cs].cmd = command;
 832                 break;
 833
 834         case NAND_CMD_RESET:
 835                 pRK29NC ->chip[master->cs].cmd = command;
 836                 udelay(1);
 837                 rk29_nand_wait_busy(mtd,RESET_BUSY_COUNT);
 838                 break;
 839
 840         /* This applies to read commands */
 841         default:
 842                pRK29NC ->chip[master->cs].cmd = command;
 843                 break;
 844         }
 845
 846
 847 }
 848
 849 int rk29_nand_calculate_ecc(struct mtd_info *mtd,const uint8_t *dat,uint8_t *ecc_code)
 850 {
 851      struct nand_chip *nand_chip = mtd->priv;
 852      struct rk29_nand_mtd *master = nand_chip->priv;
 853      pNANDC pRK29NC=  (pNANDC)(master->regs);
 854
 855      int eccdata[7],i;
 856
 857     FLASH_DEBUG("%s:%s, %d\n", __FILE__,__FUNCTION__, __LINE__);
 858         for(i=0;i<7;i++)
 859          {
 860             eccdata[i] = pRK29NC->spare[i+1];
 861
 862
 863             ecc_code[i*4] = eccdata[i]& 0xff;
 864             ecc_code[i*4+1] = (eccdata[i]>> 8)& 0xff;
 865             ecc_code[i*4+2] = (eccdata[i]>>16)& 0xff;
 866             ecc_code[i*4+3] = (eccdata[i]>>24)& 0xff;
 867
 868           }
 869
 870      return 0;
 871 }
 872
 873  void rk29_nand_hwctl_ecc(struct mtd_info *mtd, int mode)
 874  {
 875        struct nand_chip *nand_chip = mtd->priv;
 876         struct rk29_nand_mtd *master = nand_chip->priv;
 877         pNANDC pRK29NC=  (pNANDC)(master->regs);
 878
 879     FLASH_DEBUG("%s:%s, %d\n", __FILE__,__FUNCTION__, __LINE__);
 880         pRK29NC->BCHCTL = 1;  // reset bch and enable hw ecc
 881
 882        return;
 883  }
 884
 885  int rk29_nand_correct_data(struct mtd_info *mtd, uint8_t *dat, uint8_t *read_ecc,uint8_t *calc_ecc)
 886  {
 887        struct nand_chip *nand_chip = mtd->priv;
 888         struct rk29_nand_mtd *master = nand_chip->priv;
 889         pNANDC pRK29NC=  (pNANDC)(master->regs);
 890
 891         // hw correct data
 892        if( pRK29NC->BCHST[0] & (1<<2) )
 893          {
 894         FLASH_DEBUG("%s: %s BCH FAILED!!!\n", __FILE__,__FUNCTION__);
 895                 return -1;
 896         }
 897
 898        return 0;
 899  }
 900
 901  int rk29_nand_read_page(struct mtd_info *mtd,struct nand_chip *chip,uint8_t *buf, int page)
 902  {
 903        struct nand_chip *nand_chip = mtd->priv;
 904         struct rk29_nand_mtd *master = nand_chip->priv;
 905         pNANDC pRK29NC=  (pNANDC)(master->regs);
 906
 907         int i,chipnr, ecc = 0;
 908
 909
 910         RKNAND_LOCK();
 911
 912         chipnr = master->cs ;
 913
 914         rk29_nand_select_chip(mtd,chipnr);
 915
 916
 917        pRK29NC->FLCTL |= FL_BYPASS;  // dma mode
 918
 919         if(chip->options&NAND_BUSWIDTH_16)
 920         {
 921                 pRK29NC ->FMCTL |= FMC_WIDTH_16;  // ÉèÖÃÎª16Î»
 922         }
 923
 924         for(i=0;i<mtd->writesize/0x400;i++)
 925         {
 926                pRK29NC ->BCHCTL = BCH_RST;
 927                pRK29NC ->FLCTL = (0<<4)|FL_COR_EN|(0x1<<5)|FL_BYPASS|FL_START ;
 928                 wait_op_done(mtd,TROP_US_DELAY,0);
 929                 rk29_nand_wait_bchdone(mtd,TROP_US_DELAY) ;
 930         ecc |= rk29_nand_check_hwecc(mtd, page);
 931               memcpy(buf+i*0x400,(u_char *)(pRK29NC->buf),0x400);  //  only use nandc sram0
 932         }
 933
 934     if(ecc & 0x2){
 935         mtd->ecc_stats.failed++;
 936                 return -EBADMSG;
 937         }
 938     else if(ecc & 0x1){
 939         if(!read_in_refresh){
 940             //FLASH_DEBUG("Flash need fresh srcAddr = [%d]\n", ((page*mtd->writesize)/mtd->erasesize)*mtd->erasesize);
 941             return -1;
 942             }
 943         }
 944
 945         rk29_nand_select_chip(mtd,-1);
 946
 947         RKNAND_UNLOCK();
 948         //t2 = ktime_get();
 949         //delta = ktime_sub(t2, t1);
 950         //FLASH_DEBUG("%s:%s [%lli nsec]\r\n",__FILE__,__FUNCTION__, (long long)ktime_to_ns(delta));
 951     return 0;
 952
 953  }
 954
 955 void  rk29_nand_write_page(struct mtd_info *mtd,struct nand_chip *chip,const uint8_t *buf)
 956  {
 957        struct nand_chip *nand_chip = mtd->priv;
 958         struct rk29_nand_mtd *master = nand_chip->priv;
 959         pNANDC pRK29NC=  (pNANDC)(master->regs);
 960        uint32_t  i = 0, chipnr;
 961
 962         RKNAND_LOCK();
 963
 964        chipnr = master->cs ;
 965
 966         rk29_nand_select_chip(mtd,chipnr);
 967
 968         pRK29NC->FLCTL |= FL_BYPASS;  // dma mode
 969
 970   if(chip->options&NAND_BUSWIDTH_16)
 971         {
 972                 pRK29NC ->FMCTL |= FMC_WIDTH_16;  // ÉèÖÃÎª16Î»
 973         }
 974
 975           for(i=0;i<mtd->writesize/0x400;i++)
 976            {
 977                 pRK29NC ->BCHCTL = BCH_WR|BCH_RST;
 978                memcpy((u_char *)(pRK29NC->buf),(buf+i*0x400),0x400);  //  only use nandc sram0
 979                if(i==0)
 980                    memcpy((u_char *)(pRK29NC->spare),(u_char *)(chip->oob_poi + chip->ops.ooboffs),4);
 981
 982                 pRK29NC ->FLCTL = (0<<4)|FL_COR_EN|(0x1<<5)|FL_RDN|FL_BYPASS|FL_START;
 983                 wait_op_done(mtd,TROP_US_DELAY,0);
 984            }
 985
 986          pRK29NC ->chip[chipnr].cmd = NAND_CMD_PAGEPROG;
 987
 988
 989
 990           rk29_nand_wait_busy(mtd,PROGRAM_BUSY_COUNT);
 991
 992          rk29_nand_select_chip(mtd,-1);
 993
 994      RKNAND_UNLOCK();
 995
 996     return;
 997
 998  }
 999
1000 int rk29_nand_read_oob(struct mtd_info *mtd, struct nand_chip *chip, int page, int sndcmd)
1001 {
1002        struct nand_chip *nand_chip = mtd->priv;
1003         struct rk29_nand_mtd *master = nand_chip->priv;
1004         pNANDC pRK29NC=  (pNANDC)(master->regs);
1005     int i,chipnr,ecc=0;
1006         RKNAND_LOCK();
1007         chipnr = master->cs ;
1008
1009         rk29_nand_select_chip(mtd,chipnr);
1010
1011
1012         if (sndcmd) {
1013                 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
1014                 sndcmd = 0;
1015         }
1016
1017         rk29_nand_wait_busy(mtd,READ_BUSY_COUNT);
1018
1019
1020        pRK29NC->FLCTL |= FL_BYPASS;  // dma mode
1021
1022         if(chip->options&NAND_BUSWIDTH_16)
1023         {
1024                 pRK29NC ->FMCTL |= FMC_WIDTH_16;  // ÉèÖÃÎª16Î»
1025         }
1026
1027
1028         for(i=0;i<mtd->writesize/0x400;i++)
1029         {
1030                pRK29NC ->BCHCTL = BCH_RST;
1031                pRK29NC ->FLCTL = (0<<4)|FL_COR_EN|(0x1<<5)|FL_BYPASS|FL_START ;
1032                 wait_op_done(mtd,TROP_US_DELAY,0);
1033                 rk29_nand_wait_bchdone(mtd,TROP_US_DELAY) ;
1034         ecc |= rk29_nand_check_hwecc(mtd, page);
1035               if(i==0)
1036                  memcpy((u_char *)(chip->oob_poi+ chip->ops.ooboffs),(u_char *)(pRK29NC->spare),4);
1037         }
1038
1039     if(ecc & 0x2){
1040         mtd->ecc_stats.failed++;
1041                 return -EBADMSG;
1042         }
1043     else if(ecc & 0x1){
1044         if(!read_in_refresh){
1045             //FLASH_DEBUG("Flash need fresh srcAddr = [%d]\n", ((page*mtd->writesize)/mtd->erasesize)*mtd->erasesize);
1046             return -1;
1047             }
1048         }
1049
1050          rk29_nand_select_chip(mtd,-1);
1051
1052          RKNAND_UNLOCK();
1053
1054
1055         return sndcmd;
1056 }
1057
1058 int     rk29_nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, uint8_t *buf, int page)
1059 {
1060        struct nand_chip *nand_chip = mtd->priv;
1061         struct rk29_nand_mtd *master = nand_chip->priv;
1062         pNANDC pRK29NC=  (pNANDC)(master->regs);
1063
1064     int i,chipnr,ecc=0;
1065
1066
1067     RKNAND_LOCK();
1068
1069         chipnr = master->cs ;
1070
1071         rk29_nand_select_chip(mtd,chipnr);
1072
1073         rk29_nand_wait_busy(mtd,READ_BUSY_COUNT);
1074
1075        pRK29NC->FLCTL |= FL_BYPASS;  // dma mode
1076
1077         if(chip->options&NAND_BUSWIDTH_16)
1078         {
1079                 pRK29NC ->FMCTL |= FMC_WIDTH_16;  // ÉèÖÃÎª16Î»
1080         }
1081
1082         for(i=0;i<mtd->writesize/0x400;i++)
1083         {
1084                pRK29NC ->BCHCTL = BCH_RST;
1085                pRK29NC ->FLCTL = (0<<4)|FL_COR_EN|(0x1<<5)|FL_BYPASS|FL_START ;
1086                 wait_op_done(mtd,TROP_US_DELAY,0);
1087                  rk29_nand_wait_bchdone(mtd,TROP_US_DELAY) ;
1088         ecc |= rk29_nand_check_hwecc(mtd, page);
1089               memcpy(buf+i*0x400,(u_char *)(pRK29NC->buf),0x400);  //  only use nandc sram0
1090               if(i==0)
1091                  memcpy((u_char *)(chip->oob_poi+ chip->ops.ooboffs),(u_char *)(pRK29NC->spare),4);
1092         }
1093
1094     if(ecc & 0x2){
1095         mtd->ecc_stats.failed++;
1096                 return -EBADMSG;
1097         }
1098     else if(ecc & 0x1){
1099         if(!read_in_refresh){
1100             //FLASH_DEBUG("Flash need fresh srcAddr = [%d]\n", ((page*mtd->writesize)/mtd->erasesize)*mtd->erasesize);
1101             return -1;
1102             }
1103         }
1104
1105          rk29_nand_select_chip(mtd,-1);
1106          RKNAND_UNLOCK();
1107
1108
1109     return 0;
1110 }
1111 int     rk29_nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,const uint8_t *buf)
1112 {
1113     struct nand_chip *nand_chip = mtd->priv;
1114     struct rk29_nand_mtd *master = nand_chip->priv;
1115     pNANDC pRK29NC=  (pNANDC)(master->regs);
1116     int i,chipnr;
1117
1118     //FLASH_DEBUG("%s: %s, %d\n", __FILE__ ,__FUNCTION__, __LINE__);
1119
1120     RKNAND_LOCK();
1121
1122         chipnr = master->cs ;
1123
1124         rk29_nand_select_chip(mtd,chipnr);
1125
1126     rk29_nand_wait_busy(mtd, PROGRAM_BUSY_COUNT);
1127
1128        pRK29NC->FLCTL |= FL_BYPASS;  // dma mode
1129
1130         if(chip->options&NAND_BUSWIDTH_16)
1131         {
1132                 pRK29NC ->FMCTL |= FMC_WIDTH_16;  // ÉèÖÃÎª16Î»
1133         }
1134
1135     for(i=0;i<mtd->writesize/0x400;i++)
1136     {
1137         pRK29NC->BCHCTL = BCH_WR|BCH_RST;
1138         memcpy((u_char *)(pRK29NC->buf),(buf+i*0x400),0x400);
1139         if(i==0)
1140             memcpy((u_char *)(pRK29NC->spare),(u_char *)(chip->oob_poi + chip->ops.ooboffs),4);
1141         pRK29NC->FLCTL = (0<<4)|FL_COR_EN|(0x1<<5)|FL_RDN|FL_BYPASS|FL_START;
1142         wait_op_done(mtd,TROP_US_DELAY,0);
1143     }
1144          rk29_nand_select_chip(mtd,-1);
1145
1146     RKNAND_UNLOCK();
1147     return 0;
1148 }
1149
1150
1151 static int rk29_nand_setrate(struct rk29_nand_mtd *info)
1152 {
1153         pNANDC pRK29NC=  (pNANDC)(info->regs);
1154
1155         unsigned long clkrate = clk_get_rate(info->clk);
1156
1157        u_char accesstime,rwpw,csrw,rwcs;
1158
1159         unsigned int ns=0,timingcfg;
1160
1161
1162
1163 // some nand flashs have not  timing id and almost all nand flash access time is 25ns, so need to  fix accesstime to 40 ns
1164         accesstime = 50;
1165
1166        info->clk_rate = clkrate;
1167         clkrate /= 1000000;     /* turn clock into MHz for ease of use */
1168
1169         if(clkrate>0 && clkrate<=400)
1170            ns= 1000/clkrate; // ns
1171         else
1172            return -1;
1173
1174         timingcfg=  accesstime/ns + 1 ;
1175
1176        rwpw = (timingcfg+1)/2;  // rwpw >= timingcfg/2
1177
1178         csrw = ( timingcfg/4 > 1)?(timingcfg/4):1;  // csrw >=1
1179
1180         rwcs = ( (timingcfg+3)/4 >1)?((timingcfg+3)/4):1; // rwcs >=1 &&  rwcs >= timingcfg/4
1181         RKNAND_LOCK();
1182
1183         pRK29NC ->FMWAIT &=0xFFFF0800;
1184         pRK29NC ->FMWAIT |=  (rwcs<<FMW_RWCS_OFFSET)|(rwpw<<FMW_RWPW_OFFSET)|(csrw<<FMW_CSRW_OFFSET);
1185
1186         RKNAND_UNLOCK();
1187
1188
1189         return 0;
1190 }
1191
1192 /* cpufreq driver support */
1193
1194 #ifdef CONFIG_CPU_FREQ
1195
1196 static int rk29_nand_cpufreq_transition(struct notifier_block *nb, unsigned long val, void *data)
1197 {
1198         struct rk29_nand_mtd *info;
1199         unsigned long newclk;
1200
1201         info = container_of(nb, struct rk29_nand_mtd, freq_transition);
1202         newclk = clk_get_rate(info->clk);
1203
1204         if (val == CPUFREQ_POSTCHANGE && newclk != info->clk_rate)
1205          {
1206                 rk29_nand_setrate(info);
1207         }
1208
1209         return 0;
1210 }
1211
1212 static inline int rk29_nand_cpufreq_register(struct rk29_nand_mtd *info)
1213 {
1214         info->freq_transition.notifier_call = rk29_nand_cpufreq_transition;
1215
1216         return cpufreq_register_notifier(&info->freq_transition, CPUFREQ_TRANSITION_NOTIFIER);
1217 }
1218
1219 static inline void rk29_nand_cpufreq_deregister(struct rk29_nand_mtd *info)
1220 {
1221         cpufreq_unregister_notifier(&info->freq_transition, CPUFREQ_TRANSITION_NOTIFIER);
1222 }
1223
1224 #else
1225 static inline int rk29_nand_cpufreq_register(struct rk29_nand_mtd *info)
1226 {
1227         return 0;
1228 }
1229
1230 static inline void rk29_nand_cpufreq_deregister(struct rk29_nand_mtd *info)
1231 {
1232 }
1233 #endif
1234
1235
1236 static int rk29_nand_probe(struct platform_device *pdev)
1237 {
1238        struct nand_chip *this;
1239         struct mtd_info *mtd;
1240         struct rk29_nand_platform_data *pdata = pdev->dev.platform_data;
1241         struct rk29_nand_mtd *master;
1242         struct resource *res;
1243         int err = 0;
1244         pNANDC pRK29NC;
1245         u_char  maf_id,dev_id,ext_id3,ext_id4;
1246
1247 #ifdef CONFIG_MTD_PARTITIONS
1248         struct mtd_partition *partitions = NULL;
1249         int num_partitions = 0;
1250 #endif
1251
1252       /* Allocate memory for MTD device structure and private data */
1253         master = kzalloc(sizeof(struct rk29_nand_mtd), GFP_KERNEL);
1254         if (!master)
1255                 return -ENOMEM;
1256
1257          master->dev = &pdev->dev;
1258         /* structures must be linked */
1259         this = &master->nand;
1260         mtd = &master->mtd;
1261         mtd->priv = this;
1262         mtd->owner = THIS_MODULE;
1263        mtd->name = dev_name(&pdev->dev);
1264
1265         /* 50 us command delay time */
1266         this->chip_delay = 5;
1267
1268         this->priv = master;
1269         this->dev_ready = rk29_nand_dev_ready;
1270         this->cmdfunc = rk29_nand_cmdfunc;
1271         this->select_chip = rk29_nand_select_chip;
1272         this->read_byte = rk29_nand_read_byte;
1273         this->read_word = rk29_nand_read_word;
1274         this->write_buf = rk29_nand_write_buf;
1275         this->read_buf = rk29_nand_read_buf;
1276         this->options |= NAND_USE_FLASH_BBT;    // open bbt options
1277
1278
1279         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1280         if (!res) {
1281                 err = -ENODEV;
1282                 goto outres;
1283         }
1284
1285         master->regs = ioremap(res->start, res->end - res->start + 1);
1286         if (!master->regs) {
1287                 err = -EIO;
1288                 goto outres;
1289         }
1290
1291         if (pdata->hw_ecc) {
1292                 this->ecc.calculate = rk29_nand_calculate_ecc;
1293                 this->ecc.hwctl = rk29_nand_hwctl_ecc;
1294                 this->ecc.correct = rk29_nand_correct_data;
1295                 this->ecc.mode = NAND_ECC_HW;
1296                 this->ecc.read_page = rk29_nand_read_page;
1297                 this->ecc.write_page = rk29_nand_write_page;
1298                 this->ecc.read_oob = rk29_nand_read_oob;
1299                 this->ecc.read_page_raw = rk29_nand_read_page_raw;
1300                 this->ecc.size = 1024;
1301                 this->ecc.bytes = 28;
1302                 this->ecc.layout = &nand_hw_eccoob_16;
1303         } else {
1304                 this->ecc.size = 256;
1305                 this->ecc.bytes = 3;
1306                 this->ecc.layout = &nand_sw_eccoob_8;
1307                 this->ecc.mode = NAND_ECC_SOFT;
1308         }
1309
1310
1311
1312         master->clk = clk_get(NULL, "nandc");
1313
1314         clk_enable(master->clk);
1315
1316        pRK29NC =  (pNANDC)(master->regs);
1317        pRK29NC ->FMCTL = FMC_WP|FMC_FRDY;
1318        pRK29NC ->FMWAIT |=  (1<<FMW_RWCS_OFFSET)|(4<<FMW_RWPW_OFFSET)|(2<<FMW_CSRW_OFFSET);
1319         pRK29NC ->BCHCTL = 0x1;
1320
1321        this->select_chip(mtd, 0);
1322         this->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
1323         maf_id = this->read_byte(mtd);
1324         dev_id = this->read_byte(mtd);
1325        ext_id3 = this->read_byte(mtd);
1326         ext_id4 = this->read_byte(mtd);
1327
1328        master->accesstime = ext_id4&0x88;
1329
1330         rk29_nand_setrate(master);
1331
1332         /* Reset NAND */
1333         this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
1334         /* NAND bus width determines access funtions used by upper layer */
1335         if (pdata->width == 2) {
1336                 this->options |= NAND_BUSWIDTH_16;
1337                 this->ecc.layout = &nand_hw_eccoob_16;
1338         }
1339       // iomux flash  cs1~cs7
1340     if (pdata && pdata->io_init) {
1341         pdata->io_init();
1342     }
1343
1344         /* Scan to find existence of the device */
1345 #if 0
1346            if (nand_scan(mtd, 8)) {     // rk29 nandc support max 8 cs
1347 #else
1348            if (nand_scan(mtd, 1)) {      // test for fpga board nand
1349 #endif
1350                 DEBUG(MTD_DEBUG_LEVEL0,
1351                       "RK29 NAND: Unable to find any NAND device.\n");
1352                 err = -ENXIO;
1353                 goto outscan;
1354         }
1355
1356
1357 #ifdef CONFIG_MTD_PARTITIONS
1358         num_partitions = parse_mtd_partitions(mtd, part_probes, &partitions, 0);
1359         if (num_partitions > 0) {
1360                 printk(KERN_INFO "Using commandline partition definition\n");
1361               add_mtd_partitions(mtd, partitions, num_partitions);
1362                 if(partitions)
1363                  kfree(partitions);
1364         } else if (pdata->nr_parts) {
1365                 printk(KERN_INFO "Using board partition definition\n");
1366                 add_mtd_partitions(mtd, pdata->parts, pdata->nr_parts);
1367         } else
1368 #endif
1369         {
1370                 printk(KERN_INFO "no partition info available, registering whole flash at once\n");
1371                 add_mtd_device(mtd);
1372         }
1373
1374         platform_set_drvdata(pdev, master);
1375
1376         err =rk29_nand_cpufreq_register(master);
1377         if (err < 0) {
1378                 printk(KERN_ERR"rk2818 nand failed to init cpufreq support\n");
1379                 goto outscan;
1380         }
1381
1382         return 0;
1383
1384 outres:
1385 outscan:
1386     printk("rk29_nand_probe error!!!\n");
1387         iounmap(master->regs);
1388         kfree(master);
1389
1390         return err;
1391
1392 }
1393
1394 static int rk29_nand_remove(struct platform_device *pdev)
1395 {
1396         struct rk29_nand_mtd *master = platform_get_drvdata(pdev);
1397
1398         platform_set_drvdata(pdev, NULL);
1399
1400        if(master == NULL)
1401                 return 0;
1402
1403         rk29_nand_cpufreq_deregister(master);
1404
1405
1406         nand_release(&master->mtd);
1407
1408         if(master->regs!=NULL){
1409                 iounmap(master->regs);
1410                 master->regs = NULL;
1411         }
1412
1413         if (master->clk != NULL && !IS_ERR(master->clk)) {
1414                 clk_disable(master->clk);
1415                 clk_put(master->clk);
1416         }
1417
1418         kfree(master);
1419
1420         return 0;
1421 }
1422
1423 #ifdef CONFIG_PM
1424 static int rk29_nand_suspend(struct platform_device *pdev, pm_message_t state)
1425 {
1426 #if 0
1427         struct mtd_info *info = platform_get_drvdata(pdev);
1428         int ret = 0;
1429
1430         DEBUG(MTD_DEBUG_LEVEL0, "RK2818_NAND : NAND suspend\n");
1431         if (info)
1432                 ret = info->suspend(info);
1433         return ret;
1434 #else
1435     return 0;
1436 #endif
1437 }
1438
1439 static int rk29_nand_resume(struct platform_device *pdev)
1440 {
1441 #if 0
1442         struct mtd_info *info = platform_get_drvdata(pdev);
1443         int ret = 0;
1444
1445         DEBUG(MTD_DEBUG_LEVEL0, "RK2818_NAND : NAND resume\n");
1446         /* Enable the NFC clock */
1447
1448         if (info)
1449                 info->resume(info);
1450
1451         return ret;
1452 #else
1453     return 0;
1454 #endif
1455 }
1456 #else
1457 #define rk29_nand_suspend   NULL
1458 #define rk29_nand_resume    NULL
1459 #endif  /* CONFIG_PM */
1460
1461
1462 static struct platform_driver rk29_nand_driver = {
1463         .driver = {
1464                    .name = "rk29-nand",
1465                    },
1466        .probe    = rk29_nand_probe,
1467         .remove = rk29_nand_remove,
1468         .suspend = rk29_nand_suspend,
1469         .resume = rk29_nand_resume,
1470 };
1471
1472 static int __init rk29_nand_init(void)
1473 {
1474         /* Register the device driver structure. */
1475         printk("rk29_nand_init\n");
1476         return platform_driver_register(&rk29_nand_driver);;
1477 }
1478
1479 static void __exit rk29_nand_exit(void)
1480 {
1481         /* Unregister the device structure */
1482         platform_driver_unregister(&rk29_nand_driver);
1483 }
1484
1485 #ifdef CONFIG_DM9000_USE_NAND_CONTROL
1486 // nandc dma cs mutex for dm9000 interface
1487 void rk29_nand_status_mutex_lock(void)
1488 {
1489      pNANDC pRK29NC=  (pNANDC)RK2818_NANDC_BASE;
1490      mutex_lock(&rknand_mutex);
1491      pRK29NC->FMCTL &=0xffffff00;   // release chip select
1492
1493 }
1494
1495 int rk29_nand_status_mutex_trylock(void)
1496 {
1497      pNANDC pRK29NC=  (pNANDC)RK2818_NANDC_BASE;
1498      if( mutex_trylock(&rknand_mutex))
1499         {
1500                 pRK29NC->FMCTL &=0xffffff00;   // release chip select
1501                 return 1;      // ready
1502         }
1503       else
1504                 return 0;     // busy
1505 }
1506
1507 void rk29_nand_status_mutex_unlock(void)
1508 {
1509      mutex_unlock(&rknand_mutex);
1510      return;
1511 }
1512 #endif
1513
1514 module_init(rk29_nand_init);
1515 module_exit(rk29_nand_exit);
1516
1517 MODULE_LICENSE("GPL");
1518 MODULE_AUTHOR("hxy <hxy@rock-chips.com>");
1519 MODULE_DESCRIPTION("MTD NAND driver for rk29 device");
1520