drivers/mtd/onenand/onenand_base.c

   1 /*
   2  *  linux/drivers/mtd/onenand/onenand_base.c
   3  *
   4  *  Copyright (C) 2005-2007 Samsung Electronics
   5  *  Kyungmin Park <kyungmin.park@samsung.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/sched.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/jiffies.h>
  18 #include <linux/mtd/mtd.h>
  19 #include <linux/mtd/onenand.h>
  20 #include <linux/mtd/partitions.h>
  21
  22 #include <asm/io.h>
  23
  24 /**
  25  * onenand_oob_64 - oob info for large (2KB) page
  26  */
  27 static struct nand_ecclayout onenand_oob_64 = {
  28         .eccbytes       = 20,
  29         .eccpos         = {
  30                 8, 9, 10, 11, 12,
  31                 24, 25, 26, 27, 28,
  32                 40, 41, 42, 43, 44,
  33                 56, 57, 58, 59, 60,
  34                 },
  35         .oobfree        = {
  36                 {2, 3}, {14, 2}, {18, 3}, {30, 2},
  37                 {34, 3}, {46, 2}, {50, 3}, {62, 2}
  38         }
  39 };
  40
  41 /**
  42  * onenand_oob_32 - oob info for middle (1KB) page
  43  */
  44 static struct nand_ecclayout onenand_oob_32 = {
  45         .eccbytes       = 10,
  46         .eccpos         = {
  47                 8, 9, 10, 11, 12,
  48                 24, 25, 26, 27, 28,
  49                 },
  50         .oobfree        = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
  51 };
  52
  53 static const unsigned char ffchars[] = {
  54         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  55         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  56         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  57         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  58         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  59         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  60         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  61         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  62 };
  63
  64 /**
  65  * onenand_readw - [OneNAND Interface] Read OneNAND register
  66  * @param addr          address to read
  67  *
  68  * Read OneNAND register
  69  */
  70 static unsigned short onenand_readw(void __iomem *addr)
  71 {
  72         return readw(addr);
  73 }
  74
  75 /**
  76  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  77  * @param value         value to write
  78  * @param addr          address to write
  79  *
  80  * Write OneNAND register with value
  81  */
  82 static void onenand_writew(unsigned short value, void __iomem *addr)
  83 {
  84         writew(value, addr);
  85 }
  86
  87 /**
  88  * onenand_block_address - [DEFAULT] Get block address
  89  * @param this          onenand chip data structure
  90  * @param block         the block
  91  * @return              translated block address if DDP, otherwise same
  92  *
  93  * Setup Start Address 1 Register (F100h)
  94  */
  95 static int onenand_block_address(struct onenand_chip *this, int block)
  96 {
  97         /* Device Flash Core select, NAND Flash Block Address */
  98         if (block & this->density_mask)
  99                 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
 100
 101         return block;
 102 }
 103
 104 /**
 105  * onenand_bufferram_address - [DEFAULT] Get bufferram address
 106  * @param this          onenand chip data structure
 107  * @param block         the block
 108  * @return              set DBS value if DDP, otherwise 0
 109  *
 110  * Setup Start Address 2 Register (F101h) for DDP
 111  */
 112 static int onenand_bufferram_address(struct onenand_chip *this, int block)
 113 {
 114         /* Device BufferRAM Select */
 115         if (block & this->density_mask)
 116                 return ONENAND_DDP_CHIP1;
 117
 118         return ONENAND_DDP_CHIP0;
 119 }
 120
 121 /**
 122  * onenand_page_address - [DEFAULT] Get page address
 123  * @param page          the page address
 124  * @param sector        the sector address
 125  * @return              combined page and sector address
 126  *
 127  * Setup Start Address 8 Register (F107h)
 128  */
 129 static int onenand_page_address(int page, int sector)
 130 {
 131         /* Flash Page Address, Flash Sector Address */
 132         int fpa, fsa;
 133
 134         fpa = page & ONENAND_FPA_MASK;
 135         fsa = sector & ONENAND_FSA_MASK;
 136
 137         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
 138 }
 139
 140 /**
 141  * onenand_buffer_address - [DEFAULT] Get buffer address
 142  * @param dataram1      DataRAM index
 143  * @param sectors       the sector address
 144  * @param count         the number of sectors
 145  * @return              the start buffer value
 146  *
 147  * Setup Start Buffer Register (F200h)
 148  */
 149 static int onenand_buffer_address(int dataram1, int sectors, int count)
 150 {
 151         int bsa, bsc;
 152
 153         /* BufferRAM Sector Address */
 154         bsa = sectors & ONENAND_BSA_MASK;
 155
 156         if (dataram1)
 157                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
 158         else
 159                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
 160
 161         /* BufferRAM Sector Count */
 162         bsc = count & ONENAND_BSC_MASK;
 163
 164         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
 165 }
 166
 167 /**
 168  * onenand_command - [DEFAULT] Send command to OneNAND device
 169  * @param mtd           MTD device structure
 170  * @param cmd           the command to be sent
 171  * @param addr          offset to read from or write to
 172  * @param len           number of bytes to read or write
 173  *
 174  * Send command to OneNAND device. This function is used for middle/large page
 175  * devices (1KB/2KB Bytes per page)
 176  */
 177 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
 178 {
 179         struct onenand_chip *this = mtd->priv;
 180         int value, readcmd = 0, block_cmd = 0;
 181         int block, page;
 182
 183         /* Address translation */
 184         switch (cmd) {
 185         case ONENAND_CMD_UNLOCK:
 186         case ONENAND_CMD_LOCK:
 187         case ONENAND_CMD_LOCK_TIGHT:
 188         case ONENAND_CMD_UNLOCK_ALL:
 189                 block = -1;
 190                 page = -1;
 191                 break;
 192
 193         case ONENAND_CMD_ERASE:
 194         case ONENAND_CMD_BUFFERRAM:
 195         case ONENAND_CMD_OTP_ACCESS:
 196                 block_cmd = 1;
 197                 block = (int) (addr >> this->erase_shift);
 198                 page = -1;
 199                 break;
 200
 201         default:
 202                 block = (int) (addr >> this->erase_shift);
 203                 page = (int) (addr >> this->page_shift);
 204                 page &= this->page_mask;
 205                 break;
 206         }
 207
 208         /* NOTE: The setting order of the registers is very important! */
 209         if (cmd == ONENAND_CMD_BUFFERRAM) {
 210                 /* Select DataRAM for DDP */
 211                 value = onenand_bufferram_address(this, block);
 212                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 213
 214                 /* Switch to the next data buffer */
 215                 ONENAND_SET_NEXT_BUFFERRAM(this);
 216
 217                 return 0;
 218         }
 219
 220         if (block != -1) {
 221                 /* Write 'DFS, FBA' of Flash */
 222                 value = onenand_block_address(this, block);
 223                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
 224
 225                 if (block_cmd) {
 226                         /* Select DataRAM for DDP */
 227                         value = onenand_bufferram_address(this, block);
 228                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 229                 }
 230         }
 231
 232         if (page != -1) {
 233                 /* Now we use page size operation */
 234                 int sectors = 4, count = 4;
 235                 int dataram;
 236
 237                 switch (cmd) {
 238                 case ONENAND_CMD_READ:
 239                 case ONENAND_CMD_READOOB:
 240                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
 241                         readcmd = 1;
 242                         break;
 243
 244                 default:
 245                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
 246                         break;
 247                 }
 248
 249                 /* Write 'FPA, FSA' of Flash */
 250                 value = onenand_page_address(page, sectors);
 251                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
 252
 253                 /* Write 'BSA, BSC' of DataRAM */
 254                 value = onenand_buffer_address(dataram, sectors, count);
 255                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
 256
 257                 if (readcmd) {
 258                         /* Select DataRAM for DDP */
 259                         value = onenand_bufferram_address(this, block);
 260                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 261                 }
 262         }
 263
 264         /* Interrupt clear */
 265         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
 266
 267         /* Write command */
 268         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
 269
 270         return 0;
 271 }
 272
 273 /**
 274  * onenand_wait - [DEFAULT] wait until the command is done
 275  * @param mtd           MTD device structure
 276  * @param state         state to select the max. timeout value
 277  *
 278  * Wait for command done. This applies to all OneNAND command
 279  * Read can take up to 30us, erase up to 2ms and program up to 350us
 280  * according to general OneNAND specs
 281  */
 282 static int onenand_wait(struct mtd_info *mtd, int state)
 283 {
 284         struct onenand_chip * this = mtd->priv;
 285         unsigned long timeout;
 286         unsigned int flags = ONENAND_INT_MASTER;
 287         unsigned int interrupt = 0;
 288         unsigned int ctrl;
 289
 290         /* The 20 msec is enough */
 291         timeout = jiffies + msecs_to_jiffies(20);
 292         while (time_before(jiffies, timeout)) {
 293                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 294
 295                 if (interrupt & flags)
 296                         break;
 297
 298                 if (state != FL_READING)
 299                         cond_resched();
 300         }
 301         /* To get correct interrupt status in timeout case */
 302         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 303
 304         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
 305
 306         if (ctrl & ONENAND_CTRL_ERROR) {
 307                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
 308                 if (ctrl & ONENAND_CTRL_LOCK)
 309                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error.\n");
 310                 return ctrl;
 311         }
 312
 313         if (interrupt & ONENAND_INT_READ) {
 314                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
 315                 if (ecc) {
 316                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
 317                         if (ecc & ONENAND_ECC_2BIT_ALL) {
 318                                 mtd->ecc_stats.failed++;
 319                                 return ecc;
 320                         } else if (ecc & ONENAND_ECC_1BIT_ALL)
 321                                 mtd->ecc_stats.corrected++;
 322                 }
 323         } else if (state == FL_READING) {
 324                 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
 325                 return -EIO;
 326         }
 327
 328         return 0;
 329 }
 330
 331 /*
 332  * onenand_interrupt - [DEFAULT] onenand interrupt handler
 333  * @param irq           onenand interrupt number
 334  * @param dev_id        interrupt data
 335  *
 336  * complete the work
 337  */
 338 static irqreturn_t onenand_interrupt(int irq, void *data)
 339 {
 340         struct onenand_chip *this = (struct onenand_chip *) data;
 341
 342         /* To handle shared interrupt */
 343         if (!this->complete.done)
 344                 complete(&this->complete);
 345
 346         return IRQ_HANDLED;
 347 }
 348
 349 /*
 350  * onenand_interrupt_wait - [DEFAULT] wait until the command is done
 351  * @param mtd           MTD device structure
 352  * @param state         state to select the max. timeout value
 353  *
 354  * Wait for command done.
 355  */
 356 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
 357 {
 358         struct onenand_chip *this = mtd->priv;
 359
 360         wait_for_completion(&this->complete);
 361
 362         return onenand_wait(mtd, state);
 363 }
 364
 365 /*
 366  * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
 367  * @param mtd           MTD device structure
 368  * @param state         state to select the max. timeout value
 369  *
 370  * Try interrupt based wait (It is used one-time)
 371  */
 372 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
 373 {
 374         struct onenand_chip *this = mtd->priv;
 375         unsigned long remain, timeout;
 376
 377         /* We use interrupt wait first */
 378         this->wait = onenand_interrupt_wait;
 379
 380         timeout = msecs_to_jiffies(100);
 381         remain = wait_for_completion_timeout(&this->complete, timeout);
 382         if (!remain) {
 383                 printk(KERN_INFO "OneNAND: There's no interrupt. "
 384                                 "We use the normal wait\n");
 385
 386                 /* Release the irq */
 387                 free_irq(this->irq, this);
 388
 389                 this->wait = onenand_wait;
 390         }
 391
 392         return onenand_wait(mtd, state);
 393 }
 394
 395 /*
 396  * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
 397  * @param mtd           MTD device structure
 398  *
 399  * There's two method to wait onenand work
 400  * 1. polling - read interrupt status register
 401  * 2. interrupt - use the kernel interrupt method
 402  */
 403 static void onenand_setup_wait(struct mtd_info *mtd)
 404 {
 405         struct onenand_chip *this = mtd->priv;
 406         int syscfg;
 407
 408         init_completion(&this->complete);
 409
 410         if (this->irq <= 0) {
 411                 this->wait = onenand_wait;
 412                 return;
 413         }
 414
 415         if (request_irq(this->irq, &onenand_interrupt,
 416                                 IRQF_SHARED, "onenand", this)) {
 417                 /* If we can't get irq, use the normal wait */
 418                 this->wait = onenand_wait;
 419                 return;
 420         }
 421
 422         /* Enable interrupt */
 423         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
 424         syscfg |= ONENAND_SYS_CFG1_IOBE;
 425         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
 426
 427         this->wait = onenand_try_interrupt_wait;
 428 }
 429
 430 /**
 431  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
 432  * @param mtd           MTD data structure
 433  * @param area          BufferRAM area
 434  * @return              offset given area
 435  *
 436  * Return BufferRAM offset given area
 437  */
 438 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
 439 {
 440         struct onenand_chip *this = mtd->priv;
 441
 442         if (ONENAND_CURRENT_BUFFERRAM(this)) {
 443                 if (area == ONENAND_DATARAM)
 444                         return mtd->writesize;
 445                 if (area == ONENAND_SPARERAM)
 446                         return mtd->oobsize;
 447         }
 448
 449         return 0;
 450 }
 451
 452 /**
 453  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
 454  * @param mtd           MTD data structure
 455  * @param area          BufferRAM area
 456  * @param buffer        the databuffer to put/get data
 457  * @param offset        offset to read from or write to
 458  * @param count         number of bytes to read/write
 459  *
 460  * Read the BufferRAM area
 461  */
 462 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
 463                 unsigned char *buffer, int offset, size_t count)
 464 {
 465         struct onenand_chip *this = mtd->priv;
 466         void __iomem *bufferram;
 467
 468         bufferram = this->base + area;
 469
 470         bufferram += onenand_bufferram_offset(mtd, area);
 471
 472         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 473                 unsigned short word;
 474
 475                 /* Align with word(16-bit) size */
 476                 count--;
 477
 478                 /* Read word and save byte */
 479                 word = this->read_word(bufferram + offset + count);
 480                 buffer[count] = (word & 0xff);
 481         }
 482
 483         memcpy(buffer, bufferram + offset, count);
 484
 485         return 0;
 486 }
 487
 488 /**
 489  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
 490  * @param mtd           MTD data structure
 491  * @param area          BufferRAM area
 492  * @param buffer        the databuffer to put/get data
 493  * @param offset        offset to read from or write to
 494  * @param count         number of bytes to read/write
 495  *
 496  * Read the BufferRAM area with Sync. Burst Mode
 497  */
 498 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
 499                 unsigned char *buffer, int offset, size_t count)
 500 {
 501         struct onenand_chip *this = mtd->priv;
 502         void __iomem *bufferram;
 503
 504         bufferram = this->base + area;
 505
 506         bufferram += onenand_bufferram_offset(mtd, area);
 507
 508         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
 509
 510         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 511                 unsigned short word;
 512
 513                 /* Align with word(16-bit) size */
 514                 count--;
 515
 516                 /* Read word and save byte */
 517                 word = this->read_word(bufferram + offset + count);
 518                 buffer[count] = (word & 0xff);
 519         }
 520
 521         memcpy(buffer, bufferram + offset, count);
 522
 523         this->mmcontrol(mtd, 0);
 524
 525         return 0;
 526 }
 527
 528 /**
 529  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
 530  * @param mtd           MTD data structure
 531  * @param area          BufferRAM area
 532  * @param buffer        the databuffer to put/get data
 533  * @param offset        offset to read from or write to
 534  * @param count         number of bytes to read/write
 535  *
 536  * Write the BufferRAM area
 537  */
 538 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
 539                 const unsigned char *buffer, int offset, size_t count)
 540 {
 541         struct onenand_chip *this = mtd->priv;
 542         void __iomem *bufferram;
 543
 544         bufferram = this->base + area;
 545
 546         bufferram += onenand_bufferram_offset(mtd, area);
 547
 548         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 549                 unsigned short word;
 550                 int byte_offset;
 551
 552                 /* Align with word(16-bit) size */
 553                 count--;
 554
 555                 /* Calculate byte access offset */
 556                 byte_offset = offset + count;
 557
 558                 /* Read word and save byte */
 559                 word = this->read_word(bufferram + byte_offset);
 560                 word = (word & ~0xff) | buffer[count];
 561                 this->write_word(word, bufferram + byte_offset);
 562         }
 563
 564         memcpy(bufferram + offset, buffer, count);
 565
 566         return 0;
 567 }
 568
 569 /**
 570  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
 571  * @param mtd           MTD data structure
 572  * @param addr          address to check
 573  * @return              1 if there are valid data, otherwise 0
 574  *
 575  * Check bufferram if there is data we required
 576  */
 577 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
 578 {
 579         struct onenand_chip *this = mtd->priv;
 580         int blockpage;
 581         unsigned int i;
 582
 583         blockpage = (int) (addr >> this->page_shift);
 584
 585         /* Is there valid data? */
 586         i = ONENAND_CURRENT_BUFFERRAM(this);
 587         if (this->bufferram[i].blockpage == blockpage)
 588                 return 1;
 589
 590         /* Check another BufferRAM */
 591         i = ONENAND_NEXT_BUFFERRAM(this);
 592         if (this->bufferram[i].blockpage == blockpage) {
 593                 ONENAND_SET_NEXT_BUFFERRAM(this);
 594                 return 1;
 595         }
 596
 597         return 0;
 598 }
 599
 600 /**
 601  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
 602  * @param mtd           MTD data structure
 603  * @param addr          address to update
 604  * @param valid         valid flag
 605  *
 606  * Update BufferRAM information
 607  */
 608 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
 609                 int valid)
 610 {
 611         struct onenand_chip *this = mtd->priv;
 612         int blockpage;
 613         unsigned int i;
 614
 615         blockpage = (int) (addr >> this->page_shift);
 616
 617         /* Invalidate another BufferRAM */
 618         i = ONENAND_NEXT_BUFFERRAM(this);
 619         if (this->bufferram[i].blockpage == blockpage)
 620                 this->bufferram[i].blockpage = -1;
 621
 622         /* Update BufferRAM */
 623         i = ONENAND_CURRENT_BUFFERRAM(this);
 624         if (valid)
 625                 this->bufferram[i].blockpage = blockpage;
 626         else
 627                 this->bufferram[i].blockpage = -1;
 628 }
 629
 630 /**
 631  * onenand_get_device - [GENERIC] Get chip for selected access
 632  * @param mtd           MTD device structure
 633  * @param new_state     the state which is requested
 634  *
 635  * Get the device and lock it for exclusive access
 636  */
 637 static int onenand_get_device(struct mtd_info *mtd, int new_state)
 638 {
 639         struct onenand_chip *this = mtd->priv;
 640         DECLARE_WAITQUEUE(wait, current);
 641
 642         /*
 643          * Grab the lock and see if the device is available
 644          */
 645         while (1) {
 646                 spin_lock(&this->chip_lock);
 647                 if (this->state == FL_READY) {
 648                         this->state = new_state;
 649                         spin_unlock(&this->chip_lock);
 650                         break;
 651                 }
 652                 if (new_state == FL_PM_SUSPENDED) {
 653                         spin_unlock(&this->chip_lock);
 654                         return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
 655                 }
 656                 set_current_state(TASK_UNINTERRUPTIBLE);
 657                 add_wait_queue(&this->wq, &wait);
 658                 spin_unlock(&this->chip_lock);
 659                 schedule();
 660                 remove_wait_queue(&this->wq, &wait);
 661         }
 662
 663         return 0;
 664 }
 665
 666 /**
 667  * onenand_release_device - [GENERIC] release chip
 668  * @param mtd           MTD device structure
 669  *
 670  * Deselect, release chip lock and wake up anyone waiting on the device
 671  */
 672 static void onenand_release_device(struct mtd_info *mtd)
 673 {
 674         struct onenand_chip *this = mtd->priv;
 675
 676         /* Release the chip */
 677         spin_lock(&this->chip_lock);
 678         this->state = FL_READY;
 679         wake_up(&this->wq);
 680         spin_unlock(&this->chip_lock);
 681 }
 682
 683 /**
 684  * onenand_read - [MTD Interface] Read data from flash
 685  * @param mtd           MTD device structure
 686  * @param from          offset to read from
 687  * @param len           number of bytes to read
 688  * @param retlen        pointer to variable to store the number of read bytes
 689  * @param buf           the databuffer to put data
 690  *
 691  * Read with ecc
 692 */
 693 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
 694         size_t *retlen, u_char *buf)
 695 {
 696         struct onenand_chip *this = mtd->priv;
 697         struct mtd_ecc_stats stats;
 698         int read = 0, column;
 699         int thislen;
 700         int ret = 0, boundary = 0;
 701
 702         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 703
 704         /* Do not allow reads past end of device */
 705         if ((from + len) > mtd->size) {
 706                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: Attempt read beyond end of device\n");
 707                 *retlen = 0;
 708                 return -EINVAL;
 709         }
 710
 711         /* Grab the lock and see if the device is available */
 712         onenand_get_device(mtd, FL_READING);
 713
 714         stats = mtd->ecc_stats;
 715
 716         /* Read-while-load method */
 717
 718         /* Do first load to bufferRAM */
 719         if (read < len) {
 720                 if (!onenand_check_bufferram(mtd, from)) {
 721                         this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
 722                         ret = this->wait(mtd, FL_READING);
 723                         onenand_update_bufferram(mtd, from, !ret);
 724                 }
 725         }
 726
 727         thislen = min_t(int, mtd->writesize, len - read);
 728         column = from & (mtd->writesize - 1);
 729         if (column + thislen > mtd->writesize)
 730                 thislen = mtd->writesize - column;
 731
 732         while (!ret) {
 733                 /* If there is more to load then start next load */
 734                 from += thislen;
 735                 if (read + thislen < len) {
 736                         this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
 737                         /*
 738                          * Chip boundary handling in DDP
 739                          * Now we issued chip 1 read and pointed chip 1
 740                          * bufferam so we have to point chip 0 bufferam.
 741                          */
 742                         if (ONENAND_IS_DDP(this) &&
 743                             unlikely(from == (this->chipsize >> 1))) {
 744                                 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
 745                                 boundary = 1;
 746                         } else
 747                                 boundary = 0;
 748                         ONENAND_SET_PREV_BUFFERRAM(this);
 749                 }
 750                 /* While load is going, read from last bufferRAM */
 751                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
 752                 /* See if we are done */
 753                 read += thislen;
 754                 if (read == len)
 755                         break;
 756                 /* Set up for next read from bufferRAM */
 757                 if (unlikely(boundary))
 758                         this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
 759                 ONENAND_SET_NEXT_BUFFERRAM(this);
 760                 buf += thislen;
 761                 thislen = min_t(int, mtd->writesize, len - read);
 762                 column = 0;
 763                 cond_resched();
 764                 /* Now wait for load */
 765                 ret = this->wait(mtd, FL_READING);
 766                 onenand_update_bufferram(mtd, from, !ret);
 767         }
 768
 769         /* Deselect and wake up anyone waiting on the device */
 770         onenand_release_device(mtd);
 771
 772         /*
 773          * Return success, if no ECC failures, else -EBADMSG
 774          * fs driver will take care of that, because
 775          * retlen == desired len and result == -EBADMSG
 776          */
 777         *retlen = read;
 778
 779         if (mtd->ecc_stats.failed - stats.failed)
 780                 return -EBADMSG;
 781
 782         if (ret)
 783                 return ret;
 784
 785         return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
 786 }
 787
 788 /**
 789  * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
 790  * @param mtd           MTD device structure
 791  * @param buf           destination address
 792  * @param column        oob offset to read from
 793  * @param thislen       oob length to read
 794  */
 795 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
 796                                 int thislen)
 797 {
 798         struct onenand_chip *this = mtd->priv;
 799         struct nand_oobfree *free;
 800         int readcol = column;
 801         int readend = column + thislen;
 802         int lastgap = 0;
 803         uint8_t *oob_buf = this->page_buf + mtd->writesize;
 804
 805         for (free = this->ecclayout->oobfree; free->length; ++free) {
 806                 if (readcol >= lastgap)
 807                         readcol += free->offset - lastgap;
 808                 if (readend >= lastgap)
 809                         readend += free->offset - lastgap;
 810                 lastgap = free->offset + free->length;
 811         }
 812         this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
 813         for (free = this->ecclayout->oobfree; free->length; ++free) {
 814                 int free_end = free->offset + free->length;
 815                 if (free->offset < readend && free_end > readcol) {
 816                         int st = max_t(int,free->offset,readcol);
 817                         int ed = min_t(int,free_end,readend);
 818                         int n = ed - st;
 819                         memcpy(buf, oob_buf + st, n);
 820                         buf += n;
 821                 }
 822         }
 823         return 0;
 824 }
 825
 826 /**
 827  * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
 828  * @param mtd           MTD device structure
 829  * @param from          offset to read from
 830  * @param len           number of bytes to read
 831  * @param retlen        pointer to variable to store the number of read bytes
 832  * @param buf           the databuffer to put data
 833  * @param mode          operation mode
 834  *
 835  * OneNAND read out-of-band data from the spare area
 836  */
 837 int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
 838                         size_t *retlen, u_char *buf, mtd_oob_mode_t mode)
 839 {
 840         struct onenand_chip *this = mtd->priv;
 841         int read = 0, thislen, column, oobsize;
 842         int ret = 0;
 843
 844         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 845
 846         /* Initialize return length value */
 847         *retlen = 0;
 848
 849         if (mode == MTD_OOB_AUTO)
 850                 oobsize = this->ecclayout->oobavail;
 851         else
 852                 oobsize = mtd->oobsize;
 853
 854         column = from & (mtd->oobsize - 1);
 855
 856         if (unlikely(column >= oobsize)) {
 857                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempted to start read outside oob\n");
 858                 return -EINVAL;
 859         }
 860
 861         /* Do not allow reads past end of device */
 862         if (unlikely(from >= mtd->size ||
 863                      column + len > ((mtd->size >> this->page_shift) -
 864                                      (from >> this->page_shift)) * oobsize)) {
 865                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempted to read beyond end of device\n");
 866                 return -EINVAL;
 867         }
 868
 869         /* Grab the lock and see if the device is available */
 870         onenand_get_device(mtd, FL_READING);
 871
 872         while (read < len) {
 873                 cond_resched();
 874
 875                 thislen = oobsize - column;
 876                 thislen = min_t(int, thislen, len);
 877
 878                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
 879
 880                 onenand_update_bufferram(mtd, from, 0);
 881
 882                 ret = this->wait(mtd, FL_READING);
 883                 /* First copy data and check return value for ECC handling */
 884
 885                 if (mode == MTD_OOB_AUTO)
 886                         onenand_transfer_auto_oob(mtd, buf, column, thislen);
 887                 else
 888                         this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
 889
 890                 if (ret) {
 891                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = 0x%x\n", ret);
 892                         break;
 893                 }
 894
 895                 read += thislen;
 896
 897                 if (read == len)
 898                         break;
 899
 900                 buf += thislen;
 901
 902                 /* Read more? */
 903                 if (read < len) {
 904                         /* Page size */
 905                         from += mtd->writesize;
 906                         column = 0;
 907                 }
 908         }
 909
 910         /* Deselect and wake up anyone waiting on the device */
 911         onenand_release_device(mtd);
 912
 913         *retlen = read;
 914         return ret;
 915 }
 916
 917 /**
 918  * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
 919  * @mtd:        MTD device structure
 920  * @from:       offset to read from
 921  * @ops:        oob operation description structure
 922  */
 923 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
 924                             struct mtd_oob_ops *ops)
 925 {
 926         switch (ops->mode) {
 927         case MTD_OOB_PLACE:
 928         case MTD_OOB_AUTO:
 929                 break;
 930         case MTD_OOB_RAW:
 931                 /* Not implemented yet */
 932         default:
 933                 return -EINVAL;
 934         }
 935         return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->ooblen,
 936                                    &ops->oobretlen, ops->oobbuf, ops->mode);
 937 }
 938
 939 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
 940 /**
 941  * onenand_verify_oob - [GENERIC] verify the oob contents after a write
 942  * @param mtd           MTD device structure
 943  * @param buf           the databuffer to verify
 944  * @param to            offset to read from
 945  *
 946  */
 947 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
 948 {
 949         struct onenand_chip *this = mtd->priv;
 950         char *readp = this->page_buf + mtd->writesize;
 951         int status, i;
 952
 953         this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
 954         onenand_update_bufferram(mtd, to, 0);
 955         status = this->wait(mtd, FL_READING);
 956         if (status)
 957                 return status;
 958
 959         this->read_bufferram(mtd, ONENAND_SPARERAM, readp, 0, mtd->oobsize);
 960         for(i = 0; i < mtd->oobsize; i++)
 961                 if (buf[i] != 0xFF && buf[i] != readp[i])
 962                         return -EBADMSG;
 963
 964         return 0;
 965 }
 966
 967 /**
 968  * onenand_verify - [GENERIC] verify the chip contents after a write
 969  * @param mtd          MTD device structure
 970  * @param buf          the databuffer to verify
 971  * @param addr         offset to read from
 972  * @param len          number of bytes to read and compare
 973  *
 974  */
 975 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
 976 {
 977         struct onenand_chip *this = mtd->priv;
 978         void __iomem *dataram;
 979         int ret = 0;
 980         int thislen, column;
 981
 982         while (len != 0) {
 983                 thislen = min_t(int, mtd->writesize, len);
 984                 column = addr & (mtd->writesize - 1);
 985                 if (column + thislen > mtd->writesize)
 986                         thislen = mtd->writesize - column;
 987
 988                 this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
 989
 990                 onenand_update_bufferram(mtd, addr, 0);
 991
 992                 ret = this->wait(mtd, FL_READING);
 993                 if (ret)
 994                         return ret;
 995
 996                 onenand_update_bufferram(mtd, addr, 1);
 997
 998                 dataram = this->base + ONENAND_DATARAM;
 999                 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1000
1001                 if (memcmp(buf, dataram + column, thislen))
1002                         return -EBADMSG;
1003
1004                 len -= thislen;
1005                 buf += thislen;
1006                 addr += thislen;
1007         }
1008
1009         return 0;
1010 }
1011 #else
1012 #define onenand_verify(...)             (0)
1013 #define onenand_verify_oob(...)         (0)
1014 #endif
1015
1016 #define NOTALIGNED(x)   ((x & (this->subpagesize - 1)) != 0)
1017
1018 /**
1019  * onenand_write - [MTD Interface] write buffer to FLASH
1020  * @param mtd           MTD device structure
1021  * @param to            offset to write to
1022  * @param len           number of bytes to write
1023  * @param retlen        pointer to variable to store the number of written bytes
1024  * @param buf           the data to write
1025  *
1026  * Write with ECC
1027  */
1028 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1029         size_t *retlen, const u_char *buf)
1030 {
1031         struct onenand_chip *this = mtd->priv;
1032         int written = 0;
1033         int ret = 0;
1034         int column, subpage;
1035
1036         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1037
1038         /* Initialize retlen, in case of early exit */
1039         *retlen = 0;
1040
1041         /* Do not allow writes past end of device */
1042         if (unlikely((to + len) > mtd->size)) {
1043                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt write to past end of device\n");
1044                 return -EINVAL;
1045         }
1046
1047         /* Reject writes, which are not page aligned */
1048         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
1049                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt to write not page aligned data\n");
1050                 return -EINVAL;
1051         }
1052
1053         column = to & (mtd->writesize - 1);
1054         subpage = column || (len & (mtd->writesize - 1));
1055
1056         /* Grab the lock and see if the device is available */
1057         onenand_get_device(mtd, FL_WRITING);
1058
1059         /* Loop until all data write */
1060         while (written < len) {
1061                 int bytes = mtd->writesize;
1062                 int thislen = min_t(int, bytes, len - written);
1063                 u_char *wbuf = (u_char *) buf;
1064
1065                 cond_resched();
1066
1067                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, bytes);
1068
1069                 /* Partial page write */
1070                 if (subpage) {
1071                         bytes = min_t(int, bytes - column, (int) len);
1072                         memset(this->page_buf, 0xff, mtd->writesize);
1073                         memcpy(this->page_buf + column, buf, bytes);
1074                         wbuf = this->page_buf;
1075                         /* Even though partial write, we need page size */
1076                         thislen = mtd->writesize;
1077                 }
1078
1079                 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, thislen);
1080                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1081
1082                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1083
1084                 /* In partial page write we don't update bufferram */
1085                 onenand_update_bufferram(mtd, to, !subpage);
1086
1087                 ret = this->wait(mtd, FL_WRITING);
1088                 if (ret) {
1089                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: write filaed %d\n", ret);
1090                         break;
1091                 }
1092
1093                 /* Only check verify write turn on */
1094                 ret = onenand_verify(mtd, (u_char *) wbuf, to, thislen);
1095                 if (ret) {
1096                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: verify failed %d\n", ret);
1097                         break;
1098                 }
1099
1100                 written += thislen;
1101                 if (written == len)
1102                         break;
1103
1104                 column = 0;
1105                 to += thislen;
1106                 buf += thislen;
1107         }
1108
1109         /* Deselect and wake up anyone waiting on the device */
1110         onenand_release_device(mtd);
1111
1112         *retlen = written;
1113
1114         return ret;
1115 }
1116
1117 /**
1118  * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1119  * @param mtd           MTD device structure
1120  * @param oob_buf       oob buffer
1121  * @param buf           source address
1122  * @param column        oob offset to write to
1123  * @param thislen       oob length to write
1124  */
1125 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1126                                   const u_char *buf, int column, int thislen)
1127 {
1128         struct onenand_chip *this = mtd->priv;
1129         struct nand_oobfree *free;
1130         int writecol = column;
1131         int writeend = column + thislen;
1132         int lastgap = 0;
1133
1134         for (free = this->ecclayout->oobfree; free->length; ++free) {
1135                 if (writecol >= lastgap)
1136                         writecol += free->offset - lastgap;
1137                 if (writeend >= lastgap)
1138                         writeend += free->offset - lastgap;
1139                 lastgap = free->offset + free->length;
1140         }
1141         for (free = this->ecclayout->oobfree; free->length; ++free) {
1142                 int free_end = free->offset + free->length;
1143                 if (free->offset < writeend && free_end > writecol) {
1144                         int st = max_t(int,free->offset,writecol);
1145                         int ed = min_t(int,free_end,writeend);
1146                         int n = ed - st;
1147                         memcpy(oob_buf + st, buf, n);
1148                         buf += n;
1149                 }
1150         }
1151         return 0;
1152 }
1153
1154 /**
1155  * onenand_do_write_oob - [Internal] OneNAND write out-of-band
1156  * @param mtd           MTD device structure
1157  * @param to            offset to write to
1158  * @param len           number of bytes to write
1159  * @param retlen        pointer to variable to store the number of written bytes
1160  * @param buf           the data to write
1161  * @param mode          operation mode
1162  *
1163  * OneNAND write out-of-band
1164  */
1165 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
1166                                 size_t *retlen, const u_char *buf, mtd_oob_mode_t mode)
1167 {
1168         struct onenand_chip *this = mtd->priv;
1169         int column, ret = 0, oobsize;
1170         int written = 0;
1171
1172         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1173
1174         /* Initialize retlen, in case of early exit */
1175         *retlen = 0;
1176
1177         if (mode == MTD_OOB_AUTO)
1178                 oobsize = this->ecclayout->oobavail;
1179         else
1180                 oobsize = mtd->oobsize;
1181
1182         column = to & (mtd->oobsize - 1);
1183
1184         if (unlikely(column >= oobsize)) {
1185                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempted to start write outside oob\n");
1186                 return -EINVAL;
1187         }
1188
1189         /* For compatibility with NAND: Do not allow write past end of page */
1190         if (column + len > oobsize) {
1191                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: "
1192                       "Attempt to write past end of page\n");
1193                 return -EINVAL;
1194         }
1195
1196         /* Do not allow reads past end of device */
1197         if (unlikely(to >= mtd->size ||
1198                      column + len > ((mtd->size >> this->page_shift) -
1199                                      (to >> this->page_shift)) * oobsize)) {
1200                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempted to write past end of device\n");
1201                 return -EINVAL;
1202         }
1203
1204         /* Grab the lock and see if the device is available */
1205         onenand_get_device(mtd, FL_WRITING);
1206
1207         /* Loop until all data write */
1208         while (written < len) {
1209                 int thislen = min_t(int, oobsize, len - written);
1210
1211                 cond_resched();
1212
1213                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1214
1215                 /* We send data to spare ram with oobsize
1216                  * to prevent byte access */
1217                 memset(this->page_buf, 0xff, mtd->oobsize);
1218                 if (mode == MTD_OOB_AUTO)
1219                         onenand_fill_auto_oob(mtd, this->page_buf, buf, column, thislen);
1220                 else
1221                         memcpy(this->page_buf + column, buf, thislen);
1222                 this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
1223
1224                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1225
1226                 onenand_update_bufferram(mtd, to, 0);
1227
1228                 ret = this->wait(mtd, FL_WRITING);
1229                 if (ret) {
1230                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: write failed %d\n", ret);
1231                         break;
1232                 }
1233
1234                 ret = onenand_verify_oob(mtd, this->page_buf, to);
1235                 if (ret) {
1236                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: verify failed %d\n", ret);
1237                         break;
1238                 }
1239
1240                 written += thislen;
1241                 if (written == len)
1242                         break;
1243
1244                 to += mtd->writesize;
1245                 buf += thislen;
1246                 column = 0;
1247         }
1248
1249         /* Deselect and wake up anyone waiting on the device */
1250         onenand_release_device(mtd);
1251
1252         *retlen = written;
1253
1254         return ret;
1255 }
1256
1257 /**
1258  * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1259  * @mtd:        MTD device structure
1260  * @from:       offset to read from
1261  * @ops:        oob operation description structure
1262  */
1263 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1264                              struct mtd_oob_ops *ops)
1265 {
1266         switch (ops->mode) {
1267         case MTD_OOB_PLACE:
1268         case MTD_OOB_AUTO:
1269                 break;
1270         case MTD_OOB_RAW:
1271                 /* Not implemented yet */
1272         default:
1273                 return -EINVAL;
1274         }
1275         return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->ooblen,
1276                                     &ops->oobretlen, ops->oobbuf, ops->mode);
1277 }
1278
1279 /**
1280  * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1281  * @param mtd           MTD device structure
1282  * @param ofs           offset from device start
1283  * @param getchip       0, if the chip is already selected
1284  * @param allowbbt      1, if its allowed to access the bbt area
1285  *
1286  * Check, if the block is bad. Either by reading the bad block table or
1287  * calling of the scan function.
1288  */
1289 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1290 {
1291         struct onenand_chip *this = mtd->priv;
1292         struct bbm_info *bbm = this->bbm;
1293
1294         /* Return info from the table */
1295         return bbm->isbad_bbt(mtd, ofs, allowbbt);
1296 }
1297
1298 /**
1299  * onenand_erase - [MTD Interface] erase block(s)
1300  * @param mtd           MTD device structure
1301  * @param instr         erase instruction
1302  *
1303  * Erase one ore more blocks
1304  */
1305 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1306 {
1307         struct onenand_chip *this = mtd->priv;
1308         unsigned int block_size;
1309         loff_t addr;
1310         int len;
1311         int ret = 0;
1312
1313         DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1314
1315         block_size = (1 << this->erase_shift);
1316
1317         /* Start address must align on block boundary */
1318         if (unlikely(instr->addr & (block_size - 1))) {
1319                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
1320                 return -EINVAL;
1321         }
1322
1323         /* Length must align on block boundary */
1324         if (unlikely(instr->len & (block_size - 1))) {
1325                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
1326                 return -EINVAL;
1327         }
1328
1329         /* Do not allow erase past end of device */
1330         if (unlikely((instr->len + instr->addr) > mtd->size)) {
1331                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
1332                 return -EINVAL;
1333         }
1334
1335         instr->fail_addr = 0xffffffff;
1336
1337         /* Grab the lock and see if the device is available */
1338         onenand_get_device(mtd, FL_ERASING);
1339
1340         /* Loop throught the pages */
1341         len = instr->len;
1342         addr = instr->addr;
1343
1344         instr->state = MTD_ERASING;
1345
1346         while (len) {
1347                 cond_resched();
1348
1349                 /* Check if we have a bad block, we do not erase bad blocks */
1350                 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1351                         printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1352                         instr->state = MTD_ERASE_FAILED;
1353                         goto erase_exit;
1354                 }
1355
1356                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1357
1358                 ret = this->wait(mtd, FL_ERASING);
1359                 /* Check, if it is write protected */
1360                 if (ret) {
1361                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1362                         instr->state = MTD_ERASE_FAILED;
1363                         instr->fail_addr = addr;
1364                         goto erase_exit;
1365                 }
1366
1367                 len -= block_size;
1368                 addr += block_size;
1369         }
1370
1371         instr->state = MTD_ERASE_DONE;
1372
1373 erase_exit:
1374
1375         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1376         /* Do call back function */
1377         if (!ret)
1378                 mtd_erase_callback(instr);
1379
1380         /* Deselect and wake up anyone waiting on the device */
1381         onenand_release_device(mtd);
1382
1383         return ret;
1384 }
1385
1386 /**
1387  * onenand_sync - [MTD Interface] sync
1388  * @param mtd           MTD device structure
1389  *
1390  * Sync is actually a wait for chip ready function
1391  */
1392 static void onenand_sync(struct mtd_info *mtd)
1393 {
1394         DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1395
1396         /* Grab the lock and see if the device is available */
1397         onenand_get_device(mtd, FL_SYNCING);
1398
1399         /* Release it and go back */
1400         onenand_release_device(mtd);
1401 }
1402
1403 /**
1404  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1405  * @param mtd           MTD device structure
1406  * @param ofs           offset relative to mtd start
1407  *
1408  * Check whether the block is bad
1409  */
1410 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1411 {
1412         /* Check for invalid offset */
1413         if (ofs > mtd->size)
1414                 return -EINVAL;
1415
1416         return onenand_block_checkbad(mtd, ofs, 1, 0);
1417 }
1418
1419 /**
1420  * onenand_default_block_markbad - [DEFAULT] mark a block bad
1421  * @param mtd           MTD device structure
1422  * @param ofs           offset from device start
1423  *
1424  * This is the default implementation, which can be overridden by
1425  * a hardware specific driver.
1426  */
1427 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1428 {
1429         struct onenand_chip *this = mtd->priv;
1430         struct bbm_info *bbm = this->bbm;
1431         u_char buf[2] = {0, 0};
1432         size_t retlen;
1433         int block;
1434
1435         /* Get block number */
1436         block = ((int) ofs) >> bbm->bbt_erase_shift;
1437         if (bbm->bbt)
1438                 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1439
1440         /* We write two bytes, so we dont have to mess with 16 bit access */
1441         ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1442         return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf, MTD_OOB_PLACE);
1443 }
1444
1445 /**
1446  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1447  * @param mtd           MTD device structure
1448  * @param ofs           offset relative to mtd start
1449  *
1450  * Mark the block as bad
1451  */
1452 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1453 {
1454         struct onenand_chip *this = mtd->priv;
1455         int ret;
1456
1457         ret = onenand_block_isbad(mtd, ofs);
1458         if (ret) {
1459                 /* If it was bad already, return success and do nothing */
1460                 if (ret > 0)
1461                         return 0;
1462                 return ret;
1463         }
1464
1465         return this->block_markbad(mtd, ofs);
1466 }
1467
1468 /**
1469  * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1470  * @param mtd           MTD device structure
1471  * @param ofs           offset relative to mtd start
1472  * @param len           number of bytes to lock or unlock
1473  *
1474  * Lock or unlock one or more blocks
1475  */
1476 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1477 {
1478         struct onenand_chip *this = mtd->priv;
1479         int start, end, block, value, status;
1480         int wp_status_mask;
1481
1482         start = ofs >> this->erase_shift;
1483         end = len >> this->erase_shift;
1484
1485         if (cmd == ONENAND_CMD_LOCK)
1486                 wp_status_mask = ONENAND_WP_LS;
1487         else
1488                 wp_status_mask = ONENAND_WP_US;
1489
1490         /* Continuous lock scheme */
1491         if (this->options & ONENAND_HAS_CONT_LOCK) {
1492                 /* Set start block address */
1493                 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1494                 /* Set end block address */
1495                 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1496                 /* Write lock command */
1497                 this->command(mtd, cmd, 0, 0);
1498
1499                 /* There's no return value */
1500                 this->wait(mtd, FL_LOCKING);
1501
1502                 /* Sanity check */
1503                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1504                     & ONENAND_CTRL_ONGO)
1505                         continue;
1506
1507                 /* Check lock status */
1508                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1509                 if (!(status & wp_status_mask))
1510                         printk(KERN_ERR "wp status = 0x%x\n", status);
1511
1512                 return 0;
1513         }
1514
1515         /* Block lock scheme */
1516         for (block = start; block < start + end; block++) {
1517                 /* Set block address */
1518                 value = onenand_block_address(this, block);
1519                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1520                 /* Select DataRAM for DDP */
1521                 value = onenand_bufferram_address(this, block);
1522                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1523                 /* Set start block address */
1524                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1525                 /* Write lock command */
1526                 this->command(mtd, cmd, 0, 0);
1527
1528                 /* There's no return value */
1529                 this->wait(mtd, FL_LOCKING);
1530
1531                 /* Sanity check */
1532                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1533                     & ONENAND_CTRL_ONGO)
1534                         continue;
1535
1536                 /* Check lock status */
1537                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1538                 if (!(status & wp_status_mask))
1539                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1540         }
1541
1542         return 0;
1543 }
1544
1545 /**
1546  * onenand_lock - [MTD Interface] Lock block(s)
1547  * @param mtd           MTD device structure
1548  * @param ofs           offset relative to mtd start
1549  * @param len           number of bytes to unlock
1550  *
1551  * Lock one or more blocks
1552  */
1553 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1554 {
1555         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1556 }
1557
1558 /**
1559  * onenand_unlock - [MTD Interface] Unlock block(s)
1560  * @param mtd           MTD device structure
1561  * @param ofs           offset relative to mtd start
1562  * @param len           number of bytes to unlock
1563  *
1564  * Unlock one or more blocks
1565  */
1566 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1567 {
1568         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1569 }
1570
1571 /**
1572  * onenand_check_lock_status - [OneNAND Interface] Check lock status
1573  * @param this          onenand chip data structure
1574  *
1575  * Check lock status
1576  */
1577 static void onenand_check_lock_status(struct onenand_chip *this)
1578 {
1579         unsigned int value, block, status;
1580         unsigned int end;
1581
1582         end = this->chipsize >> this->erase_shift;
1583         for (block = 0; block < end; block++) {
1584                 /* Set block address */
1585                 value = onenand_block_address(this, block);
1586                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1587                 /* Select DataRAM for DDP */
1588                 value = onenand_bufferram_address(this, block);
1589                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1590                 /* Set start block address */
1591                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1592
1593                 /* Check lock status */
1594                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1595                 if (!(status & ONENAND_WP_US))
1596                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1597         }
1598 }
1599
1600 /**
1601  * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1602  * @param mtd           MTD device structure
1603  *
1604  * Unlock all blocks
1605  */
1606 static int onenand_unlock_all(struct mtd_info *mtd)
1607 {
1608         struct onenand_chip *this = mtd->priv;
1609
1610         if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1611                 /* Set start block address */
1612                 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1613                 /* Write unlock command */
1614                 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1615
1616                 /* There's no return value */
1617                 this->wait(mtd, FL_LOCKING);
1618
1619                 /* Sanity check */
1620                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1621                     & ONENAND_CTRL_ONGO)
1622                         continue;
1623
1624                 /* Workaround for all block unlock in DDP */
1625                 if (ONENAND_IS_DDP(this)) {
1626                         /* 1st block on another chip */
1627                         loff_t ofs = this->chipsize >> 1;
1628                         size_t len = mtd->erasesize;
1629
1630                         onenand_unlock(mtd, ofs, len);
1631                 }
1632
1633                 onenand_check_lock_status(this);
1634
1635                 return 0;
1636         }
1637
1638         onenand_unlock(mtd, 0x0, this->chipsize);
1639
1640         return 0;
1641 }
1642
1643 #ifdef CONFIG_MTD_ONENAND_OTP
1644
1645 /* Interal OTP operation */
1646 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1647                 size_t *retlen, u_char *buf);
1648
1649 /**
1650  * do_otp_read - [DEFAULT] Read OTP block area
1651  * @param mtd           MTD device structure
1652  * @param from          The offset to read
1653  * @param len           number of bytes to read
1654  * @param retlen        pointer to variable to store the number of readbytes
1655  * @param buf           the databuffer to put/get data
1656  *
1657  * Read OTP block area.
1658  */
1659 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1660                 size_t *retlen, u_char *buf)
1661 {
1662         struct onenand_chip *this = mtd->priv;
1663         int ret;
1664
1665         /* Enter OTP access mode */
1666         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1667         this->wait(mtd, FL_OTPING);
1668
1669         ret = mtd->read(mtd, from, len, retlen, buf);
1670
1671         /* Exit OTP access mode */
1672         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1673         this->wait(mtd, FL_RESETING);
1674
1675         return ret;
1676 }
1677
1678 /**
1679  * do_otp_write - [DEFAULT] Write OTP block area
1680  * @param mtd           MTD device structure
1681  * @param from          The offset to write
1682  * @param len           number of bytes to write
1683  * @param retlen        pointer to variable to store the number of write bytes
1684  * @param buf           the databuffer to put/get data
1685  *
1686  * Write OTP block area.
1687  */
1688 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1689                 size_t *retlen, u_char *buf)
1690 {
1691         struct onenand_chip *this = mtd->priv;
1692         unsigned char *pbuf = buf;
1693         int ret;
1694
1695         /* Force buffer page aligned */
1696         if (len < mtd->writesize) {
1697                 memcpy(this->page_buf, buf, len);
1698                 memset(this->page_buf + len, 0xff, mtd->writesize - len);
1699                 pbuf = this->page_buf;
1700                 len = mtd->writesize;
1701         }
1702
1703         /* Enter OTP access mode */
1704         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1705         this->wait(mtd, FL_OTPING);
1706
1707         ret = mtd->write(mtd, from, len, retlen, pbuf);
1708
1709         /* Exit OTP access mode */
1710         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1711         this->wait(mtd, FL_RESETING);
1712
1713         return ret;
1714 }
1715
1716 /**
1717  * do_otp_lock - [DEFAULT] Lock OTP block area
1718  * @param mtd           MTD device structure
1719  * @param from          The offset to lock
1720  * @param len           number of bytes to lock
1721  * @param retlen        pointer to variable to store the number of lock bytes
1722  * @param buf           the databuffer to put/get data
1723  *
1724  * Lock OTP block area.
1725  */
1726 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1727                 size_t *retlen, u_char *buf)
1728 {
1729         struct onenand_chip *this = mtd->priv;
1730         int ret;
1731
1732         /* Enter OTP access mode */
1733         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1734         this->wait(mtd, FL_OTPING);
1735
1736         ret = onenand_do_write_oob(mtd, from, len, retlen, buf, MTD_OOB_PLACE);
1737
1738         /* Exit OTP access mode */
1739         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1740         this->wait(mtd, FL_RESETING);
1741
1742         return ret;
1743 }
1744
1745 /**
1746  * onenand_otp_walk - [DEFAULT] Handle OTP operation
1747  * @param mtd           MTD device structure
1748  * @param from          The offset to read/write
1749  * @param len           number of bytes to read/write
1750  * @param retlen        pointer to variable to store the number of read bytes
1751  * @param buf           the databuffer to put/get data
1752  * @param action        do given action
1753  * @param mode          specify user and factory
1754  *
1755  * Handle OTP operation.
1756  */
1757 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1758                         size_t *retlen, u_char *buf,
1759                         otp_op_t action, int mode)
1760 {
1761         struct onenand_chip *this = mtd->priv;
1762         int otp_pages;
1763         int density;
1764         int ret = 0;
1765
1766         *retlen = 0;
1767
1768         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1769         if (density < ONENAND_DEVICE_DENSITY_512Mb)
1770                 otp_pages = 20;
1771         else
1772                 otp_pages = 10;
1773
1774         if (mode == MTD_OTP_FACTORY) {
1775                 from += mtd->writesize * otp_pages;
1776                 otp_pages = 64 - otp_pages;
1777         }
1778
1779         /* Check User/Factory boundary */
1780         if (((mtd->writesize * otp_pages) - (from + len)) < 0)
1781                 return 0;
1782
1783         while (len > 0 && otp_pages > 0) {
1784                 if (!action) {  /* OTP Info functions */
1785                         struct otp_info *otpinfo;
1786
1787                         len -= sizeof(struct otp_info);
1788                         if (len <= 0)
1789                                 return -ENOSPC;
1790
1791                         otpinfo = (struct otp_info *) buf;
1792                         otpinfo->start = from;
1793                         otpinfo->length = mtd->writesize;
1794                         otpinfo->locked = 0;
1795
1796                         from += mtd->writesize;
1797                         buf += sizeof(struct otp_info);
1798                         *retlen += sizeof(struct otp_info);
1799                 } else {
1800                         size_t tmp_retlen;
1801                         int size = len;
1802
1803                         ret = action(mtd, from, len, &tmp_retlen, buf);
1804
1805                         buf += size;
1806                         len -= size;
1807                         *retlen += size;
1808
1809                         if (ret < 0)
1810                                 return ret;
1811                 }
1812                 otp_pages--;
1813         }
1814
1815         return 0;
1816 }
1817
1818 /**
1819  * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
1820  * @param mtd           MTD device structure
1821  * @param buf           the databuffer to put/get data
1822  * @param len           number of bytes to read
1823  *
1824  * Read factory OTP info.
1825  */
1826 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
1827                         struct otp_info *buf, size_t len)
1828 {
1829         size_t retlen;
1830         int ret;
1831
1832         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
1833
1834         return ret ? : retlen;
1835 }
1836
1837 /**
1838  * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
1839  * @param mtd           MTD device structure
1840  * @param from          The offset to read
1841  * @param len           number of bytes to read
1842  * @param retlen        pointer to variable to store the number of read bytes
1843  * @param buf           the databuffer to put/get data
1844  *
1845  * Read factory OTP area.
1846  */
1847 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
1848                         size_t len, size_t *retlen, u_char *buf)
1849 {
1850         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
1851 }
1852
1853 /**
1854  * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
1855  * @param mtd           MTD device structure
1856  * @param buf           the databuffer to put/get data
1857  * @param len           number of bytes to read
1858  *
1859  * Read user OTP info.
1860  */
1861 static int onenand_get_user_prot_info(struct mtd_info *mtd,
1862                         struct otp_info *buf, size_t len)
1863 {
1864         size_t retlen;
1865         int ret;
1866
1867         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
1868
1869         return ret ? : retlen;
1870 }
1871
1872 /**
1873  * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
1874  * @param mtd           MTD device structure
1875  * @param from          The offset to read
1876  * @param len           number of bytes to read
1877  * @param retlen        pointer to variable to store the number of read bytes
1878  * @param buf           the databuffer to put/get data
1879  *
1880  * Read user OTP area.
1881  */
1882 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
1883                         size_t len, size_t *retlen, u_char *buf)
1884 {
1885         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
1886 }
1887
1888 /**
1889  * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
1890  * @param mtd           MTD device structure
1891  * @param from          The offset to write
1892  * @param len           number of bytes to write
1893  * @param retlen        pointer to variable to store the number of write bytes
1894  * @param buf           the databuffer to put/get data
1895  *
1896  * Write user OTP area.
1897  */
1898 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
1899                         size_t len, size_t *retlen, u_char *buf)
1900 {
1901         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
1902 }
1903
1904 /**
1905  * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
1906  * @param mtd           MTD device structure
1907  * @param from          The offset to lock
1908  * @param len           number of bytes to unlock
1909  *
1910  * Write lock mark on spare area in page 0 in OTP block
1911  */
1912 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
1913                         size_t len)
1914 {
1915         unsigned char oob_buf[64];
1916         size_t retlen;
1917         int ret;
1918
1919         memset(oob_buf, 0xff, mtd->oobsize);
1920         /*
1921          * Note: OTP lock operation
1922          *       OTP block : 0xXXFC
1923          *       1st block : 0xXXF3 (If chip support)
1924          *       Both      : 0xXXF0 (If chip support)
1925          */
1926         oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
1927
1928         /*
1929          * Write lock mark to 8th word of sector0 of page0 of the spare0.
1930          * We write 16 bytes spare area instead of 2 bytes.
1931          */
1932         from = 0;
1933         len = 16;
1934
1935         ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
1936
1937         return ret ? : retlen;
1938 }
1939 #endif  /* CONFIG_MTD_ONENAND_OTP */
1940
1941 /**
1942  * onenand_check_features - Check and set OneNAND features
1943  * @param mtd           MTD data structure
1944  *
1945  * Check and set OneNAND features
1946  * - lock scheme
1947  */
1948 static void onenand_check_features(struct mtd_info *mtd)
1949 {
1950         struct onenand_chip *this = mtd->priv;
1951         unsigned int density, process;
1952
1953         /* Lock scheme depends on density and process */
1954         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1955         process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
1956
1957         /* Lock scheme */
1958         if (density >= ONENAND_DEVICE_DENSITY_1Gb) {
1959                 /* A-Die has all block unlock */
1960                 if (process) {
1961                         printk(KERN_DEBUG "Chip support all block unlock\n");
1962                         this->options |= ONENAND_HAS_UNLOCK_ALL;
1963                 }
1964         } else {
1965                 /* Some OneNAND has continues lock scheme */
1966                 if (!process) {
1967                         printk(KERN_DEBUG "Lock scheme is Continues Lock\n");
1968                         this->options |= ONENAND_HAS_CONT_LOCK;
1969                 }
1970         }
1971 }
1972
1973 /**
1974  * onenand_print_device_info - Print device ID
1975  * @param device        device ID
1976  *
1977  * Print device ID
1978  */
1979 static void onenand_print_device_info(int device, int version)
1980 {
1981         int vcc, demuxed, ddp, density;
1982
1983         vcc = device & ONENAND_DEVICE_VCC_MASK;
1984         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1985         ddp = device & ONENAND_DEVICE_IS_DDP;
1986         density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1987         printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
1988                 demuxed ? "" : "Muxed ",
1989                 ddp ? "(DDP)" : "",
1990                 (16 << density),
1991                 vcc ? "2.65/3.3" : "1.8",
1992                 device);
1993         printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
1994 }
1995
1996 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1997         {ONENAND_MFR_SAMSUNG, "Samsung"},
1998 };
1999
2000 /**
2001  * onenand_check_maf - Check manufacturer ID
2002  * @param manuf         manufacturer ID
2003  *
2004  * Check manufacturer ID
2005  */
2006 static int onenand_check_maf(int manuf)
2007 {
2008         int size = ARRAY_SIZE(onenand_manuf_ids);
2009         char *name;
2010         int i;
2011
2012         for (i = 0; i < size; i++)
2013                 if (manuf == onenand_manuf_ids[i].id)
2014                         break;
2015
2016         if (i < size)
2017                 name = onenand_manuf_ids[i].name;
2018         else
2019                 name = "Unknown";
2020
2021         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
2022
2023         return (i == size);
2024 }
2025
2026 /**
2027  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
2028  * @param mtd           MTD device structure
2029  *
2030  * OneNAND detection method:
2031  *   Compare the the values from command with ones from register
2032  */
2033 static int onenand_probe(struct mtd_info *mtd)
2034 {
2035         struct onenand_chip *this = mtd->priv;
2036         int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
2037         int density;
2038         int syscfg;
2039
2040         /* Save system configuration 1 */
2041         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
2042         /* Clear Sync. Burst Read mode to read BootRAM */
2043         this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
2044
2045         /* Send the command for reading device ID from BootRAM */
2046         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
2047
2048         /* Read manufacturer and device IDs from BootRAM */
2049         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
2050         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
2051
2052         /* Reset OneNAND to read default register values */
2053         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
2054         /* Wait reset */
2055         this->wait(mtd, FL_RESETING);
2056
2057         /* Restore system configuration 1 */
2058         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2059
2060         /* Check manufacturer ID */
2061         if (onenand_check_maf(bram_maf_id))
2062                 return -ENXIO;
2063
2064         /* Read manufacturer and device IDs from Register */
2065         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
2066         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2067         ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
2068
2069         /* Check OneNAND device */
2070         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
2071                 return -ENXIO;
2072
2073         /* Flash device information */
2074         onenand_print_device_info(dev_id, ver_id);
2075         this->device_id = dev_id;
2076         this->version_id = ver_id;
2077
2078         density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2079         this->chipsize = (16 << density) << 20;
2080         /* Set density mask. it is used for DDP */
2081         if (ONENAND_IS_DDP(this))
2082                 this->density_mask = (1 << (density + 6));
2083         else
2084                 this->density_mask = 0;
2085
2086         /* OneNAND page size & block size */
2087         /* The data buffer size is equal to page size */
2088         mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
2089         mtd->oobsize = mtd->writesize >> 5;
2090         /* Pages per a block are always 64 in OneNAND */
2091         mtd->erasesize = mtd->writesize << 6;
2092
2093         this->erase_shift = ffs(mtd->erasesize) - 1;
2094         this->page_shift = ffs(mtd->writesize) - 1;
2095         this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
2096
2097         /* REVIST: Multichip handling */
2098
2099         mtd->size = this->chipsize;
2100
2101         /* Check OneNAND features */
2102         onenand_check_features(mtd);
2103
2104         return 0;
2105 }
2106
2107 /**
2108  * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
2109  * @param mtd           MTD device structure
2110  */
2111 static int onenand_suspend(struct mtd_info *mtd)
2112 {
2113         return onenand_get_device(mtd, FL_PM_SUSPENDED);
2114 }
2115
2116 /**
2117  * onenand_resume - [MTD Interface] Resume the OneNAND flash
2118  * @param mtd           MTD device structure
2119  */
2120 static void onenand_resume(struct mtd_info *mtd)
2121 {
2122         struct onenand_chip *this = mtd->priv;
2123
2124         if (this->state == FL_PM_SUSPENDED)
2125                 onenand_release_device(mtd);
2126         else
2127                 printk(KERN_ERR "resume() called for the chip which is not"
2128                                 "in suspended state\n");
2129 }
2130
2131 /**
2132  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2133  * @param mtd           MTD device structure
2134  * @param maxchips      Number of chips to scan for
2135  *
2136  * This fills out all the not initialized function pointers
2137  * with the defaults.
2138  * The flash ID is read and the mtd/chip structures are
2139  * filled with the appropriate values.
2140  */
2141 int onenand_scan(struct mtd_info *mtd, int maxchips)
2142 {
2143         int i;
2144         struct onenand_chip *this = mtd->priv;
2145
2146         if (!this->read_word)
2147                 this->read_word = onenand_readw;
2148         if (!this->write_word)
2149                 this->write_word = onenand_writew;
2150
2151         if (!this->command)
2152                 this->command = onenand_command;
2153         if (!this->wait)
2154                 onenand_setup_wait(mtd);
2155
2156         if (!this->read_bufferram)
2157                 this->read_bufferram = onenand_read_bufferram;
2158         if (!this->write_bufferram)
2159                 this->write_bufferram = onenand_write_bufferram;
2160
2161         if (!this->block_markbad)
2162                 this->block_markbad = onenand_default_block_markbad;
2163         if (!this->scan_bbt)
2164                 this->scan_bbt = onenand_default_bbt;
2165
2166         if (onenand_probe(mtd))
2167                 return -ENXIO;
2168
2169         /* Set Sync. Burst Read after probing */
2170         if (this->mmcontrol) {
2171                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2172                 this->read_bufferram = onenand_sync_read_bufferram;
2173         }
2174
2175         /* Allocate buffers, if necessary */
2176         if (!this->page_buf) {
2177                 size_t len;
2178                 len = mtd->writesize + mtd->oobsize;
2179                 this->page_buf = kmalloc(len, GFP_KERNEL);
2180                 if (!this->page_buf) {
2181                         printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2182                         return -ENOMEM;
2183                 }
2184                 this->options |= ONENAND_PAGEBUF_ALLOC;
2185         }
2186
2187         this->state = FL_READY;
2188         init_waitqueue_head(&this->wq);
2189         spin_lock_init(&this->chip_lock);
2190
2191         /*
2192          * Allow subpage writes up to oobsize.
2193          */
2194         switch (mtd->oobsize) {
2195         case 64:
2196                 this->ecclayout = &onenand_oob_64;
2197                 mtd->subpage_sft = 2;
2198                 break;
2199
2200         case 32:
2201                 this->ecclayout = &onenand_oob_32;
2202                 mtd->subpage_sft = 1;
2203                 break;
2204
2205         default:
2206                 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2207                         mtd->oobsize);
2208                 mtd->subpage_sft = 0;
2209                 /* To prevent kernel oops */
2210                 this->ecclayout = &onenand_oob_32;
2211                 break;
2212         }
2213
2214         this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2215
2216         /*
2217          * The number of bytes available for a client to place data into
2218          * the out of band area
2219          */
2220         this->ecclayout->oobavail = 0;
2221         for (i = 0; this->ecclayout->oobfree[i].length; i++)
2222                 this->ecclayout->oobavail +=
2223                         this->ecclayout->oobfree[i].length;
2224
2225         mtd->ecclayout = this->ecclayout;
2226
2227         /* Fill in remaining MTD driver data */
2228         mtd->type = MTD_NANDFLASH;
2229         mtd->flags = MTD_CAP_NANDFLASH;
2230         mtd->ecctype = MTD_ECC_SW;
2231         mtd->erase = onenand_erase;
2232         mtd->point = NULL;
2233         mtd->unpoint = NULL;
2234         mtd->read = onenand_read;
2235         mtd->write = onenand_write;
2236         mtd->read_oob = onenand_read_oob;
2237         mtd->write_oob = onenand_write_oob;
2238 #ifdef CONFIG_MTD_ONENAND_OTP
2239         mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2240         mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2241         mtd->get_user_prot_info = onenand_get_user_prot_info;
2242         mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2243         mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2244         mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2245 #endif
2246         mtd->sync = onenand_sync;
2247         mtd->lock = onenand_lock;
2248         mtd->unlock = onenand_unlock;
2249         mtd->suspend = onenand_suspend;
2250         mtd->resume = onenand_resume;
2251         mtd->block_isbad = onenand_block_isbad;
2252         mtd->block_markbad = onenand_block_markbad;
2253         mtd->owner = THIS_MODULE;
2254
2255         /* Unlock whole block */
2256         onenand_unlock_all(mtd);
2257
2258         return this->scan_bbt(mtd);
2259 }
2260
2261 /**
2262  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2263  * @param mtd           MTD device structure
2264  */
2265 void onenand_release(struct mtd_info *mtd)
2266 {
2267         struct onenand_chip *this = mtd->priv;
2268
2269 #ifdef CONFIG_MTD_PARTITIONS
2270         /* Deregister partitions */
2271         del_mtd_partitions (mtd);
2272 #endif
2273         /* Deregister the device */
2274         del_mtd_device (mtd);
2275
2276         /* Free bad block table memory, if allocated */
2277         if (this->bbm) {
2278                 struct bbm_info *bbm = this->bbm;
2279                 kfree(bbm->bbt);
2280                 kfree(this->bbm);
2281         }
2282         /* Buffer allocated by onenand_scan */
2283         if (this->options & ONENAND_PAGEBUF_ALLOC)
2284                 kfree(this->page_buf);
2285 }
2286
2287 EXPORT_SYMBOL_GPL(onenand_scan);
2288 EXPORT_SYMBOL_GPL(onenand_release);
2289
2290 MODULE_LICENSE("GPL");
2291 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2292 MODULE_DESCRIPTION("Generic OneNAND flash driver code");