2 * Copyright (C) 2005 - 2011 Emulex
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@emulex.com
15 * Costa Mesa, CA 92626
21 #include <linux/pci.h>
22 #include <linux/etherdevice.h>
23 #include <linux/version.h>
24 #include <linux/delay.h>
28 #include <linux/if_vlan.h>
29 #include <linux/workqueue.h>
30 #include <linux/interrupt.h>
31 #include <linux/firmware.h>
32 #include <linux/slab.h>
36 #define DRV_VER "4.0.100u"
37 #define DRV_NAME "be2net"
38 #define BE_NAME "ServerEngines BladeEngine2 10Gbps NIC"
39 #define BE3_NAME "ServerEngines BladeEngine3 10Gbps NIC"
40 #define OC_NAME "Emulex OneConnect 10Gbps NIC"
41 #define OC_NAME_BE OC_NAME "(be3)"
42 #define OC_NAME_LANCER OC_NAME "(Lancer)"
43 #define DRV_DESC "ServerEngines BladeEngine 10Gbps NIC Driver"
45 #define BE_VENDOR_ID 0x19a2
46 #define EMULEX_VENDOR_ID 0x10df
47 #define BE_DEVICE_ID1 0x211
48 #define BE_DEVICE_ID2 0x221
49 #define OC_DEVICE_ID1 0x700 /* Device Id for BE2 cards */
50 #define OC_DEVICE_ID2 0x710 /* Device Id for BE3 cards */
51 #define OC_DEVICE_ID3 0xe220 /* Device id for Lancer cards */
52 #define OC_DEVICE_ID4 0xe228 /* Device id for VF in Lancer */
54 static inline char *nic_name(struct pci_dev *pdev)
56 switch (pdev->device) {
63 return OC_NAME_LANCER;
71 /* Number of bytes of an RX frame that are copied to skb->data */
72 #define BE_HDR_LEN ((u16) 64)
73 #define BE_MAX_JUMBO_FRAME_SIZE 9018
74 #define BE_MIN_MTU 256
76 #define BE_NUM_VLANS_SUPPORTED 64
78 #define BE_MAX_TX_FRAG_COUNT 30
80 #define EVNT_Q_LEN 1024
82 #define TX_CQ_LEN 1024
83 #define RX_Q_LEN 1024 /* Does not support any other value */
84 #define RX_CQ_LEN 1024
85 #define MCC_Q_LEN 128 /* total size not to exceed 8 pages */
86 #define MCC_CQ_LEN 256
88 #define MAX_RSS_QS 4 /* BE limit is 4 queues/port */
89 #define MAX_RX_QS (MAX_RSS_QS + 1) /* RSS qs + 1 def Rx */
91 #define BE_MAX_MSIX_VECTORS (MAX_RX_QS + 1)/* RX + TX */
92 #define BE_NAPI_WEIGHT 64
93 #define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */
94 #define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST)
104 struct be_queue_info {
105 struct be_dma_mem dma_mem;
107 u16 entry_size; /* Size of an element in the queue */
111 atomic_t used; /* Number of valid elements in the queue */
114 static inline u32 MODULO(u16 val, u16 limit)
116 BUG_ON(limit & (limit - 1));
117 return val & (limit - 1);
120 static inline void index_adv(u16 *index, u16 val, u16 limit)
122 *index = MODULO((*index + val), limit);
125 static inline void index_inc(u16 *index, u16 limit)
127 *index = MODULO((*index + 1), limit);
130 static inline void *queue_head_node(struct be_queue_info *q)
132 return q->dma_mem.va + q->head * q->entry_size;
135 static inline void *queue_tail_node(struct be_queue_info *q)
137 return q->dma_mem.va + q->tail * q->entry_size;
140 static inline void queue_head_inc(struct be_queue_info *q)
142 index_inc(&q->head, q->len);
145 static inline void queue_tail_inc(struct be_queue_info *q)
147 index_inc(&q->tail, q->len);
151 struct be_queue_info q;
154 /* Adaptive interrupt coalescing (AIC) info */
156 u16 min_eqd; /* in usecs */
157 u16 max_eqd; /* in usecs */
158 u16 cur_eqd; /* in usecs */
161 struct napi_struct napi;
165 struct be_queue_info q;
166 struct be_queue_info cq;
171 u32 be_tx_reqs; /* number of TX requests initiated */
172 u32 be_tx_stops; /* number of times TX Q was stopped */
173 u32 be_tx_wrbs; /* number of tx WRBs used */
174 u32 be_tx_compl; /* number of tx completion entries processed */
177 u64 be_tx_bytes_prev;
183 struct be_queue_info q;
184 struct be_queue_info cq;
185 /* Remember the skbs that were transmitted */
186 struct sk_buff *sent_skb_list[TX_Q_LEN];
187 struct be_tx_stats stats;
190 /* Struct to remember the pages posted for rx frags */
191 struct be_rx_page_info {
193 DEFINE_DMA_UNMAP_ADDR(bus);
199 u32 rx_post_fail;/* number of ethrx buffer alloc failures */
200 u32 rx_polls; /* number of times NAPI called poll function */
201 u32 rx_events; /* number of ucast rx completion events */
202 u32 rx_compl; /* number of rx completion entries processed */
209 u32 rxcp_err; /* Num rx completion entries w/ err set. */
210 ulong rx_fps_jiffies; /* jiffies at last FPS calc */
213 u32 rx_fps; /* Rx frags per second */
216 struct be_rx_compl_info {
236 struct be_adapter *adapter;
237 struct be_queue_info q;
238 struct be_queue_info cq;
239 struct be_rx_compl_info rxcp;
240 struct be_rx_page_info page_info_tbl[RX_Q_LEN];
241 struct be_eq_obj rx_eq;
242 struct be_rx_stats stats;
244 bool rx_post_starved; /* Zero rx frags have been posted to BE */
245 u32 cache_line_barrier[16];
248 struct be_drv_stats {
249 u8 be_on_die_temperature;
252 u64 rx_drops_no_pbuf;
253 u64 rx_drops_no_txpb;
254 u64 rx_drops_no_erx_descr;
255 u64 rx_drops_no_tpre_descr;
256 u64 rx_drops_too_many_frags;
257 u64 rx_drops_invalid_ring;
258 u64 forwarded_packets;
261 u64 rx_alignment_symbol_errors;
263 u64 rx_priority_pause_frames;
264 u64 rx_control_frames;
265 u64 rx_in_range_errors;
266 u64 rx_out_range_errors;
267 u64 rx_frame_too_long;
268 u64 rx_address_match_errors;
269 u64 rx_dropped_too_small;
270 u64 rx_dropped_too_short;
271 u64 rx_dropped_header_too_small;
272 u64 rx_dropped_tcp_length;
274 u64 rx_ip_checksum_errs;
275 u64 rx_tcp_checksum_errs;
276 u64 rx_udp_checksum_errs;
277 u64 rx_switched_unicast_packets;
278 u64 rx_switched_multicast_packets;
279 u64 rx_switched_broadcast_packets;
281 u64 tx_priority_pauseframes;
282 u64 tx_controlframes;
283 u64 rxpp_fifo_overflow_drop;
284 u64 rx_input_fifo_overflow_drop;
285 u64 pmem_fifo_overflow_drop;
290 unsigned char vf_mac_addr[ETH_ALEN];
297 #define BE_INVALID_PMAC_ID 0xffffffff
300 struct pci_dev *pdev;
301 struct net_device *netdev;
304 u8 __iomem *db; /* Door Bell */
305 u8 __iomem *pcicfg; /* PCI config space */
307 struct mutex mbox_lock; /* For serializing mbox cmds to BE card */
308 struct be_dma_mem mbox_mem;
309 /* Mbox mem is adjusted to align to 16 bytes. The allocated addr
310 * is stored for freeing purpose */
311 struct be_dma_mem mbox_mem_alloced;
313 struct be_mcc_obj mcc_obj;
314 spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */
315 spinlock_t mcc_cq_lock;
317 struct msix_entry msix_entries[BE_MAX_MSIX_VECTORS];
322 struct be_eq_obj tx_eq;
323 struct be_tx_obj tx_obj[MAX_TX_QS];
326 u32 cache_line_break[8];
329 struct be_rx_obj rx_obj[MAX_RX_QS];
331 u32 big_page_size; /* Compounded page size shared by rx wrbs */
334 struct be_drv_stats drv_stats;
336 struct vlan_group *vlan_grp;
338 u16 max_vlans; /* Number of vlans supported */
339 u8 vlan_tag[VLAN_N_VID];
340 u8 vlan_prio_bmap; /* Available Priority BitMap */
341 u16 recommended_prio; /* Recommended Priority */
342 struct be_dma_mem mc_cmd_mem;
344 struct be_dma_mem stats_cmd;
345 /* Work queue used to perform periodic tasks like getting statistics */
346 struct delayed_work work;
349 /* Ethtool knobs and info */
350 char fw_ver[FW_VER_LEN];
351 u32 if_handle; /* Used to configure filtering */
352 u32 pmac_id; /* MAC addr handle used by BE card */
353 u32 beacon_state; /* for set_phys_id */
362 u32 rx_fc; /* Rx flow control */
363 u32 tx_fc; /* Tx flow control */
370 u8 generation; /* BladeEngine ASIC generation */
372 struct completion flash_compl;
376 struct be_vf_cfg *vf_cfg;
383 #define be_physfn(adapter) (!adapter->is_virtfn)
385 /* BladeEngine Generation numbers */
389 #define lancer_chip(adapter) ((adapter->pdev->device == OC_DEVICE_ID3) || \
390 (adapter->pdev->device == OC_DEVICE_ID4))
392 extern const struct ethtool_ops be_ethtool_ops;
394 #define msix_enabled(adapter) (adapter->num_msix_vec > 0)
395 #define tx_stats(txo) (&txo->stats)
396 #define rx_stats(rxo) (&rxo->stats)
398 #define BE_SET_NETDEV_OPS(netdev, ops) (netdev->netdev_ops = ops)
400 #define for_all_rx_queues(adapter, rxo, i) \
401 for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs; \
404 /* Just skip the first default non-rss queue */
405 #define for_all_rss_queues(adapter, rxo, i) \
406 for (i = 0, rxo = &adapter->rx_obj[i+1]; i < (adapter->num_rx_qs - 1);\
409 #define for_all_tx_queues(adapter, txo, i) \
410 for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs; \
413 #define PAGE_SHIFT_4K 12
414 #define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
416 /* Returns number of pages spanned by the data starting at the given addr */
417 #define PAGES_4K_SPANNED(_address, size) \
418 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \
419 (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
421 /* Byte offset into the page corresponding to given address */
422 #define OFFSET_IN_PAGE(addr) \
423 ((size_t)(addr) & (PAGE_SIZE_4K-1))
425 /* Returns bit offset within a DWORD of a bitfield */
426 #define AMAP_BIT_OFFSET(_struct, field) \
427 (((size_t)&(((_struct *)0)->field))%32)
429 /* Returns the bit mask of the field that is NOT shifted into location. */
430 static inline u32 amap_mask(u32 bitsize)
432 return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
436 amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
438 u32 *dw = (u32 *) ptr + dw_offset;
439 *dw &= ~(mask << offset);
440 *dw |= (mask & value) << offset;
443 #define AMAP_SET_BITS(_struct, field, ptr, val) \
445 offsetof(_struct, field)/32, \
446 amap_mask(sizeof(((_struct *)0)->field)), \
447 AMAP_BIT_OFFSET(_struct, field), \
450 static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
452 u32 *dw = (u32 *) ptr;
453 return mask & (*(dw + dw_offset) >> offset);
456 #define AMAP_GET_BITS(_struct, field, ptr) \
458 offsetof(_struct, field)/32, \
459 amap_mask(sizeof(((_struct *)0)->field)), \
460 AMAP_BIT_OFFSET(_struct, field))
462 #define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len)
463 #define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len)
464 static inline void swap_dws(void *wrb, int len)
470 *dw = cpu_to_le32(*dw);
474 #endif /* __BIG_ENDIAN */
477 static inline u8 is_tcp_pkt(struct sk_buff *skb)
481 if (ip_hdr(skb)->version == 4)
482 val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
483 else if (ip_hdr(skb)->version == 6)
484 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
489 static inline u8 is_udp_pkt(struct sk_buff *skb)
493 if (ip_hdr(skb)->version == 4)
494 val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
495 else if (ip_hdr(skb)->version == 6)
496 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
501 static inline void be_check_sriov_fn_type(struct be_adapter *adapter)
505 pci_read_config_dword(adapter->pdev, SLI_INTF_REG_OFFSET, &sli_intf);
506 adapter->is_virtfn = (sli_intf & SLI_INTF_FT_MASK) ? 1 : 0;
509 static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac)
513 addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0);
515 mac[5] = (u8)(addr & 0xFF);
516 mac[4] = (u8)((addr >> 8) & 0xFF);
517 mac[3] = (u8)((addr >> 16) & 0xFF);
518 /* Use the OUI from the current MAC address */
519 memcpy(mac, adapter->netdev->dev_addr, 3);
522 static inline bool be_multi_rxq(const struct be_adapter *adapter)
524 return adapter->num_rx_qs > 1;
527 extern void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm,
529 extern void be_link_status_update(struct be_adapter *adapter, bool link_up);
530 extern void netdev_stats_update(struct be_adapter *adapter);
531 extern void be_parse_stats(struct be_adapter *adapter);
532 extern int be_load_fw(struct be_adapter *adapter, u8 *func);