2 * Copyright (C) 2005 - 2011 Emulex
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@emulex.com
15 * Costa Mesa, CA 92626
18 #include <linux/prefetch.h>
21 #include <asm/div64.h>
23 MODULE_VERSION(DRV_VER);
24 MODULE_DEVICE_TABLE(pci, be_dev_ids);
25 MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
26 MODULE_AUTHOR("ServerEngines Corporation");
27 MODULE_LICENSE("GPL");
29 static ushort rx_frag_size = 2048;
30 static unsigned int num_vfs;
31 module_param(rx_frag_size, ushort, S_IRUGO);
32 module_param(num_vfs, uint, S_IRUGO);
33 MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
34 MODULE_PARM_DESC(num_vfs, "Number of PCI VFs to initialize");
36 static bool multi_rxq = true;
37 module_param(multi_rxq, bool, S_IRUGO | S_IWUSR);
38 MODULE_PARM_DESC(multi_rxq, "Multi Rx Queue support. Enabled by default");
40 static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
41 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
42 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
43 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
44 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
45 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID3)},
46 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID4)},
49 MODULE_DEVICE_TABLE(pci, be_dev_ids);
50 /* UE Status Low CSR */
51 static char *ue_status_low_desc[] = {
85 /* UE Status High CSR */
86 static char *ue_status_hi_desc[] = {
121 static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
123 struct be_dma_mem *mem = &q->dma_mem;
125 dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va,
129 static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
130 u16 len, u16 entry_size)
132 struct be_dma_mem *mem = &q->dma_mem;
134 memset(q, 0, sizeof(*q));
136 q->entry_size = entry_size;
137 mem->size = len * entry_size;
138 mem->va = dma_alloc_coherent(&adapter->pdev->dev, mem->size, &mem->dma,
142 memset(mem->va, 0, mem->size);
146 static void be_intr_set(struct be_adapter *adapter, bool enable)
148 u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
149 u32 reg = ioread32(addr);
150 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
152 if (adapter->eeh_err)
155 if (!enabled && enable)
156 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
157 else if (enabled && !enable)
158 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
162 iowrite32(reg, addr);
165 static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
168 val |= qid & DB_RQ_RING_ID_MASK;
169 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
172 iowrite32(val, adapter->db + DB_RQ_OFFSET);
175 static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
178 val |= qid & DB_TXULP_RING_ID_MASK;
179 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
182 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
185 static void be_eq_notify(struct be_adapter *adapter, u16 qid,
186 bool arm, bool clear_int, u16 num_popped)
189 val |= qid & DB_EQ_RING_ID_MASK;
190 val |= ((qid & DB_EQ_RING_ID_EXT_MASK) <<
191 DB_EQ_RING_ID_EXT_MASK_SHIFT);
193 if (adapter->eeh_err)
197 val |= 1 << DB_EQ_REARM_SHIFT;
199 val |= 1 << DB_EQ_CLR_SHIFT;
200 val |= 1 << DB_EQ_EVNT_SHIFT;
201 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
202 iowrite32(val, adapter->db + DB_EQ_OFFSET);
205 void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
208 val |= qid & DB_CQ_RING_ID_MASK;
209 val |= ((qid & DB_CQ_RING_ID_EXT_MASK) <<
210 DB_CQ_RING_ID_EXT_MASK_SHIFT);
212 if (adapter->eeh_err)
216 val |= 1 << DB_CQ_REARM_SHIFT;
217 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
218 iowrite32(val, adapter->db + DB_CQ_OFFSET);
221 static int be_mac_addr_set(struct net_device *netdev, void *p)
223 struct be_adapter *adapter = netdev_priv(netdev);
224 struct sockaddr *addr = p;
227 if (!is_valid_ether_addr(addr->sa_data))
228 return -EADDRNOTAVAIL;
230 /* MAC addr configuration will be done in hardware for VFs
231 * by their corresponding PFs. Just copy to netdev addr here
233 if (!be_physfn(adapter))
236 status = be_cmd_pmac_del(adapter, adapter->if_handle,
237 adapter->pmac_id, 0);
241 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
242 adapter->if_handle, &adapter->pmac_id, 0);
245 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
250 static void populate_be2_stats(struct be_adapter *adapter)
253 struct be_drv_stats *drvs = &adapter->drv_stats;
254 struct be_pmem_stats *pmem_sts = be_pmem_stats_from_cmd(adapter);
255 struct be_port_rxf_stats_v0 *port_stats =
256 be_port_rxf_stats_from_cmd(adapter);
257 struct be_rxf_stats_v0 *rxf_stats =
258 be_rxf_stats_from_cmd(adapter);
260 drvs->rx_pause_frames = port_stats->rx_pause_frames;
261 drvs->rx_crc_errors = port_stats->rx_crc_errors;
262 drvs->rx_control_frames = port_stats->rx_control_frames;
263 drvs->rx_in_range_errors = port_stats->rx_in_range_errors;
264 drvs->rx_frame_too_long = port_stats->rx_frame_too_long;
265 drvs->rx_dropped_runt = port_stats->rx_dropped_runt;
266 drvs->rx_ip_checksum_errs = port_stats->rx_ip_checksum_errs;
267 drvs->rx_tcp_checksum_errs = port_stats->rx_tcp_checksum_errs;
268 drvs->rx_udp_checksum_errs = port_stats->rx_udp_checksum_errs;
269 drvs->rxpp_fifo_overflow_drop = port_stats->rx_fifo_overflow;
270 drvs->rx_dropped_tcp_length = port_stats->rx_dropped_tcp_length;
271 drvs->rx_dropped_too_small = port_stats->rx_dropped_too_small;
272 drvs->rx_dropped_too_short = port_stats->rx_dropped_too_short;
273 drvs->rx_out_range_errors = port_stats->rx_out_range_errors;
274 drvs->rx_input_fifo_overflow_drop =
275 port_stats->rx_input_fifo_overflow;
276 drvs->rx_dropped_header_too_small =
277 port_stats->rx_dropped_header_too_small;
278 drvs->rx_address_match_errors =
279 port_stats->rx_address_match_errors;
280 drvs->rx_alignment_symbol_errors =
281 port_stats->rx_alignment_symbol_errors;
283 drvs->tx_pauseframes = port_stats->tx_pauseframes;
284 drvs->tx_controlframes = port_stats->tx_controlframes;
286 if (adapter->port_num)
287 drvs->jabber_events =
288 rxf_stats->port1_jabber_events;
290 drvs->jabber_events =
291 rxf_stats->port0_jabber_events;
292 drvs->rx_drops_no_pbuf = rxf_stats->rx_drops_no_pbuf;
293 drvs->rx_drops_no_txpb = rxf_stats->rx_drops_no_txpb;
294 drvs->rx_drops_no_erx_descr = rxf_stats->rx_drops_no_erx_descr;
295 drvs->rx_drops_invalid_ring = rxf_stats->rx_drops_invalid_ring;
296 drvs->forwarded_packets = rxf_stats->forwarded_packets;
297 drvs->rx_drops_mtu = rxf_stats->rx_drops_mtu;
298 drvs->rx_drops_no_tpre_descr =
299 rxf_stats->rx_drops_no_tpre_descr;
300 drvs->rx_drops_too_many_frags =
301 rxf_stats->rx_drops_too_many_frags;
302 adapter->drv_stats.eth_red_drops = pmem_sts->eth_red_drops;
305 static void populate_be3_stats(struct be_adapter *adapter)
307 struct be_drv_stats *drvs = &adapter->drv_stats;
308 struct be_pmem_stats *pmem_sts = be_pmem_stats_from_cmd(adapter);
310 struct be_rxf_stats_v1 *rxf_stats =
311 be_rxf_stats_from_cmd(adapter);
312 struct be_port_rxf_stats_v1 *port_stats =
313 be_port_rxf_stats_from_cmd(adapter);
315 drvs->rx_priority_pause_frames = 0;
316 drvs->pmem_fifo_overflow_drop = 0;
317 drvs->rx_pause_frames = port_stats->rx_pause_frames;
318 drvs->rx_crc_errors = port_stats->rx_crc_errors;
319 drvs->rx_control_frames = port_stats->rx_control_frames;
320 drvs->rx_in_range_errors = port_stats->rx_in_range_errors;
321 drvs->rx_frame_too_long = port_stats->rx_frame_too_long;
322 drvs->rx_dropped_runt = port_stats->rx_dropped_runt;
323 drvs->rx_ip_checksum_errs = port_stats->rx_ip_checksum_errs;
324 drvs->rx_tcp_checksum_errs = port_stats->rx_tcp_checksum_errs;
325 drvs->rx_udp_checksum_errs = port_stats->rx_udp_checksum_errs;
326 drvs->rx_dropped_tcp_length = port_stats->rx_dropped_tcp_length;
327 drvs->rx_dropped_too_small = port_stats->rx_dropped_too_small;
328 drvs->rx_dropped_too_short = port_stats->rx_dropped_too_short;
329 drvs->rx_out_range_errors = port_stats->rx_out_range_errors;
330 drvs->rx_dropped_header_too_small =
331 port_stats->rx_dropped_header_too_small;
332 drvs->rx_input_fifo_overflow_drop =
333 port_stats->rx_input_fifo_overflow_drop;
334 drvs->rx_address_match_errors =
335 port_stats->rx_address_match_errors;
336 drvs->rx_alignment_symbol_errors =
337 port_stats->rx_alignment_symbol_errors;
338 drvs->rxpp_fifo_overflow_drop =
339 port_stats->rxpp_fifo_overflow_drop;
340 drvs->tx_pauseframes = port_stats->tx_pauseframes;
341 drvs->tx_controlframes = port_stats->tx_controlframes;
342 drvs->jabber_events = port_stats->jabber_events;
343 drvs->rx_drops_no_pbuf = rxf_stats->rx_drops_no_pbuf;
344 drvs->rx_drops_no_txpb = rxf_stats->rx_drops_no_txpb;
345 drvs->rx_drops_no_erx_descr = rxf_stats->rx_drops_no_erx_descr;
346 drvs->rx_drops_invalid_ring = rxf_stats->rx_drops_invalid_ring;
347 drvs->forwarded_packets = rxf_stats->forwarded_packets;
348 drvs->rx_drops_mtu = rxf_stats->rx_drops_mtu;
349 drvs->rx_drops_no_tpre_descr =
350 rxf_stats->rx_drops_no_tpre_descr;
351 drvs->rx_drops_too_many_frags =
352 rxf_stats->rx_drops_too_many_frags;
353 adapter->drv_stats.eth_red_drops = pmem_sts->eth_red_drops;
356 static void populate_lancer_stats(struct be_adapter *adapter)
359 struct be_drv_stats *drvs = &adapter->drv_stats;
360 struct lancer_cmd_pport_stats *pport_stats = pport_stats_from_cmd
362 drvs->rx_priority_pause_frames = 0;
363 drvs->pmem_fifo_overflow_drop = 0;
364 drvs->rx_pause_frames =
365 make_64bit_val(pport_stats->rx_pause_frames_hi,
366 pport_stats->rx_pause_frames_lo);
367 drvs->rx_crc_errors = make_64bit_val(pport_stats->rx_crc_errors_hi,
368 pport_stats->rx_crc_errors_lo);
369 drvs->rx_control_frames =
370 make_64bit_val(pport_stats->rx_control_frames_hi,
371 pport_stats->rx_control_frames_lo);
372 drvs->rx_in_range_errors = pport_stats->rx_in_range_errors;
373 drvs->rx_frame_too_long =
374 make_64bit_val(pport_stats->rx_internal_mac_errors_hi,
375 pport_stats->rx_frames_too_long_lo);
376 drvs->rx_dropped_runt = pport_stats->rx_dropped_runt;
377 drvs->rx_ip_checksum_errs = pport_stats->rx_ip_checksum_errors;
378 drvs->rx_tcp_checksum_errs = pport_stats->rx_tcp_checksum_errors;
379 drvs->rx_udp_checksum_errs = pport_stats->rx_udp_checksum_errors;
380 drvs->rx_dropped_tcp_length =
381 pport_stats->rx_dropped_invalid_tcp_length;
382 drvs->rx_dropped_too_small = pport_stats->rx_dropped_too_small;
383 drvs->rx_dropped_too_short = pport_stats->rx_dropped_too_short;
384 drvs->rx_out_range_errors = pport_stats->rx_out_of_range_errors;
385 drvs->rx_dropped_header_too_small =
386 pport_stats->rx_dropped_header_too_small;
387 drvs->rx_input_fifo_overflow_drop = pport_stats->rx_fifo_overflow;
388 drvs->rx_address_match_errors = pport_stats->rx_address_match_errors;
389 drvs->rx_alignment_symbol_errors =
390 make_64bit_val(pport_stats->rx_symbol_errors_hi,
391 pport_stats->rx_symbol_errors_lo);
392 drvs->rxpp_fifo_overflow_drop = pport_stats->rx_fifo_overflow;
393 drvs->tx_pauseframes = make_64bit_val(pport_stats->tx_pause_frames_hi,
394 pport_stats->tx_pause_frames_lo);
395 drvs->tx_controlframes =
396 make_64bit_val(pport_stats->tx_control_frames_hi,
397 pport_stats->tx_control_frames_lo);
398 drvs->jabber_events = pport_stats->rx_jabbers;
399 drvs->rx_drops_no_pbuf = 0;
400 drvs->rx_drops_no_txpb = 0;
401 drvs->rx_drops_no_erx_descr = 0;
402 drvs->rx_drops_invalid_ring = pport_stats->rx_drops_invalid_queue;
403 drvs->forwarded_packets = make_64bit_val(pport_stats->num_forwards_hi,
404 pport_stats->num_forwards_lo);
405 drvs->rx_drops_mtu = make_64bit_val(pport_stats->rx_drops_mtu_hi,
406 pport_stats->rx_drops_mtu_lo);
407 drvs->rx_drops_no_tpre_descr = 0;
408 drvs->rx_drops_too_many_frags =
409 make_64bit_val(pport_stats->rx_drops_too_many_frags_hi,
410 pport_stats->rx_drops_too_many_frags_lo);
413 void be_parse_stats(struct be_adapter *adapter)
415 if (adapter->generation == BE_GEN3) {
416 if (lancer_chip(adapter))
417 populate_lancer_stats(adapter);
419 populate_be3_stats(adapter);
421 populate_be2_stats(adapter);
425 void netdev_stats_update(struct be_adapter *adapter)
427 struct be_drv_stats *drvs = &adapter->drv_stats;
428 struct net_device_stats *dev_stats = &adapter->netdev->stats;
429 struct be_rx_obj *rxo;
430 struct be_tx_obj *txo;
433 memset(dev_stats, 0, sizeof(*dev_stats));
434 for_all_rx_queues(adapter, rxo, i) {
435 dev_stats->rx_packets += rx_stats(rxo)->rx_pkts;
436 dev_stats->rx_bytes += rx_stats(rxo)->rx_bytes;
437 dev_stats->multicast += rx_stats(rxo)->rx_mcast_pkts;
438 /* no space in linux buffers: best possible approximation */
439 if (adapter->generation == BE_GEN3) {
440 if (!(lancer_chip(adapter))) {
441 struct be_erx_stats_v1 *erx_stats =
442 be_erx_stats_from_cmd(adapter);
443 dev_stats->rx_dropped +=
444 erx_stats->rx_drops_no_fragments[rxo->q.id];
447 struct be_erx_stats_v0 *erx_stats =
448 be_erx_stats_from_cmd(adapter);
449 dev_stats->rx_dropped +=
450 erx_stats->rx_drops_no_fragments[rxo->q.id];
454 for_all_tx_queues(adapter, txo, i) {
455 dev_stats->tx_packets += tx_stats(txo)->be_tx_pkts;
456 dev_stats->tx_bytes += tx_stats(txo)->be_tx_bytes;
459 /* bad pkts received */
460 dev_stats->rx_errors = drvs->rx_crc_errors +
461 drvs->rx_alignment_symbol_errors +
462 drvs->rx_in_range_errors +
463 drvs->rx_out_range_errors +
464 drvs->rx_frame_too_long +
465 drvs->rx_dropped_too_small +
466 drvs->rx_dropped_too_short +
467 drvs->rx_dropped_header_too_small +
468 drvs->rx_dropped_tcp_length +
469 drvs->rx_dropped_runt +
470 drvs->rx_tcp_checksum_errs +
471 drvs->rx_ip_checksum_errs +
472 drvs->rx_udp_checksum_errs;
474 /* detailed rx errors */
475 dev_stats->rx_length_errors = drvs->rx_in_range_errors +
476 drvs->rx_out_range_errors +
477 drvs->rx_frame_too_long;
479 dev_stats->rx_crc_errors = drvs->rx_crc_errors;
481 /* frame alignment errors */
482 dev_stats->rx_frame_errors = drvs->rx_alignment_symbol_errors;
484 /* receiver fifo overrun */
485 /* drops_no_pbuf is no per i/f, it's per BE card */
486 dev_stats->rx_fifo_errors = drvs->rxpp_fifo_overflow_drop +
487 drvs->rx_input_fifo_overflow_drop +
488 drvs->rx_drops_no_pbuf;
491 void be_link_status_update(struct be_adapter *adapter, bool link_up)
493 struct net_device *netdev = adapter->netdev;
495 /* If link came up or went down */
496 if (adapter->link_up != link_up) {
497 adapter->link_speed = -1;
499 netif_carrier_on(netdev);
500 printk(KERN_INFO "%s: Link up\n", netdev->name);
502 netif_carrier_off(netdev);
503 printk(KERN_INFO "%s: Link down\n", netdev->name);
505 adapter->link_up = link_up;
509 /* Update the EQ delay n BE based on the RX frags consumed / sec */
510 static void be_rx_eqd_update(struct be_adapter *adapter, struct be_rx_obj *rxo)
512 struct be_eq_obj *rx_eq = &rxo->rx_eq;
513 struct be_rx_stats *stats = &rxo->stats;
517 if (!rx_eq->enable_aic)
521 if (time_before(now, stats->rx_fps_jiffies)) {
522 stats->rx_fps_jiffies = now;
526 /* Update once a second */
527 if ((now - stats->rx_fps_jiffies) < HZ)
530 stats->rx_fps = (stats->rx_frags - stats->prev_rx_frags) /
531 ((now - stats->rx_fps_jiffies) / HZ);
533 stats->rx_fps_jiffies = now;
534 stats->prev_rx_frags = stats->rx_frags;
535 eqd = stats->rx_fps / 110000;
537 if (eqd > rx_eq->max_eqd)
538 eqd = rx_eq->max_eqd;
539 if (eqd < rx_eq->min_eqd)
540 eqd = rx_eq->min_eqd;
543 if (eqd != rx_eq->cur_eqd)
544 be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
546 rx_eq->cur_eqd = eqd;
549 static u32 be_calc_rate(u64 bytes, unsigned long ticks)
553 do_div(rate, ticks / HZ);
554 rate <<= 3; /* bytes/sec -> bits/sec */
555 do_div(rate, 1000000ul); /* MB/Sec */
560 static void be_tx_rate_update(struct be_tx_obj *txo)
562 struct be_tx_stats *stats = tx_stats(txo);
565 /* Wrapped around? */
566 if (time_before(now, stats->be_tx_jiffies)) {
567 stats->be_tx_jiffies = now;
571 /* Update tx rate once in two seconds */
572 if ((now - stats->be_tx_jiffies) > 2 * HZ) {
573 stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
574 - stats->be_tx_bytes_prev,
575 now - stats->be_tx_jiffies);
576 stats->be_tx_jiffies = now;
577 stats->be_tx_bytes_prev = stats->be_tx_bytes;
581 static void be_tx_stats_update(struct be_tx_obj *txo,
582 u32 wrb_cnt, u32 copied, u32 gso_segs, bool stopped)
584 struct be_tx_stats *stats = tx_stats(txo);
587 stats->be_tx_wrbs += wrb_cnt;
588 stats->be_tx_bytes += copied;
589 stats->be_tx_pkts += (gso_segs ? gso_segs : 1);
591 stats->be_tx_stops++;
594 /* Determine number of WRB entries needed to xmit data in an skb */
595 static u32 wrb_cnt_for_skb(struct be_adapter *adapter, struct sk_buff *skb,
598 int cnt = (skb->len > skb->data_len);
600 cnt += skb_shinfo(skb)->nr_frags;
602 /* to account for hdr wrb */
604 if (lancer_chip(adapter) || !(cnt & 1)) {
607 /* add a dummy to make it an even num */
611 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
615 static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
617 wrb->frag_pa_hi = upper_32_bits(addr);
618 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
619 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
622 static void wrb_fill_hdr(struct be_adapter *adapter, struct be_eth_hdr_wrb *hdr,
623 struct sk_buff *skb, u32 wrb_cnt, u32 len)
628 memset(hdr, 0, sizeof(*hdr));
630 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
632 if (skb_is_gso(skb)) {
633 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
634 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
635 hdr, skb_shinfo(skb)->gso_size);
636 if (skb_is_gso_v6(skb) && !lancer_chip(adapter))
637 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso6, hdr, 1);
638 if (lancer_chip(adapter) && adapter->sli_family ==
639 LANCER_A0_SLI_FAMILY) {
640 AMAP_SET_BITS(struct amap_eth_hdr_wrb, ipcs, hdr, 1);
642 AMAP_SET_BITS(struct amap_eth_hdr_wrb,
644 else if (is_udp_pkt(skb))
645 AMAP_SET_BITS(struct amap_eth_hdr_wrb,
648 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
650 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
651 else if (is_udp_pkt(skb))
652 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
655 if (adapter->vlan_grp && vlan_tx_tag_present(skb)) {
656 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
657 vlan_tag = vlan_tx_tag_get(skb);
658 vlan_prio = (vlan_tag & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
659 /* If vlan priority provided by OS is NOT in available bmap */
660 if (!(adapter->vlan_prio_bmap & (1 << vlan_prio)))
661 vlan_tag = (vlan_tag & ~VLAN_PRIO_MASK) |
662 adapter->recommended_prio;
663 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag, hdr, vlan_tag);
666 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
667 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
668 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
669 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
672 static void unmap_tx_frag(struct device *dev, struct be_eth_wrb *wrb,
677 be_dws_le_to_cpu(wrb, sizeof(*wrb));
679 dma = (u64)wrb->frag_pa_hi << 32 | (u64)wrb->frag_pa_lo;
682 dma_unmap_single(dev, dma, wrb->frag_len,
685 dma_unmap_page(dev, dma, wrb->frag_len, DMA_TO_DEVICE);
689 static int make_tx_wrbs(struct be_adapter *adapter, struct be_queue_info *txq,
690 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
694 struct device *dev = &adapter->pdev->dev;
695 struct sk_buff *first_skb = skb;
696 struct be_eth_wrb *wrb;
697 struct be_eth_hdr_wrb *hdr;
698 bool map_single = false;
701 hdr = queue_head_node(txq);
703 map_head = txq->head;
705 if (skb->len > skb->data_len) {
706 int len = skb_headlen(skb);
707 busaddr = dma_map_single(dev, skb->data, len, DMA_TO_DEVICE);
708 if (dma_mapping_error(dev, busaddr))
711 wrb = queue_head_node(txq);
712 wrb_fill(wrb, busaddr, len);
713 be_dws_cpu_to_le(wrb, sizeof(*wrb));
718 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
719 struct skb_frag_struct *frag =
720 &skb_shinfo(skb)->frags[i];
721 busaddr = dma_map_page(dev, frag->page, frag->page_offset,
722 frag->size, DMA_TO_DEVICE);
723 if (dma_mapping_error(dev, busaddr))
725 wrb = queue_head_node(txq);
726 wrb_fill(wrb, busaddr, frag->size);
727 be_dws_cpu_to_le(wrb, sizeof(*wrb));
729 copied += frag->size;
733 wrb = queue_head_node(txq);
735 be_dws_cpu_to_le(wrb, sizeof(*wrb));
739 wrb_fill_hdr(adapter, hdr, first_skb, wrb_cnt, copied);
740 be_dws_cpu_to_le(hdr, sizeof(*hdr));
744 txq->head = map_head;
746 wrb = queue_head_node(txq);
747 unmap_tx_frag(dev, wrb, map_single);
749 copied -= wrb->frag_len;
755 static netdev_tx_t be_xmit(struct sk_buff *skb,
756 struct net_device *netdev)
758 struct be_adapter *adapter = netdev_priv(netdev);
759 struct be_tx_obj *txo = &adapter->tx_obj[skb_get_queue_mapping(skb)];
760 struct be_queue_info *txq = &txo->q;
761 u32 wrb_cnt = 0, copied = 0;
762 u32 start = txq->head;
763 bool dummy_wrb, stopped = false;
765 wrb_cnt = wrb_cnt_for_skb(adapter, skb, &dummy_wrb);
767 copied = make_tx_wrbs(adapter, txq, skb, wrb_cnt, dummy_wrb);
769 /* record the sent skb in the sent_skb table */
770 BUG_ON(txo->sent_skb_list[start]);
771 txo->sent_skb_list[start] = skb;
773 /* Ensure txq has space for the next skb; Else stop the queue
774 * *BEFORE* ringing the tx doorbell, so that we serialze the
775 * tx compls of the current transmit which'll wake up the queue
777 atomic_add(wrb_cnt, &txq->used);
778 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
780 netif_stop_subqueue(netdev, skb_get_queue_mapping(skb));
784 be_txq_notify(adapter, txq->id, wrb_cnt);
786 be_tx_stats_update(txo, wrb_cnt, copied,
787 skb_shinfo(skb)->gso_segs, stopped);
790 dev_kfree_skb_any(skb);
795 static int be_change_mtu(struct net_device *netdev, int new_mtu)
797 struct be_adapter *adapter = netdev_priv(netdev);
798 if (new_mtu < BE_MIN_MTU ||
799 new_mtu > (BE_MAX_JUMBO_FRAME_SIZE -
800 (ETH_HLEN + ETH_FCS_LEN))) {
801 dev_info(&adapter->pdev->dev,
802 "MTU must be between %d and %d bytes\n",
804 (BE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN)));
807 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
808 netdev->mtu, new_mtu);
809 netdev->mtu = new_mtu;
814 * A max of 64 (BE_NUM_VLANS_SUPPORTED) vlans can be configured in BE.
815 * If the user configures more, place BE in vlan promiscuous mode.
817 static int be_vid_config(struct be_adapter *adapter, bool vf, u32 vf_num)
819 u16 vtag[BE_NUM_VLANS_SUPPORTED];
825 if_handle = adapter->vf_cfg[vf_num].vf_if_handle;
826 vtag[0] = cpu_to_le16(adapter->vf_cfg[vf_num].vf_vlan_tag);
827 status = be_cmd_vlan_config(adapter, if_handle, vtag, 1, 1, 0);
830 if (adapter->vlans_added <= adapter->max_vlans) {
831 /* Construct VLAN Table to give to HW */
832 for (i = 0; i < VLAN_N_VID; i++) {
833 if (adapter->vlan_tag[i]) {
834 vtag[ntags] = cpu_to_le16(i);
838 status = be_cmd_vlan_config(adapter, adapter->if_handle,
841 status = be_cmd_vlan_config(adapter, adapter->if_handle,
848 static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
850 struct be_adapter *adapter = netdev_priv(netdev);
852 adapter->vlan_grp = grp;
855 static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
857 struct be_adapter *adapter = netdev_priv(netdev);
859 adapter->vlans_added++;
860 if (!be_physfn(adapter))
863 adapter->vlan_tag[vid] = 1;
864 if (adapter->vlans_added <= (adapter->max_vlans + 1))
865 be_vid_config(adapter, false, 0);
868 static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
870 struct be_adapter *adapter = netdev_priv(netdev);
872 adapter->vlans_added--;
873 vlan_group_set_device(adapter->vlan_grp, vid, NULL);
875 if (!be_physfn(adapter))
878 adapter->vlan_tag[vid] = 0;
879 if (adapter->vlans_added <= adapter->max_vlans)
880 be_vid_config(adapter, false, 0);
883 static void be_set_multicast_list(struct net_device *netdev)
885 struct be_adapter *adapter = netdev_priv(netdev);
887 if (netdev->flags & IFF_PROMISC) {
888 be_cmd_promiscuous_config(adapter, true);
889 adapter->promiscuous = true;
893 /* BE was previously in promiscuous mode; disable it */
894 if (adapter->promiscuous) {
895 adapter->promiscuous = false;
896 be_cmd_promiscuous_config(adapter, false);
899 /* Enable multicast promisc if num configured exceeds what we support */
900 if (netdev->flags & IFF_ALLMULTI ||
901 netdev_mc_count(netdev) > BE_MAX_MC) {
902 be_cmd_multicast_set(adapter, adapter->if_handle, NULL,
903 &adapter->mc_cmd_mem);
907 be_cmd_multicast_set(adapter, adapter->if_handle, netdev,
908 &adapter->mc_cmd_mem);
913 static int be_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
915 struct be_adapter *adapter = netdev_priv(netdev);
918 if (!adapter->sriov_enabled)
921 if (!is_valid_ether_addr(mac) || (vf >= num_vfs))
924 if (adapter->vf_cfg[vf].vf_pmac_id != BE_INVALID_PMAC_ID)
925 status = be_cmd_pmac_del(adapter,
926 adapter->vf_cfg[vf].vf_if_handle,
927 adapter->vf_cfg[vf].vf_pmac_id, vf + 1);
929 status = be_cmd_pmac_add(adapter, mac,
930 adapter->vf_cfg[vf].vf_if_handle,
931 &adapter->vf_cfg[vf].vf_pmac_id, vf + 1);
934 dev_err(&adapter->pdev->dev, "MAC %pM set on VF %d Failed\n",
937 memcpy(adapter->vf_cfg[vf].vf_mac_addr, mac, ETH_ALEN);
942 static int be_get_vf_config(struct net_device *netdev, int vf,
943 struct ifla_vf_info *vi)
945 struct be_adapter *adapter = netdev_priv(netdev);
947 if (!adapter->sriov_enabled)
954 vi->tx_rate = adapter->vf_cfg[vf].vf_tx_rate;
955 vi->vlan = adapter->vf_cfg[vf].vf_vlan_tag;
957 memcpy(&vi->mac, adapter->vf_cfg[vf].vf_mac_addr, ETH_ALEN);
962 static int be_set_vf_vlan(struct net_device *netdev,
963 int vf, u16 vlan, u8 qos)
965 struct be_adapter *adapter = netdev_priv(netdev);
968 if (!adapter->sriov_enabled)
971 if ((vf >= num_vfs) || (vlan > 4095))
975 adapter->vf_cfg[vf].vf_vlan_tag = vlan;
976 adapter->vlans_added++;
978 adapter->vf_cfg[vf].vf_vlan_tag = 0;
979 adapter->vlans_added--;
982 status = be_vid_config(adapter, true, vf);
985 dev_info(&adapter->pdev->dev,
986 "VLAN %d config on VF %d failed\n", vlan, vf);
990 static int be_set_vf_tx_rate(struct net_device *netdev,
993 struct be_adapter *adapter = netdev_priv(netdev);
996 if (!adapter->sriov_enabled)
999 if ((vf >= num_vfs) || (rate < 0))
1005 adapter->vf_cfg[vf].vf_tx_rate = rate;
1006 status = be_cmd_set_qos(adapter, rate / 10, vf + 1);
1009 dev_info(&adapter->pdev->dev,
1010 "tx rate %d on VF %d failed\n", rate, vf);
1014 static void be_rx_rate_update(struct be_rx_obj *rxo)
1016 struct be_rx_stats *stats = &rxo->stats;
1017 ulong now = jiffies;
1019 /* Wrapped around */
1020 if (time_before(now, stats->rx_jiffies)) {
1021 stats->rx_jiffies = now;
1025 /* Update the rate once in two seconds */
1026 if ((now - stats->rx_jiffies) < 2 * HZ)
1029 stats->rx_rate = be_calc_rate(stats->rx_bytes - stats->rx_bytes_prev,
1030 now - stats->rx_jiffies);
1031 stats->rx_jiffies = now;
1032 stats->rx_bytes_prev = stats->rx_bytes;
1035 static void be_rx_stats_update(struct be_rx_obj *rxo,
1036 struct be_rx_compl_info *rxcp)
1038 struct be_rx_stats *stats = &rxo->stats;
1041 stats->rx_frags += rxcp->num_rcvd;
1042 stats->rx_bytes += rxcp->pkt_size;
1044 if (rxcp->pkt_type == BE_MULTICAST_PACKET)
1045 stats->rx_mcast_pkts++;
1050 static inline bool csum_passed(struct be_rx_compl_info *rxcp)
1052 /* L4 checksum is not reliable for non TCP/UDP packets.
1053 * Also ignore ipcksm for ipv6 pkts */
1054 return (rxcp->tcpf || rxcp->udpf) && rxcp->l4_csum &&
1055 (rxcp->ip_csum || rxcp->ipv6);
1058 static struct be_rx_page_info *
1059 get_rx_page_info(struct be_adapter *adapter,
1060 struct be_rx_obj *rxo,
1063 struct be_rx_page_info *rx_page_info;
1064 struct be_queue_info *rxq = &rxo->q;
1066 rx_page_info = &rxo->page_info_tbl[frag_idx];
1067 BUG_ON(!rx_page_info->page);
1069 if (rx_page_info->last_page_user) {
1070 dma_unmap_page(&adapter->pdev->dev,
1071 dma_unmap_addr(rx_page_info, bus),
1072 adapter->big_page_size, DMA_FROM_DEVICE);
1073 rx_page_info->last_page_user = false;
1076 atomic_dec(&rxq->used);
1077 return rx_page_info;
1080 /* Throwaway the data in the Rx completion */
1081 static void be_rx_compl_discard(struct be_adapter *adapter,
1082 struct be_rx_obj *rxo,
1083 struct be_rx_compl_info *rxcp)
1085 struct be_queue_info *rxq = &rxo->q;
1086 struct be_rx_page_info *page_info;
1087 u16 i, num_rcvd = rxcp->num_rcvd;
1089 for (i = 0; i < num_rcvd; i++) {
1090 page_info = get_rx_page_info(adapter, rxo, rxcp->rxq_idx);
1091 put_page(page_info->page);
1092 memset(page_info, 0, sizeof(*page_info));
1093 index_inc(&rxcp->rxq_idx, rxq->len);
1098 * skb_fill_rx_data forms a complete skb for an ether frame
1099 * indicated by rxcp.
1101 static void skb_fill_rx_data(struct be_adapter *adapter, struct be_rx_obj *rxo,
1102 struct sk_buff *skb, struct be_rx_compl_info *rxcp)
1104 struct be_queue_info *rxq = &rxo->q;
1105 struct be_rx_page_info *page_info;
1107 u16 hdr_len, curr_frag_len, remaining;
1110 page_info = get_rx_page_info(adapter, rxo, rxcp->rxq_idx);
1111 start = page_address(page_info->page) + page_info->page_offset;
1114 /* Copy data in the first descriptor of this completion */
1115 curr_frag_len = min(rxcp->pkt_size, rx_frag_size);
1117 /* Copy the header portion into skb_data */
1118 hdr_len = min(BE_HDR_LEN, curr_frag_len);
1119 memcpy(skb->data, start, hdr_len);
1120 skb->len = curr_frag_len;
1121 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
1122 /* Complete packet has now been moved to data */
1123 put_page(page_info->page);
1125 skb->tail += curr_frag_len;
1127 skb_shinfo(skb)->nr_frags = 1;
1128 skb_shinfo(skb)->frags[0].page = page_info->page;
1129 skb_shinfo(skb)->frags[0].page_offset =
1130 page_info->page_offset + hdr_len;
1131 skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
1132 skb->data_len = curr_frag_len - hdr_len;
1133 skb->tail += hdr_len;
1135 page_info->page = NULL;
1137 if (rxcp->pkt_size <= rx_frag_size) {
1138 BUG_ON(rxcp->num_rcvd != 1);
1142 /* More frags present for this completion */
1143 index_inc(&rxcp->rxq_idx, rxq->len);
1144 remaining = rxcp->pkt_size - curr_frag_len;
1145 for (i = 1, j = 0; i < rxcp->num_rcvd; i++) {
1146 page_info = get_rx_page_info(adapter, rxo, rxcp->rxq_idx);
1147 curr_frag_len = min(remaining, rx_frag_size);
1149 /* Coalesce all frags from the same physical page in one slot */
1150 if (page_info->page_offset == 0) {
1153 skb_shinfo(skb)->frags[j].page = page_info->page;
1154 skb_shinfo(skb)->frags[j].page_offset =
1155 page_info->page_offset;
1156 skb_shinfo(skb)->frags[j].size = 0;
1157 skb_shinfo(skb)->nr_frags++;
1159 put_page(page_info->page);
1162 skb_shinfo(skb)->frags[j].size += curr_frag_len;
1163 skb->len += curr_frag_len;
1164 skb->data_len += curr_frag_len;
1166 remaining -= curr_frag_len;
1167 index_inc(&rxcp->rxq_idx, rxq->len);
1168 page_info->page = NULL;
1170 BUG_ON(j > MAX_SKB_FRAGS);
1173 /* Process the RX completion indicated by rxcp when GRO is disabled */
1174 static void be_rx_compl_process(struct be_adapter *adapter,
1175 struct be_rx_obj *rxo,
1176 struct be_rx_compl_info *rxcp)
1178 struct net_device *netdev = adapter->netdev;
1179 struct sk_buff *skb;
1181 skb = netdev_alloc_skb_ip_align(netdev, BE_HDR_LEN);
1182 if (unlikely(!skb)) {
1183 if (net_ratelimit())
1184 dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
1185 be_rx_compl_discard(adapter, rxo, rxcp);
1189 skb_fill_rx_data(adapter, rxo, skb, rxcp);
1191 if (likely((netdev->features & NETIF_F_RXCSUM) && csum_passed(rxcp)))
1192 skb->ip_summed = CHECKSUM_UNNECESSARY;
1194 skb_checksum_none_assert(skb);
1196 skb->truesize = skb->len + sizeof(struct sk_buff);
1197 skb->protocol = eth_type_trans(skb, netdev);
1198 if (adapter->netdev->features & NETIF_F_RXHASH)
1199 skb->rxhash = rxcp->rss_hash;
1202 if (unlikely(rxcp->vlanf)) {
1203 if (!adapter->vlan_grp || adapter->vlans_added == 0) {
1207 vlan_hwaccel_receive_skb(skb, adapter->vlan_grp,
1210 netif_receive_skb(skb);
1214 /* Process the RX completion indicated by rxcp when GRO is enabled */
1215 static void be_rx_compl_process_gro(struct be_adapter *adapter,
1216 struct be_rx_obj *rxo,
1217 struct be_rx_compl_info *rxcp)
1219 struct be_rx_page_info *page_info;
1220 struct sk_buff *skb = NULL;
1221 struct be_queue_info *rxq = &rxo->q;
1222 struct be_eq_obj *eq_obj = &rxo->rx_eq;
1223 u16 remaining, curr_frag_len;
1226 skb = napi_get_frags(&eq_obj->napi);
1228 be_rx_compl_discard(adapter, rxo, rxcp);
1232 remaining = rxcp->pkt_size;
1233 for (i = 0, j = -1; i < rxcp->num_rcvd; i++) {
1234 page_info = get_rx_page_info(adapter, rxo, rxcp->rxq_idx);
1236 curr_frag_len = min(remaining, rx_frag_size);
1238 /* Coalesce all frags from the same physical page in one slot */
1239 if (i == 0 || page_info->page_offset == 0) {
1240 /* First frag or Fresh page */
1242 skb_shinfo(skb)->frags[j].page = page_info->page;
1243 skb_shinfo(skb)->frags[j].page_offset =
1244 page_info->page_offset;
1245 skb_shinfo(skb)->frags[j].size = 0;
1247 put_page(page_info->page);
1249 skb_shinfo(skb)->frags[j].size += curr_frag_len;
1251 remaining -= curr_frag_len;
1252 index_inc(&rxcp->rxq_idx, rxq->len);
1253 memset(page_info, 0, sizeof(*page_info));
1255 BUG_ON(j > MAX_SKB_FRAGS);
1257 skb_shinfo(skb)->nr_frags = j + 1;
1258 skb->len = rxcp->pkt_size;
1259 skb->data_len = rxcp->pkt_size;
1260 skb->truesize += rxcp->pkt_size;
1261 skb->ip_summed = CHECKSUM_UNNECESSARY;
1262 if (adapter->netdev->features & NETIF_F_RXHASH)
1263 skb->rxhash = rxcp->rss_hash;
1265 if (likely(!rxcp->vlanf))
1266 napi_gro_frags(&eq_obj->napi);
1268 vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp,
1272 static void be_parse_rx_compl_v1(struct be_adapter *adapter,
1273 struct be_eth_rx_compl *compl,
1274 struct be_rx_compl_info *rxcp)
1277 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, pktsize, compl);
1278 rxcp->vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, vtp, compl);
1279 rxcp->err = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, err, compl);
1280 rxcp->tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, tcpf, compl);
1281 rxcp->udpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, udpf, compl);
1283 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, ipcksm, compl);
1285 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, l4_cksm, compl);
1287 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, ip_version, compl);
1289 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, fragndx, compl);
1291 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, numfrags, compl);
1293 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, cast_enc, compl);
1295 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, rsshash, rxcp);
1297 rxcp->vtm = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, vtm,
1299 rxcp->vlan_tag = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, vlan_tag,
1304 static void be_parse_rx_compl_v0(struct be_adapter *adapter,
1305 struct be_eth_rx_compl *compl,
1306 struct be_rx_compl_info *rxcp)
1309 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, pktsize, compl);
1310 rxcp->vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, vtp, compl);
1311 rxcp->err = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, err, compl);
1312 rxcp->tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, tcpf, compl);
1313 rxcp->udpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, udpf, compl);
1315 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, ipcksm, compl);
1317 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, l4_cksm, compl);
1319 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, ip_version, compl);
1321 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, fragndx, compl);
1323 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, numfrags, compl);
1325 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, cast_enc, compl);
1327 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, rsshash, rxcp);
1329 rxcp->vtm = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, vtm,
1331 rxcp->vlan_tag = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, vlan_tag,
1336 static struct be_rx_compl_info *be_rx_compl_get(struct be_rx_obj *rxo)
1338 struct be_eth_rx_compl *compl = queue_tail_node(&rxo->cq);
1339 struct be_rx_compl_info *rxcp = &rxo->rxcp;
1340 struct be_adapter *adapter = rxo->adapter;
1342 /* For checking the valid bit it is Ok to use either definition as the
1343 * valid bit is at the same position in both v0 and v1 Rx compl */
1344 if (compl->dw[offsetof(struct amap_eth_rx_compl_v1, valid) / 32] == 0)
1348 be_dws_le_to_cpu(compl, sizeof(*compl));
1350 if (adapter->be3_native)
1351 be_parse_rx_compl_v1(adapter, compl, rxcp);
1353 be_parse_rx_compl_v0(adapter, compl, rxcp);
1356 /* vlanf could be wrongly set in some cards.
1357 * ignore if vtm is not set */
1358 if ((adapter->function_mode & 0x400) && !rxcp->vtm)
1361 if (!lancer_chip(adapter))
1362 rxcp->vlan_tag = swab16(rxcp->vlan_tag);
1364 if (((adapter->pvid & VLAN_VID_MASK) ==
1365 (rxcp->vlan_tag & VLAN_VID_MASK)) &&
1366 !adapter->vlan_tag[rxcp->vlan_tag])
1370 /* As the compl has been parsed, reset it; we wont touch it again */
1371 compl->dw[offsetof(struct amap_eth_rx_compl_v1, valid) / 32] = 0;
1373 queue_tail_inc(&rxo->cq);
1377 static inline struct page *be_alloc_pages(u32 size, gfp_t gfp)
1379 u32 order = get_order(size);
1383 return alloc_pages(gfp, order);
1387 * Allocate a page, split it to fragments of size rx_frag_size and post as
1388 * receive buffers to BE
1390 static void be_post_rx_frags(struct be_rx_obj *rxo, gfp_t gfp)
1392 struct be_adapter *adapter = rxo->adapter;
1393 struct be_rx_page_info *page_info_tbl = rxo->page_info_tbl;
1394 struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
1395 struct be_queue_info *rxq = &rxo->q;
1396 struct page *pagep = NULL;
1397 struct be_eth_rx_d *rxd;
1398 u64 page_dmaaddr = 0, frag_dmaaddr;
1399 u32 posted, page_offset = 0;
1401 page_info = &rxo->page_info_tbl[rxq->head];
1402 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
1404 pagep = be_alloc_pages(adapter->big_page_size, gfp);
1405 if (unlikely(!pagep)) {
1406 rxo->stats.rx_post_fail++;
1409 page_dmaaddr = dma_map_page(&adapter->pdev->dev, pagep,
1410 0, adapter->big_page_size,
1412 page_info->page_offset = 0;
1415 page_info->page_offset = page_offset + rx_frag_size;
1417 page_offset = page_info->page_offset;
1418 page_info->page = pagep;
1419 dma_unmap_addr_set(page_info, bus, page_dmaaddr);
1420 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
1422 rxd = queue_head_node(rxq);
1423 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
1424 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
1426 /* Any space left in the current big page for another frag? */
1427 if ((page_offset + rx_frag_size + rx_frag_size) >
1428 adapter->big_page_size) {
1430 page_info->last_page_user = true;
1433 prev_page_info = page_info;
1434 queue_head_inc(rxq);
1435 page_info = &page_info_tbl[rxq->head];
1438 prev_page_info->last_page_user = true;
1441 atomic_add(posted, &rxq->used);
1442 be_rxq_notify(adapter, rxq->id, posted);
1443 } else if (atomic_read(&rxq->used) == 0) {
1444 /* Let be_worker replenish when memory is available */
1445 rxo->rx_post_starved = true;
1449 static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
1451 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
1453 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
1457 be_dws_le_to_cpu(txcp, sizeof(*txcp));
1459 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
1461 queue_tail_inc(tx_cq);
1465 static u16 be_tx_compl_process(struct be_adapter *adapter,
1466 struct be_tx_obj *txo, u16 last_index)
1468 struct be_queue_info *txq = &txo->q;
1469 struct be_eth_wrb *wrb;
1470 struct sk_buff **sent_skbs = txo->sent_skb_list;
1471 struct sk_buff *sent_skb;
1472 u16 cur_index, num_wrbs = 1; /* account for hdr wrb */
1473 bool unmap_skb_hdr = true;
1475 sent_skb = sent_skbs[txq->tail];
1477 sent_skbs[txq->tail] = NULL;
1479 /* skip header wrb */
1480 queue_tail_inc(txq);
1483 cur_index = txq->tail;
1484 wrb = queue_tail_node(txq);
1485 unmap_tx_frag(&adapter->pdev->dev, wrb,
1486 (unmap_skb_hdr && skb_headlen(sent_skb)));
1487 unmap_skb_hdr = false;
1490 queue_tail_inc(txq);
1491 } while (cur_index != last_index);
1493 kfree_skb(sent_skb);
1497 static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
1499 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1505 eqe->evt = le32_to_cpu(eqe->evt);
1506 queue_tail_inc(&eq_obj->q);
1510 static int event_handle(struct be_adapter *adapter,
1511 struct be_eq_obj *eq_obj,
1514 struct be_eq_entry *eqe;
1517 while ((eqe = event_get(eq_obj)) != NULL) {
1522 /* Deal with any spurious interrupts that come
1528 be_eq_notify(adapter, eq_obj->q.id, rearm, true, num);
1530 napi_schedule(&eq_obj->napi);
1535 /* Just read and notify events without processing them.
1536 * Used at the time of destroying event queues */
1537 static void be_eq_clean(struct be_adapter *adapter,
1538 struct be_eq_obj *eq_obj)
1540 struct be_eq_entry *eqe;
1543 while ((eqe = event_get(eq_obj)) != NULL) {
1549 be_eq_notify(adapter, eq_obj->q.id, false, true, num);
1552 static void be_rx_q_clean(struct be_adapter *adapter, struct be_rx_obj *rxo)
1554 struct be_rx_page_info *page_info;
1555 struct be_queue_info *rxq = &rxo->q;
1556 struct be_queue_info *rx_cq = &rxo->cq;
1557 struct be_rx_compl_info *rxcp;
1560 /* First cleanup pending rx completions */
1561 while ((rxcp = be_rx_compl_get(rxo)) != NULL) {
1562 be_rx_compl_discard(adapter, rxo, rxcp);
1563 be_cq_notify(adapter, rx_cq->id, false, 1);
1566 /* Then free posted rx buffer that were not used */
1567 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
1568 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
1569 page_info = get_rx_page_info(adapter, rxo, tail);
1570 put_page(page_info->page);
1571 memset(page_info, 0, sizeof(*page_info));
1573 BUG_ON(atomic_read(&rxq->used));
1576 static void be_tx_compl_clean(struct be_adapter *adapter,
1577 struct be_tx_obj *txo)
1579 struct be_queue_info *tx_cq = &txo->cq;
1580 struct be_queue_info *txq = &txo->q;
1581 struct be_eth_tx_compl *txcp;
1582 u16 end_idx, cmpl = 0, timeo = 0, num_wrbs = 0;
1583 struct sk_buff **sent_skbs = txo->sent_skb_list;
1584 struct sk_buff *sent_skb;
1587 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1589 while ((txcp = be_tx_compl_get(tx_cq))) {
1590 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1592 num_wrbs += be_tx_compl_process(adapter, txo, end_idx);
1596 be_cq_notify(adapter, tx_cq->id, false, cmpl);
1597 atomic_sub(num_wrbs, &txq->used);
1602 if (atomic_read(&txq->used) == 0 || ++timeo > 200)
1608 if (atomic_read(&txq->used))
1609 dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
1610 atomic_read(&txq->used));
1612 /* free posted tx for which compls will never arrive */
1613 while (atomic_read(&txq->used)) {
1614 sent_skb = sent_skbs[txq->tail];
1615 end_idx = txq->tail;
1617 wrb_cnt_for_skb(adapter, sent_skb, &dummy_wrb) - 1,
1619 num_wrbs = be_tx_compl_process(adapter, txo, end_idx);
1620 atomic_sub(num_wrbs, &txq->used);
1624 static void be_mcc_queues_destroy(struct be_adapter *adapter)
1626 struct be_queue_info *q;
1628 q = &adapter->mcc_obj.q;
1630 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
1631 be_queue_free(adapter, q);
1633 q = &adapter->mcc_obj.cq;
1635 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1636 be_queue_free(adapter, q);
1639 /* Must be called only after TX qs are created as MCC shares TX EQ */
1640 static int be_mcc_queues_create(struct be_adapter *adapter)
1642 struct be_queue_info *q, *cq;
1644 /* Alloc MCC compl queue */
1645 cq = &adapter->mcc_obj.cq;
1646 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
1647 sizeof(struct be_mcc_compl)))
1650 /* Ask BE to create MCC compl queue; share TX's eq */
1651 if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
1654 /* Alloc MCC queue */
1655 q = &adapter->mcc_obj.q;
1656 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1657 goto mcc_cq_destroy;
1659 /* Ask BE to create MCC queue */
1660 if (be_cmd_mccq_create(adapter, q, cq))
1666 be_queue_free(adapter, q);
1668 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1670 be_queue_free(adapter, cq);
1675 static void be_tx_queues_destroy(struct be_adapter *adapter)
1677 struct be_queue_info *q;
1678 struct be_tx_obj *txo;
1681 for_all_tx_queues(adapter, txo, i) {
1684 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
1685 be_queue_free(adapter, q);
1689 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1690 be_queue_free(adapter, q);
1693 /* Clear any residual events */
1694 be_eq_clean(adapter, &adapter->tx_eq);
1696 q = &adapter->tx_eq.q;
1698 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
1699 be_queue_free(adapter, q);
1702 /* One TX event queue is shared by all TX compl qs */
1703 static int be_tx_queues_create(struct be_adapter *adapter)
1705 struct be_queue_info *eq, *q, *cq;
1706 struct be_tx_obj *txo;
1709 adapter->tx_eq.max_eqd = 0;
1710 adapter->tx_eq.min_eqd = 0;
1711 adapter->tx_eq.cur_eqd = 96;
1712 adapter->tx_eq.enable_aic = false;
1714 eq = &adapter->tx_eq.q;
1715 if (be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1716 sizeof(struct be_eq_entry)))
1719 if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
1721 adapter->tx_eq.eq_idx = adapter->eq_next_idx++;
1723 for_all_tx_queues(adapter, txo, i) {
1725 if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
1726 sizeof(struct be_eth_tx_compl)))
1729 if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
1733 if (be_queue_alloc(adapter, q, TX_Q_LEN,
1734 sizeof(struct be_eth_wrb)))
1737 if (be_cmd_txq_create(adapter, q, cq))
1743 be_tx_queues_destroy(adapter);
1747 static void be_rx_queues_destroy(struct be_adapter *adapter)
1749 struct be_queue_info *q;
1750 struct be_rx_obj *rxo;
1753 for_all_rx_queues(adapter, rxo, i) {
1756 be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
1757 /* After the rxq is invalidated, wait for a grace time
1758 * of 1ms for all dma to end and the flush compl to
1762 be_rx_q_clean(adapter, rxo);
1764 be_queue_free(adapter, q);
1768 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1769 be_queue_free(adapter, q);
1771 /* Clear any residual events */
1774 be_eq_clean(adapter, &rxo->rx_eq);
1775 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
1777 be_queue_free(adapter, q);
1781 static u32 be_num_rxqs_want(struct be_adapter *adapter)
1783 if (multi_rxq && (adapter->function_caps & BE_FUNCTION_CAPS_RSS) &&
1784 !adapter->sriov_enabled && !(adapter->function_mode & 0x400)) {
1785 return 1 + MAX_RSS_QS; /* one default non-RSS queue */
1787 dev_warn(&adapter->pdev->dev,
1788 "No support for multiple RX queues\n");
1793 static int be_rx_queues_create(struct be_adapter *adapter)
1795 struct be_queue_info *eq, *q, *cq;
1796 struct be_rx_obj *rxo;
1799 adapter->num_rx_qs = min(be_num_rxqs_want(adapter),
1800 msix_enabled(adapter) ?
1801 adapter->num_msix_vec - 1 : 1);
1802 if (adapter->num_rx_qs != MAX_RX_QS)
1803 dev_warn(&adapter->pdev->dev,
1804 "Can create only %d RX queues", adapter->num_rx_qs);
1806 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1807 for_all_rx_queues(adapter, rxo, i) {
1808 rxo->adapter = adapter;
1809 rxo->rx_eq.max_eqd = BE_MAX_EQD;
1810 rxo->rx_eq.enable_aic = true;
1814 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1815 sizeof(struct be_eq_entry));
1819 rc = be_cmd_eq_create(adapter, eq, rxo->rx_eq.cur_eqd);
1823 rxo->rx_eq.eq_idx = adapter->eq_next_idx++;
1827 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1828 sizeof(struct be_eth_rx_compl));
1832 rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
1837 rc = be_queue_alloc(adapter, q, RX_Q_LEN,
1838 sizeof(struct be_eth_rx_d));
1842 rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
1843 BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle,
1844 (i > 0) ? 1 : 0/* rss enable */, &rxo->rss_id);
1849 if (be_multi_rxq(adapter)) {
1850 u8 rsstable[MAX_RSS_QS];
1852 for_all_rss_queues(adapter, rxo, i)
1853 rsstable[i] = rxo->rss_id;
1855 rc = be_cmd_rss_config(adapter, rsstable,
1856 adapter->num_rx_qs - 1);
1863 be_rx_queues_destroy(adapter);
1867 static bool event_peek(struct be_eq_obj *eq_obj)
1869 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1876 static irqreturn_t be_intx(int irq, void *dev)
1878 struct be_adapter *adapter = dev;
1879 struct be_rx_obj *rxo;
1880 int isr, i, tx = 0 , rx = 0;
1882 if (lancer_chip(adapter)) {
1883 if (event_peek(&adapter->tx_eq))
1884 tx = event_handle(adapter, &adapter->tx_eq, false);
1885 for_all_rx_queues(adapter, rxo, i) {
1886 if (event_peek(&rxo->rx_eq))
1887 rx |= event_handle(adapter, &rxo->rx_eq, true);
1894 isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
1895 (adapter->tx_eq.q.id / 8) * CEV_ISR_SIZE);
1899 if ((1 << adapter->tx_eq.eq_idx & isr))
1900 event_handle(adapter, &adapter->tx_eq, false);
1902 for_all_rx_queues(adapter, rxo, i) {
1903 if ((1 << rxo->rx_eq.eq_idx & isr))
1904 event_handle(adapter, &rxo->rx_eq, true);
1911 static irqreturn_t be_msix_rx(int irq, void *dev)
1913 struct be_rx_obj *rxo = dev;
1914 struct be_adapter *adapter = rxo->adapter;
1916 event_handle(adapter, &rxo->rx_eq, true);
1921 static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
1923 struct be_adapter *adapter = dev;
1925 event_handle(adapter, &adapter->tx_eq, false);
1930 static inline bool do_gro(struct be_rx_compl_info *rxcp)
1932 return (rxcp->tcpf && !rxcp->err) ? true : false;
1935 static int be_poll_rx(struct napi_struct *napi, int budget)
1937 struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
1938 struct be_rx_obj *rxo = container_of(rx_eq, struct be_rx_obj, rx_eq);
1939 struct be_adapter *adapter = rxo->adapter;
1940 struct be_queue_info *rx_cq = &rxo->cq;
1941 struct be_rx_compl_info *rxcp;
1944 rxo->stats.rx_polls++;
1945 for (work_done = 0; work_done < budget; work_done++) {
1946 rxcp = be_rx_compl_get(rxo);
1950 /* Ignore flush completions */
1951 if (rxcp->num_rcvd && rxcp->pkt_size) {
1953 be_rx_compl_process_gro(adapter, rxo, rxcp);
1955 be_rx_compl_process(adapter, rxo, rxcp);
1956 } else if (rxcp->pkt_size == 0) {
1957 be_rx_compl_discard(adapter, rxo, rxcp);
1960 be_rx_stats_update(rxo, rxcp);
1963 /* Refill the queue */
1964 if (atomic_read(&rxo->q.used) < RX_FRAGS_REFILL_WM)
1965 be_post_rx_frags(rxo, GFP_ATOMIC);
1968 if (work_done < budget) {
1969 napi_complete(napi);
1970 be_cq_notify(adapter, rx_cq->id, true, work_done);
1972 /* More to be consumed; continue with interrupts disabled */
1973 be_cq_notify(adapter, rx_cq->id, false, work_done);
1978 /* As TX and MCC share the same EQ check for both TX and MCC completions.
1979 * For TX/MCC we don't honour budget; consume everything
1981 static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
1983 struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
1984 struct be_adapter *adapter =
1985 container_of(tx_eq, struct be_adapter, tx_eq);
1986 struct be_tx_obj *txo;
1987 struct be_eth_tx_compl *txcp;
1988 int tx_compl, mcc_compl, status = 0;
1992 for_all_tx_queues(adapter, txo, i) {
1995 while ((txcp = be_tx_compl_get(&txo->cq))) {
1996 num_wrbs += be_tx_compl_process(adapter, txo,
1997 AMAP_GET_BITS(struct amap_eth_tx_compl,
2002 be_cq_notify(adapter, txo->cq.id, true, tx_compl);
2004 atomic_sub(num_wrbs, &txo->q.used);
2006 /* As Tx wrbs have been freed up, wake up netdev queue
2007 * if it was stopped due to lack of tx wrbs. */
2008 if (__netif_subqueue_stopped(adapter->netdev, i) &&
2009 atomic_read(&txo->q.used) < txo->q.len / 2) {
2010 netif_wake_subqueue(adapter->netdev, i);
2013 adapter->drv_stats.be_tx_events++;
2014 txo->stats.be_tx_compl += tx_compl;
2018 mcc_compl = be_process_mcc(adapter, &status);
2021 struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
2022 be_cq_notify(adapter, mcc_obj->cq.id, true, mcc_compl);
2025 napi_complete(napi);
2027 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
2031 void be_detect_dump_ue(struct be_adapter *adapter)
2033 u32 ue_status_lo, ue_status_hi, ue_status_lo_mask, ue_status_hi_mask;
2036 pci_read_config_dword(adapter->pdev,
2037 PCICFG_UE_STATUS_LOW, &ue_status_lo);
2038 pci_read_config_dword(adapter->pdev,
2039 PCICFG_UE_STATUS_HIGH, &ue_status_hi);
2040 pci_read_config_dword(adapter->pdev,
2041 PCICFG_UE_STATUS_LOW_MASK, &ue_status_lo_mask);
2042 pci_read_config_dword(adapter->pdev,
2043 PCICFG_UE_STATUS_HI_MASK, &ue_status_hi_mask);
2045 ue_status_lo = (ue_status_lo & (~ue_status_lo_mask));
2046 ue_status_hi = (ue_status_hi & (~ue_status_hi_mask));
2048 if (ue_status_lo || ue_status_hi) {
2049 adapter->ue_detected = true;
2050 adapter->eeh_err = true;
2051 dev_err(&adapter->pdev->dev, "UE Detected!!\n");
2055 for (i = 0; ue_status_lo; ue_status_lo >>= 1, i++) {
2056 if (ue_status_lo & 1)
2057 dev_err(&adapter->pdev->dev,
2058 "UE: %s bit set\n", ue_status_low_desc[i]);
2062 for (i = 0; ue_status_hi; ue_status_hi >>= 1, i++) {
2063 if (ue_status_hi & 1)
2064 dev_err(&adapter->pdev->dev,
2065 "UE: %s bit set\n", ue_status_hi_desc[i]);
2071 static void be_worker(struct work_struct *work)
2073 struct be_adapter *adapter =
2074 container_of(work, struct be_adapter, work.work);
2075 struct be_rx_obj *rxo;
2076 struct be_tx_obj *txo;
2079 if (!adapter->ue_detected && !lancer_chip(adapter))
2080 be_detect_dump_ue(adapter);
2082 /* when interrupts are not yet enabled, just reap any pending
2083 * mcc completions */
2084 if (!netif_running(adapter->netdev)) {
2085 int mcc_compl, status = 0;
2087 mcc_compl = be_process_mcc(adapter, &status);
2090 struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
2091 be_cq_notify(adapter, mcc_obj->cq.id, false, mcc_compl);
2097 if (!adapter->stats_cmd_sent) {
2098 if (lancer_chip(adapter))
2099 lancer_cmd_get_pport_stats(adapter,
2100 &adapter->stats_cmd);
2102 be_cmd_get_stats(adapter, &adapter->stats_cmd);
2105 for_all_tx_queues(adapter, txo, i)
2106 be_tx_rate_update(txo);
2108 for_all_rx_queues(adapter, rxo, i) {
2109 be_rx_rate_update(rxo);
2110 be_rx_eqd_update(adapter, rxo);
2112 if (rxo->rx_post_starved) {
2113 rxo->rx_post_starved = false;
2114 be_post_rx_frags(rxo, GFP_KERNEL);
2119 adapter->work_counter++;
2120 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
2123 static void be_msix_disable(struct be_adapter *adapter)
2125 if (msix_enabled(adapter)) {
2126 pci_disable_msix(adapter->pdev);
2127 adapter->num_msix_vec = 0;
2131 static void be_msix_enable(struct be_adapter *adapter)
2133 #define BE_MIN_MSIX_VECTORS (1 + 1) /* Rx + Tx */
2134 int i, status, num_vec;
2136 num_vec = be_num_rxqs_want(adapter) + 1;
2138 for (i = 0; i < num_vec; i++)
2139 adapter->msix_entries[i].entry = i;
2141 status = pci_enable_msix(adapter->pdev, adapter->msix_entries, num_vec);
2144 } else if (status >= BE_MIN_MSIX_VECTORS) {
2146 if (pci_enable_msix(adapter->pdev, adapter->msix_entries,
2152 adapter->num_msix_vec = num_vec;
2156 static void be_sriov_enable(struct be_adapter *adapter)
2158 be_check_sriov_fn_type(adapter);
2159 #ifdef CONFIG_PCI_IOV
2160 if (be_physfn(adapter) && num_vfs) {
2164 pos = pci_find_ext_capability(adapter->pdev,
2165 PCI_EXT_CAP_ID_SRIOV);
2166 pci_read_config_word(adapter->pdev,
2167 pos + PCI_SRIOV_TOTAL_VF, &nvfs);
2169 if (num_vfs > nvfs) {
2170 dev_info(&adapter->pdev->dev,
2171 "Device supports %d VFs and not %d\n",
2176 status = pci_enable_sriov(adapter->pdev, num_vfs);
2177 adapter->sriov_enabled = status ? false : true;
2182 static void be_sriov_disable(struct be_adapter *adapter)
2184 #ifdef CONFIG_PCI_IOV
2185 if (adapter->sriov_enabled) {
2186 pci_disable_sriov(adapter->pdev);
2187 adapter->sriov_enabled = false;
2192 static inline int be_msix_vec_get(struct be_adapter *adapter,
2193 struct be_eq_obj *eq_obj)
2195 return adapter->msix_entries[eq_obj->eq_idx].vector;
2198 static int be_request_irq(struct be_adapter *adapter,
2199 struct be_eq_obj *eq_obj,
2200 void *handler, char *desc, void *context)
2202 struct net_device *netdev = adapter->netdev;
2205 sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
2206 vec = be_msix_vec_get(adapter, eq_obj);
2207 return request_irq(vec, handler, 0, eq_obj->desc, context);
2210 static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj,
2213 int vec = be_msix_vec_get(adapter, eq_obj);
2214 free_irq(vec, context);
2217 static int be_msix_register(struct be_adapter *adapter)
2219 struct be_rx_obj *rxo;
2223 status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx",
2228 for_all_rx_queues(adapter, rxo, i) {
2229 sprintf(qname, "rxq%d", i);
2230 status = be_request_irq(adapter, &rxo->rx_eq, be_msix_rx,
2239 be_free_irq(adapter, &adapter->tx_eq, adapter);
2241 for (i--, rxo = &adapter->rx_obj[i]; i >= 0; i--, rxo--)
2242 be_free_irq(adapter, &rxo->rx_eq, rxo);
2245 dev_warn(&adapter->pdev->dev,
2246 "MSIX Request IRQ failed - err %d\n", status);
2247 be_msix_disable(adapter);
2251 static int be_irq_register(struct be_adapter *adapter)
2253 struct net_device *netdev = adapter->netdev;
2256 if (msix_enabled(adapter)) {
2257 status = be_msix_register(adapter);
2260 /* INTx is not supported for VF */
2261 if (!be_physfn(adapter))
2266 netdev->irq = adapter->pdev->irq;
2267 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
2270 dev_err(&adapter->pdev->dev,
2271 "INTx request IRQ failed - err %d\n", status);
2275 adapter->isr_registered = true;
2279 static void be_irq_unregister(struct be_adapter *adapter)
2281 struct net_device *netdev = adapter->netdev;
2282 struct be_rx_obj *rxo;
2285 if (!adapter->isr_registered)
2289 if (!msix_enabled(adapter)) {
2290 free_irq(netdev->irq, adapter);
2295 be_free_irq(adapter, &adapter->tx_eq, adapter);
2297 for_all_rx_queues(adapter, rxo, i)
2298 be_free_irq(adapter, &rxo->rx_eq, rxo);
2301 adapter->isr_registered = false;
2304 static int be_close(struct net_device *netdev)
2306 struct be_adapter *adapter = netdev_priv(netdev);
2307 struct be_rx_obj *rxo;
2308 struct be_tx_obj *txo;
2309 struct be_eq_obj *tx_eq = &adapter->tx_eq;
2312 be_async_mcc_disable(adapter);
2314 netif_carrier_off(netdev);
2315 adapter->link_up = false;
2317 if (!lancer_chip(adapter))
2318 be_intr_set(adapter, false);
2320 for_all_rx_queues(adapter, rxo, i)
2321 napi_disable(&rxo->rx_eq.napi);
2323 napi_disable(&tx_eq->napi);
2325 if (lancer_chip(adapter)) {
2326 be_cq_notify(adapter, adapter->mcc_obj.cq.id, false, 0);
2327 for_all_rx_queues(adapter, rxo, i)
2328 be_cq_notify(adapter, rxo->cq.id, false, 0);
2329 for_all_tx_queues(adapter, txo, i)
2330 be_cq_notify(adapter, txo->cq.id, false, 0);
2333 if (msix_enabled(adapter)) {
2334 vec = be_msix_vec_get(adapter, tx_eq);
2335 synchronize_irq(vec);
2337 for_all_rx_queues(adapter, rxo, i) {
2338 vec = be_msix_vec_get(adapter, &rxo->rx_eq);
2339 synchronize_irq(vec);
2342 synchronize_irq(netdev->irq);
2344 be_irq_unregister(adapter);
2346 /* Wait for all pending tx completions to arrive so that
2347 * all tx skbs are freed.
2349 for_all_tx_queues(adapter, txo, i)
2350 be_tx_compl_clean(adapter, txo);
2355 static int be_open(struct net_device *netdev)
2357 struct be_adapter *adapter = netdev_priv(netdev);
2358 struct be_eq_obj *tx_eq = &adapter->tx_eq;
2359 struct be_rx_obj *rxo;
2365 for_all_rx_queues(adapter, rxo, i) {
2366 be_post_rx_frags(rxo, GFP_KERNEL);
2367 napi_enable(&rxo->rx_eq.napi);
2369 napi_enable(&tx_eq->napi);
2371 be_irq_register(adapter);
2373 if (!lancer_chip(adapter))
2374 be_intr_set(adapter, true);
2376 /* The evt queues are created in unarmed state; arm them */
2377 for_all_rx_queues(adapter, rxo, i) {
2378 be_eq_notify(adapter, rxo->rx_eq.q.id, true, false, 0);
2379 be_cq_notify(adapter, rxo->cq.id, true, 0);
2381 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
2383 /* Now that interrupts are on we can process async mcc */
2384 be_async_mcc_enable(adapter);
2386 status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
2390 be_link_status_update(adapter, link_up);
2392 if (be_physfn(adapter)) {
2393 status = be_vid_config(adapter, false, 0);
2397 status = be_cmd_set_flow_control(adapter,
2398 adapter->tx_fc, adapter->rx_fc);
2405 be_close(adapter->netdev);
2409 static int be_setup_wol(struct be_adapter *adapter, bool enable)
2411 struct be_dma_mem cmd;
2415 memset(mac, 0, ETH_ALEN);
2417 cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
2418 cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma,
2422 memset(cmd.va, 0, cmd.size);
2425 status = pci_write_config_dword(adapter->pdev,
2426 PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
2428 dev_err(&adapter->pdev->dev,
2429 "Could not enable Wake-on-lan\n");
2430 dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va,
2434 status = be_cmd_enable_magic_wol(adapter,
2435 adapter->netdev->dev_addr, &cmd);
2436 pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
2437 pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
2439 status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
2440 pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
2441 pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
2444 dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma);
2449 * Generate a seed MAC address from the PF MAC Address using jhash.
2450 * MAC Address for VFs are assigned incrementally starting from the seed.
2451 * These addresses are programmed in the ASIC by the PF and the VF driver
2452 * queries for the MAC address during its probe.
2454 static inline int be_vf_eth_addr_config(struct be_adapter *adapter)
2460 be_vf_eth_addr_generate(adapter, mac);
2462 for (vf = 0; vf < num_vfs; vf++) {
2463 status = be_cmd_pmac_add(adapter, mac,
2464 adapter->vf_cfg[vf].vf_if_handle,
2465 &adapter->vf_cfg[vf].vf_pmac_id,
2468 dev_err(&adapter->pdev->dev,
2469 "Mac address add failed for VF %d\n", vf);
2471 memcpy(adapter->vf_cfg[vf].vf_mac_addr, mac, ETH_ALEN);
2478 static inline void be_vf_eth_addr_rem(struct be_adapter *adapter)
2482 for (vf = 0; vf < num_vfs; vf++) {
2483 if (adapter->vf_cfg[vf].vf_pmac_id != BE_INVALID_PMAC_ID)
2484 be_cmd_pmac_del(adapter,
2485 adapter->vf_cfg[vf].vf_if_handle,
2486 adapter->vf_cfg[vf].vf_pmac_id, vf + 1);
2490 static int be_setup(struct be_adapter *adapter)
2492 struct net_device *netdev = adapter->netdev;
2493 u32 cap_flags, en_flags, vf = 0;
2497 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED |
2498 BE_IF_FLAGS_BROADCAST |
2499 BE_IF_FLAGS_MULTICAST;
2501 if (be_physfn(adapter)) {
2502 cap_flags |= BE_IF_FLAGS_MCAST_PROMISCUOUS |
2503 BE_IF_FLAGS_PROMISCUOUS |
2504 BE_IF_FLAGS_PASS_L3L4_ERRORS;
2505 en_flags |= BE_IF_FLAGS_PASS_L3L4_ERRORS;
2507 if (adapter->function_caps & BE_FUNCTION_CAPS_RSS) {
2508 cap_flags |= BE_IF_FLAGS_RSS;
2509 en_flags |= BE_IF_FLAGS_RSS;
2513 status = be_cmd_if_create(adapter, cap_flags, en_flags,
2514 netdev->dev_addr, false/* pmac_invalid */,
2515 &adapter->if_handle, &adapter->pmac_id, 0);
2519 if (be_physfn(adapter)) {
2520 if (adapter->sriov_enabled) {
2521 while (vf < num_vfs) {
2522 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED |
2523 BE_IF_FLAGS_BROADCAST;
2524 status = be_cmd_if_create(adapter, cap_flags,
2525 en_flags, mac, true,
2526 &adapter->vf_cfg[vf].vf_if_handle,
2529 dev_err(&adapter->pdev->dev,
2530 "Interface Create failed for VF %d\n",
2534 adapter->vf_cfg[vf].vf_pmac_id =
2540 status = be_cmd_mac_addr_query(adapter, mac,
2541 MAC_ADDRESS_TYPE_NETWORK, false, adapter->if_handle);
2543 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
2544 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
2548 status = be_tx_queues_create(adapter);
2552 status = be_rx_queues_create(adapter);
2556 status = be_mcc_queues_create(adapter);
2560 adapter->link_speed = -1;
2565 be_rx_queues_destroy(adapter);
2567 be_tx_queues_destroy(adapter);
2569 if (be_physfn(adapter) && adapter->sriov_enabled)
2570 for (vf = 0; vf < num_vfs; vf++)
2571 if (adapter->vf_cfg[vf].vf_if_handle)
2572 be_cmd_if_destroy(adapter,
2573 adapter->vf_cfg[vf].vf_if_handle,
2575 be_cmd_if_destroy(adapter, adapter->if_handle, 0);
2580 static int be_clear(struct be_adapter *adapter)
2584 if (be_physfn(adapter) && adapter->sriov_enabled)
2585 be_vf_eth_addr_rem(adapter);
2587 be_mcc_queues_destroy(adapter);
2588 be_rx_queues_destroy(adapter);
2589 be_tx_queues_destroy(adapter);
2590 adapter->eq_next_idx = 0;
2592 if (be_physfn(adapter) && adapter->sriov_enabled)
2593 for (vf = 0; vf < num_vfs; vf++)
2594 if (adapter->vf_cfg[vf].vf_if_handle)
2595 be_cmd_if_destroy(adapter,
2596 adapter->vf_cfg[vf].vf_if_handle,
2599 be_cmd_if_destroy(adapter, adapter->if_handle, 0);
2601 /* tell fw we're done with firing cmds */
2602 be_cmd_fw_clean(adapter);
2607 #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
2608 static bool be_flash_redboot(struct be_adapter *adapter,
2609 const u8 *p, u32 img_start, int image_size,
2616 crc_offset = hdr_size + img_start + image_size - 4;
2620 status = be_cmd_get_flash_crc(adapter, flashed_crc,
2623 dev_err(&adapter->pdev->dev,
2624 "could not get crc from flash, not flashing redboot\n");
2628 /*update redboot only if crc does not match*/
2629 if (!memcmp(flashed_crc, p, 4))
2635 static int be_flash_data(struct be_adapter *adapter,
2636 const struct firmware *fw,
2637 struct be_dma_mem *flash_cmd, int num_of_images)
2640 int status = 0, i, filehdr_size = 0;
2641 u32 total_bytes = 0, flash_op;
2643 const u8 *p = fw->data;
2644 struct be_cmd_write_flashrom *req = flash_cmd->va;
2645 const struct flash_comp *pflashcomp;
2648 static const struct flash_comp gen3_flash_types[9] = {
2649 { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, IMG_TYPE_ISCSI_ACTIVE,
2650 FLASH_IMAGE_MAX_SIZE_g3},
2651 { FLASH_REDBOOT_START_g3, IMG_TYPE_REDBOOT,
2652 FLASH_REDBOOT_IMAGE_MAX_SIZE_g3},
2653 { FLASH_iSCSI_BIOS_START_g3, IMG_TYPE_BIOS,
2654 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2655 { FLASH_PXE_BIOS_START_g3, IMG_TYPE_PXE_BIOS,
2656 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2657 { FLASH_FCoE_BIOS_START_g3, IMG_TYPE_FCOE_BIOS,
2658 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2659 { FLASH_iSCSI_BACKUP_IMAGE_START_g3, IMG_TYPE_ISCSI_BACKUP,
2660 FLASH_IMAGE_MAX_SIZE_g3},
2661 { FLASH_FCoE_PRIMARY_IMAGE_START_g3, IMG_TYPE_FCOE_FW_ACTIVE,
2662 FLASH_IMAGE_MAX_SIZE_g3},
2663 { FLASH_FCoE_BACKUP_IMAGE_START_g3, IMG_TYPE_FCOE_FW_BACKUP,
2664 FLASH_IMAGE_MAX_SIZE_g3},
2665 { FLASH_NCSI_START_g3, IMG_TYPE_NCSI_FW,
2666 FLASH_NCSI_IMAGE_MAX_SIZE_g3}
2668 static const struct flash_comp gen2_flash_types[8] = {
2669 { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, IMG_TYPE_ISCSI_ACTIVE,
2670 FLASH_IMAGE_MAX_SIZE_g2},
2671 { FLASH_REDBOOT_START_g2, IMG_TYPE_REDBOOT,
2672 FLASH_REDBOOT_IMAGE_MAX_SIZE_g2},
2673 { FLASH_iSCSI_BIOS_START_g2, IMG_TYPE_BIOS,
2674 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2675 { FLASH_PXE_BIOS_START_g2, IMG_TYPE_PXE_BIOS,
2676 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2677 { FLASH_FCoE_BIOS_START_g2, IMG_TYPE_FCOE_BIOS,
2678 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2679 { FLASH_iSCSI_BACKUP_IMAGE_START_g2, IMG_TYPE_ISCSI_BACKUP,
2680 FLASH_IMAGE_MAX_SIZE_g2},
2681 { FLASH_FCoE_PRIMARY_IMAGE_START_g2, IMG_TYPE_FCOE_FW_ACTIVE,
2682 FLASH_IMAGE_MAX_SIZE_g2},
2683 { FLASH_FCoE_BACKUP_IMAGE_START_g2, IMG_TYPE_FCOE_FW_BACKUP,
2684 FLASH_IMAGE_MAX_SIZE_g2}
2687 if (adapter->generation == BE_GEN3) {
2688 pflashcomp = gen3_flash_types;
2689 filehdr_size = sizeof(struct flash_file_hdr_g3);
2690 num_comp = ARRAY_SIZE(gen3_flash_types);
2692 pflashcomp = gen2_flash_types;
2693 filehdr_size = sizeof(struct flash_file_hdr_g2);
2694 num_comp = ARRAY_SIZE(gen2_flash_types);
2696 for (i = 0; i < num_comp; i++) {
2697 if ((pflashcomp[i].optype == IMG_TYPE_NCSI_FW) &&
2698 memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0)
2700 if ((pflashcomp[i].optype == IMG_TYPE_REDBOOT) &&
2701 (!be_flash_redboot(adapter, fw->data,
2702 pflashcomp[i].offset, pflashcomp[i].size, filehdr_size +
2703 (num_of_images * sizeof(struct image_hdr)))))
2706 p += filehdr_size + pflashcomp[i].offset
2707 + (num_of_images * sizeof(struct image_hdr));
2708 if (p + pflashcomp[i].size > fw->data + fw->size)
2710 total_bytes = pflashcomp[i].size;
2711 while (total_bytes) {
2712 if (total_bytes > 32*1024)
2713 num_bytes = 32*1024;
2715 num_bytes = total_bytes;
2716 total_bytes -= num_bytes;
2719 flash_op = FLASHROM_OPER_FLASH;
2721 flash_op = FLASHROM_OPER_SAVE;
2722 memcpy(req->params.data_buf, p, num_bytes);
2724 status = be_cmd_write_flashrom(adapter, flash_cmd,
2725 pflashcomp[i].optype, flash_op, num_bytes);
2727 dev_err(&adapter->pdev->dev,
2728 "cmd to write to flash rom failed.\n");
2736 static int get_ufigen_type(struct flash_file_hdr_g2 *fhdr)
2740 if (fhdr->build[0] == '3')
2742 else if (fhdr->build[0] == '2')
2748 static int lancer_fw_download(struct be_adapter *adapter,
2749 const struct firmware *fw)
2751 #define LANCER_FW_DOWNLOAD_CHUNK (32 * 1024)
2752 #define LANCER_FW_DOWNLOAD_LOCATION "/prg"
2753 struct be_dma_mem flash_cmd;
2754 const u8 *data_ptr = NULL;
2755 u8 *dest_image_ptr = NULL;
2756 size_t image_size = 0;
2758 u32 data_written = 0;
2763 if (!IS_ALIGNED(fw->size, sizeof(u32))) {
2764 dev_err(&adapter->pdev->dev,
2765 "FW Image not properly aligned. "
2766 "Length must be 4 byte aligned.\n");
2768 goto lancer_fw_exit;
2771 flash_cmd.size = sizeof(struct lancer_cmd_req_write_object)
2772 + LANCER_FW_DOWNLOAD_CHUNK;
2773 flash_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, flash_cmd.size,
2774 &flash_cmd.dma, GFP_KERNEL);
2775 if (!flash_cmd.va) {
2777 dev_err(&adapter->pdev->dev,
2778 "Memory allocation failure while flashing\n");
2779 goto lancer_fw_exit;
2782 dest_image_ptr = flash_cmd.va +
2783 sizeof(struct lancer_cmd_req_write_object);
2784 image_size = fw->size;
2785 data_ptr = fw->data;
2787 while (image_size) {
2788 chunk_size = min_t(u32, image_size, LANCER_FW_DOWNLOAD_CHUNK);
2790 /* Copy the image chunk content. */
2791 memcpy(dest_image_ptr, data_ptr, chunk_size);
2793 status = lancer_cmd_write_object(adapter, &flash_cmd,
2794 chunk_size, offset, LANCER_FW_DOWNLOAD_LOCATION,
2795 &data_written, &add_status);
2800 offset += data_written;
2801 data_ptr += data_written;
2802 image_size -= data_written;
2806 /* Commit the FW written */
2807 status = lancer_cmd_write_object(adapter, &flash_cmd,
2808 0, offset, LANCER_FW_DOWNLOAD_LOCATION,
2809 &data_written, &add_status);
2812 dma_free_coherent(&adapter->pdev->dev, flash_cmd.size, flash_cmd.va,
2815 dev_err(&adapter->pdev->dev,
2816 "Firmware load error. "
2817 "Status code: 0x%x Additional Status: 0x%x\n",
2818 status, add_status);
2819 goto lancer_fw_exit;
2822 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
2827 static int be_fw_download(struct be_adapter *adapter, const struct firmware* fw)
2829 struct flash_file_hdr_g2 *fhdr;
2830 struct flash_file_hdr_g3 *fhdr3;
2831 struct image_hdr *img_hdr_ptr = NULL;
2832 struct be_dma_mem flash_cmd;
2834 int status = 0, i = 0, num_imgs = 0;
2837 fhdr = (struct flash_file_hdr_g2 *) p;
2839 flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
2840 flash_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, flash_cmd.size,
2841 &flash_cmd.dma, GFP_KERNEL);
2842 if (!flash_cmd.va) {
2844 dev_err(&adapter->pdev->dev,
2845 "Memory allocation failure while flashing\n");
2849 if ((adapter->generation == BE_GEN3) &&
2850 (get_ufigen_type(fhdr) == BE_GEN3)) {
2851 fhdr3 = (struct flash_file_hdr_g3 *) fw->data;
2852 num_imgs = le32_to_cpu(fhdr3->num_imgs);
2853 for (i = 0; i < num_imgs; i++) {
2854 img_hdr_ptr = (struct image_hdr *) (fw->data +
2855 (sizeof(struct flash_file_hdr_g3) +
2856 i * sizeof(struct image_hdr)));
2857 if (le32_to_cpu(img_hdr_ptr->imageid) == 1)
2858 status = be_flash_data(adapter, fw, &flash_cmd,
2861 } else if ((adapter->generation == BE_GEN2) &&
2862 (get_ufigen_type(fhdr) == BE_GEN2)) {
2863 status = be_flash_data(adapter, fw, &flash_cmd, 0);
2865 dev_err(&adapter->pdev->dev,
2866 "UFI and Interface are not compatible for flashing\n");
2870 dma_free_coherent(&adapter->pdev->dev, flash_cmd.size, flash_cmd.va,
2873 dev_err(&adapter->pdev->dev, "Firmware load error\n");
2877 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
2883 int be_load_fw(struct be_adapter *adapter, u8 *fw_file)
2885 const struct firmware *fw;
2888 if (!netif_running(adapter->netdev)) {
2889 dev_err(&adapter->pdev->dev,
2890 "Firmware load not allowed (interface is down)\n");
2894 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
2898 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
2900 if (lancer_chip(adapter))
2901 status = lancer_fw_download(adapter, fw);
2903 status = be_fw_download(adapter, fw);
2906 release_firmware(fw);
2910 static struct net_device_ops be_netdev_ops = {
2911 .ndo_open = be_open,
2912 .ndo_stop = be_close,
2913 .ndo_start_xmit = be_xmit,
2914 .ndo_set_rx_mode = be_set_multicast_list,
2915 .ndo_set_mac_address = be_mac_addr_set,
2916 .ndo_change_mtu = be_change_mtu,
2917 .ndo_validate_addr = eth_validate_addr,
2918 .ndo_vlan_rx_register = be_vlan_register,
2919 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
2920 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
2921 .ndo_set_vf_mac = be_set_vf_mac,
2922 .ndo_set_vf_vlan = be_set_vf_vlan,
2923 .ndo_set_vf_tx_rate = be_set_vf_tx_rate,
2924 .ndo_get_vf_config = be_get_vf_config
2927 static void be_netdev_init(struct net_device *netdev)
2929 struct be_adapter *adapter = netdev_priv(netdev);
2930 struct be_rx_obj *rxo;
2933 netdev->hw_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 |
2934 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
2936 if (be_multi_rxq(adapter))
2937 netdev->hw_features |= NETIF_F_RXHASH;
2939 netdev->features |= netdev->hw_features |
2940 NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER;
2942 netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 |
2943 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2945 netdev->flags |= IFF_MULTICAST;
2947 /* Default settings for Rx and Tx flow control */
2948 adapter->rx_fc = true;
2949 adapter->tx_fc = true;
2951 netif_set_gso_max_size(netdev, 65535);
2953 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
2955 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
2957 for_all_rx_queues(adapter, rxo, i)
2958 netif_napi_add(netdev, &rxo->rx_eq.napi, be_poll_rx,
2961 netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
2965 static void be_unmap_pci_bars(struct be_adapter *adapter)
2968 iounmap(adapter->csr);
2970 iounmap(adapter->db);
2971 if (adapter->pcicfg && be_physfn(adapter))
2972 iounmap(adapter->pcicfg);
2975 static int be_map_pci_bars(struct be_adapter *adapter)
2978 int pcicfg_reg, db_reg;
2980 if (lancer_chip(adapter)) {
2981 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 0),
2982 pci_resource_len(adapter->pdev, 0));
2989 if (be_physfn(adapter)) {
2990 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
2991 pci_resource_len(adapter->pdev, 2));
2994 adapter->csr = addr;
2997 if (adapter->generation == BE_GEN2) {
3002 if (be_physfn(adapter))
3007 addr = ioremap_nocache(pci_resource_start(adapter->pdev, db_reg),
3008 pci_resource_len(adapter->pdev, db_reg));
3013 if (be_physfn(adapter)) {
3014 addr = ioremap_nocache(
3015 pci_resource_start(adapter->pdev, pcicfg_reg),
3016 pci_resource_len(adapter->pdev, pcicfg_reg));
3019 adapter->pcicfg = addr;
3021 adapter->pcicfg = adapter->db + SRIOV_VF_PCICFG_OFFSET;
3025 be_unmap_pci_bars(adapter);
3030 static void be_ctrl_cleanup(struct be_adapter *adapter)
3032 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
3034 be_unmap_pci_bars(adapter);
3037 dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va,
3040 mem = &adapter->mc_cmd_mem;
3042 dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va,
3046 static int be_ctrl_init(struct be_adapter *adapter)
3048 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
3049 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
3050 struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
3053 status = be_map_pci_bars(adapter);
3057 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
3058 mbox_mem_alloc->va = dma_alloc_coherent(&adapter->pdev->dev,
3059 mbox_mem_alloc->size,
3060 &mbox_mem_alloc->dma,
3062 if (!mbox_mem_alloc->va) {
3064 goto unmap_pci_bars;
3067 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
3068 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
3069 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
3070 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
3072 mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
3073 mc_cmd_mem->va = dma_alloc_coherent(&adapter->pdev->dev,
3074 mc_cmd_mem->size, &mc_cmd_mem->dma,
3076 if (mc_cmd_mem->va == NULL) {
3080 memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
3082 mutex_init(&adapter->mbox_lock);
3083 spin_lock_init(&adapter->mcc_lock);
3084 spin_lock_init(&adapter->mcc_cq_lock);
3086 init_completion(&adapter->flash_compl);
3087 pci_save_state(adapter->pdev);
3091 dma_free_coherent(&adapter->pdev->dev, mbox_mem_alloc->size,
3092 mbox_mem_alloc->va, mbox_mem_alloc->dma);
3095 be_unmap_pci_bars(adapter);
3101 static void be_stats_cleanup(struct be_adapter *adapter)
3103 struct be_dma_mem *cmd = &adapter->stats_cmd;
3106 dma_free_coherent(&adapter->pdev->dev, cmd->size,
3110 static int be_stats_init(struct be_adapter *adapter)
3112 struct be_dma_mem *cmd = &adapter->stats_cmd;
3114 if (adapter->generation == BE_GEN2) {
3115 cmd->size = sizeof(struct be_cmd_req_get_stats_v0);
3117 if (lancer_chip(adapter))
3118 cmd->size = sizeof(struct lancer_cmd_req_pport_stats);
3120 cmd->size = sizeof(struct be_cmd_req_get_stats_v1);
3122 cmd->va = dma_alloc_coherent(&adapter->pdev->dev, cmd->size, &cmd->dma,
3124 if (cmd->va == NULL)
3126 memset(cmd->va, 0, cmd->size);
3130 static void __devexit be_remove(struct pci_dev *pdev)
3132 struct be_adapter *adapter = pci_get_drvdata(pdev);
3137 cancel_delayed_work_sync(&adapter->work);
3139 unregister_netdev(adapter->netdev);
3143 be_stats_cleanup(adapter);
3145 be_ctrl_cleanup(adapter);
3147 kfree(adapter->vf_cfg);
3148 be_sriov_disable(adapter);
3150 be_msix_disable(adapter);
3152 pci_set_drvdata(pdev, NULL);
3153 pci_release_regions(pdev);
3154 pci_disable_device(pdev);
3156 free_netdev(adapter->netdev);
3159 static int be_get_config(struct be_adapter *adapter)
3164 status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
3168 status = be_cmd_query_fw_cfg(adapter, &adapter->port_num,
3169 &adapter->function_mode, &adapter->function_caps);
3173 memset(mac, 0, ETH_ALEN);
3175 /* A default permanent address is given to each VF for Lancer*/
3176 if (be_physfn(adapter) || lancer_chip(adapter)) {
3177 status = be_cmd_mac_addr_query(adapter, mac,
3178 MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
3183 if (!is_valid_ether_addr(mac))
3184 return -EADDRNOTAVAIL;
3186 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
3187 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
3190 if (adapter->function_mode & 0x400)
3191 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED/4;
3193 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED;
3195 status = be_cmd_get_cntl_attributes(adapter);
3199 be_cmd_check_native_mode(adapter);
3201 if ((num_vfs && adapter->sriov_enabled) ||
3202 (adapter->function_mode & 0x400) ||
3203 lancer_chip(adapter) || !be_physfn(adapter)) {
3204 adapter->num_tx_qs = 1;
3205 netif_set_real_num_tx_queues(adapter->netdev,
3206 adapter->num_tx_qs);
3208 adapter->num_tx_qs = MAX_TX_QS;
3214 static int be_dev_family_check(struct be_adapter *adapter)
3216 struct pci_dev *pdev = adapter->pdev;
3217 u32 sli_intf = 0, if_type;
3219 switch (pdev->device) {
3222 adapter->generation = BE_GEN2;
3226 adapter->generation = BE_GEN3;
3230 pci_read_config_dword(pdev, SLI_INTF_REG_OFFSET, &sli_intf);
3231 if_type = (sli_intf & SLI_INTF_IF_TYPE_MASK) >>
3232 SLI_INTF_IF_TYPE_SHIFT;
3234 if (((sli_intf & SLI_INTF_VALID_MASK) != SLI_INTF_VALID) ||
3236 dev_err(&pdev->dev, "SLI_INTF reg val is not valid\n");
3239 adapter->sli_family = ((sli_intf & SLI_INTF_FAMILY_MASK) >>
3240 SLI_INTF_FAMILY_SHIFT);
3241 adapter->generation = BE_GEN3;
3244 adapter->generation = 0;
3249 static int lancer_wait_ready(struct be_adapter *adapter)
3251 #define SLIPORT_READY_TIMEOUT 500
3255 for (i = 0; i < SLIPORT_READY_TIMEOUT; i++) {
3256 sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
3257 if (sliport_status & SLIPORT_STATUS_RDY_MASK)
3263 if (i == SLIPORT_READY_TIMEOUT)
3269 static int lancer_test_and_set_rdy_state(struct be_adapter *adapter)
3272 u32 sliport_status, err, reset_needed;
3273 status = lancer_wait_ready(adapter);
3275 sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
3276 err = sliport_status & SLIPORT_STATUS_ERR_MASK;
3277 reset_needed = sliport_status & SLIPORT_STATUS_RN_MASK;
3278 if (err && reset_needed) {
3279 iowrite32(SLI_PORT_CONTROL_IP_MASK,
3280 adapter->db + SLIPORT_CONTROL_OFFSET);
3282 /* check adapter has corrected the error */
3283 status = lancer_wait_ready(adapter);
3284 sliport_status = ioread32(adapter->db +
3285 SLIPORT_STATUS_OFFSET);
3286 sliport_status &= (SLIPORT_STATUS_ERR_MASK |
3287 SLIPORT_STATUS_RN_MASK);
3288 if (status || sliport_status)
3290 } else if (err || reset_needed) {
3297 static int __devinit be_probe(struct pci_dev *pdev,
3298 const struct pci_device_id *pdev_id)
3301 struct be_adapter *adapter;
3302 struct net_device *netdev;
3304 status = pci_enable_device(pdev);
3308 status = pci_request_regions(pdev, DRV_NAME);
3311 pci_set_master(pdev);
3313 netdev = alloc_etherdev_mq(sizeof(struct be_adapter), MAX_TX_QS);
3314 if (netdev == NULL) {
3318 adapter = netdev_priv(netdev);
3319 adapter->pdev = pdev;
3320 pci_set_drvdata(pdev, adapter);
3322 status = be_dev_family_check(adapter);
3326 adapter->netdev = netdev;
3327 SET_NETDEV_DEV(netdev, &pdev->dev);
3329 status = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
3331 netdev->features |= NETIF_F_HIGHDMA;
3333 status = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
3335 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
3340 be_sriov_enable(adapter);
3341 if (adapter->sriov_enabled) {
3342 adapter->vf_cfg = kcalloc(num_vfs,
3343 sizeof(struct be_vf_cfg), GFP_KERNEL);
3345 if (!adapter->vf_cfg)
3349 status = be_ctrl_init(adapter);
3353 if (lancer_chip(adapter)) {
3354 status = lancer_test_and_set_rdy_state(adapter);
3356 dev_err(&pdev->dev, "Adapter in non recoverable error\n");
3361 /* sync up with fw's ready state */
3362 if (be_physfn(adapter)) {
3363 status = be_cmd_POST(adapter);
3368 /* tell fw we're ready to fire cmds */
3369 status = be_cmd_fw_init(adapter);
3373 status = be_cmd_reset_function(adapter);
3377 status = be_stats_init(adapter);
3381 status = be_get_config(adapter);
3385 be_msix_enable(adapter);
3387 INIT_DELAYED_WORK(&adapter->work, be_worker);
3389 status = be_setup(adapter);
3393 be_netdev_init(netdev);
3394 status = register_netdev(netdev);
3397 netif_carrier_off(netdev);
3399 if (be_physfn(adapter) && adapter->sriov_enabled) {
3404 if (!lancer_chip(adapter)) {
3405 status = be_vf_eth_addr_config(adapter);
3410 for (vf = 0; vf < num_vfs; vf++) {
3411 status = be_cmd_link_status_query(adapter, &link_up,
3412 &mac_speed, &lnk_speed, vf + 1);
3414 adapter->vf_cfg[vf].vf_tx_rate = lnk_speed * 10;
3420 dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
3421 /* By default all priorities are enabled.
3422 * Needed in case of no GRP5 evt support
3424 adapter->vlan_prio_bmap = 0xff;
3426 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
3430 unregister_netdev(netdev);
3434 be_msix_disable(adapter);
3436 be_stats_cleanup(adapter);
3438 be_ctrl_cleanup(adapter);
3440 kfree(adapter->vf_cfg);
3442 be_sriov_disable(adapter);
3443 free_netdev(netdev);
3444 pci_set_drvdata(pdev, NULL);
3446 pci_release_regions(pdev);
3448 pci_disable_device(pdev);
3450 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
3454 static int be_suspend(struct pci_dev *pdev, pm_message_t state)
3456 struct be_adapter *adapter = pci_get_drvdata(pdev);
3457 struct net_device *netdev = adapter->netdev;
3459 cancel_delayed_work_sync(&adapter->work);
3461 be_setup_wol(adapter, true);
3463 netif_device_detach(netdev);
3464 if (netif_running(netdev)) {
3469 be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
3472 be_msix_disable(adapter);
3473 pci_save_state(pdev);
3474 pci_disable_device(pdev);
3475 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3479 static int be_resume(struct pci_dev *pdev)
3482 struct be_adapter *adapter = pci_get_drvdata(pdev);
3483 struct net_device *netdev = adapter->netdev;
3485 netif_device_detach(netdev);
3487 status = pci_enable_device(pdev);
3491 pci_set_power_state(pdev, 0);
3492 pci_restore_state(pdev);
3494 be_msix_enable(adapter);
3495 /* tell fw we're ready to fire cmds */
3496 status = be_cmd_fw_init(adapter);
3501 if (netif_running(netdev)) {
3506 netif_device_attach(netdev);
3509 be_setup_wol(adapter, false);
3511 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
3516 * An FLR will stop BE from DMAing any data.
3518 static void be_shutdown(struct pci_dev *pdev)
3520 struct be_adapter *adapter = pci_get_drvdata(pdev);
3525 cancel_delayed_work_sync(&adapter->work);
3527 netif_device_detach(adapter->netdev);
3530 be_setup_wol(adapter, true);
3532 be_cmd_reset_function(adapter);
3534 pci_disable_device(pdev);
3537 static pci_ers_result_t be_eeh_err_detected(struct pci_dev *pdev,
3538 pci_channel_state_t state)
3540 struct be_adapter *adapter = pci_get_drvdata(pdev);
3541 struct net_device *netdev = adapter->netdev;
3543 dev_err(&adapter->pdev->dev, "EEH error detected\n");
3545 adapter->eeh_err = true;
3547 netif_device_detach(netdev);
3549 if (netif_running(netdev)) {
3556 if (state == pci_channel_io_perm_failure)
3557 return PCI_ERS_RESULT_DISCONNECT;
3559 pci_disable_device(pdev);
3561 return PCI_ERS_RESULT_NEED_RESET;
3564 static pci_ers_result_t be_eeh_reset(struct pci_dev *pdev)
3566 struct be_adapter *adapter = pci_get_drvdata(pdev);
3569 dev_info(&adapter->pdev->dev, "EEH reset\n");
3570 adapter->eeh_err = false;
3572 status = pci_enable_device(pdev);
3574 return PCI_ERS_RESULT_DISCONNECT;
3576 pci_set_master(pdev);
3577 pci_set_power_state(pdev, 0);
3578 pci_restore_state(pdev);
3580 /* Check if card is ok and fw is ready */
3581 status = be_cmd_POST(adapter);
3583 return PCI_ERS_RESULT_DISCONNECT;
3585 return PCI_ERS_RESULT_RECOVERED;
3588 static void be_eeh_resume(struct pci_dev *pdev)
3591 struct be_adapter *adapter = pci_get_drvdata(pdev);
3592 struct net_device *netdev = adapter->netdev;
3594 dev_info(&adapter->pdev->dev, "EEH resume\n");
3596 pci_save_state(pdev);
3598 /* tell fw we're ready to fire cmds */
3599 status = be_cmd_fw_init(adapter);
3603 status = be_setup(adapter);
3607 if (netif_running(netdev)) {
3608 status = be_open(netdev);
3612 netif_device_attach(netdev);
3615 dev_err(&adapter->pdev->dev, "EEH resume failed\n");
3618 static struct pci_error_handlers be_eeh_handlers = {
3619 .error_detected = be_eeh_err_detected,
3620 .slot_reset = be_eeh_reset,
3621 .resume = be_eeh_resume,
3624 static struct pci_driver be_driver = {
3626 .id_table = be_dev_ids,
3628 .remove = be_remove,
3629 .suspend = be_suspend,
3630 .resume = be_resume,
3631 .shutdown = be_shutdown,
3632 .err_handler = &be_eeh_handlers
3635 static int __init be_init_module(void)
3637 if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
3638 rx_frag_size != 2048) {
3639 printk(KERN_WARNING DRV_NAME
3640 " : Module param rx_frag_size must be 2048/4096/8192."
3642 rx_frag_size = 2048;
3645 return pci_register_driver(&be_driver);
3647 module_init(be_init_module);
3649 static void __exit be_exit_module(void)
3651 pci_unregister_driver(&be_driver);
3653 module_exit(be_exit_module);