2 * Copyright (C) 2005 - 2010 ServerEngines
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@serverengines.com
14 * 209 N. Fair Oaks Ave
20 #include <asm/div64.h>
22 MODULE_VERSION(DRV_VER);
23 MODULE_DEVICE_TABLE(pci, be_dev_ids);
24 MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
25 MODULE_AUTHOR("ServerEngines Corporation");
26 MODULE_LICENSE("GPL");
28 static unsigned int rx_frag_size = 2048;
29 static unsigned int num_vfs;
30 module_param(rx_frag_size, uint, S_IRUGO);
31 module_param(num_vfs, uint, S_IRUGO);
32 MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
33 MODULE_PARM_DESC(num_vfs, "Number of PCI VFs to initialize");
35 static bool multi_rxq = true;
36 module_param(multi_rxq, bool, S_IRUGO | S_IWUSR);
37 MODULE_PARM_DESC(multi_rxq, "Multi Rx Queue support. Enabled by default");
39 static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
40 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
41 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
42 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
43 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
44 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID3)},
47 MODULE_DEVICE_TABLE(pci, be_dev_ids);
48 /* UE Status Low CSR */
49 static char *ue_status_low_desc[] = {
83 /* UE Status High CSR */
84 static char *ue_status_hi_desc[] = {
119 static inline bool be_multi_rxq(struct be_adapter *adapter)
121 return (adapter->num_rx_qs > 1);
124 static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
126 struct be_dma_mem *mem = &q->dma_mem;
128 pci_free_consistent(adapter->pdev, mem->size,
132 static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
133 u16 len, u16 entry_size)
135 struct be_dma_mem *mem = &q->dma_mem;
137 memset(q, 0, sizeof(*q));
139 q->entry_size = entry_size;
140 mem->size = len * entry_size;
141 mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
144 memset(mem->va, 0, mem->size);
148 static void be_intr_set(struct be_adapter *adapter, bool enable)
150 u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
151 u32 reg = ioread32(addr);
152 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
154 if (adapter->eeh_err)
157 if (!enabled && enable)
158 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
159 else if (enabled && !enable)
160 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
164 iowrite32(reg, addr);
167 static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
170 val |= qid & DB_RQ_RING_ID_MASK;
171 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
174 iowrite32(val, adapter->db + DB_RQ_OFFSET);
177 static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
180 val |= qid & DB_TXULP_RING_ID_MASK;
181 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
184 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
187 static void be_eq_notify(struct be_adapter *adapter, u16 qid,
188 bool arm, bool clear_int, u16 num_popped)
191 val |= qid & DB_EQ_RING_ID_MASK;
192 val |= ((qid & DB_EQ_RING_ID_EXT_MASK) <<
193 DB_EQ_RING_ID_EXT_MASK_SHIFT);
195 if (adapter->eeh_err)
199 val |= 1 << DB_EQ_REARM_SHIFT;
201 val |= 1 << DB_EQ_CLR_SHIFT;
202 val |= 1 << DB_EQ_EVNT_SHIFT;
203 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
204 iowrite32(val, adapter->db + DB_EQ_OFFSET);
207 void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
210 val |= qid & DB_CQ_RING_ID_MASK;
211 val |= ((qid & DB_CQ_RING_ID_EXT_MASK) <<
212 DB_CQ_RING_ID_EXT_MASK_SHIFT);
214 if (adapter->eeh_err)
218 val |= 1 << DB_CQ_REARM_SHIFT;
219 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
220 iowrite32(val, adapter->db + DB_CQ_OFFSET);
223 static int be_mac_addr_set(struct net_device *netdev, void *p)
225 struct be_adapter *adapter = netdev_priv(netdev);
226 struct sockaddr *addr = p;
229 if (!is_valid_ether_addr(addr->sa_data))
230 return -EADDRNOTAVAIL;
232 /* MAC addr configuration will be done in hardware for VFs
233 * by their corresponding PFs. Just copy to netdev addr here
235 if (!be_physfn(adapter))
238 status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
242 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
243 adapter->if_handle, &adapter->pmac_id);
246 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
251 void netdev_stats_update(struct be_adapter *adapter)
253 struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats_cmd.va);
254 struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
255 struct be_port_rxf_stats *port_stats =
256 &rxf_stats->port[adapter->port_num];
257 struct net_device_stats *dev_stats = &adapter->netdev->stats;
258 struct be_erx_stats *erx_stats = &hw_stats->erx;
259 struct be_rx_obj *rxo;
262 memset(dev_stats, 0, sizeof(*dev_stats));
263 for_all_rx_queues(adapter, rxo, i) {
264 dev_stats->rx_packets += rx_stats(rxo)->rx_pkts;
265 dev_stats->rx_bytes += rx_stats(rxo)->rx_bytes;
266 dev_stats->multicast += rx_stats(rxo)->rx_mcast_pkts;
267 /* no space in linux buffers: best possible approximation */
268 dev_stats->rx_dropped +=
269 erx_stats->rx_drops_no_fragments[rxo->q.id];
272 dev_stats->tx_packets = tx_stats(adapter)->be_tx_pkts;
273 dev_stats->tx_bytes = tx_stats(adapter)->be_tx_bytes;
275 /* bad pkts received */
276 dev_stats->rx_errors = port_stats->rx_crc_errors +
277 port_stats->rx_alignment_symbol_errors +
278 port_stats->rx_in_range_errors +
279 port_stats->rx_out_range_errors +
280 port_stats->rx_frame_too_long +
281 port_stats->rx_dropped_too_small +
282 port_stats->rx_dropped_too_short +
283 port_stats->rx_dropped_header_too_small +
284 port_stats->rx_dropped_tcp_length +
285 port_stats->rx_dropped_runt +
286 port_stats->rx_tcp_checksum_errs +
287 port_stats->rx_ip_checksum_errs +
288 port_stats->rx_udp_checksum_errs;
290 /* detailed rx errors */
291 dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
292 port_stats->rx_out_range_errors +
293 port_stats->rx_frame_too_long;
295 dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
297 /* frame alignment errors */
298 dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
300 /* receiver fifo overrun */
301 /* drops_no_pbuf is no per i/f, it's per BE card */
302 dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
303 port_stats->rx_input_fifo_overflow +
304 rxf_stats->rx_drops_no_pbuf;
307 void be_link_status_update(struct be_adapter *adapter, bool link_up)
309 struct net_device *netdev = adapter->netdev;
311 /* If link came up or went down */
312 if (adapter->link_up != link_up) {
313 adapter->link_speed = -1;
315 netif_start_queue(netdev);
316 netif_carrier_on(netdev);
317 printk(KERN_INFO "%s: Link up\n", netdev->name);
319 netif_stop_queue(netdev);
320 netif_carrier_off(netdev);
321 printk(KERN_INFO "%s: Link down\n", netdev->name);
323 adapter->link_up = link_up;
327 /* Update the EQ delay n BE based on the RX frags consumed / sec */
328 static void be_rx_eqd_update(struct be_adapter *adapter, struct be_rx_obj *rxo)
330 struct be_eq_obj *rx_eq = &rxo->rx_eq;
331 struct be_rx_stats *stats = &rxo->stats;
335 if (!rx_eq->enable_aic)
339 if (time_before(now, stats->rx_fps_jiffies)) {
340 stats->rx_fps_jiffies = now;
344 /* Update once a second */
345 if ((now - stats->rx_fps_jiffies) < HZ)
348 stats->rx_fps = (stats->rx_frags - stats->prev_rx_frags) /
349 ((now - stats->rx_fps_jiffies) / HZ);
351 stats->rx_fps_jiffies = now;
352 stats->prev_rx_frags = stats->rx_frags;
353 eqd = stats->rx_fps / 110000;
355 if (eqd > rx_eq->max_eqd)
356 eqd = rx_eq->max_eqd;
357 if (eqd < rx_eq->min_eqd)
358 eqd = rx_eq->min_eqd;
361 if (eqd != rx_eq->cur_eqd)
362 be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
364 rx_eq->cur_eqd = eqd;
367 static u32 be_calc_rate(u64 bytes, unsigned long ticks)
371 do_div(rate, ticks / HZ);
372 rate <<= 3; /* bytes/sec -> bits/sec */
373 do_div(rate, 1000000ul); /* MB/Sec */
378 static void be_tx_rate_update(struct be_adapter *adapter)
380 struct be_tx_stats *stats = tx_stats(adapter);
383 /* Wrapped around? */
384 if (time_before(now, stats->be_tx_jiffies)) {
385 stats->be_tx_jiffies = now;
389 /* Update tx rate once in two seconds */
390 if ((now - stats->be_tx_jiffies) > 2 * HZ) {
391 stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
392 - stats->be_tx_bytes_prev,
393 now - stats->be_tx_jiffies);
394 stats->be_tx_jiffies = now;
395 stats->be_tx_bytes_prev = stats->be_tx_bytes;
399 static void be_tx_stats_update(struct be_adapter *adapter,
400 u32 wrb_cnt, u32 copied, u32 gso_segs, bool stopped)
402 struct be_tx_stats *stats = tx_stats(adapter);
404 stats->be_tx_wrbs += wrb_cnt;
405 stats->be_tx_bytes += copied;
406 stats->be_tx_pkts += (gso_segs ? gso_segs : 1);
408 stats->be_tx_stops++;
411 /* Determine number of WRB entries needed to xmit data in an skb */
412 static u32 wrb_cnt_for_skb(struct be_adapter *adapter, struct sk_buff *skb,
415 int cnt = (skb->len > skb->data_len);
417 cnt += skb_shinfo(skb)->nr_frags;
419 /* to account for hdr wrb */
421 if (lancer_chip(adapter) || !(cnt & 1)) {
424 /* add a dummy to make it an even num */
428 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
432 static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
434 wrb->frag_pa_hi = upper_32_bits(addr);
435 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
436 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
439 static void wrb_fill_hdr(struct be_adapter *adapter, struct be_eth_hdr_wrb *hdr,
440 struct sk_buff *skb, u32 wrb_cnt, u32 len)
445 memset(hdr, 0, sizeof(*hdr));
447 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
449 if (skb_is_gso(skb)) {
450 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
451 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
452 hdr, skb_shinfo(skb)->gso_size);
453 if (skb_is_gso_v6(skb) && !lancer_chip(adapter))
454 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso6, hdr, 1);
455 if (lancer_chip(adapter) && adapter->sli_family ==
456 LANCER_A0_SLI_FAMILY) {
457 AMAP_SET_BITS(struct amap_eth_hdr_wrb, ipcs, hdr, 1);
459 AMAP_SET_BITS(struct amap_eth_hdr_wrb,
461 else if (is_udp_pkt(skb))
462 AMAP_SET_BITS(struct amap_eth_hdr_wrb,
465 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
467 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
468 else if (is_udp_pkt(skb))
469 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
472 if (adapter->vlan_grp && vlan_tx_tag_present(skb)) {
473 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
474 vlan_tag = vlan_tx_tag_get(skb);
475 vlan_prio = (vlan_tag & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
476 /* If vlan priority provided by OS is NOT in available bmap */
477 if (!(adapter->vlan_prio_bmap & (1 << vlan_prio)))
478 vlan_tag = (vlan_tag & ~VLAN_PRIO_MASK) |
479 adapter->recommended_prio;
480 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag, hdr, vlan_tag);
483 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
484 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
485 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
486 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
489 static void unmap_tx_frag(struct pci_dev *pdev, struct be_eth_wrb *wrb,
494 be_dws_le_to_cpu(wrb, sizeof(*wrb));
496 dma = (u64)wrb->frag_pa_hi << 32 | (u64)wrb->frag_pa_lo;
499 pci_unmap_single(pdev, dma, wrb->frag_len,
502 pci_unmap_page(pdev, dma, wrb->frag_len,
507 static int make_tx_wrbs(struct be_adapter *adapter,
508 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
512 struct pci_dev *pdev = adapter->pdev;
513 struct sk_buff *first_skb = skb;
514 struct be_queue_info *txq = &adapter->tx_obj.q;
515 struct be_eth_wrb *wrb;
516 struct be_eth_hdr_wrb *hdr;
517 bool map_single = false;
520 hdr = queue_head_node(txq);
522 map_head = txq->head;
524 if (skb->len > skb->data_len) {
525 int len = skb_headlen(skb);
526 busaddr = pci_map_single(pdev, skb->data, len,
528 if (pci_dma_mapping_error(pdev, busaddr))
531 wrb = queue_head_node(txq);
532 wrb_fill(wrb, busaddr, len);
533 be_dws_cpu_to_le(wrb, sizeof(*wrb));
538 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
539 struct skb_frag_struct *frag =
540 &skb_shinfo(skb)->frags[i];
541 busaddr = pci_map_page(pdev, frag->page,
543 frag->size, PCI_DMA_TODEVICE);
544 if (pci_dma_mapping_error(pdev, busaddr))
546 wrb = queue_head_node(txq);
547 wrb_fill(wrb, busaddr, frag->size);
548 be_dws_cpu_to_le(wrb, sizeof(*wrb));
550 copied += frag->size;
554 wrb = queue_head_node(txq);
556 be_dws_cpu_to_le(wrb, sizeof(*wrb));
560 wrb_fill_hdr(adapter, hdr, first_skb, wrb_cnt, copied);
561 be_dws_cpu_to_le(hdr, sizeof(*hdr));
565 txq->head = map_head;
567 wrb = queue_head_node(txq);
568 unmap_tx_frag(pdev, wrb, map_single);
570 copied -= wrb->frag_len;
576 static netdev_tx_t be_xmit(struct sk_buff *skb,
577 struct net_device *netdev)
579 struct be_adapter *adapter = netdev_priv(netdev);
580 struct be_tx_obj *tx_obj = &adapter->tx_obj;
581 struct be_queue_info *txq = &tx_obj->q;
582 u32 wrb_cnt = 0, copied = 0;
583 u32 start = txq->head;
584 bool dummy_wrb, stopped = false;
586 wrb_cnt = wrb_cnt_for_skb(adapter, skb, &dummy_wrb);
588 copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
590 /* record the sent skb in the sent_skb table */
591 BUG_ON(tx_obj->sent_skb_list[start]);
592 tx_obj->sent_skb_list[start] = skb;
594 /* Ensure txq has space for the next skb; Else stop the queue
595 * *BEFORE* ringing the tx doorbell, so that we serialze the
596 * tx compls of the current transmit which'll wake up the queue
598 atomic_add(wrb_cnt, &txq->used);
599 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
601 netif_stop_queue(netdev);
605 be_txq_notify(adapter, txq->id, wrb_cnt);
607 be_tx_stats_update(adapter, wrb_cnt, copied,
608 skb_shinfo(skb)->gso_segs, stopped);
611 dev_kfree_skb_any(skb);
616 static int be_change_mtu(struct net_device *netdev, int new_mtu)
618 struct be_adapter *adapter = netdev_priv(netdev);
619 if (new_mtu < BE_MIN_MTU ||
620 new_mtu > (BE_MAX_JUMBO_FRAME_SIZE -
621 (ETH_HLEN + ETH_FCS_LEN))) {
622 dev_info(&adapter->pdev->dev,
623 "MTU must be between %d and %d bytes\n",
625 (BE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN)));
628 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
629 netdev->mtu, new_mtu);
630 netdev->mtu = new_mtu;
635 * A max of 64 (BE_NUM_VLANS_SUPPORTED) vlans can be configured in BE.
636 * If the user configures more, place BE in vlan promiscuous mode.
638 static int be_vid_config(struct be_adapter *adapter, bool vf, u32 vf_num)
640 u16 vtag[BE_NUM_VLANS_SUPPORTED];
646 if_handle = adapter->vf_cfg[vf_num].vf_if_handle;
647 vtag[0] = cpu_to_le16(adapter->vf_cfg[vf_num].vf_vlan_tag);
648 status = be_cmd_vlan_config(adapter, if_handle, vtag, 1, 1, 0);
651 if (adapter->vlans_added <= adapter->max_vlans) {
652 /* Construct VLAN Table to give to HW */
653 for (i = 0; i < VLAN_N_VID; i++) {
654 if (adapter->vlan_tag[i]) {
655 vtag[ntags] = cpu_to_le16(i);
659 status = be_cmd_vlan_config(adapter, adapter->if_handle,
662 status = be_cmd_vlan_config(adapter, adapter->if_handle,
669 static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
671 struct be_adapter *adapter = netdev_priv(netdev);
673 adapter->vlan_grp = grp;
676 static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
678 struct be_adapter *adapter = netdev_priv(netdev);
680 adapter->vlans_added++;
681 if (!be_physfn(adapter))
684 adapter->vlan_tag[vid] = 1;
685 if (adapter->vlans_added <= (adapter->max_vlans + 1))
686 be_vid_config(adapter, false, 0);
689 static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
691 struct be_adapter *adapter = netdev_priv(netdev);
693 adapter->vlans_added--;
694 vlan_group_set_device(adapter->vlan_grp, vid, NULL);
696 if (!be_physfn(adapter))
699 adapter->vlan_tag[vid] = 0;
700 if (adapter->vlans_added <= adapter->max_vlans)
701 be_vid_config(adapter, false, 0);
704 static void be_set_multicast_list(struct net_device *netdev)
706 struct be_adapter *adapter = netdev_priv(netdev);
708 if (netdev->flags & IFF_PROMISC) {
709 be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
710 adapter->promiscuous = true;
714 /* BE was previously in promiscous mode; disable it */
715 if (adapter->promiscuous) {
716 adapter->promiscuous = false;
717 be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
720 /* Enable multicast promisc if num configured exceeds what we support */
721 if (netdev->flags & IFF_ALLMULTI ||
722 netdev_mc_count(netdev) > BE_MAX_MC) {
723 be_cmd_multicast_set(adapter, adapter->if_handle, NULL,
724 &adapter->mc_cmd_mem);
728 be_cmd_multicast_set(adapter, adapter->if_handle, netdev,
729 &adapter->mc_cmd_mem);
734 static int be_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
736 struct be_adapter *adapter = netdev_priv(netdev);
739 if (!adapter->sriov_enabled)
742 if (!is_valid_ether_addr(mac) || (vf >= num_vfs))
745 if (adapter->vf_cfg[vf].vf_pmac_id != BE_INVALID_PMAC_ID)
746 status = be_cmd_pmac_del(adapter,
747 adapter->vf_cfg[vf].vf_if_handle,
748 adapter->vf_cfg[vf].vf_pmac_id);
750 status = be_cmd_pmac_add(adapter, mac,
751 adapter->vf_cfg[vf].vf_if_handle,
752 &adapter->vf_cfg[vf].vf_pmac_id);
755 dev_err(&adapter->pdev->dev, "MAC %pM set on VF %d Failed\n",
758 memcpy(adapter->vf_cfg[vf].vf_mac_addr, mac, ETH_ALEN);
763 static int be_get_vf_config(struct net_device *netdev, int vf,
764 struct ifla_vf_info *vi)
766 struct be_adapter *adapter = netdev_priv(netdev);
768 if (!adapter->sriov_enabled)
775 vi->tx_rate = adapter->vf_cfg[vf].vf_tx_rate;
776 vi->vlan = adapter->vf_cfg[vf].vf_vlan_tag;
778 memcpy(&vi->mac, adapter->vf_cfg[vf].vf_mac_addr, ETH_ALEN);
783 static int be_set_vf_vlan(struct net_device *netdev,
784 int vf, u16 vlan, u8 qos)
786 struct be_adapter *adapter = netdev_priv(netdev);
789 if (!adapter->sriov_enabled)
792 if ((vf >= num_vfs) || (vlan > 4095))
796 adapter->vf_cfg[vf].vf_vlan_tag = vlan;
797 adapter->vlans_added++;
799 adapter->vf_cfg[vf].vf_vlan_tag = 0;
800 adapter->vlans_added--;
803 status = be_vid_config(adapter, true, vf);
806 dev_info(&adapter->pdev->dev,
807 "VLAN %d config on VF %d failed\n", vlan, vf);
811 static int be_set_vf_tx_rate(struct net_device *netdev,
814 struct be_adapter *adapter = netdev_priv(netdev);
817 if (!adapter->sriov_enabled)
820 if ((vf >= num_vfs) || (rate < 0))
826 adapter->vf_cfg[vf].vf_tx_rate = rate;
827 status = be_cmd_set_qos(adapter, rate / 10, vf);
830 dev_info(&adapter->pdev->dev,
831 "tx rate %d on VF %d failed\n", rate, vf);
835 static void be_rx_rate_update(struct be_rx_obj *rxo)
837 struct be_rx_stats *stats = &rxo->stats;
841 if (time_before(now, stats->rx_jiffies)) {
842 stats->rx_jiffies = now;
846 /* Update the rate once in two seconds */
847 if ((now - stats->rx_jiffies) < 2 * HZ)
850 stats->rx_rate = be_calc_rate(stats->rx_bytes - stats->rx_bytes_prev,
851 now - stats->rx_jiffies);
852 stats->rx_jiffies = now;
853 stats->rx_bytes_prev = stats->rx_bytes;
856 static void be_rx_stats_update(struct be_rx_obj *rxo,
857 u32 pktsize, u16 numfrags, u8 pkt_type)
859 struct be_rx_stats *stats = &rxo->stats;
862 stats->rx_frags += numfrags;
863 stats->rx_bytes += pktsize;
865 if (pkt_type == BE_MULTICAST_PACKET)
866 stats->rx_mcast_pkts++;
869 static inline bool csum_passed(struct be_eth_rx_compl *rxcp)
871 u8 l4_cksm, ipv6, ipcksm;
873 l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
874 ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
875 ipv6 = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
877 /* Ignore ipcksm for ipv6 pkts */
878 return l4_cksm && (ipcksm || ipv6);
881 static struct be_rx_page_info *
882 get_rx_page_info(struct be_adapter *adapter,
883 struct be_rx_obj *rxo,
886 struct be_rx_page_info *rx_page_info;
887 struct be_queue_info *rxq = &rxo->q;
889 rx_page_info = &rxo->page_info_tbl[frag_idx];
890 BUG_ON(!rx_page_info->page);
892 if (rx_page_info->last_page_user) {
893 pci_unmap_page(adapter->pdev, dma_unmap_addr(rx_page_info, bus),
894 adapter->big_page_size, PCI_DMA_FROMDEVICE);
895 rx_page_info->last_page_user = false;
898 atomic_dec(&rxq->used);
902 /* Throwaway the data in the Rx completion */
903 static void be_rx_compl_discard(struct be_adapter *adapter,
904 struct be_rx_obj *rxo,
905 struct be_eth_rx_compl *rxcp)
907 struct be_queue_info *rxq = &rxo->q;
908 struct be_rx_page_info *page_info;
909 u16 rxq_idx, i, num_rcvd;
911 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
912 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
914 for (i = 0; i < num_rcvd; i++) {
915 page_info = get_rx_page_info(adapter, rxo, rxq_idx);
916 put_page(page_info->page);
917 memset(page_info, 0, sizeof(*page_info));
918 index_inc(&rxq_idx, rxq->len);
923 * skb_fill_rx_data forms a complete skb for an ether frame
926 static void skb_fill_rx_data(struct be_adapter *adapter, struct be_rx_obj *rxo,
927 struct sk_buff *skb, struct be_eth_rx_compl *rxcp,
930 struct be_queue_info *rxq = &rxo->q;
931 struct be_rx_page_info *page_info;
933 u32 pktsize, hdr_len, curr_frag_len, size;
937 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
938 pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
939 pkt_type = AMAP_GET_BITS(struct amap_eth_rx_compl, cast_enc, rxcp);
941 page_info = get_rx_page_info(adapter, rxo, rxq_idx);
943 start = page_address(page_info->page) + page_info->page_offset;
946 /* Copy data in the first descriptor of this completion */
947 curr_frag_len = min(pktsize, rx_frag_size);
949 /* Copy the header portion into skb_data */
950 hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
951 memcpy(skb->data, start, hdr_len);
952 skb->len = curr_frag_len;
953 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
954 /* Complete packet has now been moved to data */
955 put_page(page_info->page);
957 skb->tail += curr_frag_len;
959 skb_shinfo(skb)->nr_frags = 1;
960 skb_shinfo(skb)->frags[0].page = page_info->page;
961 skb_shinfo(skb)->frags[0].page_offset =
962 page_info->page_offset + hdr_len;
963 skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
964 skb->data_len = curr_frag_len - hdr_len;
965 skb->tail += hdr_len;
967 page_info->page = NULL;
969 if (pktsize <= rx_frag_size) {
970 BUG_ON(num_rcvd != 1);
974 /* More frags present for this completion */
976 for (i = 1, j = 0; i < num_rcvd; i++) {
977 size -= curr_frag_len;
978 index_inc(&rxq_idx, rxq->len);
979 page_info = get_rx_page_info(adapter, rxo, rxq_idx);
981 curr_frag_len = min(size, rx_frag_size);
983 /* Coalesce all frags from the same physical page in one slot */
984 if (page_info->page_offset == 0) {
987 skb_shinfo(skb)->frags[j].page = page_info->page;
988 skb_shinfo(skb)->frags[j].page_offset =
989 page_info->page_offset;
990 skb_shinfo(skb)->frags[j].size = 0;
991 skb_shinfo(skb)->nr_frags++;
993 put_page(page_info->page);
996 skb_shinfo(skb)->frags[j].size += curr_frag_len;
997 skb->len += curr_frag_len;
998 skb->data_len += curr_frag_len;
1000 page_info->page = NULL;
1002 BUG_ON(j > MAX_SKB_FRAGS);
1005 be_rx_stats_update(rxo, pktsize, num_rcvd, pkt_type);
1008 /* Process the RX completion indicated by rxcp when GRO is disabled */
1009 static void be_rx_compl_process(struct be_adapter *adapter,
1010 struct be_rx_obj *rxo,
1011 struct be_eth_rx_compl *rxcp)
1013 struct sk_buff *skb;
1018 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
1019 /* Is it a flush compl that has no data */
1020 if (unlikely(num_rcvd == 0))
1023 skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
1024 if (unlikely(!skb)) {
1025 if (net_ratelimit())
1026 dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
1027 be_rx_compl_discard(adapter, rxo, rxcp);
1031 skb_fill_rx_data(adapter, rxo, skb, rxcp, num_rcvd);
1033 if (likely(adapter->rx_csum && csum_passed(rxcp)))
1034 skb->ip_summed = CHECKSUM_UNNECESSARY;
1036 skb_checksum_none_assert(skb);
1038 skb->truesize = skb->len + sizeof(struct sk_buff);
1039 skb->protocol = eth_type_trans(skb, adapter->netdev);
1041 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
1042 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
1044 /* vlanf could be wrongly set in some cards.
1045 * ignore if vtm is not set */
1046 if ((adapter->function_mode & 0x400) && !vtm)
1049 if (unlikely(vlanf)) {
1050 if (!adapter->vlan_grp || adapter->vlans_added == 0) {
1054 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
1055 if (!lancer_chip(adapter))
1057 vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
1059 netif_receive_skb(skb);
1063 /* Process the RX completion indicated by rxcp when GRO is enabled */
1064 static void be_rx_compl_process_gro(struct be_adapter *adapter,
1065 struct be_rx_obj *rxo,
1066 struct be_eth_rx_compl *rxcp)
1068 struct be_rx_page_info *page_info;
1069 struct sk_buff *skb = NULL;
1070 struct be_queue_info *rxq = &rxo->q;
1071 struct be_eq_obj *eq_obj = &rxo->rx_eq;
1072 u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
1073 u16 i, rxq_idx = 0, vid, j;
1077 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
1078 /* Is it a flush compl that has no data */
1079 if (unlikely(num_rcvd == 0))
1082 pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
1083 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
1084 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
1085 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
1086 pkt_type = AMAP_GET_BITS(struct amap_eth_rx_compl, cast_enc, rxcp);
1088 /* vlanf could be wrongly set in some cards.
1089 * ignore if vtm is not set */
1090 if ((adapter->function_mode & 0x400) && !vtm)
1093 skb = napi_get_frags(&eq_obj->napi);
1095 be_rx_compl_discard(adapter, rxo, rxcp);
1099 remaining = pkt_size;
1100 for (i = 0, j = -1; i < num_rcvd; i++) {
1101 page_info = get_rx_page_info(adapter, rxo, rxq_idx);
1103 curr_frag_len = min(remaining, rx_frag_size);
1105 /* Coalesce all frags from the same physical page in one slot */
1106 if (i == 0 || page_info->page_offset == 0) {
1107 /* First frag or Fresh page */
1109 skb_shinfo(skb)->frags[j].page = page_info->page;
1110 skb_shinfo(skb)->frags[j].page_offset =
1111 page_info->page_offset;
1112 skb_shinfo(skb)->frags[j].size = 0;
1114 put_page(page_info->page);
1116 skb_shinfo(skb)->frags[j].size += curr_frag_len;
1118 remaining -= curr_frag_len;
1119 index_inc(&rxq_idx, rxq->len);
1120 memset(page_info, 0, sizeof(*page_info));
1122 BUG_ON(j > MAX_SKB_FRAGS);
1124 skb_shinfo(skb)->nr_frags = j + 1;
1125 skb->len = pkt_size;
1126 skb->data_len = pkt_size;
1127 skb->truesize += pkt_size;
1128 skb->ip_summed = CHECKSUM_UNNECESSARY;
1130 if (likely(!vlanf)) {
1131 napi_gro_frags(&eq_obj->napi);
1133 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
1134 if (!lancer_chip(adapter))
1137 if (!adapter->vlan_grp || adapter->vlans_added == 0)
1140 vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
1143 be_rx_stats_update(rxo, pkt_size, num_rcvd, pkt_type);
1146 static struct be_eth_rx_compl *be_rx_compl_get(struct be_rx_obj *rxo)
1148 struct be_eth_rx_compl *rxcp = queue_tail_node(&rxo->cq);
1150 if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
1154 be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
1156 queue_tail_inc(&rxo->cq);
1160 /* To reset the valid bit, we need to reset the whole word as
1161 * when walking the queue the valid entries are little-endian
1162 * and invalid entries are host endian
1164 static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
1166 rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
1169 static inline struct page *be_alloc_pages(u32 size)
1171 gfp_t alloc_flags = GFP_ATOMIC;
1172 u32 order = get_order(size);
1174 alloc_flags |= __GFP_COMP;
1175 return alloc_pages(alloc_flags, order);
1179 * Allocate a page, split it to fragments of size rx_frag_size and post as
1180 * receive buffers to BE
1182 static void be_post_rx_frags(struct be_rx_obj *rxo)
1184 struct be_adapter *adapter = rxo->adapter;
1185 struct be_rx_page_info *page_info_tbl = rxo->page_info_tbl;
1186 struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
1187 struct be_queue_info *rxq = &rxo->q;
1188 struct page *pagep = NULL;
1189 struct be_eth_rx_d *rxd;
1190 u64 page_dmaaddr = 0, frag_dmaaddr;
1191 u32 posted, page_offset = 0;
1193 page_info = &rxo->page_info_tbl[rxq->head];
1194 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
1196 pagep = be_alloc_pages(adapter->big_page_size);
1197 if (unlikely(!pagep)) {
1198 rxo->stats.rx_post_fail++;
1201 page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
1202 adapter->big_page_size,
1203 PCI_DMA_FROMDEVICE);
1204 page_info->page_offset = 0;
1207 page_info->page_offset = page_offset + rx_frag_size;
1209 page_offset = page_info->page_offset;
1210 page_info->page = pagep;
1211 dma_unmap_addr_set(page_info, bus, page_dmaaddr);
1212 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
1214 rxd = queue_head_node(rxq);
1215 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
1216 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
1218 /* Any space left in the current big page for another frag? */
1219 if ((page_offset + rx_frag_size + rx_frag_size) >
1220 adapter->big_page_size) {
1222 page_info->last_page_user = true;
1225 prev_page_info = page_info;
1226 queue_head_inc(rxq);
1227 page_info = &page_info_tbl[rxq->head];
1230 prev_page_info->last_page_user = true;
1233 atomic_add(posted, &rxq->used);
1234 be_rxq_notify(adapter, rxq->id, posted);
1235 } else if (atomic_read(&rxq->used) == 0) {
1236 /* Let be_worker replenish when memory is available */
1237 rxo->rx_post_starved = true;
1241 static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
1243 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
1245 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
1249 be_dws_le_to_cpu(txcp, sizeof(*txcp));
1251 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
1253 queue_tail_inc(tx_cq);
1257 static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
1259 struct be_queue_info *txq = &adapter->tx_obj.q;
1260 struct be_eth_wrb *wrb;
1261 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
1262 struct sk_buff *sent_skb;
1263 u16 cur_index, num_wrbs = 1; /* account for hdr wrb */
1264 bool unmap_skb_hdr = true;
1266 sent_skb = sent_skbs[txq->tail];
1268 sent_skbs[txq->tail] = NULL;
1270 /* skip header wrb */
1271 queue_tail_inc(txq);
1274 cur_index = txq->tail;
1275 wrb = queue_tail_node(txq);
1276 unmap_tx_frag(adapter->pdev, wrb, (unmap_skb_hdr &&
1277 skb_headlen(sent_skb)));
1278 unmap_skb_hdr = false;
1281 queue_tail_inc(txq);
1282 } while (cur_index != last_index);
1284 atomic_sub(num_wrbs, &txq->used);
1286 kfree_skb(sent_skb);
1289 static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
1291 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1297 eqe->evt = le32_to_cpu(eqe->evt);
1298 queue_tail_inc(&eq_obj->q);
1302 static int event_handle(struct be_adapter *adapter,
1303 struct be_eq_obj *eq_obj)
1305 struct be_eq_entry *eqe;
1308 while ((eqe = event_get(eq_obj)) != NULL) {
1313 /* Deal with any spurious interrupts that come
1316 be_eq_notify(adapter, eq_obj->q.id, true, true, num);
1318 napi_schedule(&eq_obj->napi);
1323 /* Just read and notify events without processing them.
1324 * Used at the time of destroying event queues */
1325 static void be_eq_clean(struct be_adapter *adapter,
1326 struct be_eq_obj *eq_obj)
1328 struct be_eq_entry *eqe;
1331 while ((eqe = event_get(eq_obj)) != NULL) {
1337 be_eq_notify(adapter, eq_obj->q.id, false, true, num);
1340 static void be_rx_q_clean(struct be_adapter *adapter, struct be_rx_obj *rxo)
1342 struct be_rx_page_info *page_info;
1343 struct be_queue_info *rxq = &rxo->q;
1344 struct be_queue_info *rx_cq = &rxo->cq;
1345 struct be_eth_rx_compl *rxcp;
1348 /* First cleanup pending rx completions */
1349 while ((rxcp = be_rx_compl_get(rxo)) != NULL) {
1350 be_rx_compl_discard(adapter, rxo, rxcp);
1351 be_rx_compl_reset(rxcp);
1352 be_cq_notify(adapter, rx_cq->id, true, 1);
1355 /* Then free posted rx buffer that were not used */
1356 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
1357 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
1358 page_info = get_rx_page_info(adapter, rxo, tail);
1359 put_page(page_info->page);
1360 memset(page_info, 0, sizeof(*page_info));
1362 BUG_ON(atomic_read(&rxq->used));
1365 static void be_tx_compl_clean(struct be_adapter *adapter)
1367 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
1368 struct be_queue_info *txq = &adapter->tx_obj.q;
1369 struct be_eth_tx_compl *txcp;
1370 u16 end_idx, cmpl = 0, timeo = 0;
1371 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
1372 struct sk_buff *sent_skb;
1375 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1377 while ((txcp = be_tx_compl_get(tx_cq))) {
1378 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1380 be_tx_compl_process(adapter, end_idx);
1384 be_cq_notify(adapter, tx_cq->id, false, cmpl);
1388 if (atomic_read(&txq->used) == 0 || ++timeo > 200)
1394 if (atomic_read(&txq->used))
1395 dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
1396 atomic_read(&txq->used));
1398 /* free posted tx for which compls will never arrive */
1399 while (atomic_read(&txq->used)) {
1400 sent_skb = sent_skbs[txq->tail];
1401 end_idx = txq->tail;
1403 wrb_cnt_for_skb(adapter, sent_skb, &dummy_wrb) - 1,
1405 be_tx_compl_process(adapter, end_idx);
1409 static void be_mcc_queues_destroy(struct be_adapter *adapter)
1411 struct be_queue_info *q;
1413 q = &adapter->mcc_obj.q;
1415 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
1416 be_queue_free(adapter, q);
1418 q = &adapter->mcc_obj.cq;
1420 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1421 be_queue_free(adapter, q);
1424 /* Must be called only after TX qs are created as MCC shares TX EQ */
1425 static int be_mcc_queues_create(struct be_adapter *adapter)
1427 struct be_queue_info *q, *cq;
1429 /* Alloc MCC compl queue */
1430 cq = &adapter->mcc_obj.cq;
1431 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
1432 sizeof(struct be_mcc_compl)))
1435 /* Ask BE to create MCC compl queue; share TX's eq */
1436 if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
1439 /* Alloc MCC queue */
1440 q = &adapter->mcc_obj.q;
1441 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1442 goto mcc_cq_destroy;
1444 /* Ask BE to create MCC queue */
1445 if (be_cmd_mccq_create(adapter, q, cq))
1451 be_queue_free(adapter, q);
1453 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1455 be_queue_free(adapter, cq);
1460 static void be_tx_queues_destroy(struct be_adapter *adapter)
1462 struct be_queue_info *q;
1464 q = &adapter->tx_obj.q;
1466 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
1467 be_queue_free(adapter, q);
1469 q = &adapter->tx_obj.cq;
1471 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1472 be_queue_free(adapter, q);
1474 /* Clear any residual events */
1475 be_eq_clean(adapter, &adapter->tx_eq);
1477 q = &adapter->tx_eq.q;
1479 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
1480 be_queue_free(adapter, q);
1483 static int be_tx_queues_create(struct be_adapter *adapter)
1485 struct be_queue_info *eq, *q, *cq;
1487 adapter->tx_eq.max_eqd = 0;
1488 adapter->tx_eq.min_eqd = 0;
1489 adapter->tx_eq.cur_eqd = 96;
1490 adapter->tx_eq.enable_aic = false;
1491 /* Alloc Tx Event queue */
1492 eq = &adapter->tx_eq.q;
1493 if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
1496 /* Ask BE to create Tx Event queue */
1497 if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
1500 adapter->tx_eq.msix_vec_idx = adapter->msix_vec_next_idx++;
1503 /* Alloc TX eth compl queue */
1504 cq = &adapter->tx_obj.cq;
1505 if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
1506 sizeof(struct be_eth_tx_compl)))
1509 /* Ask BE to create Tx eth compl queue */
1510 if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
1513 /* Alloc TX eth queue */
1514 q = &adapter->tx_obj.q;
1515 if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
1518 /* Ask BE to create Tx eth queue */
1519 if (be_cmd_txq_create(adapter, q, cq))
1524 be_queue_free(adapter, q);
1526 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1528 be_queue_free(adapter, cq);
1530 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
1532 be_queue_free(adapter, eq);
1536 static void be_rx_queues_destroy(struct be_adapter *adapter)
1538 struct be_queue_info *q;
1539 struct be_rx_obj *rxo;
1542 for_all_rx_queues(adapter, rxo, i) {
1545 be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
1546 /* After the rxq is invalidated, wait for a grace time
1547 * of 1ms for all dma to end and the flush compl to
1551 be_rx_q_clean(adapter, rxo);
1553 be_queue_free(adapter, q);
1557 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1558 be_queue_free(adapter, q);
1560 /* Clear any residual events */
1563 be_eq_clean(adapter, &rxo->rx_eq);
1564 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
1566 be_queue_free(adapter, q);
1570 static int be_rx_queues_create(struct be_adapter *adapter)
1572 struct be_queue_info *eq, *q, *cq;
1573 struct be_rx_obj *rxo;
1576 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1577 for_all_rx_queues(adapter, rxo, i) {
1578 rxo->adapter = adapter;
1579 rxo->rx_eq.max_eqd = BE_MAX_EQD;
1580 rxo->rx_eq.enable_aic = true;
1584 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1585 sizeof(struct be_eq_entry));
1589 rc = be_cmd_eq_create(adapter, eq, rxo->rx_eq.cur_eqd);
1593 rxo->rx_eq.msix_vec_idx = adapter->msix_vec_next_idx++;
1597 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1598 sizeof(struct be_eth_rx_compl));
1602 rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
1607 rc = be_queue_alloc(adapter, q, RX_Q_LEN,
1608 sizeof(struct be_eth_rx_d));
1612 rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
1613 BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle,
1614 (i > 0) ? 1 : 0/* rss enable */, &rxo->rss_id);
1619 if (be_multi_rxq(adapter)) {
1620 u8 rsstable[MAX_RSS_QS];
1622 for_all_rss_queues(adapter, rxo, i)
1623 rsstable[i] = rxo->rss_id;
1625 rc = be_cmd_rss_config(adapter, rsstable,
1626 adapter->num_rx_qs - 1);
1633 be_rx_queues_destroy(adapter);
1637 static bool event_peek(struct be_eq_obj *eq_obj)
1639 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1646 static irqreturn_t be_intx(int irq, void *dev)
1648 struct be_adapter *adapter = dev;
1649 struct be_rx_obj *rxo;
1650 int isr, i, tx = 0 , rx = 0;
1652 if (lancer_chip(adapter)) {
1653 if (event_peek(&adapter->tx_eq))
1654 tx = event_handle(adapter, &adapter->tx_eq);
1655 for_all_rx_queues(adapter, rxo, i) {
1656 if (event_peek(&rxo->rx_eq))
1657 rx |= event_handle(adapter, &rxo->rx_eq);
1664 isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
1665 (adapter->tx_eq.q.id / 8) * CEV_ISR_SIZE);
1669 if ((1 << adapter->tx_eq.msix_vec_idx & isr))
1670 event_handle(adapter, &adapter->tx_eq);
1672 for_all_rx_queues(adapter, rxo, i) {
1673 if ((1 << rxo->rx_eq.msix_vec_idx & isr))
1674 event_handle(adapter, &rxo->rx_eq);
1681 static irqreturn_t be_msix_rx(int irq, void *dev)
1683 struct be_rx_obj *rxo = dev;
1684 struct be_adapter *adapter = rxo->adapter;
1686 event_handle(adapter, &rxo->rx_eq);
1691 static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
1693 struct be_adapter *adapter = dev;
1695 event_handle(adapter, &adapter->tx_eq);
1700 static inline bool do_gro(struct be_adapter *adapter, struct be_rx_obj *rxo,
1701 struct be_eth_rx_compl *rxcp)
1703 int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
1704 int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
1707 rxo->stats.rxcp_err++;
1709 return (tcp_frame && !err) ? true : false;
1712 static int be_poll_rx(struct napi_struct *napi, int budget)
1714 struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
1715 struct be_rx_obj *rxo = container_of(rx_eq, struct be_rx_obj, rx_eq);
1716 struct be_adapter *adapter = rxo->adapter;
1717 struct be_queue_info *rx_cq = &rxo->cq;
1718 struct be_eth_rx_compl *rxcp;
1721 rxo->stats.rx_polls++;
1722 for (work_done = 0; work_done < budget; work_done++) {
1723 rxcp = be_rx_compl_get(rxo);
1727 if (do_gro(adapter, rxo, rxcp))
1728 be_rx_compl_process_gro(adapter, rxo, rxcp);
1730 be_rx_compl_process(adapter, rxo, rxcp);
1732 be_rx_compl_reset(rxcp);
1735 /* Refill the queue */
1736 if (atomic_read(&rxo->q.used) < RX_FRAGS_REFILL_WM)
1737 be_post_rx_frags(rxo);
1740 if (work_done < budget) {
1741 napi_complete(napi);
1742 be_cq_notify(adapter, rx_cq->id, true, work_done);
1744 /* More to be consumed; continue with interrupts disabled */
1745 be_cq_notify(adapter, rx_cq->id, false, work_done);
1750 /* As TX and MCC share the same EQ check for both TX and MCC completions.
1751 * For TX/MCC we don't honour budget; consume everything
1753 static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
1755 struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
1756 struct be_adapter *adapter =
1757 container_of(tx_eq, struct be_adapter, tx_eq);
1758 struct be_queue_info *txq = &adapter->tx_obj.q;
1759 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
1760 struct be_eth_tx_compl *txcp;
1761 int tx_compl = 0, mcc_compl, status = 0;
1764 while ((txcp = be_tx_compl_get(tx_cq))) {
1765 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1767 be_tx_compl_process(adapter, end_idx);
1771 mcc_compl = be_process_mcc(adapter, &status);
1773 napi_complete(napi);
1776 struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
1777 be_cq_notify(adapter, mcc_obj->cq.id, true, mcc_compl);
1781 be_cq_notify(adapter, adapter->tx_obj.cq.id, true, tx_compl);
1783 /* As Tx wrbs have been freed up, wake up netdev queue if
1784 * it was stopped due to lack of tx wrbs.
1786 if (netif_queue_stopped(adapter->netdev) &&
1787 atomic_read(&txq->used) < txq->len / 2) {
1788 netif_wake_queue(adapter->netdev);
1791 tx_stats(adapter)->be_tx_events++;
1792 tx_stats(adapter)->be_tx_compl += tx_compl;
1798 void be_detect_dump_ue(struct be_adapter *adapter)
1800 u32 ue_status_lo, ue_status_hi, ue_status_lo_mask, ue_status_hi_mask;
1803 pci_read_config_dword(adapter->pdev,
1804 PCICFG_UE_STATUS_LOW, &ue_status_lo);
1805 pci_read_config_dword(adapter->pdev,
1806 PCICFG_UE_STATUS_HIGH, &ue_status_hi);
1807 pci_read_config_dword(adapter->pdev,
1808 PCICFG_UE_STATUS_LOW_MASK, &ue_status_lo_mask);
1809 pci_read_config_dword(adapter->pdev,
1810 PCICFG_UE_STATUS_HI_MASK, &ue_status_hi_mask);
1812 ue_status_lo = (ue_status_lo & (~ue_status_lo_mask));
1813 ue_status_hi = (ue_status_hi & (~ue_status_hi_mask));
1815 if (ue_status_lo || ue_status_hi) {
1816 adapter->ue_detected = true;
1817 dev_err(&adapter->pdev->dev, "UE Detected!!\n");
1821 for (i = 0; ue_status_lo; ue_status_lo >>= 1, i++) {
1822 if (ue_status_lo & 1)
1823 dev_err(&adapter->pdev->dev,
1824 "UE: %s bit set\n", ue_status_low_desc[i]);
1828 for (i = 0; ue_status_hi; ue_status_hi >>= 1, i++) {
1829 if (ue_status_hi & 1)
1830 dev_err(&adapter->pdev->dev,
1831 "UE: %s bit set\n", ue_status_hi_desc[i]);
1837 static void be_worker(struct work_struct *work)
1839 struct be_adapter *adapter =
1840 container_of(work, struct be_adapter, work.work);
1841 struct be_rx_obj *rxo;
1844 /* when interrupts are not yet enabled, just reap any pending
1845 * mcc completions */
1846 if (!netif_running(adapter->netdev)) {
1847 int mcc_compl, status = 0;
1849 mcc_compl = be_process_mcc(adapter, &status);
1852 struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
1853 be_cq_notify(adapter, mcc_obj->cq.id, false, mcc_compl);
1858 if (!adapter->stats_ioctl_sent)
1859 be_cmd_get_stats(adapter, &adapter->stats_cmd);
1861 be_tx_rate_update(adapter);
1863 for_all_rx_queues(adapter, rxo, i) {
1864 be_rx_rate_update(rxo);
1865 be_rx_eqd_update(adapter, rxo);
1867 if (rxo->rx_post_starved) {
1868 rxo->rx_post_starved = false;
1869 be_post_rx_frags(rxo);
1872 if (!adapter->ue_detected && !lancer_chip(adapter))
1873 be_detect_dump_ue(adapter);
1876 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
1879 static void be_msix_disable(struct be_adapter *adapter)
1881 if (adapter->msix_enabled) {
1882 pci_disable_msix(adapter->pdev);
1883 adapter->msix_enabled = false;
1887 static int be_num_rxqs_get(struct be_adapter *adapter)
1889 if (multi_rxq && (adapter->function_caps & BE_FUNCTION_CAPS_RSS) &&
1890 !adapter->sriov_enabled && !(adapter->function_mode & 0x400)) {
1891 return 1 + MAX_RSS_QS; /* one default non-RSS queue */
1893 dev_warn(&adapter->pdev->dev,
1894 "No support for multiple RX queues\n");
1899 static void be_msix_enable(struct be_adapter *adapter)
1901 #define BE_MIN_MSIX_VECTORS (1 + 1) /* Rx + Tx */
1904 adapter->num_rx_qs = be_num_rxqs_get(adapter);
1906 for (i = 0; i < (adapter->num_rx_qs + 1); i++)
1907 adapter->msix_entries[i].entry = i;
1909 status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1910 adapter->num_rx_qs + 1);
1913 } else if (status >= BE_MIN_MSIX_VECTORS) {
1914 if (pci_enable_msix(adapter->pdev, adapter->msix_entries,
1916 adapter->num_rx_qs = status - 1;
1917 dev_warn(&adapter->pdev->dev,
1918 "Could alloc only %d MSIx vectors. "
1919 "Using %d RX Qs\n", status, adapter->num_rx_qs);
1925 adapter->msix_enabled = true;
1928 static void be_sriov_enable(struct be_adapter *adapter)
1930 be_check_sriov_fn_type(adapter);
1931 #ifdef CONFIG_PCI_IOV
1932 if (be_physfn(adapter) && num_vfs) {
1935 status = pci_enable_sriov(adapter->pdev, num_vfs);
1936 adapter->sriov_enabled = status ? false : true;
1941 static void be_sriov_disable(struct be_adapter *adapter)
1943 #ifdef CONFIG_PCI_IOV
1944 if (adapter->sriov_enabled) {
1945 pci_disable_sriov(adapter->pdev);
1946 adapter->sriov_enabled = false;
1951 static inline int be_msix_vec_get(struct be_adapter *adapter,
1952 struct be_eq_obj *eq_obj)
1954 return adapter->msix_entries[eq_obj->msix_vec_idx].vector;
1957 static int be_request_irq(struct be_adapter *adapter,
1958 struct be_eq_obj *eq_obj,
1959 void *handler, char *desc, void *context)
1961 struct net_device *netdev = adapter->netdev;
1964 sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
1965 vec = be_msix_vec_get(adapter, eq_obj);
1966 return request_irq(vec, handler, 0, eq_obj->desc, context);
1969 static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj,
1972 int vec = be_msix_vec_get(adapter, eq_obj);
1973 free_irq(vec, context);
1976 static int be_msix_register(struct be_adapter *adapter)
1978 struct be_rx_obj *rxo;
1982 status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx",
1987 for_all_rx_queues(adapter, rxo, i) {
1988 sprintf(qname, "rxq%d", i);
1989 status = be_request_irq(adapter, &rxo->rx_eq, be_msix_rx,
1998 be_free_irq(adapter, &adapter->tx_eq, adapter);
2000 for (i--, rxo = &adapter->rx_obj[i]; i >= 0; i--, rxo--)
2001 be_free_irq(adapter, &rxo->rx_eq, rxo);
2004 dev_warn(&adapter->pdev->dev,
2005 "MSIX Request IRQ failed - err %d\n", status);
2006 pci_disable_msix(adapter->pdev);
2007 adapter->msix_enabled = false;
2011 static int be_irq_register(struct be_adapter *adapter)
2013 struct net_device *netdev = adapter->netdev;
2016 if (adapter->msix_enabled) {
2017 status = be_msix_register(adapter);
2020 /* INTx is not supported for VF */
2021 if (!be_physfn(adapter))
2026 netdev->irq = adapter->pdev->irq;
2027 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
2030 dev_err(&adapter->pdev->dev,
2031 "INTx request IRQ failed - err %d\n", status);
2035 adapter->isr_registered = true;
2039 static void be_irq_unregister(struct be_adapter *adapter)
2041 struct net_device *netdev = adapter->netdev;
2042 struct be_rx_obj *rxo;
2045 if (!adapter->isr_registered)
2049 if (!adapter->msix_enabled) {
2050 free_irq(netdev->irq, adapter);
2055 be_free_irq(adapter, &adapter->tx_eq, adapter);
2057 for_all_rx_queues(adapter, rxo, i)
2058 be_free_irq(adapter, &rxo->rx_eq, rxo);
2061 adapter->isr_registered = false;
2064 static int be_close(struct net_device *netdev)
2066 struct be_adapter *adapter = netdev_priv(netdev);
2067 struct be_rx_obj *rxo;
2068 struct be_eq_obj *tx_eq = &adapter->tx_eq;
2071 be_async_mcc_disable(adapter);
2073 netif_stop_queue(netdev);
2074 netif_carrier_off(netdev);
2075 adapter->link_up = false;
2077 if (!lancer_chip(adapter))
2078 be_intr_set(adapter, false);
2080 if (adapter->msix_enabled) {
2081 vec = be_msix_vec_get(adapter, tx_eq);
2082 synchronize_irq(vec);
2084 for_all_rx_queues(adapter, rxo, i) {
2085 vec = be_msix_vec_get(adapter, &rxo->rx_eq);
2086 synchronize_irq(vec);
2089 synchronize_irq(netdev->irq);
2091 be_irq_unregister(adapter);
2093 for_all_rx_queues(adapter, rxo, i)
2094 napi_disable(&rxo->rx_eq.napi);
2096 napi_disable(&tx_eq->napi);
2098 /* Wait for all pending tx completions to arrive so that
2099 * all tx skbs are freed.
2101 be_tx_compl_clean(adapter);
2106 static int be_open(struct net_device *netdev)
2108 struct be_adapter *adapter = netdev_priv(netdev);
2109 struct be_eq_obj *tx_eq = &adapter->tx_eq;
2110 struct be_rx_obj *rxo;
2116 for_all_rx_queues(adapter, rxo, i) {
2117 be_post_rx_frags(rxo);
2118 napi_enable(&rxo->rx_eq.napi);
2120 napi_enable(&tx_eq->napi);
2122 be_irq_register(adapter);
2124 if (!lancer_chip(adapter))
2125 be_intr_set(adapter, true);
2127 /* The evt queues are created in unarmed state; arm them */
2128 for_all_rx_queues(adapter, rxo, i) {
2129 be_eq_notify(adapter, rxo->rx_eq.q.id, true, false, 0);
2130 be_cq_notify(adapter, rxo->cq.id, true, 0);
2132 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
2134 /* Now that interrupts are on we can process async mcc */
2135 be_async_mcc_enable(adapter);
2137 status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
2141 be_link_status_update(adapter, link_up);
2143 if (be_physfn(adapter)) {
2144 status = be_vid_config(adapter, false, 0);
2148 status = be_cmd_set_flow_control(adapter,
2149 adapter->tx_fc, adapter->rx_fc);
2156 be_close(adapter->netdev);
2160 static int be_setup_wol(struct be_adapter *adapter, bool enable)
2162 struct be_dma_mem cmd;
2166 memset(mac, 0, ETH_ALEN);
2168 cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
2169 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
2172 memset(cmd.va, 0, cmd.size);
2175 status = pci_write_config_dword(adapter->pdev,
2176 PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
2178 dev_err(&adapter->pdev->dev,
2179 "Could not enable Wake-on-lan\n");
2180 pci_free_consistent(adapter->pdev, cmd.size, cmd.va,
2184 status = be_cmd_enable_magic_wol(adapter,
2185 adapter->netdev->dev_addr, &cmd);
2186 pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
2187 pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
2189 status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
2190 pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
2191 pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
2194 pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
2199 * Generate a seed MAC address from the PF MAC Address using jhash.
2200 * MAC Address for VFs are assigned incrementally starting from the seed.
2201 * These addresses are programmed in the ASIC by the PF and the VF driver
2202 * queries for the MAC address during its probe.
2204 static inline int be_vf_eth_addr_config(struct be_adapter *adapter)
2210 be_vf_eth_addr_generate(adapter, mac);
2212 for (vf = 0; vf < num_vfs; vf++) {
2213 status = be_cmd_pmac_add(adapter, mac,
2214 adapter->vf_cfg[vf].vf_if_handle,
2215 &adapter->vf_cfg[vf].vf_pmac_id);
2217 dev_err(&adapter->pdev->dev,
2218 "Mac address add failed for VF %d\n", vf);
2220 memcpy(adapter->vf_cfg[vf].vf_mac_addr, mac, ETH_ALEN);
2227 static inline void be_vf_eth_addr_rem(struct be_adapter *adapter)
2231 for (vf = 0; vf < num_vfs; vf++) {
2232 if (adapter->vf_cfg[vf].vf_pmac_id != BE_INVALID_PMAC_ID)
2233 be_cmd_pmac_del(adapter,
2234 adapter->vf_cfg[vf].vf_if_handle,
2235 adapter->vf_cfg[vf].vf_pmac_id);
2239 static int be_setup(struct be_adapter *adapter)
2241 struct net_device *netdev = adapter->netdev;
2242 u32 cap_flags, en_flags, vf = 0;
2246 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST;
2248 if (be_physfn(adapter)) {
2249 cap_flags |= BE_IF_FLAGS_MCAST_PROMISCUOUS |
2250 BE_IF_FLAGS_PROMISCUOUS |
2251 BE_IF_FLAGS_PASS_L3L4_ERRORS;
2252 en_flags |= BE_IF_FLAGS_PASS_L3L4_ERRORS;
2254 if (be_multi_rxq(adapter)) {
2255 cap_flags |= BE_IF_FLAGS_RSS;
2256 en_flags |= BE_IF_FLAGS_RSS;
2260 status = be_cmd_if_create(adapter, cap_flags, en_flags,
2261 netdev->dev_addr, false/* pmac_invalid */,
2262 &adapter->if_handle, &adapter->pmac_id, 0);
2266 if (be_physfn(adapter)) {
2267 while (vf < num_vfs) {
2268 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED
2269 | BE_IF_FLAGS_BROADCAST;
2270 status = be_cmd_if_create(adapter, cap_flags, en_flags,
2272 &adapter->vf_cfg[vf].vf_if_handle,
2275 dev_err(&adapter->pdev->dev,
2276 "Interface Create failed for VF %d\n", vf);
2279 adapter->vf_cfg[vf].vf_pmac_id = BE_INVALID_PMAC_ID;
2282 } else if (!be_physfn(adapter)) {
2283 status = be_cmd_mac_addr_query(adapter, mac,
2284 MAC_ADDRESS_TYPE_NETWORK, false, adapter->if_handle);
2286 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
2287 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
2291 status = be_tx_queues_create(adapter);
2295 status = be_rx_queues_create(adapter);
2299 status = be_mcc_queues_create(adapter);
2303 if (be_physfn(adapter)) {
2304 status = be_vf_eth_addr_config(adapter);
2309 adapter->link_speed = -1;
2314 if (be_physfn(adapter))
2315 be_vf_eth_addr_rem(adapter);
2316 be_mcc_queues_destroy(adapter);
2318 be_rx_queues_destroy(adapter);
2320 be_tx_queues_destroy(adapter);
2322 for (vf = 0; vf < num_vfs; vf++)
2323 if (adapter->vf_cfg[vf].vf_if_handle)
2324 be_cmd_if_destroy(adapter,
2325 adapter->vf_cfg[vf].vf_if_handle);
2326 be_cmd_if_destroy(adapter, adapter->if_handle);
2331 static int be_clear(struct be_adapter *adapter)
2333 if (be_physfn(adapter))
2334 be_vf_eth_addr_rem(adapter);
2336 be_mcc_queues_destroy(adapter);
2337 be_rx_queues_destroy(adapter);
2338 be_tx_queues_destroy(adapter);
2340 be_cmd_if_destroy(adapter, adapter->if_handle);
2342 /* tell fw we're done with firing cmds */
2343 be_cmd_fw_clean(adapter);
2348 #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
2349 static bool be_flash_redboot(struct be_adapter *adapter,
2350 const u8 *p, u32 img_start, int image_size,
2357 crc_offset = hdr_size + img_start + image_size - 4;
2361 status = be_cmd_get_flash_crc(adapter, flashed_crc,
2364 dev_err(&adapter->pdev->dev,
2365 "could not get crc from flash, not flashing redboot\n");
2369 /*update redboot only if crc does not match*/
2370 if (!memcmp(flashed_crc, p, 4))
2376 static int be_flash_data(struct be_adapter *adapter,
2377 const struct firmware *fw,
2378 struct be_dma_mem *flash_cmd, int num_of_images)
2381 int status = 0, i, filehdr_size = 0;
2382 u32 total_bytes = 0, flash_op;
2384 const u8 *p = fw->data;
2385 struct be_cmd_write_flashrom *req = flash_cmd->va;
2386 struct flash_comp *pflashcomp;
2389 struct flash_comp gen3_flash_types[9] = {
2390 { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, IMG_TYPE_ISCSI_ACTIVE,
2391 FLASH_IMAGE_MAX_SIZE_g3},
2392 { FLASH_REDBOOT_START_g3, IMG_TYPE_REDBOOT,
2393 FLASH_REDBOOT_IMAGE_MAX_SIZE_g3},
2394 { FLASH_iSCSI_BIOS_START_g3, IMG_TYPE_BIOS,
2395 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2396 { FLASH_PXE_BIOS_START_g3, IMG_TYPE_PXE_BIOS,
2397 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2398 { FLASH_FCoE_BIOS_START_g3, IMG_TYPE_FCOE_BIOS,
2399 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2400 { FLASH_iSCSI_BACKUP_IMAGE_START_g3, IMG_TYPE_ISCSI_BACKUP,
2401 FLASH_IMAGE_MAX_SIZE_g3},
2402 { FLASH_FCoE_PRIMARY_IMAGE_START_g3, IMG_TYPE_FCOE_FW_ACTIVE,
2403 FLASH_IMAGE_MAX_SIZE_g3},
2404 { FLASH_FCoE_BACKUP_IMAGE_START_g3, IMG_TYPE_FCOE_FW_BACKUP,
2405 FLASH_IMAGE_MAX_SIZE_g3},
2406 { FLASH_NCSI_START_g3, IMG_TYPE_NCSI_FW,
2407 FLASH_NCSI_IMAGE_MAX_SIZE_g3}
2409 struct flash_comp gen2_flash_types[8] = {
2410 { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, IMG_TYPE_ISCSI_ACTIVE,
2411 FLASH_IMAGE_MAX_SIZE_g2},
2412 { FLASH_REDBOOT_START_g2, IMG_TYPE_REDBOOT,
2413 FLASH_REDBOOT_IMAGE_MAX_SIZE_g2},
2414 { FLASH_iSCSI_BIOS_START_g2, IMG_TYPE_BIOS,
2415 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2416 { FLASH_PXE_BIOS_START_g2, IMG_TYPE_PXE_BIOS,
2417 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2418 { FLASH_FCoE_BIOS_START_g2, IMG_TYPE_FCOE_BIOS,
2419 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2420 { FLASH_iSCSI_BACKUP_IMAGE_START_g2, IMG_TYPE_ISCSI_BACKUP,
2421 FLASH_IMAGE_MAX_SIZE_g2},
2422 { FLASH_FCoE_PRIMARY_IMAGE_START_g2, IMG_TYPE_FCOE_FW_ACTIVE,
2423 FLASH_IMAGE_MAX_SIZE_g2},
2424 { FLASH_FCoE_BACKUP_IMAGE_START_g2, IMG_TYPE_FCOE_FW_BACKUP,
2425 FLASH_IMAGE_MAX_SIZE_g2}
2428 if (adapter->generation == BE_GEN3) {
2429 pflashcomp = gen3_flash_types;
2430 filehdr_size = sizeof(struct flash_file_hdr_g3);
2433 pflashcomp = gen2_flash_types;
2434 filehdr_size = sizeof(struct flash_file_hdr_g2);
2437 for (i = 0; i < num_comp; i++) {
2438 if ((pflashcomp[i].optype == IMG_TYPE_NCSI_FW) &&
2439 memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0)
2441 if ((pflashcomp[i].optype == IMG_TYPE_REDBOOT) &&
2442 (!be_flash_redboot(adapter, fw->data,
2443 pflashcomp[i].offset, pflashcomp[i].size,
2447 p += filehdr_size + pflashcomp[i].offset
2448 + (num_of_images * sizeof(struct image_hdr));
2449 if (p + pflashcomp[i].size > fw->data + fw->size)
2451 total_bytes = pflashcomp[i].size;
2452 while (total_bytes) {
2453 if (total_bytes > 32*1024)
2454 num_bytes = 32*1024;
2456 num_bytes = total_bytes;
2457 total_bytes -= num_bytes;
2460 flash_op = FLASHROM_OPER_FLASH;
2462 flash_op = FLASHROM_OPER_SAVE;
2463 memcpy(req->params.data_buf, p, num_bytes);
2465 status = be_cmd_write_flashrom(adapter, flash_cmd,
2466 pflashcomp[i].optype, flash_op, num_bytes);
2468 dev_err(&adapter->pdev->dev,
2469 "cmd to write to flash rom failed.\n");
2478 static int get_ufigen_type(struct flash_file_hdr_g2 *fhdr)
2482 if (fhdr->build[0] == '3')
2484 else if (fhdr->build[0] == '2')
2490 int be_load_fw(struct be_adapter *adapter, u8 *func)
2492 char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
2493 const struct firmware *fw;
2494 struct flash_file_hdr_g2 *fhdr;
2495 struct flash_file_hdr_g3 *fhdr3;
2496 struct image_hdr *img_hdr_ptr = NULL;
2497 struct be_dma_mem flash_cmd;
2498 int status, i = 0, num_imgs = 0;
2501 if (!netif_running(adapter->netdev)) {
2502 dev_err(&adapter->pdev->dev,
2503 "Firmware load not allowed (interface is down)\n");
2507 strcpy(fw_file, func);
2509 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
2514 fhdr = (struct flash_file_hdr_g2 *) p;
2515 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
2517 flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
2518 flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
2520 if (!flash_cmd.va) {
2522 dev_err(&adapter->pdev->dev,
2523 "Memory allocation failure while flashing\n");
2527 if ((adapter->generation == BE_GEN3) &&
2528 (get_ufigen_type(fhdr) == BE_GEN3)) {
2529 fhdr3 = (struct flash_file_hdr_g3 *) fw->data;
2530 num_imgs = le32_to_cpu(fhdr3->num_imgs);
2531 for (i = 0; i < num_imgs; i++) {
2532 img_hdr_ptr = (struct image_hdr *) (fw->data +
2533 (sizeof(struct flash_file_hdr_g3) +
2534 i * sizeof(struct image_hdr)));
2535 if (le32_to_cpu(img_hdr_ptr->imageid) == 1)
2536 status = be_flash_data(adapter, fw, &flash_cmd,
2539 } else if ((adapter->generation == BE_GEN2) &&
2540 (get_ufigen_type(fhdr) == BE_GEN2)) {
2541 status = be_flash_data(adapter, fw, &flash_cmd, 0);
2543 dev_err(&adapter->pdev->dev,
2544 "UFI and Interface are not compatible for flashing\n");
2548 pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
2551 dev_err(&adapter->pdev->dev, "Firmware load error\n");
2555 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
2558 release_firmware(fw);
2562 static struct net_device_ops be_netdev_ops = {
2563 .ndo_open = be_open,
2564 .ndo_stop = be_close,
2565 .ndo_start_xmit = be_xmit,
2566 .ndo_set_rx_mode = be_set_multicast_list,
2567 .ndo_set_mac_address = be_mac_addr_set,
2568 .ndo_change_mtu = be_change_mtu,
2569 .ndo_validate_addr = eth_validate_addr,
2570 .ndo_vlan_rx_register = be_vlan_register,
2571 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
2572 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
2573 .ndo_set_vf_mac = be_set_vf_mac,
2574 .ndo_set_vf_vlan = be_set_vf_vlan,
2575 .ndo_set_vf_tx_rate = be_set_vf_tx_rate,
2576 .ndo_get_vf_config = be_get_vf_config
2579 static void be_netdev_init(struct net_device *netdev)
2581 struct be_adapter *adapter = netdev_priv(netdev);
2582 struct be_rx_obj *rxo;
2585 netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
2586 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER |
2587 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2588 NETIF_F_GRO | NETIF_F_TSO6;
2590 netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO |
2591 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2593 if (lancer_chip(adapter))
2594 netdev->vlan_features |= NETIF_F_TSO6;
2596 netdev->flags |= IFF_MULTICAST;
2598 adapter->rx_csum = true;
2600 /* Default settings for Rx and Tx flow control */
2601 adapter->rx_fc = true;
2602 adapter->tx_fc = true;
2604 netif_set_gso_max_size(netdev, 65535);
2606 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
2608 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
2610 for_all_rx_queues(adapter, rxo, i)
2611 netif_napi_add(netdev, &rxo->rx_eq.napi, be_poll_rx,
2614 netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
2617 netif_stop_queue(netdev);
2620 static void be_unmap_pci_bars(struct be_adapter *adapter)
2623 iounmap(adapter->csr);
2625 iounmap(adapter->db);
2626 if (adapter->pcicfg && be_physfn(adapter))
2627 iounmap(adapter->pcicfg);
2630 static int be_map_pci_bars(struct be_adapter *adapter)
2633 int pcicfg_reg, db_reg;
2635 if (lancer_chip(adapter)) {
2636 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 0),
2637 pci_resource_len(adapter->pdev, 0));
2644 if (be_physfn(adapter)) {
2645 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
2646 pci_resource_len(adapter->pdev, 2));
2649 adapter->csr = addr;
2652 if (adapter->generation == BE_GEN2) {
2657 if (be_physfn(adapter))
2662 addr = ioremap_nocache(pci_resource_start(adapter->pdev, db_reg),
2663 pci_resource_len(adapter->pdev, db_reg));
2668 if (be_physfn(adapter)) {
2669 addr = ioremap_nocache(
2670 pci_resource_start(adapter->pdev, pcicfg_reg),
2671 pci_resource_len(adapter->pdev, pcicfg_reg));
2674 adapter->pcicfg = addr;
2676 adapter->pcicfg = adapter->db + SRIOV_VF_PCICFG_OFFSET;
2680 be_unmap_pci_bars(adapter);
2685 static void be_ctrl_cleanup(struct be_adapter *adapter)
2687 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
2689 be_unmap_pci_bars(adapter);
2692 pci_free_consistent(adapter->pdev, mem->size,
2695 mem = &adapter->mc_cmd_mem;
2697 pci_free_consistent(adapter->pdev, mem->size,
2701 static int be_ctrl_init(struct be_adapter *adapter)
2703 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
2704 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
2705 struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
2708 status = be_map_pci_bars(adapter);
2712 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
2713 mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
2714 mbox_mem_alloc->size, &mbox_mem_alloc->dma);
2715 if (!mbox_mem_alloc->va) {
2717 goto unmap_pci_bars;
2720 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
2721 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
2722 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
2723 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
2725 mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
2726 mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size,
2728 if (mc_cmd_mem->va == NULL) {
2732 memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
2734 spin_lock_init(&adapter->mbox_lock);
2735 spin_lock_init(&adapter->mcc_lock);
2736 spin_lock_init(&adapter->mcc_cq_lock);
2738 init_completion(&adapter->flash_compl);
2739 pci_save_state(adapter->pdev);
2743 pci_free_consistent(adapter->pdev, mbox_mem_alloc->size,
2744 mbox_mem_alloc->va, mbox_mem_alloc->dma);
2747 be_unmap_pci_bars(adapter);
2753 static void be_stats_cleanup(struct be_adapter *adapter)
2755 struct be_dma_mem *cmd = &adapter->stats_cmd;
2758 pci_free_consistent(adapter->pdev, cmd->size,
2762 static int be_stats_init(struct be_adapter *adapter)
2764 struct be_dma_mem *cmd = &adapter->stats_cmd;
2766 cmd->size = sizeof(struct be_cmd_req_get_stats);
2767 cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
2768 if (cmd->va == NULL)
2770 memset(cmd->va, 0, cmd->size);
2774 static void __devexit be_remove(struct pci_dev *pdev)
2776 struct be_adapter *adapter = pci_get_drvdata(pdev);
2781 cancel_delayed_work_sync(&adapter->work);
2783 unregister_netdev(adapter->netdev);
2787 be_stats_cleanup(adapter);
2789 be_ctrl_cleanup(adapter);
2791 be_sriov_disable(adapter);
2793 be_msix_disable(adapter);
2795 pci_set_drvdata(pdev, NULL);
2796 pci_release_regions(pdev);
2797 pci_disable_device(pdev);
2799 free_netdev(adapter->netdev);
2802 static int be_get_config(struct be_adapter *adapter)
2807 status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
2811 status = be_cmd_query_fw_cfg(adapter, &adapter->port_num,
2812 &adapter->function_mode, &adapter->function_caps);
2816 memset(mac, 0, ETH_ALEN);
2818 if (be_physfn(adapter)) {
2819 status = be_cmd_mac_addr_query(adapter, mac,
2820 MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
2825 if (!is_valid_ether_addr(mac))
2826 return -EADDRNOTAVAIL;
2828 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
2829 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
2832 if (adapter->function_mode & 0x400)
2833 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED/4;
2835 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED;
2840 static int be_dev_family_check(struct be_adapter *adapter)
2842 struct pci_dev *pdev = adapter->pdev;
2843 u32 sli_intf = 0, if_type;
2845 switch (pdev->device) {
2848 adapter->generation = BE_GEN2;
2852 adapter->generation = BE_GEN3;
2855 pci_read_config_dword(pdev, SLI_INTF_REG_OFFSET, &sli_intf);
2856 if_type = (sli_intf & SLI_INTF_IF_TYPE_MASK) >>
2857 SLI_INTF_IF_TYPE_SHIFT;
2859 if (((sli_intf & SLI_INTF_VALID_MASK) != SLI_INTF_VALID) ||
2861 dev_err(&pdev->dev, "SLI_INTF reg val is not valid\n");
2865 dev_err(&pdev->dev, "VFs not supported\n");
2868 adapter->sli_family = ((sli_intf & SLI_INTF_FAMILY_MASK) >>
2869 SLI_INTF_FAMILY_SHIFT);
2870 adapter->generation = BE_GEN3;
2873 adapter->generation = 0;
2878 static int __devinit be_probe(struct pci_dev *pdev,
2879 const struct pci_device_id *pdev_id)
2882 struct be_adapter *adapter;
2883 struct net_device *netdev;
2885 status = pci_enable_device(pdev);
2889 status = pci_request_regions(pdev, DRV_NAME);
2892 pci_set_master(pdev);
2894 netdev = alloc_etherdev(sizeof(struct be_adapter));
2895 if (netdev == NULL) {
2899 adapter = netdev_priv(netdev);
2900 adapter->pdev = pdev;
2901 pci_set_drvdata(pdev, adapter);
2903 status = be_dev_family_check(adapter);
2907 adapter->netdev = netdev;
2908 SET_NETDEV_DEV(netdev, &pdev->dev);
2910 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
2912 netdev->features |= NETIF_F_HIGHDMA;
2914 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2916 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
2921 be_sriov_enable(adapter);
2923 status = be_ctrl_init(adapter);
2927 /* sync up with fw's ready state */
2928 if (be_physfn(adapter)) {
2929 status = be_cmd_POST(adapter);
2934 /* tell fw we're ready to fire cmds */
2935 status = be_cmd_fw_init(adapter);
2939 if (be_physfn(adapter)) {
2940 status = be_cmd_reset_function(adapter);
2945 status = be_stats_init(adapter);
2949 status = be_get_config(adapter);
2953 be_msix_enable(adapter);
2955 INIT_DELAYED_WORK(&adapter->work, be_worker);
2957 status = be_setup(adapter);
2961 be_netdev_init(netdev);
2962 status = register_netdev(netdev);
2965 netif_carrier_off(netdev);
2967 dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
2968 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
2974 be_msix_disable(adapter);
2976 be_stats_cleanup(adapter);
2978 be_ctrl_cleanup(adapter);
2980 be_sriov_disable(adapter);
2981 free_netdev(netdev);
2982 pci_set_drvdata(pdev, NULL);
2984 pci_release_regions(pdev);
2986 pci_disable_device(pdev);
2988 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
2992 static int be_suspend(struct pci_dev *pdev, pm_message_t state)
2994 struct be_adapter *adapter = pci_get_drvdata(pdev);
2995 struct net_device *netdev = adapter->netdev;
2998 be_setup_wol(adapter, true);
3000 netif_device_detach(netdev);
3001 if (netif_running(netdev)) {
3006 be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
3009 pci_save_state(pdev);
3010 pci_disable_device(pdev);
3011 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3015 static int be_resume(struct pci_dev *pdev)
3018 struct be_adapter *adapter = pci_get_drvdata(pdev);
3019 struct net_device *netdev = adapter->netdev;
3021 netif_device_detach(netdev);
3023 status = pci_enable_device(pdev);
3027 pci_set_power_state(pdev, 0);
3028 pci_restore_state(pdev);
3030 /* tell fw we're ready to fire cmds */
3031 status = be_cmd_fw_init(adapter);
3036 if (netif_running(netdev)) {
3041 netif_device_attach(netdev);
3044 be_setup_wol(adapter, false);
3049 * An FLR will stop BE from DMAing any data.
3051 static void be_shutdown(struct pci_dev *pdev)
3053 struct be_adapter *adapter = pci_get_drvdata(pdev);
3054 struct net_device *netdev = adapter->netdev;
3056 netif_device_detach(netdev);
3058 be_cmd_reset_function(adapter);
3061 be_setup_wol(adapter, true);
3063 pci_disable_device(pdev);
3066 static pci_ers_result_t be_eeh_err_detected(struct pci_dev *pdev,
3067 pci_channel_state_t state)
3069 struct be_adapter *adapter = pci_get_drvdata(pdev);
3070 struct net_device *netdev = adapter->netdev;
3072 dev_err(&adapter->pdev->dev, "EEH error detected\n");
3074 adapter->eeh_err = true;
3076 netif_device_detach(netdev);
3078 if (netif_running(netdev)) {
3085 if (state == pci_channel_io_perm_failure)
3086 return PCI_ERS_RESULT_DISCONNECT;
3088 pci_disable_device(pdev);
3090 return PCI_ERS_RESULT_NEED_RESET;
3093 static pci_ers_result_t be_eeh_reset(struct pci_dev *pdev)
3095 struct be_adapter *adapter = pci_get_drvdata(pdev);
3098 dev_info(&adapter->pdev->dev, "EEH reset\n");
3099 adapter->eeh_err = false;
3101 status = pci_enable_device(pdev);
3103 return PCI_ERS_RESULT_DISCONNECT;
3105 pci_set_master(pdev);
3106 pci_set_power_state(pdev, 0);
3107 pci_restore_state(pdev);
3109 /* Check if card is ok and fw is ready */
3110 status = be_cmd_POST(adapter);
3112 return PCI_ERS_RESULT_DISCONNECT;
3114 return PCI_ERS_RESULT_RECOVERED;
3117 static void be_eeh_resume(struct pci_dev *pdev)
3120 struct be_adapter *adapter = pci_get_drvdata(pdev);
3121 struct net_device *netdev = adapter->netdev;
3123 dev_info(&adapter->pdev->dev, "EEH resume\n");
3125 pci_save_state(pdev);
3127 /* tell fw we're ready to fire cmds */
3128 status = be_cmd_fw_init(adapter);
3132 status = be_setup(adapter);
3136 if (netif_running(netdev)) {
3137 status = be_open(netdev);
3141 netif_device_attach(netdev);
3144 dev_err(&adapter->pdev->dev, "EEH resume failed\n");
3147 static struct pci_error_handlers be_eeh_handlers = {
3148 .error_detected = be_eeh_err_detected,
3149 .slot_reset = be_eeh_reset,
3150 .resume = be_eeh_resume,
3153 static struct pci_driver be_driver = {
3155 .id_table = be_dev_ids,
3157 .remove = be_remove,
3158 .suspend = be_suspend,
3159 .resume = be_resume,
3160 .shutdown = be_shutdown,
3161 .err_handler = &be_eeh_handlers
3164 static int __init be_init_module(void)
3166 if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
3167 rx_frag_size != 2048) {
3168 printk(KERN_WARNING DRV_NAME
3169 " : Module param rx_frag_size must be 2048/4096/8192."
3171 rx_frag_size = 2048;
3175 printk(KERN_WARNING DRV_NAME
3176 " : Module param num_vfs must not be greater than 32."
3181 return pci_register_driver(&be_driver);
3183 module_init(be_init_module);
3185 static void __exit be_exit_module(void)
3187 pci_unregister_driver(&be_driver);
3189 module_exit(be_exit_module);