2 * Davicom DM9000 Fast Ethernet driver for Linux.
3 * Copyright (C) 1997 Sten Wang
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * (C) Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
17 * Additional updates, Copyright:
18 * Ben Dooks <ben@simtec.co.uk>
19 * Sascha Hauer <s.hauer@pengutronix.de>
22 #include <linux/module.h>
23 #include <linux/ioport.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/init.h>
27 #include <linux/skbuff.h>
28 #include <linux/spinlock.h>
29 #include <linux/crc32.h>
30 #include <linux/mii.h>
31 #include <linux/ethtool.h>
32 #include <linux/dm9000.h>
33 #include <linux/delay.h>
34 #include <linux/platform_device.h>
35 #include <linux/irq.h>
36 #include <linux/slab.h>
38 #include <asm/delay.h>
41 #include <mach/gpio.h>
45 /* Board/System/Debug information/definition ---------------- */
47 #define DM9000_PHY 0x40 /* PHY address 0x01 */
49 #define CARDNAME "dm9000"
50 #define DRV_VERSION "1.31"
53 * Transmit timeout, default 5 seconds.
55 static int watchdog = 5000;
56 module_param(watchdog, int, 0400);
57 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
59 /* DM9000 register address locking.
61 * The DM9000 uses an address register to control where data written
62 * to the data register goes. This means that the address register
63 * must be preserved over interrupts or similar calls.
65 * During interrupt and other critical calls, a spinlock is used to
66 * protect the system, but the calls themselves save the address
67 * in the address register in case they are interrupting another
68 * access to the device.
70 * For general accesses a lock is provided so that calls which are
71 * allowed to sleep are serialised so that the address register does
72 * not need to be saved. This lock also serves to serialise access
73 * to the EEPROM and PHY access registers which are shared between
77 /* The driver supports the original DM9000E, and now the two newer
78 * devices, DM9000A and DM9000B.
82 TYPE_DM9000E, /* original DM9000 */
87 /* Structure/enum declaration ------------------------------- */
88 typedef struct board_info {
90 void __iomem *io_addr; /* Register I/O base address */
91 void __iomem *io_data; /* Data I/O address */
99 u8 io_mode; /* 0:word, 2:byte */
104 unsigned int in_suspend :1;
105 unsigned int wake_supported :1;
108 enum dm9000_type type;
110 void (*inblk)(void __iomem *port, void *data, int length);
111 void (*outblk)(void __iomem *port, void *data, int length);
112 void (*dumpblk)(void __iomem *port, int length);
114 struct device *dev; /* parent device */
116 struct resource *addr_res; /* resources found */
117 struct resource *data_res;
118 struct resource *addr_req; /* resources requested */
119 struct resource *data_req;
120 struct resource *irq_res;
124 struct mutex addr_lock; /* phy and eeprom access lock */
126 struct delayed_work phy_poll;
127 struct net_device *ndev;
131 struct mii_if_info mii;
139 #define dm9000_dbg(db, lev, msg...) do { \
140 if ((lev) < CONFIG_DM9000_DEBUGLEVEL && \
141 (lev) < db->debug_level) { \
142 dev_dbg(db->dev, msg); \
146 static inline board_info_t *to_dm9000_board(struct net_device *dev)
148 return netdev_priv(dev);
151 /* DM9000 network board routine ---------------------------- */
154 dm9000_reset(board_info_t * db)
156 dev_dbg(db->dev, "resetting device\n");
159 writeb(DM9000_NCR, db->io_addr);
161 writeb(NCR_RST, db->io_data);
166 * Read a byte from I/O port
169 ior(board_info_t * db, int reg)
171 writeb(reg, db->io_addr);
172 return readb(db->io_data);
176 * Write a byte to I/O port
180 iow(board_info_t * db, int reg, int value)
182 writeb(reg, db->io_addr);
183 writeb(value, db->io_data);
186 /* routines for sending block to chip */
188 static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
190 writesb(reg, data, count);
193 static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
195 writesw(reg, data, (count+1) >> 1);
198 static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
200 writesl(reg, data, (count+3) >> 2);
203 /* input block from chip to memory */
205 static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
207 readsb(reg, data, count);
211 static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
213 readsw(reg, data, (count+1) >> 1);
216 static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
218 readsl(reg, data, (count+3) >> 2);
221 /* dump block from chip to null */
223 static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
228 for (i = 0; i < count; i++)
232 static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
237 count = (count + 1) >> 1;
239 for (i = 0; i < count; i++)
243 static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
248 count = (count + 3) >> 2;
250 for (i = 0; i < count; i++)
256 * select the specified set of io routines to use with the
260 static void dm9000_set_io(struct board_info *db, int byte_width)
262 /* use the size of the data resource to work out what IO
263 * routines we want to use
266 switch (byte_width) {
268 db->dumpblk = dm9000_dumpblk_8bit;
269 db->outblk = dm9000_outblk_8bit;
270 db->inblk = dm9000_inblk_8bit;
275 dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n");
277 db->dumpblk = dm9000_dumpblk_16bit;
278 db->outblk = dm9000_outblk_16bit;
279 db->inblk = dm9000_inblk_16bit;
284 db->dumpblk = dm9000_dumpblk_32bit;
285 db->outblk = dm9000_outblk_32bit;
286 db->inblk = dm9000_inblk_32bit;
291 static void dm9000_schedule_poll(board_info_t *db)
293 if (db->type == TYPE_DM9000E)
294 schedule_delayed_work(&db->phy_poll, HZ * 2);
297 static int dm9000_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
299 board_info_t *dm = to_dm9000_board(dev);
301 if (!netif_running(dev))
304 return generic_mii_ioctl(&dm->mii, if_mii(req), cmd, NULL);
308 dm9000_read_locked(board_info_t *db, int reg)
313 spin_lock_irqsave(&db->lock, flags);
315 spin_unlock_irqrestore(&db->lock, flags);
320 static int dm9000_wait_eeprom(board_info_t *db)
323 int timeout = 8; /* wait max 8msec */
325 /* The DM9000 data sheets say we should be able to
326 * poll the ERRE bit in EPCR to wait for the EEPROM
327 * operation. From testing several chips, this bit
328 * does not seem to work.
330 * We attempt to use the bit, but fall back to the
331 * timeout (which is why we do not return an error
332 * on expiry) to say that the EEPROM operation has
337 status = dm9000_read_locked(db, DM9000_EPCR);
339 if ((status & EPCR_ERRE) == 0)
345 dev_dbg(db->dev, "timeout waiting EEPROM\n");
354 * Read a word data from EEPROM
357 dm9000_read_eeprom(board_info_t *db, int offset, u8 *to)
361 if (db->flags & DM9000_PLATF_NO_EEPROM) {
367 mutex_lock(&db->addr_lock);
369 spin_lock_irqsave(&db->lock, flags);
371 iow(db, DM9000_EPAR, offset);
372 iow(db, DM9000_EPCR, EPCR_ERPRR);
374 spin_unlock_irqrestore(&db->lock, flags);
376 dm9000_wait_eeprom(db);
378 /* delay for at-least 150uS */
381 spin_lock_irqsave(&db->lock, flags);
383 iow(db, DM9000_EPCR, 0x0);
385 to[0] = ior(db, DM9000_EPDRL);
386 to[1] = ior(db, DM9000_EPDRH);
388 spin_unlock_irqrestore(&db->lock, flags);
390 mutex_unlock(&db->addr_lock);
394 * Write a word data to SROM
397 dm9000_write_eeprom(board_info_t *db, int offset, u8 *data)
401 if (db->flags & DM9000_PLATF_NO_EEPROM)
404 mutex_lock(&db->addr_lock);
406 spin_lock_irqsave(&db->lock, flags);
407 iow(db, DM9000_EPAR, offset);
408 iow(db, DM9000_EPDRH, data[1]);
409 iow(db, DM9000_EPDRL, data[0]);
410 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
411 spin_unlock_irqrestore(&db->lock, flags);
413 dm9000_wait_eeprom(db);
415 mdelay(1); /* wait at least 150uS to clear */
417 spin_lock_irqsave(&db->lock, flags);
418 iow(db, DM9000_EPCR, 0);
419 spin_unlock_irqrestore(&db->lock, flags);
421 mutex_unlock(&db->addr_lock);
426 static void dm9000_get_drvinfo(struct net_device *dev,
427 struct ethtool_drvinfo *info)
429 board_info_t *dm = to_dm9000_board(dev);
431 strcpy(info->driver, CARDNAME);
432 strcpy(info->version, DRV_VERSION);
433 strcpy(info->bus_info, to_platform_device(dm->dev)->name);
436 static u32 dm9000_get_msglevel(struct net_device *dev)
438 board_info_t *dm = to_dm9000_board(dev);
440 return dm->msg_enable;
443 static void dm9000_set_msglevel(struct net_device *dev, u32 value)
445 board_info_t *dm = to_dm9000_board(dev);
447 dm->msg_enable = value;
450 static int dm9000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
452 board_info_t *dm = to_dm9000_board(dev);
454 mii_ethtool_gset(&dm->mii, cmd);
458 static int dm9000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
460 board_info_t *dm = to_dm9000_board(dev);
462 return mii_ethtool_sset(&dm->mii, cmd);
465 static int dm9000_nway_reset(struct net_device *dev)
467 board_info_t *dm = to_dm9000_board(dev);
468 return mii_nway_restart(&dm->mii);
471 static int dm9000_set_features(struct net_device *dev, u32 features)
473 board_info_t *dm = to_dm9000_board(dev);
474 u32 changed = dev->features ^ features;
477 if (!(changed & NETIF_F_RXCSUM))
480 spin_lock_irqsave(&dm->lock, flags);
481 iow(dm, DM9000_RCSR, (features & NETIF_F_RXCSUM) ? RCSR_CSUM : 0);
482 spin_unlock_irqrestore(&dm->lock, flags);
487 static u32 dm9000_get_link(struct net_device *dev)
489 board_info_t *dm = to_dm9000_board(dev);
492 if (dm->flags & DM9000_PLATF_EXT_PHY)
493 ret = mii_link_ok(&dm->mii);
495 ret = dm9000_read_locked(dm, DM9000_NSR) & NSR_LINKST ? 1 : 0;
500 #define DM_EEPROM_MAGIC (0x444D394B)
502 static int dm9000_get_eeprom_len(struct net_device *dev)
507 static int dm9000_get_eeprom(struct net_device *dev,
508 struct ethtool_eeprom *ee, u8 *data)
510 board_info_t *dm = to_dm9000_board(dev);
511 int offset = ee->offset;
515 /* EEPROM access is aligned to two bytes */
517 if ((len & 1) != 0 || (offset & 1) != 0)
520 if (dm->flags & DM9000_PLATF_NO_EEPROM)
523 ee->magic = DM_EEPROM_MAGIC;
525 for (i = 0; i < len; i += 2)
526 dm9000_read_eeprom(dm, (offset + i) / 2, data + i);
531 static int dm9000_set_eeprom(struct net_device *dev,
532 struct ethtool_eeprom *ee, u8 *data)
534 board_info_t *dm = to_dm9000_board(dev);
535 int offset = ee->offset;
539 /* EEPROM access is aligned to two bytes */
541 if ((len & 1) != 0 || (offset & 1) != 0)
544 if (dm->flags & DM9000_PLATF_NO_EEPROM)
547 if (ee->magic != DM_EEPROM_MAGIC)
550 for (i = 0; i < len; i += 2)
551 dm9000_write_eeprom(dm, (offset + i) / 2, data + i);
556 static void dm9000_get_wol(struct net_device *dev, struct ethtool_wolinfo *w)
558 board_info_t *dm = to_dm9000_board(dev);
560 memset(w, 0, sizeof(struct ethtool_wolinfo));
562 /* note, we could probably support wake-phy too */
563 w->supported = dm->wake_supported ? WAKE_MAGIC : 0;
564 w->wolopts = dm->wake_state;
567 static int dm9000_set_wol(struct net_device *dev, struct ethtool_wolinfo *w)
569 board_info_t *dm = to_dm9000_board(dev);
571 u32 opts = w->wolopts;
574 if (!dm->wake_supported)
577 if (opts & ~WAKE_MAGIC)
580 if (opts & WAKE_MAGIC)
583 mutex_lock(&dm->addr_lock);
585 spin_lock_irqsave(&dm->lock, flags);
586 iow(dm, DM9000_WCR, wcr);
587 spin_unlock_irqrestore(&dm->lock, flags);
589 mutex_unlock(&dm->addr_lock);
591 if (dm->wake_state != opts) {
592 /* change in wol state, update IRQ state */
595 irq_set_irq_wake(dm->irq_wake, 1);
596 else if (dm->wake_state & !opts)
597 irq_set_irq_wake(dm->irq_wake, 0);
600 dm->wake_state = opts;
604 static const struct ethtool_ops dm9000_ethtool_ops = {
605 .get_drvinfo = dm9000_get_drvinfo,
606 .get_settings = dm9000_get_settings,
607 .set_settings = dm9000_set_settings,
608 .get_msglevel = dm9000_get_msglevel,
609 .set_msglevel = dm9000_set_msglevel,
610 .nway_reset = dm9000_nway_reset,
611 .get_link = dm9000_get_link,
612 .get_wol = dm9000_get_wol,
613 .set_wol = dm9000_set_wol,
614 .get_eeprom_len = dm9000_get_eeprom_len,
615 .get_eeprom = dm9000_get_eeprom,
616 .set_eeprom = dm9000_set_eeprom,
619 static void dm9000_show_carrier(board_info_t *db,
620 unsigned carrier, unsigned nsr)
622 struct net_device *ndev = db->ndev;
623 unsigned ncr = dm9000_read_locked(db, DM9000_NCR);
626 dev_info(db->dev, "%s: link up, %dMbps, %s-duplex, no LPA\n",
627 ndev->name, (nsr & NSR_SPEED) ? 10 : 100,
628 (ncr & NCR_FDX) ? "full" : "half");
630 dev_info(db->dev, "%s: link down\n", ndev->name);
634 dm9000_poll_work(struct work_struct *w)
636 struct delayed_work *dw = to_delayed_work(w);
637 board_info_t *db = container_of(dw, board_info_t, phy_poll);
638 struct net_device *ndev = db->ndev;
640 if (db->flags & DM9000_PLATF_SIMPLE_PHY &&
641 !(db->flags & DM9000_PLATF_EXT_PHY)) {
642 unsigned nsr = dm9000_read_locked(db, DM9000_NSR);
643 unsigned old_carrier = netif_carrier_ok(ndev) ? 1 : 0;
644 unsigned new_carrier;
646 new_carrier = (nsr & NSR_LINKST) ? 1 : 0;
648 if (old_carrier != new_carrier) {
649 if (netif_msg_link(db))
650 dm9000_show_carrier(db, new_carrier, nsr);
653 netif_carrier_off(ndev);
655 netif_carrier_on(ndev);
658 mii_check_media(&db->mii, netif_msg_link(db), 0);
660 if (netif_running(ndev))
661 dm9000_schedule_poll(db);
664 /* dm9000_release_board
666 * release a board, and any mapped resources
670 dm9000_release_board(struct platform_device *pdev, struct board_info *db)
672 /* unmap our resources */
674 iounmap(db->io_addr);
675 iounmap(db->io_data);
677 /* release the resources */
679 release_resource(db->data_req);
682 release_resource(db->addr_req);
686 static unsigned char dm9000_type_to_char(enum dm9000_type type)
689 case TYPE_DM9000E: return 'e';
690 case TYPE_DM9000A: return 'a';
691 case TYPE_DM9000B: return 'b';
698 * Set DM9000 multicast address
701 dm9000_hash_table_unlocked(struct net_device *dev)
703 board_info_t *db = netdev_priv(dev);
704 struct netdev_hw_addr *ha;
708 u8 rcr = RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN;
710 dm9000_dbg(db, 1, "entering %s\n", __func__);
712 for (i = 0, oft = DM9000_PAR; i < 6; i++, oft++)
713 iow(db, oft, dev->dev_addr[i]);
715 /* Clear Hash Table */
716 for (i = 0; i < 4; i++)
719 /* broadcast address */
720 hash_table[3] = 0x8000;
722 if (dev->flags & IFF_PROMISC)
725 if (dev->flags & IFF_ALLMULTI)
728 /* the multicast address in Hash Table : 64 bits */
729 netdev_for_each_mc_addr(ha, dev) {
730 hash_val = ether_crc_le(6, ha->addr) & 0x3f;
731 hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
734 /* Write the hash table to MAC MD table */
735 for (i = 0, oft = DM9000_MAR; i < 4; i++) {
736 iow(db, oft++, hash_table[i]);
737 iow(db, oft++, hash_table[i] >> 8);
740 iow(db, DM9000_RCR, rcr);
744 dm9000_hash_table(struct net_device *dev)
746 board_info_t *db = netdev_priv(dev);
749 spin_lock_irqsave(&db->lock, flags);
750 dm9000_hash_table_unlocked(dev);
751 spin_unlock_irqrestore(&db->lock, flags);
755 * Initialize dm9000 board
758 dm9000_init_dm9000(struct net_device *dev)
760 board_info_t *db = netdev_priv(dev);
764 dm9000_dbg(db, 1, "entering %s\n", __func__);
767 db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
770 if (dev->hw_features & NETIF_F_RXCSUM)
772 (dev->features & NETIF_F_RXCSUM) ? RCSR_CSUM : 0);
774 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
776 ncr = (db->flags & DM9000_PLATF_EXT_PHY) ? NCR_EXT_PHY : 0;
778 /* if wol is needed, then always set NCR_WAKEEN otherwise we end
779 * up dumping the wake events if we disable this. There is already
780 * a wake-mask in DM9000_WCR */
781 if (db->wake_supported)
784 iow(db, DM9000_NCR, ncr);
786 /* Program operating register */
787 iow(db, DM9000_TCR, 0); /* TX Polling clear */
788 iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
789 iow(db, DM9000_FCR, 0xff); /* Flow Control */
790 iow(db, DM9000_SMCR, 0); /* Special Mode */
791 /* clear TX status */
792 iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
793 iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
795 /* Set address filter table */
796 dm9000_hash_table_unlocked(dev);
798 imr = IMR_PAR | IMR_PTM | IMR_PRM;
799 if (db->type != TYPE_DM9000E)
804 /* Enable TX/RX interrupt mask */
805 iow(db, DM9000_IMR, imr);
807 /* Init Driver variable */
809 db->queue_pkt_len = 0;
810 dev->trans_start = jiffies;
813 /* Our watchdog timed out. Called by the networking layer */
814 static void dm9000_timeout(struct net_device *dev)
816 board_info_t *db = netdev_priv(dev);
820 /* Save previous register address */
821 spin_lock_irqsave(&db->lock, flags);
822 reg_save = readb(db->io_addr);
824 netif_stop_queue(dev);
826 dm9000_init_dm9000(dev);
827 /* We can accept TX packets again */
828 dev->trans_start = jiffies; /* prevent tx timeout */
829 netif_wake_queue(dev);
831 /* Restore previous register address */
832 writeb(reg_save, db->io_addr);
833 spin_unlock_irqrestore(&db->lock, flags);
836 static void dm9000_send_packet(struct net_device *dev,
840 board_info_t *dm = to_dm9000_board(dev);
842 /* The DM9000 is not smart enough to leave fragmented packets alone. */
843 if (dm->ip_summed != ip_summed) {
844 if (ip_summed == CHECKSUM_NONE)
845 iow(dm, DM9000_TCCR, 0);
847 iow(dm, DM9000_TCCR, TCCR_IP | TCCR_UDP | TCCR_TCP);
848 dm->ip_summed = ip_summed;
851 /* Set TX length to DM9000 */
852 iow(dm, DM9000_TXPLL, pkt_len);
853 iow(dm, DM9000_TXPLH, pkt_len >> 8);
855 /* Issue TX polling command */
856 iow(dm, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
860 * Hardware start transmission.
861 * Send a packet to media from the upper layer.
864 dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
867 board_info_t *db = netdev_priv(dev);
869 dm9000_dbg(db, 3, "%s:\n", __func__);
871 if (db->tx_pkt_cnt > 1)
872 return NETDEV_TX_BUSY;
874 spin_lock_irqsave(&db->lock, flags);
876 /* Move data to DM9000 TX RAM */
877 writeb(DM9000_MWCMD, db->io_addr);
879 (db->outblk)(db->io_data, skb->data, skb->len);
880 dev->stats.tx_bytes += skb->len;
883 /* TX control: First packet immediately send, second packet queue */
884 if (db->tx_pkt_cnt == 1) {
885 dm9000_send_packet(dev, skb->ip_summed, skb->len);
888 db->queue_pkt_len = skb->len;
889 db->queue_ip_summed = skb->ip_summed;
890 netif_stop_queue(dev);
893 spin_unlock_irqrestore(&db->lock, flags);
902 * DM9000 interrupt handler
903 * receive the packet to upper layer, free the transmitted packet
906 static void dm9000_tx_done(struct net_device *dev, board_info_t *db)
908 int tx_status = ior(db, DM9000_NSR); /* Got TX status */
910 if (tx_status & (NSR_TX2END | NSR_TX1END)) {
911 /* One packet sent complete */
913 dev->stats.tx_packets++;
915 if (netif_msg_tx_done(db))
916 dev_dbg(db->dev, "tx done, NSR %02x\n", tx_status);
918 /* Queue packet check & send */
919 if (db->tx_pkt_cnt > 0)
920 dm9000_send_packet(dev, db->queue_ip_summed,
922 netif_wake_queue(dev);
926 struct dm9000_rxhdr {
933 * Received a packet and pass to upper layer
936 dm9000_rx(struct net_device *dev)
938 board_info_t *db = netdev_priv(dev);
939 struct dm9000_rxhdr rxhdr;
945 /* Check packet ready or not */
947 ior(db, DM9000_MRCMDX); /* Dummy read */
949 udelay(1);//add by lyx@20100713,or dm9000_rx will be error in high frequence
952 /* Get most updated data */
953 rxbyte = ior(db, DM9000_MRCMDX); /* Dummy read */
955 rxbyte = readb(db->io_data);
958 /* Status check: this byte must be 0 or 1 */
959 if (rxbyte & DM9000_PKT_ERR) {
960 dev_warn(db->dev, "status check fail: %d\n", rxbyte);
962 iow(db, DM9000_RCR, 0x00); /* Stop Device */
963 iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
970 if (!(rxbyte & DM9000_PKT_RDY))
973 /* A packet ready now & Get status/length */
975 writeb(DM9000_MRCMD, db->io_addr);
977 (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
979 RxLen = le16_to_cpu(rxhdr.RxLen);
981 if (netif_msg_rx_status(db))
982 dev_dbg(db->dev, "RX: status %02x, length %04x\n",
983 rxhdr.RxStatus, RxLen);
985 /* Packet Status check */
988 if (netif_msg_rx_err(db))
989 dev_dbg(db->dev, "RX: Bad Packet (runt)\n");
992 if (RxLen > DM9000_PKT_MAX) {
993 dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen);
996 /* rxhdr.RxStatus is identical to RSR register. */
997 if (rxhdr.RxStatus & (RSR_FOE | RSR_CE | RSR_AE |
1001 if (rxhdr.RxStatus & RSR_FOE) {
1002 if (netif_msg_rx_err(db))
1003 dev_dbg(db->dev, "fifo error\n");
1004 dev->stats.rx_fifo_errors++;
1006 if (rxhdr.RxStatus & RSR_CE) {
1007 if (netif_msg_rx_err(db))
1008 dev_dbg(db->dev, "crc error\n");
1009 dev->stats.rx_crc_errors++;
1011 if (rxhdr.RxStatus & RSR_RF) {
1012 if (netif_msg_rx_err(db))
1013 dev_dbg(db->dev, "length error\n");
1014 dev->stats.rx_length_errors++;
1018 /* Move data from DM9000 */
1020 ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
1021 skb_reserve(skb, 2);
1022 rdptr = (u8 *) skb_put(skb, RxLen - 4);
1024 /* Read received packet from RX SRAM */
1026 (db->inblk)(db->io_data, rdptr, RxLen);
1027 dev->stats.rx_bytes += RxLen;
1029 /* Pass to upper layer */
1030 skb->protocol = eth_type_trans(skb, dev);
1031 if (dev->features & NETIF_F_RXCSUM) {
1032 if ((((rxbyte & 0x1c) << 3) & rxbyte) == 0)
1033 skb->ip_summed = CHECKSUM_UNNECESSARY;
1035 skb_checksum_none_assert(skb);
1038 dev->stats.rx_packets++;
1041 /* need to dump the packet's data */
1043 (db->dumpblk)(db->io_data, RxLen);
1045 } while (rxbyte & DM9000_PKT_RDY);
1048 static irqreturn_t dm9000_interrupt(int irq, void *dev_id)
1050 struct net_device *dev = dev_id;
1051 board_info_t *db = netdev_priv(dev);
1053 unsigned long flags;
1056 dm9000_dbg(db, 3, "entering %s\n", __func__);
1058 /* A real interrupt coming */
1060 /* holders of db->lock must always block IRQs */
1061 spin_lock_irqsave(&db->lock, flags);
1063 /* Save previous register address */
1064 reg_save = readb(db->io_addr);
1066 /* Disable all interrupts */
1067 iow(db, DM9000_IMR, IMR_PAR);
1069 /* Got DM9000 interrupt status */
1070 int_status = ior(db, DM9000_ISR); /* Got ISR */
1071 iow(db, DM9000_ISR, int_status); /* Clear ISR status */
1073 if (netif_msg_intr(db))
1074 dev_dbg(db->dev, "interrupt status %02x\n", int_status);
1076 /* Received the coming packet */
1077 if (int_status & ISR_PRS)
1080 /* Trnasmit Interrupt check */
1081 if (int_status & ISR_PTS)
1082 dm9000_tx_done(dev, db);
1084 if (db->type != TYPE_DM9000E) {
1085 if (int_status & ISR_LNKCHNG) {
1086 /* fire a link-change request */
1087 schedule_delayed_work(&db->phy_poll, 1);
1091 /* Re-enable interrupt mask */
1092 iow(db, DM9000_IMR, db->imr_all);
1094 /* Restore previous register address */
1095 writeb(reg_save, db->io_addr);
1097 spin_unlock_irqrestore(&db->lock, flags);
1102 static irqreturn_t dm9000_wol_interrupt(int irq, void *dev_id)
1104 struct net_device *dev = dev_id;
1105 board_info_t *db = netdev_priv(dev);
1106 unsigned long flags;
1109 spin_lock_irqsave(&db->lock, flags);
1111 nsr = ior(db, DM9000_NSR);
1112 wcr = ior(db, DM9000_WCR);
1114 dev_dbg(db->dev, "%s: NSR=0x%02x, WCR=0x%02x\n", __func__, nsr, wcr);
1116 if (nsr & NSR_WAKEST) {
1117 /* clear, so we can avoid */
1118 iow(db, DM9000_NSR, NSR_WAKEST);
1120 if (wcr & WCR_LINKST)
1121 dev_info(db->dev, "wake by link status change\n");
1122 if (wcr & WCR_SAMPLEST)
1123 dev_info(db->dev, "wake by sample packet\n");
1124 if (wcr & WCR_MAGICST )
1125 dev_info(db->dev, "wake by magic packet\n");
1126 if (!(wcr & (WCR_LINKST | WCR_SAMPLEST | WCR_MAGICST)))
1127 dev_err(db->dev, "wake signalled with no reason? "
1128 "NSR=0x%02x, WSR=0x%02x\n", nsr, wcr);
1132 spin_unlock_irqrestore(&db->lock, flags);
1134 return (nsr & NSR_WAKEST) ? IRQ_HANDLED : IRQ_NONE;
1137 #ifdef CONFIG_NET_POLL_CONTROLLER
1141 static void dm9000_poll_controller(struct net_device *dev)
1143 disable_irq(dev->irq);
1144 dm9000_interrupt(dev->irq, dev);
1145 enable_irq(dev->irq);
1150 * Open the interface.
1151 * The interface is opened whenever "ifconfig" actives it.
1154 dm9000_open(struct net_device *dev)
1156 board_info_t *db = netdev_priv(dev);
1157 unsigned long irqflags = db->irq_res->flags & IRQF_TRIGGER_MASK;
1159 if (netif_msg_ifup(db))
1160 dev_dbg(db->dev, "enabling %s\n", dev->name);
1162 /* If there is no IRQ type specified, default to something that
1163 * may work, and tell the user that this is a problem */
1165 if (irqflags == IRQF_TRIGGER_NONE)
1166 dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n");
1168 //irqflags |= IRQF_SHARED;
1170 /* GPIO0 on pre-activate PHY, Reg 1F is not set by reset */
1171 iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
1172 mdelay(1); /* delay needs by DM9000B */
1174 /* Initialize DM9000 board */
1176 dm9000_init_dm9000(dev);
1178 if (request_irq(dev->irq, dm9000_interrupt, irqflags, dev->name, dev))
1181 /* Init driver variable */
1184 mii_check_media(&db->mii, netif_msg_link(db), 1);
1185 netif_start_queue(dev);
1187 dm9000_schedule_poll(db);
1193 * Sleep, either by using msleep() or if we are suspending, then
1194 * use mdelay() to sleep.
1196 static void dm9000_msleep(board_info_t *db, unsigned int ms)
1205 * Read a word from phyxcer
1208 dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
1210 board_info_t *db = netdev_priv(dev);
1211 unsigned long flags;
1212 unsigned int reg_save;
1215 mutex_lock(&db->addr_lock);
1217 spin_lock_irqsave(&db->lock,flags);
1219 /* Save previous register address */
1220 reg_save = readb(db->io_addr);
1222 /* Fill the phyxcer register into REG_0C */
1223 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1225 iow(db, DM9000_EPCR, EPCR_ERPRR | EPCR_EPOS); /* Issue phyxcer read command */
1227 writeb(reg_save, db->io_addr);
1228 spin_unlock_irqrestore(&db->lock,flags);
1230 dm9000_msleep(db, 1); /* Wait read complete */
1232 spin_lock_irqsave(&db->lock,flags);
1233 reg_save = readb(db->io_addr);
1235 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
1237 /* The read data keeps on REG_0D & REG_0E */
1238 ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
1240 /* restore the previous address */
1241 writeb(reg_save, db->io_addr);
1242 spin_unlock_irqrestore(&db->lock,flags);
1244 mutex_unlock(&db->addr_lock);
1246 dm9000_dbg(db, 5, "phy_read[%02x] -> %04x\n", reg, ret);
1251 * Write a word to phyxcer
1254 dm9000_phy_write(struct net_device *dev,
1255 int phyaddr_unused, int reg, int value)
1257 board_info_t *db = netdev_priv(dev);
1258 unsigned long flags;
1259 unsigned long reg_save;
1261 dm9000_dbg(db, 5, "phy_write[%02x] = %04x\n", reg, value);
1262 mutex_lock(&db->addr_lock);
1264 spin_lock_irqsave(&db->lock,flags);
1266 /* Save previous register address */
1267 reg_save = readb(db->io_addr);
1269 /* Fill the phyxcer register into REG_0C */
1270 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1272 /* Fill the written data into REG_0D & REG_0E */
1273 iow(db, DM9000_EPDRL, value);
1274 iow(db, DM9000_EPDRH, value >> 8);
1276 iow(db, DM9000_EPCR, EPCR_EPOS | EPCR_ERPRW); /* Issue phyxcer write command */
1278 writeb(reg_save, db->io_addr);
1279 spin_unlock_irqrestore(&db->lock, flags);
1281 dm9000_msleep(db, 1); /* Wait write complete */
1283 spin_lock_irqsave(&db->lock,flags);
1284 reg_save = readb(db->io_addr);
1286 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
1288 /* restore the previous address */
1289 writeb(reg_save, db->io_addr);
1291 spin_unlock_irqrestore(&db->lock, flags);
1292 mutex_unlock(&db->addr_lock);
1296 dm9000_shutdown(struct net_device *dev)
1298 board_info_t *db = netdev_priv(dev);
1301 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
1302 iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
1303 iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
1304 iow(db, DM9000_RCR, 0x00); /* Disable RX */
1308 * Stop the interface.
1309 * The interface is stopped when it is brought.
1312 dm9000_stop(struct net_device *ndev)
1314 board_info_t *db = netdev_priv(ndev);
1316 if (netif_msg_ifdown(db))
1317 dev_dbg(db->dev, "shutting down %s\n", ndev->name);
1319 cancel_delayed_work_sync(&db->phy_poll);
1321 netif_stop_queue(ndev);
1322 netif_carrier_off(ndev);
1324 /* free interrupt */
1325 free_irq(ndev->irq, ndev);
1327 dm9000_shutdown(ndev);
1332 static const struct net_device_ops dm9000_netdev_ops = {
1333 .ndo_open = dm9000_open,
1334 .ndo_stop = dm9000_stop,
1335 .ndo_start_xmit = dm9000_start_xmit,
1336 .ndo_tx_timeout = dm9000_timeout,
1337 .ndo_set_multicast_list = dm9000_hash_table,
1338 .ndo_do_ioctl = dm9000_ioctl,
1339 .ndo_change_mtu = eth_change_mtu,
1340 .ndo_set_features = dm9000_set_features,
1341 .ndo_validate_addr = eth_validate_addr,
1342 .ndo_set_mac_address = eth_mac_addr,
1343 #ifdef CONFIG_NET_POLL_CONTROLLER
1344 .ndo_poll_controller = dm9000_poll_controller,
1349 * Search DM9000 board, allocate space and register it
1351 static int __devinit
1352 dm9000_probe(struct platform_device *pdev)
1354 struct dm9000_plat_data *pdata = pdev->dev.platform_data;
1355 struct board_info *db; /* Point a board information structure */
1356 struct net_device *ndev;
1357 const unsigned char *mac_src;
1363 /* Init network device */
1364 ndev = alloc_etherdev(sizeof(struct board_info));
1366 dev_err(&pdev->dev, "could not allocate device.\n");
1370 SET_NETDEV_DEV(ndev, &pdev->dev);
1372 dev_dbg(&pdev->dev, "dm9000_probe()\n");
1374 /* setup board info structure */
1375 db = netdev_priv(ndev);
1377 db->dev = &pdev->dev;
1380 spin_lock_init(&db->lock);
1381 mutex_init(&db->addr_lock);
1383 INIT_DELAYED_WORK(&db->phy_poll, dm9000_poll_work);
1385 db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1386 db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1387 db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1389 if (db->addr_res == NULL || db->data_res == NULL ||
1390 db->irq_res == NULL) {
1391 dev_err(db->dev, "insufficient resources\n");
1396 db->irq_wake = platform_get_irq(pdev, 1);
1397 if (db->irq_wake >= 0) {
1398 dev_dbg(db->dev, "wakeup irq %d\n", db->irq_wake);
1400 ret = request_irq(db->irq_wake, dm9000_wol_interrupt,
1401 IRQF_SHARED, dev_name(db->dev), ndev);
1403 dev_err(db->dev, "cannot get wakeup irq (%d)\n", ret);
1406 /* test to see if irq is really wakeup capable */
1407 ret = irq_set_irq_wake(db->irq_wake, 1);
1409 dev_err(db->dev, "irq %d cannot set wakeup (%d)\n",
1413 irq_set_irq_wake(db->irq_wake, 0);
1414 db->wake_supported = 1;
1419 iosize = resource_size(db->addr_res);
1420 db->addr_req = request_mem_region(db->addr_res->start, iosize,
1423 if (db->addr_req == NULL) {
1424 dev_err(db->dev, "cannot claim address reg area\n");
1429 db->io_addr = ioremap(db->addr_res->start, iosize);
1431 if (db->io_addr == NULL) {
1432 dev_err(db->dev, "failed to ioremap address reg\n");
1437 iosize = resource_size(db->data_res);
1438 db->data_req = request_mem_region(db->data_res->start, iosize,
1441 if (db->data_req == NULL) {
1442 dev_err(db->dev, "cannot claim data reg area\n");
1447 db->io_data = ioremap(db->data_res->start, iosize);
1449 if (db->io_data == NULL) {
1450 dev_err(db->dev, "failed to ioremap data reg\n");
1455 /* fill in parameters for net-dev structure */
1456 ndev->base_addr = (unsigned long)db->io_addr;
1458 //io init for dm9000 , modify by lyx@20100809
1459 if (pdata && pdata->io_init) {
1460 if (pdata->io_init()) {
1466 if (gpio_request(pdata->irq_pin, "dm9000 interrupt")) {
1467 gpio_free(pdata->irq_pin);
1468 if (pdata->io_deinit)
1470 printk("[fun:%s line:%d], request gpio for net interrupt fail\n", __func__,__LINE__);
1474 gpio_pull_updown(pdata->irq_pin, pdata->irq_pin_value);
1475 gpio_direction_input(pdata->irq_pin);
1477 ndev->irq = gpio_to_irq(pdata->irq_pin);
1478 //ndev->irq = db->irq_res->start;
1480 /* ensure at least we have a default set of IO routines */
1481 dm9000_set_io(db, iosize);
1483 /* check to see if anything is being over-ridden */
1484 if (pdata != NULL) {
1485 /* check to see if the driver wants to over-ride the
1486 * default IO width */
1488 if (pdata->flags & DM9000_PLATF_8BITONLY)
1489 dm9000_set_io(db, 1);
1491 if (pdata->flags & DM9000_PLATF_16BITONLY)
1492 dm9000_set_io(db, 2);
1494 if (pdata->flags & DM9000_PLATF_32BITONLY)
1495 dm9000_set_io(db, 4);
1497 /* check to see if there are any IO routine
1500 if (pdata->inblk != NULL)
1501 db->inblk = pdata->inblk;
1503 if (pdata->outblk != NULL)
1504 db->outblk = pdata->outblk;
1506 if (pdata->dumpblk != NULL)
1507 db->dumpblk = pdata->dumpblk;
1509 db->flags = pdata->flags;
1512 #ifdef CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL
1513 db->flags |= DM9000_PLATF_SIMPLE_PHY;
1518 /* try multiple times, DM9000 sometimes gets the read wrong */
1519 for (i = 0; i < 8; i++) {
1520 id_val = ior(db, DM9000_VIDL);
1521 id_val |= (u32)ior(db, DM9000_VIDH) << 8;
1522 id_val |= (u32)ior(db, DM9000_PIDL) << 16;
1523 id_val |= (u32)ior(db, DM9000_PIDH) << 24;
1525 if (id_val == DM9000_ID)
1527 dev_err(db->dev, "read wrong id 0x%08x\n", id_val);
1530 if (id_val != DM9000_ID) {
1531 dev_err(db->dev, "wrong id: 0x%08x\n", id_val);
1536 /* Identify what type of DM9000 we are working on */
1538 id_val = ior(db, DM9000_CHIPR);
1539 dev_dbg(db->dev, "dm9000 revision 0x%02x\n", id_val);
1543 db->type = TYPE_DM9000A;
1546 db->type = TYPE_DM9000B;
1549 dev_dbg(db->dev, "ID %02x => defaulting to DM9000E\n", id_val);
1550 db->type = TYPE_DM9000E;
1553 /* dm9000a/b are capable of hardware checksum offload */
1554 if (db->type == TYPE_DM9000A || db->type == TYPE_DM9000B) {
1555 ndev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM;
1556 ndev->features |= ndev->hw_features;
1559 /* from this point we assume that we have found a DM9000 */
1561 /* driver system function */
1564 ndev->netdev_ops = &dm9000_netdev_ops;
1565 ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
1566 ndev->ethtool_ops = &dm9000_ethtool_ops;
1568 db->msg_enable = NETIF_MSG_LINK;
1569 db->mii.phy_id_mask = 0x1f;
1570 db->mii.reg_num_mask = 0x1f;
1571 db->mii.force_media = 0;
1572 db->mii.full_duplex = 0;
1574 db->mii.mdio_read = dm9000_phy_read;
1575 db->mii.mdio_write = dm9000_phy_write;
1579 /* try reading the node address from the attached EEPROM */
1580 for (i = 0; i < 6; i += 2)
1581 dm9000_read_eeprom(db, i / 2, ndev->dev_addr+i);
1583 if (!is_valid_ether_addr(ndev->dev_addr) && pdata != NULL) {
1584 mac_src = "platform data";
1585 memcpy(ndev->dev_addr, pdata->dev_addr, 6);
1588 if (!is_valid_ether_addr(ndev->dev_addr)) {
1589 /* try reading from mac */
1592 for (i = 0; i < 6; i++)
1593 ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
1596 if (!is_valid_ether_addr(ndev->dev_addr)) {
1597 dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please "
1598 "set using ifconfig\n", ndev->name);
1600 random_ether_addr(ndev->dev_addr);
1605 platform_set_drvdata(pdev, ndev);
1606 ret = register_netdev(ndev);
1609 printk(KERN_INFO "%s: dm9000%c at %p,%p IRQ %d MAC: %pM (%s)\n",
1610 ndev->name, dm9000_type_to_char(db->type),
1611 db->io_addr, db->io_data, ndev->irq,
1612 ndev->dev_addr, mac_src);
1614 dm9000_shutdown(ndev);//add by lyx@20100713, reduce power consume
1619 dev_err(db->dev, "not found (%d).\n", ret);
1621 dm9000_release_board(pdev, db);
1628 dm9000_drv_suspend(struct device *dev)
1630 struct platform_device *pdev = to_platform_device(dev);
1631 struct net_device *ndev = platform_get_drvdata(pdev);
1635 db = netdev_priv(ndev);
1638 if (!netif_running(ndev))
1641 netif_device_detach(ndev);
1643 /* only shutdown if not using WoL */
1644 if (!db->wake_state)
1645 dm9000_shutdown(ndev);
1651 dm9000_drv_resume(struct device *dev)
1653 struct platform_device *pdev = to_platform_device(dev);
1654 struct net_device *ndev = platform_get_drvdata(pdev);
1655 board_info_t *db = netdev_priv(ndev);
1658 if (netif_running(ndev)) {
1659 /* reset if we were not in wake mode to ensure if
1660 * the device was powered off it is in a known state */
1661 if (!db->wake_state) {
1663 dm9000_init_dm9000(ndev);
1666 netif_device_attach(ndev);
1674 static const struct dev_pm_ops dm9000_drv_pm_ops = {
1675 .suspend = dm9000_drv_suspend,
1676 .resume = dm9000_drv_resume,
1679 static int __devexit
1680 dm9000_drv_remove(struct platform_device *pdev)
1682 struct net_device *ndev = platform_get_drvdata(pdev);
1683 struct dm9000_plat_data *pdata = pdev->dev.platform_data;
1685 //deinit io for dm9000
1686 gpio_free(pdata->irq_pin);
1687 if (pdata && pdata->io_deinit)
1690 platform_set_drvdata(pdev, NULL);
1692 unregister_netdev(ndev);
1693 dm9000_release_board(pdev, netdev_priv(ndev));
1694 free_netdev(ndev); /* free device structure */
1696 dev_dbg(&pdev->dev, "released and freed device\n");
1700 static struct platform_driver dm9000_driver = {
1703 .owner = THIS_MODULE,
1704 .pm = &dm9000_drv_pm_ops,
1706 .probe = dm9000_probe,
1707 .remove = __devexit_p(dm9000_drv_remove),
1713 printk(KERN_INFO "%s Ethernet Driver, V%s\n", CARDNAME, DRV_VERSION);
1715 return platform_driver_register(&dm9000_driver);
1719 dm9000_cleanup(void)
1721 platform_driver_unregister(&dm9000_driver);
1724 module_init(dm9000_init);
1725 module_exit(dm9000_cleanup);
1727 MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1728 MODULE_DESCRIPTION("Davicom DM9000 network driver");
1729 MODULE_LICENSE("GPL");
1730 MODULE_ALIAS("platform:dm9000");