2 * net/dsa/mv88e6352.c - Marvell 88e6352 switch chip support
4 * Copyright (c) 2014 Guenter Roeck
6 * Derived from mv88e6123_61_65.c
7 * Copyright (c) 2008-2009 Marvell Semiconductor
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
15 #include <linux/delay.h>
16 #include <linux/jiffies.h>
17 #include <linux/list.h>
18 #include <linux/module.h>
19 #include <linux/netdevice.h>
20 #include <linux/platform_device.h>
21 #include <linux/phy.h>
23 #include "mv88e6xxx.h"
25 static char *mv88e6352_probe(struct device *host_dev, int sw_addr)
27 struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev);
33 ret = __mv88e6xxx_reg_read(bus, sw_addr, REG_PORT(0), PORT_SWITCH_ID);
35 if ((ret & 0xfff0) == PORT_SWITCH_ID_6172)
36 return "Marvell 88E6172";
37 if ((ret & 0xfff0) == PORT_SWITCH_ID_6176)
38 return "Marvell 88E6176";
39 if (ret == PORT_SWITCH_ID_6320_A1)
40 return "Marvell 88E6320 (A1)";
41 if (ret == PORT_SWITCH_ID_6320_A2)
42 return "Marvell 88e6320 (A2)";
43 if ((ret & 0xfff0) == PORT_SWITCH_ID_6320)
44 return "Marvell 88E6320";
45 if (ret == PORT_SWITCH_ID_6321_A1)
46 return "Marvell 88E6321 (A1)";
47 if (ret == PORT_SWITCH_ID_6321_A2)
48 return "Marvell 88e6321 (A2)";
49 if ((ret & 0xfff0) == PORT_SWITCH_ID_6321)
50 return "Marvell 88E6321";
51 if (ret == PORT_SWITCH_ID_6352_A0)
52 return "Marvell 88E6352 (A0)";
53 if (ret == PORT_SWITCH_ID_6352_A1)
54 return "Marvell 88E6352 (A1)";
55 if ((ret & 0xfff0) == PORT_SWITCH_ID_6352)
56 return "Marvell 88E6352";
62 static int mv88e6352_setup_global(struct dsa_switch *ds)
64 u32 upstream_port = dsa_upstream_port(ds);
68 ret = mv88e6xxx_setup_global(ds);
72 /* Discard packets with excessive collisions,
73 * mask all interrupt sources, enable PPU (bit 14, undocumented).
75 REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL,
76 GLOBAL_CONTROL_PPU_ENABLE | GLOBAL_CONTROL_DISCARD_EXCESS);
78 /* Configure the upstream port, and configure the upstream
79 * port as the port to which ingress and egress monitor frames
82 reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
83 upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
84 upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT;
85 REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
87 /* Disable remote management for now, and set the switch's
90 REG_WRITE(REG_GLOBAL, 0x1c, ds->index & 0x1f);
95 #ifdef CONFIG_NET_DSA_HWMON
97 static int mv88e6352_get_temp(struct dsa_switch *ds, int *temp)
99 int phy = mv88e6xxx_6320_family(ds) ? 3 : 0;
104 ret = mv88e6xxx_phy_page_read(ds, phy, 6, 27);
108 *temp = (ret & 0xff) - 25;
113 static int mv88e6352_get_temp_limit(struct dsa_switch *ds, int *temp)
115 int phy = mv88e6xxx_6320_family(ds) ? 3 : 0;
120 ret = mv88e6xxx_phy_page_read(ds, phy, 6, 26);
124 *temp = (((ret >> 8) & 0x1f) * 5) - 25;
129 static int mv88e6352_set_temp_limit(struct dsa_switch *ds, int temp)
131 int phy = mv88e6xxx_6320_family(ds) ? 3 : 0;
134 ret = mv88e6xxx_phy_page_read(ds, phy, 6, 26);
137 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
138 return mv88e6xxx_phy_page_write(ds, phy, 6, 26,
139 (ret & 0xe0ff) | (temp << 8));
142 static int mv88e6352_get_temp_alarm(struct dsa_switch *ds, bool *alarm)
144 int phy = mv88e6xxx_6320_family(ds) ? 3 : 0;
149 ret = mv88e6xxx_phy_page_read(ds, phy, 6, 26);
153 *alarm = !!(ret & 0x40);
157 #endif /* CONFIG_NET_DSA_HWMON */
159 static int mv88e6352_setup(struct dsa_switch *ds)
161 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
164 ret = mv88e6xxx_setup_common(ds);
170 mutex_init(&ps->eeprom_mutex);
172 ret = mv88e6xxx_switch_reset(ds, true);
176 ret = mv88e6352_setup_global(ds);
180 return mv88e6xxx_setup_ports(ds);
183 static int mv88e6352_read_eeprom_word(struct dsa_switch *ds, int addr)
185 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
188 mutex_lock(&ps->eeprom_mutex);
190 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, 0x14,
191 0xc000 | (addr & 0xff));
195 ret = mv88e6xxx_eeprom_busy_wait(ds);
199 ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, 0x15);
201 mutex_unlock(&ps->eeprom_mutex);
205 static int mv88e6352_get_eeprom(struct dsa_switch *ds,
206 struct ethtool_eeprom *eeprom, u8 *data)
212 offset = eeprom->offset;
216 eeprom->magic = 0xc3ec4951;
218 ret = mv88e6xxx_eeprom_load_wait(ds);
225 word = mv88e6352_read_eeprom_word(ds, offset >> 1);
229 *data++ = (word >> 8) & 0xff;
239 word = mv88e6352_read_eeprom_word(ds, offset >> 1);
243 *data++ = word & 0xff;
244 *data++ = (word >> 8) & 0xff;
254 word = mv88e6352_read_eeprom_word(ds, offset >> 1);
258 *data++ = word & 0xff;
268 static int mv88e6352_eeprom_is_readonly(struct dsa_switch *ds)
272 ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, 0x14);
282 static int mv88e6352_write_eeprom_word(struct dsa_switch *ds, int addr,
285 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
288 mutex_lock(&ps->eeprom_mutex);
290 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, 0x15, data);
294 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, 0x14,
295 0xb000 | (addr & 0xff));
299 ret = mv88e6xxx_eeprom_busy_wait(ds);
301 mutex_unlock(&ps->eeprom_mutex);
305 static int mv88e6352_set_eeprom(struct dsa_switch *ds,
306 struct ethtool_eeprom *eeprom, u8 *data)
312 if (eeprom->magic != 0xc3ec4951)
315 ret = mv88e6352_eeprom_is_readonly(ds);
319 offset = eeprom->offset;
323 ret = mv88e6xxx_eeprom_load_wait(ds);
330 word = mv88e6352_read_eeprom_word(ds, offset >> 1);
334 word = (*data++ << 8) | (word & 0xff);
336 ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
349 word |= *data++ << 8;
351 ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
363 word = mv88e6352_read_eeprom_word(ds, offset >> 1);
367 word = (word & 0xff00) | *data++;
369 ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
381 struct dsa_switch_driver mv88e6352_switch_driver = {
382 .tag_protocol = DSA_TAG_PROTO_EDSA,
383 .priv_size = sizeof(struct mv88e6xxx_priv_state),
384 .probe = mv88e6352_probe,
385 .setup = mv88e6352_setup,
386 .set_addr = mv88e6xxx_set_addr_indirect,
387 .phy_read = mv88e6xxx_phy_read_indirect,
388 .phy_write = mv88e6xxx_phy_write_indirect,
389 .poll_link = mv88e6xxx_poll_link,
390 .get_strings = mv88e6xxx_get_strings,
391 .get_ethtool_stats = mv88e6xxx_get_ethtool_stats,
392 .get_sset_count = mv88e6xxx_get_sset_count,
393 .set_eee = mv88e6xxx_set_eee,
394 .get_eee = mv88e6xxx_get_eee,
395 #ifdef CONFIG_NET_DSA_HWMON
396 .get_temp = mv88e6352_get_temp,
397 .get_temp_limit = mv88e6352_get_temp_limit,
398 .set_temp_limit = mv88e6352_set_temp_limit,
399 .get_temp_alarm = mv88e6352_get_temp_alarm,
401 .get_eeprom = mv88e6352_get_eeprom,
402 .set_eeprom = mv88e6352_set_eeprom,
403 .get_regs_len = mv88e6xxx_get_regs_len,
404 .get_regs = mv88e6xxx_get_regs,
405 .port_join_bridge = mv88e6xxx_join_bridge,
406 .port_leave_bridge = mv88e6xxx_leave_bridge,
407 .port_stp_update = mv88e6xxx_port_stp_update,
408 .fdb_add = mv88e6xxx_port_fdb_add,
409 .fdb_del = mv88e6xxx_port_fdb_del,
410 .fdb_getnext = mv88e6xxx_port_fdb_getnext,
413 MODULE_ALIAS("platform:mv88e6172");
414 MODULE_ALIAS("platform:mv88e6176");
415 MODULE_ALIAS("platform:mv88e6320");
416 MODULE_ALIAS("platform:mv88e6321");
417 MODULE_ALIAS("platform:mv88e6352");