3 * Alchemy Au1x00 ethernet driver
5 * Copyright 2001-2003, 2006 MontaVista Software Inc.
6 * Copyright 2002 TimeSys Corp.
7 * Added ethtool/mii-tool support,
8 * Copyright 2004 Matt Porter <mporter@kernel.crashing.org>
9 * Update: 2004 Bjoern Riemer, riemer@fokus.fraunhofer.de
10 * or riemer@riemer-nt.de: fixed the link beat detection with
11 * ioctls (SIOCGMIIPHY)
12 * Copyright 2006 Herbert Valerio Riedel <hvr@gnu.org>
13 * converted to use linux-2.6.x's PHY framework
15 * Author: MontaVista Software, Inc.
16 * ppopov@mvista.com or source@mvista.com
18 * ########################################################################
20 * This program is free software; you can distribute it and/or modify it
21 * under the terms of the GNU General Public License (Version 2) as
22 * published by the Free Software Foundation.
24 * This program is distributed in the hope it will be useful, but WITHOUT
25 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
26 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
29 * You should have received a copy of the GNU General Public License along
30 * with this program; if not, write to the Free Software Foundation, Inc.,
31 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
33 * ########################################################################
37 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
39 #include <linux/capability.h>
40 #include <linux/dma-mapping.h>
41 #include <linux/module.h>
42 #include <linux/kernel.h>
43 #include <linux/string.h>
44 #include <linux/timer.h>
45 #include <linux/errno.h>
47 #include <linux/ioport.h>
48 #include <linux/bitops.h>
49 #include <linux/slab.h>
50 #include <linux/interrupt.h>
51 #include <linux/init.h>
52 #include <linux/netdevice.h>
53 #include <linux/etherdevice.h>
54 #include <linux/ethtool.h>
55 #include <linux/mii.h>
56 #include <linux/skbuff.h>
57 #include <linux/delay.h>
58 #include <linux/crc32.h>
59 #include <linux/phy.h>
60 #include <linux/platform_device.h>
61 #include <linux/cpu.h>
64 #include <asm/mipsregs.h>
66 #include <asm/processor.h>
69 #include <au1xxx_eth.h>
72 #include "au1000_eth.h"
74 #ifdef AU1000_ETH_DEBUG
75 static int au1000_debug = 5;
77 static int au1000_debug = 3;
80 #define AU1000_DEF_MSG_ENABLE (NETIF_MSG_DRV | \
84 #define DRV_NAME "au1000_eth"
85 #define DRV_VERSION "1.7"
86 #define DRV_AUTHOR "Pete Popov <ppopov@embeddedalley.com>"
87 #define DRV_DESC "Au1xxx on-chip Ethernet driver"
89 MODULE_AUTHOR(DRV_AUTHOR);
90 MODULE_DESCRIPTION(DRV_DESC);
91 MODULE_LICENSE("GPL");
92 MODULE_VERSION(DRV_VERSION);
97 * The Au1000 MACs use a simple rx and tx descriptor ring scheme.
98 * There are four receive and four transmit descriptors. These
99 * descriptors are not in memory; rather, they are just a set of
100 * hardware registers.
102 * Since the Au1000 has a coherent data cache, the receive and
103 * transmit buffers are allocated from the KSEG0 segment. The
104 * hardware registers, however, are still mapped at KSEG1 to
105 * make sure there's no out-of-order writes, and that all writes
106 * complete immediately.
110 * board-specific configurations
112 * PHY detection algorithm
114 * If phy_static_config is undefined, the PHY setup is
117 * mii_probe() first searches the current MAC's MII bus for a PHY,
118 * selecting the first (or last, if phy_search_highest_addr is
119 * defined) PHY address not already claimed by another netdev.
121 * If nothing was found that way when searching for the 2nd ethernet
122 * controller's PHY and phy1_search_mac0 is defined, then
123 * the first MII bus is searched as well for an unclaimed PHY; this is
124 * needed in case of a dual-PHY accessible only through the MAC0's MII
127 * Finally, if no PHY is found, then the corresponding ethernet
128 * controller is not registered to the network subsystem.
131 /* autodetection defaults: phy1_search_mac0 */
135 * most boards PHY setup should be detectable properly with the
136 * autodetection algorithm in mii_probe(), but in some cases (e.g. if
137 * you have a switch attached, or want to use the PHY's interrupt
138 * notification capabilities) you can provide a static PHY
141 * IRQs may only be set, if a PHY address was configured
142 * If a PHY address is given, also a bus id is required to be set
144 * ps: make sure the used irqs are configured properly in the board
148 static void au1000_enable_mac(struct net_device *dev, int force_reset)
151 struct au1000_private *aup = netdev_priv(dev);
153 spin_lock_irqsave(&aup->lock, flags);
155 if (force_reset || (!aup->mac_enabled)) {
156 writel(MAC_EN_CLOCK_ENABLE, aup->enable);
158 writel((MAC_EN_RESET0 | MAC_EN_RESET1 | MAC_EN_RESET2
159 | MAC_EN_CLOCK_ENABLE), aup->enable);
162 aup->mac_enabled = 1;
165 spin_unlock_irqrestore(&aup->lock, flags);
171 static int au1000_mdio_read(struct net_device *dev, int phy_addr, int reg)
173 struct au1000_private *aup = netdev_priv(dev);
174 u32 *const mii_control_reg = &aup->mac->mii_control;
175 u32 *const mii_data_reg = &aup->mac->mii_data;
179 while (readl(mii_control_reg) & MAC_MII_BUSY) {
181 if (--timedout == 0) {
182 netdev_err(dev, "read_MII busy timeout!!\n");
187 mii_control = MAC_SET_MII_SELECT_REG(reg) |
188 MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_READ;
190 writel(mii_control, mii_control_reg);
193 while (readl(mii_control_reg) & MAC_MII_BUSY) {
195 if (--timedout == 0) {
196 netdev_err(dev, "mdio_read busy timeout!!\n");
200 return readl(mii_data_reg);
203 static void au1000_mdio_write(struct net_device *dev, int phy_addr,
206 struct au1000_private *aup = netdev_priv(dev);
207 u32 *const mii_control_reg = &aup->mac->mii_control;
208 u32 *const mii_data_reg = &aup->mac->mii_data;
212 while (readl(mii_control_reg) & MAC_MII_BUSY) {
214 if (--timedout == 0) {
215 netdev_err(dev, "mdio_write busy timeout!!\n");
220 mii_control = MAC_SET_MII_SELECT_REG(reg) |
221 MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_WRITE;
223 writel(value, mii_data_reg);
224 writel(mii_control, mii_control_reg);
227 static int au1000_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
229 /* WARNING: bus->phy_map[phy_addr].attached_dev == dev does
230 * _NOT_ hold (e.g. when PHY is accessed through other MAC's MII bus)
232 struct net_device *const dev = bus->priv;
234 /* make sure the MAC associated with this
237 au1000_enable_mac(dev, 0);
239 return au1000_mdio_read(dev, phy_addr, regnum);
242 static int au1000_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
245 struct net_device *const dev = bus->priv;
247 /* make sure the MAC associated with this
250 au1000_enable_mac(dev, 0);
252 au1000_mdio_write(dev, phy_addr, regnum, value);
256 static int au1000_mdiobus_reset(struct mii_bus *bus)
258 struct net_device *const dev = bus->priv;
260 /* make sure the MAC associated with this
263 au1000_enable_mac(dev, 0);
268 static void au1000_hard_stop(struct net_device *dev)
270 struct au1000_private *aup = netdev_priv(dev);
273 netif_dbg(aup, drv, dev, "hard stop\n");
275 reg = readl(&aup->mac->control);
276 reg &= ~(MAC_RX_ENABLE | MAC_TX_ENABLE);
277 writel(reg, &aup->mac->control);
281 static void au1000_enable_rx_tx(struct net_device *dev)
283 struct au1000_private *aup = netdev_priv(dev);
286 netif_dbg(aup, hw, dev, "enable_rx_tx\n");
288 reg = readl(&aup->mac->control);
289 reg |= (MAC_RX_ENABLE | MAC_TX_ENABLE);
290 writel(reg, &aup->mac->control);
295 au1000_adjust_link(struct net_device *dev)
297 struct au1000_private *aup = netdev_priv(dev);
298 struct phy_device *phydev = aup->phy_dev;
302 int status_change = 0;
304 BUG_ON(!aup->phy_dev);
306 spin_lock_irqsave(&aup->lock, flags);
308 if (phydev->link && (aup->old_speed != phydev->speed)) {
311 switch (phydev->speed) {
316 netdev_warn(dev, "Speed (%d) is not 10/100 ???\n",
321 aup->old_speed = phydev->speed;
326 if (phydev->link && (aup->old_duplex != phydev->duplex)) {
327 /* duplex mode changed */
329 /* switching duplex mode requires to disable rx and tx! */
330 au1000_hard_stop(dev);
332 reg = readl(&aup->mac->control);
333 if (DUPLEX_FULL == phydev->duplex) {
334 reg |= MAC_FULL_DUPLEX;
335 reg &= ~MAC_DISABLE_RX_OWN;
337 reg &= ~MAC_FULL_DUPLEX;
338 reg |= MAC_DISABLE_RX_OWN;
340 writel(reg, &aup->mac->control);
343 au1000_enable_rx_tx(dev);
344 aup->old_duplex = phydev->duplex;
349 if (phydev->link != aup->old_link) {
350 /* link state changed */
355 aup->old_duplex = -1;
358 aup->old_link = phydev->link;
362 spin_unlock_irqrestore(&aup->lock, flags);
366 netdev_info(dev, "link up (%d/%s)\n",
368 DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
370 netdev_info(dev, "link down\n");
374 static int au1000_mii_probe(struct net_device *dev)
376 struct au1000_private *const aup = netdev_priv(dev);
377 struct phy_device *phydev = NULL;
380 if (aup->phy_static_config) {
381 BUG_ON(aup->mac_id < 0 || aup->mac_id > 1);
384 phydev = aup->mii_bus->phy_map[aup->phy_addr];
386 netdev_info(dev, "using PHY-less setup\n");
390 /* find the first (lowest address) PHY
391 * on the current MAC's MII bus
393 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++)
394 if (aup->mii_bus->phy_map[phy_addr]) {
395 phydev = aup->mii_bus->phy_map[phy_addr];
396 if (!aup->phy_search_highest_addr)
397 /* break out with first one found */
401 if (aup->phy1_search_mac0) {
402 /* try harder to find a PHY */
403 if (!phydev && (aup->mac_id == 1)) {
404 /* no PHY found, maybe we have a dual PHY? */
405 dev_info(&dev->dev, ": no PHY found on MAC1, "
406 "let's see if it's attached to MAC0...\n");
408 /* find the first (lowest address) non-attached
409 * PHY on the MAC0 MII bus
411 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
412 struct phy_device *const tmp_phydev =
413 aup->mii_bus->phy_map[phy_addr];
415 if (aup->mac_id == 1)
422 /* already claimed by MAC0 */
423 if (tmp_phydev->attached_dev)
427 break; /* found it */
433 netdev_err(dev, "no PHY found\n");
437 /* now we are supposed to have a proper phydev, to attach to... */
438 BUG_ON(phydev->attached_dev);
440 phydev = phy_connect(dev, dev_name(&phydev->dev),
441 &au1000_adjust_link, PHY_INTERFACE_MODE_MII);
443 if (IS_ERR(phydev)) {
444 netdev_err(dev, "Could not attach to PHY\n");
445 return PTR_ERR(phydev);
448 /* mask with MAC supported features */
449 phydev->supported &= (SUPPORTED_10baseT_Half
450 | SUPPORTED_10baseT_Full
451 | SUPPORTED_100baseT_Half
452 | SUPPORTED_100baseT_Full
454 /* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */
458 phydev->advertising = phydev->supported;
462 aup->old_duplex = -1;
463 aup->phy_dev = phydev;
465 netdev_info(dev, "attached PHY driver [%s] "
466 "(mii_bus:phy_addr=%s, irq=%d)\n",
467 phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
474 * Buffer allocation/deallocation routines. The buffer descriptor returned
475 * has the virtual and dma address of a buffer suitable for
476 * both, receive and transmit operations.
478 static struct db_dest *au1000_GetFreeDB(struct au1000_private *aup)
484 aup->pDBfree = pDB->pnext;
489 void au1000_ReleaseDB(struct au1000_private *aup, struct db_dest *pDB)
491 struct db_dest *pDBfree = aup->pDBfree;
493 pDBfree->pnext = pDB;
497 static void au1000_reset_mac_unlocked(struct net_device *dev)
499 struct au1000_private *const aup = netdev_priv(dev);
502 au1000_hard_stop(dev);
504 writel(MAC_EN_CLOCK_ENABLE, aup->enable);
506 writel(0, aup->enable);
510 for (i = 0; i < NUM_RX_DMA; i++) {
511 /* reset control bits */
512 aup->rx_dma_ring[i]->buff_stat &= ~0xf;
514 for (i = 0; i < NUM_TX_DMA; i++) {
515 /* reset control bits */
516 aup->tx_dma_ring[i]->buff_stat &= ~0xf;
519 aup->mac_enabled = 0;
523 static void au1000_reset_mac(struct net_device *dev)
525 struct au1000_private *const aup = netdev_priv(dev);
528 netif_dbg(aup, hw, dev, "reset mac, aup %x\n",
531 spin_lock_irqsave(&aup->lock, flags);
533 au1000_reset_mac_unlocked(dev);
535 spin_unlock_irqrestore(&aup->lock, flags);
539 * Setup the receive and transmit "rings". These pointers are the addresses
540 * of the rx and tx MAC DMA registers so they are fixed by the hardware --
541 * these are not descriptors sitting in memory.
544 au1000_setup_hw_rings(struct au1000_private *aup, void __iomem *tx_base)
548 for (i = 0; i < NUM_RX_DMA; i++) {
549 aup->rx_dma_ring[i] = (struct rx_dma *)
550 (tx_base + 0x100 + sizeof(struct rx_dma) * i);
552 for (i = 0; i < NUM_TX_DMA; i++) {
553 aup->tx_dma_ring[i] = (struct tx_dma *)
554 (tx_base + sizeof(struct tx_dma) * i);
562 static int au1000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
564 struct au1000_private *aup = netdev_priv(dev);
567 return phy_ethtool_gset(aup->phy_dev, cmd);
572 static int au1000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
574 struct au1000_private *aup = netdev_priv(dev);
576 if (!capable(CAP_NET_ADMIN))
580 return phy_ethtool_sset(aup->phy_dev, cmd);
586 au1000_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
588 struct au1000_private *aup = netdev_priv(dev);
590 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
591 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
592 snprintf(info->bus_info, sizeof(info->bus_info), "%s %d", DRV_NAME,
594 info->regdump_len = 0;
597 static void au1000_set_msglevel(struct net_device *dev, u32 value)
599 struct au1000_private *aup = netdev_priv(dev);
600 aup->msg_enable = value;
603 static u32 au1000_get_msglevel(struct net_device *dev)
605 struct au1000_private *aup = netdev_priv(dev);
606 return aup->msg_enable;
609 static const struct ethtool_ops au1000_ethtool_ops = {
610 .get_settings = au1000_get_settings,
611 .set_settings = au1000_set_settings,
612 .get_drvinfo = au1000_get_drvinfo,
613 .get_link = ethtool_op_get_link,
614 .get_msglevel = au1000_get_msglevel,
615 .set_msglevel = au1000_set_msglevel,
620 * Initialize the interface.
622 * When the device powers up, the clocks are disabled and the
623 * mac is in reset state. When the interface is closed, we
624 * do the same -- reset the device and disable the clocks to
625 * conserve power. Thus, whenever au1000_init() is called,
626 * the device should already be in reset state.
628 static int au1000_init(struct net_device *dev)
630 struct au1000_private *aup = netdev_priv(dev);
635 netif_dbg(aup, hw, dev, "au1000_init\n");
637 /* bring the device out of reset */
638 au1000_enable_mac(dev, 1);
640 spin_lock_irqsave(&aup->lock, flags);
642 writel(0, &aup->mac->control);
643 aup->tx_head = (aup->tx_dma_ring[0]->buff_stat & 0xC) >> 2;
644 aup->tx_tail = aup->tx_head;
645 aup->rx_head = (aup->rx_dma_ring[0]->buff_stat & 0xC) >> 2;
647 writel(dev->dev_addr[5]<<8 | dev->dev_addr[4],
648 &aup->mac->mac_addr_high);
649 writel(dev->dev_addr[3]<<24 | dev->dev_addr[2]<<16 |
650 dev->dev_addr[1]<<8 | dev->dev_addr[0],
651 &aup->mac->mac_addr_low);
654 for (i = 0; i < NUM_RX_DMA; i++)
655 aup->rx_dma_ring[i]->buff_stat |= RX_DMA_ENABLE;
659 control = MAC_RX_ENABLE | MAC_TX_ENABLE;
660 #ifndef CONFIG_CPU_LITTLE_ENDIAN
661 control |= MAC_BIG_ENDIAN;
664 if (aup->phy_dev->link && (DUPLEX_FULL == aup->phy_dev->duplex))
665 control |= MAC_FULL_DUPLEX;
667 control |= MAC_DISABLE_RX_OWN;
668 } else { /* PHY-less op, assume full-duplex */
669 control |= MAC_FULL_DUPLEX;
672 writel(control, &aup->mac->control);
673 writel(0x8100, &aup->mac->vlan1_tag); /* activate vlan support */
676 spin_unlock_irqrestore(&aup->lock, flags);
680 static inline void au1000_update_rx_stats(struct net_device *dev, u32 status)
682 struct net_device_stats *ps = &dev->stats;
685 if (status & RX_MCAST_FRAME)
688 if (status & RX_ERROR) {
690 if (status & RX_MISSED_FRAME)
691 ps->rx_missed_errors++;
692 if (status & (RX_OVERLEN | RX_RUNT | RX_LEN_ERROR))
693 ps->rx_length_errors++;
694 if (status & RX_CRC_ERROR)
696 if (status & RX_COLL)
699 ps->rx_bytes += status & RX_FRAME_LEN_MASK;
704 * Au1000 receive routine.
706 static int au1000_rx(struct net_device *dev)
708 struct au1000_private *aup = netdev_priv(dev);
711 u32 buff_stat, status;
715 netif_dbg(aup, rx_status, dev, "au1000_rx head %d\n", aup->rx_head);
717 prxd = aup->rx_dma_ring[aup->rx_head];
718 buff_stat = prxd->buff_stat;
719 while (buff_stat & RX_T_DONE) {
720 status = prxd->status;
721 pDB = aup->rx_db_inuse[aup->rx_head];
722 au1000_update_rx_stats(dev, status);
723 if (!(status & RX_ERROR)) {
726 frmlen = (status & RX_FRAME_LEN_MASK);
727 frmlen -= 4; /* Remove FCS */
728 skb = netdev_alloc_skb(dev, frmlen + 2);
730 dev->stats.rx_dropped++;
733 skb_reserve(skb, 2); /* 16 byte IP header align */
734 skb_copy_to_linear_data(skb,
735 (unsigned char *)pDB->vaddr, frmlen);
736 skb_put(skb, frmlen);
737 skb->protocol = eth_type_trans(skb, dev);
738 netif_rx(skb); /* pass the packet to upper layers */
740 if (au1000_debug > 4) {
741 pr_err("rx_error(s):");
742 if (status & RX_MISSED_FRAME)
744 if (status & RX_WDOG_TIMER)
746 if (status & RX_RUNT)
748 if (status & RX_OVERLEN)
750 if (status & RX_COLL)
752 if (status & RX_MII_ERROR)
753 pr_cont(" mii error");
754 if (status & RX_CRC_ERROR)
755 pr_cont(" crc error");
756 if (status & RX_LEN_ERROR)
757 pr_cont(" len error");
758 if (status & RX_U_CNTRL_FRAME)
759 pr_cont(" u control frame");
763 prxd->buff_stat = (u32)(pDB->dma_addr | RX_DMA_ENABLE);
764 aup->rx_head = (aup->rx_head + 1) & (NUM_RX_DMA - 1);
767 /* next descriptor */
768 prxd = aup->rx_dma_ring[aup->rx_head];
769 buff_stat = prxd->buff_stat;
774 static void au1000_update_tx_stats(struct net_device *dev, u32 status)
776 struct au1000_private *aup = netdev_priv(dev);
777 struct net_device_stats *ps = &dev->stats;
779 if (status & TX_FRAME_ABORTED) {
780 if (!aup->phy_dev || (DUPLEX_FULL == aup->phy_dev->duplex)) {
781 if (status & (TX_JAB_TIMEOUT | TX_UNDERRUN)) {
782 /* any other tx errors are only valid
783 * in half duplex mode
786 ps->tx_aborted_errors++;
790 ps->tx_aborted_errors++;
791 if (status & (TX_NO_CARRIER | TX_LOSS_CARRIER))
792 ps->tx_carrier_errors++;
798 * Called from the interrupt service routine to acknowledge
799 * the TX DONE bits. This is a must if the irq is setup as
802 static void au1000_tx_ack(struct net_device *dev)
804 struct au1000_private *aup = netdev_priv(dev);
807 ptxd = aup->tx_dma_ring[aup->tx_tail];
809 while (ptxd->buff_stat & TX_T_DONE) {
810 au1000_update_tx_stats(dev, ptxd->status);
811 ptxd->buff_stat &= ~TX_T_DONE;
815 aup->tx_tail = (aup->tx_tail + 1) & (NUM_TX_DMA - 1);
816 ptxd = aup->tx_dma_ring[aup->tx_tail];
820 netif_wake_queue(dev);
826 * Au1000 interrupt service routine.
828 static irqreturn_t au1000_interrupt(int irq, void *dev_id)
830 struct net_device *dev = dev_id;
832 /* Handle RX interrupts first to minimize chance of overrun */
836 return IRQ_RETVAL(1);
839 static int au1000_open(struct net_device *dev)
842 struct au1000_private *aup = netdev_priv(dev);
844 netif_dbg(aup, drv, dev, "open: dev=%p\n", dev);
846 retval = request_irq(dev->irq, au1000_interrupt, 0,
849 netdev_err(dev, "unable to get IRQ %d\n", dev->irq);
853 retval = au1000_init(dev);
855 netdev_err(dev, "error in au1000_init\n");
856 free_irq(dev->irq, dev);
861 /* cause the PHY state machine to schedule a link state check */
862 aup->phy_dev->state = PHY_CHANGELINK;
863 phy_start(aup->phy_dev);
866 netif_start_queue(dev);
868 netif_dbg(aup, drv, dev, "open: Initialization done.\n");
873 static int au1000_close(struct net_device *dev)
876 struct au1000_private *const aup = netdev_priv(dev);
878 netif_dbg(aup, drv, dev, "close: dev=%p\n", dev);
881 phy_stop(aup->phy_dev);
883 spin_lock_irqsave(&aup->lock, flags);
885 au1000_reset_mac_unlocked(dev);
887 /* stop the device */
888 netif_stop_queue(dev);
890 /* disable the interrupt */
891 free_irq(dev->irq, dev);
892 spin_unlock_irqrestore(&aup->lock, flags);
898 * Au1000 transmit routine.
900 static netdev_tx_t au1000_tx(struct sk_buff *skb, struct net_device *dev)
902 struct au1000_private *aup = netdev_priv(dev);
903 struct net_device_stats *ps = &dev->stats;
909 netif_dbg(aup, tx_queued, dev, "tx: aup %x len=%d, data=%p, head %d\n",
910 (unsigned)aup, skb->len,
911 skb->data, aup->tx_head);
913 ptxd = aup->tx_dma_ring[aup->tx_head];
914 buff_stat = ptxd->buff_stat;
915 if (buff_stat & TX_DMA_ENABLE) {
916 /* We've wrapped around and the transmitter is still busy */
917 netif_stop_queue(dev);
919 return NETDEV_TX_BUSY;
920 } else if (buff_stat & TX_T_DONE) {
921 au1000_update_tx_stats(dev, ptxd->status);
927 netif_wake_queue(dev);
930 pDB = aup->tx_db_inuse[aup->tx_head];
931 skb_copy_from_linear_data(skb, (void *)pDB->vaddr, skb->len);
932 if (skb->len < ETH_ZLEN) {
933 for (i = skb->len; i < ETH_ZLEN; i++)
934 ((char *)pDB->vaddr)[i] = 0;
936 ptxd->len = ETH_ZLEN;
938 ptxd->len = skb->len;
941 ps->tx_bytes += ptxd->len;
943 ptxd->buff_stat = pDB->dma_addr | TX_DMA_ENABLE;
946 aup->tx_head = (aup->tx_head + 1) & (NUM_TX_DMA - 1);
951 * The Tx ring has been full longer than the watchdog timeout
952 * value. The transmitter must be hung?
954 static void au1000_tx_timeout(struct net_device *dev)
956 netdev_err(dev, "au1000_tx_timeout: dev=%p\n", dev);
957 au1000_reset_mac(dev);
959 dev->trans_start = jiffies; /* prevent tx timeout */
960 netif_wake_queue(dev);
963 static void au1000_multicast_list(struct net_device *dev)
965 struct au1000_private *aup = netdev_priv(dev);
968 netif_dbg(aup, drv, dev, "%s: flags=%x\n", __func__, dev->flags);
969 reg = readl(&aup->mac->control);
970 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
971 reg |= MAC_PROMISCUOUS;
972 } else if ((dev->flags & IFF_ALLMULTI) ||
973 netdev_mc_count(dev) > MULTICAST_FILTER_LIMIT) {
974 reg |= MAC_PASS_ALL_MULTI;
975 reg &= ~MAC_PROMISCUOUS;
976 netdev_info(dev, "Pass all multicast\n");
978 struct netdev_hw_addr *ha;
979 u32 mc_filter[2]; /* Multicast hash filter */
981 mc_filter[1] = mc_filter[0] = 0;
982 netdev_for_each_mc_addr(ha, dev)
983 set_bit(ether_crc(ETH_ALEN, ha->addr)>>26,
985 writel(mc_filter[1], &aup->mac->multi_hash_high);
986 writel(mc_filter[0], &aup->mac->multi_hash_low);
987 reg &= ~MAC_PROMISCUOUS;
988 reg |= MAC_HASH_MODE;
990 writel(reg, &aup->mac->control);
993 static int au1000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
995 struct au1000_private *aup = netdev_priv(dev);
997 if (!netif_running(dev))
1001 return -EINVAL; /* PHY not controllable */
1003 return phy_mii_ioctl(aup->phy_dev, rq, cmd);
1006 static const struct net_device_ops au1000_netdev_ops = {
1007 .ndo_open = au1000_open,
1008 .ndo_stop = au1000_close,
1009 .ndo_start_xmit = au1000_tx,
1010 .ndo_set_rx_mode = au1000_multicast_list,
1011 .ndo_do_ioctl = au1000_ioctl,
1012 .ndo_tx_timeout = au1000_tx_timeout,
1013 .ndo_set_mac_address = eth_mac_addr,
1014 .ndo_validate_addr = eth_validate_addr,
1015 .ndo_change_mtu = eth_change_mtu,
1018 static int au1000_probe(struct platform_device *pdev)
1020 static unsigned version_printed;
1021 struct au1000_private *aup = NULL;
1022 struct au1000_eth_platform_data *pd;
1023 struct net_device *dev = NULL;
1024 struct db_dest *pDB, *pDBfree;
1025 int irq, i, err = 0;
1026 struct resource *base, *macen, *macdma;
1028 base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1030 dev_err(&pdev->dev, "failed to retrieve base register\n");
1035 macen = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1037 dev_err(&pdev->dev, "failed to retrieve MAC Enable register\n");
1042 irq = platform_get_irq(pdev, 0);
1044 dev_err(&pdev->dev, "failed to retrieve IRQ\n");
1049 macdma = platform_get_resource(pdev, IORESOURCE_MEM, 2);
1051 dev_err(&pdev->dev, "failed to retrieve MACDMA registers\n");
1056 if (!request_mem_region(base->start, resource_size(base),
1058 dev_err(&pdev->dev, "failed to request memory region for base registers\n");
1063 if (!request_mem_region(macen->start, resource_size(macen),
1065 dev_err(&pdev->dev, "failed to request memory region for MAC enable register\n");
1070 if (!request_mem_region(macdma->start, resource_size(macdma),
1072 dev_err(&pdev->dev, "failed to request MACDMA memory region\n");
1077 dev = alloc_etherdev(sizeof(struct au1000_private));
1083 SET_NETDEV_DEV(dev, &pdev->dev);
1084 platform_set_drvdata(pdev, dev);
1085 aup = netdev_priv(dev);
1087 spin_lock_init(&aup->lock);
1088 aup->msg_enable = (au1000_debug < 4 ?
1089 AU1000_DEF_MSG_ENABLE : au1000_debug);
1091 /* Allocate the data buffers
1092 * Snooping works fine with eth on all au1xxx
1094 aup->vaddr = (u32)dma_alloc_noncoherent(NULL, MAX_BUF_SIZE *
1095 (NUM_TX_BUFFS + NUM_RX_BUFFS),
1098 dev_err(&pdev->dev, "failed to allocate data buffers\n");
1103 /* aup->mac is the base address of the MAC's registers */
1104 aup->mac = (struct mac_reg *)
1105 ioremap_nocache(base->start, resource_size(base));
1107 dev_err(&pdev->dev, "failed to ioremap MAC registers\n");
1112 /* Setup some variables for quick register address access */
1113 aup->enable = (u32 *)ioremap_nocache(macen->start,
1114 resource_size(macen));
1116 dev_err(&pdev->dev, "failed to ioremap MAC enable register\n");
1120 aup->mac_id = pdev->id;
1122 aup->macdma = ioremap_nocache(macdma->start, resource_size(macdma));
1124 dev_err(&pdev->dev, "failed to ioremap MACDMA registers\n");
1129 au1000_setup_hw_rings(aup, aup->macdma);
1131 writel(0, aup->enable);
1132 aup->mac_enabled = 0;
1134 pd = pdev->dev.platform_data;
1136 dev_info(&pdev->dev, "no platform_data passed,"
1137 " PHY search on MAC0\n");
1138 aup->phy1_search_mac0 = 1;
1140 if (is_valid_ether_addr(pd->mac)) {
1141 memcpy(dev->dev_addr, pd->mac, 6);
1143 /* Set a random MAC since no valid provided by platform_data. */
1144 eth_hw_addr_random(dev);
1147 aup->phy_static_config = pd->phy_static_config;
1148 aup->phy_search_highest_addr = pd->phy_search_highest_addr;
1149 aup->phy1_search_mac0 = pd->phy1_search_mac0;
1150 aup->phy_addr = pd->phy_addr;
1151 aup->phy_busid = pd->phy_busid;
1152 aup->phy_irq = pd->phy_irq;
1155 if (aup->phy_busid && aup->phy_busid > 0) {
1156 dev_err(&pdev->dev, "MAC0-associated PHY attached 2nd MACs MII bus not supported yet\n");
1158 goto err_mdiobus_alloc;
1161 aup->mii_bus = mdiobus_alloc();
1162 if (aup->mii_bus == NULL) {
1163 dev_err(&pdev->dev, "failed to allocate mdiobus structure\n");
1165 goto err_mdiobus_alloc;
1168 aup->mii_bus->priv = dev;
1169 aup->mii_bus->read = au1000_mdiobus_read;
1170 aup->mii_bus->write = au1000_mdiobus_write;
1171 aup->mii_bus->reset = au1000_mdiobus_reset;
1172 aup->mii_bus->name = "au1000_eth_mii";
1173 snprintf(aup->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1174 pdev->name, aup->mac_id);
1175 aup->mii_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
1176 if (aup->mii_bus->irq == NULL) {
1181 for (i = 0; i < PHY_MAX_ADDR; ++i)
1182 aup->mii_bus->irq[i] = PHY_POLL;
1183 /* if known, set corresponding PHY IRQs */
1184 if (aup->phy_static_config)
1185 if (aup->phy_irq && aup->phy_busid == aup->mac_id)
1186 aup->mii_bus->irq[aup->phy_addr] = aup->phy_irq;
1188 err = mdiobus_register(aup->mii_bus);
1190 dev_err(&pdev->dev, "failed to register MDIO bus\n");
1191 goto err_mdiobus_reg;
1194 err = au1000_mii_probe(dev);
1199 /* setup the data buffer descriptors and attach a buffer to each one */
1201 for (i = 0; i < (NUM_TX_BUFFS+NUM_RX_BUFFS); i++) {
1202 pDB->pnext = pDBfree;
1204 pDB->vaddr = (u32 *)((unsigned)aup->vaddr + MAX_BUF_SIZE*i);
1205 pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
1208 aup->pDBfree = pDBfree;
1211 for (i = 0; i < NUM_RX_DMA; i++) {
1212 pDB = au1000_GetFreeDB(aup);
1216 aup->rx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
1217 aup->rx_db_inuse[i] = pDB;
1221 for (i = 0; i < NUM_TX_DMA; i++) {
1222 pDB = au1000_GetFreeDB(aup);
1226 aup->tx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
1227 aup->tx_dma_ring[i]->len = 0;
1228 aup->tx_db_inuse[i] = pDB;
1231 dev->base_addr = base->start;
1233 dev->netdev_ops = &au1000_netdev_ops;
1234 SET_ETHTOOL_OPS(dev, &au1000_ethtool_ops);
1235 dev->watchdog_timeo = ETH_TX_TIMEOUT;
1238 * The boot code uses the ethernet controller, so reset it to start
1239 * fresh. au1000_init() expects that the device is in reset state.
1241 au1000_reset_mac(dev);
1243 err = register_netdev(dev);
1245 netdev_err(dev, "Cannot register net device, aborting.\n");
1249 netdev_info(dev, "Au1xx0 Ethernet found at 0x%lx, irq %d\n",
1250 (unsigned long)base->start, irq);
1251 if (version_printed++ == 0)
1252 pr_info("%s version %s %s\n",
1253 DRV_NAME, DRV_VERSION, DRV_AUTHOR);
1258 if (aup->mii_bus != NULL)
1259 mdiobus_unregister(aup->mii_bus);
1261 /* here we should have a valid dev plus aup-> register addresses
1262 * so we can reset the mac properly.
1264 au1000_reset_mac(dev);
1266 for (i = 0; i < NUM_RX_DMA; i++) {
1267 if (aup->rx_db_inuse[i])
1268 au1000_ReleaseDB(aup, aup->rx_db_inuse[i]);
1270 for (i = 0; i < NUM_TX_DMA; i++) {
1271 if (aup->tx_db_inuse[i])
1272 au1000_ReleaseDB(aup, aup->tx_db_inuse[i]);
1275 mdiobus_free(aup->mii_bus);
1277 iounmap(aup->macdma);
1279 iounmap(aup->enable);
1283 dma_free_noncoherent(NULL, MAX_BUF_SIZE * (NUM_TX_BUFFS + NUM_RX_BUFFS),
1284 (void *)aup->vaddr, aup->dma_addr);
1288 release_mem_region(macdma->start, resource_size(macdma));
1290 release_mem_region(macen->start, resource_size(macen));
1292 release_mem_region(base->start, resource_size(base));
1297 static int au1000_remove(struct platform_device *pdev)
1299 struct net_device *dev = platform_get_drvdata(pdev);
1300 struct au1000_private *aup = netdev_priv(dev);
1302 struct resource *base, *macen;
1304 platform_set_drvdata(pdev, NULL);
1306 unregister_netdev(dev);
1307 mdiobus_unregister(aup->mii_bus);
1308 mdiobus_free(aup->mii_bus);
1310 for (i = 0; i < NUM_RX_DMA; i++)
1311 if (aup->rx_db_inuse[i])
1312 au1000_ReleaseDB(aup, aup->rx_db_inuse[i]);
1314 for (i = 0; i < NUM_TX_DMA; i++)
1315 if (aup->tx_db_inuse[i])
1316 au1000_ReleaseDB(aup, aup->tx_db_inuse[i]);
1318 dma_free_noncoherent(NULL, MAX_BUF_SIZE *
1319 (NUM_TX_BUFFS + NUM_RX_BUFFS),
1320 (void *)aup->vaddr, aup->dma_addr);
1322 iounmap(aup->macdma);
1324 iounmap(aup->enable);
1326 base = platform_get_resource(pdev, IORESOURCE_MEM, 2);
1327 release_mem_region(base->start, resource_size(base));
1329 base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1330 release_mem_region(base->start, resource_size(base));
1332 macen = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1333 release_mem_region(macen->start, resource_size(macen));
1340 static struct platform_driver au1000_eth_driver = {
1341 .probe = au1000_probe,
1342 .remove = au1000_remove,
1344 .name = "au1000-eth",
1345 .owner = THIS_MODULE,
1349 module_platform_driver(au1000_eth_driver);
1351 MODULE_ALIAS("platform:au1000-eth");