2 * Copyright(c) 2006 - 2007 Atheros Corporation. All rights reserved.
3 * Copyright(c) 2007 - 2008 Chris Snook <csnook@redhat.com>
5 * Derived from Intel e1000 driver
6 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the Free
10 * Software Foundation; either version 2 of the License, or (at your option)
13 * This program is distributed in the hope that it will be useful, but WITHOUT
14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 * You should have received a copy of the GNU General Public License along with
19 * this program; if not, write to the Free Software Foundation, Inc., 59
20 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 #include <linux/atomic.h>
24 #include <linux/crc32.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/etherdevice.h>
27 #include <linux/ethtool.h>
28 #include <linux/hardirq.h>
29 #include <linux/if_vlan.h>
31 #include <linux/interrupt.h>
33 #include <linux/irqflags.h>
34 #include <linux/irqreturn.h>
35 #include <linux/mii.h>
36 #include <linux/net.h>
37 #include <linux/netdevice.h>
38 #include <linux/pci.h>
39 #include <linux/pci_ids.h>
41 #include <linux/skbuff.h>
42 #include <linux/slab.h>
43 #include <linux/spinlock.h>
44 #include <linux/string.h>
45 #include <linux/tcp.h>
46 #include <linux/timer.h>
47 #include <linux/types.h>
48 #include <linux/workqueue.h>
52 #define ATL2_DRV_VERSION "2.2.3"
54 static const char atl2_driver_name[] = "atl2";
55 static const char atl2_driver_string[] = "Atheros(R) L2 Ethernet Driver";
56 static const char atl2_copyright[] = "Copyright (c) 2007 Atheros Corporation.";
57 static const char atl2_driver_version[] = ATL2_DRV_VERSION;
59 MODULE_AUTHOR("Atheros Corporation <xiong.huang@atheros.com>, Chris Snook <csnook@redhat.com>");
60 MODULE_DESCRIPTION("Atheros Fast Ethernet Network Driver");
61 MODULE_LICENSE("GPL");
62 MODULE_VERSION(ATL2_DRV_VERSION);
65 * atl2_pci_tbl - PCI Device ID Table
67 static DEFINE_PCI_DEVICE_TABLE(atl2_pci_tbl) = {
68 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2)},
69 /* required last entry */
72 MODULE_DEVICE_TABLE(pci, atl2_pci_tbl);
74 static void atl2_set_ethtool_ops(struct net_device *netdev);
76 static void atl2_check_options(struct atl2_adapter *adapter);
79 * atl2_sw_init - Initialize general software structures (struct atl2_adapter)
80 * @adapter: board private structure to initialize
82 * atl2_sw_init initializes the Adapter private data structure.
83 * Fields are initialized based on PCI device information and
84 * OS network device settings (MTU size).
86 static int atl2_sw_init(struct atl2_adapter *adapter)
88 struct atl2_hw *hw = &adapter->hw;
89 struct pci_dev *pdev = adapter->pdev;
91 /* PCI config space info */
92 hw->vendor_id = pdev->vendor;
93 hw->device_id = pdev->device;
94 hw->subsystem_vendor_id = pdev->subsystem_vendor;
95 hw->subsystem_id = pdev->subsystem_device;
96 hw->revision_id = pdev->revision;
98 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
101 adapter->ict = 50000; /* ~100ms */
102 adapter->link_speed = SPEED_0; /* hardware init */
103 adapter->link_duplex = FULL_DUPLEX;
105 hw->phy_configured = false;
106 hw->preamble_len = 7;
117 hw->max_frame_size = adapter->netdev->mtu;
119 spin_lock_init(&adapter->stats_lock);
121 set_bit(__ATL2_DOWN, &adapter->flags);
127 * atl2_set_multi - Multicast and Promiscuous mode set
128 * @netdev: network interface device structure
130 * The set_multi entry point is called whenever the multicast address
131 * list or the network interface flags are updated. This routine is
132 * responsible for configuring the hardware for proper multicast,
133 * promiscuous mode, and all-multi behavior.
135 static void atl2_set_multi(struct net_device *netdev)
137 struct atl2_adapter *adapter = netdev_priv(netdev);
138 struct atl2_hw *hw = &adapter->hw;
139 struct netdev_hw_addr *ha;
143 /* Check for Promiscuous and All Multicast modes */
144 rctl = ATL2_READ_REG(hw, REG_MAC_CTRL);
146 if (netdev->flags & IFF_PROMISC) {
147 rctl |= MAC_CTRL_PROMIS_EN;
148 } else if (netdev->flags & IFF_ALLMULTI) {
149 rctl |= MAC_CTRL_MC_ALL_EN;
150 rctl &= ~MAC_CTRL_PROMIS_EN;
152 rctl &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
154 ATL2_WRITE_REG(hw, REG_MAC_CTRL, rctl);
156 /* clear the old settings from the multicast hash table */
157 ATL2_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
158 ATL2_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
160 /* comoute mc addresses' hash value ,and put it into hash table */
161 netdev_for_each_mc_addr(ha, netdev) {
162 hash_value = atl2_hash_mc_addr(hw, ha->addr);
163 atl2_hash_set(hw, hash_value);
167 static void init_ring_ptrs(struct atl2_adapter *adapter)
169 /* Read / Write Ptr Initialize: */
170 adapter->txd_write_ptr = 0;
171 atomic_set(&adapter->txd_read_ptr, 0);
173 adapter->rxd_read_ptr = 0;
174 adapter->rxd_write_ptr = 0;
176 atomic_set(&adapter->txs_write_ptr, 0);
177 adapter->txs_next_clear = 0;
181 * atl2_configure - Configure Transmit&Receive Unit after Reset
182 * @adapter: board private structure
184 * Configure the Tx /Rx unit of the MAC after a reset.
186 static int atl2_configure(struct atl2_adapter *adapter)
188 struct atl2_hw *hw = &adapter->hw;
191 /* clear interrupt status */
192 ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0xffffffff);
194 /* set MAC Address */
195 value = (((u32)hw->mac_addr[2]) << 24) |
196 (((u32)hw->mac_addr[3]) << 16) |
197 (((u32)hw->mac_addr[4]) << 8) |
198 (((u32)hw->mac_addr[5]));
199 ATL2_WRITE_REG(hw, REG_MAC_STA_ADDR, value);
200 value = (((u32)hw->mac_addr[0]) << 8) |
201 (((u32)hw->mac_addr[1]));
202 ATL2_WRITE_REG(hw, (REG_MAC_STA_ADDR+4), value);
204 /* HI base address */
205 ATL2_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI,
206 (u32)((adapter->ring_dma & 0xffffffff00000000ULL) >> 32));
208 /* LO base address */
209 ATL2_WRITE_REG(hw, REG_TXD_BASE_ADDR_LO,
210 (u32)(adapter->txd_dma & 0x00000000ffffffffULL));
211 ATL2_WRITE_REG(hw, REG_TXS_BASE_ADDR_LO,
212 (u32)(adapter->txs_dma & 0x00000000ffffffffULL));
213 ATL2_WRITE_REG(hw, REG_RXD_BASE_ADDR_LO,
214 (u32)(adapter->rxd_dma & 0x00000000ffffffffULL));
217 ATL2_WRITE_REGW(hw, REG_TXD_MEM_SIZE, (u16)(adapter->txd_ring_size/4));
218 ATL2_WRITE_REGW(hw, REG_TXS_MEM_SIZE, (u16)adapter->txs_ring_size);
219 ATL2_WRITE_REGW(hw, REG_RXD_BUF_NUM, (u16)adapter->rxd_ring_size);
221 /* config Internal SRAM */
223 ATL2_WRITE_REGW(hw, REG_SRAM_TXRAM_END, sram_tx_end);
224 ATL2_WRITE_REGW(hw, REG_SRAM_TXRAM_END, sram_rx_end);
228 value = (((u32)hw->ipgt & MAC_IPG_IFG_IPGT_MASK) <<
229 MAC_IPG_IFG_IPGT_SHIFT) |
230 (((u32)hw->min_ifg & MAC_IPG_IFG_MIFG_MASK) <<
231 MAC_IPG_IFG_MIFG_SHIFT) |
232 (((u32)hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK) <<
233 MAC_IPG_IFG_IPGR1_SHIFT)|
234 (((u32)hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK) <<
235 MAC_IPG_IFG_IPGR2_SHIFT);
236 ATL2_WRITE_REG(hw, REG_MAC_IPG_IFG, value);
238 /* config Half-Duplex Control */
239 value = ((u32)hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
240 (((u32)hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK) <<
241 MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
242 MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
243 (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
244 (((u32)hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK) <<
245 MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
246 ATL2_WRITE_REG(hw, REG_MAC_HALF_DUPLX_CTRL, value);
248 /* set Interrupt Moderator Timer */
249 ATL2_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, adapter->imt);
250 ATL2_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_ITIMER_EN);
252 /* set Interrupt Clear Timer */
253 ATL2_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, adapter->ict);
256 ATL2_WRITE_REG(hw, REG_MTU, adapter->netdev->mtu +
257 ENET_HEADER_SIZE + VLAN_SIZE + ETHERNET_FCS_SIZE);
260 ATL2_WRITE_REG(hw, REG_TX_CUT_THRESH, 0x177);
263 ATL2_WRITE_REGW(hw, REG_PAUSE_ON_TH, hw->fc_rxd_hi);
264 ATL2_WRITE_REGW(hw, REG_PAUSE_OFF_TH, hw->fc_rxd_lo);
267 ATL2_WRITE_REGW(hw, REG_MB_TXD_WR_IDX, (u16)adapter->txd_write_ptr);
268 ATL2_WRITE_REGW(hw, REG_MB_RXD_RD_IDX, (u16)adapter->rxd_read_ptr);
270 /* enable DMA read/write */
271 ATL2_WRITE_REGB(hw, REG_DMAR, DMAR_EN);
272 ATL2_WRITE_REGB(hw, REG_DMAW, DMAW_EN);
274 value = ATL2_READ_REG(&adapter->hw, REG_ISR);
275 if ((value & ISR_PHY_LINKDOWN) != 0)
276 value = 1; /* config failed */
280 /* clear all interrupt status */
281 ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0x3fffffff);
282 ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0);
287 * atl2_setup_ring_resources - allocate Tx / RX descriptor resources
288 * @adapter: board private structure
290 * Return 0 on success, negative on failure
292 static s32 atl2_setup_ring_resources(struct atl2_adapter *adapter)
294 struct pci_dev *pdev = adapter->pdev;
298 /* real ring DMA buffer */
299 adapter->ring_size = size =
300 adapter->txd_ring_size * 1 + 7 + /* dword align */
301 adapter->txs_ring_size * 4 + 7 + /* dword align */
302 adapter->rxd_ring_size * 1536 + 127; /* 128bytes align */
304 adapter->ring_vir_addr = pci_alloc_consistent(pdev, size,
306 if (!adapter->ring_vir_addr)
308 memset(adapter->ring_vir_addr, 0, adapter->ring_size);
311 adapter->txd_dma = adapter->ring_dma ;
312 offset = (adapter->txd_dma & 0x7) ? (8 - (adapter->txd_dma & 0x7)) : 0;
313 adapter->txd_dma += offset;
314 adapter->txd_ring = adapter->ring_vir_addr + offset;
317 adapter->txs_dma = adapter->txd_dma + adapter->txd_ring_size;
318 offset = (adapter->txs_dma & 0x7) ? (8 - (adapter->txs_dma & 0x7)) : 0;
319 adapter->txs_dma += offset;
320 adapter->txs_ring = (struct tx_pkt_status *)
321 (((u8 *)adapter->txd_ring) + (adapter->txd_ring_size + offset));
324 adapter->rxd_dma = adapter->txs_dma + adapter->txs_ring_size * 4;
325 offset = (adapter->rxd_dma & 127) ?
326 (128 - (adapter->rxd_dma & 127)) : 0;
332 adapter->rxd_dma += offset;
333 adapter->rxd_ring = (struct rx_desc *) (((u8 *)adapter->txs_ring) +
334 (adapter->txs_ring_size * 4 + offset));
337 * Read / Write Ptr Initialize:
338 * init_ring_ptrs(adapter);
344 * atl2_irq_enable - Enable default interrupt generation settings
345 * @adapter: board private structure
347 static inline void atl2_irq_enable(struct atl2_adapter *adapter)
349 ATL2_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK);
350 ATL2_WRITE_FLUSH(&adapter->hw);
354 * atl2_irq_disable - Mask off interrupt generation on the NIC
355 * @adapter: board private structure
357 static inline void atl2_irq_disable(struct atl2_adapter *adapter)
359 ATL2_WRITE_REG(&adapter->hw, REG_IMR, 0);
360 ATL2_WRITE_FLUSH(&adapter->hw);
361 synchronize_irq(adapter->pdev->irq);
364 static void __atl2_vlan_mode(netdev_features_t features, u32 *ctrl)
366 if (features & NETIF_F_HW_VLAN_RX) {
367 /* enable VLAN tag insert/strip */
368 *ctrl |= MAC_CTRL_RMV_VLAN;
370 /* disable VLAN tag insert/strip */
371 *ctrl &= ~MAC_CTRL_RMV_VLAN;
375 static void atl2_vlan_mode(struct net_device *netdev,
376 netdev_features_t features)
378 struct atl2_adapter *adapter = netdev_priv(netdev);
381 atl2_irq_disable(adapter);
383 ctrl = ATL2_READ_REG(&adapter->hw, REG_MAC_CTRL);
384 __atl2_vlan_mode(features, &ctrl);
385 ATL2_WRITE_REG(&adapter->hw, REG_MAC_CTRL, ctrl);
387 atl2_irq_enable(adapter);
390 static void atl2_restore_vlan(struct atl2_adapter *adapter)
392 atl2_vlan_mode(adapter->netdev, adapter->netdev->features);
395 static netdev_features_t atl2_fix_features(struct net_device *netdev,
396 netdev_features_t features)
399 * Since there is no support for separate rx/tx vlan accel
400 * enable/disable make sure tx flag is always in same state as rx.
402 if (features & NETIF_F_HW_VLAN_RX)
403 features |= NETIF_F_HW_VLAN_TX;
405 features &= ~NETIF_F_HW_VLAN_TX;
410 static int atl2_set_features(struct net_device *netdev,
411 netdev_features_t features)
413 netdev_features_t changed = netdev->features ^ features;
415 if (changed & NETIF_F_HW_VLAN_RX)
416 atl2_vlan_mode(netdev, features);
421 static void atl2_intr_rx(struct atl2_adapter *adapter)
423 struct net_device *netdev = adapter->netdev;
428 rxd = adapter->rxd_ring+adapter->rxd_write_ptr;
429 if (!rxd->status.update)
430 break; /* end of tx */
432 /* clear this flag at once */
433 rxd->status.update = 0;
435 if (rxd->status.ok && rxd->status.pkt_size >= 60) {
436 int rx_size = (int)(rxd->status.pkt_size - 4);
437 /* alloc new buffer */
438 skb = netdev_alloc_skb_ip_align(netdev, rx_size);
441 "%s: Mem squeeze, deferring packet.\n",
444 * Check that some rx space is free. If not,
445 * free one and mark stats->rx_dropped++.
447 netdev->stats.rx_dropped++;
450 memcpy(skb->data, rxd->packet, rx_size);
451 skb_put(skb, rx_size);
452 skb->protocol = eth_type_trans(skb, netdev);
453 if (rxd->status.vlan) {
454 u16 vlan_tag = (rxd->status.vtag>>4) |
455 ((rxd->status.vtag&7) << 13) |
456 ((rxd->status.vtag&8) << 9);
458 __vlan_hwaccel_put_tag(skb, vlan_tag);
461 netdev->stats.rx_bytes += rx_size;
462 netdev->stats.rx_packets++;
464 netdev->stats.rx_errors++;
466 if (rxd->status.ok && rxd->status.pkt_size <= 60)
467 netdev->stats.rx_length_errors++;
468 if (rxd->status.mcast)
469 netdev->stats.multicast++;
471 netdev->stats.rx_crc_errors++;
472 if (rxd->status.align)
473 netdev->stats.rx_frame_errors++;
476 /* advance write ptr */
477 if (++adapter->rxd_write_ptr == adapter->rxd_ring_size)
478 adapter->rxd_write_ptr = 0;
481 /* update mailbox? */
482 adapter->rxd_read_ptr = adapter->rxd_write_ptr;
483 ATL2_WRITE_REGW(&adapter->hw, REG_MB_RXD_RD_IDX, adapter->rxd_read_ptr);
486 static void atl2_intr_tx(struct atl2_adapter *adapter)
488 struct net_device *netdev = adapter->netdev;
491 struct tx_pkt_status *txs;
492 struct tx_pkt_header *txph;
496 txs_write_ptr = (u32) atomic_read(&adapter->txs_write_ptr);
497 txs = adapter->txs_ring + txs_write_ptr;
499 break; /* tx stop here */
504 if (++txs_write_ptr == adapter->txs_ring_size)
506 atomic_set(&adapter->txs_write_ptr, (int)txs_write_ptr);
508 txd_read_ptr = (u32) atomic_read(&adapter->txd_read_ptr);
509 txph = (struct tx_pkt_header *)
510 (((u8 *)adapter->txd_ring) + txd_read_ptr);
512 if (txph->pkt_size != txs->pkt_size) {
513 struct tx_pkt_status *old_txs = txs;
515 "%s: txs packet size not consistent with txd"
516 " txd_:0x%08x, txs_:0x%08x!\n",
517 adapter->netdev->name,
518 *(u32 *)txph, *(u32 *)txs);
520 "txd read ptr: 0x%x\n",
522 txs = adapter->txs_ring + txs_write_ptr;
524 "txs-behind:0x%08x\n",
526 if (txs_write_ptr < 2) {
527 txs = adapter->txs_ring +
528 (adapter->txs_ring_size +
531 txs = adapter->txs_ring + (txs_write_ptr - 2);
534 "txs-before:0x%08x\n",
540 txd_read_ptr += (((u32)(txph->pkt_size) + 7) & ~3);
541 if (txd_read_ptr >= adapter->txd_ring_size)
542 txd_read_ptr -= adapter->txd_ring_size;
544 atomic_set(&adapter->txd_read_ptr, (int)txd_read_ptr);
548 netdev->stats.tx_bytes += txs->pkt_size;
549 netdev->stats.tx_packets++;
552 netdev->stats.tx_errors++;
555 netdev->stats.collisions++;
557 netdev->stats.tx_aborted_errors++;
559 netdev->stats.tx_window_errors++;
561 netdev->stats.tx_fifo_errors++;
565 if (netif_queue_stopped(adapter->netdev) &&
566 netif_carrier_ok(adapter->netdev))
567 netif_wake_queue(adapter->netdev);
571 static void atl2_check_for_link(struct atl2_adapter *adapter)
573 struct net_device *netdev = adapter->netdev;
576 spin_lock(&adapter->stats_lock);
577 atl2_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
578 atl2_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
579 spin_unlock(&adapter->stats_lock);
581 /* notify upper layer link down ASAP */
582 if (!(phy_data & BMSR_LSTATUS)) { /* Link Down */
583 if (netif_carrier_ok(netdev)) { /* old link state: Up */
584 printk(KERN_INFO "%s: %s NIC Link is Down\n",
585 atl2_driver_name, netdev->name);
586 adapter->link_speed = SPEED_0;
587 netif_carrier_off(netdev);
588 netif_stop_queue(netdev);
591 schedule_work(&adapter->link_chg_task);
594 static inline void atl2_clear_phy_int(struct atl2_adapter *adapter)
597 spin_lock(&adapter->stats_lock);
598 atl2_read_phy_reg(&adapter->hw, 19, &phy_data);
599 spin_unlock(&adapter->stats_lock);
603 * atl2_intr - Interrupt Handler
604 * @irq: interrupt number
605 * @data: pointer to a network interface device structure
607 static irqreturn_t atl2_intr(int irq, void *data)
609 struct atl2_adapter *adapter = netdev_priv(data);
610 struct atl2_hw *hw = &adapter->hw;
613 status = ATL2_READ_REG(hw, REG_ISR);
618 if (status & ISR_PHY)
619 atl2_clear_phy_int(adapter);
621 /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
622 ATL2_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
624 /* check if PCIE PHY Link down */
625 if (status & ISR_PHY_LINKDOWN) {
626 if (netif_running(adapter->netdev)) { /* reset MAC */
627 ATL2_WRITE_REG(hw, REG_ISR, 0);
628 ATL2_WRITE_REG(hw, REG_IMR, 0);
629 ATL2_WRITE_FLUSH(hw);
630 schedule_work(&adapter->reset_task);
635 /* check if DMA read/write error? */
636 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
637 ATL2_WRITE_REG(hw, REG_ISR, 0);
638 ATL2_WRITE_REG(hw, REG_IMR, 0);
639 ATL2_WRITE_FLUSH(hw);
640 schedule_work(&adapter->reset_task);
645 if (status & (ISR_PHY | ISR_MANUAL)) {
646 adapter->netdev->stats.tx_carrier_errors++;
647 atl2_check_for_link(adapter);
651 if (status & ISR_TX_EVENT)
652 atl2_intr_tx(adapter);
655 if (status & ISR_RX_EVENT)
656 atl2_intr_rx(adapter);
658 /* re-enable Interrupt */
659 ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0);
663 static int atl2_request_irq(struct atl2_adapter *adapter)
665 struct net_device *netdev = adapter->netdev;
669 adapter->have_msi = true;
670 err = pci_enable_msi(adapter->pdev);
672 adapter->have_msi = false;
674 if (adapter->have_msi)
675 flags &= ~IRQF_SHARED;
677 return request_irq(adapter->pdev->irq, atl2_intr, flags, netdev->name,
682 * atl2_free_ring_resources - Free Tx / RX descriptor Resources
683 * @adapter: board private structure
685 * Free all transmit software resources
687 static void atl2_free_ring_resources(struct atl2_adapter *adapter)
689 struct pci_dev *pdev = adapter->pdev;
690 pci_free_consistent(pdev, adapter->ring_size, adapter->ring_vir_addr,
695 * atl2_open - Called when a network interface is made active
696 * @netdev: network interface device structure
698 * Returns 0 on success, negative value on failure
700 * The open entry point is called when a network interface is made
701 * active by the system (IFF_UP). At this point all resources needed
702 * for transmit and receive operations are allocated, the interrupt
703 * handler is registered with the OS, the watchdog timer is started,
704 * and the stack is notified that the interface is ready.
706 static int atl2_open(struct net_device *netdev)
708 struct atl2_adapter *adapter = netdev_priv(netdev);
712 /* disallow open during test */
713 if (test_bit(__ATL2_TESTING, &adapter->flags))
716 /* allocate transmit descriptors */
717 err = atl2_setup_ring_resources(adapter);
721 err = atl2_init_hw(&adapter->hw);
727 /* hardware has been reset, we need to reload some things */
728 atl2_set_multi(netdev);
729 init_ring_ptrs(adapter);
731 atl2_restore_vlan(adapter);
733 if (atl2_configure(adapter)) {
738 err = atl2_request_irq(adapter);
742 clear_bit(__ATL2_DOWN, &adapter->flags);
744 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 4*HZ));
746 val = ATL2_READ_REG(&adapter->hw, REG_MASTER_CTRL);
747 ATL2_WRITE_REG(&adapter->hw, REG_MASTER_CTRL,
748 val | MASTER_CTRL_MANUAL_INT);
750 atl2_irq_enable(adapter);
757 atl2_free_ring_resources(adapter);
758 atl2_reset_hw(&adapter->hw);
763 static void atl2_down(struct atl2_adapter *adapter)
765 struct net_device *netdev = adapter->netdev;
767 /* signal that we're down so the interrupt handler does not
768 * reschedule our watchdog timer */
769 set_bit(__ATL2_DOWN, &adapter->flags);
771 netif_tx_disable(netdev);
773 /* reset MAC to disable all RX/TX */
774 atl2_reset_hw(&adapter->hw);
777 atl2_irq_disable(adapter);
779 del_timer_sync(&adapter->watchdog_timer);
780 del_timer_sync(&adapter->phy_config_timer);
781 clear_bit(0, &adapter->cfg_phy);
783 netif_carrier_off(netdev);
784 adapter->link_speed = SPEED_0;
785 adapter->link_duplex = -1;
788 static void atl2_free_irq(struct atl2_adapter *adapter)
790 struct net_device *netdev = adapter->netdev;
792 free_irq(adapter->pdev->irq, netdev);
794 #ifdef CONFIG_PCI_MSI
795 if (adapter->have_msi)
796 pci_disable_msi(adapter->pdev);
801 * atl2_close - Disables a network interface
802 * @netdev: network interface device structure
804 * Returns 0, this is not allowed to fail
806 * The close entry point is called when an interface is de-activated
807 * by the OS. The hardware is still under the drivers control, but
808 * needs to be disabled. A global MAC reset is issued to stop the
809 * hardware, and all transmit and receive resources are freed.
811 static int atl2_close(struct net_device *netdev)
813 struct atl2_adapter *adapter = netdev_priv(netdev);
815 WARN_ON(test_bit(__ATL2_RESETTING, &adapter->flags));
818 atl2_free_irq(adapter);
819 atl2_free_ring_resources(adapter);
824 static inline int TxsFreeUnit(struct atl2_adapter *adapter)
826 u32 txs_write_ptr = (u32) atomic_read(&adapter->txs_write_ptr);
828 return (adapter->txs_next_clear >= txs_write_ptr) ?
829 (int) (adapter->txs_ring_size - adapter->txs_next_clear +
831 (int) (txs_write_ptr - adapter->txs_next_clear - 1);
834 static inline int TxdFreeBytes(struct atl2_adapter *adapter)
836 u32 txd_read_ptr = (u32)atomic_read(&adapter->txd_read_ptr);
838 return (adapter->txd_write_ptr >= txd_read_ptr) ?
839 (int) (adapter->txd_ring_size - adapter->txd_write_ptr +
841 (int) (txd_read_ptr - adapter->txd_write_ptr - 1);
844 static netdev_tx_t atl2_xmit_frame(struct sk_buff *skb,
845 struct net_device *netdev)
847 struct atl2_adapter *adapter = netdev_priv(netdev);
848 struct tx_pkt_header *txph;
849 u32 offset, copy_len;
853 if (test_bit(__ATL2_DOWN, &adapter->flags)) {
854 dev_kfree_skb_any(skb);
858 if (unlikely(skb->len <= 0)) {
859 dev_kfree_skb_any(skb);
863 txs_unused = TxsFreeUnit(adapter);
864 txbuf_unused = TxdFreeBytes(adapter);
866 if (skb->len + sizeof(struct tx_pkt_header) + 4 > txbuf_unused ||
868 /* not enough resources */
869 netif_stop_queue(netdev);
870 return NETDEV_TX_BUSY;
873 offset = adapter->txd_write_ptr;
875 txph = (struct tx_pkt_header *) (((u8 *)adapter->txd_ring) + offset);
878 txph->pkt_size = skb->len;
881 if (offset >= adapter->txd_ring_size)
882 offset -= adapter->txd_ring_size;
883 copy_len = adapter->txd_ring_size - offset;
884 if (copy_len >= skb->len) {
885 memcpy(((u8 *)adapter->txd_ring) + offset, skb->data, skb->len);
886 offset += ((u32)(skb->len + 3) & ~3);
888 memcpy(((u8 *)adapter->txd_ring)+offset, skb->data, copy_len);
889 memcpy((u8 *)adapter->txd_ring, skb->data+copy_len,
891 offset = ((u32)(skb->len-copy_len + 3) & ~3);
893 #ifdef NETIF_F_HW_VLAN_TX
894 if (vlan_tx_tag_present(skb)) {
895 u16 vlan_tag = vlan_tx_tag_get(skb);
896 vlan_tag = (vlan_tag << 4) |
898 ((vlan_tag >> 9) & 0x8);
900 txph->vlan = vlan_tag;
903 if (offset >= adapter->txd_ring_size)
904 offset -= adapter->txd_ring_size;
905 adapter->txd_write_ptr = offset;
907 /* clear txs before send */
908 adapter->txs_ring[adapter->txs_next_clear].update = 0;
909 if (++adapter->txs_next_clear == adapter->txs_ring_size)
910 adapter->txs_next_clear = 0;
912 ATL2_WRITE_REGW(&adapter->hw, REG_MB_TXD_WR_IDX,
913 (adapter->txd_write_ptr >> 2));
916 dev_kfree_skb_any(skb);
921 * atl2_change_mtu - Change the Maximum Transfer Unit
922 * @netdev: network interface device structure
923 * @new_mtu: new value for maximum frame size
925 * Returns 0 on success, negative on failure
927 static int atl2_change_mtu(struct net_device *netdev, int new_mtu)
929 struct atl2_adapter *adapter = netdev_priv(netdev);
930 struct atl2_hw *hw = &adapter->hw;
932 if ((new_mtu < 40) || (new_mtu > (ETH_DATA_LEN + VLAN_SIZE)))
936 if (hw->max_frame_size != new_mtu) {
937 netdev->mtu = new_mtu;
938 ATL2_WRITE_REG(hw, REG_MTU, new_mtu + ENET_HEADER_SIZE +
939 VLAN_SIZE + ETHERNET_FCS_SIZE);
946 * atl2_set_mac - Change the Ethernet Address of the NIC
947 * @netdev: network interface device structure
948 * @p: pointer to an address structure
950 * Returns 0 on success, negative on failure
952 static int atl2_set_mac(struct net_device *netdev, void *p)
954 struct atl2_adapter *adapter = netdev_priv(netdev);
955 struct sockaddr *addr = p;
957 if (!is_valid_ether_addr(addr->sa_data))
958 return -EADDRNOTAVAIL;
960 if (netif_running(netdev))
963 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
964 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
966 atl2_set_mac_addr(&adapter->hw);
971 static int atl2_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
973 struct atl2_adapter *adapter = netdev_priv(netdev);
974 struct mii_ioctl_data *data = if_mii(ifr);
982 spin_lock_irqsave(&adapter->stats_lock, flags);
983 if (atl2_read_phy_reg(&adapter->hw,
984 data->reg_num & 0x1F, &data->val_out)) {
985 spin_unlock_irqrestore(&adapter->stats_lock, flags);
988 spin_unlock_irqrestore(&adapter->stats_lock, flags);
991 if (data->reg_num & ~(0x1F))
993 spin_lock_irqsave(&adapter->stats_lock, flags);
994 if (atl2_write_phy_reg(&adapter->hw, data->reg_num,
996 spin_unlock_irqrestore(&adapter->stats_lock, flags);
999 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1007 static int atl2_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1013 return atl2_mii_ioctl(netdev, ifr, cmd);
1014 #ifdef ETHTOOL_OPS_COMPAT
1016 return ethtool_ioctl(ifr);
1024 * atl2_tx_timeout - Respond to a Tx Hang
1025 * @netdev: network interface device structure
1027 static void atl2_tx_timeout(struct net_device *netdev)
1029 struct atl2_adapter *adapter = netdev_priv(netdev);
1031 /* Do the reset outside of interrupt context */
1032 schedule_work(&adapter->reset_task);
1036 * atl2_watchdog - Timer Call-back
1037 * @data: pointer to netdev cast into an unsigned long
1039 static void atl2_watchdog(unsigned long data)
1041 struct atl2_adapter *adapter = (struct atl2_adapter *) data;
1043 if (!test_bit(__ATL2_DOWN, &adapter->flags)) {
1044 u32 drop_rxd, drop_rxs;
1045 unsigned long flags;
1047 spin_lock_irqsave(&adapter->stats_lock, flags);
1048 drop_rxd = ATL2_READ_REG(&adapter->hw, REG_STS_RXD_OV);
1049 drop_rxs = ATL2_READ_REG(&adapter->hw, REG_STS_RXS_OV);
1050 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1052 adapter->netdev->stats.rx_over_errors += drop_rxd + drop_rxs;
1054 /* Reset the timer */
1055 mod_timer(&adapter->watchdog_timer,
1056 round_jiffies(jiffies + 4 * HZ));
1061 * atl2_phy_config - Timer Call-back
1062 * @data: pointer to netdev cast into an unsigned long
1064 static void atl2_phy_config(unsigned long data)
1066 struct atl2_adapter *adapter = (struct atl2_adapter *) data;
1067 struct atl2_hw *hw = &adapter->hw;
1068 unsigned long flags;
1070 spin_lock_irqsave(&adapter->stats_lock, flags);
1071 atl2_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
1072 atl2_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN |
1073 MII_CR_RESTART_AUTO_NEG);
1074 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1075 clear_bit(0, &adapter->cfg_phy);
1078 static int atl2_up(struct atl2_adapter *adapter)
1080 struct net_device *netdev = adapter->netdev;
1084 /* hardware has been reset, we need to reload some things */
1086 err = atl2_init_hw(&adapter->hw);
1092 atl2_set_multi(netdev);
1093 init_ring_ptrs(adapter);
1095 atl2_restore_vlan(adapter);
1097 if (atl2_configure(adapter)) {
1102 clear_bit(__ATL2_DOWN, &adapter->flags);
1104 val = ATL2_READ_REG(&adapter->hw, REG_MASTER_CTRL);
1105 ATL2_WRITE_REG(&adapter->hw, REG_MASTER_CTRL, val |
1106 MASTER_CTRL_MANUAL_INT);
1108 atl2_irq_enable(adapter);
1114 static void atl2_reinit_locked(struct atl2_adapter *adapter)
1116 WARN_ON(in_interrupt());
1117 while (test_and_set_bit(__ATL2_RESETTING, &adapter->flags))
1121 clear_bit(__ATL2_RESETTING, &adapter->flags);
1124 static void atl2_reset_task(struct work_struct *work)
1126 struct atl2_adapter *adapter;
1127 adapter = container_of(work, struct atl2_adapter, reset_task);
1129 atl2_reinit_locked(adapter);
1132 static void atl2_setup_mac_ctrl(struct atl2_adapter *adapter)
1135 struct atl2_hw *hw = &adapter->hw;
1136 struct net_device *netdev = adapter->netdev;
1138 /* Config MAC CTRL Register */
1139 value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN | MAC_CTRL_MACLP_CLK_PHY;
1142 if (FULL_DUPLEX == adapter->link_duplex)
1143 value |= MAC_CTRL_DUPLX;
1146 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1149 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1151 /* preamble length */
1152 value |= (((u32)adapter->hw.preamble_len & MAC_CTRL_PRMLEN_MASK) <<
1153 MAC_CTRL_PRMLEN_SHIFT);
1156 __atl2_vlan_mode(netdev->features, &value);
1159 value |= MAC_CTRL_BC_EN;
1160 if (netdev->flags & IFF_PROMISC)
1161 value |= MAC_CTRL_PROMIS_EN;
1162 else if (netdev->flags & IFF_ALLMULTI)
1163 value |= MAC_CTRL_MC_ALL_EN;
1165 /* half retry buffer */
1166 value |= (((u32)(adapter->hw.retry_buf &
1167 MAC_CTRL_HALF_LEFT_BUF_MASK)) << MAC_CTRL_HALF_LEFT_BUF_SHIFT);
1169 ATL2_WRITE_REG(hw, REG_MAC_CTRL, value);
1172 static int atl2_check_link(struct atl2_adapter *adapter)
1174 struct atl2_hw *hw = &adapter->hw;
1175 struct net_device *netdev = adapter->netdev;
1177 u16 speed, duplex, phy_data;
1180 /* MII_BMSR must read twise */
1181 atl2_read_phy_reg(hw, MII_BMSR, &phy_data);
1182 atl2_read_phy_reg(hw, MII_BMSR, &phy_data);
1183 if (!(phy_data&BMSR_LSTATUS)) { /* link down */
1184 if (netif_carrier_ok(netdev)) { /* old link state: Up */
1187 value = ATL2_READ_REG(hw, REG_MAC_CTRL);
1188 value &= ~MAC_CTRL_RX_EN;
1189 ATL2_WRITE_REG(hw, REG_MAC_CTRL, value);
1190 adapter->link_speed = SPEED_0;
1191 netif_carrier_off(netdev);
1192 netif_stop_queue(netdev);
1198 ret_val = atl2_get_speed_and_duplex(hw, &speed, &duplex);
1201 switch (hw->MediaType) {
1202 case MEDIA_TYPE_100M_FULL:
1203 if (speed != SPEED_100 || duplex != FULL_DUPLEX)
1206 case MEDIA_TYPE_100M_HALF:
1207 if (speed != SPEED_100 || duplex != HALF_DUPLEX)
1210 case MEDIA_TYPE_10M_FULL:
1211 if (speed != SPEED_10 || duplex != FULL_DUPLEX)
1214 case MEDIA_TYPE_10M_HALF:
1215 if (speed != SPEED_10 || duplex != HALF_DUPLEX)
1219 /* link result is our setting */
1220 if (reconfig == 0) {
1221 if (adapter->link_speed != speed ||
1222 adapter->link_duplex != duplex) {
1223 adapter->link_speed = speed;
1224 adapter->link_duplex = duplex;
1225 atl2_setup_mac_ctrl(adapter);
1226 printk(KERN_INFO "%s: %s NIC Link is Up<%d Mbps %s>\n",
1227 atl2_driver_name, netdev->name,
1228 adapter->link_speed,
1229 adapter->link_duplex == FULL_DUPLEX ?
1230 "Full Duplex" : "Half Duplex");
1233 if (!netif_carrier_ok(netdev)) { /* Link down -> Up */
1234 netif_carrier_on(netdev);
1235 netif_wake_queue(netdev);
1240 /* change original link status */
1241 if (netif_carrier_ok(netdev)) {
1244 value = ATL2_READ_REG(hw, REG_MAC_CTRL);
1245 value &= ~MAC_CTRL_RX_EN;
1246 ATL2_WRITE_REG(hw, REG_MAC_CTRL, value);
1248 adapter->link_speed = SPEED_0;
1249 netif_carrier_off(netdev);
1250 netif_stop_queue(netdev);
1253 /* auto-neg, insert timer to re-config phy
1254 * (if interval smaller than 5 seconds, something strange) */
1255 if (!test_bit(__ATL2_DOWN, &adapter->flags)) {
1256 if (!test_and_set_bit(0, &adapter->cfg_phy))
1257 mod_timer(&adapter->phy_config_timer,
1258 round_jiffies(jiffies + 5 * HZ));
1265 * atl2_link_chg_task - deal with link change event Out of interrupt context
1267 static void atl2_link_chg_task(struct work_struct *work)
1269 struct atl2_adapter *adapter;
1270 unsigned long flags;
1272 adapter = container_of(work, struct atl2_adapter, link_chg_task);
1274 spin_lock_irqsave(&adapter->stats_lock, flags);
1275 atl2_check_link(adapter);
1276 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1279 static void atl2_setup_pcicmd(struct pci_dev *pdev)
1283 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
1285 if (cmd & PCI_COMMAND_INTX_DISABLE)
1286 cmd &= ~PCI_COMMAND_INTX_DISABLE;
1287 if (cmd & PCI_COMMAND_IO)
1288 cmd &= ~PCI_COMMAND_IO;
1289 if (0 == (cmd & PCI_COMMAND_MEMORY))
1290 cmd |= PCI_COMMAND_MEMORY;
1291 if (0 == (cmd & PCI_COMMAND_MASTER))
1292 cmd |= PCI_COMMAND_MASTER;
1293 pci_write_config_word(pdev, PCI_COMMAND, cmd);
1296 * some motherboards BIOS(PXE/EFI) driver may set PME
1297 * while they transfer control to OS (Windows/Linux)
1298 * so we should clear this bit before NIC work normally
1300 pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0);
1303 #ifdef CONFIG_NET_POLL_CONTROLLER
1304 static void atl2_poll_controller(struct net_device *netdev)
1306 disable_irq(netdev->irq);
1307 atl2_intr(netdev->irq, netdev);
1308 enable_irq(netdev->irq);
1313 static const struct net_device_ops atl2_netdev_ops = {
1314 .ndo_open = atl2_open,
1315 .ndo_stop = atl2_close,
1316 .ndo_start_xmit = atl2_xmit_frame,
1317 .ndo_set_rx_mode = atl2_set_multi,
1318 .ndo_validate_addr = eth_validate_addr,
1319 .ndo_set_mac_address = atl2_set_mac,
1320 .ndo_change_mtu = atl2_change_mtu,
1321 .ndo_fix_features = atl2_fix_features,
1322 .ndo_set_features = atl2_set_features,
1323 .ndo_do_ioctl = atl2_ioctl,
1324 .ndo_tx_timeout = atl2_tx_timeout,
1325 #ifdef CONFIG_NET_POLL_CONTROLLER
1326 .ndo_poll_controller = atl2_poll_controller,
1331 * atl2_probe - Device Initialization Routine
1332 * @pdev: PCI device information struct
1333 * @ent: entry in atl2_pci_tbl
1335 * Returns 0 on success, negative on failure
1337 * atl2_probe initializes an adapter identified by a pci_dev structure.
1338 * The OS initialization, configuring of the adapter private structure,
1339 * and a hardware reset occur.
1341 static int atl2_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1343 struct net_device *netdev;
1344 struct atl2_adapter *adapter;
1345 static int cards_found;
1346 unsigned long mmio_start;
1352 err = pci_enable_device(pdev);
1357 * atl2 is a shared-high-32-bit device, so we're stuck with 32-bit DMA
1358 * until the kernel has the proper infrastructure to support 64-bit DMA
1361 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) &&
1362 pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1363 printk(KERN_ERR "atl2: No usable DMA configuration, aborting\n");
1367 /* Mark all PCI regions associated with PCI device
1368 * pdev as being reserved by owner atl2_driver_name */
1369 err = pci_request_regions(pdev, atl2_driver_name);
1373 /* Enables bus-mastering on the device and calls
1374 * pcibios_set_master to do the needed arch specific settings */
1375 pci_set_master(pdev);
1378 netdev = alloc_etherdev(sizeof(struct atl2_adapter));
1380 goto err_alloc_etherdev;
1382 SET_NETDEV_DEV(netdev, &pdev->dev);
1384 pci_set_drvdata(pdev, netdev);
1385 adapter = netdev_priv(netdev);
1386 adapter->netdev = netdev;
1387 adapter->pdev = pdev;
1388 adapter->hw.back = adapter;
1390 mmio_start = pci_resource_start(pdev, 0x0);
1391 mmio_len = pci_resource_len(pdev, 0x0);
1393 adapter->hw.mem_rang = (u32)mmio_len;
1394 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
1395 if (!adapter->hw.hw_addr) {
1400 atl2_setup_pcicmd(pdev);
1402 netdev->netdev_ops = &atl2_netdev_ops;
1403 atl2_set_ethtool_ops(netdev);
1404 netdev->watchdog_timeo = 5 * HZ;
1405 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1407 netdev->mem_start = mmio_start;
1408 netdev->mem_end = mmio_start + mmio_len;
1409 adapter->bd_number = cards_found;
1410 adapter->pci_using_64 = false;
1412 /* setup the private structure */
1413 err = atl2_sw_init(adapter);
1419 netdev->hw_features = NETIF_F_SG | NETIF_F_HW_VLAN_RX;
1420 netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
1422 /* Init PHY as early as possible due to power saving issue */
1423 atl2_phy_init(&adapter->hw);
1425 /* reset the controller to
1426 * put the device in a known good starting state */
1428 if (atl2_reset_hw(&adapter->hw)) {
1433 /* copy the MAC address out of the EEPROM */
1434 atl2_read_mac_addr(&adapter->hw);
1435 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
1436 if (!is_valid_ether_addr(netdev->dev_addr)) {
1441 atl2_check_options(adapter);
1443 init_timer(&adapter->watchdog_timer);
1444 adapter->watchdog_timer.function = atl2_watchdog;
1445 adapter->watchdog_timer.data = (unsigned long) adapter;
1447 init_timer(&adapter->phy_config_timer);
1448 adapter->phy_config_timer.function = atl2_phy_config;
1449 adapter->phy_config_timer.data = (unsigned long) adapter;
1451 INIT_WORK(&adapter->reset_task, atl2_reset_task);
1452 INIT_WORK(&adapter->link_chg_task, atl2_link_chg_task);
1454 strcpy(netdev->name, "eth%d"); /* ?? */
1455 err = register_netdev(netdev);
1459 /* assume we have no link for now */
1460 netif_carrier_off(netdev);
1461 netif_stop_queue(netdev);
1471 iounmap(adapter->hw.hw_addr);
1473 free_netdev(netdev);
1475 pci_release_regions(pdev);
1478 pci_disable_device(pdev);
1483 * atl2_remove - Device Removal Routine
1484 * @pdev: PCI device information struct
1486 * atl2_remove is called by the PCI subsystem to alert the driver
1487 * that it should release a PCI device. The could be caused by a
1488 * Hot-Plug event, or because the driver is going to be removed from
1491 /* FIXME: write the original MAC address back in case it was changed from a
1492 * BIOS-set value, as in atl1 -- CHS */
1493 static void atl2_remove(struct pci_dev *pdev)
1495 struct net_device *netdev = pci_get_drvdata(pdev);
1496 struct atl2_adapter *adapter = netdev_priv(netdev);
1498 /* flush_scheduled work may reschedule our watchdog task, so
1499 * explicitly disable watchdog tasks from being rescheduled */
1500 set_bit(__ATL2_DOWN, &adapter->flags);
1502 del_timer_sync(&adapter->watchdog_timer);
1503 del_timer_sync(&adapter->phy_config_timer);
1504 cancel_work_sync(&adapter->reset_task);
1505 cancel_work_sync(&adapter->link_chg_task);
1507 unregister_netdev(netdev);
1509 atl2_force_ps(&adapter->hw);
1511 iounmap(adapter->hw.hw_addr);
1512 pci_release_regions(pdev);
1514 free_netdev(netdev);
1516 pci_disable_device(pdev);
1519 static int atl2_suspend(struct pci_dev *pdev, pm_message_t state)
1521 struct net_device *netdev = pci_get_drvdata(pdev);
1522 struct atl2_adapter *adapter = netdev_priv(netdev);
1523 struct atl2_hw *hw = &adapter->hw;
1526 u32 wufc = adapter->wol;
1532 netif_device_detach(netdev);
1534 if (netif_running(netdev)) {
1535 WARN_ON(test_bit(__ATL2_RESETTING, &adapter->flags));
1540 retval = pci_save_state(pdev);
1545 atl2_read_phy_reg(hw, MII_BMSR, (u16 *)&ctrl);
1546 atl2_read_phy_reg(hw, MII_BMSR, (u16 *)&ctrl);
1547 if (ctrl & BMSR_LSTATUS)
1548 wufc &= ~ATLX_WUFC_LNKC;
1550 if (0 != (ctrl & BMSR_LSTATUS) && 0 != wufc) {
1552 /* get current link speed & duplex */
1553 ret_val = atl2_get_speed_and_duplex(hw, &speed, &duplex);
1556 "%s: get speed&duplex error while suspend\n",
1563 /* turn on magic packet wol */
1564 if (wufc & ATLX_WUFC_MAG)
1565 ctrl |= (WOL_MAGIC_EN | WOL_MAGIC_PME_EN);
1567 /* ignore Link Chg event when Link is up */
1568 ATL2_WRITE_REG(hw, REG_WOL_CTRL, ctrl);
1570 /* Config MAC CTRL Register */
1571 ctrl = MAC_CTRL_RX_EN | MAC_CTRL_MACLP_CLK_PHY;
1572 if (FULL_DUPLEX == adapter->link_duplex)
1573 ctrl |= MAC_CTRL_DUPLX;
1574 ctrl |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1575 ctrl |= (((u32)adapter->hw.preamble_len &
1576 MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1577 ctrl |= (((u32)(adapter->hw.retry_buf &
1578 MAC_CTRL_HALF_LEFT_BUF_MASK)) <<
1579 MAC_CTRL_HALF_LEFT_BUF_SHIFT);
1580 if (wufc & ATLX_WUFC_MAG) {
1581 /* magic packet maybe Broadcast&multicast&Unicast */
1582 ctrl |= MAC_CTRL_BC_EN;
1585 ATL2_WRITE_REG(hw, REG_MAC_CTRL, ctrl);
1588 ctrl = ATL2_READ_REG(hw, REG_PCIE_PHYMISC);
1589 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
1590 ATL2_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
1591 ctrl = ATL2_READ_REG(hw, REG_PCIE_DLL_TX_CTRL1);
1592 ctrl |= PCIE_DLL_TX_CTRL1_SEL_NOR_CLK;
1593 ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, ctrl);
1595 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
1599 if (0 == (ctrl&BMSR_LSTATUS) && 0 != (wufc&ATLX_WUFC_LNKC)) {
1600 /* link is down, so only LINK CHG WOL event enable */
1601 ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
1602 ATL2_WRITE_REG(hw, REG_WOL_CTRL, ctrl);
1603 ATL2_WRITE_REG(hw, REG_MAC_CTRL, 0);
1606 ctrl = ATL2_READ_REG(hw, REG_PCIE_PHYMISC);
1607 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
1608 ATL2_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
1609 ctrl = ATL2_READ_REG(hw, REG_PCIE_DLL_TX_CTRL1);
1610 ctrl |= PCIE_DLL_TX_CTRL1_SEL_NOR_CLK;
1611 ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, ctrl);
1613 hw->phy_configured = false; /* re-init PHY when resume */
1615 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
1622 ATL2_WRITE_REG(hw, REG_WOL_CTRL, 0);
1625 ctrl = ATL2_READ_REG(hw, REG_PCIE_PHYMISC);
1626 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
1627 ATL2_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
1628 ctrl = ATL2_READ_REG(hw, REG_PCIE_DLL_TX_CTRL1);
1629 ctrl |= PCIE_DLL_TX_CTRL1_SEL_NOR_CLK;
1630 ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, ctrl);
1633 hw->phy_configured = false; /* re-init PHY when resume */
1635 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
1638 if (netif_running(netdev))
1639 atl2_free_irq(adapter);
1641 pci_disable_device(pdev);
1643 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1649 static int atl2_resume(struct pci_dev *pdev)
1651 struct net_device *netdev = pci_get_drvdata(pdev);
1652 struct atl2_adapter *adapter = netdev_priv(netdev);
1655 pci_set_power_state(pdev, PCI_D0);
1656 pci_restore_state(pdev);
1658 err = pci_enable_device(pdev);
1661 "atl2: Cannot enable PCI device from suspend\n");
1665 pci_set_master(pdev);
1667 ATL2_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */
1669 pci_enable_wake(pdev, PCI_D3hot, 0);
1670 pci_enable_wake(pdev, PCI_D3cold, 0);
1672 ATL2_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
1674 if (netif_running(netdev)) {
1675 err = atl2_request_irq(adapter);
1680 atl2_reset_hw(&adapter->hw);
1682 if (netif_running(netdev))
1685 netif_device_attach(netdev);
1691 static void atl2_shutdown(struct pci_dev *pdev)
1693 atl2_suspend(pdev, PMSG_SUSPEND);
1696 static struct pci_driver atl2_driver = {
1697 .name = atl2_driver_name,
1698 .id_table = atl2_pci_tbl,
1699 .probe = atl2_probe,
1700 .remove = atl2_remove,
1701 /* Power Management Hooks */
1702 .suspend = atl2_suspend,
1704 .resume = atl2_resume,
1706 .shutdown = atl2_shutdown,
1710 * atl2_init_module - Driver Registration Routine
1712 * atl2_init_module is the first routine called when the driver is
1713 * loaded. All it does is register with the PCI subsystem.
1715 static int __init atl2_init_module(void)
1717 printk(KERN_INFO "%s - version %s\n", atl2_driver_string,
1718 atl2_driver_version);
1719 printk(KERN_INFO "%s\n", atl2_copyright);
1720 return pci_register_driver(&atl2_driver);
1722 module_init(atl2_init_module);
1725 * atl2_exit_module - Driver Exit Cleanup Routine
1727 * atl2_exit_module is called just before the driver is removed
1730 static void __exit atl2_exit_module(void)
1732 pci_unregister_driver(&atl2_driver);
1734 module_exit(atl2_exit_module);
1736 static void atl2_read_pci_cfg(struct atl2_hw *hw, u32 reg, u16 *value)
1738 struct atl2_adapter *adapter = hw->back;
1739 pci_read_config_word(adapter->pdev, reg, value);
1742 static void atl2_write_pci_cfg(struct atl2_hw *hw, u32 reg, u16 *value)
1744 struct atl2_adapter *adapter = hw->back;
1745 pci_write_config_word(adapter->pdev, reg, *value);
1748 static int atl2_get_settings(struct net_device *netdev,
1749 struct ethtool_cmd *ecmd)
1751 struct atl2_adapter *adapter = netdev_priv(netdev);
1752 struct atl2_hw *hw = &adapter->hw;
1754 ecmd->supported = (SUPPORTED_10baseT_Half |
1755 SUPPORTED_10baseT_Full |
1756 SUPPORTED_100baseT_Half |
1757 SUPPORTED_100baseT_Full |
1760 ecmd->advertising = ADVERTISED_TP;
1762 ecmd->advertising |= ADVERTISED_Autoneg;
1763 ecmd->advertising |= hw->autoneg_advertised;
1765 ecmd->port = PORT_TP;
1766 ecmd->phy_address = 0;
1767 ecmd->transceiver = XCVR_INTERNAL;
1769 if (adapter->link_speed != SPEED_0) {
1770 ethtool_cmd_speed_set(ecmd, adapter->link_speed);
1771 if (adapter->link_duplex == FULL_DUPLEX)
1772 ecmd->duplex = DUPLEX_FULL;
1774 ecmd->duplex = DUPLEX_HALF;
1776 ethtool_cmd_speed_set(ecmd, -1);
1780 ecmd->autoneg = AUTONEG_ENABLE;
1784 static int atl2_set_settings(struct net_device *netdev,
1785 struct ethtool_cmd *ecmd)
1787 struct atl2_adapter *adapter = netdev_priv(netdev);
1788 struct atl2_hw *hw = &adapter->hw;
1790 while (test_and_set_bit(__ATL2_RESETTING, &adapter->flags))
1793 if (ecmd->autoneg == AUTONEG_ENABLE) {
1794 #define MY_ADV_MASK (ADVERTISE_10_HALF | \
1795 ADVERTISE_10_FULL | \
1796 ADVERTISE_100_HALF| \
1799 if ((ecmd->advertising & MY_ADV_MASK) == MY_ADV_MASK) {
1800 hw->MediaType = MEDIA_TYPE_AUTO_SENSOR;
1801 hw->autoneg_advertised = MY_ADV_MASK;
1802 } else if ((ecmd->advertising & MY_ADV_MASK) ==
1803 ADVERTISE_100_FULL) {
1804 hw->MediaType = MEDIA_TYPE_100M_FULL;
1805 hw->autoneg_advertised = ADVERTISE_100_FULL;
1806 } else if ((ecmd->advertising & MY_ADV_MASK) ==
1807 ADVERTISE_100_HALF) {
1808 hw->MediaType = MEDIA_TYPE_100M_HALF;
1809 hw->autoneg_advertised = ADVERTISE_100_HALF;
1810 } else if ((ecmd->advertising & MY_ADV_MASK) ==
1811 ADVERTISE_10_FULL) {
1812 hw->MediaType = MEDIA_TYPE_10M_FULL;
1813 hw->autoneg_advertised = ADVERTISE_10_FULL;
1814 } else if ((ecmd->advertising & MY_ADV_MASK) ==
1815 ADVERTISE_10_HALF) {
1816 hw->MediaType = MEDIA_TYPE_10M_HALF;
1817 hw->autoneg_advertised = ADVERTISE_10_HALF;
1819 clear_bit(__ATL2_RESETTING, &adapter->flags);
1822 ecmd->advertising = hw->autoneg_advertised |
1823 ADVERTISED_TP | ADVERTISED_Autoneg;
1825 clear_bit(__ATL2_RESETTING, &adapter->flags);
1829 /* reset the link */
1830 if (netif_running(adapter->netdev)) {
1834 atl2_reset_hw(&adapter->hw);
1836 clear_bit(__ATL2_RESETTING, &adapter->flags);
1840 static u32 atl2_get_msglevel(struct net_device *netdev)
1846 * It's sane for this to be empty, but we might want to take advantage of this.
1848 static void atl2_set_msglevel(struct net_device *netdev, u32 data)
1852 static int atl2_get_regs_len(struct net_device *netdev)
1854 #define ATL2_REGS_LEN 42
1855 return sizeof(u32) * ATL2_REGS_LEN;
1858 static void atl2_get_regs(struct net_device *netdev,
1859 struct ethtool_regs *regs, void *p)
1861 struct atl2_adapter *adapter = netdev_priv(netdev);
1862 struct atl2_hw *hw = &adapter->hw;
1866 memset(p, 0, sizeof(u32) * ATL2_REGS_LEN);
1868 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
1870 regs_buff[0] = ATL2_READ_REG(hw, REG_VPD_CAP);
1871 regs_buff[1] = ATL2_READ_REG(hw, REG_SPI_FLASH_CTRL);
1872 regs_buff[2] = ATL2_READ_REG(hw, REG_SPI_FLASH_CONFIG);
1873 regs_buff[3] = ATL2_READ_REG(hw, REG_TWSI_CTRL);
1874 regs_buff[4] = ATL2_READ_REG(hw, REG_PCIE_DEV_MISC_CTRL);
1875 regs_buff[5] = ATL2_READ_REG(hw, REG_MASTER_CTRL);
1876 regs_buff[6] = ATL2_READ_REG(hw, REG_MANUAL_TIMER_INIT);
1877 regs_buff[7] = ATL2_READ_REG(hw, REG_IRQ_MODU_TIMER_INIT);
1878 regs_buff[8] = ATL2_READ_REG(hw, REG_PHY_ENABLE);
1879 regs_buff[9] = ATL2_READ_REG(hw, REG_CMBDISDMA_TIMER);
1880 regs_buff[10] = ATL2_READ_REG(hw, REG_IDLE_STATUS);
1881 regs_buff[11] = ATL2_READ_REG(hw, REG_MDIO_CTRL);
1882 regs_buff[12] = ATL2_READ_REG(hw, REG_SERDES_LOCK);
1883 regs_buff[13] = ATL2_READ_REG(hw, REG_MAC_CTRL);
1884 regs_buff[14] = ATL2_READ_REG(hw, REG_MAC_IPG_IFG);
1885 regs_buff[15] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR);
1886 regs_buff[16] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR+4);
1887 regs_buff[17] = ATL2_READ_REG(hw, REG_RX_HASH_TABLE);
1888 regs_buff[18] = ATL2_READ_REG(hw, REG_RX_HASH_TABLE+4);
1889 regs_buff[19] = ATL2_READ_REG(hw, REG_MAC_HALF_DUPLX_CTRL);
1890 regs_buff[20] = ATL2_READ_REG(hw, REG_MTU);
1891 regs_buff[21] = ATL2_READ_REG(hw, REG_WOL_CTRL);
1892 regs_buff[22] = ATL2_READ_REG(hw, REG_SRAM_TXRAM_END);
1893 regs_buff[23] = ATL2_READ_REG(hw, REG_DESC_BASE_ADDR_HI);
1894 regs_buff[24] = ATL2_READ_REG(hw, REG_TXD_BASE_ADDR_LO);
1895 regs_buff[25] = ATL2_READ_REG(hw, REG_TXD_MEM_SIZE);
1896 regs_buff[26] = ATL2_READ_REG(hw, REG_TXS_BASE_ADDR_LO);
1897 regs_buff[27] = ATL2_READ_REG(hw, REG_TXS_MEM_SIZE);
1898 regs_buff[28] = ATL2_READ_REG(hw, REG_RXD_BASE_ADDR_LO);
1899 regs_buff[29] = ATL2_READ_REG(hw, REG_RXD_BUF_NUM);
1900 regs_buff[30] = ATL2_READ_REG(hw, REG_DMAR);
1901 regs_buff[31] = ATL2_READ_REG(hw, REG_TX_CUT_THRESH);
1902 regs_buff[32] = ATL2_READ_REG(hw, REG_DMAW);
1903 regs_buff[33] = ATL2_READ_REG(hw, REG_PAUSE_ON_TH);
1904 regs_buff[34] = ATL2_READ_REG(hw, REG_PAUSE_OFF_TH);
1905 regs_buff[35] = ATL2_READ_REG(hw, REG_MB_TXD_WR_IDX);
1906 regs_buff[36] = ATL2_READ_REG(hw, REG_MB_RXD_RD_IDX);
1907 regs_buff[38] = ATL2_READ_REG(hw, REG_ISR);
1908 regs_buff[39] = ATL2_READ_REG(hw, REG_IMR);
1910 atl2_read_phy_reg(hw, MII_BMCR, &phy_data);
1911 regs_buff[40] = (u32)phy_data;
1912 atl2_read_phy_reg(hw, MII_BMSR, &phy_data);
1913 regs_buff[41] = (u32)phy_data;
1916 static int atl2_get_eeprom_len(struct net_device *netdev)
1918 struct atl2_adapter *adapter = netdev_priv(netdev);
1920 if (!atl2_check_eeprom_exist(&adapter->hw))
1926 static int atl2_get_eeprom(struct net_device *netdev,
1927 struct ethtool_eeprom *eeprom, u8 *bytes)
1929 struct atl2_adapter *adapter = netdev_priv(netdev);
1930 struct atl2_hw *hw = &adapter->hw;
1932 int first_dword, last_dword;
1936 if (eeprom->len == 0)
1939 if (atl2_check_eeprom_exist(hw))
1942 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
1944 first_dword = eeprom->offset >> 2;
1945 last_dword = (eeprom->offset + eeprom->len - 1) >> 2;
1947 eeprom_buff = kmalloc(sizeof(u32) * (last_dword - first_dword + 1),
1952 for (i = first_dword; i < last_dword; i++) {
1953 if (!atl2_read_eeprom(hw, i*4, &(eeprom_buff[i-first_dword]))) {
1959 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 3),
1967 static int atl2_set_eeprom(struct net_device *netdev,
1968 struct ethtool_eeprom *eeprom, u8 *bytes)
1970 struct atl2_adapter *adapter = netdev_priv(netdev);
1971 struct atl2_hw *hw = &adapter->hw;
1974 int max_len, first_dword, last_dword, ret_val = 0;
1977 if (eeprom->len == 0)
1980 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
1985 first_dword = eeprom->offset >> 2;
1986 last_dword = (eeprom->offset + eeprom->len - 1) >> 2;
1987 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
1993 if (eeprom->offset & 3) {
1994 /* need read/modify/write of first changed EEPROM word */
1995 /* only the second byte of the word is being modified */
1996 if (!atl2_read_eeprom(hw, first_dword*4, &(eeprom_buff[0]))) {
2002 if (((eeprom->offset + eeprom->len) & 3)) {
2004 * need read/modify/write of last changed EEPROM word
2005 * only the first byte of the word is being modified
2007 if (!atl2_read_eeprom(hw, last_dword * 4,
2008 &(eeprom_buff[last_dword - first_dword]))) {
2014 /* Device's eeprom is always little-endian, word addressable */
2015 memcpy(ptr, bytes, eeprom->len);
2017 for (i = 0; i < last_dword - first_dword + 1; i++) {
2018 if (!atl2_write_eeprom(hw, ((first_dword+i)*4), eeprom_buff[i])) {
2028 static void atl2_get_drvinfo(struct net_device *netdev,
2029 struct ethtool_drvinfo *drvinfo)
2031 struct atl2_adapter *adapter = netdev_priv(netdev);
2033 strlcpy(drvinfo->driver, atl2_driver_name, sizeof(drvinfo->driver));
2034 strlcpy(drvinfo->version, atl2_driver_version,
2035 sizeof(drvinfo->version));
2036 strlcpy(drvinfo->fw_version, "L2", sizeof(drvinfo->fw_version));
2037 strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
2038 sizeof(drvinfo->bus_info));
2039 drvinfo->n_stats = 0;
2040 drvinfo->testinfo_len = 0;
2041 drvinfo->regdump_len = atl2_get_regs_len(netdev);
2042 drvinfo->eedump_len = atl2_get_eeprom_len(netdev);
2045 static void atl2_get_wol(struct net_device *netdev,
2046 struct ethtool_wolinfo *wol)
2048 struct atl2_adapter *adapter = netdev_priv(netdev);
2050 wol->supported = WAKE_MAGIC;
2053 if (adapter->wol & ATLX_WUFC_EX)
2054 wol->wolopts |= WAKE_UCAST;
2055 if (adapter->wol & ATLX_WUFC_MC)
2056 wol->wolopts |= WAKE_MCAST;
2057 if (adapter->wol & ATLX_WUFC_BC)
2058 wol->wolopts |= WAKE_BCAST;
2059 if (adapter->wol & ATLX_WUFC_MAG)
2060 wol->wolopts |= WAKE_MAGIC;
2061 if (adapter->wol & ATLX_WUFC_LNKC)
2062 wol->wolopts |= WAKE_PHY;
2065 static int atl2_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2067 struct atl2_adapter *adapter = netdev_priv(netdev);
2069 if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE))
2072 if (wol->wolopts & (WAKE_UCAST | WAKE_BCAST | WAKE_MCAST))
2075 /* these settings will always override what we currently have */
2078 if (wol->wolopts & WAKE_MAGIC)
2079 adapter->wol |= ATLX_WUFC_MAG;
2080 if (wol->wolopts & WAKE_PHY)
2081 adapter->wol |= ATLX_WUFC_LNKC;
2086 static int atl2_nway_reset(struct net_device *netdev)
2088 struct atl2_adapter *adapter = netdev_priv(netdev);
2089 if (netif_running(netdev))
2090 atl2_reinit_locked(adapter);
2094 static const struct ethtool_ops atl2_ethtool_ops = {
2095 .get_settings = atl2_get_settings,
2096 .set_settings = atl2_set_settings,
2097 .get_drvinfo = atl2_get_drvinfo,
2098 .get_regs_len = atl2_get_regs_len,
2099 .get_regs = atl2_get_regs,
2100 .get_wol = atl2_get_wol,
2101 .set_wol = atl2_set_wol,
2102 .get_msglevel = atl2_get_msglevel,
2103 .set_msglevel = atl2_set_msglevel,
2104 .nway_reset = atl2_nway_reset,
2105 .get_link = ethtool_op_get_link,
2106 .get_eeprom_len = atl2_get_eeprom_len,
2107 .get_eeprom = atl2_get_eeprom,
2108 .set_eeprom = atl2_set_eeprom,
2111 static void atl2_set_ethtool_ops(struct net_device *netdev)
2113 SET_ETHTOOL_OPS(netdev, &atl2_ethtool_ops);
2116 #define LBYTESWAP(a) ((((a) & 0x00ff00ff) << 8) | \
2117 (((a) & 0xff00ff00) >> 8))
2118 #define LONGSWAP(a) ((LBYTESWAP(a) << 16) | (LBYTESWAP(a) >> 16))
2119 #define SHORTSWAP(a) (((a) << 8) | ((a) >> 8))
2122 * Reset the transmit and receive units; mask and clear all interrupts.
2124 * hw - Struct containing variables accessed by shared code
2125 * return : 0 or idle status (if error)
2127 static s32 atl2_reset_hw(struct atl2_hw *hw)
2130 u16 pci_cfg_cmd_word;
2133 /* Workaround for PCI problem when BIOS sets MMRBC incorrectly. */
2134 atl2_read_pci_cfg(hw, PCI_REG_COMMAND, &pci_cfg_cmd_word);
2135 if ((pci_cfg_cmd_word &
2136 (CMD_IO_SPACE|CMD_MEMORY_SPACE|CMD_BUS_MASTER)) !=
2137 (CMD_IO_SPACE|CMD_MEMORY_SPACE|CMD_BUS_MASTER)) {
2139 (CMD_IO_SPACE|CMD_MEMORY_SPACE|CMD_BUS_MASTER);
2140 atl2_write_pci_cfg(hw, PCI_REG_COMMAND, &pci_cfg_cmd_word);
2143 /* Clear Interrupt mask to stop board from generating
2144 * interrupts & Clear any pending interrupt events
2147 /* ATL2_WRITE_REG(hw, REG_IMR, 0); */
2148 /* ATL2_WRITE_REG(hw, REG_ISR, 0xffffffff); */
2150 /* Issue Soft Reset to the MAC. This will reset the chip's
2151 * transmit, receive, DMA. It will not effect
2152 * the current PCI configuration. The global reset bit is self-
2153 * clearing, and should clear within a microsecond.
2155 ATL2_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_SOFT_RST);
2157 msleep(1); /* delay about 1ms */
2159 /* Wait at least 10ms for All module to be Idle */
2160 for (i = 0; i < 10; i++) {
2161 icr = ATL2_READ_REG(hw, REG_IDLE_STATUS);
2164 msleep(1); /* delay 1 ms */
2174 #define CUSTOM_SPI_CS_SETUP 2
2175 #define CUSTOM_SPI_CLK_HI 2
2176 #define CUSTOM_SPI_CLK_LO 2
2177 #define CUSTOM_SPI_CS_HOLD 2
2178 #define CUSTOM_SPI_CS_HI 3
2180 static struct atl2_spi_flash_dev flash_table[] =
2182 /* MFR WRSR READ PROGRAM WREN WRDI RDSR RDID SECTOR_ERASE CHIP_ERASE */
2183 {"Atmel", 0x0, 0x03, 0x02, 0x06, 0x04, 0x05, 0x15, 0x52, 0x62 },
2184 {"SST", 0x01, 0x03, 0x02, 0x06, 0x04, 0x05, 0x90, 0x20, 0x60 },
2185 {"ST", 0x01, 0x03, 0x02, 0x06, 0x04, 0x05, 0xAB, 0xD8, 0xC7 },
2188 static bool atl2_spi_read(struct atl2_hw *hw, u32 addr, u32 *buf)
2193 ATL2_WRITE_REG(hw, REG_SPI_DATA, 0);
2194 ATL2_WRITE_REG(hw, REG_SPI_ADDR, addr);
2196 value = SPI_FLASH_CTRL_WAIT_READY |
2197 (CUSTOM_SPI_CS_SETUP & SPI_FLASH_CTRL_CS_SETUP_MASK) <<
2198 SPI_FLASH_CTRL_CS_SETUP_SHIFT |
2199 (CUSTOM_SPI_CLK_HI & SPI_FLASH_CTRL_CLK_HI_MASK) <<
2200 SPI_FLASH_CTRL_CLK_HI_SHIFT |
2201 (CUSTOM_SPI_CLK_LO & SPI_FLASH_CTRL_CLK_LO_MASK) <<
2202 SPI_FLASH_CTRL_CLK_LO_SHIFT |
2203 (CUSTOM_SPI_CS_HOLD & SPI_FLASH_CTRL_CS_HOLD_MASK) <<
2204 SPI_FLASH_CTRL_CS_HOLD_SHIFT |
2205 (CUSTOM_SPI_CS_HI & SPI_FLASH_CTRL_CS_HI_MASK) <<
2206 SPI_FLASH_CTRL_CS_HI_SHIFT |
2207 (0x1 & SPI_FLASH_CTRL_INS_MASK) << SPI_FLASH_CTRL_INS_SHIFT;
2209 ATL2_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value);
2211 value |= SPI_FLASH_CTRL_START;
2213 ATL2_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value);
2215 for (i = 0; i < 10; i++) {
2217 value = ATL2_READ_REG(hw, REG_SPI_FLASH_CTRL);
2218 if (!(value & SPI_FLASH_CTRL_START))
2222 if (value & SPI_FLASH_CTRL_START)
2225 *buf = ATL2_READ_REG(hw, REG_SPI_DATA);
2231 * get_permanent_address
2232 * return 0 if get valid mac address,
2234 static int get_permanent_address(struct atl2_hw *hw)
2239 u8 EthAddr[ETH_ALEN];
2242 if (is_valid_ether_addr(hw->perm_mac_addr))
2248 if (!atl2_check_eeprom_exist(hw)) { /* eeprom exists */
2252 /* Read out all EEPROM content */
2255 if (atl2_read_eeprom(hw, i + 0x100, &Control)) {
2257 if (Register == REG_MAC_STA_ADDR)
2259 else if (Register ==
2260 (REG_MAC_STA_ADDR + 4))
2263 } else if ((Control & 0xff) == 0x5A) {
2265 Register = (u16) (Control >> 16);
2267 /* assume data end while encount an invalid KEYWORD */
2271 break; /* read error */
2276 *(u32 *) &EthAddr[2] = LONGSWAP(Addr[0]);
2277 *(u16 *) &EthAddr[0] = SHORTSWAP(*(u16 *) &Addr[1]);
2279 if (is_valid_ether_addr(EthAddr)) {
2280 memcpy(hw->perm_mac_addr, EthAddr, ETH_ALEN);
2286 /* see if SPI flash exists? */
2293 if (atl2_spi_read(hw, i + 0x1f000, &Control)) {
2295 if (Register == REG_MAC_STA_ADDR)
2297 else if (Register == (REG_MAC_STA_ADDR + 4))
2300 } else if ((Control & 0xff) == 0x5A) {
2302 Register = (u16) (Control >> 16);
2304 break; /* data end */
2307 break; /* read error */
2312 *(u32 *) &EthAddr[2] = LONGSWAP(Addr[0]);
2313 *(u16 *) &EthAddr[0] = SHORTSWAP(*(u16 *)&Addr[1]);
2314 if (is_valid_ether_addr(EthAddr)) {
2315 memcpy(hw->perm_mac_addr, EthAddr, ETH_ALEN);
2318 /* maybe MAC-address is from BIOS */
2319 Addr[0] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR);
2320 Addr[1] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR + 4);
2321 *(u32 *) &EthAddr[2] = LONGSWAP(Addr[0]);
2322 *(u16 *) &EthAddr[0] = SHORTSWAP(*(u16 *) &Addr[1]);
2324 if (is_valid_ether_addr(EthAddr)) {
2325 memcpy(hw->perm_mac_addr, EthAddr, ETH_ALEN);
2333 * Reads the adapter's MAC address from the EEPROM
2335 * hw - Struct containing variables accessed by shared code
2337 static s32 atl2_read_mac_addr(struct atl2_hw *hw)
2339 if (get_permanent_address(hw)) {
2341 /* FIXME: shouldn't we use eth_random_addr() here? */
2342 hw->perm_mac_addr[0] = 0x00;
2343 hw->perm_mac_addr[1] = 0x13;
2344 hw->perm_mac_addr[2] = 0x74;
2345 hw->perm_mac_addr[3] = 0x00;
2346 hw->perm_mac_addr[4] = 0x5c;
2347 hw->perm_mac_addr[5] = 0x38;
2350 memcpy(hw->mac_addr, hw->perm_mac_addr, ETH_ALEN);
2356 * Hashes an address to determine its location in the multicast table
2358 * hw - Struct containing variables accessed by shared code
2359 * mc_addr - the multicast address to hash
2363 * set hash value for a multicast address
2364 * hash calcu processing :
2365 * 1. calcu 32bit CRC for multicast address
2366 * 2. reverse crc with MSB to LSB
2368 static u32 atl2_hash_mc_addr(struct atl2_hw *hw, u8 *mc_addr)
2374 crc32 = ether_crc_le(6, mc_addr);
2376 for (i = 0; i < 32; i++)
2377 value |= (((crc32 >> i) & 1) << (31 - i));
2383 * Sets the bit in the multicast table corresponding to the hash value.
2385 * hw - Struct containing variables accessed by shared code
2386 * hash_value - Multicast address hash value
2388 static void atl2_hash_set(struct atl2_hw *hw, u32 hash_value)
2390 u32 hash_bit, hash_reg;
2393 /* The HASH Table is a register array of 2 32-bit registers.
2394 * It is treated like an array of 64 bits. We want to set
2395 * bit BitArray[hash_value]. So we figure out what register
2396 * the bit is in, read it, OR in the new bit, then write
2397 * back the new value. The register is determined by the
2398 * upper 7 bits of the hash value and the bit within that
2399 * register are determined by the lower 5 bits of the value.
2401 hash_reg = (hash_value >> 31) & 0x1;
2402 hash_bit = (hash_value >> 26) & 0x1F;
2404 mta = ATL2_READ_REG_ARRAY(hw, REG_RX_HASH_TABLE, hash_reg);
2406 mta |= (1 << hash_bit);
2408 ATL2_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, hash_reg, mta);
2412 * atl2_init_pcie - init PCIE module
2414 static void atl2_init_pcie(struct atl2_hw *hw)
2417 value = LTSSM_TEST_MODE_DEF;
2418 ATL2_WRITE_REG(hw, REG_LTSSM_TEST_MODE, value);
2420 value = PCIE_DLL_TX_CTRL1_DEF;
2421 ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, value);
2424 static void atl2_init_flash_opcode(struct atl2_hw *hw)
2426 if (hw->flash_vendor >= ARRAY_SIZE(flash_table))
2427 hw->flash_vendor = 0; /* ATMEL */
2430 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_PROGRAM,
2431 flash_table[hw->flash_vendor].cmdPROGRAM);
2432 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_SC_ERASE,
2433 flash_table[hw->flash_vendor].cmdSECTOR_ERASE);
2434 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_CHIP_ERASE,
2435 flash_table[hw->flash_vendor].cmdCHIP_ERASE);
2436 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_RDID,
2437 flash_table[hw->flash_vendor].cmdRDID);
2438 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_WREN,
2439 flash_table[hw->flash_vendor].cmdWREN);
2440 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_RDSR,
2441 flash_table[hw->flash_vendor].cmdRDSR);
2442 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_WRSR,
2443 flash_table[hw->flash_vendor].cmdWRSR);
2444 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_READ,
2445 flash_table[hw->flash_vendor].cmdREAD);
2448 /********************************************************************
2449 * Performs basic configuration of the adapter.
2451 * hw - Struct containing variables accessed by shared code
2452 * Assumes that the controller has previously been reset and is in a
2453 * post-reset uninitialized state. Initializes multicast table,
2454 * and Calls routines to setup link
2455 * Leaves the transmit and receive units disabled and uninitialized.
2456 ********************************************************************/
2457 static s32 atl2_init_hw(struct atl2_hw *hw)
2463 /* Zero out the Multicast HASH table */
2464 /* clear the old settings from the multicast hash table */
2465 ATL2_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
2466 ATL2_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
2468 atl2_init_flash_opcode(hw);
2470 ret_val = atl2_phy_init(hw);
2476 * Detects the current speed and duplex settings of the hardware.
2478 * hw - Struct containing variables accessed by shared code
2479 * speed - Speed of the connection
2480 * duplex - Duplex setting of the connection
2482 static s32 atl2_get_speed_and_duplex(struct atl2_hw *hw, u16 *speed,
2488 /* Read PHY Specific Status Register (17) */
2489 ret_val = atl2_read_phy_reg(hw, MII_ATLX_PSSR, &phy_data);
2493 if (!(phy_data & MII_ATLX_PSSR_SPD_DPLX_RESOLVED))
2494 return ATLX_ERR_PHY_RES;
2496 switch (phy_data & MII_ATLX_PSSR_SPEED) {
2497 case MII_ATLX_PSSR_100MBS:
2500 case MII_ATLX_PSSR_10MBS:
2504 return ATLX_ERR_PHY_SPEED;
2508 if (phy_data & MII_ATLX_PSSR_DPLX)
2509 *duplex = FULL_DUPLEX;
2511 *duplex = HALF_DUPLEX;
2517 * Reads the value from a PHY register
2518 * hw - Struct containing variables accessed by shared code
2519 * reg_addr - address of the PHY register to read
2521 static s32 atl2_read_phy_reg(struct atl2_hw *hw, u16 reg_addr, u16 *phy_data)
2526 val = ((u32)(reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT |
2530 MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT;
2531 ATL2_WRITE_REG(hw, REG_MDIO_CTRL, val);
2535 for (i = 0; i < MDIO_WAIT_TIMES; i++) {
2537 val = ATL2_READ_REG(hw, REG_MDIO_CTRL);
2538 if (!(val & (MDIO_START | MDIO_BUSY)))
2542 if (!(val & (MDIO_START | MDIO_BUSY))) {
2543 *phy_data = (u16)val;
2547 return ATLX_ERR_PHY;
2551 * Writes a value to a PHY register
2552 * hw - Struct containing variables accessed by shared code
2553 * reg_addr - address of the PHY register to write
2554 * data - data to write to the PHY
2556 static s32 atl2_write_phy_reg(struct atl2_hw *hw, u32 reg_addr, u16 phy_data)
2561 val = ((u32)(phy_data & MDIO_DATA_MASK)) << MDIO_DATA_SHIFT |
2562 (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT |
2565 MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT;
2566 ATL2_WRITE_REG(hw, REG_MDIO_CTRL, val);
2570 for (i = 0; i < MDIO_WAIT_TIMES; i++) {
2572 val = ATL2_READ_REG(hw, REG_MDIO_CTRL);
2573 if (!(val & (MDIO_START | MDIO_BUSY)))
2579 if (!(val & (MDIO_START | MDIO_BUSY)))
2582 return ATLX_ERR_PHY;
2586 * Configures PHY autoneg and flow control advertisement settings
2588 * hw - Struct containing variables accessed by shared code
2590 static s32 atl2_phy_setup_autoneg_adv(struct atl2_hw *hw)
2593 s16 mii_autoneg_adv_reg;
2595 /* Read the MII Auto-Neg Advertisement Register (Address 4). */
2596 mii_autoneg_adv_reg = MII_AR_DEFAULT_CAP_MASK;
2598 /* Need to parse autoneg_advertised and set up
2599 * the appropriate PHY registers. First we will parse for
2600 * autoneg_advertised software override. Since we can advertise
2601 * a plethora of combinations, we need to check each bit
2605 /* First we clear all the 10/100 mb speed bits in the Auto-Neg
2606 * Advertisement Register (Address 4) and the 1000 mb speed bits in
2607 * the 1000Base-T Control Register (Address 9). */
2608 mii_autoneg_adv_reg &= ~MII_AR_SPEED_MASK;
2610 /* Need to parse MediaType and setup the
2611 * appropriate PHY registers. */
2612 switch (hw->MediaType) {
2613 case MEDIA_TYPE_AUTO_SENSOR:
2614 mii_autoneg_adv_reg |=
2615 (MII_AR_10T_HD_CAPS |
2616 MII_AR_10T_FD_CAPS |
2617 MII_AR_100TX_HD_CAPS|
2618 MII_AR_100TX_FD_CAPS);
2619 hw->autoneg_advertised =
2625 case MEDIA_TYPE_100M_FULL:
2626 mii_autoneg_adv_reg |= MII_AR_100TX_FD_CAPS;
2627 hw->autoneg_advertised = ADVERTISE_100_FULL;
2629 case MEDIA_TYPE_100M_HALF:
2630 mii_autoneg_adv_reg |= MII_AR_100TX_HD_CAPS;
2631 hw->autoneg_advertised = ADVERTISE_100_HALF;
2633 case MEDIA_TYPE_10M_FULL:
2634 mii_autoneg_adv_reg |= MII_AR_10T_FD_CAPS;
2635 hw->autoneg_advertised = ADVERTISE_10_FULL;
2638 mii_autoneg_adv_reg |= MII_AR_10T_HD_CAPS;
2639 hw->autoneg_advertised = ADVERTISE_10_HALF;
2643 /* flow control fixed to enable all */
2644 mii_autoneg_adv_reg |= (MII_AR_ASM_DIR | MII_AR_PAUSE);
2646 hw->mii_autoneg_adv_reg = mii_autoneg_adv_reg;
2648 ret_val = atl2_write_phy_reg(hw, MII_ADVERTISE, mii_autoneg_adv_reg);
2657 * Resets the PHY and make all config validate
2659 * hw - Struct containing variables accessed by shared code
2661 * Sets bit 15 and 12 of the MII Control regiser (for F001 bug)
2663 static s32 atl2_phy_commit(struct atl2_hw *hw)
2668 phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG;
2669 ret_val = atl2_write_phy_reg(hw, MII_BMCR, phy_data);
2673 /* pcie serdes link may be down ! */
2674 for (i = 0; i < 25; i++) {
2676 val = ATL2_READ_REG(hw, REG_MDIO_CTRL);
2677 if (!(val & (MDIO_START | MDIO_BUSY)))
2681 if (0 != (val & (MDIO_START | MDIO_BUSY))) {
2682 printk(KERN_ERR "atl2: PCIe link down for at least 25ms !\n");
2689 static s32 atl2_phy_init(struct atl2_hw *hw)
2694 if (hw->phy_configured)
2698 ATL2_WRITE_REGW(hw, REG_PHY_ENABLE, 1);
2699 ATL2_WRITE_FLUSH(hw);
2702 /* check if the PHY is in powersaving mode */
2703 atl2_write_phy_reg(hw, MII_DBG_ADDR, 0);
2704 atl2_read_phy_reg(hw, MII_DBG_DATA, &phy_val);
2706 /* 024E / 124E 0r 0274 / 1274 ? */
2707 if (phy_val & 0x1000) {
2709 atl2_write_phy_reg(hw, MII_DBG_DATA, phy_val);
2714 /*Enable PHY LinkChange Interrupt */
2715 ret_val = atl2_write_phy_reg(hw, 18, 0xC00);
2719 /* setup AutoNeg parameters */
2720 ret_val = atl2_phy_setup_autoneg_adv(hw);
2724 /* SW.Reset & En-Auto-Neg to restart Auto-Neg */
2725 ret_val = atl2_phy_commit(hw);
2729 hw->phy_configured = true;
2734 static void atl2_set_mac_addr(struct atl2_hw *hw)
2737 /* 00-0B-6A-F6-00-DC
2738 * 0: 6AF600DC 1: 000B
2740 value = (((u32)hw->mac_addr[2]) << 24) |
2741 (((u32)hw->mac_addr[3]) << 16) |
2742 (((u32)hw->mac_addr[4]) << 8) |
2743 (((u32)hw->mac_addr[5]));
2744 ATL2_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 0, value);
2746 value = (((u32)hw->mac_addr[0]) << 8) |
2747 (((u32)hw->mac_addr[1]));
2748 ATL2_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 1, value);
2752 * check_eeprom_exist
2753 * return 0 if eeprom exist
2755 static int atl2_check_eeprom_exist(struct atl2_hw *hw)
2759 value = ATL2_READ_REG(hw, REG_SPI_FLASH_CTRL);
2760 if (value & SPI_FLASH_CTRL_EN_VPD) {
2761 value &= ~SPI_FLASH_CTRL_EN_VPD;
2762 ATL2_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value);
2764 value = ATL2_READ_REGW(hw, REG_PCIE_CAP_LIST);
2765 return ((value & 0xFF00) == 0x6C00) ? 0 : 1;
2768 /* FIXME: This doesn't look right. -- CHS */
2769 static bool atl2_write_eeprom(struct atl2_hw *hw, u32 offset, u32 value)
2774 static bool atl2_read_eeprom(struct atl2_hw *hw, u32 Offset, u32 *pValue)
2780 return false; /* address do not align */
2782 ATL2_WRITE_REG(hw, REG_VPD_DATA, 0);
2783 Control = (Offset & VPD_CAP_VPD_ADDR_MASK) << VPD_CAP_VPD_ADDR_SHIFT;
2784 ATL2_WRITE_REG(hw, REG_VPD_CAP, Control);
2786 for (i = 0; i < 10; i++) {
2788 Control = ATL2_READ_REG(hw, REG_VPD_CAP);
2789 if (Control & VPD_CAP_VPD_FLAG)
2793 if (Control & VPD_CAP_VPD_FLAG) {
2794 *pValue = ATL2_READ_REG(hw, REG_VPD_DATA);
2797 return false; /* timeout */
2800 static void atl2_force_ps(struct atl2_hw *hw)
2804 atl2_write_phy_reg(hw, MII_DBG_ADDR, 0);
2805 atl2_read_phy_reg(hw, MII_DBG_DATA, &phy_val);
2806 atl2_write_phy_reg(hw, MII_DBG_DATA, phy_val | 0x1000);
2808 atl2_write_phy_reg(hw, MII_DBG_ADDR, 2);
2809 atl2_write_phy_reg(hw, MII_DBG_DATA, 0x3000);
2810 atl2_write_phy_reg(hw, MII_DBG_ADDR, 3);
2811 atl2_write_phy_reg(hw, MII_DBG_DATA, 0);
2814 /* This is the only thing that needs to be changed to adjust the
2815 * maximum number of ports that the driver can manage.
2817 #define ATL2_MAX_NIC 4
2819 #define OPTION_UNSET -1
2820 #define OPTION_DISABLED 0
2821 #define OPTION_ENABLED 1
2823 /* All parameters are treated the same, as an integer array of values.
2824 * This macro just reduces the need to repeat the same declaration code
2825 * over and over (plus this helps to avoid typo bugs).
2827 #define ATL2_PARAM_INIT {[0 ... ATL2_MAX_NIC] = OPTION_UNSET}
2828 #ifndef module_param_array
2829 /* Module Parameters are always initialized to -1, so that the driver
2830 * can tell the difference between no user specified value or the
2831 * user asking for the default value.
2832 * The true default values are loaded in when atl2_check_options is called.
2834 * This is a GCC extension to ANSI C.
2835 * See the item "Labeled Elements in Initializers" in the section
2836 * "Extensions to the C Language Family" of the GCC documentation.
2839 #define ATL2_PARAM(X, desc) \
2840 static const int X[ATL2_MAX_NIC + 1] = ATL2_PARAM_INIT; \
2841 MODULE_PARM(X, "1-" __MODULE_STRING(ATL2_MAX_NIC) "i"); \
2842 MODULE_PARM_DESC(X, desc);
2844 #define ATL2_PARAM(X, desc) \
2845 static int X[ATL2_MAX_NIC+1] = ATL2_PARAM_INIT; \
2846 static unsigned int num_##X; \
2847 module_param_array_named(X, X, int, &num_##X, 0); \
2848 MODULE_PARM_DESC(X, desc);
2852 * Transmit Memory Size
2853 * Valid Range: 64-2048
2854 * Default Value: 128
2856 #define ATL2_MIN_TX_MEMSIZE 4 /* 4KB */
2857 #define ATL2_MAX_TX_MEMSIZE 64 /* 64KB */
2858 #define ATL2_DEFAULT_TX_MEMSIZE 8 /* 8KB */
2859 ATL2_PARAM(TxMemSize, "Bytes of Transmit Memory");
2862 * Receive Memory Block Count
2863 * Valid Range: 16-512
2864 * Default Value: 128
2866 #define ATL2_MIN_RXD_COUNT 16
2867 #define ATL2_MAX_RXD_COUNT 512
2868 #define ATL2_DEFAULT_RXD_COUNT 64
2869 ATL2_PARAM(RxMemBlock, "Number of receive memory block");
2872 * User Specified MediaType Override
2875 * - 0 - auto-negotiate at all supported speeds
2876 * - 1 - only link at 1000Mbps Full Duplex
2877 * - 2 - only link at 100Mbps Full Duplex
2878 * - 3 - only link at 100Mbps Half Duplex
2879 * - 4 - only link at 10Mbps Full Duplex
2880 * - 5 - only link at 10Mbps Half Duplex
2883 ATL2_PARAM(MediaType, "MediaType Select");
2886 * Interrupt Moderate Timer in units of 2048 ns (~2 us)
2887 * Valid Range: 10-65535
2888 * Default Value: 45000(90ms)
2890 #define INT_MOD_DEFAULT_CNT 100 /* 200us */
2891 #define INT_MOD_MAX_CNT 65000
2892 #define INT_MOD_MIN_CNT 50
2893 ATL2_PARAM(IntModTimer, "Interrupt Moderator Timer");
2902 ATL2_PARAM(FlashVendor, "SPI Flash Vendor");
2904 #define AUTONEG_ADV_DEFAULT 0x2F
2905 #define AUTONEG_ADV_MASK 0x2F
2906 #define FLOW_CONTROL_DEFAULT FLOW_CONTROL_FULL
2908 #define FLASH_VENDOR_DEFAULT 0
2909 #define FLASH_VENDOR_MIN 0
2910 #define FLASH_VENDOR_MAX 2
2912 struct atl2_option {
2913 enum { enable_option, range_option, list_option } type;
2918 struct { /* range_option info */
2922 struct { /* list_option info */
2924 struct atl2_opt_list { int i; char *str; } *p;
2929 static int atl2_validate_option(int *value, struct atl2_option *opt)
2932 struct atl2_opt_list *ent;
2934 if (*value == OPTION_UNSET) {
2939 switch (opt->type) {
2942 case OPTION_ENABLED:
2943 printk(KERN_INFO "%s Enabled\n", opt->name);
2946 case OPTION_DISABLED:
2947 printk(KERN_INFO "%s Disabled\n", opt->name);
2953 if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
2954 printk(KERN_INFO "%s set to %i\n", opt->name, *value);
2959 for (i = 0; i < opt->arg.l.nr; i++) {
2960 ent = &opt->arg.l.p[i];
2961 if (*value == ent->i) {
2962 if (ent->str[0] != '\0')
2963 printk(KERN_INFO "%s\n", ent->str);
2972 printk(KERN_INFO "Invalid %s specified (%i) %s\n",
2973 opt->name, *value, opt->err);
2979 * atl2_check_options - Range Checking for Command Line Parameters
2980 * @adapter: board private structure
2982 * This routine checks all command line parameters for valid user
2983 * input. If an invalid value is given, or if no user specified
2984 * value exists, a default value is used. The final value is stored
2985 * in a variable in the adapter structure.
2987 static void atl2_check_options(struct atl2_adapter *adapter)
2990 struct atl2_option opt;
2991 int bd = adapter->bd_number;
2992 if (bd >= ATL2_MAX_NIC) {
2993 printk(KERN_NOTICE "Warning: no configuration for board #%i\n",
2995 printk(KERN_NOTICE "Using defaults for all values\n");
2996 #ifndef module_param_array
3001 /* Bytes of Transmit Memory */
3002 opt.type = range_option;
3003 opt.name = "Bytes of Transmit Memory";
3004 opt.err = "using default of " __MODULE_STRING(ATL2_DEFAULT_TX_MEMSIZE);
3005 opt.def = ATL2_DEFAULT_TX_MEMSIZE;
3006 opt.arg.r.min = ATL2_MIN_TX_MEMSIZE;
3007 opt.arg.r.max = ATL2_MAX_TX_MEMSIZE;
3008 #ifdef module_param_array
3009 if (num_TxMemSize > bd) {
3011 val = TxMemSize[bd];
3012 atl2_validate_option(&val, &opt);
3013 adapter->txd_ring_size = ((u32) val) * 1024;
3014 #ifdef module_param_array
3016 adapter->txd_ring_size = ((u32)opt.def) * 1024;
3018 /* txs ring size: */
3019 adapter->txs_ring_size = adapter->txd_ring_size / 128;
3020 if (adapter->txs_ring_size > 160)
3021 adapter->txs_ring_size = 160;
3023 /* Receive Memory Block Count */
3024 opt.type = range_option;
3025 opt.name = "Number of receive memory block";
3026 opt.err = "using default of " __MODULE_STRING(ATL2_DEFAULT_RXD_COUNT);
3027 opt.def = ATL2_DEFAULT_RXD_COUNT;
3028 opt.arg.r.min = ATL2_MIN_RXD_COUNT;
3029 opt.arg.r.max = ATL2_MAX_RXD_COUNT;
3030 #ifdef module_param_array
3031 if (num_RxMemBlock > bd) {
3033 val = RxMemBlock[bd];
3034 atl2_validate_option(&val, &opt);
3035 adapter->rxd_ring_size = (u32)val;
3037 /* ((u16)val)&~1; */ /* even number */
3038 #ifdef module_param_array
3040 adapter->rxd_ring_size = (u32)opt.def;
3042 /* init RXD Flow control value */
3043 adapter->hw.fc_rxd_hi = (adapter->rxd_ring_size / 8) * 7;
3044 adapter->hw.fc_rxd_lo = (ATL2_MIN_RXD_COUNT / 8) >
3045 (adapter->rxd_ring_size / 12) ? (ATL2_MIN_RXD_COUNT / 8) :
3046 (adapter->rxd_ring_size / 12);
3048 /* Interrupt Moderate Timer */
3049 opt.type = range_option;
3050 opt.name = "Interrupt Moderate Timer";
3051 opt.err = "using default of " __MODULE_STRING(INT_MOD_DEFAULT_CNT);
3052 opt.def = INT_MOD_DEFAULT_CNT;
3053 opt.arg.r.min = INT_MOD_MIN_CNT;
3054 opt.arg.r.max = INT_MOD_MAX_CNT;
3055 #ifdef module_param_array
3056 if (num_IntModTimer > bd) {
3058 val = IntModTimer[bd];
3059 atl2_validate_option(&val, &opt);
3060 adapter->imt = (u16) val;
3061 #ifdef module_param_array
3063 adapter->imt = (u16)(opt.def);
3066 opt.type = range_option;
3067 opt.name = "SPI Flash Vendor";
3068 opt.err = "using default of " __MODULE_STRING(FLASH_VENDOR_DEFAULT);
3069 opt.def = FLASH_VENDOR_DEFAULT;
3070 opt.arg.r.min = FLASH_VENDOR_MIN;
3071 opt.arg.r.max = FLASH_VENDOR_MAX;
3072 #ifdef module_param_array
3073 if (num_FlashVendor > bd) {
3075 val = FlashVendor[bd];
3076 atl2_validate_option(&val, &opt);
3077 adapter->hw.flash_vendor = (u8) val;
3078 #ifdef module_param_array
3080 adapter->hw.flash_vendor = (u8)(opt.def);
3083 opt.type = range_option;
3084 opt.name = "Speed/Duplex Selection";
3085 opt.err = "using default of " __MODULE_STRING(MEDIA_TYPE_AUTO_SENSOR);
3086 opt.def = MEDIA_TYPE_AUTO_SENSOR;
3087 opt.arg.r.min = MEDIA_TYPE_AUTO_SENSOR;
3088 opt.arg.r.max = MEDIA_TYPE_10M_HALF;
3089 #ifdef module_param_array
3090 if (num_MediaType > bd) {
3092 val = MediaType[bd];
3093 atl2_validate_option(&val, &opt);
3094 adapter->hw.MediaType = (u16) val;
3095 #ifdef module_param_array
3097 adapter->hw.MediaType = (u16)(opt.def);