drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c

   1 /* bnx2x_cmn.c: Broadcom Everest network driver.
   2  *
   3  * Copyright (c) 2007-2012 Broadcom Corporation
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation.
   8  *
   9  * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  10  * Written by: Eliezer Tamir
  11  * Based on code from Michael Chan's bnx2 driver
  12  * UDP CSUM errata workaround by Arik Gendelman
  13  * Slowpath and fastpath rework by Vladislav Zolotarov
  14  * Statistics and Link management by Yitchak Gertner
  15  *
  16  */
  17
  18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  19
  20 #include <linux/etherdevice.h>
  21 #include <linux/if_vlan.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/ip.h>
  24 #include <net/ipv6.h>
  25 #include <net/ip6_checksum.h>
  26 #include <linux/prefetch.h>
  27 #include "bnx2x_cmn.h"
  28 #include "bnx2x_init.h"
  29 #include "bnx2x_sp.h"
  30
  31
  32
  33 /**
  34  * bnx2x_move_fp - move content of the fastpath structure.
  35  *
  36  * @bp:         driver handle
  37  * @from:       source FP index
  38  * @to:         destination FP index
  39  *
  40  * Makes sure the contents of the bp->fp[to].napi is kept
  41  * intact. This is done by first copying the napi struct from
  42  * the target to the source, and then mem copying the entire
  43  * source onto the target
  44  */
  45 static inline void bnx2x_move_fp(struct bnx2x *bp, int from, int to)
  46 {
  47         struct bnx2x_fastpath *from_fp = &bp->fp[from];
  48         struct bnx2x_fastpath *to_fp = &bp->fp[to];
  49
  50         /* Copy the NAPI object as it has been already initialized */
  51         from_fp->napi = to_fp->napi;
  52
  53         /* Move bnx2x_fastpath contents */
  54         memcpy(to_fp, from_fp, sizeof(*to_fp));
  55         to_fp->index = to;
  56 }
  57
  58 int load_count[2][3] = { {0} }; /* per-path: 0-common, 1-port0, 2-port1 */
  59
  60 /* free skb in the packet ring at pos idx
  61  * return idx of last bd freed
  62  */
  63 static u16 bnx2x_free_tx_pkt(struct bnx2x *bp, struct bnx2x_fp_txdata *txdata,
  64                              u16 idx, unsigned int *pkts_compl,
  65                              unsigned int *bytes_compl)
  66 {
  67         struct sw_tx_bd *tx_buf = &txdata->tx_buf_ring[idx];
  68         struct eth_tx_start_bd *tx_start_bd;
  69         struct eth_tx_bd *tx_data_bd;
  70         struct sk_buff *skb = tx_buf->skb;
  71         u16 bd_idx = TX_BD(tx_buf->first_bd), new_cons;
  72         int nbd;
  73
  74         /* prefetch skb end pointer to speedup dev_kfree_skb() */
  75         prefetch(&skb->end);
  76
  77         DP(NETIF_MSG_TX_DONE, "fp[%d]: pkt_idx %d  buff @(%p)->skb %p\n",
  78            txdata->txq_index, idx, tx_buf, skb);
  79
  80         /* unmap first bd */
  81         tx_start_bd = &txdata->tx_desc_ring[bd_idx].start_bd;
  82         dma_unmap_single(&bp->pdev->dev, BD_UNMAP_ADDR(tx_start_bd),
  83                          BD_UNMAP_LEN(tx_start_bd), DMA_TO_DEVICE);
  84
  85
  86         nbd = le16_to_cpu(tx_start_bd->nbd) - 1;
  87 #ifdef BNX2X_STOP_ON_ERROR
  88         if ((nbd - 1) > (MAX_SKB_FRAGS + 2)) {
  89                 BNX2X_ERR("BAD nbd!\n");
  90                 bnx2x_panic();
  91         }
  92 #endif
  93         new_cons = nbd + tx_buf->first_bd;
  94
  95         /* Get the next bd */
  96         bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
  97
  98         /* Skip a parse bd... */
  99         --nbd;
 100         bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
 101
 102         /* ...and the TSO split header bd since they have no mapping */
 103         if (tx_buf->flags & BNX2X_TSO_SPLIT_BD) {
 104                 --nbd;
 105                 bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
 106         }
 107
 108         /* now free frags */
 109         while (nbd > 0) {
 110
 111                 tx_data_bd = &txdata->tx_desc_ring[bd_idx].reg_bd;
 112                 dma_unmap_page(&bp->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
 113                                BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
 114                 if (--nbd)
 115                         bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
 116         }
 117
 118         /* release skb */
 119         WARN_ON(!skb);
 120         if (likely(skb)) {
 121                 (*pkts_compl)++;
 122                 (*bytes_compl) += skb->len;
 123         }
 124
 125         dev_kfree_skb_any(skb);
 126         tx_buf->first_bd = 0;
 127         tx_buf->skb = NULL;
 128
 129         return new_cons;
 130 }
 131
 132 int bnx2x_tx_int(struct bnx2x *bp, struct bnx2x_fp_txdata *txdata)
 133 {
 134         struct netdev_queue *txq;
 135         u16 hw_cons, sw_cons, bd_cons = txdata->tx_bd_cons;
 136         unsigned int pkts_compl = 0, bytes_compl = 0;
 137
 138 #ifdef BNX2X_STOP_ON_ERROR
 139         if (unlikely(bp->panic))
 140                 return -1;
 141 #endif
 142
 143         txq = netdev_get_tx_queue(bp->dev, txdata->txq_index);
 144         hw_cons = le16_to_cpu(*txdata->tx_cons_sb);
 145         sw_cons = txdata->tx_pkt_cons;
 146
 147         while (sw_cons != hw_cons) {
 148                 u16 pkt_cons;
 149
 150                 pkt_cons = TX_BD(sw_cons);
 151
 152                 DP(NETIF_MSG_TX_DONE,
 153                    "queue[%d]: hw_cons %u  sw_cons %u  pkt_cons %u\n",
 154                    txdata->txq_index, hw_cons, sw_cons, pkt_cons);
 155
 156                 bd_cons = bnx2x_free_tx_pkt(bp, txdata, pkt_cons,
 157                     &pkts_compl, &bytes_compl);
 158
 159                 sw_cons++;
 160         }
 161
 162         netdev_tx_completed_queue(txq, pkts_compl, bytes_compl);
 163
 164         txdata->tx_pkt_cons = sw_cons;
 165         txdata->tx_bd_cons = bd_cons;
 166
 167         /* Need to make the tx_bd_cons update visible to start_xmit()
 168          * before checking for netif_tx_queue_stopped().  Without the
 169          * memory barrier, there is a small possibility that
 170          * start_xmit() will miss it and cause the queue to be stopped
 171          * forever.
 172          * On the other hand we need an rmb() here to ensure the proper
 173          * ordering of bit testing in the following
 174          * netif_tx_queue_stopped(txq) call.
 175          */
 176         smp_mb();
 177
 178         if (unlikely(netif_tx_queue_stopped(txq))) {
 179                 /* Taking tx_lock() is needed to prevent reenabling the queue
 180                  * while it's empty. This could have happen if rx_action() gets
 181                  * suspended in bnx2x_tx_int() after the condition before
 182                  * netif_tx_wake_queue(), while tx_action (bnx2x_start_xmit()):
 183                  *
 184                  * stops the queue->sees fresh tx_bd_cons->releases the queue->
 185                  * sends some packets consuming the whole queue again->
 186                  * stops the queue
 187                  */
 188
 189                 __netif_tx_lock(txq, smp_processor_id());
 190
 191                 if ((netif_tx_queue_stopped(txq)) &&
 192                     (bp->state == BNX2X_STATE_OPEN) &&
 193                     (bnx2x_tx_avail(bp, txdata) >= MAX_SKB_FRAGS + 4))
 194                         netif_tx_wake_queue(txq);
 195
 196                 __netif_tx_unlock(txq);
 197         }
 198         return 0;
 199 }
 200
 201 static inline void bnx2x_update_last_max_sge(struct bnx2x_fastpath *fp,
 202                                              u16 idx)
 203 {
 204         u16 last_max = fp->last_max_sge;
 205
 206         if (SUB_S16(idx, last_max) > 0)
 207                 fp->last_max_sge = idx;
 208 }
 209
 210 static inline void bnx2x_update_sge_prod(struct bnx2x_fastpath *fp,
 211                                          u16 sge_len,
 212                                          struct eth_end_agg_rx_cqe *cqe)
 213 {
 214         struct bnx2x *bp = fp->bp;
 215         u16 last_max, last_elem, first_elem;
 216         u16 delta = 0;
 217         u16 i;
 218
 219         if (!sge_len)
 220                 return;
 221
 222         /* First mark all used pages */
 223         for (i = 0; i < sge_len; i++)
 224                 BIT_VEC64_CLEAR_BIT(fp->sge_mask,
 225                         RX_SGE(le16_to_cpu(cqe->sgl_or_raw_data.sgl[i])));
 226
 227         DP(NETIF_MSG_RX_STATUS, "fp_cqe->sgl[%d] = %d\n",
 228            sge_len - 1, le16_to_cpu(cqe->sgl_or_raw_data.sgl[sge_len - 1]));
 229
 230         /* Here we assume that the last SGE index is the biggest */
 231         prefetch((void *)(fp->sge_mask));
 232         bnx2x_update_last_max_sge(fp,
 233                 le16_to_cpu(cqe->sgl_or_raw_data.sgl[sge_len - 1]));
 234
 235         last_max = RX_SGE(fp->last_max_sge);
 236         last_elem = last_max >> BIT_VEC64_ELEM_SHIFT;
 237         first_elem = RX_SGE(fp->rx_sge_prod) >> BIT_VEC64_ELEM_SHIFT;
 238
 239         /* If ring is not full */
 240         if (last_elem + 1 != first_elem)
 241                 last_elem++;
 242
 243         /* Now update the prod */
 244         for (i = first_elem; i != last_elem; i = NEXT_SGE_MASK_ELEM(i)) {
 245                 if (likely(fp->sge_mask[i]))
 246                         break;
 247
 248                 fp->sge_mask[i] = BIT_VEC64_ELEM_ONE_MASK;
 249                 delta += BIT_VEC64_ELEM_SZ;
 250         }
 251
 252         if (delta > 0) {
 253                 fp->rx_sge_prod += delta;
 254                 /* clear page-end entries */
 255                 bnx2x_clear_sge_mask_next_elems(fp);
 256         }
 257
 258         DP(NETIF_MSG_RX_STATUS,
 259            "fp->last_max_sge = %d  fp->rx_sge_prod = %d\n",
 260            fp->last_max_sge, fp->rx_sge_prod);
 261 }
 262
 263 /* Set Toeplitz hash value in the skb using the value from the
 264  * CQE (calculated by HW).
 265  */
 266 static u32 bnx2x_get_rxhash(const struct bnx2x *bp,
 267                             const struct eth_fast_path_rx_cqe *cqe)
 268 {
 269         /* Set Toeplitz hash from CQE */
 270         if ((bp->dev->features & NETIF_F_RXHASH) &&
 271             (cqe->status_flags & ETH_FAST_PATH_RX_CQE_RSS_HASH_FLG))
 272                 return le32_to_cpu(cqe->rss_hash_result);
 273         return 0;
 274 }
 275
 276 static void bnx2x_tpa_start(struct bnx2x_fastpath *fp, u16 queue,
 277                             u16 cons, u16 prod,
 278                             struct eth_fast_path_rx_cqe *cqe)
 279 {
 280         struct bnx2x *bp = fp->bp;
 281         struct sw_rx_bd *cons_rx_buf = &fp->rx_buf_ring[cons];
 282         struct sw_rx_bd *prod_rx_buf = &fp->rx_buf_ring[prod];
 283         struct eth_rx_bd *prod_bd = &fp->rx_desc_ring[prod];
 284         dma_addr_t mapping;
 285         struct bnx2x_agg_info *tpa_info = &fp->tpa_info[queue];
 286         struct sw_rx_bd *first_buf = &tpa_info->first_buf;
 287
 288         /* print error if current state != stop */
 289         if (tpa_info->tpa_state != BNX2X_TPA_STOP)
 290                 BNX2X_ERR("start of bin not in stop [%d]\n", queue);
 291
 292         /* Try to map an empty data buffer from the aggregation info  */
 293         mapping = dma_map_single(&bp->pdev->dev,
 294                                  first_buf->data + NET_SKB_PAD,
 295                                  fp->rx_buf_size, DMA_FROM_DEVICE);
 296         /*
 297          *  ...if it fails - move the skb from the consumer to the producer
 298          *  and set the current aggregation state as ERROR to drop it
 299          *  when TPA_STOP arrives.
 300          */
 301
 302         if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) {
 303                 /* Move the BD from the consumer to the producer */
 304                 bnx2x_reuse_rx_data(fp, cons, prod);
 305                 tpa_info->tpa_state = BNX2X_TPA_ERROR;
 306                 return;
 307         }
 308
 309         /* move empty data from pool to prod */
 310         prod_rx_buf->data = first_buf->data;
 311         dma_unmap_addr_set(prod_rx_buf, mapping, mapping);
 312         /* point prod_bd to new data */
 313         prod_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
 314         prod_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
 315
 316         /* move partial skb from cons to pool (don't unmap yet) */
 317         *first_buf = *cons_rx_buf;
 318
 319         /* mark bin state as START */
 320         tpa_info->parsing_flags =
 321                 le16_to_cpu(cqe->pars_flags.flags);
 322         tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
 323         tpa_info->tpa_state = BNX2X_TPA_START;
 324         tpa_info->len_on_bd = le16_to_cpu(cqe->len_on_bd);
 325         tpa_info->placement_offset = cqe->placement_offset;
 326         tpa_info->rxhash = bnx2x_get_rxhash(bp, cqe);
 327         if (fp->mode == TPA_MODE_GRO) {
 328                 u16 gro_size = le16_to_cpu(cqe->pkt_len_or_gro_seg_len);
 329                 tpa_info->full_page =
 330                         SGE_PAGE_SIZE * PAGES_PER_SGE / gro_size * gro_size;
 331                 tpa_info->gro_size = gro_size;
 332         }
 333
 334 #ifdef BNX2X_STOP_ON_ERROR
 335         fp->tpa_queue_used |= (1 << queue);
 336 #ifdef _ASM_GENERIC_INT_L64_H
 337         DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%lx\n",
 338 #else
 339         DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%llx\n",
 340 #endif
 341            fp->tpa_queue_used);
 342 #endif
 343 }
 344
 345 /* Timestamp option length allowed for TPA aggregation:
 346  *
 347  *              nop nop kind length echo val
 348  */
 349 #define TPA_TSTAMP_OPT_LEN      12
 350 /**
 351  * bnx2x_set_lro_mss - calculate the approximate value of the MSS
 352  *
 353  * @bp:                 driver handle
 354  * @parsing_flags:      parsing flags from the START CQE
 355  * @len_on_bd:          total length of the first packet for the
 356  *                      aggregation.
 357  *
 358  * Approximate value of the MSS for this aggregation calculated using
 359  * the first packet of it.
 360  */
 361 static u16 bnx2x_set_lro_mss(struct bnx2x *bp, u16 parsing_flags,
 362                              u16 len_on_bd)
 363 {
 364         /*
 365          * TPA arrgregation won't have either IP options or TCP options
 366          * other than timestamp or IPv6 extension headers.
 367          */
 368         u16 hdrs_len = ETH_HLEN + sizeof(struct tcphdr);
 369
 370         if (GET_FLAG(parsing_flags, PARSING_FLAGS_OVER_ETHERNET_PROTOCOL) ==
 371             PRS_FLAG_OVERETH_IPV6)
 372                 hdrs_len += sizeof(struct ipv6hdr);
 373         else /* IPv4 */
 374                 hdrs_len += sizeof(struct iphdr);
 375
 376
 377         /* Check if there was a TCP timestamp, if there is it's will
 378          * always be 12 bytes length: nop nop kind length echo val.
 379          *
 380          * Otherwise FW would close the aggregation.
 381          */
 382         if (parsing_flags & PARSING_FLAGS_TIME_STAMP_EXIST_FLAG)
 383                 hdrs_len += TPA_TSTAMP_OPT_LEN;
 384
 385         return len_on_bd - hdrs_len;
 386 }
 387
 388 static int bnx2x_alloc_rx_sge(struct bnx2x *bp,
 389                               struct bnx2x_fastpath *fp, u16 index)
 390 {
 391         struct page *page = alloc_pages(GFP_ATOMIC, PAGES_PER_SGE_SHIFT);
 392         struct sw_rx_page *sw_buf = &fp->rx_page_ring[index];
 393         struct eth_rx_sge *sge = &fp->rx_sge_ring[index];
 394         dma_addr_t mapping;
 395
 396         if (unlikely(page == NULL)) {
 397                 BNX2X_ERR("Can't alloc sge\n");
 398                 return -ENOMEM;
 399         }
 400
 401         mapping = dma_map_page(&bp->pdev->dev, page, 0,
 402                                SGE_PAGE_SIZE*PAGES_PER_SGE, DMA_FROM_DEVICE);
 403         if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) {
 404                 __free_pages(page, PAGES_PER_SGE_SHIFT);
 405                 BNX2X_ERR("Can't map sge\n");
 406                 return -ENOMEM;
 407         }
 408
 409         sw_buf->page = page;
 410         dma_unmap_addr_set(sw_buf, mapping, mapping);
 411
 412         sge->addr_hi = cpu_to_le32(U64_HI(mapping));
 413         sge->addr_lo = cpu_to_le32(U64_LO(mapping));
 414
 415         return 0;
 416 }
 417
 418 static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp,
 419                                struct bnx2x_agg_info *tpa_info,
 420                                u16 pages,
 421                                struct sk_buff *skb,
 422                                struct eth_end_agg_rx_cqe *cqe,
 423                                u16 cqe_idx)
 424 {
 425         struct sw_rx_page *rx_pg, old_rx_pg;
 426         u32 i, frag_len, frag_size;
 427         int err, j, frag_id = 0;
 428         u16 len_on_bd = tpa_info->len_on_bd;
 429         u16 full_page = 0, gro_size = 0;
 430
 431         frag_size = le16_to_cpu(cqe->pkt_len) - len_on_bd;
 432
 433         if (fp->mode == TPA_MODE_GRO) {
 434                 gro_size = tpa_info->gro_size;
 435                 full_page = tpa_info->full_page;
 436         }
 437
 438         /* This is needed in order to enable forwarding support */
 439         if (frag_size) {
 440                 skb_shinfo(skb)->gso_size = bnx2x_set_lro_mss(bp,
 441                                         tpa_info->parsing_flags, len_on_bd);
 442
 443                 /* set for GRO */
 444                 if (fp->mode == TPA_MODE_GRO)
 445                         skb_shinfo(skb)->gso_type =
 446                             (GET_FLAG(tpa_info->parsing_flags,
 447                                       PARSING_FLAGS_OVER_ETHERNET_PROTOCOL) ==
 448                                                 PRS_FLAG_OVERETH_IPV6) ?
 449                                 SKB_GSO_TCPV6 : SKB_GSO_TCPV4;
 450         }
 451
 452
 453 #ifdef BNX2X_STOP_ON_ERROR
 454         if (pages > min_t(u32, 8, MAX_SKB_FRAGS)*SGE_PAGE_SIZE*PAGES_PER_SGE) {
 455                 BNX2X_ERR("SGL length is too long: %d. CQE index is %d\n",
 456                           pages, cqe_idx);
 457                 BNX2X_ERR("cqe->pkt_len = %d\n", cqe->pkt_len);
 458                 bnx2x_panic();
 459                 return -EINVAL;
 460         }
 461 #endif
 462
 463         /* Run through the SGL and compose the fragmented skb */
 464         for (i = 0, j = 0; i < pages; i += PAGES_PER_SGE, j++) {
 465                 u16 sge_idx = RX_SGE(le16_to_cpu(cqe->sgl_or_raw_data.sgl[j]));
 466
 467                 /* FW gives the indices of the SGE as if the ring is an array
 468                    (meaning that "next" element will consume 2 indices) */
 469                 if (fp->mode == TPA_MODE_GRO)
 470                         frag_len = min_t(u32, frag_size, (u32)full_page);
 471                 else /* LRO */
 472                         frag_len = min_t(u32, frag_size,
 473                                          (u32)(SGE_PAGE_SIZE * PAGES_PER_SGE));
 474
 475                 rx_pg = &fp->rx_page_ring[sge_idx];
 476                 old_rx_pg = *rx_pg;
 477
 478                 /* If we fail to allocate a substitute page, we simply stop
 479                    where we are and drop the whole packet */
 480                 err = bnx2x_alloc_rx_sge(bp, fp, sge_idx);
 481                 if (unlikely(err)) {
 482                         fp->eth_q_stats.rx_skb_alloc_failed++;
 483                         return err;
 484                 }
 485
 486                 /* Unmap the page as we r going to pass it to the stack */
 487                 dma_unmap_page(&bp->pdev->dev,
 488                                dma_unmap_addr(&old_rx_pg, mapping),
 489                                SGE_PAGE_SIZE*PAGES_PER_SGE, DMA_FROM_DEVICE);
 490                 /* Add one frag and update the appropriate fields in the skb */
 491                 if (fp->mode == TPA_MODE_LRO)
 492                         skb_fill_page_desc(skb, j, old_rx_pg.page, 0, frag_len);
 493                 else { /* GRO */
 494                         int rem;
 495                         int offset = 0;
 496                         for (rem = frag_len; rem > 0; rem -= gro_size) {
 497                                 int len = rem > gro_size ? gro_size : rem;
 498                                 skb_fill_page_desc(skb, frag_id++,
 499                                                    old_rx_pg.page, offset, len);
 500                                 if (offset)
 501                                         get_page(old_rx_pg.page);
 502                                 offset += len;
 503                         }
 504                 }
 505
 506                 skb->data_len += frag_len;
 507                 skb->truesize += SGE_PAGE_SIZE * PAGES_PER_SGE;
 508                 skb->len += frag_len;
 509
 510                 frag_size -= frag_len;
 511         }
 512
 513         return 0;
 514 }
 515
 516 static void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp,
 517                            struct bnx2x_agg_info *tpa_info,
 518                            u16 pages,
 519                            struct eth_end_agg_rx_cqe *cqe,
 520                            u16 cqe_idx)
 521 {
 522         struct sw_rx_bd *rx_buf = &tpa_info->first_buf;
 523         u8 pad = tpa_info->placement_offset;
 524         u16 len = tpa_info->len_on_bd;
 525         struct sk_buff *skb = NULL;
 526         u8 *new_data, *data = rx_buf->data;
 527         u8 old_tpa_state = tpa_info->tpa_state;
 528
 529         tpa_info->tpa_state = BNX2X_TPA_STOP;
 530
 531         /* If we there was an error during the handling of the TPA_START -
 532          * drop this aggregation.
 533          */
 534         if (old_tpa_state == BNX2X_TPA_ERROR)
 535                 goto drop;
 536
 537         /* Try to allocate the new data */
 538         new_data = kmalloc(fp->rx_buf_size + NET_SKB_PAD, GFP_ATOMIC);
 539
 540         /* Unmap skb in the pool anyway, as we are going to change
 541            pool entry status to BNX2X_TPA_STOP even if new skb allocation
 542            fails. */
 543         dma_unmap_single(&bp->pdev->dev, dma_unmap_addr(rx_buf, mapping),
 544                          fp->rx_buf_size, DMA_FROM_DEVICE);
 545         if (likely(new_data))
 546                 skb = build_skb(data, 0);
 547
 548         if (likely(skb)) {
 549 #ifdef BNX2X_STOP_ON_ERROR
 550                 if (pad + len > fp->rx_buf_size) {
 551                         BNX2X_ERR("skb_put is about to fail...  pad %d  len %d  rx_buf_size %d\n",
 552                                   pad, len, fp->rx_buf_size);
 553                         bnx2x_panic();
 554                         return;
 555                 }
 556 #endif
 557
 558                 skb_reserve(skb, pad + NET_SKB_PAD);
 559                 skb_put(skb, len);
 560                 skb->rxhash = tpa_info->rxhash;
 561
 562                 skb->protocol = eth_type_trans(skb, bp->dev);
 563                 skb->ip_summed = CHECKSUM_UNNECESSARY;
 564
 565                 if (!bnx2x_fill_frag_skb(bp, fp, tpa_info, pages,
 566                                          skb, cqe, cqe_idx)) {
 567                         if (tpa_info->parsing_flags & PARSING_FLAGS_VLAN)
 568                                 __vlan_hwaccel_put_tag(skb, tpa_info->vlan_tag);
 569                         napi_gro_receive(&fp->napi, skb);
 570                 } else {
 571                         DP(NETIF_MSG_RX_STATUS,
 572                            "Failed to allocate new pages - dropping packet!\n");
 573                         dev_kfree_skb_any(skb);
 574                 }
 575
 576
 577                 /* put new data in bin */
 578                 rx_buf->data = new_data;
 579
 580                 return;
 581         }
 582         kfree(new_data);
 583 drop:
 584         /* drop the packet and keep the buffer in the bin */
 585         DP(NETIF_MSG_RX_STATUS,
 586            "Failed to allocate or map a new skb - dropping packet!\n");
 587         fp->eth_q_stats.rx_skb_alloc_failed++;
 588 }
 589
 590 static int bnx2x_alloc_rx_data(struct bnx2x *bp,
 591                                struct bnx2x_fastpath *fp, u16 index)
 592 {
 593         u8 *data;
 594         struct sw_rx_bd *rx_buf = &fp->rx_buf_ring[index];
 595         struct eth_rx_bd *rx_bd = &fp->rx_desc_ring[index];
 596         dma_addr_t mapping;
 597
 598         data = kmalloc(fp->rx_buf_size + NET_SKB_PAD, GFP_ATOMIC);
 599         if (unlikely(data == NULL))
 600                 return -ENOMEM;
 601
 602         mapping = dma_map_single(&bp->pdev->dev, data + NET_SKB_PAD,
 603                                  fp->rx_buf_size,
 604                                  DMA_FROM_DEVICE);
 605         if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) {
 606                 kfree(data);
 607                 BNX2X_ERR("Can't map rx data\n");
 608                 return -ENOMEM;
 609         }
 610
 611         rx_buf->data = data;
 612         dma_unmap_addr_set(rx_buf, mapping, mapping);
 613
 614         rx_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
 615         rx_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
 616
 617         return 0;
 618 }
 619
 620 static void bnx2x_csum_validate(struct sk_buff *skb, union eth_rx_cqe *cqe,
 621                                 struct bnx2x_fastpath *fp)
 622 {
 623         /* Do nothing if no IP/L4 csum validation was done */
 624
 625         if (cqe->fast_path_cqe.status_flags &
 626             (ETH_FAST_PATH_RX_CQE_IP_XSUM_NO_VALIDATION_FLG |
 627              ETH_FAST_PATH_RX_CQE_L4_XSUM_NO_VALIDATION_FLG))
 628                 return;
 629
 630         /* If both IP/L4 validation were done, check if an error was found. */
 631
 632         if (cqe->fast_path_cqe.type_error_flags &
 633             (ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG |
 634              ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG))
 635                 fp->eth_q_stats.hw_csum_err++;
 636         else
 637                 skb->ip_summed = CHECKSUM_UNNECESSARY;
 638 }
 639
 640 int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget)
 641 {
 642         struct bnx2x *bp = fp->bp;
 643         u16 bd_cons, bd_prod, bd_prod_fw, comp_ring_cons;
 644         u16 hw_comp_cons, sw_comp_cons, sw_comp_prod;
 645         int rx_pkt = 0;
 646
 647 #ifdef BNX2X_STOP_ON_ERROR
 648         if (unlikely(bp->panic))
 649                 return 0;
 650 #endif
 651
 652         /* CQ "next element" is of the size of the regular element,
 653            that's why it's ok here */
 654         hw_comp_cons = le16_to_cpu(*fp->rx_cons_sb);
 655         if ((hw_comp_cons & MAX_RCQ_DESC_CNT) == MAX_RCQ_DESC_CNT)
 656                 hw_comp_cons++;
 657
 658         bd_cons = fp->rx_bd_cons;
 659         bd_prod = fp->rx_bd_prod;
 660         bd_prod_fw = bd_prod;
 661         sw_comp_cons = fp->rx_comp_cons;
 662         sw_comp_prod = fp->rx_comp_prod;
 663
 664         /* Memory barrier necessary as speculative reads of the rx
 665          * buffer can be ahead of the index in the status block
 666          */
 667         rmb();
 668
 669         DP(NETIF_MSG_RX_STATUS,
 670            "queue[%d]:  hw_comp_cons %u  sw_comp_cons %u\n",
 671            fp->index, hw_comp_cons, sw_comp_cons);
 672
 673         while (sw_comp_cons != hw_comp_cons) {
 674                 struct sw_rx_bd *rx_buf = NULL;
 675                 struct sk_buff *skb;
 676                 union eth_rx_cqe *cqe;
 677                 struct eth_fast_path_rx_cqe *cqe_fp;
 678                 u8 cqe_fp_flags;
 679                 enum eth_rx_cqe_type cqe_fp_type;
 680                 u16 len, pad, queue;
 681                 u8 *data;
 682
 683 #ifdef BNX2X_STOP_ON_ERROR
 684                 if (unlikely(bp->panic))
 685                         return 0;
 686 #endif
 687
 688                 comp_ring_cons = RCQ_BD(sw_comp_cons);
 689                 bd_prod = RX_BD(bd_prod);
 690                 bd_cons = RX_BD(bd_cons);
 691
 692                 cqe = &fp->rx_comp_ring[comp_ring_cons];
 693                 cqe_fp = &cqe->fast_path_cqe;
 694                 cqe_fp_flags = cqe_fp->type_error_flags;
 695                 cqe_fp_type = cqe_fp_flags & ETH_FAST_PATH_RX_CQE_TYPE;
 696
 697                 DP(NETIF_MSG_RX_STATUS,
 698                    "CQE type %x  err %x  status %x  queue %x  vlan %x  len %u\n",
 699                    CQE_TYPE(cqe_fp_flags),
 700                    cqe_fp_flags, cqe_fp->status_flags,
 701                    le32_to_cpu(cqe_fp->rss_hash_result),
 702                    le16_to_cpu(cqe_fp->vlan_tag),
 703                    le16_to_cpu(cqe_fp->pkt_len_or_gro_seg_len));
 704
 705                 /* is this a slowpath msg? */
 706                 if (unlikely(CQE_TYPE_SLOW(cqe_fp_type))) {
 707                         bnx2x_sp_event(fp, cqe);
 708                         goto next_cqe;
 709                 }
 710
 711                 rx_buf = &fp->rx_buf_ring[bd_cons];
 712                 data = rx_buf->data;
 713
 714                 if (!CQE_TYPE_FAST(cqe_fp_type)) {
 715                         struct bnx2x_agg_info *tpa_info;
 716                         u16 frag_size, pages;
 717 #ifdef BNX2X_STOP_ON_ERROR
 718                         /* sanity check */
 719                         if (fp->disable_tpa &&
 720                             (CQE_TYPE_START(cqe_fp_type) ||
 721                              CQE_TYPE_STOP(cqe_fp_type)))
 722                                 BNX2X_ERR("START/STOP packet while disable_tpa type %x\n",
 723                                           CQE_TYPE(cqe_fp_type));
 724 #endif
 725
 726                         if (CQE_TYPE_START(cqe_fp_type)) {
 727                                 u16 queue = cqe_fp->queue_index;
 728                                 DP(NETIF_MSG_RX_STATUS,
 729                                    "calling tpa_start on queue %d\n",
 730                                    queue);
 731
 732                                 bnx2x_tpa_start(fp, queue,
 733                                                 bd_cons, bd_prod,
 734                                                 cqe_fp);
 735
 736                                 goto next_rx;
 737
 738                         }
 739                         queue = cqe->end_agg_cqe.queue_index;
 740                         tpa_info = &fp->tpa_info[queue];
 741                         DP(NETIF_MSG_RX_STATUS,
 742                            "calling tpa_stop on queue %d\n",
 743                            queue);
 744
 745                         frag_size = le16_to_cpu(cqe->end_agg_cqe.pkt_len) -
 746                                     tpa_info->len_on_bd;
 747
 748                         if (fp->mode == TPA_MODE_GRO)
 749                                 pages = (frag_size + tpa_info->full_page - 1) /
 750                                          tpa_info->full_page;
 751                         else
 752                                 pages = SGE_PAGE_ALIGN(frag_size) >>
 753                                         SGE_PAGE_SHIFT;
 754
 755                         bnx2x_tpa_stop(bp, fp, tpa_info, pages,
 756                                        &cqe->end_agg_cqe, comp_ring_cons);
 757 #ifdef BNX2X_STOP_ON_ERROR
 758                         if (bp->panic)
 759                                 return 0;
 760 #endif
 761
 762                         bnx2x_update_sge_prod(fp, pages, &cqe->end_agg_cqe);
 763                         goto next_cqe;
 764                 }
 765                 /* non TPA */
 766                 len = le16_to_cpu(cqe_fp->pkt_len_or_gro_seg_len);
 767                 pad = cqe_fp->placement_offset;
 768                 dma_sync_single_for_cpu(&bp->pdev->dev,
 769                                         dma_unmap_addr(rx_buf, mapping),
 770                                         pad + RX_COPY_THRESH,
 771                                         DMA_FROM_DEVICE);
 772                 pad += NET_SKB_PAD;
 773                 prefetch(data + pad); /* speedup eth_type_trans() */
 774                 /* is this an error packet? */
 775                 if (unlikely(cqe_fp_flags & ETH_RX_ERROR_FALGS)) {
 776                         DP(NETIF_MSG_RX_ERR | NETIF_MSG_RX_STATUS,
 777                            "ERROR  flags %x  rx packet %u\n",
 778                            cqe_fp_flags, sw_comp_cons);
 779                         fp->eth_q_stats.rx_err_discard_pkt++;
 780                         goto reuse_rx;
 781                 }
 782
 783                 /* Since we don't have a jumbo ring
 784                  * copy small packets if mtu > 1500
 785                  */
 786                 if ((bp->dev->mtu > ETH_MAX_PACKET_SIZE) &&
 787                     (len <= RX_COPY_THRESH)) {
 788                         skb = netdev_alloc_skb_ip_align(bp->dev, len);
 789                         if (skb == NULL) {
 790                                 DP(NETIF_MSG_RX_ERR | NETIF_MSG_RX_STATUS,
 791                                    "ERROR  packet dropped because of alloc failure\n");
 792                                 fp->eth_q_stats.rx_skb_alloc_failed++;
 793                                 goto reuse_rx;
 794                         }
 795                         memcpy(skb->data, data + pad, len);
 796                         bnx2x_reuse_rx_data(fp, bd_cons, bd_prod);
 797                 } else {
 798                         if (likely(bnx2x_alloc_rx_data(bp, fp, bd_prod) == 0)) {
 799                                 dma_unmap_single(&bp->pdev->dev,
 800                                                  dma_unmap_addr(rx_buf, mapping),
 801                                                  fp->rx_buf_size,
 802                                                  DMA_FROM_DEVICE);
 803                                 skb = build_skb(data, 0);
 804                                 if (unlikely(!skb)) {
 805                                         kfree(data);
 806                                         fp->eth_q_stats.rx_skb_alloc_failed++;
 807                                         goto next_rx;
 808                                 }
 809                                 skb_reserve(skb, pad);
 810                         } else {
 811                                 DP(NETIF_MSG_RX_ERR | NETIF_MSG_RX_STATUS,
 812                                    "ERROR  packet dropped because of alloc failure\n");
 813                                 fp->eth_q_stats.rx_skb_alloc_failed++;
 814 reuse_rx:
 815                                 bnx2x_reuse_rx_data(fp, bd_cons, bd_prod);
 816                                 goto next_rx;
 817                         }
 818                 }
 819
 820                 skb_put(skb, len);
 821                 skb->protocol = eth_type_trans(skb, bp->dev);
 822
 823                 /* Set Toeplitz hash for a none-LRO skb */
 824                 skb->rxhash = bnx2x_get_rxhash(bp, cqe_fp);
 825
 826                 skb_checksum_none_assert(skb);
 827
 828                 if (bp->dev->features & NETIF_F_RXCSUM)
 829                         bnx2x_csum_validate(skb, cqe, fp);
 830
 831
 832                 skb_record_rx_queue(skb, fp->rx_queue);
 833
 834                 if (le16_to_cpu(cqe_fp->pars_flags.flags) &
 835                     PARSING_FLAGS_VLAN)
 836                         __vlan_hwaccel_put_tag(skb,
 837                                                le16_to_cpu(cqe_fp->vlan_tag));
 838                 napi_gro_receive(&fp->napi, skb);
 839
 840
 841 next_rx:
 842                 rx_buf->data = NULL;
 843
 844                 bd_cons = NEXT_RX_IDX(bd_cons);
 845                 bd_prod = NEXT_RX_IDX(bd_prod);
 846                 bd_prod_fw = NEXT_RX_IDX(bd_prod_fw);
 847                 rx_pkt++;
 848 next_cqe:
 849                 sw_comp_prod = NEXT_RCQ_IDX(sw_comp_prod);
 850                 sw_comp_cons = NEXT_RCQ_IDX(sw_comp_cons);
 851
 852                 if (rx_pkt == budget)
 853                         break;
 854         } /* while */
 855
 856         fp->rx_bd_cons = bd_cons;
 857         fp->rx_bd_prod = bd_prod_fw;
 858         fp->rx_comp_cons = sw_comp_cons;
 859         fp->rx_comp_prod = sw_comp_prod;
 860
 861         /* Update producers */
 862         bnx2x_update_rx_prod(bp, fp, bd_prod_fw, sw_comp_prod,
 863                              fp->rx_sge_prod);
 864
 865         fp->rx_pkt += rx_pkt;
 866         fp->rx_calls++;
 867
 868         return rx_pkt;
 869 }
 870
 871 static irqreturn_t bnx2x_msix_fp_int(int irq, void *fp_cookie)
 872 {
 873         struct bnx2x_fastpath *fp = fp_cookie;
 874         struct bnx2x *bp = fp->bp;
 875         u8 cos;
 876
 877         DP(NETIF_MSG_INTR,
 878            "got an MSI-X interrupt on IDX:SB [fp %d fw_sd %d igusb %d]\n",
 879            fp->index, fp->fw_sb_id, fp->igu_sb_id);
 880         bnx2x_ack_sb(bp, fp->igu_sb_id, USTORM_ID, 0, IGU_INT_DISABLE, 0);
 881
 882 #ifdef BNX2X_STOP_ON_ERROR
 883         if (unlikely(bp->panic))
 884                 return IRQ_HANDLED;
 885 #endif
 886
 887         /* Handle Rx and Tx according to MSI-X vector */
 888         prefetch(fp->rx_cons_sb);
 889
 890         for_each_cos_in_tx_queue(fp, cos)
 891                 prefetch(fp->txdata[cos].tx_cons_sb);
 892
 893         prefetch(&fp->sb_running_index[SM_RX_ID]);
 894         napi_schedule(&bnx2x_fp(bp, fp->index, napi));
 895
 896         return IRQ_HANDLED;
 897 }
 898
 899 /* HW Lock for shared dual port PHYs */
 900 void bnx2x_acquire_phy_lock(struct bnx2x *bp)
 901 {
 902         mutex_lock(&bp->port.phy_mutex);
 903
 904         if (bp->port.need_hw_lock)
 905                 bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_MDIO);
 906 }
 907
 908 void bnx2x_release_phy_lock(struct bnx2x *bp)
 909 {
 910         if (bp->port.need_hw_lock)
 911                 bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_MDIO);
 912
 913         mutex_unlock(&bp->port.phy_mutex);
 914 }
 915
 916 /* calculates MF speed according to current linespeed and MF configuration */
 917 u16 bnx2x_get_mf_speed(struct bnx2x *bp)
 918 {
 919         u16 line_speed = bp->link_vars.line_speed;
 920         if (IS_MF(bp)) {
 921                 u16 maxCfg = bnx2x_extract_max_cfg(bp,
 922                                                    bp->mf_config[BP_VN(bp)]);
 923
 924                 /* Calculate the current MAX line speed limit for the MF
 925                  * devices
 926                  */
 927                 if (IS_MF_SI(bp))
 928                         line_speed = (line_speed * maxCfg) / 100;
 929                 else { /* SD mode */
 930                         u16 vn_max_rate = maxCfg * 100;
 931
 932                         if (vn_max_rate < line_speed)
 933                                 line_speed = vn_max_rate;
 934                 }
 935         }
 936
 937         return line_speed;
 938 }
 939
 940 /**
 941  * bnx2x_fill_report_data - fill link report data to report
 942  *
 943  * @bp:         driver handle
 944  * @data:       link state to update
 945  *
 946  * It uses a none-atomic bit operations because is called under the mutex.
 947  */
 948 static void bnx2x_fill_report_data(struct bnx2x *bp,
 949                                    struct bnx2x_link_report_data *data)
 950 {
 951         u16 line_speed = bnx2x_get_mf_speed(bp);
 952
 953         memset(data, 0, sizeof(*data));
 954
 955         /* Fill the report data: efective line speed */
 956         data->line_speed = line_speed;
 957
 958         /* Link is down */
 959         if (!bp->link_vars.link_up || (bp->flags & MF_FUNC_DIS))
 960                 __set_bit(BNX2X_LINK_REPORT_LINK_DOWN,
 961                           &data->link_report_flags);
 962
 963         /* Full DUPLEX */
 964         if (bp->link_vars.duplex == DUPLEX_FULL)
 965                 __set_bit(BNX2X_LINK_REPORT_FD, &data->link_report_flags);
 966
 967         /* Rx Flow Control is ON */
 968         if (bp->link_vars.flow_ctrl & BNX2X_FLOW_CTRL_RX)
 969                 __set_bit(BNX2X_LINK_REPORT_RX_FC_ON, &data->link_report_flags);
 970
 971         /* Tx Flow Control is ON */
 972         if (bp->link_vars.flow_ctrl & BNX2X_FLOW_CTRL_TX)
 973                 __set_bit(BNX2X_LINK_REPORT_TX_FC_ON, &data->link_report_flags);
 974 }
 975
 976 /**
 977  * bnx2x_link_report - report link status to OS.
 978  *
 979  * @bp:         driver handle
 980  *
 981  * Calls the __bnx2x_link_report() under the same locking scheme
 982  * as a link/PHY state managing code to ensure a consistent link
 983  * reporting.
 984  */
 985
 986 void bnx2x_link_report(struct bnx2x *bp)
 987 {
 988         bnx2x_acquire_phy_lock(bp);
 989         __bnx2x_link_report(bp);
 990         bnx2x_release_phy_lock(bp);
 991 }
 992
 993 /**
 994  * __bnx2x_link_report - report link status to OS.
 995  *
 996  * @bp:         driver handle
 997  *
 998  * None atomic inmlementation.
 999  * Should be called under the phy_lock.
1000  */
1001 void __bnx2x_link_report(struct bnx2x *bp)
1002 {
1003         struct bnx2x_link_report_data cur_data;
1004
1005         /* reread mf_cfg */
1006         if (!CHIP_IS_E1(bp))
1007                 bnx2x_read_mf_cfg(bp);
1008
1009         /* Read the current link report info */
1010         bnx2x_fill_report_data(bp, &cur_data);
1011
1012         /* Don't report link down or exactly the same link status twice */
1013         if (!memcmp(&cur_data, &bp->last_reported_link, sizeof(cur_data)) ||
1014             (test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
1015                       &bp->last_reported_link.link_report_flags) &&
1016              test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
1017                       &cur_data.link_report_flags)))
1018                 return;
1019
1020         bp->link_cnt++;
1021
1022         /* We are going to report a new link parameters now -
1023          * remember the current data for the next time.
1024          */
1025         memcpy(&bp->last_reported_link, &cur_data, sizeof(cur_data));
1026
1027         if (test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
1028                      &cur_data.link_report_flags)) {
1029                 netif_carrier_off(bp->dev);
1030                 netdev_err(bp->dev, "NIC Link is Down\n");
1031                 return;
1032         } else {
1033                 const char *duplex;
1034                 const char *flow;
1035
1036                 netif_carrier_on(bp->dev);
1037
1038                 if (test_and_clear_bit(BNX2X_LINK_REPORT_FD,
1039                                        &cur_data.link_report_flags))
1040                         duplex = "full";
1041                 else
1042                         duplex = "half";
1043
1044                 /* Handle the FC at the end so that only these flags would be
1045                  * possibly set. This way we may easily check if there is no FC
1046                  * enabled.
1047                  */
1048                 if (cur_data.link_report_flags) {
1049                         if (test_bit(BNX2X_LINK_REPORT_RX_FC_ON,
1050                                      &cur_data.link_report_flags)) {
1051                                 if (test_bit(BNX2X_LINK_REPORT_TX_FC_ON,
1052                                      &cur_data.link_report_flags))
1053                                         flow = "ON - receive & transmit";
1054                                 else
1055                                         flow = "ON - receive";
1056                         } else {
1057                                 flow = "ON - transmit";
1058                         }
1059                 } else {
1060                         flow = "none";
1061                 }
1062                 netdev_info(bp->dev, "NIC Link is Up, %d Mbps %s duplex, Flow control: %s\n",
1063                             cur_data.line_speed, duplex, flow);
1064         }
1065 }
1066
1067 static void bnx2x_set_next_page_sgl(struct bnx2x_fastpath *fp)
1068 {
1069         int i;
1070
1071         for (i = 1; i <= NUM_RX_SGE_PAGES; i++) {
1072                 struct eth_rx_sge *sge;
1073
1074                 sge = &fp->rx_sge_ring[RX_SGE_CNT * i - 2];
1075                 sge->addr_hi =
1076                         cpu_to_le32(U64_HI(fp->rx_sge_mapping +
1077                         BCM_PAGE_SIZE*(i % NUM_RX_SGE_PAGES)));
1078
1079                 sge->addr_lo =
1080                         cpu_to_le32(U64_LO(fp->rx_sge_mapping +
1081                         BCM_PAGE_SIZE*(i % NUM_RX_SGE_PAGES)));
1082         }
1083 }
1084
1085 static void bnx2x_free_tpa_pool(struct bnx2x *bp,
1086                                 struct bnx2x_fastpath *fp, int last)
1087 {
1088         int i;
1089
1090         for (i = 0; i < last; i++) {
1091                 struct bnx2x_agg_info *tpa_info = &fp->tpa_info[i];
1092                 struct sw_rx_bd *first_buf = &tpa_info->first_buf;
1093                 u8 *data = first_buf->data;
1094
1095                 if (data == NULL) {
1096                         DP(NETIF_MSG_IFDOWN, "tpa bin %d empty on free\n", i);
1097                         continue;
1098                 }
1099                 if (tpa_info->tpa_state == BNX2X_TPA_START)
1100                         dma_unmap_single(&bp->pdev->dev,
1101                                          dma_unmap_addr(first_buf, mapping),
1102                                          fp->rx_buf_size, DMA_FROM_DEVICE);
1103                 kfree(data);
1104                 first_buf->data = NULL;
1105         }
1106 }
1107
1108 void bnx2x_init_rx_rings(struct bnx2x *bp)
1109 {
1110         int func = BP_FUNC(bp);
1111         u16 ring_prod;
1112         int i, j;
1113
1114         /* Allocate TPA resources */
1115         for_each_rx_queue(bp, j) {
1116                 struct bnx2x_fastpath *fp = &bp->fp[j];
1117
1118                 DP(NETIF_MSG_IFUP,
1119                    "mtu %d  rx_buf_size %d\n", bp->dev->mtu, fp->rx_buf_size);
1120
1121                 if (!fp->disable_tpa) {
1122                         /* Fill the per-aggregtion pool */
1123                         for (i = 0; i < MAX_AGG_QS(bp); i++) {
1124                                 struct bnx2x_agg_info *tpa_info =
1125                                         &fp->tpa_info[i];
1126                                 struct sw_rx_bd *first_buf =
1127                                         &tpa_info->first_buf;
1128
1129                                 first_buf->data = kmalloc(fp->rx_buf_size + NET_SKB_PAD,
1130                                                           GFP_ATOMIC);
1131                                 if (!first_buf->data) {
1132                                         BNX2X_ERR("Failed to allocate TPA skb pool for queue[%d] - disabling TPA on this queue!\n",
1133                                                   j);
1134                                         bnx2x_free_tpa_pool(bp, fp, i);
1135                                         fp->disable_tpa = 1;
1136                                         break;
1137                                 }
1138                                 dma_unmap_addr_set(first_buf, mapping, 0);
1139                                 tpa_info->tpa_state = BNX2X_TPA_STOP;
1140                         }
1141
1142                         /* "next page" elements initialization */
1143                         bnx2x_set_next_page_sgl(fp);
1144
1145                         /* set SGEs bit mask */
1146                         bnx2x_init_sge_ring_bit_mask(fp);
1147
1148                         /* Allocate SGEs and initialize the ring elements */
1149                         for (i = 0, ring_prod = 0;
1150                              i < MAX_RX_SGE_CNT*NUM_RX_SGE_PAGES; i++) {
1151
1152                                 if (bnx2x_alloc_rx_sge(bp, fp, ring_prod) < 0) {
1153                                         BNX2X_ERR("was only able to allocate %d rx sges\n",
1154                                                   i);
1155                                         BNX2X_ERR("disabling TPA for queue[%d]\n",
1156                                                   j);
1157                                         /* Cleanup already allocated elements */
1158                                         bnx2x_free_rx_sge_range(bp, fp,
1159                                                                 ring_prod);
1160                                         bnx2x_free_tpa_pool(bp, fp,
1161                                                             MAX_AGG_QS(bp));
1162                                         fp->disable_tpa = 1;
1163                                         ring_prod = 0;
1164                                         break;
1165                                 }
1166                                 ring_prod = NEXT_SGE_IDX(ring_prod);
1167                         }
1168
1169                         fp->rx_sge_prod = ring_prod;
1170                 }
1171         }
1172
1173         for_each_rx_queue(bp, j) {
1174                 struct bnx2x_fastpath *fp = &bp->fp[j];
1175
1176                 fp->rx_bd_cons = 0;
1177
1178                 /* Activate BD ring */
1179                 /* Warning!
1180                  * this will generate an interrupt (to the TSTORM)
1181                  * must only be done after chip is initialized
1182                  */
1183                 bnx2x_update_rx_prod(bp, fp, fp->rx_bd_prod, fp->rx_comp_prod,
1184                                      fp->rx_sge_prod);
1185
1186                 if (j != 0)
1187                         continue;
1188
1189                 if (CHIP_IS_E1(bp)) {
1190                         REG_WR(bp, BAR_USTRORM_INTMEM +
1191                                USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(func),
1192                                U64_LO(fp->rx_comp_mapping));
1193                         REG_WR(bp, BAR_USTRORM_INTMEM +
1194                                USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(func) + 4,
1195                                U64_HI(fp->rx_comp_mapping));
1196                 }
1197         }
1198 }
1199
1200 static void bnx2x_free_tx_skbs(struct bnx2x *bp)
1201 {
1202         int i;
1203         u8 cos;
1204
1205         for_each_tx_queue(bp, i) {
1206                 struct bnx2x_fastpath *fp = &bp->fp[i];
1207                 for_each_cos_in_tx_queue(fp, cos) {
1208                         struct bnx2x_fp_txdata *txdata = &fp->txdata[cos];
1209                         unsigned pkts_compl = 0, bytes_compl = 0;
1210
1211                         u16 sw_prod = txdata->tx_pkt_prod;
1212                         u16 sw_cons = txdata->tx_pkt_cons;
1213
1214                         while (sw_cons != sw_prod) {
1215                                 bnx2x_free_tx_pkt(bp, txdata, TX_BD(sw_cons),
1216                                     &pkts_compl, &bytes_compl);
1217                                 sw_cons++;
1218                         }
1219                         netdev_tx_reset_queue(
1220                             netdev_get_tx_queue(bp->dev, txdata->txq_index));
1221                 }
1222         }
1223 }
1224
1225 static void bnx2x_free_rx_bds(struct bnx2x_fastpath *fp)
1226 {
1227         struct bnx2x *bp = fp->bp;
1228         int i;
1229
1230         /* ring wasn't allocated */
1231         if (fp->rx_buf_ring == NULL)
1232                 return;
1233
1234         for (i = 0; i < NUM_RX_BD; i++) {
1235                 struct sw_rx_bd *rx_buf = &fp->rx_buf_ring[i];
1236                 u8 *data = rx_buf->data;
1237
1238                 if (data == NULL)
1239                         continue;
1240                 dma_unmap_single(&bp->pdev->dev,
1241                                  dma_unmap_addr(rx_buf, mapping),
1242                                  fp->rx_buf_size, DMA_FROM_DEVICE);
1243
1244                 rx_buf->data = NULL;
1245                 kfree(data);
1246         }
1247 }
1248
1249 static void bnx2x_free_rx_skbs(struct bnx2x *bp)
1250 {
1251         int j;
1252
1253         for_each_rx_queue(bp, j) {
1254                 struct bnx2x_fastpath *fp = &bp->fp[j];
1255
1256                 bnx2x_free_rx_bds(fp);
1257
1258                 if (!fp->disable_tpa)
1259                         bnx2x_free_tpa_pool(bp, fp, MAX_AGG_QS(bp));
1260         }
1261 }
1262
1263 void bnx2x_free_skbs(struct bnx2x *bp)
1264 {
1265         bnx2x_free_tx_skbs(bp);
1266         bnx2x_free_rx_skbs(bp);
1267 }
1268
1269 void bnx2x_update_max_mf_config(struct bnx2x *bp, u32 value)
1270 {
1271         /* load old values */
1272         u32 mf_cfg = bp->mf_config[BP_VN(bp)];
1273
1274         if (value != bnx2x_extract_max_cfg(bp, mf_cfg)) {
1275                 /* leave all but MAX value */
1276                 mf_cfg &= ~FUNC_MF_CFG_MAX_BW_MASK;
1277
1278                 /* set new MAX value */
1279                 mf_cfg |= (value << FUNC_MF_CFG_MAX_BW_SHIFT)
1280                                 & FUNC_MF_CFG_MAX_BW_MASK;
1281
1282                 bnx2x_fw_command(bp, DRV_MSG_CODE_SET_MF_BW, mf_cfg);
1283         }
1284 }
1285
1286 /**
1287  * bnx2x_free_msix_irqs - free previously requested MSI-X IRQ vectors
1288  *
1289  * @bp:         driver handle
1290  * @nvecs:      number of vectors to be released
1291  */
1292 static void bnx2x_free_msix_irqs(struct bnx2x *bp, int nvecs)
1293 {
1294         int i, offset = 0;
1295
1296         if (nvecs == offset)
1297                 return;
1298         free_irq(bp->msix_table[offset].vector, bp->dev);
1299         DP(NETIF_MSG_IFDOWN, "released sp irq (%d)\n",
1300            bp->msix_table[offset].vector);
1301         offset++;
1302 #ifdef BCM_CNIC
1303         if (nvecs == offset)
1304                 return;
1305         offset++;
1306 #endif
1307
1308         for_each_eth_queue(bp, i) {
1309                 if (nvecs == offset)
1310                         return;
1311                 DP(NETIF_MSG_IFDOWN, "about to release fp #%d->%d irq\n",
1312                    i, bp->msix_table[offset].vector);
1313
1314                 free_irq(bp->msix_table[offset++].vector, &bp->fp[i]);
1315         }
1316 }
1317
1318 void bnx2x_free_irq(struct bnx2x *bp)
1319 {
1320         if (bp->flags & USING_MSIX_FLAG &&
1321             !(bp->flags & USING_SINGLE_MSIX_FLAG))
1322                 bnx2x_free_msix_irqs(bp, BNX2X_NUM_ETH_QUEUES(bp) +
1323                                      CNIC_PRESENT + 1);
1324         else
1325                 free_irq(bp->dev->irq, bp->dev);
1326 }
1327
1328 int __devinit bnx2x_enable_msix(struct bnx2x *bp)
1329 {
1330         int msix_vec = 0, i, rc, req_cnt;
1331
1332         bp->msix_table[msix_vec].entry = msix_vec;
1333         BNX2X_DEV_INFO("msix_table[0].entry = %d (slowpath)\n",
1334            bp->msix_table[0].entry);
1335         msix_vec++;
1336
1337 #ifdef BCM_CNIC
1338         bp->msix_table[msix_vec].entry = msix_vec;
1339         BNX2X_DEV_INFO("msix_table[%d].entry = %d (CNIC)\n",
1340            bp->msix_table[msix_vec].entry, bp->msix_table[msix_vec].entry);
1341         msix_vec++;
1342 #endif
1343         /* We need separate vectors for ETH queues only (not FCoE) */
1344         for_each_eth_queue(bp, i) {
1345                 bp->msix_table[msix_vec].entry = msix_vec;
1346                 BNX2X_DEV_INFO("msix_table[%d].entry = %d (fastpath #%u)\n",
1347                                msix_vec, msix_vec, i);
1348                 msix_vec++;
1349         }
1350
1351         req_cnt = BNX2X_NUM_ETH_QUEUES(bp) + CNIC_PRESENT + 1;
1352
1353         rc = pci_enable_msix(bp->pdev, &bp->msix_table[0], req_cnt);
1354
1355         /*
1356          * reconfigure number of tx/rx queues according to available
1357          * MSI-X vectors
1358          */
1359         if (rc >= BNX2X_MIN_MSIX_VEC_CNT) {
1360                 /* how less vectors we will have? */
1361                 int diff = req_cnt - rc;
1362
1363                 BNX2X_DEV_INFO("Trying to use less MSI-X vectors: %d\n", rc);
1364
1365                 rc = pci_enable_msix(bp->pdev, &bp->msix_table[0], rc);
1366
1367                 if (rc) {
1368                         BNX2X_DEV_INFO("MSI-X is not attainable rc %d\n", rc);
1369                         goto no_msix;
1370                 }
1371                 /*
1372                  * decrease number of queues by number of unallocated entries
1373                  */
1374                 bp->num_queues -= diff;
1375
1376                 BNX2X_DEV_INFO("New queue configuration set: %d\n",
1377                                bp->num_queues);
1378         } else if (rc > 0) {
1379                 /* Get by with single vector */
1380                 rc = pci_enable_msix(bp->pdev, &bp->msix_table[0], 1);
1381                 if (rc) {
1382                         BNX2X_DEV_INFO("Single MSI-X is not attainable rc %d\n",
1383                                        rc);
1384                         goto no_msix;
1385                 }
1386
1387                 BNX2X_DEV_INFO("Using single MSI-X vector\n");
1388                 bp->flags |= USING_SINGLE_MSIX_FLAG;
1389
1390         } else if (rc < 0) {
1391                 BNX2X_DEV_INFO("MSI-X is not attainable  rc %d\n", rc);
1392                 goto no_msix;
1393         }
1394
1395         bp->flags |= USING_MSIX_FLAG;
1396
1397         return 0;
1398
1399 no_msix:
1400         /* fall to INTx if not enough memory */
1401         if (rc == -ENOMEM)
1402                 bp->flags |= DISABLE_MSI_FLAG;
1403
1404         return rc;
1405 }
1406
1407 static int bnx2x_req_msix_irqs(struct bnx2x *bp)
1408 {
1409         int i, rc, offset = 0;
1410
1411         rc = request_irq(bp->msix_table[offset++].vector,
1412                          bnx2x_msix_sp_int, 0,
1413                          bp->dev->name, bp->dev);
1414         if (rc) {
1415                 BNX2X_ERR("request sp irq failed\n");
1416                 return -EBUSY;
1417         }
1418
1419 #ifdef BCM_CNIC
1420         offset++;
1421 #endif
1422         for_each_eth_queue(bp, i) {
1423                 struct bnx2x_fastpath *fp = &bp->fp[i];
1424                 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
1425                          bp->dev->name, i);
1426
1427                 rc = request_irq(bp->msix_table[offset].vector,
1428                                  bnx2x_msix_fp_int, 0, fp->name, fp);
1429                 if (rc) {
1430                         BNX2X_ERR("request fp #%d irq (%d) failed  rc %d\n", i,
1431                               bp->msix_table[offset].vector, rc);
1432                         bnx2x_free_msix_irqs(bp, offset);
1433                         return -EBUSY;
1434                 }
1435
1436                 offset++;
1437         }
1438
1439         i = BNX2X_NUM_ETH_QUEUES(bp);
1440         offset = 1 + CNIC_PRESENT;
1441         netdev_info(bp->dev, "using MSI-X  IRQs: sp %d  fp[%d] %d ... fp[%d] %d\n",
1442                bp->msix_table[0].vector,
1443                0, bp->msix_table[offset].vector,
1444                i - 1, bp->msix_table[offset + i - 1].vector);
1445
1446         return 0;
1447 }
1448
1449 int bnx2x_enable_msi(struct bnx2x *bp)
1450 {
1451         int rc;
1452
1453         rc = pci_enable_msi(bp->pdev);
1454         if (rc) {
1455                 BNX2X_DEV_INFO("MSI is not attainable\n");
1456                 return -1;
1457         }
1458         bp->flags |= USING_MSI_FLAG;
1459
1460         return 0;
1461 }
1462
1463 static int bnx2x_req_irq(struct bnx2x *bp)
1464 {
1465         unsigned long flags;
1466         unsigned int irq;
1467
1468         if (bp->flags & (USING_MSI_FLAG | USING_MSIX_FLAG))
1469                 flags = 0;
1470         else
1471                 flags = IRQF_SHARED;
1472
1473         if (bp->flags & USING_MSIX_FLAG)
1474                 irq = bp->msix_table[0].vector;
1475         else
1476                 irq = bp->pdev->irq;
1477
1478         return request_irq(irq, bnx2x_interrupt, flags, bp->dev->name, bp->dev);
1479 }
1480
1481 static int bnx2x_setup_irqs(struct bnx2x *bp)
1482 {
1483         int rc = 0;
1484         if (bp->flags & USING_MSIX_FLAG &&
1485             !(bp->flags & USING_SINGLE_MSIX_FLAG)) {
1486                 rc = bnx2x_req_msix_irqs(bp);
1487                 if (rc)
1488                         return rc;
1489         } else {
1490                 bnx2x_ack_int(bp);
1491                 rc = bnx2x_req_irq(bp);
1492                 if (rc) {
1493                         BNX2X_ERR("IRQ request failed  rc %d, aborting\n", rc);
1494                         return rc;
1495                 }
1496                 if (bp->flags & USING_MSI_FLAG) {
1497                         bp->dev->irq = bp->pdev->irq;
1498                         netdev_info(bp->dev, "using MSI IRQ %d\n",
1499                                     bp->dev->irq);
1500                 }
1501                 if (bp->flags & USING_MSIX_FLAG) {
1502                         bp->dev->irq = bp->msix_table[0].vector;
1503                         netdev_info(bp->dev, "using MSIX IRQ %d\n",
1504                                     bp->dev->irq);
1505                 }
1506         }
1507
1508         return 0;
1509 }
1510
1511 static void bnx2x_napi_enable(struct bnx2x *bp)
1512 {
1513         int i;
1514
1515         for_each_rx_queue(bp, i)
1516                 napi_enable(&bnx2x_fp(bp, i, napi));
1517 }
1518
1519 static void bnx2x_napi_disable(struct bnx2x *bp)
1520 {
1521         int i;
1522
1523         for_each_rx_queue(bp, i)
1524                 napi_disable(&bnx2x_fp(bp, i, napi));
1525 }
1526
1527 void bnx2x_netif_start(struct bnx2x *bp)
1528 {
1529         if (netif_running(bp->dev)) {
1530                 bnx2x_napi_enable(bp);
1531                 bnx2x_int_enable(bp);
1532                 if (bp->state == BNX2X_STATE_OPEN)
1533                         netif_tx_wake_all_queues(bp->dev);
1534         }
1535 }
1536
1537 void bnx2x_netif_stop(struct bnx2x *bp, int disable_hw)
1538 {
1539         bnx2x_int_disable_sync(bp, disable_hw);
1540         bnx2x_napi_disable(bp);
1541 }
1542
1543 u16 bnx2x_select_queue(struct net_device *dev, struct sk_buff *skb)
1544 {
1545         struct bnx2x *bp = netdev_priv(dev);
1546
1547 #ifdef BCM_CNIC
1548         if (!NO_FCOE(bp)) {
1549                 struct ethhdr *hdr = (struct ethhdr *)skb->data;
1550                 u16 ether_type = ntohs(hdr->h_proto);
1551
1552                 /* Skip VLAN tag if present */
1553                 if (ether_type == ETH_P_8021Q) {
1554                         struct vlan_ethhdr *vhdr =
1555                                 (struct vlan_ethhdr *)skb->data;
1556
1557                         ether_type = ntohs(vhdr->h_vlan_encapsulated_proto);
1558                 }
1559
1560                 /* If ethertype is FCoE or FIP - use FCoE ring */
1561                 if ((ether_type == ETH_P_FCOE) || (ether_type == ETH_P_FIP))
1562                         return bnx2x_fcoe_tx(bp, txq_index);
1563         }
1564 #endif
1565         /* select a non-FCoE queue */
1566         return __skb_tx_hash(dev, skb, BNX2X_NUM_ETH_QUEUES(bp));
1567 }
1568
1569
1570 void bnx2x_set_num_queues(struct bnx2x *bp)
1571 {
1572         /* RSS queues */
1573         bp->num_queues = bnx2x_calc_num_queues(bp);
1574
1575 #ifdef BCM_CNIC
1576         /* override in STORAGE SD modes */
1577         if (IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp))
1578                 bp->num_queues = 1;
1579 #endif
1580         /* Add special queues */
1581         bp->num_queues += NON_ETH_CONTEXT_USE;
1582 }
1583
1584 /**
1585  * bnx2x_set_real_num_queues - configure netdev->real_num_[tx,rx]_queues
1586  *
1587  * @bp:         Driver handle
1588  *
1589  * We currently support for at most 16 Tx queues for each CoS thus we will
1590  * allocate a multiple of 16 for ETH L2 rings according to the value of the
1591  * bp->max_cos.
1592  *
1593  * If there is an FCoE L2 queue the appropriate Tx queue will have the next
1594  * index after all ETH L2 indices.
1595  *
1596  * If the actual number of Tx queues (for each CoS) is less than 16 then there
1597  * will be the holes at the end of each group of 16 ETh L2 indices (0..15,
1598  * 16..31,...) with indicies that are not coupled with any real Tx queue.
1599  *
1600  * The proper configuration of skb->queue_mapping is handled by
1601  * bnx2x_select_queue() and __skb_tx_hash().
1602  *
1603  * bnx2x_setup_tc() takes care of the proper TC mappings so that __skb_tx_hash()
1604  * will return a proper Tx index if TC is enabled (netdev->num_tc > 0).
1605  */
1606 static int bnx2x_set_real_num_queues(struct bnx2x *bp)
1607 {
1608         int rc, tx, rx;
1609
1610         tx = MAX_TXQS_PER_COS * bp->max_cos;
1611         rx = BNX2X_NUM_ETH_QUEUES(bp);
1612
1613 /* account for fcoe queue */
1614 #ifdef BCM_CNIC
1615         if (!NO_FCOE(bp)) {
1616                 rx += FCOE_PRESENT;
1617                 tx += FCOE_PRESENT;
1618         }
1619 #endif
1620
1621         rc = netif_set_real_num_tx_queues(bp->dev, tx);
1622         if (rc) {
1623                 BNX2X_ERR("Failed to set real number of Tx queues: %d\n", rc);
1624                 return rc;
1625         }
1626         rc = netif_set_real_num_rx_queues(bp->dev, rx);
1627         if (rc) {
1628                 BNX2X_ERR("Failed to set real number of Rx queues: %d\n", rc);
1629                 return rc;
1630         }
1631
1632         DP(NETIF_MSG_IFUP, "Setting real num queues to (tx, rx) (%d, %d)\n",
1633                           tx, rx);
1634
1635         return rc;
1636 }
1637
1638 static void bnx2x_set_rx_buf_size(struct bnx2x *bp)
1639 {
1640         int i;
1641
1642         for_each_queue(bp, i) {
1643                 struct bnx2x_fastpath *fp = &bp->fp[i];
1644                 u32 mtu;
1645
1646                 /* Always use a mini-jumbo MTU for the FCoE L2 ring */
1647                 if (IS_FCOE_IDX(i))
1648                         /*
1649                          * Although there are no IP frames expected to arrive to
1650                          * this ring we still want to add an
1651                          * IP_HEADER_ALIGNMENT_PADDING to prevent a buffer
1652                          * overrun attack.
1653                          */
1654                         mtu = BNX2X_FCOE_MINI_JUMBO_MTU;
1655                 else
1656                         mtu = bp->dev->mtu;
1657                 fp->rx_buf_size = BNX2X_FW_RX_ALIGN_START +
1658                                   IP_HEADER_ALIGNMENT_PADDING +
1659                                   ETH_OVREHEAD +
1660                                   mtu +
1661                                   BNX2X_FW_RX_ALIGN_END;
1662                 /* Note : rx_buf_size doesnt take into account NET_SKB_PAD */
1663         }
1664 }
1665
1666 static int bnx2x_init_rss_pf(struct bnx2x *bp)
1667 {
1668         int i;
1669         u8 num_eth_queues = BNX2X_NUM_ETH_QUEUES(bp);
1670
1671         /* Prepare the initial contents fo the indirection table if RSS is
1672          * enabled
1673          */
1674         for (i = 0; i < sizeof(bp->rss_conf_obj.ind_table); i++)
1675                 bp->rss_conf_obj.ind_table[i] =
1676                         bp->fp->cl_id +
1677                         ethtool_rxfh_indir_default(i, num_eth_queues);
1678
1679         /*
1680          * For 57710 and 57711 SEARCHER configuration (rss_keys) is
1681          * per-port, so if explicit configuration is needed , do it only
1682          * for a PMF.
1683          *
1684          * For 57712 and newer on the other hand it's a per-function
1685          * configuration.
1686          */
1687         return bnx2x_config_rss_eth(bp, bp->port.pmf || !CHIP_IS_E1x(bp));
1688 }
1689
1690 int bnx2x_config_rss_pf(struct bnx2x *bp, struct bnx2x_rss_config_obj *rss_obj,
1691                         bool config_hash)
1692 {
1693         struct bnx2x_config_rss_params params = {NULL};
1694         int i;
1695
1696         /* Although RSS is meaningless when there is a single HW queue we
1697          * still need it enabled in order to have HW Rx hash generated.
1698          *
1699          * if (!is_eth_multi(bp))
1700          *      bp->multi_mode = ETH_RSS_MODE_DISABLED;
1701          */
1702
1703         params.rss_obj = rss_obj;
1704
1705         __set_bit(RAMROD_COMP_WAIT, &params.ramrod_flags);
1706
1707         __set_bit(BNX2X_RSS_MODE_REGULAR, &params.rss_flags);
1708
1709         /* RSS configuration */
1710         __set_bit(BNX2X_RSS_IPV4, &params.rss_flags);
1711         __set_bit(BNX2X_RSS_IPV4_TCP, &params.rss_flags);
1712         __set_bit(BNX2X_RSS_IPV6, &params.rss_flags);
1713         __set_bit(BNX2X_RSS_IPV6_TCP, &params.rss_flags);
1714         if (rss_obj->udp_rss_v4)
1715                 __set_bit(BNX2X_RSS_IPV4_UDP, &params.rss_flags);
1716         if (rss_obj->udp_rss_v6)
1717                 __set_bit(BNX2X_RSS_IPV6_UDP, &params.rss_flags);
1718
1719         /* Hash bits */
1720         params.rss_result_mask = MULTI_MASK;
1721
1722         memcpy(params.ind_table, rss_obj->ind_table, sizeof(params.ind_table));
1723
1724         if (config_hash) {
1725                 /* RSS keys */
1726                 for (i = 0; i < sizeof(params.rss_key) / 4; i++)
1727                         params.rss_key[i] = random32();
1728
1729                 __set_bit(BNX2X_RSS_SET_SRCH, &params.rss_flags);
1730         }
1731
1732         return bnx2x_config_rss(bp, &params);
1733 }
1734
1735 static int bnx2x_init_hw(struct bnx2x *bp, u32 load_code)
1736 {
1737         struct bnx2x_func_state_params func_params = {NULL};
1738
1739         /* Prepare parameters for function state transitions */
1740         __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags);
1741
1742         func_params.f_obj = &bp->func_obj;
1743         func_params.cmd = BNX2X_F_CMD_HW_INIT;
1744
1745         func_params.params.hw_init.load_phase = load_code;
1746
1747         return bnx2x_func_state_change(bp, &func_params);
1748 }
1749
1750 /*
1751  * Cleans the object that have internal lists without sending
1752  * ramrods. Should be run when interrutps are disabled.
1753  */
1754 static void bnx2x_squeeze_objects(struct bnx2x *bp)
1755 {
1756         int rc;
1757         unsigned long ramrod_flags = 0, vlan_mac_flags = 0;
1758         struct bnx2x_mcast_ramrod_params rparam = {NULL};
1759         struct bnx2x_vlan_mac_obj *mac_obj = &bp->fp->mac_obj;
1760
1761         /***************** Cleanup MACs' object first *************************/
1762
1763         /* Wait for completion of requested */
1764         __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
1765         /* Perform a dry cleanup */
1766         __set_bit(RAMROD_DRV_CLR_ONLY, &ramrod_flags);
1767
1768         /* Clean ETH primary MAC */
1769         __set_bit(BNX2X_ETH_MAC, &vlan_mac_flags);
1770         rc = mac_obj->delete_all(bp, &bp->fp->mac_obj, &vlan_mac_flags,
1771                                  &ramrod_flags);
1772         if (rc != 0)
1773                 BNX2X_ERR("Failed to clean ETH MACs: %d\n", rc);
1774
1775         /* Cleanup UC list */
1776         vlan_mac_flags = 0;
1777         __set_bit(BNX2X_UC_LIST_MAC, &vlan_mac_flags);
1778         rc = mac_obj->delete_all(bp, mac_obj, &vlan_mac_flags,
1779                                  &ramrod_flags);
1780         if (rc != 0)
1781                 BNX2X_ERR("Failed to clean UC list MACs: %d\n", rc);
1782
1783         /***************** Now clean mcast object *****************************/
1784         rparam.mcast_obj = &bp->mcast_obj;
1785         __set_bit(RAMROD_DRV_CLR_ONLY, &rparam.ramrod_flags);
1786
1787         /* Add a DEL command... */
1788         rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_DEL);
1789         if (rc < 0)
1790                 BNX2X_ERR("Failed to add a new DEL command to a multi-cast object: %d\n",
1791                           rc);
1792
1793         /* ...and wait until all pending commands are cleared */
1794         rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
1795         while (rc != 0) {
1796                 if (rc < 0) {
1797                         BNX2X_ERR("Failed to clean multi-cast object: %d\n",
1798                                   rc);
1799                         return;
1800                 }
1801
1802                 rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
1803         }
1804 }
1805
1806 #ifndef BNX2X_STOP_ON_ERROR
1807 #define LOAD_ERROR_EXIT(bp, label) \
1808         do { \
1809                 (bp)->state = BNX2X_STATE_ERROR; \
1810                 goto label; \
1811         } while (0)
1812 #else
1813 #define LOAD_ERROR_EXIT(bp, label) \
1814         do { \
1815                 (bp)->state = BNX2X_STATE_ERROR; \
1816                 (bp)->panic = 1; \
1817                 return -EBUSY; \
1818         } while (0)
1819 #endif
1820
1821 bool bnx2x_test_firmware_version(struct bnx2x *bp, bool is_err)
1822 {
1823         /* build FW version dword */
1824         u32 my_fw = (BCM_5710_FW_MAJOR_VERSION) +
1825                     (BCM_5710_FW_MINOR_VERSION << 8) +
1826                     (BCM_5710_FW_REVISION_VERSION << 16) +
1827                     (BCM_5710_FW_ENGINEERING_VERSION << 24);
1828
1829         /* read loaded FW from chip */
1830         u32 loaded_fw = REG_RD(bp, XSEM_REG_PRAM);
1831
1832         DP(NETIF_MSG_IFUP, "loaded fw %x, my fw %x\n", loaded_fw, my_fw);
1833
1834         if (loaded_fw != my_fw) {
1835                 if (is_err)
1836                         BNX2X_ERR("bnx2x with FW %x was already loaded, which mismatches my %x FW. aborting\n",
1837                                   loaded_fw, my_fw);
1838                 return false;
1839         }
1840
1841         return true;
1842 }
1843
1844 /**
1845  * bnx2x_bz_fp - zero content of the fastpath structure.
1846  *
1847  * @bp:         driver handle
1848  * @index:      fastpath index to be zeroed
1849  *
1850  * Makes sure the contents of the bp->fp[index].napi is kept
1851  * intact.
1852  */
1853 static void bnx2x_bz_fp(struct bnx2x *bp, int index)
1854 {
1855         struct bnx2x_fastpath *fp = &bp->fp[index];
1856         struct napi_struct orig_napi = fp->napi;
1857         /* bzero bnx2x_fastpath contents */
1858         if (bp->stats_init)
1859                 memset(fp, 0, sizeof(*fp));
1860         else {
1861                 /* Keep Queue statistics */
1862                 struct bnx2x_eth_q_stats *tmp_eth_q_stats;
1863                 struct bnx2x_eth_q_stats_old *tmp_eth_q_stats_old;
1864
1865                 tmp_eth_q_stats = kzalloc(sizeof(struct bnx2x_eth_q_stats),
1866                                           GFP_KERNEL);
1867                 if (tmp_eth_q_stats)
1868                         memcpy(tmp_eth_q_stats, &fp->eth_q_stats,
1869                                sizeof(struct bnx2x_eth_q_stats));
1870
1871                 tmp_eth_q_stats_old =
1872                         kzalloc(sizeof(struct bnx2x_eth_q_stats_old),
1873                                 GFP_KERNEL);
1874                 if (tmp_eth_q_stats_old)
1875                         memcpy(tmp_eth_q_stats_old, &fp->eth_q_stats_old,
1876                                sizeof(struct bnx2x_eth_q_stats_old));
1877
1878                 memset(fp, 0, sizeof(*fp));
1879
1880                 if (tmp_eth_q_stats) {
1881                         memcpy(&fp->eth_q_stats, tmp_eth_q_stats,
1882                                    sizeof(struct bnx2x_eth_q_stats));
1883                         kfree(tmp_eth_q_stats);
1884                 }
1885
1886                 if (tmp_eth_q_stats_old) {
1887                         memcpy(&fp->eth_q_stats_old, tmp_eth_q_stats_old,
1888                                sizeof(struct bnx2x_eth_q_stats_old));
1889                         kfree(tmp_eth_q_stats_old);
1890                 }
1891
1892         }
1893
1894         /* Restore the NAPI object as it has been already initialized */
1895         fp->napi = orig_napi;
1896
1897         fp->bp = bp;
1898         fp->index = index;
1899         if (IS_ETH_FP(fp))
1900                 fp->max_cos = bp->max_cos;
1901         else
1902                 /* Special queues support only one CoS */
1903                 fp->max_cos = 1;
1904
1905         /*
1906          * set the tpa flag for each queue. The tpa flag determines the queue
1907          * minimal size so it must be set prior to queue memory allocation
1908          */
1909         fp->disable_tpa = !(bp->flags & TPA_ENABLE_FLAG ||
1910                                   (bp->flags & GRO_ENABLE_FLAG &&
1911                                    bnx2x_mtu_allows_gro(bp->dev->mtu)));
1912         if (bp->flags & TPA_ENABLE_FLAG)
1913                 fp->mode = TPA_MODE_LRO;
1914         else if (bp->flags & GRO_ENABLE_FLAG)
1915                 fp->mode = TPA_MODE_GRO;
1916
1917 #ifdef BCM_CNIC
1918         /* We don't want TPA on an FCoE L2 ring */
1919         if (IS_FCOE_FP(fp))
1920                 fp->disable_tpa = 1;
1921 #endif
1922 }
1923
1924
1925 /* must be called with rtnl_lock */
1926 int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
1927 {
1928         int port = BP_PORT(bp);
1929         u32 load_code;
1930         int i, rc;
1931
1932 #ifdef BNX2X_STOP_ON_ERROR
1933         if (unlikely(bp->panic)) {
1934                 BNX2X_ERR("Can't load NIC when there is panic\n");
1935                 return -EPERM;
1936         }
1937 #endif
1938
1939         bp->state = BNX2X_STATE_OPENING_WAIT4_LOAD;
1940
1941         /* Set the initial link reported state to link down */
1942         bnx2x_acquire_phy_lock(bp);
1943         memset(&bp->last_reported_link, 0, sizeof(bp->last_reported_link));
1944         __set_bit(BNX2X_LINK_REPORT_LINK_DOWN,
1945                 &bp->last_reported_link.link_report_flags);
1946         bnx2x_release_phy_lock(bp);
1947
1948         /* must be called before memory allocation and HW init */
1949         bnx2x_ilt_set_info(bp);
1950
1951         /*
1952          * Zero fastpath structures preserving invariants like napi, which are
1953          * allocated only once, fp index, max_cos, bp pointer.
1954          * Also set fp->disable_tpa.
1955          */
1956         DP(NETIF_MSG_IFUP, "num queues: %d", bp->num_queues);
1957         for_each_queue(bp, i)
1958                 bnx2x_bz_fp(bp, i);
1959
1960
1961         /* Set the receive queues buffer size */
1962         bnx2x_set_rx_buf_size(bp);
1963
1964         if (bnx2x_alloc_mem(bp))
1965                 return -ENOMEM;
1966
1967         /* As long as bnx2x_alloc_mem() may possibly update
1968          * bp->num_queues, bnx2x_set_real_num_queues() should always
1969          * come after it.
1970          */
1971         rc = bnx2x_set_real_num_queues(bp);
1972         if (rc) {
1973                 BNX2X_ERR("Unable to set real_num_queues\n");
1974                 LOAD_ERROR_EXIT(bp, load_error0);
1975         }
1976
1977         /* configure multi cos mappings in kernel.
1978          * this configuration may be overriden by a multi class queue discipline
1979          * or by a dcbx negotiation result.
1980          */
1981         bnx2x_setup_tc(bp->dev, bp->max_cos);
1982
1983         bnx2x_napi_enable(bp);
1984
1985         /* set pf load just before approaching the MCP */
1986         bnx2x_set_pf_load(bp);
1987
1988         /* Send LOAD_REQUEST command to MCP
1989          * Returns the type of LOAD command:
1990          * if it is the first port to be initialized
1991          * common blocks should be initialized, otherwise - not
1992          */
1993         if (!BP_NOMCP(bp)) {
1994                 /* init fw_seq */
1995                 bp->fw_seq =
1996                         (SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_mb_header) &
1997                          DRV_MSG_SEQ_NUMBER_MASK);
1998                 BNX2X_DEV_INFO("fw_seq 0x%08x\n", bp->fw_seq);
1999
2000                 /* Get current FW pulse sequence */
2001                 bp->fw_drv_pulse_wr_seq =
2002                         (SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_pulse_mb) &
2003                          DRV_PULSE_SEQ_MASK);
2004                 BNX2X_DEV_INFO("drv_pulse 0x%x\n", bp->fw_drv_pulse_wr_seq);
2005
2006                 load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_REQ, 0);
2007                 if (!load_code) {
2008                         BNX2X_ERR("MCP response failure, aborting\n");
2009                         rc = -EBUSY;
2010                         LOAD_ERROR_EXIT(bp, load_error1);
2011                 }
2012                 if (load_code == FW_MSG_CODE_DRV_LOAD_REFUSED) {
2013                         BNX2X_ERR("Driver load refused\n");
2014                         rc = -EBUSY; /* other port in diagnostic mode */
2015                         LOAD_ERROR_EXIT(bp, load_error1);
2016                 }
2017                 if (load_code != FW_MSG_CODE_DRV_LOAD_COMMON_CHIP &&
2018                     load_code != FW_MSG_CODE_DRV_LOAD_COMMON) {
2019                         /* abort nic load if version mismatch */
2020                         if (!bnx2x_test_firmware_version(bp, true)) {
2021                                 rc = -EBUSY;
2022                                 LOAD_ERROR_EXIT(bp, load_error2);
2023                         }
2024                 }
2025
2026         } else {
2027                 int path = BP_PATH(bp);
2028
2029                 DP(NETIF_MSG_IFUP, "NO MCP - load counts[%d]      %d, %d, %d\n",
2030                    path, load_count[path][0], load_count[path][1],
2031                    load_count[path][2]);
2032                 load_count[path][0]++;
2033                 load_count[path][1 + port]++;
2034                 DP(NETIF_MSG_IFUP, "NO MCP - new load counts[%d]  %d, %d, %d\n",
2035                    path, load_count[path][0], load_count[path][1],
2036                    load_count[path][2]);
2037                 if (load_count[path][0] == 1)
2038                         load_code = FW_MSG_CODE_DRV_LOAD_COMMON;
2039                 else if (load_count[path][1 + port] == 1)
2040                         load_code = FW_MSG_CODE_DRV_LOAD_PORT;
2041                 else
2042                         load_code = FW_MSG_CODE_DRV_LOAD_FUNCTION;
2043         }
2044
2045         if ((load_code == FW_MSG_CODE_DRV_LOAD_COMMON) ||
2046             (load_code == FW_MSG_CODE_DRV_LOAD_COMMON_CHIP) ||
2047             (load_code == FW_MSG_CODE_DRV_LOAD_PORT)) {
2048                 bp->port.pmf = 1;
2049                 /*
2050                  * We need the barrier to ensure the ordering between the
2051                  * writing to bp->port.pmf here and reading it from the
2052                  * bnx2x_periodic_task().
2053                  */
2054                 smp_mb();
2055         } else
2056                 bp->port.pmf = 0;
2057
2058         DP(NETIF_MSG_IFUP, "pmf %d\n", bp->port.pmf);
2059
2060         /* Init Function state controlling object */
2061         bnx2x__init_func_obj(bp);
2062
2063         /* Initialize HW */
2064         rc = bnx2x_init_hw(bp, load_code);
2065         if (rc) {
2066                 BNX2X_ERR("HW init failed, aborting\n");
2067                 bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
2068                 LOAD_ERROR_EXIT(bp, load_error2);
2069         }
2070
2071         /* Connect to IRQs */
2072         rc = bnx2x_setup_irqs(bp);
2073         if (rc) {
2074                 BNX2X_ERR("IRQs setup failed\n");
2075                 bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
2076                 LOAD_ERROR_EXIT(bp, load_error2);
2077         }
2078
2079         /* Setup NIC internals and enable interrupts */
2080         bnx2x_nic_init(bp, load_code);
2081
2082         /* Init per-function objects */
2083         bnx2x_init_bp_objs(bp);
2084
2085         if (((load_code == FW_MSG_CODE_DRV_LOAD_COMMON) ||
2086             (load_code == FW_MSG_CODE_DRV_LOAD_COMMON_CHIP)) &&
2087             (bp->common.shmem2_base)) {
2088                 if (SHMEM2_HAS(bp, dcc_support))
2089                         SHMEM2_WR(bp, dcc_support,
2090                                   (SHMEM_DCC_SUPPORT_DISABLE_ENABLE_PF_TLV |
2091                                    SHMEM_DCC_SUPPORT_BANDWIDTH_ALLOCATION_TLV));
2092                 if (SHMEM2_HAS(bp, afex_driver_support))
2093                         SHMEM2_WR(bp, afex_driver_support,
2094                                   SHMEM_AFEX_SUPPORTED_VERSION_ONE);
2095         }
2096
2097         /* Set AFEX default VLAN tag to an invalid value */
2098         bp->afex_def_vlan_tag = -1;
2099
2100         bp->state = BNX2X_STATE_OPENING_WAIT4_PORT;
2101         rc = bnx2x_func_start(bp);
2102         if (rc) {
2103                 BNX2X_ERR("Function start failed!\n");
2104                 bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
2105                 LOAD_ERROR_EXIT(bp, load_error3);
2106         }
2107
2108         /* Send LOAD_DONE command to MCP */
2109         if (!BP_NOMCP(bp)) {
2110                 load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
2111                 if (!load_code) {
2112                         BNX2X_ERR("MCP response failure, aborting\n");
2113                         rc = -EBUSY;
2114                         LOAD_ERROR_EXIT(bp, load_error3);
2115                 }
2116         }
2117
2118         rc = bnx2x_setup_leading(bp);
2119         if (rc) {
2120                 BNX2X_ERR("Setup leading failed!\n");
2121                 LOAD_ERROR_EXIT(bp, load_error3);
2122         }
2123
2124 #ifdef BCM_CNIC
2125         /* Enable Timer scan */
2126         REG_WR(bp, TM_REG_EN_LINEAR0_TIMER + port*4, 1);
2127 #endif
2128
2129         for_each_nondefault_queue(bp, i) {
2130                 rc = bnx2x_setup_queue(bp, &bp->fp[i], 0);
2131                 if (rc) {
2132                         BNX2X_ERR("Queue setup failed\n");
2133                         LOAD_ERROR_EXIT(bp, load_error4);
2134                 }
2135         }
2136
2137         rc = bnx2x_init_rss_pf(bp);
2138         if (rc) {
2139                 BNX2X_ERR("PF RSS init failed\n");
2140                 LOAD_ERROR_EXIT(bp, load_error4);
2141         }
2142
2143         /* Now when Clients are configured we are ready to work */
2144         bp->state = BNX2X_STATE_OPEN;
2145
2146         /* Configure a ucast MAC */
2147         rc = bnx2x_set_eth_mac(bp, true);
2148         if (rc) {
2149                 BNX2X_ERR("Setting Ethernet MAC failed\n");
2150                 LOAD_ERROR_EXIT(bp, load_error4);
2151         }
2152
2153         if (bp->pending_max) {
2154                 bnx2x_update_max_mf_config(bp, bp->pending_max);
2155                 bp->pending_max = 0;
2156         }
2157
2158         if (bp->port.pmf)
2159                 bnx2x_initial_phy_init(bp, load_mode);
2160
2161         /* Start fast path */
2162
2163         /* Initialize Rx filter. */
2164         netif_addr_lock_bh(bp->dev);
2165         bnx2x_set_rx_mode(bp->dev);
2166         netif_addr_unlock_bh(bp->dev);
2167
2168         /* Start the Tx */
2169         switch (load_mode) {
2170         case LOAD_NORMAL:
2171                 /* Tx queue should be only reenabled */
2172                 netif_tx_wake_all_queues(bp->dev);
2173                 break;
2174
2175         case LOAD_OPEN:
2176                 netif_tx_start_all_queues(bp->dev);
2177                 smp_mb__after_clear_bit();
2178                 break;
2179
2180         case LOAD_DIAG:
2181         case LOAD_LOOPBACK_EXT:
2182                 bp->state = BNX2X_STATE_DIAG;
2183                 break;
2184
2185         default:
2186                 break;
2187         }
2188
2189         if (bp->port.pmf)
2190                 bnx2x_update_drv_flags(bp, 1 << DRV_FLAGS_DCB_CONFIGURED, 0);
2191         else
2192                 bnx2x__link_status_update(bp);
2193
2194         /* start the timer */
2195         mod_timer(&bp->timer, jiffies + bp->current_interval);
2196
2197 #ifdef BCM_CNIC
2198         /* re-read iscsi info */
2199         bnx2x_get_iscsi_info(bp);
2200         bnx2x_setup_cnic_irq_info(bp);
2201         if (bp->state == BNX2X_STATE_OPEN)
2202                 bnx2x_cnic_notify(bp, CNIC_CTL_START_CMD);
2203 #endif
2204
2205         /* mark driver is loaded in shmem2 */
2206         if (SHMEM2_HAS(bp, drv_capabilities_flag)) {
2207                 u32 val;
2208                 val = SHMEM2_RD(bp, drv_capabilities_flag[BP_FW_MB_IDX(bp)]);
2209                 SHMEM2_WR(bp, drv_capabilities_flag[BP_FW_MB_IDX(bp)],
2210                           val | DRV_FLAGS_CAPABILITIES_LOADED_SUPPORTED |
2211                           DRV_FLAGS_CAPABILITIES_LOADED_L2);
2212         }
2213
2214         /* Wait for all pending SP commands to complete */
2215         if (!bnx2x_wait_sp_comp(bp, ~0x0UL)) {
2216                 BNX2X_ERR("Timeout waiting for SP elements to complete\n");
2217                 bnx2x_nic_unload(bp, UNLOAD_CLOSE);
2218                 return -EBUSY;
2219         }
2220
2221         if (bp->state != BNX2X_STATE_DIAG)
2222                 bnx2x_dcbx_init(bp);
2223         return 0;
2224
2225 #ifndef BNX2X_STOP_ON_ERROR
2226 load_error4:
2227 #ifdef BCM_CNIC
2228         /* Disable Timer scan */
2229         REG_WR(bp, TM_REG_EN_LINEAR0_TIMER + port*4, 0);
2230 #endif
2231 load_error3:
2232         bnx2x_int_disable_sync(bp, 1);
2233
2234         /* Clean queueable objects */
2235         bnx2x_squeeze_objects(bp);
2236
2237         /* Free SKBs, SGEs, TPA pool and driver internals */
2238         bnx2x_free_skbs(bp);
2239         for_each_rx_queue(bp, i)
2240                 bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE);
2241
2242         /* Release IRQs */
2243         bnx2x_free_irq(bp);
2244 load_error2:
2245         if (!BP_NOMCP(bp)) {
2246                 bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP, 0);
2247                 bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE, 0);
2248         }
2249
2250         bp->port.pmf = 0;
2251 load_error1:
2252         bnx2x_napi_disable(bp);
2253         /* clear pf_load status, as it was already set */
2254         bnx2x_clear_pf_load(bp);
2255 load_error0:
2256         bnx2x_free_mem(bp);
2257
2258         return rc;
2259 #endif /* ! BNX2X_STOP_ON_ERROR */
2260 }
2261
2262 /* must be called with rtnl_lock */
2263 int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode)
2264 {
2265         int i;
2266         bool global = false;
2267
2268         /* mark driver is unloaded in shmem2 */
2269         if (SHMEM2_HAS(bp, drv_capabilities_flag)) {
2270                 u32 val;
2271                 val = SHMEM2_RD(bp, drv_capabilities_flag[BP_FW_MB_IDX(bp)]);
2272                 SHMEM2_WR(bp, drv_capabilities_flag[BP_FW_MB_IDX(bp)],
2273                           val & ~DRV_FLAGS_CAPABILITIES_LOADED_L2);
2274         }
2275
2276         if ((bp->state == BNX2X_STATE_CLOSED) ||
2277             (bp->state == BNX2X_STATE_ERROR)) {
2278                 /* We can get here if the driver has been unloaded
2279                  * during parity error recovery and is either waiting for a
2280                  * leader to complete or for other functions to unload and
2281                  * then ifdown has been issued. In this case we want to
2282                  * unload and let other functions to complete a recovery
2283                  * process.
2284                  */
2285                 bp->recovery_state = BNX2X_RECOVERY_DONE;
2286                 bp->is_leader = 0;
2287                 bnx2x_release_leader_lock(bp);
2288                 smp_mb();
2289
2290                 DP(NETIF_MSG_IFDOWN, "Releasing a leadership...\n");
2291                 BNX2X_ERR("Can't unload in closed or error state\n");
2292                 return -EINVAL;
2293         }
2294
2295         /*
2296          * It's important to set the bp->state to the value different from
2297          * BNX2X_STATE_OPEN and only then stop the Tx. Otherwise bnx2x_tx_int()
2298          * may restart the Tx from the NAPI context (see bnx2x_tx_int()).
2299          */
2300         bp->state = BNX2X_STATE_CLOSING_WAIT4_HALT;
2301         smp_mb();
2302
2303         /* Stop Tx */
2304         bnx2x_tx_disable(bp);
2305
2306 #ifdef BCM_CNIC
2307         bnx2x_cnic_notify(bp, CNIC_CTL_STOP_CMD);
2308 #endif
2309
2310         bp->rx_mode = BNX2X_RX_MODE_NONE;
2311
2312         del_timer_sync(&bp->timer);
2313
2314         /* Set ALWAYS_ALIVE bit in shmem */
2315         bp->fw_drv_pulse_wr_seq |= DRV_PULSE_ALWAYS_ALIVE;
2316
2317         bnx2x_drv_pulse(bp);
2318
2319         bnx2x_stats_handle(bp, STATS_EVENT_STOP);
2320         bnx2x_save_statistics(bp);
2321
2322         /* Cleanup the chip if needed */
2323         if (unload_mode != UNLOAD_RECOVERY)
2324                 bnx2x_chip_cleanup(bp, unload_mode);
2325         else {
2326                 /* Send the UNLOAD_REQUEST to the MCP */
2327                 bnx2x_send_unload_req(bp, unload_mode);
2328
2329                 /*
2330                  * Prevent transactions to host from the functions on the
2331                  * engine that doesn't reset global blocks in case of global
2332                  * attention once gloabl blocks are reset and gates are opened
2333                  * (the engine which leader will perform the recovery
2334                  * last).
2335                  */
2336                 if (!CHIP_IS_E1x(bp))
2337                         bnx2x_pf_disable(bp);
2338
2339                 /* Disable HW interrupts, NAPI */
2340                 bnx2x_netif_stop(bp, 1);
2341
2342                 /* Release IRQs */
2343                 bnx2x_free_irq(bp);
2344
2345                 /* Report UNLOAD_DONE to MCP */
2346                 bnx2x_send_unload_done(bp);
2347         }
2348
2349         /*
2350          * At this stage no more interrupts will arrive so we may safly clean
2351          * the queueable objects here in case they failed to get cleaned so far.
2352          */
2353         bnx2x_squeeze_objects(bp);
2354
2355         /* There should be no more pending SP commands at this stage */
2356         bp->sp_state = 0;
2357
2358         bp->port.pmf = 0;
2359
2360         /* Free SKBs, SGEs, TPA pool and driver internals */
2361         bnx2x_free_skbs(bp);
2362         for_each_rx_queue(bp, i)
2363                 bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE);
2364
2365         bnx2x_free_mem(bp);
2366
2367         bp->state = BNX2X_STATE_CLOSED;
2368
2369         /* Check if there are pending parity attentions. If there are - set
2370          * RECOVERY_IN_PROGRESS.
2371          */
2372         if (bnx2x_chk_parity_attn(bp, &global, false)) {
2373                 bnx2x_set_reset_in_progress(bp);
2374
2375                 /* Set RESET_IS_GLOBAL if needed */
2376                 if (global)
2377                         bnx2x_set_reset_global(bp);
2378         }
2379
2380
2381         /* The last driver must disable a "close the gate" if there is no
2382          * parity attention or "process kill" pending.
2383          */
2384         if (!bnx2x_clear_pf_load(bp) && bnx2x_reset_is_done(bp, BP_PATH(bp)))
2385                 bnx2x_disable_close_the_gate(bp);
2386
2387         return 0;
2388 }
2389
2390 int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state)
2391 {
2392         u16 pmcsr;
2393
2394         /* If there is no power capability, silently succeed */
2395         if (!bp->pm_cap) {
2396                 BNX2X_DEV_INFO("No power capability. Breaking.\n");
2397                 return 0;
2398         }
2399
2400         pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, &pmcsr);
2401
2402         switch (state) {
2403         case PCI_D0:
2404                 pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL,
2405                                       ((pmcsr & ~PCI_PM_CTRL_STATE_MASK) |
2406                                        PCI_PM_CTRL_PME_STATUS));
2407
2408                 if (pmcsr & PCI_PM_CTRL_STATE_MASK)
2409                         /* delay required during transition out of D3hot */
2410                         msleep(20);
2411                 break;
2412
2413         case PCI_D3hot:
2414                 /* If there are other clients above don't
2415                    shut down the power */
2416                 if (atomic_read(&bp->pdev->enable_cnt) != 1)
2417                         return 0;
2418                 /* Don't shut down the power for emulation and FPGA */
2419                 if (CHIP_REV_IS_SLOW(bp))
2420                         return 0;
2421
2422                 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
2423                 pmcsr |= 3;
2424
2425                 if (bp->wol)
2426                         pmcsr |= PCI_PM_CTRL_PME_ENABLE;
2427
2428                 pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL,
2429                                       pmcsr);
2430
2431                 /* No more memory access after this point until
2432                 * device is brought back to D0.
2433                 */
2434                 break;
2435
2436         default:
2437                 dev_err(&bp->pdev->dev, "Can't support state = %d\n", state);
2438                 return -EINVAL;
2439         }
2440         return 0;
2441 }
2442
2443 /*
2444  * net_device service functions
2445  */
2446 int bnx2x_poll(struct napi_struct *napi, int budget)
2447 {
2448         int work_done = 0;
2449         u8 cos;
2450         struct bnx2x_fastpath *fp = container_of(napi, struct bnx2x_fastpath,
2451                                                  napi);
2452         struct bnx2x *bp = fp->bp;
2453
2454         while (1) {
2455 #ifdef BNX2X_STOP_ON_ERROR
2456                 if (unlikely(bp->panic)) {
2457                         napi_complete(napi);
2458                         return 0;
2459                 }
2460 #endif
2461
2462                 for_each_cos_in_tx_queue(fp, cos)
2463                         if (bnx2x_tx_queue_has_work(&fp->txdata[cos]))
2464                                 bnx2x_tx_int(bp, &fp->txdata[cos]);
2465
2466
2467                 if (bnx2x_has_rx_work(fp)) {
2468                         work_done += bnx2x_rx_int(fp, budget - work_done);
2469
2470                         /* must not complete if we consumed full budget */
2471                         if (work_done >= budget)
2472                                 break;
2473                 }
2474
2475                 /* Fall out from the NAPI loop if needed */
2476                 if (!(bnx2x_has_rx_work(fp) || bnx2x_has_tx_work(fp))) {
2477 #ifdef BCM_CNIC
2478                         /* No need to update SB for FCoE L2 ring as long as
2479                          * it's connected to the default SB and the SB
2480                          * has been updated when NAPI was scheduled.
2481                          */
2482                         if (IS_FCOE_FP(fp)) {
2483                                 napi_complete(napi);
2484                                 break;
2485                         }
2486 #endif
2487
2488                         bnx2x_update_fpsb_idx(fp);
2489                         /* bnx2x_has_rx_work() reads the status block,
2490                          * thus we need to ensure that status block indices
2491                          * have been actually read (bnx2x_update_fpsb_idx)
2492                          * prior to this check (bnx2x_has_rx_work) so that
2493                          * we won't write the "newer" value of the status block
2494                          * to IGU (if there was a DMA right after
2495                          * bnx2x_has_rx_work and if there is no rmb, the memory
2496                          * reading (bnx2x_update_fpsb_idx) may be postponed
2497                          * to right before bnx2x_ack_sb). In this case there
2498                          * will never be another interrupt until there is
2499                          * another update of the status block, while there
2500                          * is still unhandled work.
2501                          */
2502                         rmb();
2503
2504                         if (!(bnx2x_has_rx_work(fp) || bnx2x_has_tx_work(fp))) {
2505                                 napi_complete(napi);
2506                                 /* Re-enable interrupts */
2507                                 DP(NETIF_MSG_RX_STATUS,
2508                                    "Update index to %d\n", fp->fp_hc_idx);
2509                                 bnx2x_ack_sb(bp, fp->igu_sb_id, USTORM_ID,
2510                                              le16_to_cpu(fp->fp_hc_idx),
2511                                              IGU_INT_ENABLE, 1);
2512                                 break;
2513                         }
2514                 }
2515         }
2516
2517         return work_done;
2518 }
2519
2520 /* we split the first BD into headers and data BDs
2521  * to ease the pain of our fellow microcode engineers
2522  * we use one mapping for both BDs
2523  */
2524 static noinline u16 bnx2x_tx_split(struct bnx2x *bp,
2525                                    struct bnx2x_fp_txdata *txdata,
2526                                    struct sw_tx_bd *tx_buf,
2527                                    struct eth_tx_start_bd **tx_bd, u16 hlen,
2528                                    u16 bd_prod, int nbd)
2529 {
2530         struct eth_tx_start_bd *h_tx_bd = *tx_bd;
2531         struct eth_tx_bd *d_tx_bd;
2532         dma_addr_t mapping;
2533         int old_len = le16_to_cpu(h_tx_bd->nbytes);
2534
2535         /* first fix first BD */
2536         h_tx_bd->nbd = cpu_to_le16(nbd);
2537         h_tx_bd->nbytes = cpu_to_le16(hlen);
2538
2539         DP(NETIF_MSG_TX_QUEUED, "TSO split header size is %d (%x:%x) nbd %d\n",
2540            h_tx_bd->nbytes, h_tx_bd->addr_hi, h_tx_bd->addr_lo, h_tx_bd->nbd);
2541
2542         /* now get a new data BD
2543          * (after the pbd) and fill it */
2544         bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
2545         d_tx_bd = &txdata->tx_desc_ring[bd_prod].reg_bd;
2546
2547         mapping = HILO_U64(le32_to_cpu(h_tx_bd->addr_hi),
2548                            le32_to_cpu(h_tx_bd->addr_lo)) + hlen;
2549
2550         d_tx_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
2551         d_tx_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
2552         d_tx_bd->nbytes = cpu_to_le16(old_len - hlen);
2553
2554         /* this marks the BD as one that has no individual mapping */
2555         tx_buf->flags |= BNX2X_TSO_SPLIT_BD;
2556
2557         DP(NETIF_MSG_TX_QUEUED,
2558            "TSO split data size is %d (%x:%x)\n",
2559            d_tx_bd->nbytes, d_tx_bd->addr_hi, d_tx_bd->addr_lo);
2560
2561         /* update tx_bd */
2562         *tx_bd = (struct eth_tx_start_bd *)d_tx_bd;
2563
2564         return bd_prod;
2565 }
2566
2567 static inline u16 bnx2x_csum_fix(unsigned char *t_header, u16 csum, s8 fix)
2568 {
2569         if (fix > 0)
2570                 csum = (u16) ~csum_fold(csum_sub(csum,
2571                                 csum_partial(t_header - fix, fix, 0)));
2572
2573         else if (fix < 0)
2574                 csum = (u16) ~csum_fold(csum_add(csum,
2575                                 csum_partial(t_header, -fix, 0)));
2576
2577         return swab16(csum);
2578 }
2579
2580 static inline u32 bnx2x_xmit_type(struct bnx2x *bp, struct sk_buff *skb)
2581 {
2582         u32 rc;
2583
2584         if (skb->ip_summed != CHECKSUM_PARTIAL)
2585                 rc = XMIT_PLAIN;
2586
2587         else {
2588                 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6)) {
2589                         rc = XMIT_CSUM_V6;
2590                         if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2591                                 rc |= XMIT_CSUM_TCP;
2592
2593                 } else {
2594                         rc = XMIT_CSUM_V4;
2595                         if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2596                                 rc |= XMIT_CSUM_TCP;
2597                 }
2598         }
2599
2600         if (skb_is_gso_v6(skb))
2601                 rc |= XMIT_GSO_V6 | XMIT_CSUM_TCP | XMIT_CSUM_V6;
2602         else if (skb_is_gso(skb))
2603                 rc |= XMIT_GSO_V4 | XMIT_CSUM_V4 | XMIT_CSUM_TCP;
2604
2605         return rc;
2606 }
2607
2608 #if (MAX_SKB_FRAGS >= MAX_FETCH_BD - 3)
2609 /* check if packet requires linearization (packet is too fragmented)
2610    no need to check fragmentation if page size > 8K (there will be no
2611    violation to FW restrictions) */
2612 static int bnx2x_pkt_req_lin(struct bnx2x *bp, struct sk_buff *skb,
2613                              u32 xmit_type)
2614 {
2615         int to_copy = 0;
2616         int hlen = 0;
2617         int first_bd_sz = 0;
2618
2619         /* 3 = 1 (for linear data BD) + 2 (for PBD and last BD) */
2620         if (skb_shinfo(skb)->nr_frags >= (MAX_FETCH_BD - 3)) {
2621
2622                 if (xmit_type & XMIT_GSO) {
2623                         unsigned short lso_mss = skb_shinfo(skb)->gso_size;
2624                         /* Check if LSO packet needs to be copied:
2625                            3 = 1 (for headers BD) + 2 (for PBD and last BD) */
2626                         int wnd_size = MAX_FETCH_BD - 3;
2627                         /* Number of windows to check */
2628                         int num_wnds = skb_shinfo(skb)->nr_frags - wnd_size;
2629                         int wnd_idx = 0;
2630                         int frag_idx = 0;
2631                         u32 wnd_sum = 0;
2632
2633                         /* Headers length */
2634                         hlen = (int)(skb_transport_header(skb) - skb->data) +
2635                                 tcp_hdrlen(skb);
2636
2637                         /* Amount of data (w/o headers) on linear part of SKB*/
2638                         first_bd_sz = skb_headlen(skb) - hlen;
2639
2640                         wnd_sum  = first_bd_sz;
2641
2642                         /* Calculate the first sum - it's special */
2643                         for (frag_idx = 0; frag_idx < wnd_size - 1; frag_idx++)
2644                                 wnd_sum +=
2645                                         skb_frag_size(&skb_shinfo(skb)->frags[frag_idx]);
2646
2647                         /* If there was data on linear skb data - check it */
2648                         if (first_bd_sz > 0) {
2649                                 if (unlikely(wnd_sum < lso_mss)) {
2650                                         to_copy = 1;
2651                                         goto exit_lbl;
2652                                 }
2653
2654                                 wnd_sum -= first_bd_sz;
2655                         }
2656
2657                         /* Others are easier: run through the frag list and
2658                            check all windows */
2659                         for (wnd_idx = 0; wnd_idx <= num_wnds; wnd_idx++) {
2660                                 wnd_sum +=
2661                           skb_frag_size(&skb_shinfo(skb)->frags[wnd_idx + wnd_size - 1]);
2662
2663                                 if (unlikely(wnd_sum < lso_mss)) {
2664                                         to_copy = 1;
2665                                         break;
2666                                 }
2667                                 wnd_sum -=
2668                                         skb_frag_size(&skb_shinfo(skb)->frags[wnd_idx]);
2669                         }
2670                 } else {
2671                         /* in non-LSO too fragmented packet should always
2672                            be linearized */
2673                         to_copy = 1;
2674                 }
2675         }
2676
2677 exit_lbl:
2678         if (unlikely(to_copy))
2679                 DP(NETIF_MSG_TX_QUEUED,
2680                    "Linearization IS REQUIRED for %s packet. num_frags %d  hlen %d  first_bd_sz %d\n",
2681                    (xmit_type & XMIT_GSO) ? "LSO" : "non-LSO",
2682                    skb_shinfo(skb)->nr_frags, hlen, first_bd_sz);
2683
2684         return to_copy;
2685 }
2686 #endif
2687
2688 static inline void bnx2x_set_pbd_gso_e2(struct sk_buff *skb, u32 *parsing_data,
2689                                         u32 xmit_type)
2690 {
2691         *parsing_data |= (skb_shinfo(skb)->gso_size <<
2692                               ETH_TX_PARSE_BD_E2_LSO_MSS_SHIFT) &
2693                               ETH_TX_PARSE_BD_E2_LSO_MSS;
2694         if ((xmit_type & XMIT_GSO_V6) &&
2695             (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
2696                 *parsing_data |= ETH_TX_PARSE_BD_E2_IPV6_WITH_EXT_HDR;
2697 }
2698
2699 /**
2700  * bnx2x_set_pbd_gso - update PBD in GSO case.
2701  *
2702  * @skb:        packet skb
2703  * @pbd:        parse BD
2704  * @xmit_type:  xmit flags
2705  */
2706 static inline void bnx2x_set_pbd_gso(struct sk_buff *skb,
2707                                      struct eth_tx_parse_bd_e1x *pbd,
2708                                      u32 xmit_type)
2709 {
2710         pbd->lso_mss = cpu_to_le16(skb_shinfo(skb)->gso_size);
2711         pbd->tcp_send_seq = swab32(tcp_hdr(skb)->seq);
2712         pbd->tcp_flags = pbd_tcp_flags(skb);
2713
2714         if (xmit_type & XMIT_GSO_V4) {
2715                 pbd->ip_id = swab16(ip_hdr(skb)->id);
2716                 pbd->tcp_pseudo_csum =
2717                         swab16(~csum_tcpudp_magic(ip_hdr(skb)->saddr,
2718                                                   ip_hdr(skb)->daddr,
2719                                                   0, IPPROTO_TCP, 0));
2720
2721         } else
2722                 pbd->tcp_pseudo_csum =
2723                         swab16(~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2724                                                 &ipv6_hdr(skb)->daddr,
2725                                                 0, IPPROTO_TCP, 0));
2726
2727         pbd->global_data |= ETH_TX_PARSE_BD_E1X_PSEUDO_CS_WITHOUT_LEN;
2728 }
2729
2730 /**
2731  * bnx2x_set_pbd_csum_e2 - update PBD with checksum and return header length
2732  *
2733  * @bp:                 driver handle
2734  * @skb:                packet skb
2735  * @parsing_data:       data to be updated
2736  * @xmit_type:          xmit flags
2737  *
2738  * 57712 related
2739  */
2740 static inline  u8 bnx2x_set_pbd_csum_e2(struct bnx2x *bp, struct sk_buff *skb,
2741         u32 *parsing_data, u32 xmit_type)
2742 {
2743         *parsing_data |=
2744                         ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) <<
2745                         ETH_TX_PARSE_BD_E2_TCP_HDR_START_OFFSET_W_SHIFT) &
2746                         ETH_TX_PARSE_BD_E2_TCP_HDR_START_OFFSET_W;
2747
2748         if (xmit_type & XMIT_CSUM_TCP) {
2749                 *parsing_data |= ((tcp_hdrlen(skb) / 4) <<
2750                         ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW_SHIFT) &
2751                         ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW;
2752
2753                 return skb_transport_header(skb) + tcp_hdrlen(skb) - skb->data;
2754         } else
2755                 /* We support checksum offload for TCP and UDP only.
2756                  * No need to pass the UDP header length - it's a constant.
2757                  */
2758                 return skb_transport_header(skb) +
2759                                 sizeof(struct udphdr) - skb->data;
2760 }
2761
2762 static inline void bnx2x_set_sbd_csum(struct bnx2x *bp, struct sk_buff *skb,
2763         struct eth_tx_start_bd *tx_start_bd, u32 xmit_type)
2764 {
2765         tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_L4_CSUM;
2766
2767         if (xmit_type & XMIT_CSUM_V4)
2768                 tx_start_bd->bd_flags.as_bitfield |=
2769                                         ETH_TX_BD_FLAGS_IP_CSUM;
2770         else
2771                 tx_start_bd->bd_flags.as_bitfield |=
2772                                         ETH_TX_BD_FLAGS_IPV6;
2773
2774         if (!(xmit_type & XMIT_CSUM_TCP))
2775                 tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_IS_UDP;
2776 }
2777
2778 /**
2779  * bnx2x_set_pbd_csum - update PBD with checksum and return header length
2780  *
2781  * @bp:         driver handle
2782  * @skb:        packet skb
2783  * @pbd:        parse BD to be updated
2784  * @xmit_type:  xmit flags
2785  */
2786 static inline u8 bnx2x_set_pbd_csum(struct bnx2x *bp, struct sk_buff *skb,
2787         struct eth_tx_parse_bd_e1x *pbd,
2788         u32 xmit_type)
2789 {
2790         u8 hlen = (skb_network_header(skb) - skb->data) >> 1;
2791
2792         /* for now NS flag is not used in Linux */
2793         pbd->global_data =
2794                 (hlen | ((skb->protocol == cpu_to_be16(ETH_P_8021Q)) <<
2795                          ETH_TX_PARSE_BD_E1X_LLC_SNAP_EN_SHIFT));
2796
2797         pbd->ip_hlen_w = (skb_transport_header(skb) -
2798                         skb_network_header(skb)) >> 1;
2799
2800         hlen += pbd->ip_hlen_w;
2801
2802         /* We support checksum offload for TCP and UDP only */
2803         if (xmit_type & XMIT_CSUM_TCP)
2804                 hlen += tcp_hdrlen(skb) / 2;
2805         else
2806                 hlen += sizeof(struct udphdr) / 2;
2807
2808         pbd->total_hlen_w = cpu_to_le16(hlen);
2809         hlen = hlen*2;
2810
2811         if (xmit_type & XMIT_CSUM_TCP) {
2812                 pbd->tcp_pseudo_csum = swab16(tcp_hdr(skb)->check);
2813
2814         } else {
2815                 s8 fix = SKB_CS_OFF(skb); /* signed! */
2816
2817                 DP(NETIF_MSG_TX_QUEUED,
2818                    "hlen %d  fix %d  csum before fix %x\n",
2819                    le16_to_cpu(pbd->total_hlen_w), fix, SKB_CS(skb));
2820
2821                 /* HW bug: fixup the CSUM */
2822                 pbd->tcp_pseudo_csum =
2823                         bnx2x_csum_fix(skb_transport_header(skb),
2824                                        SKB_CS(skb), fix);
2825
2826                 DP(NETIF_MSG_TX_QUEUED, "csum after fix %x\n",
2827                    pbd->tcp_pseudo_csum);
2828         }
2829
2830         return hlen;
2831 }
2832
2833 /* called with netif_tx_lock
2834  * bnx2x_tx_int() runs without netif_tx_lock unless it needs to call
2835  * netif_wake_queue()
2836  */
2837 netdev_tx_t bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev)
2838 {
2839         struct bnx2x *bp = netdev_priv(dev);
2840
2841         struct bnx2x_fastpath *fp;
2842         struct netdev_queue *txq;
2843         struct bnx2x_fp_txdata *txdata;
2844         struct sw_tx_bd *tx_buf;
2845         struct eth_tx_start_bd *tx_start_bd, *first_bd;
2846         struct eth_tx_bd *tx_data_bd, *total_pkt_bd = NULL;
2847         struct eth_tx_parse_bd_e1x *pbd_e1x = NULL;
2848         struct eth_tx_parse_bd_e2 *pbd_e2 = NULL;
2849         u32 pbd_e2_parsing_data = 0;
2850         u16 pkt_prod, bd_prod;
2851         int nbd, txq_index, fp_index, txdata_index;
2852         dma_addr_t mapping;
2853         u32 xmit_type = bnx2x_xmit_type(bp, skb);
2854         int i;
2855         u8 hlen = 0;
2856         __le16 pkt_size = 0;
2857         struct ethhdr *eth;
2858         u8 mac_type = UNICAST_ADDRESS;
2859
2860 #ifdef BNX2X_STOP_ON_ERROR
2861         if (unlikely(bp->panic))
2862                 return NETDEV_TX_BUSY;
2863 #endif
2864
2865         txq_index = skb_get_queue_mapping(skb);
2866         txq = netdev_get_tx_queue(dev, txq_index);
2867
2868         BUG_ON(txq_index >= MAX_ETH_TXQ_IDX(bp) + FCOE_PRESENT);
2869
2870         /* decode the fastpath index and the cos index from the txq */
2871         fp_index = TXQ_TO_FP(txq_index);
2872         txdata_index = TXQ_TO_COS(txq_index);
2873
2874 #ifdef BCM_CNIC
2875         /*
2876          * Override the above for the FCoE queue:
2877          *   - FCoE fp entry is right after the ETH entries.
2878          *   - FCoE L2 queue uses bp->txdata[0] only.
2879          */
2880         if (unlikely(!NO_FCOE(bp) && (txq_index ==
2881                                       bnx2x_fcoe_tx(bp, txq_index)))) {
2882                 fp_index = FCOE_IDX;
2883                 txdata_index = 0;
2884         }
2885 #endif
2886
2887         /* enable this debug print to view the transmission queue being used
2888         DP(NETIF_MSG_TX_QUEUED, "indices: txq %d, fp %d, txdata %d\n",
2889            txq_index, fp_index, txdata_index); */
2890
2891         /* locate the fastpath and the txdata */
2892         fp = &bp->fp[fp_index];
2893         txdata = &fp->txdata[txdata_index];
2894
2895         /* enable this debug print to view the tranmission details
2896         DP(NETIF_MSG_TX_QUEUED,
2897            "transmitting packet cid %d fp index %d txdata_index %d tx_data ptr %p fp pointer %p\n",
2898            txdata->cid, fp_index, txdata_index, txdata, fp); */
2899
2900         if (unlikely(bnx2x_tx_avail(bp, txdata) <
2901                      (skb_shinfo(skb)->nr_frags + 3))) {
2902                 fp->eth_q_stats.driver_xoff++;
2903                 netif_tx_stop_queue(txq);
2904                 BNX2X_ERR("BUG! Tx ring full when queue awake!\n");
2905                 return NETDEV_TX_BUSY;
2906         }
2907
2908         DP(NETIF_MSG_TX_QUEUED,
2909            "queue[%d]: SKB: summed %x  protocol %x protocol(%x,%x) gso type %x  xmit_type %x\n",
2910            txq_index, skb->ip_summed, skb->protocol, ipv6_hdr(skb)->nexthdr,
2911            ip_hdr(skb)->protocol, skb_shinfo(skb)->gso_type, xmit_type);
2912
2913         eth = (struct ethhdr *)skb->data;
2914
2915         /* set flag according to packet type (UNICAST_ADDRESS is default)*/
2916         if (unlikely(is_multicast_ether_addr(eth->h_dest))) {
2917                 if (is_broadcast_ether_addr(eth->h_dest))
2918                         mac_type = BROADCAST_ADDRESS;
2919                 else
2920                         mac_type = MULTICAST_ADDRESS;
2921         }
2922
2923 #if (MAX_SKB_FRAGS >= MAX_FETCH_BD - 3)
2924         /* First, check if we need to linearize the skb (due to FW
2925            restrictions). No need to check fragmentation if page size > 8K
2926            (there will be no violation to FW restrictions) */
2927         if (bnx2x_pkt_req_lin(bp, skb, xmit_type)) {
2928                 /* Statistics of linearization */
2929                 bp->lin_cnt++;
2930                 if (skb_linearize(skb) != 0) {
2931                         DP(NETIF_MSG_TX_QUEUED,
2932                            "SKB linearization failed - silently dropping this SKB\n");
2933                         dev_kfree_skb_any(skb);
2934                         return NETDEV_TX_OK;
2935                 }
2936         }
2937 #endif
2938         /* Map skb linear data for DMA */
2939         mapping = dma_map_single(&bp->pdev->dev, skb->data,
2940                                  skb_headlen(skb), DMA_TO_DEVICE);
2941         if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) {
2942                 DP(NETIF_MSG_TX_QUEUED,
2943                    "SKB mapping failed - silently dropping this SKB\n");
2944                 dev_kfree_skb_any(skb);
2945                 return NETDEV_TX_OK;
2946         }
2947         /*
2948         Please read carefully. First we use one BD which we mark as start,
2949         then we have a parsing info BD (used for TSO or xsum),
2950         and only then we have the rest of the TSO BDs.
2951         (don't forget to mark the last one as last,
2952         and to unmap only AFTER you write to the BD ...)
2953         And above all, all pdb sizes are in words - NOT DWORDS!
2954         */
2955
2956         /* get current pkt produced now - advance it just before sending packet
2957          * since mapping of pages may fail and cause packet to be dropped
2958          */
2959         pkt_prod = txdata->tx_pkt_prod;
2960         bd_prod = TX_BD(txdata->tx_bd_prod);
2961
2962         /* get a tx_buf and first BD
2963          * tx_start_bd may be changed during SPLIT,
2964          * but first_bd will always stay first
2965          */
2966         tx_buf = &txdata->tx_buf_ring[TX_BD(pkt_prod)];
2967         tx_start_bd = &txdata->tx_desc_ring[bd_prod].start_bd;
2968         first_bd = tx_start_bd;
2969
2970         tx_start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
2971         SET_FLAG(tx_start_bd->general_data, ETH_TX_START_BD_ETH_ADDR_TYPE,
2972                  mac_type);
2973
2974         /* header nbd */
2975         SET_FLAG(tx_start_bd->general_data, ETH_TX_START_BD_HDR_NBDS, 1);
2976
2977         /* remember the first BD of the packet */
2978         tx_buf->first_bd = txdata->tx_bd_prod;
2979         tx_buf->skb = skb;
2980         tx_buf->flags = 0;
2981
2982         DP(NETIF_MSG_TX_QUEUED,
2983            "sending pkt %u @%p  next_idx %u  bd %u @%p\n",
2984            pkt_prod, tx_buf, txdata->tx_pkt_prod, bd_prod, tx_start_bd);
2985
2986         if (vlan_tx_tag_present(skb)) {
2987                 tx_start_bd->vlan_or_ethertype =
2988                     cpu_to_le16(vlan_tx_tag_get(skb));
2989                 tx_start_bd->bd_flags.as_bitfield |=
2990                     (X_ETH_OUTBAND_VLAN << ETH_TX_BD_FLAGS_VLAN_MODE_SHIFT);
2991         } else
2992                 tx_start_bd->vlan_or_ethertype = cpu_to_le16(pkt_prod);
2993
2994         /* turn on parsing and get a BD */
2995         bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
2996
2997         if (xmit_type & XMIT_CSUM)
2998                 bnx2x_set_sbd_csum(bp, skb, tx_start_bd, xmit_type);
2999
3000         if (!CHIP_IS_E1x(bp)) {
3001                 pbd_e2 = &txdata->tx_desc_ring[bd_prod].parse_bd_e2;
3002                 memset(pbd_e2, 0, sizeof(struct eth_tx_parse_bd_e2));
3003                 /* Set PBD in checksum offload case */
3004                 if (xmit_type & XMIT_CSUM)
3005                         hlen = bnx2x_set_pbd_csum_e2(bp, skb,
3006                                                      &pbd_e2_parsing_data,
3007                                                      xmit_type);
3008                 if (IS_MF_SI(bp)) {
3009                         /*
3010                          * fill in the MAC addresses in the PBD - for local
3011                          * switching
3012                          */
3013                         bnx2x_set_fw_mac_addr(&pbd_e2->src_mac_addr_hi,
3014                                               &pbd_e2->src_mac_addr_mid,
3015                                               &pbd_e2->src_mac_addr_lo,
3016                                               eth->h_source);
3017                         bnx2x_set_fw_mac_addr(&pbd_e2->dst_mac_addr_hi,
3018                                               &pbd_e2->dst_mac_addr_mid,
3019                                               &pbd_e2->dst_mac_addr_lo,
3020                                               eth->h_dest);
3021                 }
3022         } else {
3023                 pbd_e1x = &txdata->tx_desc_ring[bd_prod].parse_bd_e1x;
3024                 memset(pbd_e1x, 0, sizeof(struct eth_tx_parse_bd_e1x));
3025                 /* Set PBD in checksum offload case */
3026                 if (xmit_type & XMIT_CSUM)
3027                         hlen = bnx2x_set_pbd_csum(bp, skb, pbd_e1x, xmit_type);
3028
3029         }
3030
3031         /* Setup the data pointer of the first BD of the packet */
3032         tx_start_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
3033         tx_start_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
3034         nbd = 2; /* start_bd + pbd + frags (updated when pages are mapped) */
3035         tx_start_bd->nbytes = cpu_to_le16(skb_headlen(skb));
3036         pkt_size = tx_start_bd->nbytes;
3037
3038         DP(NETIF_MSG_TX_QUEUED,
3039            "first bd @%p  addr (%x:%x)  nbd %d  nbytes %d  flags %x  vlan %x\n",
3040            tx_start_bd, tx_start_bd->addr_hi, tx_start_bd->addr_lo,
3041            le16_to_cpu(tx_start_bd->nbd), le16_to_cpu(tx_start_bd->nbytes),
3042            tx_start_bd->bd_flags.as_bitfield,
3043            le16_to_cpu(tx_start_bd->vlan_or_ethertype));
3044
3045         if (xmit_type & XMIT_GSO) {
3046
3047                 DP(NETIF_MSG_TX_QUEUED,
3048                    "TSO packet len %d  hlen %d  total len %d  tso size %d\n",
3049                    skb->len, hlen, skb_headlen(skb),
3050                    skb_shinfo(skb)->gso_size);
3051
3052                 tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_SW_LSO;
3053
3054                 if (unlikely(skb_headlen(skb) > hlen))
3055                         bd_prod = bnx2x_tx_split(bp, txdata, tx_buf,
3056                                                  &tx_start_bd, hlen,
3057                                                  bd_prod, ++nbd);
3058                 if (!CHIP_IS_E1x(bp))
3059                         bnx2x_set_pbd_gso_e2(skb, &pbd_e2_parsing_data,
3060                                              xmit_type);
3061                 else
3062                         bnx2x_set_pbd_gso(skb, pbd_e1x, xmit_type);
3063         }
3064
3065         /* Set the PBD's parsing_data field if not zero
3066          * (for the chips newer than 57711).
3067          */
3068         if (pbd_e2_parsing_data)
3069                 pbd_e2->parsing_data = cpu_to_le32(pbd_e2_parsing_data);
3070
3071         tx_data_bd = (struct eth_tx_bd *)tx_start_bd;
3072
3073         /* Handle fragmented skb */
3074         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
3075                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
3076
3077                 mapping = skb_frag_dma_map(&bp->pdev->dev, frag, 0,
3078                                            skb_frag_size(frag), DMA_TO_DEVICE);
3079                 if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) {
3080                         unsigned int pkts_compl = 0, bytes_compl = 0;
3081
3082                         DP(NETIF_MSG_TX_QUEUED,
3083                            "Unable to map page - dropping packet...\n");
3084
3085                         /* we need unmap all buffers already mapped
3086                          * for this SKB;
3087                          * first_bd->nbd need to be properly updated
3088                          * before call to bnx2x_free_tx_pkt
3089                          */
3090                         first_bd->nbd = cpu_to_le16(nbd);
3091                         bnx2x_free_tx_pkt(bp, txdata,
3092                                           TX_BD(txdata->tx_pkt_prod),
3093                                           &pkts_compl, &bytes_compl);
3094                         return NETDEV_TX_OK;
3095                 }
3096
3097                 bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
3098                 tx_data_bd = &txdata->tx_desc_ring[bd_prod].reg_bd;
3099                 if (total_pkt_bd == NULL)
3100                         total_pkt_bd = &txdata->tx_desc_ring[bd_prod].reg_bd;
3101
3102                 tx_data_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
3103                 tx_data_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
3104                 tx_data_bd->nbytes = cpu_to_le16(skb_frag_size(frag));
3105                 le16_add_cpu(&pkt_size, skb_frag_size(frag));
3106                 nbd++;
3107
3108                 DP(NETIF_MSG_TX_QUEUED,
3109                    "frag %d  bd @%p  addr (%x:%x)  nbytes %d\n",
3110                    i, tx_data_bd, tx_data_bd->addr_hi, tx_data_bd->addr_lo,
3111                    le16_to_cpu(tx_data_bd->nbytes));
3112         }
3113
3114         DP(NETIF_MSG_TX_QUEUED, "last bd @%p\n", tx_data_bd);
3115
3116         /* update with actual num BDs */
3117         first_bd->nbd = cpu_to_le16(nbd);
3118
3119         bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
3120
3121         /* now send a tx doorbell, counting the next BD
3122          * if the packet contains or ends with it
3123          */
3124         if (TX_BD_POFF(bd_prod) < nbd)
3125                 nbd++;
3126
3127         /* total_pkt_bytes should be set on the first data BD if
3128          * it's not an LSO packet and there is more than one
3129          * data BD. In this case pkt_size is limited by an MTU value.
3130          * However we prefer to set it for an LSO packet (while we don't
3131          * have to) in order to save some CPU cycles in a none-LSO
3132          * case, when we much more care about them.
3133          */
3134         if (total_pkt_bd != NULL)
3135                 total_pkt_bd->total_pkt_bytes = pkt_size;
3136
3137         if (pbd_e1x)
3138                 DP(NETIF_MSG_TX_QUEUED,
3139                    "PBD (E1X) @%p  ip_data %x  ip_hlen %u  ip_id %u  lso_mss %u  tcp_flags %x  xsum %x  seq %u  hlen %u\n",
3140                    pbd_e1x, pbd_e1x->global_data, pbd_e1x->ip_hlen_w,
3141                    pbd_e1x->ip_id, pbd_e1x->lso_mss, pbd_e1x->tcp_flags,
3142                    pbd_e1x->tcp_pseudo_csum, pbd_e1x->tcp_send_seq,
3143                     le16_to_cpu(pbd_e1x->total_hlen_w));
3144         if (pbd_e2)
3145                 DP(NETIF_MSG_TX_QUEUED,
3146                    "PBD (E2) @%p  dst %x %x %x src %x %x %x parsing_data %x\n",
3147                    pbd_e2, pbd_e2->dst_mac_addr_hi, pbd_e2->dst_mac_addr_mid,
3148                    pbd_e2->dst_mac_addr_lo, pbd_e2->src_mac_addr_hi,
3149                    pbd_e2->src_mac_addr_mid, pbd_e2->src_mac_addr_lo,
3150                    pbd_e2->parsing_data);
3151         DP(NETIF_MSG_TX_QUEUED, "doorbell: nbd %d  bd %u\n", nbd, bd_prod);
3152
3153         netdev_tx_sent_queue(txq, skb->len);
3154
3155         skb_tx_timestamp(skb);
3156
3157         txdata->tx_pkt_prod++;
3158         /*
3159          * Make sure that the BD data is updated before updating the producer
3160          * since FW might read the BD right after the producer is updated.
3161          * This is only applicable for weak-ordered memory model archs such
3162          * as IA-64. The following barrier is also mandatory since FW will
3163          * assumes packets must have BDs.
3164          */
3165         wmb();
3166
3167         txdata->tx_db.data.prod += nbd;
3168         barrier();
3169
3170         DOORBELL(bp, txdata->cid, txdata->tx_db.raw);
3171
3172         mmiowb();
3173
3174         txdata->tx_bd_prod += nbd;
3175
3176         if (unlikely(bnx2x_tx_avail(bp, txdata) < MAX_SKB_FRAGS + 4)) {
3177                 netif_tx_stop_queue(txq);
3178
3179                 /* paired memory barrier is in bnx2x_tx_int(), we have to keep
3180                  * ordering of set_bit() in netif_tx_stop_queue() and read of
3181                  * fp->bd_tx_cons */
3182                 smp_mb();
3183
3184                 fp->eth_q_stats.driver_xoff++;
3185                 if (bnx2x_tx_avail(bp, txdata) >= MAX_SKB_FRAGS + 4)
3186                         netif_tx_wake_queue(txq);
3187         }
3188         txdata->tx_pkt++;
3189
3190         return NETDEV_TX_OK;
3191 }
3192
3193 /**
3194  * bnx2x_setup_tc - routine to configure net_device for multi tc
3195  *
3196  * @netdev: net device to configure
3197  * @tc: number of traffic classes to enable
3198  *
3199  * callback connected to the ndo_setup_tc function pointer
3200  */
3201 int bnx2x_setup_tc(struct net_device *dev, u8 num_tc)
3202 {
3203         int cos, prio, count, offset;
3204         struct bnx2x *bp = netdev_priv(dev);
3205
3206         /* setup tc must be called under rtnl lock */
3207         ASSERT_RTNL();
3208
3209         /* no traffic classes requested. aborting */
3210         if (!num_tc) {
3211                 netdev_reset_tc(dev);
3212                 return 0;
3213         }
3214
3215         /* requested to support too many traffic classes */
3216         if (num_tc > bp->max_cos) {
3217                 BNX2X_ERR("support for too many traffic classes requested: %d. max supported is %d\n",
3218                           num_tc, bp->max_cos);
3219                 return -EINVAL;
3220         }
3221
3222         /* declare amount of supported traffic classes */
3223         if (netdev_set_num_tc(dev, num_tc)) {
3224                 BNX2X_ERR("failed to declare %d traffic classes\n", num_tc);
3225                 return -EINVAL;
3226         }
3227
3228         /* configure priority to traffic class mapping */
3229         for (prio = 0; prio < BNX2X_MAX_PRIORITY; prio++) {
3230                 netdev_set_prio_tc_map(dev, prio, bp->prio_to_cos[prio]);
3231                 DP(BNX2X_MSG_SP | NETIF_MSG_IFUP,
3232                    "mapping priority %d to tc %d\n",
3233                    prio, bp->prio_to_cos[prio]);
3234         }
3235
3236
3237         /* Use this configuration to diffrentiate tc0 from other COSes
3238            This can be used for ets or pfc, and save the effort of setting
3239            up a multio class queue disc or negotiating DCBX with a switch
3240         netdev_set_prio_tc_map(dev, 0, 0);
3241         DP(BNX2X_MSG_SP, "mapping priority %d to tc %d\n", 0, 0);
3242         for (prio = 1; prio < 16; prio++) {
3243                 netdev_set_prio_tc_map(dev, prio, 1);
3244                 DP(BNX2X_MSG_SP, "mapping priority %d to tc %d\n", prio, 1);
3245         } */
3246
3247         /* configure traffic class to transmission queue mapping */
3248         for (cos = 0; cos < bp->max_cos; cos++) {
3249                 count = BNX2X_NUM_ETH_QUEUES(bp);
3250                 offset = cos * MAX_TXQS_PER_COS;
3251                 netdev_set_tc_queue(dev, cos, count, offset);
3252                 DP(BNX2X_MSG_SP | NETIF_MSG_IFUP,
3253                    "mapping tc %d to offset %d count %d\n",
3254                    cos, offset, count);
3255         }
3256
3257         return 0;
3258 }
3259
3260 /* called with rtnl_lock */
3261 int bnx2x_change_mac_addr(struct net_device *dev, void *p)
3262 {
3263         struct sockaddr *addr = p;
3264         struct bnx2x *bp = netdev_priv(dev);
3265         int rc = 0;
3266
3267         if (!bnx2x_is_valid_ether_addr(bp, addr->sa_data)) {
3268                 BNX2X_ERR("Requested MAC address is not valid\n");
3269                 return -EINVAL;
3270         }
3271
3272 #ifdef BCM_CNIC
3273         if ((IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp)) &&
3274             !is_zero_ether_addr(addr->sa_data)) {
3275                 BNX2X_ERR("Can't configure non-zero address on iSCSI or FCoE functions in MF-SD mode\n");
3276                 return -EINVAL;
3277         }
3278 #endif
3279
3280         if (netif_running(dev))  {
3281                 rc = bnx2x_set_eth_mac(bp, false);
3282                 if (rc)
3283                         return rc;
3284         }
3285
3286         dev->addr_assign_type &= ~NET_ADDR_RANDOM;
3287         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
3288
3289         if (netif_running(dev))
3290                 rc = bnx2x_set_eth_mac(bp, true);
3291
3292         return rc;
3293 }
3294
3295 static void bnx2x_free_fp_mem_at(struct bnx2x *bp, int fp_index)
3296 {
3297         union host_hc_status_block *sb = &bnx2x_fp(bp, fp_index, status_blk);
3298         struct bnx2x_fastpath *fp = &bp->fp[fp_index];
3299         u8 cos;
3300
3301         /* Common */
3302 #ifdef BCM_CNIC
3303         if (IS_FCOE_IDX(fp_index)) {
3304                 memset(sb, 0, sizeof(union host_hc_status_block));
3305                 fp->status_blk_mapping = 0;
3306
3307         } else {
3308 #endif
3309                 /* status blocks */
3310                 if (!CHIP_IS_E1x(bp))
3311                         BNX2X_PCI_FREE(sb->e2_sb,
3312                                        bnx2x_fp(bp, fp_index,
3313                                                 status_blk_mapping),
3314                                        sizeof(struct host_hc_status_block_e2));
3315                 else
3316                         BNX2X_PCI_FREE(sb->e1x_sb,
3317                                        bnx2x_fp(bp, fp_index,
3318                                                 status_blk_mapping),
3319                                        sizeof(struct host_hc_status_block_e1x));
3320 #ifdef BCM_CNIC
3321         }
3322 #endif
3323         /* Rx */
3324         if (!skip_rx_queue(bp, fp_index)) {
3325                 bnx2x_free_rx_bds(fp);
3326
3327                 /* fastpath rx rings: rx_buf rx_desc rx_comp */
3328                 BNX2X_FREE(bnx2x_fp(bp, fp_index, rx_buf_ring));
3329                 BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_desc_ring),
3330                                bnx2x_fp(bp, fp_index, rx_desc_mapping),
3331                                sizeof(struct eth_rx_bd) * NUM_RX_BD);
3332
3333                 BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_comp_ring),
3334                                bnx2x_fp(bp, fp_index, rx_comp_mapping),
3335                                sizeof(struct eth_fast_path_rx_cqe) *
3336                                NUM_RCQ_BD);
3337
3338                 /* SGE ring */
3339                 BNX2X_FREE(bnx2x_fp(bp, fp_index, rx_page_ring));
3340                 BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_sge_ring),
3341                                bnx2x_fp(bp, fp_index, rx_sge_mapping),
3342                                BCM_PAGE_SIZE * NUM_RX_SGE_PAGES);
3343         }
3344
3345         /* Tx */
3346         if (!skip_tx_queue(bp, fp_index)) {
3347                 /* fastpath tx rings: tx_buf tx_desc */
3348                 for_each_cos_in_tx_queue(fp, cos) {
3349                         struct bnx2x_fp_txdata *txdata = &fp->txdata[cos];
3350
3351                         DP(NETIF_MSG_IFDOWN,
3352                            "freeing tx memory of fp %d cos %d cid %d\n",
3353                            fp_index, cos, txdata->cid);
3354
3355                         BNX2X_FREE(txdata->tx_buf_ring);
3356                         BNX2X_PCI_FREE(txdata->tx_desc_ring,
3357                                 txdata->tx_desc_mapping,
3358                                 sizeof(union eth_tx_bd_types) * NUM_TX_BD);
3359                 }
3360         }
3361         /* end of fastpath */
3362 }
3363
3364 void bnx2x_free_fp_mem(struct bnx2x *bp)
3365 {
3366         int i;
3367         for_each_queue(bp, i)
3368                 bnx2x_free_fp_mem_at(bp, i);
3369 }
3370
3371 static void set_sb_shortcuts(struct bnx2x *bp, int index)
3372 {
3373         union host_hc_status_block status_blk = bnx2x_fp(bp, index, status_blk);
3374         if (!CHIP_IS_E1x(bp)) {
3375                 bnx2x_fp(bp, index, sb_index_values) =
3376                         (__le16 *)status_blk.e2_sb->sb.index_values;
3377                 bnx2x_fp(bp, index, sb_running_index) =
3378                         (__le16 *)status_blk.e2_sb->sb.running_index;
3379         } else {
3380                 bnx2x_fp(bp, index, sb_index_values) =
3381                         (__le16 *)status_blk.e1x_sb->sb.index_values;
3382                 bnx2x_fp(bp, index, sb_running_index) =
3383                         (__le16 *)status_blk.e1x_sb->sb.running_index;
3384         }
3385 }
3386
3387 /* Returns the number of actually allocated BDs */
3388 static int bnx2x_alloc_rx_bds(struct bnx2x_fastpath *fp,
3389                               int rx_ring_size)
3390 {
3391         struct bnx2x *bp = fp->bp;
3392         u16 ring_prod, cqe_ring_prod;
3393         int i, failure_cnt = 0;
3394
3395         fp->rx_comp_cons = 0;
3396         cqe_ring_prod = ring_prod = 0;
3397
3398         /* This routine is called only during fo init so
3399          * fp->eth_q_stats.rx_skb_alloc_failed = 0
3400          */
3401         for (i = 0; i < rx_ring_size; i++) {
3402                 if (bnx2x_alloc_rx_data(bp, fp, ring_prod) < 0) {
3403                         failure_cnt++;
3404                         continue;
3405                 }
3406                 ring_prod = NEXT_RX_IDX(ring_prod);
3407                 cqe_ring_prod = NEXT_RCQ_IDX(cqe_ring_prod);
3408                 WARN_ON(ring_prod <= (i - failure_cnt));
3409         }
3410
3411         if (failure_cnt)
3412                 BNX2X_ERR("was only able to allocate %d rx skbs on queue[%d]\n",
3413                           i - failure_cnt, fp->index);
3414
3415         fp->rx_bd_prod = ring_prod;
3416         /* Limit the CQE producer by the CQE ring size */
3417         fp->rx_comp_prod = min_t(u16, NUM_RCQ_RINGS*RCQ_DESC_CNT,
3418                                cqe_ring_prod);
3419         fp->rx_pkt = fp->rx_calls = 0;
3420
3421         fp->eth_q_stats.rx_skb_alloc_failed += failure_cnt;
3422
3423         return i - failure_cnt;
3424 }
3425
3426 static void bnx2x_set_next_page_rx_cq(struct bnx2x_fastpath *fp)
3427 {
3428         int i;
3429
3430         for (i = 1; i <= NUM_RCQ_RINGS; i++) {
3431                 struct eth_rx_cqe_next_page *nextpg;
3432
3433                 nextpg = (struct eth_rx_cqe_next_page *)
3434                         &fp->rx_comp_ring[RCQ_DESC_CNT * i - 1];
3435                 nextpg->addr_hi =
3436                         cpu_to_le32(U64_HI(fp->rx_comp_mapping +
3437                                    BCM_PAGE_SIZE*(i % NUM_RCQ_RINGS)));
3438                 nextpg->addr_lo =
3439                         cpu_to_le32(U64_LO(fp->rx_comp_mapping +
3440                                    BCM_PAGE_SIZE*(i % NUM_RCQ_RINGS)));
3441         }
3442 }
3443
3444 static int bnx2x_alloc_fp_mem_at(struct bnx2x *bp, int index)
3445 {
3446         union host_hc_status_block *sb;
3447         struct bnx2x_fastpath *fp = &bp->fp[index];
3448         int ring_size = 0;
3449         u8 cos;
3450         int rx_ring_size = 0;
3451
3452 #ifdef BCM_CNIC
3453         if (!bp->rx_ring_size &&
3454             (IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp))) {
3455                 rx_ring_size = MIN_RX_SIZE_NONTPA;
3456                 bp->rx_ring_size = rx_ring_size;
3457         } else
3458 #endif
3459         if (!bp->rx_ring_size) {
3460                 u32 cfg = SHMEM_RD(bp,
3461                              dev_info.port_hw_config[BP_PORT(bp)].default_cfg);
3462
3463                 rx_ring_size = MAX_RX_AVAIL/BNX2X_NUM_RX_QUEUES(bp);
3464
3465                 /* Dercease ring size for 1G functions */
3466                 if ((cfg & PORT_HW_CFG_NET_SERDES_IF_MASK) ==
3467                     PORT_HW_CFG_NET_SERDES_IF_SGMII)
3468                         rx_ring_size /= 10;
3469
3470                 /* allocate at least number of buffers required by FW */
3471                 rx_ring_size = max_t(int, bp->disable_tpa ? MIN_RX_SIZE_NONTPA :
3472                                      MIN_RX_SIZE_TPA, rx_ring_size);
3473
3474                 bp->rx_ring_size = rx_ring_size;
3475         } else /* if rx_ring_size specified - use it */
3476                 rx_ring_size = bp->rx_ring_size;
3477
3478         /* Common */
3479         sb = &bnx2x_fp(bp, index, status_blk);
3480 #ifdef BCM_CNIC
3481         if (!IS_FCOE_IDX(index)) {
3482 #endif
3483                 /* status blocks */
3484                 if (!CHIP_IS_E1x(bp))
3485                         BNX2X_PCI_ALLOC(sb->e2_sb,
3486                                 &bnx2x_fp(bp, index, status_blk_mapping),
3487                                 sizeof(struct host_hc_status_block_e2));
3488                 else
3489                         BNX2X_PCI_ALLOC(sb->e1x_sb,
3490                                 &bnx2x_fp(bp, index, status_blk_mapping),
3491                             sizeof(struct host_hc_status_block_e1x));
3492 #ifdef BCM_CNIC
3493         }
3494 #endif
3495
3496         /* FCoE Queue uses Default SB and doesn't ACK the SB, thus no need to
3497          * set shortcuts for it.
3498          */
3499         if (!IS_FCOE_IDX(index))
3500                 set_sb_shortcuts(bp, index);
3501
3502         /* Tx */
3503         if (!skip_tx_queue(bp, index)) {
3504                 /* fastpath tx rings: tx_buf tx_desc */
3505                 for_each_cos_in_tx_queue(fp, cos) {
3506                         struct bnx2x_fp_txdata *txdata = &fp->txdata[cos];
3507
3508                         DP(NETIF_MSG_IFUP,
3509                            "allocating tx memory of fp %d cos %d\n",
3510                            index, cos);
3511
3512                         BNX2X_ALLOC(txdata->tx_buf_ring,
3513                                 sizeof(struct sw_tx_bd) * NUM_TX_BD);
3514                         BNX2X_PCI_ALLOC(txdata->tx_desc_ring,
3515                                 &txdata->tx_desc_mapping,
3516                                 sizeof(union eth_tx_bd_types) * NUM_TX_BD);
3517                 }
3518         }
3519
3520         /* Rx */
3521         if (!skip_rx_queue(bp, index)) {
3522                 /* fastpath rx rings: rx_buf rx_desc rx_comp */
3523                 BNX2X_ALLOC(bnx2x_fp(bp, index, rx_buf_ring),
3524                                 sizeof(struct sw_rx_bd) * NUM_RX_BD);
3525                 BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, rx_desc_ring),
3526                                 &bnx2x_fp(bp, index, rx_desc_mapping),
3527                                 sizeof(struct eth_rx_bd) * NUM_RX_BD);
3528
3529                 BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, rx_comp_ring),
3530                                 &bnx2x_fp(bp, index, rx_comp_mapping),
3531                                 sizeof(struct eth_fast_path_rx_cqe) *
3532                                 NUM_RCQ_BD);
3533
3534                 /* SGE ring */
3535                 BNX2X_ALLOC(bnx2x_fp(bp, index, rx_page_ring),
3536                                 sizeof(struct sw_rx_page) * NUM_RX_SGE);
3537                 BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, rx_sge_ring),
3538                                 &bnx2x_fp(bp, index, rx_sge_mapping),
3539                                 BCM_PAGE_SIZE * NUM_RX_SGE_PAGES);
3540                 /* RX BD ring */
3541                 bnx2x_set_next_page_rx_bd(fp);
3542
3543                 /* CQ ring */
3544                 bnx2x_set_next_page_rx_cq(fp);
3545
3546                 /* BDs */
3547                 ring_size = bnx2x_alloc_rx_bds(fp, rx_ring_size);
3548                 if (ring_size < rx_ring_size)
3549                         goto alloc_mem_err;
3550         }
3551
3552         return 0;
3553
3554 /* handles low memory cases */
3555 alloc_mem_err:
3556         BNX2X_ERR("Unable to allocate full memory for queue %d (size %d)\n",
3557                                                 index, ring_size);
3558         /* FW will drop all packets if queue is not big enough,
3559          * In these cases we disable the queue
3560          * Min size is different for OOO, TPA and non-TPA queues
3561          */
3562         if (ring_size < (fp->disable_tpa ?
3563                                 MIN_RX_SIZE_NONTPA : MIN_RX_SIZE_TPA)) {
3564                         /* release memory allocated for this queue */
3565                         bnx2x_free_fp_mem_at(bp, index);
3566                         return -ENOMEM;
3567         }
3568         return 0;
3569 }
3570
3571 int bnx2x_alloc_fp_mem(struct bnx2x *bp)
3572 {
3573         int i;
3574
3575         /**
3576          * 1. Allocate FP for leading - fatal if error
3577          * 2. {CNIC} Allocate FCoE FP - fatal if error
3578          * 3. {CNIC} Allocate OOO + FWD - disable OOO if error
3579          * 4. Allocate RSS - fix number of queues if error
3580          */
3581
3582         /* leading */
3583         if (bnx2x_alloc_fp_mem_at(bp, 0))
3584                 return -ENOMEM;
3585
3586 #ifdef BCM_CNIC
3587         if (!NO_FCOE(bp))
3588                 /* FCoE */
3589                 if (bnx2x_alloc_fp_mem_at(bp, FCOE_IDX))
3590                         /* we will fail load process instead of mark
3591                          * NO_FCOE_FLAG
3592                          */
3593                         return -ENOMEM;
3594 #endif
3595
3596         /* RSS */
3597         for_each_nondefault_eth_queue(bp, i)
3598                 if (bnx2x_alloc_fp_mem_at(bp, i))
3599                         break;
3600
3601         /* handle memory failures */
3602         if (i != BNX2X_NUM_ETH_QUEUES(bp)) {
3603                 int delta = BNX2X_NUM_ETH_QUEUES(bp) - i;
3604
3605                 WARN_ON(delta < 0);
3606 #ifdef BCM_CNIC
3607                 /**
3608                  * move non eth FPs next to last eth FP
3609                  * must be done in that order
3610                  * FCOE_IDX < FWD_IDX < OOO_IDX
3611                  */
3612
3613                 /* move FCoE fp even NO_FCOE_FLAG is on */
3614                 bnx2x_move_fp(bp, FCOE_IDX, FCOE_IDX - delta);
3615 #endif
3616                 bp->num_queues -= delta;
3617                 BNX2X_ERR("Adjusted num of queues from %d to %d\n",
3618                           bp->num_queues + delta, bp->num_queues);
3619         }
3620
3621         return 0;
3622 }
3623
3624 void bnx2x_free_mem_bp(struct bnx2x *bp)
3625 {
3626         kfree(bp->fp);
3627         kfree(bp->msix_table);
3628         kfree(bp->ilt);
3629 }
3630
3631 int __devinit bnx2x_alloc_mem_bp(struct bnx2x *bp)
3632 {
3633         struct bnx2x_fastpath *fp;
3634         struct msix_entry *tbl;
3635         struct bnx2x_ilt *ilt;
3636         int msix_table_size = 0;
3637
3638         /*
3639          * The biggest MSI-X table we might need is as a maximum number of fast
3640          * path IGU SBs plus default SB (for PF).
3641          */
3642         msix_table_size = bp->igu_sb_cnt + 1;
3643
3644         /* fp array: RSS plus CNIC related L2 queues */
3645         fp = kcalloc(BNX2X_MAX_RSS_COUNT(bp) + NON_ETH_CONTEXT_USE,
3646                      sizeof(*fp), GFP_KERNEL);
3647         if (!fp)
3648                 goto alloc_err;
3649         bp->fp = fp;
3650
3651         /* msix table */
3652         tbl = kcalloc(msix_table_size, sizeof(*tbl), GFP_KERNEL);
3653         if (!tbl)
3654                 goto alloc_err;
3655         bp->msix_table = tbl;
3656
3657         /* ilt */
3658         ilt = kzalloc(sizeof(*ilt), GFP_KERNEL);
3659         if (!ilt)
3660                 goto alloc_err;
3661         bp->ilt = ilt;
3662
3663         return 0;
3664 alloc_err:
3665         bnx2x_free_mem_bp(bp);
3666         return -ENOMEM;
3667
3668 }
3669
3670 int bnx2x_reload_if_running(struct net_device *dev)
3671 {
3672         struct bnx2x *bp = netdev_priv(dev);
3673
3674         if (unlikely(!netif_running(dev)))
3675                 return 0;
3676
3677         bnx2x_nic_unload(bp, UNLOAD_NORMAL);
3678         return bnx2x_nic_load(bp, LOAD_NORMAL);
3679 }
3680
3681 int bnx2x_get_cur_phy_idx(struct bnx2x *bp)
3682 {
3683         u32 sel_phy_idx = 0;
3684         if (bp->link_params.num_phys <= 1)
3685                 return INT_PHY;
3686
3687         if (bp->link_vars.link_up) {
3688                 sel_phy_idx = EXT_PHY1;
3689                 /* In case link is SERDES, check if the EXT_PHY2 is the one */
3690                 if ((bp->link_vars.link_status & LINK_STATUS_SERDES_LINK) &&
3691                     (bp->link_params.phy[EXT_PHY2].supported & SUPPORTED_FIBRE))
3692                         sel_phy_idx = EXT_PHY2;
3693         } else {
3694
3695                 switch (bnx2x_phy_selection(&bp->link_params)) {
3696                 case PORT_HW_CFG_PHY_SELECTION_HARDWARE_DEFAULT:
3697                 case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY:
3698                 case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY_PRIORITY:
3699                        sel_phy_idx = EXT_PHY1;
3700                        break;
3701                 case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY:
3702                 case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY_PRIORITY:
3703                        sel_phy_idx = EXT_PHY2;
3704                        break;
3705                 }
3706         }
3707
3708         return sel_phy_idx;
3709
3710 }
3711 int bnx2x_get_link_cfg_idx(struct bnx2x *bp)
3712 {
3713         u32 sel_phy_idx = bnx2x_get_cur_phy_idx(bp);
3714         /*
3715          * The selected actived PHY is always after swapping (in case PHY
3716          * swapping is enabled). So when swapping is enabled, we need to reverse
3717          * the configuration
3718          */
3719
3720         if (bp->link_params.multi_phy_config &
3721             PORT_HW_CFG_PHY_SWAPPED_ENABLED) {
3722                 if (sel_phy_idx == EXT_PHY1)
3723                         sel_phy_idx = EXT_PHY2;
3724                 else if (sel_phy_idx == EXT_PHY2)
3725                         sel_phy_idx = EXT_PHY1;
3726         }
3727         return LINK_CONFIG_IDX(sel_phy_idx);
3728 }
3729
3730 #if defined(NETDEV_FCOE_WWNN) && defined(BCM_CNIC)
3731 int bnx2x_fcoe_get_wwn(struct net_device *dev, u64 *wwn, int type)
3732 {
3733         struct bnx2x *bp = netdev_priv(dev);
3734         struct cnic_eth_dev *cp = &bp->cnic_eth_dev;
3735
3736         switch (type) {
3737         case NETDEV_FCOE_WWNN:
3738                 *wwn = HILO_U64(cp->fcoe_wwn_node_name_hi,
3739                                 cp->fcoe_wwn_node_name_lo);
3740                 break;
3741         case NETDEV_FCOE_WWPN:
3742                 *wwn = HILO_U64(cp->fcoe_wwn_port_name_hi,
3743                                 cp->fcoe_wwn_port_name_lo);
3744                 break;
3745         default:
3746                 BNX2X_ERR("Wrong WWN type requested - %d\n", type);
3747                 return -EINVAL;
3748         }
3749
3750         return 0;
3751 }
3752 #endif
3753
3754 /* called with rtnl_lock */
3755 int bnx2x_change_mtu(struct net_device *dev, int new_mtu)
3756 {
3757         struct bnx2x *bp = netdev_priv(dev);
3758
3759         if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
3760                 BNX2X_ERR("Can't perform change MTU during parity recovery\n");
3761                 return -EAGAIN;
3762         }
3763
3764         if ((new_mtu > ETH_MAX_JUMBO_PACKET_SIZE) ||
3765             ((new_mtu + ETH_HLEN) < ETH_MIN_PACKET_SIZE)) {
3766                 BNX2X_ERR("Can't support requested MTU size\n");
3767                 return -EINVAL;
3768         }
3769
3770         /* This does not race with packet allocation
3771          * because the actual alloc size is
3772          * only updated as part of load
3773          */
3774         dev->mtu = new_mtu;
3775
3776         return bnx2x_reload_if_running(dev);
3777 }
3778
3779 netdev_features_t bnx2x_fix_features(struct net_device *dev,
3780                                      netdev_features_t features)
3781 {
3782         struct bnx2x *bp = netdev_priv(dev);
3783
3784         /* TPA requires Rx CSUM offloading */
3785         if (!(features & NETIF_F_RXCSUM) || bp->disable_tpa) {
3786                 features &= ~NETIF_F_LRO;
3787                 features &= ~NETIF_F_GRO;
3788         }
3789
3790         return features;
3791 }
3792
3793 int bnx2x_set_features(struct net_device *dev, netdev_features_t features)
3794 {
3795         struct bnx2x *bp = netdev_priv(dev);
3796         u32 flags = bp->flags;
3797         bool bnx2x_reload = false;
3798
3799         if (features & NETIF_F_LRO)
3800                 flags |= TPA_ENABLE_FLAG;
3801         else
3802                 flags &= ~TPA_ENABLE_FLAG;
3803
3804         if (features & NETIF_F_GRO)
3805                 flags |= GRO_ENABLE_FLAG;
3806         else
3807                 flags &= ~GRO_ENABLE_FLAG;
3808
3809         if (features & NETIF_F_LOOPBACK) {
3810                 if (bp->link_params.loopback_mode != LOOPBACK_BMAC) {
3811                         bp->link_params.loopback_mode = LOOPBACK_BMAC;
3812                         bnx2x_reload = true;
3813                 }
3814         } else {
3815                 if (bp->link_params.loopback_mode != LOOPBACK_NONE) {
3816                         bp->link_params.loopback_mode = LOOPBACK_NONE;
3817                         bnx2x_reload = true;
3818                 }
3819         }
3820
3821         if (flags ^ bp->flags) {
3822                 bp->flags = flags;
3823                 bnx2x_reload = true;
3824         }
3825
3826         if (bnx2x_reload) {
3827                 if (bp->recovery_state == BNX2X_RECOVERY_DONE)
3828                         return bnx2x_reload_if_running(dev);
3829                 /* else: bnx2x_nic_load() will be called at end of recovery */
3830         }
3831
3832         return 0;
3833 }
3834
3835 void bnx2x_tx_timeout(struct net_device *dev)
3836 {
3837         struct bnx2x *bp = netdev_priv(dev);
3838
3839 #ifdef BNX2X_STOP_ON_ERROR
3840         if (!bp->panic)
3841                 bnx2x_panic();
3842 #endif
3843
3844         smp_mb__before_clear_bit();
3845         set_bit(BNX2X_SP_RTNL_TX_TIMEOUT, &bp->sp_rtnl_state);
3846         smp_mb__after_clear_bit();
3847
3848         /* This allows the netif to be shutdown gracefully before resetting */
3849         schedule_delayed_work(&bp->sp_rtnl_task, 0);
3850 }
3851
3852 int bnx2x_suspend(struct pci_dev *pdev, pm_message_t state)
3853 {
3854         struct net_device *dev = pci_get_drvdata(pdev);
3855         struct bnx2x *bp;
3856
3857         if (!dev) {
3858                 dev_err(&pdev->dev, "BAD net device from bnx2x_init_one\n");
3859                 return -ENODEV;
3860         }
3861         bp = netdev_priv(dev);
3862
3863         rtnl_lock();
3864
3865         pci_save_state(pdev);
3866
3867         if (!netif_running(dev)) {
3868                 rtnl_unlock();
3869                 return 0;
3870         }
3871
3872         netif_device_detach(dev);
3873
3874         bnx2x_nic_unload(bp, UNLOAD_CLOSE);
3875
3876         bnx2x_set_power_state(bp, pci_choose_state(pdev, state));
3877
3878         rtnl_unlock();
3879
3880         return 0;
3881 }
3882
3883 int bnx2x_resume(struct pci_dev *pdev)
3884 {
3885         struct net_device *dev = pci_get_drvdata(pdev);
3886         struct bnx2x *bp;
3887         int rc;
3888
3889         if (!dev) {
3890                 dev_err(&pdev->dev, "BAD net device from bnx2x_init_one\n");
3891                 return -ENODEV;
3892         }
3893         bp = netdev_priv(dev);
3894
3895         if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
3896                 BNX2X_ERR("Handling parity error recovery. Try again later\n");
3897                 return -EAGAIN;
3898         }
3899
3900         rtnl_lock();
3901
3902         pci_restore_state(pdev);
3903
3904         if (!netif_running(dev)) {
3905                 rtnl_unlock();
3906                 return 0;
3907         }
3908
3909         bnx2x_set_power_state(bp, PCI_D0);
3910         netif_device_attach(dev);
3911
3912         rc = bnx2x_nic_load(bp, LOAD_OPEN);
3913
3914         rtnl_unlock();
3915
3916         return rc;
3917 }
3918
3919
3920 void bnx2x_set_ctx_validation(struct bnx2x *bp, struct eth_context *cxt,
3921                               u32 cid)
3922 {
3923         /* ustorm cxt validation */
3924         cxt->ustorm_ag_context.cdu_usage =
3925                 CDU_RSRVD_VALUE_TYPE_A(HW_CID(bp, cid),
3926                         CDU_REGION_NUMBER_UCM_AG, ETH_CONNECTION_TYPE);
3927         /* xcontext validation */
3928         cxt->xstorm_ag_context.cdu_reserved =
3929                 CDU_RSRVD_VALUE_TYPE_A(HW_CID(bp, cid),
3930                         CDU_REGION_NUMBER_XCM_AG, ETH_CONNECTION_TYPE);
3931 }
3932
3933 static void storm_memset_hc_timeout(struct bnx2x *bp, u8 port,
3934                                     u8 fw_sb_id, u8 sb_index,
3935                                     u8 ticks)
3936 {
3937
3938         u32 addr = BAR_CSTRORM_INTMEM +
3939                    CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(fw_sb_id, sb_index);
3940         REG_WR8(bp, addr, ticks);
3941         DP(NETIF_MSG_IFUP,
3942            "port %x fw_sb_id %d sb_index %d ticks %d\n",
3943            port, fw_sb_id, sb_index, ticks);
3944 }
3945
3946 static void storm_memset_hc_disable(struct bnx2x *bp, u8 port,
3947                                     u16 fw_sb_id, u8 sb_index,
3948                                     u8 disable)
3949 {
3950         u32 enable_flag = disable ? 0 : (1 << HC_INDEX_DATA_HC_ENABLED_SHIFT);
3951         u32 addr = BAR_CSTRORM_INTMEM +
3952                    CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(fw_sb_id, sb_index);
3953         u16 flags = REG_RD16(bp, addr);
3954         /* clear and set */
3955         flags &= ~HC_INDEX_DATA_HC_ENABLED;
3956         flags |= enable_flag;
3957         REG_WR16(bp, addr, flags);
3958         DP(NETIF_MSG_IFUP,
3959            "port %x fw_sb_id %d sb_index %d disable %d\n",
3960            port, fw_sb_id, sb_index, disable);
3961 }
3962
3963 void bnx2x_update_coalesce_sb_index(struct bnx2x *bp, u8 fw_sb_id,
3964                                     u8 sb_index, u8 disable, u16 usec)
3965 {
3966         int port = BP_PORT(bp);
3967         u8 ticks = usec / BNX2X_BTR;
3968
3969         storm_memset_hc_timeout(bp, port, fw_sb_id, sb_index, ticks);
3970
3971         disable = disable ? 1 : (usec ? 0 : 1);
3972         storm_memset_hc_disable(bp, port, fw_sb_id, sb_index, disable);
3973 }