1 /* bnx2x_sp.h: Broadcom Everest network driver.
3 * Copyright (c) 2011-2012 Broadcom Corporation
5 * Unless you and Broadcom execute a separate written software license
6 * agreement governing use of this software, this software is licensed to you
7 * under the terms of the GNU General Public License version 2, available
8 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
10 * Notwithstanding the above, under no circumstances may you combine this
11 * software in any way with any other Broadcom software provided under a
12 * license other than the GPL, without Broadcom's express prior written
15 * Maintained by: Eilon Greenstein <eilong@broadcom.com>
16 * Written by: Vladislav Zolotarov
19 #ifndef BNX2X_SP_VERBS
20 #define BNX2X_SP_VERBS
25 /* Bits representing general command's configuration */
29 /* Wait until all pending commands complete */
31 /* Don't send a ramrod, only update a registry */
33 /* Configure HW according to the current object state */
35 /* Execute the next command now */
38 * Don't add a new command and continue execution of posponed
39 * commands. If not set a new command will be added to the
40 * pending commands list.
43 /* If there is another pending ramrod, wait until it finishes and
44 * re-try to submit this one. This flag can be set only in sleepable
45 * context, and should not be set from the context that completes the
46 * ramrods as deadlock will occur.
57 /* Filtering states */
59 BNX2X_FILTER_MAC_PENDING,
60 BNX2X_FILTER_VLAN_PENDING,
61 BNX2X_FILTER_VLAN_MAC_PENDING,
62 BNX2X_FILTER_RX_MODE_PENDING,
63 BNX2X_FILTER_RX_MODE_SCHED,
64 BNX2X_FILTER_ISCSI_ETH_START_SCHED,
65 BNX2X_FILTER_ISCSI_ETH_STOP_SCHED,
66 BNX2X_FILTER_FCOE_ETH_START_SCHED,
67 BNX2X_FILTER_FCOE_ETH_STOP_SCHED,
68 BNX2X_FILTER_MCAST_PENDING,
69 BNX2X_FILTER_MCAST_SCHED,
70 BNX2X_FILTER_RSS_CONF_PENDING,
71 BNX2X_AFEX_FCOE_Q_UPDATE_PENDING,
72 BNX2X_AFEX_PENDING_VIFSET_MCP_ACK
75 struct bnx2x_raw_obj {
82 /* Ramrod data buffer params */
84 dma_addr_t rdata_mapping;
86 /* Ramrod state params */
87 int state; /* "ramrod is pending" state bit */
88 unsigned long *pstate; /* pointer to state buffer */
90 bnx2x_obj_type obj_type;
92 int (*wait_comp)(struct bnx2x *bp,
93 struct bnx2x_raw_obj *o);
95 bool (*check_pending)(struct bnx2x_raw_obj *o);
96 void (*clear_pending)(struct bnx2x_raw_obj *o);
97 void (*set_pending)(struct bnx2x_raw_obj *o);
100 /************************* VLAN-MAC commands related parameters ***************/
101 struct bnx2x_mac_ramrod_data {
105 struct bnx2x_vlan_ramrod_data {
109 struct bnx2x_vlan_mac_ramrod_data {
114 union bnx2x_classification_ramrod_data {
115 struct bnx2x_mac_ramrod_data mac;
116 struct bnx2x_vlan_ramrod_data vlan;
117 struct bnx2x_vlan_mac_ramrod_data vlan_mac;
120 /* VLAN_MAC commands */
121 enum bnx2x_vlan_mac_cmd {
127 struct bnx2x_vlan_mac_data {
128 /* Requested command: BNX2X_VLAN_MAC_XX */
129 enum bnx2x_vlan_mac_cmd cmd;
131 * used to contain the data related vlan_mac_flags bits from
134 unsigned long vlan_mac_flags;
136 /* Needed for MOVE command */
137 struct bnx2x_vlan_mac_obj *target_obj;
139 union bnx2x_classification_ramrod_data u;
142 /*************************** Exe Queue obj ************************************/
143 union bnx2x_exe_queue_cmd_data {
144 struct bnx2x_vlan_mac_data vlan_mac;
151 struct bnx2x_exeq_elem {
152 struct list_head link;
154 /* Length of this element in the exe_chunk. */
157 union bnx2x_exe_queue_cmd_data cmd_data;
160 union bnx2x_qable_obj;
162 union bnx2x_exeq_comp_elem {
163 union event_ring_elem *elem;
166 struct bnx2x_exe_queue_obj;
168 typedef int (*exe_q_validate)(struct bnx2x *bp,
169 union bnx2x_qable_obj *o,
170 struct bnx2x_exeq_elem *elem);
172 typedef int (*exe_q_remove)(struct bnx2x *bp,
173 union bnx2x_qable_obj *o,
174 struct bnx2x_exeq_elem *elem);
176 /* Return positive if entry was optimized, 0 - if not, negative
177 * in case of an error.
179 typedef int (*exe_q_optimize)(struct bnx2x *bp,
180 union bnx2x_qable_obj *o,
181 struct bnx2x_exeq_elem *elem);
182 typedef int (*exe_q_execute)(struct bnx2x *bp,
183 union bnx2x_qable_obj *o,
184 struct list_head *exe_chunk,
185 unsigned long *ramrod_flags);
186 typedef struct bnx2x_exeq_elem *
187 (*exe_q_get)(struct bnx2x_exe_queue_obj *o,
188 struct bnx2x_exeq_elem *elem);
190 struct bnx2x_exe_queue_obj {
192 * Commands pending for an execution.
194 struct list_head exe_queue;
197 * Commands pending for an completion.
199 struct list_head pending_comp;
203 /* Maximum length of commands' list for one execution */
206 union bnx2x_qable_obj *owner;
208 /****** Virtual functions ******/
210 * Called before commands execution for commands that are really
211 * going to be executed (after 'optimize').
213 * Must run under exe_queue->lock
215 exe_q_validate validate;
218 * Called before removing pending commands, cleaning allocated
219 * resources (e.g., credits from validate)
224 * This will try to cancel the current pending commands list
225 * considering the new command.
227 * Returns the number of optimized commands or a negative error code
229 * Must run under exe_queue->lock
231 exe_q_optimize optimize;
234 * Run the next commands chunk (owner specific).
236 exe_q_execute execute;
239 * Return the exe_queue element containing the specific command
240 * if any. Otherwise return NULL.
244 /***************** Classification verbs: Set/Del MAC/VLAN/VLAN-MAC ************/
246 * Element in the VLAN_MAC registry list having all currenty configured
249 struct bnx2x_vlan_mac_registry_elem {
250 struct list_head link;
253 * Used to store the cam offset used for the mac/vlan/vlan-mac.
254 * Relevant for 57710 and 57711 only. VLANs and MACs share the
255 * same CAM for these chips.
259 /* Needed for DEL and RESTORE flows */
260 unsigned long vlan_mac_flags;
262 union bnx2x_classification_ramrod_data u;
265 /* Bits representing VLAN_MAC commands specific flags */
271 BNX2X_DONT_CONSUME_CAM_CREDIT,
272 BNX2X_DONT_CONSUME_CAM_CREDIT_DEST,
275 struct bnx2x_vlan_mac_ramrod_params {
276 /* Object to run the command from */
277 struct bnx2x_vlan_mac_obj *vlan_mac_obj;
279 /* General command flags: COMP_WAIT, etc. */
280 unsigned long ramrod_flags;
282 /* Command specific configuration request */
283 struct bnx2x_vlan_mac_data user_req;
286 struct bnx2x_vlan_mac_obj {
287 struct bnx2x_raw_obj raw;
289 /* Bookkeeping list: will prevent the addition of already existing
292 struct list_head head;
294 /* TODO: Add it's initialization in the init functions */
295 struct bnx2x_exe_queue_obj exe_queue;
297 /* MACs credit pool */
298 struct bnx2x_credit_pool_obj *macs_pool;
300 /* VLANs credit pool */
301 struct bnx2x_credit_pool_obj *vlans_pool;
303 /* RAMROD command to be used */
306 /* copy first n elements onto preallocated buffer
308 * @param n number of elements to get
309 * @param buf buffer preallocated by caller into which elements
310 * will be copied. Note elements are 4-byte aligned
311 * so buffer size must be able to accomodate the
314 * @return number of copied bytes
316 int (*get_n_elements)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o,
320 * Checks if ADD-ramrod with the given params may be performed.
322 * @return zero if the element may be added
325 int (*check_add)(struct bnx2x *bp,
326 struct bnx2x_vlan_mac_obj *o,
327 union bnx2x_classification_ramrod_data *data);
330 * Checks if DEL-ramrod with the given params may be performed.
332 * @return true if the element may be deleted
334 struct bnx2x_vlan_mac_registry_elem *
335 (*check_del)(struct bnx2x *bp,
336 struct bnx2x_vlan_mac_obj *o,
337 union bnx2x_classification_ramrod_data *data);
340 * Checks if DEL-ramrod with the given params may be performed.
342 * @return true if the element may be deleted
344 bool (*check_move)(struct bnx2x *bp,
345 struct bnx2x_vlan_mac_obj *src_o,
346 struct bnx2x_vlan_mac_obj *dst_o,
347 union bnx2x_classification_ramrod_data *data);
350 * Update the relevant credit object(s) (consume/return
353 bool (*get_credit)(struct bnx2x_vlan_mac_obj *o);
354 bool (*put_credit)(struct bnx2x_vlan_mac_obj *o);
355 bool (*get_cam_offset)(struct bnx2x_vlan_mac_obj *o, int *offset);
356 bool (*put_cam_offset)(struct bnx2x_vlan_mac_obj *o, int offset);
359 * Configures one rule in the ramrod data buffer.
361 void (*set_one_rule)(struct bnx2x *bp,
362 struct bnx2x_vlan_mac_obj *o,
363 struct bnx2x_exeq_elem *elem, int rule_idx,
367 * Delete all configured elements having the given
368 * vlan_mac_flags specification. Assumes no pending for
369 * execution commands. Will schedule all all currently
370 * configured MACs/VLANs/VLAN-MACs matching the vlan_mac_flags
371 * specification for deletion and will use the given
372 * ramrod_flags for the last DEL operation.
376 * @param ramrod_flags RAMROD_XX flags
378 * @return 0 if the last operation has completed successfully
379 * and there are no more elements left, positive value
380 * if there are pending for completion commands,
381 * negative value in case of failure.
383 int (*delete_all)(struct bnx2x *bp,
384 struct bnx2x_vlan_mac_obj *o,
385 unsigned long *vlan_mac_flags,
386 unsigned long *ramrod_flags);
389 * Reconfigures the next MAC/VLAN/VLAN-MAC element from the previously
390 * configured elements list.
393 * @param p Command parameters (RAMROD_COMP_WAIT bit in
394 * ramrod_flags is only taken into an account)
395 * @param ppos a pointer to the cooky that should be given back in the
396 * next call to make function handle the next element. If
397 * *ppos is set to NULL it will restart the iterator.
398 * If returned *ppos == NULL this means that the last
399 * element has been handled.
403 int (*restore)(struct bnx2x *bp,
404 struct bnx2x_vlan_mac_ramrod_params *p,
405 struct bnx2x_vlan_mac_registry_elem **ppos);
408 * Should be called on a completion arival.
412 * @param cqe Completion element we are handling
413 * @param ramrod_flags if RAMROD_CONT is set the next bulk of
414 * pending commands will be executed.
415 * RAMROD_DRV_CLR_ONLY and RAMROD_RESTORE
416 * may also be set if needed.
418 * @return 0 if there are neither pending nor waiting for
419 * completion commands. Positive value if there are
420 * pending for execution or for completion commands.
421 * Negative value in case of an error (including an
424 int (*complete)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o,
425 union event_ring_elem *cqe,
426 unsigned long *ramrod_flags);
429 * Wait for completion of all commands. Don't schedule new ones,
430 * just wait. It assumes that the completion code will schedule
433 int (*wait)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o);
437 BNX2X_LLH_CAM_ISCSI_ETH_LINE = 0,
438 BNX2X_LLH_CAM_ETH_LINE,
439 BNX2X_LLH_CAM_MAX_PF_LINE = NIG_REG_LLH1_FUNC_MEM_SIZE / 2
442 void bnx2x_set_mac_in_nig(struct bnx2x *bp,
443 bool add, unsigned char *dev_addr, int index);
445 /** RX_MODE verbs:DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */
447 /* RX_MODE ramrod spesial flags: set in rx_mode_flags field in
448 * a bnx2x_rx_mode_ramrod_params.
451 BNX2X_RX_MODE_FCOE_ETH,
452 BNX2X_RX_MODE_ISCSI_ETH,
456 BNX2X_ACCEPT_UNICAST,
457 BNX2X_ACCEPT_MULTICAST,
458 BNX2X_ACCEPT_ALL_UNICAST,
459 BNX2X_ACCEPT_ALL_MULTICAST,
460 BNX2X_ACCEPT_BROADCAST,
461 BNX2X_ACCEPT_UNMATCHED,
462 BNX2X_ACCEPT_ANY_VLAN
465 struct bnx2x_rx_mode_ramrod_params {
466 struct bnx2x_rx_mode_obj *rx_mode_obj;
467 unsigned long *pstate;
472 unsigned long ramrod_flags;
473 unsigned long rx_mode_flags;
476 * rdata is either a pointer to eth_filter_rules_ramrod_data(e2) or to
477 * a tstorm_eth_mac_filter_config (e1x).
480 dma_addr_t rdata_mapping;
482 /* Rx mode settings */
483 unsigned long rx_accept_flags;
485 /* internal switching settings */
486 unsigned long tx_accept_flags;
489 struct bnx2x_rx_mode_obj {
490 int (*config_rx_mode)(struct bnx2x *bp,
491 struct bnx2x_rx_mode_ramrod_params *p);
493 int (*wait_comp)(struct bnx2x *bp,
494 struct bnx2x_rx_mode_ramrod_params *p);
497 /********************** Set multicast group ***********************************/
499 struct bnx2x_mcast_list_elem {
500 struct list_head link;
504 union bnx2x_mcast_config_data {
506 u8 bin; /* used in a RESTORE flow */
509 struct bnx2x_mcast_ramrod_params {
510 struct bnx2x_mcast_obj *mcast_obj;
512 /* Relevant options are RAMROD_COMP_WAIT and RAMROD_DRV_CLR_ONLY */
513 unsigned long ramrod_flags;
515 struct list_head mcast_list; /* list of struct bnx2x_mcast_list_elem */
517 * - rename it to macs_num.
518 * - Add a new command type for handling pending commands
519 * (remove "zero semantics").
521 * Length of mcast_list. If zero and ADD_CONT command - post
529 BNX2X_MCAST_CMD_CONT,
531 BNX2X_MCAST_CMD_RESTORE,
534 struct bnx2x_mcast_obj {
535 struct bnx2x_raw_obj raw;
539 #define BNX2X_MCAST_BINS_NUM 256
540 #define BNX2X_MCAST_VEC_SZ (BNX2X_MCAST_BINS_NUM / 64)
541 u64 vec[BNX2X_MCAST_VEC_SZ];
543 /** Number of BINs to clear. Should be updated
544 * immediately when a command arrives in order to
545 * properly create DEL commands.
551 struct list_head macs;
556 /* Pending commands */
557 struct list_head pending_cmds_head;
559 /* A state that is set in raw.pstate, when there are pending commands */
562 /* Maximal number of mcast MACs configured in one command */
565 /* Total number of currently pending MACs to configure: both
566 * in the pending commands list and in the current command.
568 int total_pending_num;
573 * @param cmd command to execute (BNX2X_MCAST_CMD_X, see above)
575 int (*config_mcast)(struct bnx2x *bp,
576 struct bnx2x_mcast_ramrod_params *p, int cmd);
579 * Fills the ramrod data during the RESTORE flow.
583 * @param start_idx Registry index to start from
584 * @param rdata_idx Index in the ramrod data to start from
586 * @return -1 if we handled the whole registry or index of the last
587 * handled registry element.
589 int (*hdl_restore)(struct bnx2x *bp, struct bnx2x_mcast_obj *o,
590 int start_bin, int *rdata_idx);
592 int (*enqueue_cmd)(struct bnx2x *bp, struct bnx2x_mcast_obj *o,
593 struct bnx2x_mcast_ramrod_params *p, int cmd);
595 void (*set_one_rule)(struct bnx2x *bp,
596 struct bnx2x_mcast_obj *o, int idx,
597 union bnx2x_mcast_config_data *cfg_data, int cmd);
599 /** Checks if there are more mcast MACs to be set or a previous
600 * command is still pending.
602 bool (*check_pending)(struct bnx2x_mcast_obj *o);
605 * Set/Clear/Check SCHEDULED state of the object
607 void (*set_sched)(struct bnx2x_mcast_obj *o);
608 void (*clear_sched)(struct bnx2x_mcast_obj *o);
609 bool (*check_sched)(struct bnx2x_mcast_obj *o);
611 /* Wait until all pending commands complete */
612 int (*wait_comp)(struct bnx2x *bp, struct bnx2x_mcast_obj *o);
615 * Handle the internal object counters needed for proper
616 * commands handling. Checks that the provided parameters are
619 int (*validate)(struct bnx2x *bp,
620 struct bnx2x_mcast_ramrod_params *p, int cmd);
623 * Restore the values of internal counters in case of a failure.
625 void (*revert)(struct bnx2x *bp,
626 struct bnx2x_mcast_ramrod_params *p,
629 int (*get_registry_size)(struct bnx2x_mcast_obj *o);
630 void (*set_registry_size)(struct bnx2x_mcast_obj *o, int n);
633 /*************************** Credit handling **********************************/
634 struct bnx2x_credit_pool_obj {
636 /* Current amount of credit in the pool */
639 /* Maximum allowed credit. put() will check against it. */
643 * Allocate a pool table statically.
645 * Currently the mamimum allowed size is MAX_MAC_CREDIT_E2(272)
647 * The set bit in the table will mean that the entry is available.
649 #define BNX2X_POOL_VEC_SIZE (MAX_MAC_CREDIT_E2 / 64)
650 u64 pool_mirror[BNX2X_POOL_VEC_SIZE];
652 /* Base pool offset (initialized differently */
653 int base_pool_offset;
656 * Get the next free pool entry.
658 * @return true if there was a free entry in the pool
660 bool (*get_entry)(struct bnx2x_credit_pool_obj *o, int *entry);
663 * Return the entry back to the pool.
665 * @return true if entry is legal and has been successfully
666 * returned to the pool.
668 bool (*put_entry)(struct bnx2x_credit_pool_obj *o, int entry);
671 * Get the requested amount of credit from the pool.
673 * @param cnt Amount of requested credit
674 * @return true if the operation is successful
676 bool (*get)(struct bnx2x_credit_pool_obj *o, int cnt);
679 * Returns the credit to the pool.
681 * @param cnt Amount of credit to return
682 * @return true if the operation is successful
684 bool (*put)(struct bnx2x_credit_pool_obj *o, int cnt);
687 * Reads the current amount of credit.
689 int (*check)(struct bnx2x_credit_pool_obj *o);
692 /*************************** RSS configuration ********************************/
694 /* RSS_MODE bits are mutually exclusive */
695 BNX2X_RSS_MODE_DISABLED,
696 BNX2X_RSS_MODE_REGULAR,
698 BNX2X_RSS_SET_SRCH, /* Setup searcher, E1x specific flag */
708 struct bnx2x_config_rss_params {
709 struct bnx2x_rss_config_obj *rss_obj;
711 /* may have RAMROD_COMP_WAIT set only */
712 unsigned long ramrod_flags;
714 /* BNX2X_RSS_X bits */
715 unsigned long rss_flags;
717 /* Number hash bits to take into an account */
720 /* Indirection table */
721 u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
723 /* RSS hash values */
726 /* valid only iff BNX2X_RSS_UPDATE_TOE is set */
730 struct bnx2x_rss_config_obj {
731 struct bnx2x_raw_obj raw;
733 /* RSS engine to use */
736 /* Last configured indirection table */
737 u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
739 /* flags for enabling 4-tupple hash on UDP */
743 int (*config_rss)(struct bnx2x *bp,
744 struct bnx2x_config_rss_params *p);
747 /*********************** Queue state update ***********************************/
749 /* UPDATE command options */
751 BNX2X_Q_UPDATE_IN_VLAN_REM,
752 BNX2X_Q_UPDATE_IN_VLAN_REM_CHNG,
753 BNX2X_Q_UPDATE_OUT_VLAN_REM,
754 BNX2X_Q_UPDATE_OUT_VLAN_REM_CHNG,
755 BNX2X_Q_UPDATE_ANTI_SPOOF,
756 BNX2X_Q_UPDATE_ANTI_SPOOF_CHNG,
757 BNX2X_Q_UPDATE_ACTIVATE,
758 BNX2X_Q_UPDATE_ACTIVATE_CHNG,
759 BNX2X_Q_UPDATE_DEF_VLAN_EN,
760 BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG,
761 BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,
762 BNX2X_Q_UPDATE_SILENT_VLAN_REM
765 /* Allowed Queue states */
768 BNX2X_Q_STATE_INITIALIZED,
769 BNX2X_Q_STATE_ACTIVE,
770 BNX2X_Q_STATE_MULTI_COS,
771 BNX2X_Q_STATE_MCOS_TERMINATED,
772 BNX2X_Q_STATE_INACTIVE,
773 BNX2X_Q_STATE_STOPPED,
774 BNX2X_Q_STATE_TERMINATED,
779 /* Allowed Queue states */
780 enum bnx2x_q_logical_state {
781 BNX2X_Q_LOGICAL_STATE_ACTIVE,
782 BNX2X_Q_LOGICAL_STATE_STOPPED,
785 /* Allowed commands */
786 enum bnx2x_queue_cmd {
789 BNX2X_Q_CMD_SETUP_TX_ONLY,
790 BNX2X_Q_CMD_DEACTIVATE,
791 BNX2X_Q_CMD_ACTIVATE,
793 BNX2X_Q_CMD_UPDATE_TPA,
796 BNX2X_Q_CMD_TERMINATE,
801 /* queue SETUP + INIT flags */
804 BNX2X_Q_FLG_TPA_IPV6,
807 BNX2X_Q_FLG_ZERO_STATS,
816 BNX2X_Q_FLG_LEADING_RSS,
818 BNX2X_Q_FLG_DEF_VLAN,
819 BNX2X_Q_FLG_TX_SWITCH,
821 BNX2X_Q_FLG_ANTI_SPOOF,
822 BNX2X_Q_FLG_SILENT_VLAN_REM,
823 BNX2X_Q_FLG_FORCE_DEFAULT_PRI
826 /* Queue type options: queue type may be a compination of below. */
828 /** TODO: Consider moving both these flags into the init()
835 #define BNX2X_PRIMARY_CID_INDEX 0
836 #define BNX2X_MULTI_TX_COS_E1X 3 /* QM only */
837 #define BNX2X_MULTI_TX_COS_E2_E3A0 2
838 #define BNX2X_MULTI_TX_COS_E3B0 3
839 #define BNX2X_MULTI_TX_COS 3 /* Maximum possible */
842 struct bnx2x_queue_init_params {
857 /* CID context in the host memory */
858 struct eth_context *cxts[BNX2X_MULTI_TX_COS];
860 /* maximum number of cos supported by hardware */
864 struct bnx2x_queue_terminate_params {
865 /* index within the tx_only cids of this queue object */
869 struct bnx2x_queue_cfc_del_params {
870 /* index within the tx_only cids of this queue object */
874 struct bnx2x_queue_update_params {
875 unsigned long update_flags; /* BNX2X_Q_UPDATE_XX bits */
877 u16 silent_removal_value;
878 u16 silent_removal_mask;
879 /* index within the tx_only cids of this queue object */
883 struct rxq_pause_params {
888 u16 sge_th_lo; /* valid iff BNX2X_Q_FLG_TPA */
889 u16 sge_th_hi; /* valid iff BNX2X_Q_FLG_TPA */
894 struct bnx2x_general_setup_params {
895 /* valid iff BNX2X_Q_FLG_STATS */
903 struct bnx2x_rxq_setup_params {
908 dma_addr_t rcq_np_map;
915 /* valid iff BNX2X_Q_FLG_TPA */
922 /* valid iff BNX2X_Q_FLG_MCAST */
929 /* valid iff BXN2X_Q_FLG_SILENT_VLAN_REM */
930 u16 silent_removal_value;
931 u16 silent_removal_mask;
934 struct bnx2x_txq_setup_params {
940 u8 cos; /* valid iff BNX2X_Q_FLG_COS */
942 /* equals to the leading rss client id, used for TX classification*/
943 u8 tss_leading_cl_id;
945 /* valid iff BNX2X_Q_FLG_DEF_VLAN */
949 struct bnx2x_queue_setup_params {
950 struct bnx2x_general_setup_params gen_params;
951 struct bnx2x_txq_setup_params txq_params;
952 struct bnx2x_rxq_setup_params rxq_params;
953 struct rxq_pause_params pause_params;
957 struct bnx2x_queue_setup_tx_only_params {
958 struct bnx2x_general_setup_params gen_params;
959 struct bnx2x_txq_setup_params txq_params;
961 /* index within the tx_only cids of this queue object */
965 struct bnx2x_queue_state_params {
966 struct bnx2x_queue_sp_obj *q_obj;
968 /* Current command */
969 enum bnx2x_queue_cmd cmd;
971 /* may have RAMROD_COMP_WAIT set only */
972 unsigned long ramrod_flags;
974 /* Params according to the current command */
976 struct bnx2x_queue_update_params update;
977 struct bnx2x_queue_setup_params setup;
978 struct bnx2x_queue_init_params init;
979 struct bnx2x_queue_setup_tx_only_params tx_only;
980 struct bnx2x_queue_terminate_params terminate;
981 struct bnx2x_queue_cfc_del_params cfc_del;
985 struct bnx2x_viflist_params {
990 struct bnx2x_queue_sp_obj {
991 u32 cids[BNX2X_MULTI_TX_COS];
996 * number of traffic classes supported by queue.
997 * The primary connection of the queue suppotrs the first traffic
998 * class. Any further traffic class is suppoted by a tx-only
1001 * Therefore max_cos is also a number of valid entries in the cids
1005 u8 num_tx_only, next_tx_only;
1007 enum bnx2x_q_state state, next_state;
1009 /* bits from enum bnx2x_q_type */
1012 /* BNX2X_Q_CMD_XX bits. This object implements "one
1013 * pending" paradigm but for debug and tracing purposes it's
1014 * more convinient to have different bits for different
1017 unsigned long pending;
1019 /* Buffer to use as a ramrod data and its mapping */
1021 dma_addr_t rdata_mapping;
1024 * Performs one state change according to the given parameters.
1026 * @return 0 in case of success and negative value otherwise.
1028 int (*send_cmd)(struct bnx2x *bp,
1029 struct bnx2x_queue_state_params *params);
1032 * Sets the pending bit according to the requested transition.
1034 int (*set_pending)(struct bnx2x_queue_sp_obj *o,
1035 struct bnx2x_queue_state_params *params);
1038 * Checks that the requested state transition is legal.
1040 int (*check_transition)(struct bnx2x *bp,
1041 struct bnx2x_queue_sp_obj *o,
1042 struct bnx2x_queue_state_params *params);
1045 * Completes the pending command.
1047 int (*complete_cmd)(struct bnx2x *bp,
1048 struct bnx2x_queue_sp_obj *o,
1049 enum bnx2x_queue_cmd);
1051 int (*wait_comp)(struct bnx2x *bp,
1052 struct bnx2x_queue_sp_obj *o,
1053 enum bnx2x_queue_cmd cmd);
1056 /********************** Function state update *********************************/
1057 /* Allowed Function states */
1058 enum bnx2x_func_state {
1059 BNX2X_F_STATE_RESET,
1060 BNX2X_F_STATE_INITIALIZED,
1061 BNX2X_F_STATE_STARTED,
1062 BNX2X_F_STATE_TX_STOPPED,
1066 /* Allowed Function commands */
1067 enum bnx2x_func_cmd {
1068 BNX2X_F_CMD_HW_INIT,
1071 BNX2X_F_CMD_HW_RESET,
1072 BNX2X_F_CMD_AFEX_UPDATE,
1073 BNX2X_F_CMD_AFEX_VIFLISTS,
1074 BNX2X_F_CMD_TX_STOP,
1075 BNX2X_F_CMD_TX_START,
1076 BNX2X_F_CMD_SWITCH_UPDATE,
1080 struct bnx2x_func_hw_init_params {
1081 /* A load phase returned by MCP.
1084 * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
1085 * FW_MSG_CODE_DRV_LOAD_COMMON
1086 * FW_MSG_CODE_DRV_LOAD_PORT
1087 * FW_MSG_CODE_DRV_LOAD_FUNCTION
1092 struct bnx2x_func_hw_reset_params {
1093 /* A load phase returned by MCP.
1096 * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
1097 * FW_MSG_CODE_DRV_LOAD_COMMON
1098 * FW_MSG_CODE_DRV_LOAD_PORT
1099 * FW_MSG_CODE_DRV_LOAD_FUNCTION
1104 struct bnx2x_func_start_params {
1105 /* Multi Function mode:
1107 * - Switch Dependent
1108 * - Switch Independent
1112 /* Switch Dependent mode outer VLAN tag */
1115 /* Function cos mode */
1116 u8 network_cos_mode;
1119 struct bnx2x_func_switch_update_params {
1123 struct bnx2x_func_afex_update_params {
1125 u16 afex_default_vlan;
1126 u8 allowed_priorities;
1129 struct bnx2x_func_afex_viflists_params {
1132 u8 afex_vif_list_command;
1135 struct bnx2x_func_tx_start_params {
1136 struct priority_cos traffic_type_to_priority_cos[MAX_TRAFFIC_TYPES];
1139 u8 dont_add_pri_0_en;
1142 struct bnx2x_func_state_params {
1143 struct bnx2x_func_sp_obj *f_obj;
1145 /* Current command */
1146 enum bnx2x_func_cmd cmd;
1148 /* may have RAMROD_COMP_WAIT set only */
1149 unsigned long ramrod_flags;
1151 /* Params according to the current command */
1153 struct bnx2x_func_hw_init_params hw_init;
1154 struct bnx2x_func_hw_reset_params hw_reset;
1155 struct bnx2x_func_start_params start;
1156 struct bnx2x_func_switch_update_params switch_update;
1157 struct bnx2x_func_afex_update_params afex_update;
1158 struct bnx2x_func_afex_viflists_params afex_viflists;
1159 struct bnx2x_func_tx_start_params tx_start;
1163 struct bnx2x_func_sp_drv_ops {
1164 /* Init tool + runtime initialization:
1166 * - Common (per Path)
1170 int (*init_hw_cmn_chip)(struct bnx2x *bp);
1171 int (*init_hw_cmn)(struct bnx2x *bp);
1172 int (*init_hw_port)(struct bnx2x *bp);
1173 int (*init_hw_func)(struct bnx2x *bp);
1175 /* Reset Function HW: Common, Port, Function phases. */
1176 void (*reset_hw_cmn)(struct bnx2x *bp);
1177 void (*reset_hw_port)(struct bnx2x *bp);
1178 void (*reset_hw_func)(struct bnx2x *bp);
1180 /* Init/Free GUNZIP resources */
1181 int (*gunzip_init)(struct bnx2x *bp);
1182 void (*gunzip_end)(struct bnx2x *bp);
1184 /* Prepare/Release FW resources */
1185 int (*init_fw)(struct bnx2x *bp);
1186 void (*release_fw)(struct bnx2x *bp);
1189 struct bnx2x_func_sp_obj {
1190 enum bnx2x_func_state state, next_state;
1192 /* BNX2X_FUNC_CMD_XX bits. This object implements "one
1193 * pending" paradigm but for debug and tracing purposes it's
1194 * more convinient to have different bits for different
1197 unsigned long pending;
1199 /* Buffer to use as a ramrod data and its mapping */
1201 dma_addr_t rdata_mapping;
1203 /* Buffer to use as a afex ramrod data and its mapping.
1204 * This can't be same rdata as above because afex ramrod requests
1205 * can arrive to the object in parallel to other ramrod requests.
1208 dma_addr_t afex_rdata_mapping;
1210 /* this mutex validates that when pending flag is taken, the next
1211 * ramrod to be sent will be the one set the pending bit
1213 struct mutex one_pending_mutex;
1215 /* Driver interface */
1216 struct bnx2x_func_sp_drv_ops *drv;
1219 * Performs one state change according to the given parameters.
1221 * @return 0 in case of success and negative value otherwise.
1223 int (*send_cmd)(struct bnx2x *bp,
1224 struct bnx2x_func_state_params *params);
1227 * Checks that the requested state transition is legal.
1229 int (*check_transition)(struct bnx2x *bp,
1230 struct bnx2x_func_sp_obj *o,
1231 struct bnx2x_func_state_params *params);
1234 * Completes the pending command.
1236 int (*complete_cmd)(struct bnx2x *bp,
1237 struct bnx2x_func_sp_obj *o,
1238 enum bnx2x_func_cmd cmd);
1240 int (*wait_comp)(struct bnx2x *bp, struct bnx2x_func_sp_obj *o,
1241 enum bnx2x_func_cmd cmd);
1244 /********************** Interfaces ********************************************/
1245 /* Queueable objects set */
1246 union bnx2x_qable_obj {
1247 struct bnx2x_vlan_mac_obj vlan_mac;
1249 /************** Function state update *********/
1250 void bnx2x_init_func_obj(struct bnx2x *bp,
1251 struct bnx2x_func_sp_obj *obj,
1252 void *rdata, dma_addr_t rdata_mapping,
1253 void *afex_rdata, dma_addr_t afex_rdata_mapping,
1254 struct bnx2x_func_sp_drv_ops *drv_iface);
1256 int bnx2x_func_state_change(struct bnx2x *bp,
1257 struct bnx2x_func_state_params *params);
1259 enum bnx2x_func_state bnx2x_func_get_state(struct bnx2x *bp,
1260 struct bnx2x_func_sp_obj *o);
1261 /******************* Queue State **************/
1262 void bnx2x_init_queue_obj(struct bnx2x *bp,
1263 struct bnx2x_queue_sp_obj *obj, u8 cl_id, u32 *cids,
1264 u8 cid_cnt, u8 func_id, void *rdata,
1265 dma_addr_t rdata_mapping, unsigned long type);
1267 int bnx2x_queue_state_change(struct bnx2x *bp,
1268 struct bnx2x_queue_state_params *params);
1270 int bnx2x_get_q_logical_state(struct bnx2x *bp,
1271 struct bnx2x_queue_sp_obj *obj);
1273 /********************* VLAN-MAC ****************/
1274 void bnx2x_init_mac_obj(struct bnx2x *bp,
1275 struct bnx2x_vlan_mac_obj *mac_obj,
1276 u8 cl_id, u32 cid, u8 func_id, void *rdata,
1277 dma_addr_t rdata_mapping, int state,
1278 unsigned long *pstate, bnx2x_obj_type type,
1279 struct bnx2x_credit_pool_obj *macs_pool);
1281 void bnx2x_init_vlan_obj(struct bnx2x *bp,
1282 struct bnx2x_vlan_mac_obj *vlan_obj,
1283 u8 cl_id, u32 cid, u8 func_id, void *rdata,
1284 dma_addr_t rdata_mapping, int state,
1285 unsigned long *pstate, bnx2x_obj_type type,
1286 struct bnx2x_credit_pool_obj *vlans_pool);
1288 void bnx2x_init_vlan_mac_obj(struct bnx2x *bp,
1289 struct bnx2x_vlan_mac_obj *vlan_mac_obj,
1290 u8 cl_id, u32 cid, u8 func_id, void *rdata,
1291 dma_addr_t rdata_mapping, int state,
1292 unsigned long *pstate, bnx2x_obj_type type,
1293 struct bnx2x_credit_pool_obj *macs_pool,
1294 struct bnx2x_credit_pool_obj *vlans_pool);
1296 int bnx2x_config_vlan_mac(struct bnx2x *bp,
1297 struct bnx2x_vlan_mac_ramrod_params *p);
1299 int bnx2x_vlan_mac_move(struct bnx2x *bp,
1300 struct bnx2x_vlan_mac_ramrod_params *p,
1301 struct bnx2x_vlan_mac_obj *dest_o);
1303 /********************* RX MODE ****************/
1305 void bnx2x_init_rx_mode_obj(struct bnx2x *bp,
1306 struct bnx2x_rx_mode_obj *o);
1309 * bnx2x_config_rx_mode - Send and RX_MODE ramrod according to the provided parameters.
1311 * @p: Command parameters
1313 * Return: 0 - if operation was successfull and there is no pending completions,
1314 * positive number - if there are pending completions,
1315 * negative - if there were errors
1317 int bnx2x_config_rx_mode(struct bnx2x *bp,
1318 struct bnx2x_rx_mode_ramrod_params *p);
1320 /****************** MULTICASTS ****************/
1322 void bnx2x_init_mcast_obj(struct bnx2x *bp,
1323 struct bnx2x_mcast_obj *mcast_obj,
1324 u8 mcast_cl_id, u32 mcast_cid, u8 func_id,
1325 u8 engine_id, void *rdata, dma_addr_t rdata_mapping,
1326 int state, unsigned long *pstate,
1327 bnx2x_obj_type type);
1330 * bnx2x_config_mcast - Configure multicast MACs list.
1332 * @cmd: command to execute: BNX2X_MCAST_CMD_X
1334 * May configure a new list
1335 * provided in p->mcast_list (BNX2X_MCAST_CMD_ADD), clean up
1336 * (BNX2X_MCAST_CMD_DEL) or restore (BNX2X_MCAST_CMD_RESTORE) a current
1337 * configuration, continue to execute the pending commands
1338 * (BNX2X_MCAST_CMD_CONT).
1340 * If previous command is still pending or if number of MACs to
1341 * configure is more that maximum number of MACs in one command,
1342 * the current command will be enqueued to the tail of the
1343 * pending commands list.
1345 * Return: 0 is operation was successfull and there are no pending completions,
1346 * negative if there were errors, positive if there are pending
1349 int bnx2x_config_mcast(struct bnx2x *bp,
1350 struct bnx2x_mcast_ramrod_params *p, int cmd);
1352 /****************** CREDIT POOL ****************/
1353 void bnx2x_init_mac_credit_pool(struct bnx2x *bp,
1354 struct bnx2x_credit_pool_obj *p, u8 func_id,
1356 void bnx2x_init_vlan_credit_pool(struct bnx2x *bp,
1357 struct bnx2x_credit_pool_obj *p, u8 func_id,
1361 /****************** RSS CONFIGURATION ****************/
1362 void bnx2x_init_rss_config_obj(struct bnx2x *bp,
1363 struct bnx2x_rss_config_obj *rss_obj,
1364 u8 cl_id, u32 cid, u8 func_id, u8 engine_id,
1365 void *rdata, dma_addr_t rdata_mapping,
1366 int state, unsigned long *pstate,
1367 bnx2x_obj_type type);
1370 * bnx2x_config_rss - Updates RSS configuration according to provided parameters
1372 * Return: 0 in case of success
1374 int bnx2x_config_rss(struct bnx2x *bp,
1375 struct bnx2x_config_rss_params *p);
1378 * bnx2x_get_rss_ind_table - Return the current ind_table configuration.
1380 * @ind_table: buffer to fill with the current indirection
1381 * table content. Should be at least
1382 * T_ETH_INDIRECTION_TABLE_SIZE bytes long.
1384 void bnx2x_get_rss_ind_table(struct bnx2x_rss_config_obj *rss_obj,
1387 #endif /* BNX2X_SP_VERBS */