1 /* bnx2x_sp.h: Broadcom Everest network driver.
3 * Copyright (c) 2011-2013 Broadcom Corporation
5 * Unless you and Broadcom execute a separate written software license
6 * agreement governing use of this software, this software is licensed to you
7 * under the terms of the GNU General Public License version 2, available
8 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
10 * Notwithstanding the above, under no circumstances may you combine this
11 * software in any way with any other Broadcom software provided under a
12 * license other than the GPL, without Broadcom's express prior written
15 * Maintained by: Eilon Greenstein <eilong@broadcom.com>
16 * Written by: Vladislav Zolotarov
19 #ifndef BNX2X_SP_VERBS
20 #define BNX2X_SP_VERBS
25 /* Bits representing general command's configuration */
29 /* Wait until all pending commands complete */
31 /* Don't send a ramrod, only update a registry */
33 /* Configure HW according to the current object state */
35 /* Execute the next command now */
37 /* Don't add a new command and continue execution of postponed
38 * commands. If not set a new command will be added to the
39 * pending commands list.
42 /* If there is another pending ramrod, wait until it finishes and
43 * re-try to submit this one. This flag can be set only in sleepable
44 * context, and should not be set from the context that completes the
45 * ramrods as deadlock will occur.
56 /* Public slow path states */
58 BNX2X_FILTER_MAC_PENDING,
59 BNX2X_FILTER_VLAN_PENDING,
60 BNX2X_FILTER_VLAN_MAC_PENDING,
61 BNX2X_FILTER_RX_MODE_PENDING,
62 BNX2X_FILTER_RX_MODE_SCHED,
63 BNX2X_FILTER_ISCSI_ETH_START_SCHED,
64 BNX2X_FILTER_ISCSI_ETH_STOP_SCHED,
65 BNX2X_FILTER_FCOE_ETH_START_SCHED,
66 BNX2X_FILTER_FCOE_ETH_STOP_SCHED,
67 BNX2X_FILTER_MCAST_PENDING,
68 BNX2X_FILTER_MCAST_SCHED,
69 BNX2X_FILTER_RSS_CONF_PENDING,
70 BNX2X_AFEX_FCOE_Q_UPDATE_PENDING,
71 BNX2X_AFEX_PENDING_VIFSET_MCP_ACK
74 struct bnx2x_raw_obj {
81 /* Ramrod data buffer params */
83 dma_addr_t rdata_mapping;
85 /* Ramrod state params */
86 int state; /* "ramrod is pending" state bit */
87 unsigned long *pstate; /* pointer to state buffer */
89 bnx2x_obj_type obj_type;
91 int (*wait_comp)(struct bnx2x *bp,
92 struct bnx2x_raw_obj *o);
94 bool (*check_pending)(struct bnx2x_raw_obj *o);
95 void (*clear_pending)(struct bnx2x_raw_obj *o);
96 void (*set_pending)(struct bnx2x_raw_obj *o);
99 /************************* VLAN-MAC commands related parameters ***************/
100 struct bnx2x_mac_ramrod_data {
105 struct bnx2x_vlan_ramrod_data {
109 struct bnx2x_vlan_mac_ramrod_data {
115 union bnx2x_classification_ramrod_data {
116 struct bnx2x_mac_ramrod_data mac;
117 struct bnx2x_vlan_ramrod_data vlan;
118 struct bnx2x_vlan_mac_ramrod_data vlan_mac;
121 /* VLAN_MAC commands */
122 enum bnx2x_vlan_mac_cmd {
128 struct bnx2x_vlan_mac_data {
129 /* Requested command: BNX2X_VLAN_MAC_XX */
130 enum bnx2x_vlan_mac_cmd cmd;
131 /* used to contain the data related vlan_mac_flags bits from
134 unsigned long vlan_mac_flags;
136 /* Needed for MOVE command */
137 struct bnx2x_vlan_mac_obj *target_obj;
139 union bnx2x_classification_ramrod_data u;
142 /*************************** Exe Queue obj ************************************/
143 union bnx2x_exe_queue_cmd_data {
144 struct bnx2x_vlan_mac_data vlan_mac;
151 struct bnx2x_exeq_elem {
152 struct list_head link;
154 /* Length of this element in the exe_chunk. */
157 union bnx2x_exe_queue_cmd_data cmd_data;
160 union bnx2x_qable_obj;
162 union bnx2x_exeq_comp_elem {
163 union event_ring_elem *elem;
166 struct bnx2x_exe_queue_obj;
168 typedef int (*exe_q_validate)(struct bnx2x *bp,
169 union bnx2x_qable_obj *o,
170 struct bnx2x_exeq_elem *elem);
172 typedef int (*exe_q_remove)(struct bnx2x *bp,
173 union bnx2x_qable_obj *o,
174 struct bnx2x_exeq_elem *elem);
176 /* Return positive if entry was optimized, 0 - if not, negative
177 * in case of an error.
179 typedef int (*exe_q_optimize)(struct bnx2x *bp,
180 union bnx2x_qable_obj *o,
181 struct bnx2x_exeq_elem *elem);
182 typedef int (*exe_q_execute)(struct bnx2x *bp,
183 union bnx2x_qable_obj *o,
184 struct list_head *exe_chunk,
185 unsigned long *ramrod_flags);
186 typedef struct bnx2x_exeq_elem *
187 (*exe_q_get)(struct bnx2x_exe_queue_obj *o,
188 struct bnx2x_exeq_elem *elem);
190 struct bnx2x_exe_queue_obj {
191 /* Commands pending for an execution. */
192 struct list_head exe_queue;
194 /* Commands pending for an completion. */
195 struct list_head pending_comp;
199 /* Maximum length of commands' list for one execution */
202 union bnx2x_qable_obj *owner;
204 /****** Virtual functions ******/
206 * Called before commands execution for commands that are really
207 * going to be executed (after 'optimize').
209 * Must run under exe_queue->lock
211 exe_q_validate validate;
214 * Called before removing pending commands, cleaning allocated
215 * resources (e.g., credits from validate)
220 * This will try to cancel the current pending commands list
221 * considering the new command.
223 * Returns the number of optimized commands or a negative error code
225 * Must run under exe_queue->lock
227 exe_q_optimize optimize;
230 * Run the next commands chunk (owner specific).
232 exe_q_execute execute;
235 * Return the exe_queue element containing the specific command
236 * if any. Otherwise return NULL.
240 /***************** Classification verbs: Set/Del MAC/VLAN/VLAN-MAC ************/
242 * Element in the VLAN_MAC registry list having all currently configured
245 struct bnx2x_vlan_mac_registry_elem {
246 struct list_head link;
248 /* Used to store the cam offset used for the mac/vlan/vlan-mac.
249 * Relevant for 57710 and 57711 only. VLANs and MACs share the
250 * same CAM for these chips.
254 /* Needed for DEL and RESTORE flows */
255 unsigned long vlan_mac_flags;
257 union bnx2x_classification_ramrod_data u;
260 /* Bits representing VLAN_MAC commands specific flags */
266 BNX2X_DONT_CONSUME_CAM_CREDIT,
267 BNX2X_DONT_CONSUME_CAM_CREDIT_DEST,
270 struct bnx2x_vlan_mac_ramrod_params {
271 /* Object to run the command from */
272 struct bnx2x_vlan_mac_obj *vlan_mac_obj;
274 /* General command flags: COMP_WAIT, etc. */
275 unsigned long ramrod_flags;
277 /* Command specific configuration request */
278 struct bnx2x_vlan_mac_data user_req;
281 struct bnx2x_vlan_mac_obj {
282 struct bnx2x_raw_obj raw;
284 /* Bookkeeping list: will prevent the addition of already existing
287 struct list_head head;
288 /* Implement a simple reader/writer lock on the head list.
289 * all these fields should only be accessed under the exe_queue lock
291 u8 head_reader; /* Num. of readers accessing head list */
292 bool head_exe_request; /* Pending execution request. */
293 unsigned long saved_ramrod_flags; /* Ramrods of pending execution */
295 /* TODO: Add it's initialization in the init functions */
296 struct bnx2x_exe_queue_obj exe_queue;
298 /* MACs credit pool */
299 struct bnx2x_credit_pool_obj *macs_pool;
301 /* VLANs credit pool */
302 struct bnx2x_credit_pool_obj *vlans_pool;
304 /* RAMROD command to be used */
307 /* copy first n elements onto preallocated buffer
309 * @param n number of elements to get
310 * @param buf buffer preallocated by caller into which elements
311 * will be copied. Note elements are 4-byte aligned
312 * so buffer size must be able to accommodate the
315 * @return number of copied bytes
317 int (*get_n_elements)(struct bnx2x *bp,
318 struct bnx2x_vlan_mac_obj *o, int n, u8 *base,
322 * Checks if ADD-ramrod with the given params may be performed.
324 * @return zero if the element may be added
327 int (*check_add)(struct bnx2x *bp,
328 struct bnx2x_vlan_mac_obj *o,
329 union bnx2x_classification_ramrod_data *data);
332 * Checks if DEL-ramrod with the given params may be performed.
334 * @return true if the element may be deleted
336 struct bnx2x_vlan_mac_registry_elem *
337 (*check_del)(struct bnx2x *bp,
338 struct bnx2x_vlan_mac_obj *o,
339 union bnx2x_classification_ramrod_data *data);
342 * Checks if DEL-ramrod with the given params may be performed.
344 * @return true if the element may be deleted
346 bool (*check_move)(struct bnx2x *bp,
347 struct bnx2x_vlan_mac_obj *src_o,
348 struct bnx2x_vlan_mac_obj *dst_o,
349 union bnx2x_classification_ramrod_data *data);
352 * Update the relevant credit object(s) (consume/return
355 bool (*get_credit)(struct bnx2x_vlan_mac_obj *o);
356 bool (*put_credit)(struct bnx2x_vlan_mac_obj *o);
357 bool (*get_cam_offset)(struct bnx2x_vlan_mac_obj *o, int *offset);
358 bool (*put_cam_offset)(struct bnx2x_vlan_mac_obj *o, int offset);
361 * Configures one rule in the ramrod data buffer.
363 void (*set_one_rule)(struct bnx2x *bp,
364 struct bnx2x_vlan_mac_obj *o,
365 struct bnx2x_exeq_elem *elem, int rule_idx,
369 * Delete all configured elements having the given
370 * vlan_mac_flags specification. Assumes no pending for
371 * execution commands. Will schedule all all currently
372 * configured MACs/VLANs/VLAN-MACs matching the vlan_mac_flags
373 * specification for deletion and will use the given
374 * ramrod_flags for the last DEL operation.
378 * @param ramrod_flags RAMROD_XX flags
380 * @return 0 if the last operation has completed successfully
381 * and there are no more elements left, positive value
382 * if there are pending for completion commands,
383 * negative value in case of failure.
385 int (*delete_all)(struct bnx2x *bp,
386 struct bnx2x_vlan_mac_obj *o,
387 unsigned long *vlan_mac_flags,
388 unsigned long *ramrod_flags);
391 * Reconfigures the next MAC/VLAN/VLAN-MAC element from the previously
392 * configured elements list.
395 * @param p Command parameters (RAMROD_COMP_WAIT bit in
396 * ramrod_flags is only taken into an account)
397 * @param ppos a pointer to the cookie that should be given back in the
398 * next call to make function handle the next element. If
399 * *ppos is set to NULL it will restart the iterator.
400 * If returned *ppos == NULL this means that the last
401 * element has been handled.
405 int (*restore)(struct bnx2x *bp,
406 struct bnx2x_vlan_mac_ramrod_params *p,
407 struct bnx2x_vlan_mac_registry_elem **ppos);
410 * Should be called on a completion arrival.
414 * @param cqe Completion element we are handling
415 * @param ramrod_flags if RAMROD_CONT is set the next bulk of
416 * pending commands will be executed.
417 * RAMROD_DRV_CLR_ONLY and RAMROD_RESTORE
418 * may also be set if needed.
420 * @return 0 if there are neither pending nor waiting for
421 * completion commands. Positive value if there are
422 * pending for execution or for completion commands.
423 * Negative value in case of an error (including an
426 int (*complete)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o,
427 union event_ring_elem *cqe,
428 unsigned long *ramrod_flags);
431 * Wait for completion of all commands. Don't schedule new ones,
432 * just wait. It assumes that the completion code will schedule
435 int (*wait)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o);
439 BNX2X_LLH_CAM_ISCSI_ETH_LINE = 0,
440 BNX2X_LLH_CAM_ETH_LINE,
441 BNX2X_LLH_CAM_MAX_PF_LINE = NIG_REG_LLH1_FUNC_MEM_SIZE / 2
444 void bnx2x_set_mac_in_nig(struct bnx2x *bp,
445 bool add, unsigned char *dev_addr, int index);
447 /** RX_MODE verbs:DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */
449 /* RX_MODE ramrod special flags: set in rx_mode_flags field in
450 * a bnx2x_rx_mode_ramrod_params.
453 BNX2X_RX_MODE_FCOE_ETH,
454 BNX2X_RX_MODE_ISCSI_ETH,
458 BNX2X_ACCEPT_UNICAST,
459 BNX2X_ACCEPT_MULTICAST,
460 BNX2X_ACCEPT_ALL_UNICAST,
461 BNX2X_ACCEPT_ALL_MULTICAST,
462 BNX2X_ACCEPT_BROADCAST,
463 BNX2X_ACCEPT_UNMATCHED,
464 BNX2X_ACCEPT_ANY_VLAN
467 struct bnx2x_rx_mode_ramrod_params {
468 struct bnx2x_rx_mode_obj *rx_mode_obj;
469 unsigned long *pstate;
474 unsigned long ramrod_flags;
475 unsigned long rx_mode_flags;
477 /* rdata is either a pointer to eth_filter_rules_ramrod_data(e2) or to
478 * a tstorm_eth_mac_filter_config (e1x).
481 dma_addr_t rdata_mapping;
483 /* Rx mode settings */
484 unsigned long rx_accept_flags;
486 /* internal switching settings */
487 unsigned long tx_accept_flags;
490 struct bnx2x_rx_mode_obj {
491 int (*config_rx_mode)(struct bnx2x *bp,
492 struct bnx2x_rx_mode_ramrod_params *p);
494 int (*wait_comp)(struct bnx2x *bp,
495 struct bnx2x_rx_mode_ramrod_params *p);
498 /********************** Set multicast group ***********************************/
500 struct bnx2x_mcast_list_elem {
501 struct list_head link;
505 union bnx2x_mcast_config_data {
507 u8 bin; /* used in a RESTORE flow */
510 struct bnx2x_mcast_ramrod_params {
511 struct bnx2x_mcast_obj *mcast_obj;
513 /* Relevant options are RAMROD_COMP_WAIT and RAMROD_DRV_CLR_ONLY */
514 unsigned long ramrod_flags;
516 struct list_head mcast_list; /* list of struct bnx2x_mcast_list_elem */
518 * - rename it to macs_num.
519 * - Add a new command type for handling pending commands
520 * (remove "zero semantics").
522 * Length of mcast_list. If zero and ADD_CONT command - post
528 enum bnx2x_mcast_cmd {
530 BNX2X_MCAST_CMD_CONT,
532 BNX2X_MCAST_CMD_RESTORE,
535 struct bnx2x_mcast_obj {
536 struct bnx2x_raw_obj raw;
540 #define BNX2X_MCAST_BINS_NUM 256
541 #define BNX2X_MCAST_VEC_SZ (BNX2X_MCAST_BINS_NUM / 64)
542 u64 vec[BNX2X_MCAST_VEC_SZ];
544 /** Number of BINs to clear. Should be updated
545 * immediately when a command arrives in order to
546 * properly create DEL commands.
552 struct list_head macs;
557 /* Pending commands */
558 struct list_head pending_cmds_head;
560 /* A state that is set in raw.pstate, when there are pending commands */
563 /* Maximal number of mcast MACs configured in one command */
566 /* Total number of currently pending MACs to configure: both
567 * in the pending commands list and in the current command.
569 int total_pending_num;
574 * @param cmd command to execute (BNX2X_MCAST_CMD_X, see above)
576 int (*config_mcast)(struct bnx2x *bp,
577 struct bnx2x_mcast_ramrod_params *p,
578 enum bnx2x_mcast_cmd cmd);
581 * Fills the ramrod data during the RESTORE flow.
585 * @param start_idx Registry index to start from
586 * @param rdata_idx Index in the ramrod data to start from
588 * @return -1 if we handled the whole registry or index of the last
589 * handled registry element.
591 int (*hdl_restore)(struct bnx2x *bp, struct bnx2x_mcast_obj *o,
592 int start_bin, int *rdata_idx);
594 int (*enqueue_cmd)(struct bnx2x *bp, struct bnx2x_mcast_obj *o,
595 struct bnx2x_mcast_ramrod_params *p,
596 enum bnx2x_mcast_cmd cmd);
598 void (*set_one_rule)(struct bnx2x *bp,
599 struct bnx2x_mcast_obj *o, int idx,
600 union bnx2x_mcast_config_data *cfg_data,
601 enum bnx2x_mcast_cmd cmd);
603 /** Checks if there are more mcast MACs to be set or a previous
604 * command is still pending.
606 bool (*check_pending)(struct bnx2x_mcast_obj *o);
609 * Set/Clear/Check SCHEDULED state of the object
611 void (*set_sched)(struct bnx2x_mcast_obj *o);
612 void (*clear_sched)(struct bnx2x_mcast_obj *o);
613 bool (*check_sched)(struct bnx2x_mcast_obj *o);
615 /* Wait until all pending commands complete */
616 int (*wait_comp)(struct bnx2x *bp, struct bnx2x_mcast_obj *o);
619 * Handle the internal object counters needed for proper
620 * commands handling. Checks that the provided parameters are
623 int (*validate)(struct bnx2x *bp,
624 struct bnx2x_mcast_ramrod_params *p,
625 enum bnx2x_mcast_cmd cmd);
628 * Restore the values of internal counters in case of a failure.
630 void (*revert)(struct bnx2x *bp,
631 struct bnx2x_mcast_ramrod_params *p,
634 int (*get_registry_size)(struct bnx2x_mcast_obj *o);
635 void (*set_registry_size)(struct bnx2x_mcast_obj *o, int n);
638 /*************************** Credit handling **********************************/
639 struct bnx2x_credit_pool_obj {
641 /* Current amount of credit in the pool */
644 /* Maximum allowed credit. put() will check against it. */
647 /* Allocate a pool table statically.
649 * Currently the maximum allowed size is MAX_MAC_CREDIT_E2(272)
651 * The set bit in the table will mean that the entry is available.
653 #define BNX2X_POOL_VEC_SIZE (MAX_MAC_CREDIT_E2 / 64)
654 u64 pool_mirror[BNX2X_POOL_VEC_SIZE];
656 /* Base pool offset (initialized differently */
657 int base_pool_offset;
660 * Get the next free pool entry.
662 * @return true if there was a free entry in the pool
664 bool (*get_entry)(struct bnx2x_credit_pool_obj *o, int *entry);
667 * Return the entry back to the pool.
669 * @return true if entry is legal and has been successfully
670 * returned to the pool.
672 bool (*put_entry)(struct bnx2x_credit_pool_obj *o, int entry);
675 * Get the requested amount of credit from the pool.
677 * @param cnt Amount of requested credit
678 * @return true if the operation is successful
680 bool (*get)(struct bnx2x_credit_pool_obj *o, int cnt);
683 * Returns the credit to the pool.
685 * @param cnt Amount of credit to return
686 * @return true if the operation is successful
688 bool (*put)(struct bnx2x_credit_pool_obj *o, int cnt);
691 * Reads the current amount of credit.
693 int (*check)(struct bnx2x_credit_pool_obj *o);
696 /*************************** RSS configuration ********************************/
698 /* RSS_MODE bits are mutually exclusive */
699 BNX2X_RSS_MODE_DISABLED,
700 BNX2X_RSS_MODE_REGULAR,
702 BNX2X_RSS_SET_SRCH, /* Setup searcher, E1x specific flag */
712 struct bnx2x_config_rss_params {
713 struct bnx2x_rss_config_obj *rss_obj;
715 /* may have RAMROD_COMP_WAIT set only */
716 unsigned long ramrod_flags;
718 /* BNX2X_RSS_X bits */
719 unsigned long rss_flags;
721 /* Number hash bits to take into an account */
724 /* Indirection table */
725 u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
727 /* RSS hash values */
730 /* valid only iff BNX2X_RSS_UPDATE_TOE is set */
734 struct bnx2x_rss_config_obj {
735 struct bnx2x_raw_obj raw;
737 /* RSS engine to use */
740 /* Last configured indirection table */
741 u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
743 /* flags for enabling 4-tupple hash on UDP */
747 int (*config_rss)(struct bnx2x *bp,
748 struct bnx2x_config_rss_params *p);
751 /*********************** Queue state update ***********************************/
753 /* UPDATE command options */
755 BNX2X_Q_UPDATE_IN_VLAN_REM,
756 BNX2X_Q_UPDATE_IN_VLAN_REM_CHNG,
757 BNX2X_Q_UPDATE_OUT_VLAN_REM,
758 BNX2X_Q_UPDATE_OUT_VLAN_REM_CHNG,
759 BNX2X_Q_UPDATE_ANTI_SPOOF,
760 BNX2X_Q_UPDATE_ANTI_SPOOF_CHNG,
761 BNX2X_Q_UPDATE_ACTIVATE,
762 BNX2X_Q_UPDATE_ACTIVATE_CHNG,
763 BNX2X_Q_UPDATE_DEF_VLAN_EN,
764 BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG,
765 BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,
766 BNX2X_Q_UPDATE_SILENT_VLAN_REM
769 /* Allowed Queue states */
772 BNX2X_Q_STATE_INITIALIZED,
773 BNX2X_Q_STATE_ACTIVE,
774 BNX2X_Q_STATE_MULTI_COS,
775 BNX2X_Q_STATE_MCOS_TERMINATED,
776 BNX2X_Q_STATE_INACTIVE,
777 BNX2X_Q_STATE_STOPPED,
778 BNX2X_Q_STATE_TERMINATED,
783 /* Allowed Queue states */
784 enum bnx2x_q_logical_state {
785 BNX2X_Q_LOGICAL_STATE_ACTIVE,
786 BNX2X_Q_LOGICAL_STATE_STOPPED,
789 /* Allowed commands */
790 enum bnx2x_queue_cmd {
793 BNX2X_Q_CMD_SETUP_TX_ONLY,
794 BNX2X_Q_CMD_DEACTIVATE,
795 BNX2X_Q_CMD_ACTIVATE,
797 BNX2X_Q_CMD_UPDATE_TPA,
800 BNX2X_Q_CMD_TERMINATE,
805 /* queue SETUP + INIT flags */
808 BNX2X_Q_FLG_TPA_IPV6,
811 BNX2X_Q_FLG_ZERO_STATS,
820 BNX2X_Q_FLG_LEADING_RSS,
822 BNX2X_Q_FLG_DEF_VLAN,
823 BNX2X_Q_FLG_TX_SWITCH,
825 BNX2X_Q_FLG_ANTI_SPOOF,
826 BNX2X_Q_FLG_SILENT_VLAN_REM,
827 BNX2X_Q_FLG_FORCE_DEFAULT_PRI,
828 BNX2X_Q_FLG_PCSUM_ON_PKT,
829 BNX2X_Q_FLG_TUN_INC_INNER_IP_ID
832 /* Queue type options: queue type may be a combination of below. */
834 /** TODO: Consider moving both these flags into the init()
841 #define BNX2X_PRIMARY_CID_INDEX 0
842 #define BNX2X_MULTI_TX_COS_E1X 3 /* QM only */
843 #define BNX2X_MULTI_TX_COS_E2_E3A0 2
844 #define BNX2X_MULTI_TX_COS_E3B0 3
845 #define BNX2X_MULTI_TX_COS 3 /* Maximum possible */
847 #define MAC_PAD (ALIGN(ETH_ALEN, sizeof(u32)) - ETH_ALEN)
849 struct bnx2x_queue_init_params {
864 /* CID context in the host memory */
865 struct eth_context *cxts[BNX2X_MULTI_TX_COS];
867 /* maximum number of cos supported by hardware */
871 struct bnx2x_queue_terminate_params {
872 /* index within the tx_only cids of this queue object */
876 struct bnx2x_queue_cfc_del_params {
877 /* index within the tx_only cids of this queue object */
881 struct bnx2x_queue_update_params {
882 unsigned long update_flags; /* BNX2X_Q_UPDATE_XX bits */
884 u16 silent_removal_value;
885 u16 silent_removal_mask;
886 /* index within the tx_only cids of this queue object */
890 struct rxq_pause_params {
895 u16 sge_th_lo; /* valid iff BNX2X_Q_FLG_TPA */
896 u16 sge_th_hi; /* valid iff BNX2X_Q_FLG_TPA */
901 struct bnx2x_general_setup_params {
902 /* valid iff BNX2X_Q_FLG_STATS */
910 struct bnx2x_rxq_setup_params {
915 dma_addr_t rcq_np_map;
922 /* valid iff BNX2X_Q_FLG_TPA */
929 /* valid iff BNX2X_Q_FLG_MCAST */
936 /* valid iff BXN2X_Q_FLG_SILENT_VLAN_REM */
937 u16 silent_removal_value;
938 u16 silent_removal_mask;
941 struct bnx2x_txq_setup_params {
947 u8 cos; /* valid iff BNX2X_Q_FLG_COS */
949 /* equals to the leading rss client id, used for TX classification*/
950 u8 tss_leading_cl_id;
952 /* valid iff BNX2X_Q_FLG_DEF_VLAN */
956 struct bnx2x_queue_setup_params {
957 struct bnx2x_general_setup_params gen_params;
958 struct bnx2x_txq_setup_params txq_params;
959 struct bnx2x_rxq_setup_params rxq_params;
960 struct rxq_pause_params pause_params;
964 struct bnx2x_queue_setup_tx_only_params {
965 struct bnx2x_general_setup_params gen_params;
966 struct bnx2x_txq_setup_params txq_params;
968 /* index within the tx_only cids of this queue object */
972 struct bnx2x_queue_state_params {
973 struct bnx2x_queue_sp_obj *q_obj;
975 /* Current command */
976 enum bnx2x_queue_cmd cmd;
978 /* may have RAMROD_COMP_WAIT set only */
979 unsigned long ramrod_flags;
981 /* Params according to the current command */
983 struct bnx2x_queue_update_params update;
984 struct bnx2x_queue_setup_params setup;
985 struct bnx2x_queue_init_params init;
986 struct bnx2x_queue_setup_tx_only_params tx_only;
987 struct bnx2x_queue_terminate_params terminate;
988 struct bnx2x_queue_cfc_del_params cfc_del;
992 struct bnx2x_viflist_params {
997 struct bnx2x_queue_sp_obj {
998 u32 cids[BNX2X_MULTI_TX_COS];
1002 /* number of traffic classes supported by queue.
1003 * The primary connection of the queue supports the first traffic
1004 * class. Any further traffic class is supported by a tx-only
1007 * Therefore max_cos is also a number of valid entries in the cids
1011 u8 num_tx_only, next_tx_only;
1013 enum bnx2x_q_state state, next_state;
1015 /* bits from enum bnx2x_q_type */
1018 /* BNX2X_Q_CMD_XX bits. This object implements "one
1019 * pending" paradigm but for debug and tracing purposes it's
1020 * more convenient to have different bits for different
1023 unsigned long pending;
1025 /* Buffer to use as a ramrod data and its mapping */
1027 dma_addr_t rdata_mapping;
1030 * Performs one state change according to the given parameters.
1032 * @return 0 in case of success and negative value otherwise.
1034 int (*send_cmd)(struct bnx2x *bp,
1035 struct bnx2x_queue_state_params *params);
1038 * Sets the pending bit according to the requested transition.
1040 int (*set_pending)(struct bnx2x_queue_sp_obj *o,
1041 struct bnx2x_queue_state_params *params);
1044 * Checks that the requested state transition is legal.
1046 int (*check_transition)(struct bnx2x *bp,
1047 struct bnx2x_queue_sp_obj *o,
1048 struct bnx2x_queue_state_params *params);
1051 * Completes the pending command.
1053 int (*complete_cmd)(struct bnx2x *bp,
1054 struct bnx2x_queue_sp_obj *o,
1055 enum bnx2x_queue_cmd);
1057 int (*wait_comp)(struct bnx2x *bp,
1058 struct bnx2x_queue_sp_obj *o,
1059 enum bnx2x_queue_cmd cmd);
1062 /********************** Function state update *********************************/
1063 /* Allowed Function states */
1064 enum bnx2x_func_state {
1065 BNX2X_F_STATE_RESET,
1066 BNX2X_F_STATE_INITIALIZED,
1067 BNX2X_F_STATE_STARTED,
1068 BNX2X_F_STATE_TX_STOPPED,
1072 /* Allowed Function commands */
1073 enum bnx2x_func_cmd {
1074 BNX2X_F_CMD_HW_INIT,
1077 BNX2X_F_CMD_HW_RESET,
1078 BNX2X_F_CMD_AFEX_UPDATE,
1079 BNX2X_F_CMD_AFEX_VIFLISTS,
1080 BNX2X_F_CMD_TX_STOP,
1081 BNX2X_F_CMD_TX_START,
1082 BNX2X_F_CMD_SWITCH_UPDATE,
1086 struct bnx2x_func_hw_init_params {
1087 /* A load phase returned by MCP.
1090 * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
1091 * FW_MSG_CODE_DRV_LOAD_COMMON
1092 * FW_MSG_CODE_DRV_LOAD_PORT
1093 * FW_MSG_CODE_DRV_LOAD_FUNCTION
1098 struct bnx2x_func_hw_reset_params {
1099 /* A load phase returned by MCP.
1102 * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
1103 * FW_MSG_CODE_DRV_LOAD_COMMON
1104 * FW_MSG_CODE_DRV_LOAD_PORT
1105 * FW_MSG_CODE_DRV_LOAD_FUNCTION
1110 struct bnx2x_func_start_params {
1111 /* Multi Function mode:
1113 * - Switch Dependent
1114 * - Switch Independent
1118 /* Switch Dependent mode outer VLAN tag */
1121 /* Function cos mode */
1122 u8 network_cos_mode;
1124 /* NVGRE classification enablement */
1127 /* NO_GRE_TUNNEL/NVGRE_TUNNEL/L2GRE_TUNNEL/IPGRE_TUNNEL */
1130 /* GRE_OUTER_HEADERS_RSS/GRE_INNER_HEADERS_RSS/NVGRE_KEY_ENTROPY_RSS */
1134 struct bnx2x_func_switch_update_params {
1138 struct bnx2x_func_afex_update_params {
1140 u16 afex_default_vlan;
1141 u8 allowed_priorities;
1144 struct bnx2x_func_afex_viflists_params {
1147 u8 afex_vif_list_command;
1150 struct bnx2x_func_tx_start_params {
1151 struct priority_cos traffic_type_to_priority_cos[MAX_TRAFFIC_TYPES];
1154 u8 dont_add_pri_0_en;
1157 struct bnx2x_func_state_params {
1158 struct bnx2x_func_sp_obj *f_obj;
1160 /* Current command */
1161 enum bnx2x_func_cmd cmd;
1163 /* may have RAMROD_COMP_WAIT set only */
1164 unsigned long ramrod_flags;
1166 /* Params according to the current command */
1168 struct bnx2x_func_hw_init_params hw_init;
1169 struct bnx2x_func_hw_reset_params hw_reset;
1170 struct bnx2x_func_start_params start;
1171 struct bnx2x_func_switch_update_params switch_update;
1172 struct bnx2x_func_afex_update_params afex_update;
1173 struct bnx2x_func_afex_viflists_params afex_viflists;
1174 struct bnx2x_func_tx_start_params tx_start;
1178 struct bnx2x_func_sp_drv_ops {
1179 /* Init tool + runtime initialization:
1181 * - Common (per Path)
1185 int (*init_hw_cmn_chip)(struct bnx2x *bp);
1186 int (*init_hw_cmn)(struct bnx2x *bp);
1187 int (*init_hw_port)(struct bnx2x *bp);
1188 int (*init_hw_func)(struct bnx2x *bp);
1190 /* Reset Function HW: Common, Port, Function phases. */
1191 void (*reset_hw_cmn)(struct bnx2x *bp);
1192 void (*reset_hw_port)(struct bnx2x *bp);
1193 void (*reset_hw_func)(struct bnx2x *bp);
1195 /* Init/Free GUNZIP resources */
1196 int (*gunzip_init)(struct bnx2x *bp);
1197 void (*gunzip_end)(struct bnx2x *bp);
1199 /* Prepare/Release FW resources */
1200 int (*init_fw)(struct bnx2x *bp);
1201 void (*release_fw)(struct bnx2x *bp);
1204 struct bnx2x_func_sp_obj {
1205 enum bnx2x_func_state state, next_state;
1207 /* BNX2X_FUNC_CMD_XX bits. This object implements "one
1208 * pending" paradigm but for debug and tracing purposes it's
1209 * more convenient to have different bits for different
1212 unsigned long pending;
1214 /* Buffer to use as a ramrod data and its mapping */
1216 dma_addr_t rdata_mapping;
1218 /* Buffer to use as a afex ramrod data and its mapping.
1219 * This can't be same rdata as above because afex ramrod requests
1220 * can arrive to the object in parallel to other ramrod requests.
1223 dma_addr_t afex_rdata_mapping;
1225 /* this mutex validates that when pending flag is taken, the next
1226 * ramrod to be sent will be the one set the pending bit
1228 struct mutex one_pending_mutex;
1230 /* Driver interface */
1231 struct bnx2x_func_sp_drv_ops *drv;
1234 * Performs one state change according to the given parameters.
1236 * @return 0 in case of success and negative value otherwise.
1238 int (*send_cmd)(struct bnx2x *bp,
1239 struct bnx2x_func_state_params *params);
1242 * Checks that the requested state transition is legal.
1244 int (*check_transition)(struct bnx2x *bp,
1245 struct bnx2x_func_sp_obj *o,
1246 struct bnx2x_func_state_params *params);
1249 * Completes the pending command.
1251 int (*complete_cmd)(struct bnx2x *bp,
1252 struct bnx2x_func_sp_obj *o,
1253 enum bnx2x_func_cmd cmd);
1255 int (*wait_comp)(struct bnx2x *bp, struct bnx2x_func_sp_obj *o,
1256 enum bnx2x_func_cmd cmd);
1259 /********************** Interfaces ********************************************/
1260 /* Queueable objects set */
1261 union bnx2x_qable_obj {
1262 struct bnx2x_vlan_mac_obj vlan_mac;
1264 /************** Function state update *********/
1265 void bnx2x_init_func_obj(struct bnx2x *bp,
1266 struct bnx2x_func_sp_obj *obj,
1267 void *rdata, dma_addr_t rdata_mapping,
1268 void *afex_rdata, dma_addr_t afex_rdata_mapping,
1269 struct bnx2x_func_sp_drv_ops *drv_iface);
1271 int bnx2x_func_state_change(struct bnx2x *bp,
1272 struct bnx2x_func_state_params *params);
1274 enum bnx2x_func_state bnx2x_func_get_state(struct bnx2x *bp,
1275 struct bnx2x_func_sp_obj *o);
1276 /******************* Queue State **************/
1277 void bnx2x_init_queue_obj(struct bnx2x *bp,
1278 struct bnx2x_queue_sp_obj *obj, u8 cl_id, u32 *cids,
1279 u8 cid_cnt, u8 func_id, void *rdata,
1280 dma_addr_t rdata_mapping, unsigned long type);
1282 int bnx2x_queue_state_change(struct bnx2x *bp,
1283 struct bnx2x_queue_state_params *params);
1285 int bnx2x_get_q_logical_state(struct bnx2x *bp,
1286 struct bnx2x_queue_sp_obj *obj);
1288 /********************* VLAN-MAC ****************/
1289 void bnx2x_init_mac_obj(struct bnx2x *bp,
1290 struct bnx2x_vlan_mac_obj *mac_obj,
1291 u8 cl_id, u32 cid, u8 func_id, void *rdata,
1292 dma_addr_t rdata_mapping, int state,
1293 unsigned long *pstate, bnx2x_obj_type type,
1294 struct bnx2x_credit_pool_obj *macs_pool);
1296 void bnx2x_init_vlan_obj(struct bnx2x *bp,
1297 struct bnx2x_vlan_mac_obj *vlan_obj,
1298 u8 cl_id, u32 cid, u8 func_id, void *rdata,
1299 dma_addr_t rdata_mapping, int state,
1300 unsigned long *pstate, bnx2x_obj_type type,
1301 struct bnx2x_credit_pool_obj *vlans_pool);
1303 void bnx2x_init_vlan_mac_obj(struct bnx2x *bp,
1304 struct bnx2x_vlan_mac_obj *vlan_mac_obj,
1305 u8 cl_id, u32 cid, u8 func_id, void *rdata,
1306 dma_addr_t rdata_mapping, int state,
1307 unsigned long *pstate, bnx2x_obj_type type,
1308 struct bnx2x_credit_pool_obj *macs_pool,
1309 struct bnx2x_credit_pool_obj *vlans_pool);
1311 int bnx2x_vlan_mac_h_read_lock(struct bnx2x *bp,
1312 struct bnx2x_vlan_mac_obj *o);
1313 void bnx2x_vlan_mac_h_read_unlock(struct bnx2x *bp,
1314 struct bnx2x_vlan_mac_obj *o);
1315 int bnx2x_vlan_mac_h_write_lock(struct bnx2x *bp,
1316 struct bnx2x_vlan_mac_obj *o);
1317 void bnx2x_vlan_mac_h_write_unlock(struct bnx2x *bp,
1318 struct bnx2x_vlan_mac_obj *o);
1319 int bnx2x_config_vlan_mac(struct bnx2x *bp,
1320 struct bnx2x_vlan_mac_ramrod_params *p);
1322 int bnx2x_vlan_mac_move(struct bnx2x *bp,
1323 struct bnx2x_vlan_mac_ramrod_params *p,
1324 struct bnx2x_vlan_mac_obj *dest_o);
1326 /********************* RX MODE ****************/
1328 void bnx2x_init_rx_mode_obj(struct bnx2x *bp,
1329 struct bnx2x_rx_mode_obj *o);
1332 * bnx2x_config_rx_mode - Send and RX_MODE ramrod according to the provided parameters.
1334 * @p: Command parameters
1336 * Return: 0 - if operation was successful and there is no pending completions,
1337 * positive number - if there are pending completions,
1338 * negative - if there were errors
1340 int bnx2x_config_rx_mode(struct bnx2x *bp,
1341 struct bnx2x_rx_mode_ramrod_params *p);
1343 /****************** MULTICASTS ****************/
1345 void bnx2x_init_mcast_obj(struct bnx2x *bp,
1346 struct bnx2x_mcast_obj *mcast_obj,
1347 u8 mcast_cl_id, u32 mcast_cid, u8 func_id,
1348 u8 engine_id, void *rdata, dma_addr_t rdata_mapping,
1349 int state, unsigned long *pstate,
1350 bnx2x_obj_type type);
1353 * bnx2x_config_mcast - Configure multicast MACs list.
1355 * @cmd: command to execute: BNX2X_MCAST_CMD_X
1357 * May configure a new list
1358 * provided in p->mcast_list (BNX2X_MCAST_CMD_ADD), clean up
1359 * (BNX2X_MCAST_CMD_DEL) or restore (BNX2X_MCAST_CMD_RESTORE) a current
1360 * configuration, continue to execute the pending commands
1361 * (BNX2X_MCAST_CMD_CONT).
1363 * If previous command is still pending or if number of MACs to
1364 * configure is more that maximum number of MACs in one command,
1365 * the current command will be enqueued to the tail of the
1366 * pending commands list.
1368 * Return: 0 is operation was successful and there are no pending completions,
1369 * negative if there were errors, positive if there are pending
1372 int bnx2x_config_mcast(struct bnx2x *bp,
1373 struct bnx2x_mcast_ramrod_params *p,
1374 enum bnx2x_mcast_cmd cmd);
1376 /****************** CREDIT POOL ****************/
1377 void bnx2x_init_mac_credit_pool(struct bnx2x *bp,
1378 struct bnx2x_credit_pool_obj *p, u8 func_id,
1380 void bnx2x_init_vlan_credit_pool(struct bnx2x *bp,
1381 struct bnx2x_credit_pool_obj *p, u8 func_id,
1384 /****************** RSS CONFIGURATION ****************/
1385 void bnx2x_init_rss_config_obj(struct bnx2x *bp,
1386 struct bnx2x_rss_config_obj *rss_obj,
1387 u8 cl_id, u32 cid, u8 func_id, u8 engine_id,
1388 void *rdata, dma_addr_t rdata_mapping,
1389 int state, unsigned long *pstate,
1390 bnx2x_obj_type type);
1393 * bnx2x_config_rss - Updates RSS configuration according to provided parameters
1395 * Return: 0 in case of success
1397 int bnx2x_config_rss(struct bnx2x *bp,
1398 struct bnx2x_config_rss_params *p);
1401 * bnx2x_get_rss_ind_table - Return the current ind_table configuration.
1403 * @ind_table: buffer to fill with the current indirection
1404 * table content. Should be at least
1405 * T_ETH_INDIRECTION_TABLE_SIZE bytes long.
1407 void bnx2x_get_rss_ind_table(struct bnx2x_rss_config_obj *rss_obj,
1410 #endif /* BNX2X_SP_VERBS */