1 /* bnx2x_sp.h: Broadcom Everest network driver.
3 * Copyright (c) 2011-2013 Broadcom Corporation
5 * Unless you and Broadcom execute a separate written software license
6 * agreement governing use of this software, this software is licensed to you
7 * under the terms of the GNU General Public License version 2, available
8 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
10 * Notwithstanding the above, under no circumstances may you combine this
11 * software in any way with any other Broadcom software provided under a
12 * license other than the GPL, without Broadcom's express prior written
15 * Maintained by: Eilon Greenstein <eilong@broadcom.com>
16 * Written by: Vladislav Zolotarov
19 #ifndef BNX2X_SP_VERBS
20 #define BNX2X_SP_VERBS
25 /* Bits representing general command's configuration */
29 /* Wait until all pending commands complete */
31 /* Don't send a ramrod, only update a registry */
33 /* Configure HW according to the current object state */
35 /* Execute the next command now */
38 * Don't add a new command and continue execution of posponed
39 * commands. If not set a new command will be added to the
40 * pending commands list.
43 /* If there is another pending ramrod, wait until it finishes and
44 * re-try to submit this one. This flag can be set only in sleepable
45 * context, and should not be set from the context that completes the
46 * ramrods as deadlock will occur.
57 /* Public slow path states */
59 BNX2X_FILTER_MAC_PENDING,
60 BNX2X_FILTER_VLAN_PENDING,
61 BNX2X_FILTER_VLAN_MAC_PENDING,
62 BNX2X_FILTER_RX_MODE_PENDING,
63 BNX2X_FILTER_RX_MODE_SCHED,
64 BNX2X_FILTER_ISCSI_ETH_START_SCHED,
65 BNX2X_FILTER_ISCSI_ETH_STOP_SCHED,
66 BNX2X_FILTER_FCOE_ETH_START_SCHED,
67 BNX2X_FILTER_FCOE_ETH_STOP_SCHED,
68 BNX2X_FILTER_MCAST_PENDING,
69 BNX2X_FILTER_MCAST_SCHED,
70 BNX2X_FILTER_RSS_CONF_PENDING,
71 BNX2X_AFEX_FCOE_Q_UPDATE_PENDING,
72 BNX2X_AFEX_PENDING_VIFSET_MCP_ACK
75 struct bnx2x_raw_obj {
82 /* Ramrod data buffer params */
84 dma_addr_t rdata_mapping;
86 /* Ramrod state params */
87 int state; /* "ramrod is pending" state bit */
88 unsigned long *pstate; /* pointer to state buffer */
90 bnx2x_obj_type obj_type;
92 int (*wait_comp)(struct bnx2x *bp,
93 struct bnx2x_raw_obj *o);
95 bool (*check_pending)(struct bnx2x_raw_obj *o);
96 void (*clear_pending)(struct bnx2x_raw_obj *o);
97 void (*set_pending)(struct bnx2x_raw_obj *o);
100 /************************* VLAN-MAC commands related parameters ***************/
101 struct bnx2x_mac_ramrod_data {
106 struct bnx2x_vlan_ramrod_data {
110 struct bnx2x_vlan_mac_ramrod_data {
116 union bnx2x_classification_ramrod_data {
117 struct bnx2x_mac_ramrod_data mac;
118 struct bnx2x_vlan_ramrod_data vlan;
119 struct bnx2x_vlan_mac_ramrod_data vlan_mac;
122 /* VLAN_MAC commands */
123 enum bnx2x_vlan_mac_cmd {
129 struct bnx2x_vlan_mac_data {
130 /* Requested command: BNX2X_VLAN_MAC_XX */
131 enum bnx2x_vlan_mac_cmd cmd;
133 * used to contain the data related vlan_mac_flags bits from
136 unsigned long vlan_mac_flags;
138 /* Needed for MOVE command */
139 struct bnx2x_vlan_mac_obj *target_obj;
141 union bnx2x_classification_ramrod_data u;
144 /*************************** Exe Queue obj ************************************/
145 union bnx2x_exe_queue_cmd_data {
146 struct bnx2x_vlan_mac_data vlan_mac;
153 struct bnx2x_exeq_elem {
154 struct list_head link;
156 /* Length of this element in the exe_chunk. */
159 union bnx2x_exe_queue_cmd_data cmd_data;
162 union bnx2x_qable_obj;
164 union bnx2x_exeq_comp_elem {
165 union event_ring_elem *elem;
168 struct bnx2x_exe_queue_obj;
170 typedef int (*exe_q_validate)(struct bnx2x *bp,
171 union bnx2x_qable_obj *o,
172 struct bnx2x_exeq_elem *elem);
174 typedef int (*exe_q_remove)(struct bnx2x *bp,
175 union bnx2x_qable_obj *o,
176 struct bnx2x_exeq_elem *elem);
178 /* Return positive if entry was optimized, 0 - if not, negative
179 * in case of an error.
181 typedef int (*exe_q_optimize)(struct bnx2x *bp,
182 union bnx2x_qable_obj *o,
183 struct bnx2x_exeq_elem *elem);
184 typedef int (*exe_q_execute)(struct bnx2x *bp,
185 union bnx2x_qable_obj *o,
186 struct list_head *exe_chunk,
187 unsigned long *ramrod_flags);
188 typedef struct bnx2x_exeq_elem *
189 (*exe_q_get)(struct bnx2x_exe_queue_obj *o,
190 struct bnx2x_exeq_elem *elem);
192 struct bnx2x_exe_queue_obj {
194 * Commands pending for an execution.
196 struct list_head exe_queue;
199 * Commands pending for an completion.
201 struct list_head pending_comp;
205 /* Maximum length of commands' list for one execution */
208 union bnx2x_qable_obj *owner;
210 /****** Virtual functions ******/
212 * Called before commands execution for commands that are really
213 * going to be executed (after 'optimize').
215 * Must run under exe_queue->lock
217 exe_q_validate validate;
220 * Called before removing pending commands, cleaning allocated
221 * resources (e.g., credits from validate)
226 * This will try to cancel the current pending commands list
227 * considering the new command.
229 * Returns the number of optimized commands or a negative error code
231 * Must run under exe_queue->lock
233 exe_q_optimize optimize;
236 * Run the next commands chunk (owner specific).
238 exe_q_execute execute;
241 * Return the exe_queue element containing the specific command
242 * if any. Otherwise return NULL.
246 /***************** Classification verbs: Set/Del MAC/VLAN/VLAN-MAC ************/
248 * Element in the VLAN_MAC registry list having all currenty configured
251 struct bnx2x_vlan_mac_registry_elem {
252 struct list_head link;
255 * Used to store the cam offset used for the mac/vlan/vlan-mac.
256 * Relevant for 57710 and 57711 only. VLANs and MACs share the
257 * same CAM for these chips.
261 /* Needed for DEL and RESTORE flows */
262 unsigned long vlan_mac_flags;
264 union bnx2x_classification_ramrod_data u;
267 /* Bits representing VLAN_MAC commands specific flags */
273 BNX2X_DONT_CONSUME_CAM_CREDIT,
274 BNX2X_DONT_CONSUME_CAM_CREDIT_DEST,
277 struct bnx2x_vlan_mac_ramrod_params {
278 /* Object to run the command from */
279 struct bnx2x_vlan_mac_obj *vlan_mac_obj;
281 /* General command flags: COMP_WAIT, etc. */
282 unsigned long ramrod_flags;
284 /* Command specific configuration request */
285 struct bnx2x_vlan_mac_data user_req;
288 struct bnx2x_vlan_mac_obj {
289 struct bnx2x_raw_obj raw;
291 /* Bookkeeping list: will prevent the addition of already existing
294 struct list_head head;
296 /* TODO: Add it's initialization in the init functions */
297 struct bnx2x_exe_queue_obj exe_queue;
299 /* MACs credit pool */
300 struct bnx2x_credit_pool_obj *macs_pool;
302 /* VLANs credit pool */
303 struct bnx2x_credit_pool_obj *vlans_pool;
305 /* RAMROD command to be used */
308 /* copy first n elements onto preallocated buffer
310 * @param n number of elements to get
311 * @param buf buffer preallocated by caller into which elements
312 * will be copied. Note elements are 4-byte aligned
313 * so buffer size must be able to accomodate the
316 * @return number of copied bytes
318 int (*get_n_elements)(struct bnx2x *bp,
319 struct bnx2x_vlan_mac_obj *o, int n, u8 *base,
323 * Checks if ADD-ramrod with the given params may be performed.
325 * @return zero if the element may be added
328 int (*check_add)(struct bnx2x *bp,
329 struct bnx2x_vlan_mac_obj *o,
330 union bnx2x_classification_ramrod_data *data);
333 * Checks if DEL-ramrod with the given params may be performed.
335 * @return true if the element may be deleted
337 struct bnx2x_vlan_mac_registry_elem *
338 (*check_del)(struct bnx2x *bp,
339 struct bnx2x_vlan_mac_obj *o,
340 union bnx2x_classification_ramrod_data *data);
343 * Checks if DEL-ramrod with the given params may be performed.
345 * @return true if the element may be deleted
347 bool (*check_move)(struct bnx2x *bp,
348 struct bnx2x_vlan_mac_obj *src_o,
349 struct bnx2x_vlan_mac_obj *dst_o,
350 union bnx2x_classification_ramrod_data *data);
353 * Update the relevant credit object(s) (consume/return
356 bool (*get_credit)(struct bnx2x_vlan_mac_obj *o);
357 bool (*put_credit)(struct bnx2x_vlan_mac_obj *o);
358 bool (*get_cam_offset)(struct bnx2x_vlan_mac_obj *o, int *offset);
359 bool (*put_cam_offset)(struct bnx2x_vlan_mac_obj *o, int offset);
362 * Configures one rule in the ramrod data buffer.
364 void (*set_one_rule)(struct bnx2x *bp,
365 struct bnx2x_vlan_mac_obj *o,
366 struct bnx2x_exeq_elem *elem, int rule_idx,
370 * Delete all configured elements having the given
371 * vlan_mac_flags specification. Assumes no pending for
372 * execution commands. Will schedule all all currently
373 * configured MACs/VLANs/VLAN-MACs matching the vlan_mac_flags
374 * specification for deletion and will use the given
375 * ramrod_flags for the last DEL operation.
379 * @param ramrod_flags RAMROD_XX flags
381 * @return 0 if the last operation has completed successfully
382 * and there are no more elements left, positive value
383 * if there are pending for completion commands,
384 * negative value in case of failure.
386 int (*delete_all)(struct bnx2x *bp,
387 struct bnx2x_vlan_mac_obj *o,
388 unsigned long *vlan_mac_flags,
389 unsigned long *ramrod_flags);
392 * Reconfigures the next MAC/VLAN/VLAN-MAC element from the previously
393 * configured elements list.
396 * @param p Command parameters (RAMROD_COMP_WAIT bit in
397 * ramrod_flags is only taken into an account)
398 * @param ppos a pointer to the cooky that should be given back in the
399 * next call to make function handle the next element. If
400 * *ppos is set to NULL it will restart the iterator.
401 * If returned *ppos == NULL this means that the last
402 * element has been handled.
406 int (*restore)(struct bnx2x *bp,
407 struct bnx2x_vlan_mac_ramrod_params *p,
408 struct bnx2x_vlan_mac_registry_elem **ppos);
411 * Should be called on a completion arival.
415 * @param cqe Completion element we are handling
416 * @param ramrod_flags if RAMROD_CONT is set the next bulk of
417 * pending commands will be executed.
418 * RAMROD_DRV_CLR_ONLY and RAMROD_RESTORE
419 * may also be set if needed.
421 * @return 0 if there are neither pending nor waiting for
422 * completion commands. Positive value if there are
423 * pending for execution or for completion commands.
424 * Negative value in case of an error (including an
427 int (*complete)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o,
428 union event_ring_elem *cqe,
429 unsigned long *ramrod_flags);
432 * Wait for completion of all commands. Don't schedule new ones,
433 * just wait. It assumes that the completion code will schedule
436 int (*wait)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o);
440 BNX2X_LLH_CAM_ISCSI_ETH_LINE = 0,
441 BNX2X_LLH_CAM_ETH_LINE,
442 BNX2X_LLH_CAM_MAX_PF_LINE = NIG_REG_LLH1_FUNC_MEM_SIZE / 2
445 void bnx2x_set_mac_in_nig(struct bnx2x *bp,
446 bool add, unsigned char *dev_addr, int index);
448 /** RX_MODE verbs:DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */
450 /* RX_MODE ramrod spesial flags: set in rx_mode_flags field in
451 * a bnx2x_rx_mode_ramrod_params.
454 BNX2X_RX_MODE_FCOE_ETH,
455 BNX2X_RX_MODE_ISCSI_ETH,
459 BNX2X_ACCEPT_UNICAST,
460 BNX2X_ACCEPT_MULTICAST,
461 BNX2X_ACCEPT_ALL_UNICAST,
462 BNX2X_ACCEPT_ALL_MULTICAST,
463 BNX2X_ACCEPT_BROADCAST,
464 BNX2X_ACCEPT_UNMATCHED,
465 BNX2X_ACCEPT_ANY_VLAN
468 struct bnx2x_rx_mode_ramrod_params {
469 struct bnx2x_rx_mode_obj *rx_mode_obj;
470 unsigned long *pstate;
475 unsigned long ramrod_flags;
476 unsigned long rx_mode_flags;
479 * rdata is either a pointer to eth_filter_rules_ramrod_data(e2) or to
480 * a tstorm_eth_mac_filter_config (e1x).
483 dma_addr_t rdata_mapping;
485 /* Rx mode settings */
486 unsigned long rx_accept_flags;
488 /* internal switching settings */
489 unsigned long tx_accept_flags;
492 struct bnx2x_rx_mode_obj {
493 int (*config_rx_mode)(struct bnx2x *bp,
494 struct bnx2x_rx_mode_ramrod_params *p);
496 int (*wait_comp)(struct bnx2x *bp,
497 struct bnx2x_rx_mode_ramrod_params *p);
500 /********************** Set multicast group ***********************************/
502 struct bnx2x_mcast_list_elem {
503 struct list_head link;
507 union bnx2x_mcast_config_data {
509 u8 bin; /* used in a RESTORE flow */
512 struct bnx2x_mcast_ramrod_params {
513 struct bnx2x_mcast_obj *mcast_obj;
515 /* Relevant options are RAMROD_COMP_WAIT and RAMROD_DRV_CLR_ONLY */
516 unsigned long ramrod_flags;
518 struct list_head mcast_list; /* list of struct bnx2x_mcast_list_elem */
520 * - rename it to macs_num.
521 * - Add a new command type for handling pending commands
522 * (remove "zero semantics").
524 * Length of mcast_list. If zero and ADD_CONT command - post
530 enum bnx2x_mcast_cmd {
532 BNX2X_MCAST_CMD_CONT,
534 BNX2X_MCAST_CMD_RESTORE,
537 struct bnx2x_mcast_obj {
538 struct bnx2x_raw_obj raw;
542 #define BNX2X_MCAST_BINS_NUM 256
543 #define BNX2X_MCAST_VEC_SZ (BNX2X_MCAST_BINS_NUM / 64)
544 u64 vec[BNX2X_MCAST_VEC_SZ];
546 /** Number of BINs to clear. Should be updated
547 * immediately when a command arrives in order to
548 * properly create DEL commands.
554 struct list_head macs;
559 /* Pending commands */
560 struct list_head pending_cmds_head;
562 /* A state that is set in raw.pstate, when there are pending commands */
565 /* Maximal number of mcast MACs configured in one command */
568 /* Total number of currently pending MACs to configure: both
569 * in the pending commands list and in the current command.
571 int total_pending_num;
576 * @param cmd command to execute (BNX2X_MCAST_CMD_X, see above)
578 int (*config_mcast)(struct bnx2x *bp,
579 struct bnx2x_mcast_ramrod_params *p,
580 enum bnx2x_mcast_cmd cmd);
583 * Fills the ramrod data during the RESTORE flow.
587 * @param start_idx Registry index to start from
588 * @param rdata_idx Index in the ramrod data to start from
590 * @return -1 if we handled the whole registry or index of the last
591 * handled registry element.
593 int (*hdl_restore)(struct bnx2x *bp, struct bnx2x_mcast_obj *o,
594 int start_bin, int *rdata_idx);
596 int (*enqueue_cmd)(struct bnx2x *bp, struct bnx2x_mcast_obj *o,
597 struct bnx2x_mcast_ramrod_params *p,
598 enum bnx2x_mcast_cmd cmd);
600 void (*set_one_rule)(struct bnx2x *bp,
601 struct bnx2x_mcast_obj *o, int idx,
602 union bnx2x_mcast_config_data *cfg_data,
603 enum bnx2x_mcast_cmd cmd);
605 /** Checks if there are more mcast MACs to be set or a previous
606 * command is still pending.
608 bool (*check_pending)(struct bnx2x_mcast_obj *o);
611 * Set/Clear/Check SCHEDULED state of the object
613 void (*set_sched)(struct bnx2x_mcast_obj *o);
614 void (*clear_sched)(struct bnx2x_mcast_obj *o);
615 bool (*check_sched)(struct bnx2x_mcast_obj *o);
617 /* Wait until all pending commands complete */
618 int (*wait_comp)(struct bnx2x *bp, struct bnx2x_mcast_obj *o);
621 * Handle the internal object counters needed for proper
622 * commands handling. Checks that the provided parameters are
625 int (*validate)(struct bnx2x *bp,
626 struct bnx2x_mcast_ramrod_params *p,
627 enum bnx2x_mcast_cmd cmd);
630 * Restore the values of internal counters in case of a failure.
632 void (*revert)(struct bnx2x *bp,
633 struct bnx2x_mcast_ramrod_params *p,
636 int (*get_registry_size)(struct bnx2x_mcast_obj *o);
637 void (*set_registry_size)(struct bnx2x_mcast_obj *o, int n);
640 /*************************** Credit handling **********************************/
641 struct bnx2x_credit_pool_obj {
643 /* Current amount of credit in the pool */
646 /* Maximum allowed credit. put() will check against it. */
650 * Allocate a pool table statically.
652 * Currently the mamimum allowed size is MAX_MAC_CREDIT_E2(272)
654 * The set bit in the table will mean that the entry is available.
656 #define BNX2X_POOL_VEC_SIZE (MAX_MAC_CREDIT_E2 / 64)
657 u64 pool_mirror[BNX2X_POOL_VEC_SIZE];
659 /* Base pool offset (initialized differently */
660 int base_pool_offset;
663 * Get the next free pool entry.
665 * @return true if there was a free entry in the pool
667 bool (*get_entry)(struct bnx2x_credit_pool_obj *o, int *entry);
670 * Return the entry back to the pool.
672 * @return true if entry is legal and has been successfully
673 * returned to the pool.
675 bool (*put_entry)(struct bnx2x_credit_pool_obj *o, int entry);
678 * Get the requested amount of credit from the pool.
680 * @param cnt Amount of requested credit
681 * @return true if the operation is successful
683 bool (*get)(struct bnx2x_credit_pool_obj *o, int cnt);
686 * Returns the credit to the pool.
688 * @param cnt Amount of credit to return
689 * @return true if the operation is successful
691 bool (*put)(struct bnx2x_credit_pool_obj *o, int cnt);
694 * Reads the current amount of credit.
696 int (*check)(struct bnx2x_credit_pool_obj *o);
699 /*************************** RSS configuration ********************************/
701 /* RSS_MODE bits are mutually exclusive */
702 BNX2X_RSS_MODE_DISABLED,
703 BNX2X_RSS_MODE_REGULAR,
705 BNX2X_RSS_SET_SRCH, /* Setup searcher, E1x specific flag */
715 struct bnx2x_config_rss_params {
716 struct bnx2x_rss_config_obj *rss_obj;
718 /* may have RAMROD_COMP_WAIT set only */
719 unsigned long ramrod_flags;
721 /* BNX2X_RSS_X bits */
722 unsigned long rss_flags;
724 /* Number hash bits to take into an account */
727 /* Indirection table */
728 u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
730 /* RSS hash values */
733 /* valid only iff BNX2X_RSS_UPDATE_TOE is set */
737 struct bnx2x_rss_config_obj {
738 struct bnx2x_raw_obj raw;
740 /* RSS engine to use */
743 /* Last configured indirection table */
744 u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
746 /* flags for enabling 4-tupple hash on UDP */
750 int (*config_rss)(struct bnx2x *bp,
751 struct bnx2x_config_rss_params *p);
754 /*********************** Queue state update ***********************************/
756 /* UPDATE command options */
758 BNX2X_Q_UPDATE_IN_VLAN_REM,
759 BNX2X_Q_UPDATE_IN_VLAN_REM_CHNG,
760 BNX2X_Q_UPDATE_OUT_VLAN_REM,
761 BNX2X_Q_UPDATE_OUT_VLAN_REM_CHNG,
762 BNX2X_Q_UPDATE_ANTI_SPOOF,
763 BNX2X_Q_UPDATE_ANTI_SPOOF_CHNG,
764 BNX2X_Q_UPDATE_ACTIVATE,
765 BNX2X_Q_UPDATE_ACTIVATE_CHNG,
766 BNX2X_Q_UPDATE_DEF_VLAN_EN,
767 BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG,
768 BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,
769 BNX2X_Q_UPDATE_SILENT_VLAN_REM
772 /* Allowed Queue states */
775 BNX2X_Q_STATE_INITIALIZED,
776 BNX2X_Q_STATE_ACTIVE,
777 BNX2X_Q_STATE_MULTI_COS,
778 BNX2X_Q_STATE_MCOS_TERMINATED,
779 BNX2X_Q_STATE_INACTIVE,
780 BNX2X_Q_STATE_STOPPED,
781 BNX2X_Q_STATE_TERMINATED,
786 /* Allowed Queue states */
787 enum bnx2x_q_logical_state {
788 BNX2X_Q_LOGICAL_STATE_ACTIVE,
789 BNX2X_Q_LOGICAL_STATE_STOPPED,
792 /* Allowed commands */
793 enum bnx2x_queue_cmd {
796 BNX2X_Q_CMD_SETUP_TX_ONLY,
797 BNX2X_Q_CMD_DEACTIVATE,
798 BNX2X_Q_CMD_ACTIVATE,
800 BNX2X_Q_CMD_UPDATE_TPA,
803 BNX2X_Q_CMD_TERMINATE,
808 /* queue SETUP + INIT flags */
811 BNX2X_Q_FLG_TPA_IPV6,
814 BNX2X_Q_FLG_ZERO_STATS,
823 BNX2X_Q_FLG_LEADING_RSS,
825 BNX2X_Q_FLG_DEF_VLAN,
826 BNX2X_Q_FLG_TX_SWITCH,
828 BNX2X_Q_FLG_ANTI_SPOOF,
829 BNX2X_Q_FLG_SILENT_VLAN_REM,
830 BNX2X_Q_FLG_FORCE_DEFAULT_PRI,
831 BNX2X_Q_FLG_PCSUM_ON_PKT,
832 BNX2X_Q_FLG_TUN_INC_INNER_IP_ID
835 /* Queue type options: queue type may be a compination of below. */
837 /** TODO: Consider moving both these flags into the init()
844 #define BNX2X_PRIMARY_CID_INDEX 0
845 #define BNX2X_MULTI_TX_COS_E1X 3 /* QM only */
846 #define BNX2X_MULTI_TX_COS_E2_E3A0 2
847 #define BNX2X_MULTI_TX_COS_E3B0 3
848 #define BNX2X_MULTI_TX_COS 3 /* Maximum possible */
850 #define MAC_PAD (ALIGN(ETH_ALEN, sizeof(u32)) - ETH_ALEN)
852 struct bnx2x_queue_init_params {
867 /* CID context in the host memory */
868 struct eth_context *cxts[BNX2X_MULTI_TX_COS];
870 /* maximum number of cos supported by hardware */
874 struct bnx2x_queue_terminate_params {
875 /* index within the tx_only cids of this queue object */
879 struct bnx2x_queue_cfc_del_params {
880 /* index within the tx_only cids of this queue object */
884 struct bnx2x_queue_update_params {
885 unsigned long update_flags; /* BNX2X_Q_UPDATE_XX bits */
887 u16 silent_removal_value;
888 u16 silent_removal_mask;
889 /* index within the tx_only cids of this queue object */
893 struct rxq_pause_params {
898 u16 sge_th_lo; /* valid iff BNX2X_Q_FLG_TPA */
899 u16 sge_th_hi; /* valid iff BNX2X_Q_FLG_TPA */
904 struct bnx2x_general_setup_params {
905 /* valid iff BNX2X_Q_FLG_STATS */
913 struct bnx2x_rxq_setup_params {
918 dma_addr_t rcq_np_map;
925 /* valid iff BNX2X_Q_FLG_TPA */
932 /* valid iff BNX2X_Q_FLG_MCAST */
939 /* valid iff BXN2X_Q_FLG_SILENT_VLAN_REM */
940 u16 silent_removal_value;
941 u16 silent_removal_mask;
944 struct bnx2x_txq_setup_params {
950 u8 cos; /* valid iff BNX2X_Q_FLG_COS */
952 /* equals to the leading rss client id, used for TX classification*/
953 u8 tss_leading_cl_id;
955 /* valid iff BNX2X_Q_FLG_DEF_VLAN */
959 struct bnx2x_queue_setup_params {
960 struct bnx2x_general_setup_params gen_params;
961 struct bnx2x_txq_setup_params txq_params;
962 struct bnx2x_rxq_setup_params rxq_params;
963 struct rxq_pause_params pause_params;
967 struct bnx2x_queue_setup_tx_only_params {
968 struct bnx2x_general_setup_params gen_params;
969 struct bnx2x_txq_setup_params txq_params;
971 /* index within the tx_only cids of this queue object */
975 struct bnx2x_queue_state_params {
976 struct bnx2x_queue_sp_obj *q_obj;
978 /* Current command */
979 enum bnx2x_queue_cmd cmd;
981 /* may have RAMROD_COMP_WAIT set only */
982 unsigned long ramrod_flags;
984 /* Params according to the current command */
986 struct bnx2x_queue_update_params update;
987 struct bnx2x_queue_setup_params setup;
988 struct bnx2x_queue_init_params init;
989 struct bnx2x_queue_setup_tx_only_params tx_only;
990 struct bnx2x_queue_terminate_params terminate;
991 struct bnx2x_queue_cfc_del_params cfc_del;
995 struct bnx2x_viflist_params {
1000 struct bnx2x_queue_sp_obj {
1001 u32 cids[BNX2X_MULTI_TX_COS];
1006 * number of traffic classes supported by queue.
1007 * The primary connection of the queue suppotrs the first traffic
1008 * class. Any further traffic class is suppoted by a tx-only
1011 * Therefore max_cos is also a number of valid entries in the cids
1015 u8 num_tx_only, next_tx_only;
1017 enum bnx2x_q_state state, next_state;
1019 /* bits from enum bnx2x_q_type */
1022 /* BNX2X_Q_CMD_XX bits. This object implements "one
1023 * pending" paradigm but for debug and tracing purposes it's
1024 * more convinient to have different bits for different
1027 unsigned long pending;
1029 /* Buffer to use as a ramrod data and its mapping */
1031 dma_addr_t rdata_mapping;
1034 * Performs one state change according to the given parameters.
1036 * @return 0 in case of success and negative value otherwise.
1038 int (*send_cmd)(struct bnx2x *bp,
1039 struct bnx2x_queue_state_params *params);
1042 * Sets the pending bit according to the requested transition.
1044 int (*set_pending)(struct bnx2x_queue_sp_obj *o,
1045 struct bnx2x_queue_state_params *params);
1048 * Checks that the requested state transition is legal.
1050 int (*check_transition)(struct bnx2x *bp,
1051 struct bnx2x_queue_sp_obj *o,
1052 struct bnx2x_queue_state_params *params);
1055 * Completes the pending command.
1057 int (*complete_cmd)(struct bnx2x *bp,
1058 struct bnx2x_queue_sp_obj *o,
1059 enum bnx2x_queue_cmd);
1061 int (*wait_comp)(struct bnx2x *bp,
1062 struct bnx2x_queue_sp_obj *o,
1063 enum bnx2x_queue_cmd cmd);
1066 /********************** Function state update *********************************/
1067 /* Allowed Function states */
1068 enum bnx2x_func_state {
1069 BNX2X_F_STATE_RESET,
1070 BNX2X_F_STATE_INITIALIZED,
1071 BNX2X_F_STATE_STARTED,
1072 BNX2X_F_STATE_TX_STOPPED,
1076 /* Allowed Function commands */
1077 enum bnx2x_func_cmd {
1078 BNX2X_F_CMD_HW_INIT,
1081 BNX2X_F_CMD_HW_RESET,
1082 BNX2X_F_CMD_AFEX_UPDATE,
1083 BNX2X_F_CMD_AFEX_VIFLISTS,
1084 BNX2X_F_CMD_TX_STOP,
1085 BNX2X_F_CMD_TX_START,
1086 BNX2X_F_CMD_SWITCH_UPDATE,
1090 struct bnx2x_func_hw_init_params {
1091 /* A load phase returned by MCP.
1094 * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
1095 * FW_MSG_CODE_DRV_LOAD_COMMON
1096 * FW_MSG_CODE_DRV_LOAD_PORT
1097 * FW_MSG_CODE_DRV_LOAD_FUNCTION
1102 struct bnx2x_func_hw_reset_params {
1103 /* A load phase returned by MCP.
1106 * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
1107 * FW_MSG_CODE_DRV_LOAD_COMMON
1108 * FW_MSG_CODE_DRV_LOAD_PORT
1109 * FW_MSG_CODE_DRV_LOAD_FUNCTION
1114 struct bnx2x_func_start_params {
1115 /* Multi Function mode:
1117 * - Switch Dependent
1118 * - Switch Independent
1122 /* Switch Dependent mode outer VLAN tag */
1125 /* Function cos mode */
1126 u8 network_cos_mode;
1128 /* NVGRE classification enablement */
1131 /* NO_GRE_TUNNEL/NVGRE_TUNNEL/L2GRE_TUNNEL/IPGRE_TUNNEL */
1134 /* GRE_OUTER_HEADERS_RSS/GRE_INNER_HEADERS_RSS/NVGRE_KEY_ENTROPY_RSS */
1138 struct bnx2x_func_switch_update_params {
1142 struct bnx2x_func_afex_update_params {
1144 u16 afex_default_vlan;
1145 u8 allowed_priorities;
1148 struct bnx2x_func_afex_viflists_params {
1151 u8 afex_vif_list_command;
1154 struct bnx2x_func_tx_start_params {
1155 struct priority_cos traffic_type_to_priority_cos[MAX_TRAFFIC_TYPES];
1158 u8 dont_add_pri_0_en;
1161 struct bnx2x_func_state_params {
1162 struct bnx2x_func_sp_obj *f_obj;
1164 /* Current command */
1165 enum bnx2x_func_cmd cmd;
1167 /* may have RAMROD_COMP_WAIT set only */
1168 unsigned long ramrod_flags;
1170 /* Params according to the current command */
1172 struct bnx2x_func_hw_init_params hw_init;
1173 struct bnx2x_func_hw_reset_params hw_reset;
1174 struct bnx2x_func_start_params start;
1175 struct bnx2x_func_switch_update_params switch_update;
1176 struct bnx2x_func_afex_update_params afex_update;
1177 struct bnx2x_func_afex_viflists_params afex_viflists;
1178 struct bnx2x_func_tx_start_params tx_start;
1182 struct bnx2x_func_sp_drv_ops {
1183 /* Init tool + runtime initialization:
1185 * - Common (per Path)
1189 int (*init_hw_cmn_chip)(struct bnx2x *bp);
1190 int (*init_hw_cmn)(struct bnx2x *bp);
1191 int (*init_hw_port)(struct bnx2x *bp);
1192 int (*init_hw_func)(struct bnx2x *bp);
1194 /* Reset Function HW: Common, Port, Function phases. */
1195 void (*reset_hw_cmn)(struct bnx2x *bp);
1196 void (*reset_hw_port)(struct bnx2x *bp);
1197 void (*reset_hw_func)(struct bnx2x *bp);
1199 /* Init/Free GUNZIP resources */
1200 int (*gunzip_init)(struct bnx2x *bp);
1201 void (*gunzip_end)(struct bnx2x *bp);
1203 /* Prepare/Release FW resources */
1204 int (*init_fw)(struct bnx2x *bp);
1205 void (*release_fw)(struct bnx2x *bp);
1208 struct bnx2x_func_sp_obj {
1209 enum bnx2x_func_state state, next_state;
1211 /* BNX2X_FUNC_CMD_XX bits. This object implements "one
1212 * pending" paradigm but for debug and tracing purposes it's
1213 * more convinient to have different bits for different
1216 unsigned long pending;
1218 /* Buffer to use as a ramrod data and its mapping */
1220 dma_addr_t rdata_mapping;
1222 /* Buffer to use as a afex ramrod data and its mapping.
1223 * This can't be same rdata as above because afex ramrod requests
1224 * can arrive to the object in parallel to other ramrod requests.
1227 dma_addr_t afex_rdata_mapping;
1229 /* this mutex validates that when pending flag is taken, the next
1230 * ramrod to be sent will be the one set the pending bit
1232 struct mutex one_pending_mutex;
1234 /* Driver interface */
1235 struct bnx2x_func_sp_drv_ops *drv;
1238 * Performs one state change according to the given parameters.
1240 * @return 0 in case of success and negative value otherwise.
1242 int (*send_cmd)(struct bnx2x *bp,
1243 struct bnx2x_func_state_params *params);
1246 * Checks that the requested state transition is legal.
1248 int (*check_transition)(struct bnx2x *bp,
1249 struct bnx2x_func_sp_obj *o,
1250 struct bnx2x_func_state_params *params);
1253 * Completes the pending command.
1255 int (*complete_cmd)(struct bnx2x *bp,
1256 struct bnx2x_func_sp_obj *o,
1257 enum bnx2x_func_cmd cmd);
1259 int (*wait_comp)(struct bnx2x *bp, struct bnx2x_func_sp_obj *o,
1260 enum bnx2x_func_cmd cmd);
1263 /********************** Interfaces ********************************************/
1264 /* Queueable objects set */
1265 union bnx2x_qable_obj {
1266 struct bnx2x_vlan_mac_obj vlan_mac;
1268 /************** Function state update *********/
1269 void bnx2x_init_func_obj(struct bnx2x *bp,
1270 struct bnx2x_func_sp_obj *obj,
1271 void *rdata, dma_addr_t rdata_mapping,
1272 void *afex_rdata, dma_addr_t afex_rdata_mapping,
1273 struct bnx2x_func_sp_drv_ops *drv_iface);
1275 int bnx2x_func_state_change(struct bnx2x *bp,
1276 struct bnx2x_func_state_params *params);
1278 enum bnx2x_func_state bnx2x_func_get_state(struct bnx2x *bp,
1279 struct bnx2x_func_sp_obj *o);
1280 /******************* Queue State **************/
1281 void bnx2x_init_queue_obj(struct bnx2x *bp,
1282 struct bnx2x_queue_sp_obj *obj, u8 cl_id, u32 *cids,
1283 u8 cid_cnt, u8 func_id, void *rdata,
1284 dma_addr_t rdata_mapping, unsigned long type);
1286 int bnx2x_queue_state_change(struct bnx2x *bp,
1287 struct bnx2x_queue_state_params *params);
1289 int bnx2x_get_q_logical_state(struct bnx2x *bp,
1290 struct bnx2x_queue_sp_obj *obj);
1292 /********************* VLAN-MAC ****************/
1293 void bnx2x_init_mac_obj(struct bnx2x *bp,
1294 struct bnx2x_vlan_mac_obj *mac_obj,
1295 u8 cl_id, u32 cid, u8 func_id, void *rdata,
1296 dma_addr_t rdata_mapping, int state,
1297 unsigned long *pstate, bnx2x_obj_type type,
1298 struct bnx2x_credit_pool_obj *macs_pool);
1300 void bnx2x_init_vlan_obj(struct bnx2x *bp,
1301 struct bnx2x_vlan_mac_obj *vlan_obj,
1302 u8 cl_id, u32 cid, u8 func_id, void *rdata,
1303 dma_addr_t rdata_mapping, int state,
1304 unsigned long *pstate, bnx2x_obj_type type,
1305 struct bnx2x_credit_pool_obj *vlans_pool);
1307 void bnx2x_init_vlan_mac_obj(struct bnx2x *bp,
1308 struct bnx2x_vlan_mac_obj *vlan_mac_obj,
1309 u8 cl_id, u32 cid, u8 func_id, void *rdata,
1310 dma_addr_t rdata_mapping, int state,
1311 unsigned long *pstate, bnx2x_obj_type type,
1312 struct bnx2x_credit_pool_obj *macs_pool,
1313 struct bnx2x_credit_pool_obj *vlans_pool);
1315 int bnx2x_config_vlan_mac(struct bnx2x *bp,
1316 struct bnx2x_vlan_mac_ramrod_params *p);
1318 int bnx2x_vlan_mac_move(struct bnx2x *bp,
1319 struct bnx2x_vlan_mac_ramrod_params *p,
1320 struct bnx2x_vlan_mac_obj *dest_o);
1322 /********************* RX MODE ****************/
1324 void bnx2x_init_rx_mode_obj(struct bnx2x *bp,
1325 struct bnx2x_rx_mode_obj *o);
1328 * bnx2x_config_rx_mode - Send and RX_MODE ramrod according to the provided parameters.
1330 * @p: Command parameters
1332 * Return: 0 - if operation was successfull and there is no pending completions,
1333 * positive number - if there are pending completions,
1334 * negative - if there were errors
1336 int bnx2x_config_rx_mode(struct bnx2x *bp,
1337 struct bnx2x_rx_mode_ramrod_params *p);
1339 /****************** MULTICASTS ****************/
1341 void bnx2x_init_mcast_obj(struct bnx2x *bp,
1342 struct bnx2x_mcast_obj *mcast_obj,
1343 u8 mcast_cl_id, u32 mcast_cid, u8 func_id,
1344 u8 engine_id, void *rdata, dma_addr_t rdata_mapping,
1345 int state, unsigned long *pstate,
1346 bnx2x_obj_type type);
1349 * bnx2x_config_mcast - Configure multicast MACs list.
1351 * @cmd: command to execute: BNX2X_MCAST_CMD_X
1353 * May configure a new list
1354 * provided in p->mcast_list (BNX2X_MCAST_CMD_ADD), clean up
1355 * (BNX2X_MCAST_CMD_DEL) or restore (BNX2X_MCAST_CMD_RESTORE) a current
1356 * configuration, continue to execute the pending commands
1357 * (BNX2X_MCAST_CMD_CONT).
1359 * If previous command is still pending or if number of MACs to
1360 * configure is more that maximum number of MACs in one command,
1361 * the current command will be enqueued to the tail of the
1362 * pending commands list.
1364 * Return: 0 is operation was successfull and there are no pending completions,
1365 * negative if there were errors, positive if there are pending
1368 int bnx2x_config_mcast(struct bnx2x *bp,
1369 struct bnx2x_mcast_ramrod_params *p,
1370 enum bnx2x_mcast_cmd cmd);
1372 /****************** CREDIT POOL ****************/
1373 void bnx2x_init_mac_credit_pool(struct bnx2x *bp,
1374 struct bnx2x_credit_pool_obj *p, u8 func_id,
1376 void bnx2x_init_vlan_credit_pool(struct bnx2x *bp,
1377 struct bnx2x_credit_pool_obj *p, u8 func_id,
1381 /****************** RSS CONFIGURATION ****************/
1382 void bnx2x_init_rss_config_obj(struct bnx2x *bp,
1383 struct bnx2x_rss_config_obj *rss_obj,
1384 u8 cl_id, u32 cid, u8 func_id, u8 engine_id,
1385 void *rdata, dma_addr_t rdata_mapping,
1386 int state, unsigned long *pstate,
1387 bnx2x_obj_type type);
1390 * bnx2x_config_rss - Updates RSS configuration according to provided parameters
1392 * Return: 0 in case of success
1394 int bnx2x_config_rss(struct bnx2x *bp,
1395 struct bnx2x_config_rss_params *p);
1398 * bnx2x_get_rss_ind_table - Return the current ind_table configuration.
1400 * @ind_table: buffer to fill with the current indirection
1401 * table content. Should be at least
1402 * T_ETH_INDIRECTION_TABLE_SIZE bytes long.
1404 void bnx2x_get_rss_ind_table(struct bnx2x_rss_config_obj *rss_obj,
1407 #endif /* BNX2X_SP_VERBS */