1 /* bnx2x_stats.c: Broadcom Everest network driver.
3 * Copyright (c) 2007-2012 Broadcom Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
9 * Maintained by: Eilon Greenstein <eilong@broadcom.com>
10 * Written by: Eliezer Tamir
11 * Based on code from Michael Chan's bnx2 driver
12 * UDP CSUM errata workaround by Arik Gendelman
13 * Slowpath and fastpath rework by Vladislav Zolotarov
14 * Statistics and Link management by Yitchak Gertner
18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20 #include "bnx2x_stats.h"
21 #include "bnx2x_cmn.h"
27 * General service functions
30 static inline long bnx2x_hilo(u32 *hiref)
32 u32 lo = *(hiref + 1);
33 #if (BITS_PER_LONG == 64)
36 return HILO_U64(hi, lo);
42 static u16 bnx2x_get_port_stats_dma_len(struct bnx2x *bp)
44 u16 res = sizeof(struct host_port_stats) >> 2;
46 /* if PFC stats are not supported by the MFW, don't DMA them */
47 if (!(bp->flags & BC_SUPPORTS_PFC_STATS))
48 res -= (sizeof(u32)*4) >> 2;
54 * Init service functions
57 /* Post the next statistics ramrod. Protect it with the spin in
58 * order to ensure the strict order between statistics ramrods
59 * (each ramrod has a sequence number passed in a
60 * bp->fw_stats_req->hdr.drv_stats_counter and ramrods must be
63 static void bnx2x_storm_stats_post(struct bnx2x *bp)
65 if (!bp->stats_pending) {
68 spin_lock_bh(&bp->stats_lock);
70 if (bp->stats_pending) {
71 spin_unlock_bh(&bp->stats_lock);
75 bp->fw_stats_req->hdr.drv_stats_counter =
76 cpu_to_le16(bp->stats_counter++);
78 DP(BNX2X_MSG_STATS, "Sending statistics ramrod %d\n",
79 bp->fw_stats_req->hdr.drv_stats_counter);
83 /* send FW stats ramrod */
84 rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STAT_QUERY, 0,
85 U64_HI(bp->fw_stats_req_mapping),
86 U64_LO(bp->fw_stats_req_mapping),
87 NONE_CONNECTION_TYPE);
89 bp->stats_pending = 1;
91 spin_unlock_bh(&bp->stats_lock);
95 static void bnx2x_hw_stats_post(struct bnx2x *bp)
97 struct dmae_command *dmae = &bp->stats_dmae;
98 u32 *stats_comp = bnx2x_sp(bp, stats_comp);
100 *stats_comp = DMAE_COMP_VAL;
101 if (CHIP_REV_IS_SLOW(bp))
105 if (bp->executer_idx) {
106 int loader_idx = PMF_DMAE_C(bp);
107 u32 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
108 true, DMAE_COMP_GRC);
109 opcode = bnx2x_dmae_opcode_clr_src_reset(opcode);
111 memset(dmae, 0, sizeof(struct dmae_command));
112 dmae->opcode = opcode;
113 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, dmae[0]));
114 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, dmae[0]));
115 dmae->dst_addr_lo = (DMAE_REG_CMD_MEM +
116 sizeof(struct dmae_command) *
117 (loader_idx + 1)) >> 2;
118 dmae->dst_addr_hi = 0;
119 dmae->len = sizeof(struct dmae_command) >> 2;
122 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx + 1] >> 2;
123 dmae->comp_addr_hi = 0;
127 bnx2x_post_dmae(bp, dmae, loader_idx);
129 } else if (bp->func_stx) {
131 bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp));
135 static int bnx2x_stats_comp(struct bnx2x *bp)
137 u32 *stats_comp = bnx2x_sp(bp, stats_comp);
141 while (*stats_comp != DMAE_COMP_VAL) {
143 BNX2X_ERR("timeout waiting for stats finished\n");
147 usleep_range(1000, 1000);
153 * Statistics service functions
156 static void bnx2x_stats_pmf_update(struct bnx2x *bp)
158 struct dmae_command *dmae;
160 int loader_idx = PMF_DMAE_C(bp);
161 u32 *stats_comp = bnx2x_sp(bp, stats_comp);
164 if (!bp->port.pmf || !bp->port.port_stx) {
169 bp->executer_idx = 0;
171 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, false, 0);
173 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
174 dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC);
175 dmae->src_addr_lo = bp->port.port_stx >> 2;
176 dmae->src_addr_hi = 0;
177 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
178 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
179 dmae->len = DMAE_LEN32_RD_MAX;
180 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
181 dmae->comp_addr_hi = 0;
184 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
185 dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
186 dmae->src_addr_lo = (bp->port.port_stx >> 2) + DMAE_LEN32_RD_MAX;
187 dmae->src_addr_hi = 0;
188 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats) +
189 DMAE_LEN32_RD_MAX * 4);
190 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats) +
191 DMAE_LEN32_RD_MAX * 4);
192 dmae->len = bnx2x_get_port_stats_dma_len(bp) - DMAE_LEN32_RD_MAX;
194 dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
195 dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
196 dmae->comp_val = DMAE_COMP_VAL;
199 bnx2x_hw_stats_post(bp);
200 bnx2x_stats_comp(bp);
203 static void bnx2x_port_stats_init(struct bnx2x *bp)
205 struct dmae_command *dmae;
206 int port = BP_PORT(bp);
208 int loader_idx = PMF_DMAE_C(bp);
210 u32 *stats_comp = bnx2x_sp(bp, stats_comp);
213 if (!bp->link_vars.link_up || !bp->port.pmf) {
218 bp->executer_idx = 0;
221 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
222 true, DMAE_COMP_GRC);
224 if (bp->port.port_stx) {
226 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
227 dmae->opcode = opcode;
228 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
229 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
230 dmae->dst_addr_lo = bp->port.port_stx >> 2;
231 dmae->dst_addr_hi = 0;
232 dmae->len = bnx2x_get_port_stats_dma_len(bp);
233 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
234 dmae->comp_addr_hi = 0;
240 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
241 dmae->opcode = opcode;
242 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
243 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
244 dmae->dst_addr_lo = bp->func_stx >> 2;
245 dmae->dst_addr_hi = 0;
246 dmae->len = sizeof(struct host_func_stats) >> 2;
247 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
248 dmae->comp_addr_hi = 0;
253 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
254 true, DMAE_COMP_GRC);
256 /* EMAC is special */
257 if (bp->link_vars.mac_type == MAC_TYPE_EMAC) {
258 mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0);
260 /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/
261 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
262 dmae->opcode = opcode;
263 dmae->src_addr_lo = (mac_addr +
264 EMAC_REG_EMAC_RX_STAT_AC) >> 2;
265 dmae->src_addr_hi = 0;
266 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
267 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
268 dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT;
269 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
270 dmae->comp_addr_hi = 0;
273 /* EMAC_REG_EMAC_RX_STAT_AC_28 */
274 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
275 dmae->opcode = opcode;
276 dmae->src_addr_lo = (mac_addr +
277 EMAC_REG_EMAC_RX_STAT_AC_28) >> 2;
278 dmae->src_addr_hi = 0;
279 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
280 offsetof(struct emac_stats, rx_stat_falsecarriererrors));
281 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
282 offsetof(struct emac_stats, rx_stat_falsecarriererrors));
284 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
285 dmae->comp_addr_hi = 0;
288 /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/
289 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
290 dmae->opcode = opcode;
291 dmae->src_addr_lo = (mac_addr +
292 EMAC_REG_EMAC_TX_STAT_AC) >> 2;
293 dmae->src_addr_hi = 0;
294 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
295 offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
296 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
297 offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
298 dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT;
299 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
300 dmae->comp_addr_hi = 0;
303 u32 tx_src_addr_lo, rx_src_addr_lo;
306 /* configure the params according to MAC type */
307 switch (bp->link_vars.mac_type) {
309 mac_addr = (port ? NIG_REG_INGRESS_BMAC1_MEM :
310 NIG_REG_INGRESS_BMAC0_MEM);
312 /* BIGMAC_REGISTER_TX_STAT_GTPKT ..
313 BIGMAC_REGISTER_TX_STAT_GTBYT */
314 if (CHIP_IS_E1x(bp)) {
315 tx_src_addr_lo = (mac_addr +
316 BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
317 tx_len = (8 + BIGMAC_REGISTER_TX_STAT_GTBYT -
318 BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
319 rx_src_addr_lo = (mac_addr +
320 BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
321 rx_len = (8 + BIGMAC_REGISTER_RX_STAT_GRIPJ -
322 BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
324 tx_src_addr_lo = (mac_addr +
325 BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
326 tx_len = (8 + BIGMAC2_REGISTER_TX_STAT_GTBYT -
327 BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
328 rx_src_addr_lo = (mac_addr +
329 BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
330 rx_len = (8 + BIGMAC2_REGISTER_RX_STAT_GRIPJ -
331 BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
335 case MAC_TYPE_UMAC: /* handled by MSTAT */
336 case MAC_TYPE_XMAC: /* handled by MSTAT */
338 mac_addr = port ? GRCBASE_MSTAT1 : GRCBASE_MSTAT0;
339 tx_src_addr_lo = (mac_addr +
340 MSTAT_REG_TX_STAT_GTXPOK_LO) >> 2;
341 rx_src_addr_lo = (mac_addr +
342 MSTAT_REG_RX_STAT_GR64_LO) >> 2;
343 tx_len = sizeof(bp->slowpath->
344 mac_stats.mstat_stats.stats_tx) >> 2;
345 rx_len = sizeof(bp->slowpath->
346 mac_stats.mstat_stats.stats_rx) >> 2;
351 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
352 dmae->opcode = opcode;
353 dmae->src_addr_lo = tx_src_addr_lo;
354 dmae->src_addr_hi = 0;
356 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
357 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
358 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
359 dmae->comp_addr_hi = 0;
363 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
364 dmae->opcode = opcode;
365 dmae->src_addr_hi = 0;
366 dmae->src_addr_lo = rx_src_addr_lo;
368 U64_LO(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2));
370 U64_HI(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2));
372 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
373 dmae->comp_addr_hi = 0;
378 if (!CHIP_IS_E3(bp)) {
379 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
380 dmae->opcode = opcode;
381 dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 :
382 NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2;
383 dmae->src_addr_hi = 0;
384 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
385 offsetof(struct nig_stats, egress_mac_pkt0_lo));
386 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
387 offsetof(struct nig_stats, egress_mac_pkt0_lo));
388 dmae->len = (2*sizeof(u32)) >> 2;
389 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
390 dmae->comp_addr_hi = 0;
393 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
394 dmae->opcode = opcode;
395 dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 :
396 NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2;
397 dmae->src_addr_hi = 0;
398 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
399 offsetof(struct nig_stats, egress_mac_pkt1_lo));
400 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
401 offsetof(struct nig_stats, egress_mac_pkt1_lo));
402 dmae->len = (2*sizeof(u32)) >> 2;
403 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
404 dmae->comp_addr_hi = 0;
408 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
409 dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
410 true, DMAE_COMP_PCI);
411 dmae->src_addr_lo = (port ? NIG_REG_STAT1_BRB_DISCARD :
412 NIG_REG_STAT0_BRB_DISCARD) >> 2;
413 dmae->src_addr_hi = 0;
414 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats));
415 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats));
416 dmae->len = (sizeof(struct nig_stats) - 4*sizeof(u32)) >> 2;
418 dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
419 dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
420 dmae->comp_val = DMAE_COMP_VAL;
425 static void bnx2x_func_stats_init(struct bnx2x *bp)
427 struct dmae_command *dmae = &bp->stats_dmae;
428 u32 *stats_comp = bnx2x_sp(bp, stats_comp);
436 bp->executer_idx = 0;
437 memset(dmae, 0, sizeof(struct dmae_command));
439 dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
440 true, DMAE_COMP_PCI);
441 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
442 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
443 dmae->dst_addr_lo = bp->func_stx >> 2;
444 dmae->dst_addr_hi = 0;
445 dmae->len = sizeof(struct host_func_stats) >> 2;
446 dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
447 dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
448 dmae->comp_val = DMAE_COMP_VAL;
453 static void bnx2x_stats_start(struct bnx2x *bp)
456 bnx2x_port_stats_init(bp);
458 else if (bp->func_stx)
459 bnx2x_func_stats_init(bp);
461 bnx2x_hw_stats_post(bp);
462 bnx2x_storm_stats_post(bp);
465 static void bnx2x_stats_pmf_start(struct bnx2x *bp)
467 bnx2x_stats_comp(bp);
468 bnx2x_stats_pmf_update(bp);
469 bnx2x_stats_start(bp);
472 static void bnx2x_stats_restart(struct bnx2x *bp)
474 bnx2x_stats_comp(bp);
475 bnx2x_stats_start(bp);
478 static void bnx2x_bmac_stats_update(struct bnx2x *bp)
480 struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
481 struct bnx2x_eth_stats *estats = &bp->eth_stats;
487 if (CHIP_IS_E1x(bp)) {
488 struct bmac1_stats *new = bnx2x_sp(bp, mac_stats.bmac1_stats);
490 /* the macros below will use "bmac1_stats" type */
491 UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
492 UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
493 UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
494 UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
495 UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
496 UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
497 UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
498 UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
499 UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
501 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
502 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
503 UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
504 UPDATE_STAT64(tx_stat_gt127,
505 tx_stat_etherstatspkts65octetsto127octets);
506 UPDATE_STAT64(tx_stat_gt255,
507 tx_stat_etherstatspkts128octetsto255octets);
508 UPDATE_STAT64(tx_stat_gt511,
509 tx_stat_etherstatspkts256octetsto511octets);
510 UPDATE_STAT64(tx_stat_gt1023,
511 tx_stat_etherstatspkts512octetsto1023octets);
512 UPDATE_STAT64(tx_stat_gt1518,
513 tx_stat_etherstatspkts1024octetsto1522octets);
514 UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
515 UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
516 UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
517 UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
518 UPDATE_STAT64(tx_stat_gterr,
519 tx_stat_dot3statsinternalmactransmiterrors);
520 UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
523 struct bmac2_stats *new = bnx2x_sp(bp, mac_stats.bmac2_stats);
525 /* the macros below will use "bmac2_stats" type */
526 UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
527 UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
528 UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
529 UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
530 UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
531 UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
532 UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
533 UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
534 UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
535 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
536 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
537 UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
538 UPDATE_STAT64(tx_stat_gt127,
539 tx_stat_etherstatspkts65octetsto127octets);
540 UPDATE_STAT64(tx_stat_gt255,
541 tx_stat_etherstatspkts128octetsto255octets);
542 UPDATE_STAT64(tx_stat_gt511,
543 tx_stat_etherstatspkts256octetsto511octets);
544 UPDATE_STAT64(tx_stat_gt1023,
545 tx_stat_etherstatspkts512octetsto1023octets);
546 UPDATE_STAT64(tx_stat_gt1518,
547 tx_stat_etherstatspkts1024octetsto1522octets);
548 UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
549 UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
550 UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
551 UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
552 UPDATE_STAT64(tx_stat_gterr,
553 tx_stat_dot3statsinternalmactransmiterrors);
554 UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
556 /* collect PFC stats */
557 pstats->pfc_frames_tx_hi = new->tx_stat_gtpp_hi;
558 pstats->pfc_frames_tx_lo = new->tx_stat_gtpp_lo;
560 pstats->pfc_frames_rx_hi = new->rx_stat_grpp_hi;
561 pstats->pfc_frames_rx_lo = new->rx_stat_grpp_lo;
564 estats->pause_frames_received_hi =
565 pstats->mac_stx[1].rx_stat_mac_xpf_hi;
566 estats->pause_frames_received_lo =
567 pstats->mac_stx[1].rx_stat_mac_xpf_lo;
569 estats->pause_frames_sent_hi =
570 pstats->mac_stx[1].tx_stat_outxoffsent_hi;
571 estats->pause_frames_sent_lo =
572 pstats->mac_stx[1].tx_stat_outxoffsent_lo;
574 estats->pfc_frames_received_hi =
575 pstats->pfc_frames_rx_hi;
576 estats->pfc_frames_received_lo =
577 pstats->pfc_frames_rx_lo;
578 estats->pfc_frames_sent_hi =
579 pstats->pfc_frames_tx_hi;
580 estats->pfc_frames_sent_lo =
581 pstats->pfc_frames_tx_lo;
584 static void bnx2x_mstat_stats_update(struct bnx2x *bp)
586 struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
587 struct bnx2x_eth_stats *estats = &bp->eth_stats;
589 struct mstat_stats *new = bnx2x_sp(bp, mac_stats.mstat_stats);
591 ADD_STAT64(stats_rx.rx_grerb, rx_stat_ifhcinbadoctets);
592 ADD_STAT64(stats_rx.rx_grfcs, rx_stat_dot3statsfcserrors);
593 ADD_STAT64(stats_rx.rx_grund, rx_stat_etherstatsundersizepkts);
594 ADD_STAT64(stats_rx.rx_grovr, rx_stat_dot3statsframestoolong);
595 ADD_STAT64(stats_rx.rx_grfrg, rx_stat_etherstatsfragments);
596 ADD_STAT64(stats_rx.rx_grxcf, rx_stat_maccontrolframesreceived);
597 ADD_STAT64(stats_rx.rx_grxpf, rx_stat_xoffstateentered);
598 ADD_STAT64(stats_rx.rx_grxpf, rx_stat_mac_xpf);
599 ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_outxoffsent);
600 ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_flowcontroldone);
602 /* collect pfc stats */
603 ADD_64(pstats->pfc_frames_tx_hi, new->stats_tx.tx_gtxpp_hi,
604 pstats->pfc_frames_tx_lo, new->stats_tx.tx_gtxpp_lo);
605 ADD_64(pstats->pfc_frames_rx_hi, new->stats_rx.rx_grxpp_hi,
606 pstats->pfc_frames_rx_lo, new->stats_rx.rx_grxpp_lo);
608 ADD_STAT64(stats_tx.tx_gt64, tx_stat_etherstatspkts64octets);
609 ADD_STAT64(stats_tx.tx_gt127,
610 tx_stat_etherstatspkts65octetsto127octets);
611 ADD_STAT64(stats_tx.tx_gt255,
612 tx_stat_etherstatspkts128octetsto255octets);
613 ADD_STAT64(stats_tx.tx_gt511,
614 tx_stat_etherstatspkts256octetsto511octets);
615 ADD_STAT64(stats_tx.tx_gt1023,
616 tx_stat_etherstatspkts512octetsto1023octets);
617 ADD_STAT64(stats_tx.tx_gt1518,
618 tx_stat_etherstatspkts1024octetsto1522octets);
619 ADD_STAT64(stats_tx.tx_gt2047, tx_stat_mac_2047);
621 ADD_STAT64(stats_tx.tx_gt4095, tx_stat_mac_4095);
622 ADD_STAT64(stats_tx.tx_gt9216, tx_stat_mac_9216);
623 ADD_STAT64(stats_tx.tx_gt16383, tx_stat_mac_16383);
625 ADD_STAT64(stats_tx.tx_gterr,
626 tx_stat_dot3statsinternalmactransmiterrors);
627 ADD_STAT64(stats_tx.tx_gtufl, tx_stat_mac_ufl);
629 estats->etherstatspkts1024octetsto1522octets_hi =
630 pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_hi;
631 estats->etherstatspkts1024octetsto1522octets_lo =
632 pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_lo;
634 estats->etherstatspktsover1522octets_hi =
635 pstats->mac_stx[1].tx_stat_mac_2047_hi;
636 estats->etherstatspktsover1522octets_lo =
637 pstats->mac_stx[1].tx_stat_mac_2047_lo;
639 ADD_64(estats->etherstatspktsover1522octets_hi,
640 pstats->mac_stx[1].tx_stat_mac_4095_hi,
641 estats->etherstatspktsover1522octets_lo,
642 pstats->mac_stx[1].tx_stat_mac_4095_lo);
644 ADD_64(estats->etherstatspktsover1522octets_hi,
645 pstats->mac_stx[1].tx_stat_mac_9216_hi,
646 estats->etherstatspktsover1522octets_lo,
647 pstats->mac_stx[1].tx_stat_mac_9216_lo);
649 ADD_64(estats->etherstatspktsover1522octets_hi,
650 pstats->mac_stx[1].tx_stat_mac_16383_hi,
651 estats->etherstatspktsover1522octets_lo,
652 pstats->mac_stx[1].tx_stat_mac_16383_lo);
654 estats->pause_frames_received_hi =
655 pstats->mac_stx[1].rx_stat_mac_xpf_hi;
656 estats->pause_frames_received_lo =
657 pstats->mac_stx[1].rx_stat_mac_xpf_lo;
659 estats->pause_frames_sent_hi =
660 pstats->mac_stx[1].tx_stat_outxoffsent_hi;
661 estats->pause_frames_sent_lo =
662 pstats->mac_stx[1].tx_stat_outxoffsent_lo;
664 estats->pfc_frames_received_hi =
665 pstats->pfc_frames_rx_hi;
666 estats->pfc_frames_received_lo =
667 pstats->pfc_frames_rx_lo;
668 estats->pfc_frames_sent_hi =
669 pstats->pfc_frames_tx_hi;
670 estats->pfc_frames_sent_lo =
671 pstats->pfc_frames_tx_lo;
674 static void bnx2x_emac_stats_update(struct bnx2x *bp)
676 struct emac_stats *new = bnx2x_sp(bp, mac_stats.emac_stats);
677 struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
678 struct bnx2x_eth_stats *estats = &bp->eth_stats;
680 UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets);
681 UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets);
682 UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors);
683 UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors);
684 UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors);
685 UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors);
686 UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts);
687 UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong);
688 UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments);
689 UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers);
690 UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived);
691 UPDATE_EXTEND_STAT(rx_stat_xoffstateentered);
692 UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived);
693 UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived);
694 UPDATE_EXTEND_STAT(tx_stat_outxonsent);
695 UPDATE_EXTEND_STAT(tx_stat_outxoffsent);
696 UPDATE_EXTEND_STAT(tx_stat_flowcontroldone);
697 UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions);
698 UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes);
699 UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes);
700 UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions);
701 UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions);
702 UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions);
703 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets);
704 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets);
705 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets);
706 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets);
707 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets);
708 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets);
709 UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets);
710 UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors);
712 estats->pause_frames_received_hi =
713 pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi;
714 estats->pause_frames_received_lo =
715 pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo;
716 ADD_64(estats->pause_frames_received_hi,
717 pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi,
718 estats->pause_frames_received_lo,
719 pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo);
721 estats->pause_frames_sent_hi =
722 pstats->mac_stx[1].tx_stat_outxonsent_hi;
723 estats->pause_frames_sent_lo =
724 pstats->mac_stx[1].tx_stat_outxonsent_lo;
725 ADD_64(estats->pause_frames_sent_hi,
726 pstats->mac_stx[1].tx_stat_outxoffsent_hi,
727 estats->pause_frames_sent_lo,
728 pstats->mac_stx[1].tx_stat_outxoffsent_lo);
731 static int bnx2x_hw_stats_update(struct bnx2x *bp)
733 struct nig_stats *new = bnx2x_sp(bp, nig_stats);
734 struct nig_stats *old = &(bp->port.old_nig_stats);
735 struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
736 struct bnx2x_eth_stats *estats = &bp->eth_stats;
742 switch (bp->link_vars.mac_type) {
744 bnx2x_bmac_stats_update(bp);
748 bnx2x_emac_stats_update(bp);
753 bnx2x_mstat_stats_update(bp);
756 case MAC_TYPE_NONE: /* unreached */
758 "stats updated by DMAE but no MAC active\n");
761 default: /* unreached */
762 BNX2X_ERR("Unknown MAC type\n");
765 ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo,
766 new->brb_discard - old->brb_discard);
767 ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo,
768 new->brb_truncate - old->brb_truncate);
770 if (!CHIP_IS_E3(bp)) {
771 UPDATE_STAT64_NIG(egress_mac_pkt0,
772 etherstatspkts1024octetsto1522octets);
773 UPDATE_STAT64_NIG(egress_mac_pkt1,
774 etherstatspktsover1522octets);
777 memcpy(old, new, sizeof(struct nig_stats));
779 memcpy(&(estats->rx_stat_ifhcinbadoctets_hi), &(pstats->mac_stx[1]),
780 sizeof(struct mac_stx));
781 estats->brb_drop_hi = pstats->brb_drop_hi;
782 estats->brb_drop_lo = pstats->brb_drop_lo;
784 pstats->host_port_stats_counter++;
788 SHMEM_RD(bp, port_mb[BP_PORT(bp)].stat_nig_timer);
789 if (nig_timer_max != estats->nig_timer_max) {
790 estats->nig_timer_max = nig_timer_max;
791 BNX2X_ERR("NIG timer max (%u)\n",
792 estats->nig_timer_max);
799 static int bnx2x_storm_stats_update(struct bnx2x *bp)
801 struct tstorm_per_port_stats *tport =
802 &bp->fw_stats_data->port.tstorm_port_statistics;
803 struct tstorm_per_pf_stats *tfunc =
804 &bp->fw_stats_data->pf.tstorm_pf_statistics;
805 struct host_func_stats *fstats = bnx2x_sp(bp, func_stats);
806 struct bnx2x_eth_stats *estats = &bp->eth_stats;
807 struct bnx2x_eth_stats_old *estats_old = &bp->eth_stats_old;
808 struct stats_counter *counters = &bp->fw_stats_data->storm_counters;
810 u16 cur_stats_counter;
812 /* Make sure we use the value of the counter
813 * used for sending the last stats ramrod.
815 spin_lock_bh(&bp->stats_lock);
816 cur_stats_counter = bp->stats_counter - 1;
817 spin_unlock_bh(&bp->stats_lock);
819 /* are storm stats valid? */
820 if (le16_to_cpu(counters->xstats_counter) != cur_stats_counter) {
822 "stats not updated by xstorm xstorm counter (0x%x) != stats_counter (0x%x)\n",
823 le16_to_cpu(counters->xstats_counter), bp->stats_counter);
827 if (le16_to_cpu(counters->ustats_counter) != cur_stats_counter) {
829 "stats not updated by ustorm ustorm counter (0x%x) != stats_counter (0x%x)\n",
830 le16_to_cpu(counters->ustats_counter), bp->stats_counter);
834 if (le16_to_cpu(counters->cstats_counter) != cur_stats_counter) {
836 "stats not updated by cstorm cstorm counter (0x%x) != stats_counter (0x%x)\n",
837 le16_to_cpu(counters->cstats_counter), bp->stats_counter);
841 if (le16_to_cpu(counters->tstats_counter) != cur_stats_counter) {
843 "stats not updated by tstorm tstorm counter (0x%x) != stats_counter (0x%x)\n",
844 le16_to_cpu(counters->tstats_counter), bp->stats_counter);
848 estats->error_bytes_received_hi = 0;
849 estats->error_bytes_received_lo = 0;
851 for_each_eth_queue(bp, i) {
852 struct bnx2x_fastpath *fp = &bp->fp[i];
853 struct tstorm_per_queue_stats *tclient =
854 &bp->fw_stats_data->queue_stats[i].
855 tstorm_queue_statistics;
856 struct tstorm_per_queue_stats *old_tclient = &fp->old_tclient;
857 struct ustorm_per_queue_stats *uclient =
858 &bp->fw_stats_data->queue_stats[i].
859 ustorm_queue_statistics;
860 struct ustorm_per_queue_stats *old_uclient = &fp->old_uclient;
861 struct xstorm_per_queue_stats *xclient =
862 &bp->fw_stats_data->queue_stats[i].
863 xstorm_queue_statistics;
864 struct xstorm_per_queue_stats *old_xclient = &fp->old_xclient;
865 struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
866 struct bnx2x_eth_q_stats_old *qstats_old = &fp->eth_q_stats_old;
870 DP(BNX2X_MSG_STATS, "queue[%d]: ucast_sent 0x%x, bcast_sent 0x%x mcast_sent 0x%x\n",
871 i, xclient->ucast_pkts_sent,
872 xclient->bcast_pkts_sent, xclient->mcast_pkts_sent);
874 DP(BNX2X_MSG_STATS, "---------------\n");
876 UPDATE_QSTAT(tclient->rcv_bcast_bytes,
877 total_broadcast_bytes_received);
878 UPDATE_QSTAT(tclient->rcv_mcast_bytes,
879 total_multicast_bytes_received);
880 UPDATE_QSTAT(tclient->rcv_ucast_bytes,
881 total_unicast_bytes_received);
884 * sum to total_bytes_received all
885 * unicast/multicast/broadcast
887 qstats->total_bytes_received_hi =
888 qstats->total_broadcast_bytes_received_hi;
889 qstats->total_bytes_received_lo =
890 qstats->total_broadcast_bytes_received_lo;
892 ADD_64(qstats->total_bytes_received_hi,
893 qstats->total_multicast_bytes_received_hi,
894 qstats->total_bytes_received_lo,
895 qstats->total_multicast_bytes_received_lo);
897 ADD_64(qstats->total_bytes_received_hi,
898 qstats->total_unicast_bytes_received_hi,
899 qstats->total_bytes_received_lo,
900 qstats->total_unicast_bytes_received_lo);
902 qstats->valid_bytes_received_hi =
903 qstats->total_bytes_received_hi;
904 qstats->valid_bytes_received_lo =
905 qstats->total_bytes_received_lo;
908 UPDATE_EXTEND_TSTAT(rcv_ucast_pkts,
909 total_unicast_packets_received);
910 UPDATE_EXTEND_TSTAT(rcv_mcast_pkts,
911 total_multicast_packets_received);
912 UPDATE_EXTEND_TSTAT(rcv_bcast_pkts,
913 total_broadcast_packets_received);
914 UPDATE_EXTEND_E_TSTAT(pkts_too_big_discard,
915 etherstatsoverrsizepkts);
916 UPDATE_EXTEND_E_TSTAT(no_buff_discard, no_buff_discard);
918 SUB_EXTEND_USTAT(ucast_no_buff_pkts,
919 total_unicast_packets_received);
920 SUB_EXTEND_USTAT(mcast_no_buff_pkts,
921 total_multicast_packets_received);
922 SUB_EXTEND_USTAT(bcast_no_buff_pkts,
923 total_broadcast_packets_received);
924 UPDATE_EXTEND_E_USTAT(ucast_no_buff_pkts, no_buff_discard);
925 UPDATE_EXTEND_E_USTAT(mcast_no_buff_pkts, no_buff_discard);
926 UPDATE_EXTEND_E_USTAT(bcast_no_buff_pkts, no_buff_discard);
928 UPDATE_QSTAT(xclient->bcast_bytes_sent,
929 total_broadcast_bytes_transmitted);
930 UPDATE_QSTAT(xclient->mcast_bytes_sent,
931 total_multicast_bytes_transmitted);
932 UPDATE_QSTAT(xclient->ucast_bytes_sent,
933 total_unicast_bytes_transmitted);
936 * sum to total_bytes_transmitted all
937 * unicast/multicast/broadcast
939 qstats->total_bytes_transmitted_hi =
940 qstats->total_unicast_bytes_transmitted_hi;
941 qstats->total_bytes_transmitted_lo =
942 qstats->total_unicast_bytes_transmitted_lo;
944 ADD_64(qstats->total_bytes_transmitted_hi,
945 qstats->total_broadcast_bytes_transmitted_hi,
946 qstats->total_bytes_transmitted_lo,
947 qstats->total_broadcast_bytes_transmitted_lo);
949 ADD_64(qstats->total_bytes_transmitted_hi,
950 qstats->total_multicast_bytes_transmitted_hi,
951 qstats->total_bytes_transmitted_lo,
952 qstats->total_multicast_bytes_transmitted_lo);
954 UPDATE_EXTEND_XSTAT(ucast_pkts_sent,
955 total_unicast_packets_transmitted);
956 UPDATE_EXTEND_XSTAT(mcast_pkts_sent,
957 total_multicast_packets_transmitted);
958 UPDATE_EXTEND_XSTAT(bcast_pkts_sent,
959 total_broadcast_packets_transmitted);
961 UPDATE_EXTEND_TSTAT(checksum_discard,
962 total_packets_received_checksum_discarded);
963 UPDATE_EXTEND_TSTAT(ttl0_discard,
964 total_packets_received_ttl0_discarded);
966 UPDATE_EXTEND_XSTAT(error_drop_pkts,
967 total_transmitted_dropped_packets_error);
969 /* TPA aggregations completed */
970 UPDATE_EXTEND_E_USTAT(coalesced_events, total_tpa_aggregations);
971 /* Number of network frames aggregated by TPA */
972 UPDATE_EXTEND_E_USTAT(coalesced_pkts,
973 total_tpa_aggregated_frames);
974 /* Total number of bytes in completed TPA aggregations */
975 UPDATE_QSTAT(uclient->coalesced_bytes, total_tpa_bytes);
977 UPDATE_ESTAT_QSTAT_64(total_tpa_bytes);
979 UPDATE_FSTAT_QSTAT(total_bytes_received);
980 UPDATE_FSTAT_QSTAT(total_bytes_transmitted);
981 UPDATE_FSTAT_QSTAT(total_unicast_packets_received);
982 UPDATE_FSTAT_QSTAT(total_multicast_packets_received);
983 UPDATE_FSTAT_QSTAT(total_broadcast_packets_received);
984 UPDATE_FSTAT_QSTAT(total_unicast_packets_transmitted);
985 UPDATE_FSTAT_QSTAT(total_multicast_packets_transmitted);
986 UPDATE_FSTAT_QSTAT(total_broadcast_packets_transmitted);
987 UPDATE_FSTAT_QSTAT(valid_bytes_received);
990 ADD_64(estats->total_bytes_received_hi,
991 estats->rx_stat_ifhcinbadoctets_hi,
992 estats->total_bytes_received_lo,
993 estats->rx_stat_ifhcinbadoctets_lo);
995 ADD_64(estats->total_bytes_received_hi,
996 le32_to_cpu(tfunc->rcv_error_bytes.hi),
997 estats->total_bytes_received_lo,
998 le32_to_cpu(tfunc->rcv_error_bytes.lo));
1000 ADD_64(estats->error_bytes_received_hi,
1001 le32_to_cpu(tfunc->rcv_error_bytes.hi),
1002 estats->error_bytes_received_lo,
1003 le32_to_cpu(tfunc->rcv_error_bytes.lo));
1005 UPDATE_ESTAT(etherstatsoverrsizepkts, rx_stat_dot3statsframestoolong);
1007 ADD_64(estats->error_bytes_received_hi,
1008 estats->rx_stat_ifhcinbadoctets_hi,
1009 estats->error_bytes_received_lo,
1010 estats->rx_stat_ifhcinbadoctets_lo);
1013 struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old;
1014 UPDATE_FW_STAT(mac_filter_discard);
1015 UPDATE_FW_STAT(mf_tag_discard);
1016 UPDATE_FW_STAT(brb_truncate_discard);
1017 UPDATE_FW_STAT(mac_discard);
1020 fstats->host_func_stats_start = ++fstats->host_func_stats_end;
1022 bp->stats_pending = 0;
1027 static void bnx2x_net_stats_update(struct bnx2x *bp)
1029 struct bnx2x_eth_stats *estats = &bp->eth_stats;
1030 struct net_device_stats *nstats = &bp->dev->stats;
1034 nstats->rx_packets =
1035 bnx2x_hilo(&estats->total_unicast_packets_received_hi) +
1036 bnx2x_hilo(&estats->total_multicast_packets_received_hi) +
1037 bnx2x_hilo(&estats->total_broadcast_packets_received_hi);
1039 nstats->tx_packets =
1040 bnx2x_hilo(&estats->total_unicast_packets_transmitted_hi) +
1041 bnx2x_hilo(&estats->total_multicast_packets_transmitted_hi) +
1042 bnx2x_hilo(&estats->total_broadcast_packets_transmitted_hi);
1044 nstats->rx_bytes = bnx2x_hilo(&estats->total_bytes_received_hi);
1046 nstats->tx_bytes = bnx2x_hilo(&estats->total_bytes_transmitted_hi);
1048 tmp = estats->mac_discard;
1049 for_each_rx_queue(bp, i)
1050 tmp += le32_to_cpu(bp->fp[i].old_tclient.checksum_discard);
1051 nstats->rx_dropped = tmp + bp->net_stats_old.rx_dropped;
1053 nstats->tx_dropped = 0;
1056 bnx2x_hilo(&estats->total_multicast_packets_received_hi);
1058 nstats->collisions =
1059 bnx2x_hilo(&estats->tx_stat_etherstatscollisions_hi);
1061 nstats->rx_length_errors =
1062 bnx2x_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) +
1063 bnx2x_hilo(&estats->etherstatsoverrsizepkts_hi);
1064 nstats->rx_over_errors = bnx2x_hilo(&estats->brb_drop_hi) +
1065 bnx2x_hilo(&estats->brb_truncate_hi);
1066 nstats->rx_crc_errors =
1067 bnx2x_hilo(&estats->rx_stat_dot3statsfcserrors_hi);
1068 nstats->rx_frame_errors =
1069 bnx2x_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi);
1070 nstats->rx_fifo_errors = bnx2x_hilo(&estats->no_buff_discard_hi);
1071 nstats->rx_missed_errors = 0;
1073 nstats->rx_errors = nstats->rx_length_errors +
1074 nstats->rx_over_errors +
1075 nstats->rx_crc_errors +
1076 nstats->rx_frame_errors +
1077 nstats->rx_fifo_errors +
1078 nstats->rx_missed_errors;
1080 nstats->tx_aborted_errors =
1081 bnx2x_hilo(&estats->tx_stat_dot3statslatecollisions_hi) +
1082 bnx2x_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi);
1083 nstats->tx_carrier_errors =
1084 bnx2x_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi);
1085 nstats->tx_fifo_errors = 0;
1086 nstats->tx_heartbeat_errors = 0;
1087 nstats->tx_window_errors = 0;
1089 nstats->tx_errors = nstats->tx_aborted_errors +
1090 nstats->tx_carrier_errors +
1091 bnx2x_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi);
1094 static void bnx2x_drv_stats_update(struct bnx2x *bp)
1096 struct bnx2x_eth_stats *estats = &bp->eth_stats;
1099 for_each_queue(bp, i) {
1100 struct bnx2x_eth_q_stats *qstats = &bp->fp[i].eth_q_stats;
1101 struct bnx2x_eth_q_stats_old *qstats_old =
1102 &bp->fp[i].eth_q_stats_old;
1104 UPDATE_ESTAT_QSTAT(driver_xoff);
1105 UPDATE_ESTAT_QSTAT(rx_err_discard_pkt);
1106 UPDATE_ESTAT_QSTAT(rx_skb_alloc_failed);
1107 UPDATE_ESTAT_QSTAT(hw_csum_err);
1111 static bool bnx2x_edebug_stats_stopped(struct bnx2x *bp)
1115 if (SHMEM2_HAS(bp, edebug_driver_if[1])) {
1116 val = SHMEM2_RD(bp, edebug_driver_if[1]);
1118 if (val == EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT)
1125 static void bnx2x_stats_update(struct bnx2x *bp)
1127 u32 *stats_comp = bnx2x_sp(bp, stats_comp);
1129 if (bnx2x_edebug_stats_stopped(bp))
1132 if (*stats_comp != DMAE_COMP_VAL)
1136 bnx2x_hw_stats_update(bp);
1138 if (bnx2x_storm_stats_update(bp) && (bp->stats_pending++ == 3)) {
1139 BNX2X_ERR("storm stats were not updated for 3 times\n");
1144 bnx2x_net_stats_update(bp);
1145 bnx2x_drv_stats_update(bp);
1147 if (netif_msg_timer(bp)) {
1148 struct bnx2x_eth_stats *estats = &bp->eth_stats;
1150 netdev_dbg(bp->dev, "brb drops %u brb truncate %u\n",
1151 estats->brb_drop_lo, estats->brb_truncate_lo);
1154 bnx2x_hw_stats_post(bp);
1155 bnx2x_storm_stats_post(bp);
1158 static void bnx2x_port_stats_stop(struct bnx2x *bp)
1160 struct dmae_command *dmae;
1162 int loader_idx = PMF_DMAE_C(bp);
1163 u32 *stats_comp = bnx2x_sp(bp, stats_comp);
1165 bp->executer_idx = 0;
1167 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, false, 0);
1169 if (bp->port.port_stx) {
1171 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
1173 dmae->opcode = bnx2x_dmae_opcode_add_comp(
1174 opcode, DMAE_COMP_GRC);
1176 dmae->opcode = bnx2x_dmae_opcode_add_comp(
1177 opcode, DMAE_COMP_PCI);
1179 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
1180 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
1181 dmae->dst_addr_lo = bp->port.port_stx >> 2;
1182 dmae->dst_addr_hi = 0;
1183 dmae->len = bnx2x_get_port_stats_dma_len(bp);
1185 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
1186 dmae->comp_addr_hi = 0;
1189 dmae->comp_addr_lo =
1190 U64_LO(bnx2x_sp_mapping(bp, stats_comp));
1191 dmae->comp_addr_hi =
1192 U64_HI(bnx2x_sp_mapping(bp, stats_comp));
1193 dmae->comp_val = DMAE_COMP_VAL;
1201 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
1203 bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
1204 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
1205 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
1206 dmae->dst_addr_lo = bp->func_stx >> 2;
1207 dmae->dst_addr_hi = 0;
1208 dmae->len = sizeof(struct host_func_stats) >> 2;
1209 dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
1210 dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
1211 dmae->comp_val = DMAE_COMP_VAL;
1217 static void bnx2x_stats_stop(struct bnx2x *bp)
1221 bnx2x_stats_comp(bp);
1224 update = (bnx2x_hw_stats_update(bp) == 0);
1226 update |= (bnx2x_storm_stats_update(bp) == 0);
1229 bnx2x_net_stats_update(bp);
1232 bnx2x_port_stats_stop(bp);
1234 bnx2x_hw_stats_post(bp);
1235 bnx2x_stats_comp(bp);
1239 static void bnx2x_stats_do_nothing(struct bnx2x *bp)
1243 static const struct {
1244 void (*action)(struct bnx2x *bp);
1245 enum bnx2x_stats_state next_state;
1246 } bnx2x_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = {
1249 /* DISABLED PMF */ {bnx2x_stats_pmf_update, STATS_STATE_DISABLED},
1250 /* LINK_UP */ {bnx2x_stats_start, STATS_STATE_ENABLED},
1251 /* UPDATE */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED},
1252 /* STOP */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED}
1255 /* ENABLED PMF */ {bnx2x_stats_pmf_start, STATS_STATE_ENABLED},
1256 /* LINK_UP */ {bnx2x_stats_restart, STATS_STATE_ENABLED},
1257 /* UPDATE */ {bnx2x_stats_update, STATS_STATE_ENABLED},
1258 /* STOP */ {bnx2x_stats_stop, STATS_STATE_DISABLED}
1262 void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event)
1264 enum bnx2x_stats_state state;
1265 if (unlikely(bp->panic))
1268 spin_lock_bh(&bp->stats_lock);
1269 state = bp->stats_state;
1270 bp->stats_state = bnx2x_stats_stm[state][event].next_state;
1271 spin_unlock_bh(&bp->stats_lock);
1273 bnx2x_stats_stm[state][event].action(bp);
1275 if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp))
1276 DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n",
1277 state, event, bp->stats_state);
1280 static void bnx2x_port_stats_base_init(struct bnx2x *bp)
1282 struct dmae_command *dmae;
1283 u32 *stats_comp = bnx2x_sp(bp, stats_comp);
1286 if (!bp->port.pmf || !bp->port.port_stx) {
1287 BNX2X_ERR("BUG!\n");
1291 bp->executer_idx = 0;
1293 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
1294 dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
1295 true, DMAE_COMP_PCI);
1296 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
1297 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
1298 dmae->dst_addr_lo = bp->port.port_stx >> 2;
1299 dmae->dst_addr_hi = 0;
1300 dmae->len = bnx2x_get_port_stats_dma_len(bp);
1301 dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
1302 dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
1303 dmae->comp_val = DMAE_COMP_VAL;
1306 bnx2x_hw_stats_post(bp);
1307 bnx2x_stats_comp(bp);
1310 static void bnx2x_func_stats_base_update(struct bnx2x *bp)
1312 struct dmae_command *dmae = &bp->stats_dmae;
1313 u32 *stats_comp = bnx2x_sp(bp, stats_comp);
1316 if (!bp->func_stx) {
1317 BNX2X_ERR("BUG!\n");
1321 bp->executer_idx = 0;
1322 memset(dmae, 0, sizeof(struct dmae_command));
1324 dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
1325 true, DMAE_COMP_PCI);
1326 dmae->src_addr_lo = bp->func_stx >> 2;
1327 dmae->src_addr_hi = 0;
1328 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
1329 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
1330 dmae->len = sizeof(struct host_func_stats) >> 2;
1331 dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
1332 dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
1333 dmae->comp_val = DMAE_COMP_VAL;
1336 bnx2x_hw_stats_post(bp);
1337 bnx2x_stats_comp(bp);
1341 * This function will prepare the statistics ramrod data the way
1342 * we will only have to increment the statistics counter and
1343 * send the ramrod each time we have to.
1347 static inline void bnx2x_prep_fw_stats_req(struct bnx2x *bp)
1350 int first_queue_query_index;
1351 struct stats_query_header *stats_hdr = &bp->fw_stats_req->hdr;
1353 dma_addr_t cur_data_offset;
1354 struct stats_query_entry *cur_query_entry;
1356 stats_hdr->cmd_num = bp->fw_stats_num;
1357 stats_hdr->drv_stats_counter = 0;
1359 /* storm_counters struct contains the counters of completed
1360 * statistics requests per storm which are incremented by FW
1361 * each time it completes hadning a statistics ramrod. We will
1362 * check these counters in the timer handler and discard a
1363 * (statistics) ramrod completion.
1365 cur_data_offset = bp->fw_stats_data_mapping +
1366 offsetof(struct bnx2x_fw_stats_data, storm_counters);
1368 stats_hdr->stats_counters_addrs.hi =
1369 cpu_to_le32(U64_HI(cur_data_offset));
1370 stats_hdr->stats_counters_addrs.lo =
1371 cpu_to_le32(U64_LO(cur_data_offset));
1373 /* prepare to the first stats ramrod (will be completed with
1374 * the counters equal to zero) - init counters to somethig different.
1376 memset(&bp->fw_stats_data->storm_counters, 0xff,
1377 sizeof(struct stats_counter));
1379 /**** Port FW statistics data ****/
1380 cur_data_offset = bp->fw_stats_data_mapping +
1381 offsetof(struct bnx2x_fw_stats_data, port);
1383 cur_query_entry = &bp->fw_stats_req->query[BNX2X_PORT_QUERY_IDX];
1385 cur_query_entry->kind = STATS_TYPE_PORT;
1386 /* For port query index is a DONT CARE */
1387 cur_query_entry->index = BP_PORT(bp);
1388 /* For port query funcID is a DONT CARE */
1389 cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
1390 cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset));
1391 cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset));
1393 /**** PF FW statistics data ****/
1394 cur_data_offset = bp->fw_stats_data_mapping +
1395 offsetof(struct bnx2x_fw_stats_data, pf);
1397 cur_query_entry = &bp->fw_stats_req->query[BNX2X_PF_QUERY_IDX];
1399 cur_query_entry->kind = STATS_TYPE_PF;
1400 /* For PF query index is a DONT CARE */
1401 cur_query_entry->index = BP_PORT(bp);
1402 cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
1403 cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset));
1404 cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset));
1406 /**** FCoE FW statistics data ****/
1408 cur_data_offset = bp->fw_stats_data_mapping +
1409 offsetof(struct bnx2x_fw_stats_data, fcoe);
1412 &bp->fw_stats_req->query[BNX2X_FCOE_QUERY_IDX];
1414 cur_query_entry->kind = STATS_TYPE_FCOE;
1415 /* For FCoE query index is a DONT CARE */
1416 cur_query_entry->index = BP_PORT(bp);
1417 cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
1418 cur_query_entry->address.hi =
1419 cpu_to_le32(U64_HI(cur_data_offset));
1420 cur_query_entry->address.lo =
1421 cpu_to_le32(U64_LO(cur_data_offset));
1424 /**** Clients' queries ****/
1425 cur_data_offset = bp->fw_stats_data_mapping +
1426 offsetof(struct bnx2x_fw_stats_data, queue_stats);
1428 /* first queue query index depends whether FCoE offloaded request will
1429 * be included in the ramrod
1432 first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX;
1434 first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX - 1;
1436 for_each_eth_queue(bp, i) {
1439 query[first_queue_query_index + i];
1441 cur_query_entry->kind = STATS_TYPE_QUEUE;
1442 cur_query_entry->index = bnx2x_stats_id(&bp->fp[i]);
1443 cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
1444 cur_query_entry->address.hi =
1445 cpu_to_le32(U64_HI(cur_data_offset));
1446 cur_query_entry->address.lo =
1447 cpu_to_le32(U64_LO(cur_data_offset));
1449 cur_data_offset += sizeof(struct per_queue_stats);
1452 /* add FCoE queue query if needed */
1456 query[first_queue_query_index + i];
1458 cur_query_entry->kind = STATS_TYPE_QUEUE;
1459 cur_query_entry->index = bnx2x_stats_id(&bp->fp[FCOE_IDX]);
1460 cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
1461 cur_query_entry->address.hi =
1462 cpu_to_le32(U64_HI(cur_data_offset));
1463 cur_query_entry->address.lo =
1464 cpu_to_le32(U64_LO(cur_data_offset));
1468 void bnx2x_stats_init(struct bnx2x *bp)
1470 int /*abs*/port = BP_PORT(bp);
1471 int mb_idx = BP_FW_MB_IDX(bp);
1474 bp->stats_pending = 0;
1475 bp->executer_idx = 0;
1476 bp->stats_counter = 0;
1478 /* port and func stats for management */
1479 if (!BP_NOMCP(bp)) {
1480 bp->port.port_stx = SHMEM_RD(bp, port_mb[port].port_stx);
1481 bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param);
1484 bp->port.port_stx = 0;
1487 DP(BNX2X_MSG_STATS, "port_stx 0x%x func_stx 0x%x\n",
1488 bp->port.port_stx, bp->func_stx);
1490 /* pmf should retrieve port statistics from SP on a non-init*/
1491 if (!bp->stats_init && bp->port.pmf && bp->port.port_stx)
1492 bnx2x_stats_handle(bp, STATS_EVENT_PMF);
1496 memset(&(bp->port.old_nig_stats), 0, sizeof(struct nig_stats));
1497 bp->port.old_nig_stats.brb_discard =
1498 REG_RD(bp, NIG_REG_STAT0_BRB_DISCARD + port*0x38);
1499 bp->port.old_nig_stats.brb_truncate =
1500 REG_RD(bp, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38);
1501 if (!CHIP_IS_E3(bp)) {
1502 REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50,
1503 &(bp->port.old_nig_stats.egress_mac_pkt0_lo), 2);
1504 REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50,
1505 &(bp->port.old_nig_stats.egress_mac_pkt1_lo), 2);
1508 /* function stats */
1509 for_each_queue(bp, i) {
1510 struct bnx2x_fastpath *fp = &bp->fp[i];
1512 memset(&fp->old_tclient, 0, sizeof(fp->old_tclient));
1513 memset(&fp->old_uclient, 0, sizeof(fp->old_uclient));
1514 memset(&fp->old_xclient, 0, sizeof(fp->old_xclient));
1515 if (bp->stats_init) {
1516 memset(&fp->eth_q_stats, 0, sizeof(fp->eth_q_stats));
1517 memset(&fp->eth_q_stats_old, 0,
1518 sizeof(fp->eth_q_stats_old));
1522 /* Prepare statistics ramrod data */
1523 bnx2x_prep_fw_stats_req(bp);
1525 memset(&bp->dev->stats, 0, sizeof(bp->dev->stats));
1526 if (bp->stats_init) {
1527 memset(&bp->net_stats_old, 0, sizeof(bp->net_stats_old));
1528 memset(&bp->fw_stats_old, 0, sizeof(bp->fw_stats_old));
1529 memset(&bp->eth_stats_old, 0, sizeof(bp->eth_stats_old));
1530 memset(&bp->eth_stats, 0, sizeof(bp->eth_stats));
1532 /* Clean SP from previous statistics */
1534 memset(bnx2x_sp(bp, func_stats), 0,
1535 sizeof(struct host_func_stats));
1536 bnx2x_func_stats_init(bp);
1537 bnx2x_hw_stats_post(bp);
1538 bnx2x_stats_comp(bp);
1542 bp->stats_state = STATS_STATE_DISABLED;
1544 if (bp->port.pmf && bp->port.port_stx)
1545 bnx2x_port_stats_base_init(bp);
1547 /* On a non-init, retrieve previous statistics from SP */
1548 if (!bp->stats_init && bp->func_stx)
1549 bnx2x_func_stats_base_update(bp);
1551 /* mark the end of statistics initializiation */
1552 bp->stats_init = false;
1555 void bnx2x_save_statistics(struct bnx2x *bp)
1558 struct net_device_stats *nstats = &bp->dev->stats;
1560 /* save queue statistics */
1561 for_each_eth_queue(bp, i) {
1562 struct bnx2x_fastpath *fp = &bp->fp[i];
1563 struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
1564 struct bnx2x_eth_q_stats_old *qstats_old = &fp->eth_q_stats_old;
1566 UPDATE_QSTAT_OLD(total_unicast_bytes_received_hi);
1567 UPDATE_QSTAT_OLD(total_unicast_bytes_received_lo);
1568 UPDATE_QSTAT_OLD(total_broadcast_bytes_received_hi);
1569 UPDATE_QSTAT_OLD(total_broadcast_bytes_received_lo);
1570 UPDATE_QSTAT_OLD(total_multicast_bytes_received_hi);
1571 UPDATE_QSTAT_OLD(total_multicast_bytes_received_lo);
1572 UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_hi);
1573 UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_lo);
1574 UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_hi);
1575 UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_lo);
1576 UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_hi);
1577 UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_lo);
1578 UPDATE_QSTAT_OLD(total_tpa_bytes_hi);
1579 UPDATE_QSTAT_OLD(total_tpa_bytes_lo);
1582 /* save net_device_stats statistics */
1583 bp->net_stats_old.rx_dropped = nstats->rx_dropped;
1585 /* store port firmware statistics */
1586 if (bp->port.pmf && IS_MF(bp)) {
1587 struct bnx2x_eth_stats *estats = &bp->eth_stats;
1588 struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old;
1589 UPDATE_FW_STAT_OLD(mac_filter_discard);
1590 UPDATE_FW_STAT_OLD(mf_tag_discard);
1591 UPDATE_FW_STAT_OLD(brb_truncate_discard);
1592 UPDATE_FW_STAT_OLD(mac_discard);