1 /* cnic.c: Broadcom CNIC core network driver.
3 * Copyright (c) 2006-2013 Broadcom Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
9 * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
10 * Modified and maintained by: Michael Chan <mchan@broadcom.com>
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/module.h>
17 #include <linux/kernel.h>
18 #include <linux/errno.h>
19 #include <linux/list.h>
20 #include <linux/slab.h>
21 #include <linux/pci.h>
22 #include <linux/init.h>
23 #include <linux/netdevice.h>
24 #include <linux/uio_driver.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/delay.h>
28 #include <linux/ethtool.h>
29 #include <linux/if_vlan.h>
30 #include <linux/prefetch.h>
31 #include <linux/random.h>
32 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
37 #include <net/route.h>
39 #include <net/ip6_route.h>
40 #include <net/ip6_checksum.h>
41 #include <scsi/iscsi_if.h>
46 #include "bnx2x/bnx2x.h"
47 #include "bnx2x/bnx2x_reg.h"
48 #include "bnx2x/bnx2x_fw_defs.h"
49 #include "bnx2x/bnx2x_hsi.h"
50 #include "../../../scsi/bnx2i/57xx_iscsi_constants.h"
51 #include "../../../scsi/bnx2i/57xx_iscsi_hsi.h"
52 #include "../../../scsi/bnx2fc/bnx2fc_constants.h"
54 #include "cnic_defs.h"
56 #define CNIC_MODULE_NAME "cnic"
58 static char version[] =
59 "Broadcom NetXtreme II CNIC Driver " CNIC_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
61 MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
62 "Chen (zongxi@broadcom.com");
63 MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
64 MODULE_LICENSE("GPL");
65 MODULE_VERSION(CNIC_MODULE_VERSION);
67 /* cnic_dev_list modifications are protected by both rtnl and cnic_dev_lock */
68 static LIST_HEAD(cnic_dev_list);
69 static LIST_HEAD(cnic_udev_list);
70 static DEFINE_RWLOCK(cnic_dev_lock);
71 static DEFINE_MUTEX(cnic_lock);
73 static struct cnic_ulp_ops __rcu *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
75 /* helper function, assuming cnic_lock is held */
76 static inline struct cnic_ulp_ops *cnic_ulp_tbl_prot(int type)
78 return rcu_dereference_protected(cnic_ulp_tbl[type],
79 lockdep_is_held(&cnic_lock));
82 static int cnic_service_bnx2(void *, void *);
83 static int cnic_service_bnx2x(void *, void *);
84 static int cnic_ctl(void *, struct cnic_ctl_info *);
86 static struct cnic_ops cnic_bnx2_ops = {
87 .cnic_owner = THIS_MODULE,
88 .cnic_handler = cnic_service_bnx2,
92 static struct cnic_ops cnic_bnx2x_ops = {
93 .cnic_owner = THIS_MODULE,
94 .cnic_handler = cnic_service_bnx2x,
98 static struct workqueue_struct *cnic_wq;
100 static void cnic_shutdown_rings(struct cnic_dev *);
101 static void cnic_init_rings(struct cnic_dev *);
102 static int cnic_cm_set_pg(struct cnic_sock *);
104 static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
106 struct cnic_uio_dev *udev = uinfo->priv;
107 struct cnic_dev *dev;
109 if (!capable(CAP_NET_ADMIN))
112 if (udev->uio_dev != -1)
118 if (!dev || !test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
123 udev->uio_dev = iminor(inode);
125 cnic_shutdown_rings(dev);
126 cnic_init_rings(dev);
132 static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
134 struct cnic_uio_dev *udev = uinfo->priv;
140 static inline void cnic_hold(struct cnic_dev *dev)
142 atomic_inc(&dev->ref_count);
145 static inline void cnic_put(struct cnic_dev *dev)
147 atomic_dec(&dev->ref_count);
150 static inline void csk_hold(struct cnic_sock *csk)
152 atomic_inc(&csk->ref_count);
155 static inline void csk_put(struct cnic_sock *csk)
157 atomic_dec(&csk->ref_count);
160 static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
162 struct cnic_dev *cdev;
164 read_lock(&cnic_dev_lock);
165 list_for_each_entry(cdev, &cnic_dev_list, list) {
166 if (netdev == cdev->netdev) {
168 read_unlock(&cnic_dev_lock);
172 read_unlock(&cnic_dev_lock);
176 static inline void ulp_get(struct cnic_ulp_ops *ulp_ops)
178 atomic_inc(&ulp_ops->ref_count);
181 static inline void ulp_put(struct cnic_ulp_ops *ulp_ops)
183 atomic_dec(&ulp_ops->ref_count);
186 static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
188 struct cnic_local *cp = dev->cnic_priv;
189 struct cnic_eth_dev *ethdev = cp->ethdev;
190 struct drv_ctl_info info;
191 struct drv_ctl_io *io = &info.data.io;
193 info.cmd = DRV_CTL_CTX_WR_CMD;
194 io->cid_addr = cid_addr;
197 ethdev->drv_ctl(dev->netdev, &info);
200 static void cnic_ctx_tbl_wr(struct cnic_dev *dev, u32 off, dma_addr_t addr)
202 struct cnic_local *cp = dev->cnic_priv;
203 struct cnic_eth_dev *ethdev = cp->ethdev;
204 struct drv_ctl_info info;
205 struct drv_ctl_io *io = &info.data.io;
207 info.cmd = DRV_CTL_CTXTBL_WR_CMD;
210 ethdev->drv_ctl(dev->netdev, &info);
213 static void cnic_ring_ctl(struct cnic_dev *dev, u32 cid, u32 cl_id, int start)
215 struct cnic_local *cp = dev->cnic_priv;
216 struct cnic_eth_dev *ethdev = cp->ethdev;
217 struct drv_ctl_info info;
218 struct drv_ctl_l2_ring *ring = &info.data.ring;
221 info.cmd = DRV_CTL_START_L2_CMD;
223 info.cmd = DRV_CTL_STOP_L2_CMD;
226 ring->client_id = cl_id;
227 ethdev->drv_ctl(dev->netdev, &info);
230 static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
232 struct cnic_local *cp = dev->cnic_priv;
233 struct cnic_eth_dev *ethdev = cp->ethdev;
234 struct drv_ctl_info info;
235 struct drv_ctl_io *io = &info.data.io;
237 info.cmd = DRV_CTL_IO_WR_CMD;
240 ethdev->drv_ctl(dev->netdev, &info);
243 static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
245 struct cnic_local *cp = dev->cnic_priv;
246 struct cnic_eth_dev *ethdev = cp->ethdev;
247 struct drv_ctl_info info;
248 struct drv_ctl_io *io = &info.data.io;
250 info.cmd = DRV_CTL_IO_RD_CMD;
252 ethdev->drv_ctl(dev->netdev, &info);
256 static void cnic_ulp_ctl(struct cnic_dev *dev, int ulp_type, bool reg)
258 struct cnic_local *cp = dev->cnic_priv;
259 struct cnic_eth_dev *ethdev = cp->ethdev;
260 struct drv_ctl_info info;
261 struct fcoe_capabilities *fcoe_cap =
262 &info.data.register_data.fcoe_features;
265 info.cmd = DRV_CTL_ULP_REGISTER_CMD;
266 if (ulp_type == CNIC_ULP_FCOE && dev->fcoe_cap)
267 memcpy(fcoe_cap, dev->fcoe_cap, sizeof(*fcoe_cap));
269 info.cmd = DRV_CTL_ULP_UNREGISTER_CMD;
272 info.data.ulp_type = ulp_type;
273 ethdev->drv_ctl(dev->netdev, &info);
276 static int cnic_in_use(struct cnic_sock *csk)
278 return test_bit(SK_F_INUSE, &csk->flags);
281 static void cnic_spq_completion(struct cnic_dev *dev, int cmd, u32 count)
283 struct cnic_local *cp = dev->cnic_priv;
284 struct cnic_eth_dev *ethdev = cp->ethdev;
285 struct drv_ctl_info info;
288 info.data.credit.credit_count = count;
289 ethdev->drv_ctl(dev->netdev, &info);
292 static int cnic_get_l5_cid(struct cnic_local *cp, u32 cid, u32 *l5_cid)
299 for (i = 0; i < cp->max_cid_space; i++) {
300 if (cp->ctx_tbl[i].cid == cid) {
308 static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
309 struct cnic_sock *csk)
311 struct iscsi_path path_req;
314 u32 msg_type = ISCSI_KEVENT_IF_DOWN;
315 struct cnic_ulp_ops *ulp_ops;
316 struct cnic_uio_dev *udev = cp->udev;
317 int rc = 0, retry = 0;
319 if (!udev || udev->uio_dev == -1)
323 len = sizeof(path_req);
324 buf = (char *) &path_req;
325 memset(&path_req, 0, len);
327 msg_type = ISCSI_KEVENT_PATH_REQ;
328 path_req.handle = (u64) csk->l5_cid;
329 if (test_bit(SK_F_IPV6, &csk->flags)) {
330 memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
331 sizeof(struct in6_addr));
332 path_req.ip_addr_len = 16;
334 memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
335 sizeof(struct in_addr));
336 path_req.ip_addr_len = 4;
338 path_req.vlan_id = csk->vlan_id;
339 path_req.pmtu = csk->mtu;
345 ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]);
347 rc = ulp_ops->iscsi_nl_send_msg(
348 cp->ulp_handle[CNIC_ULP_ISCSI],
351 if (rc == 0 || msg_type != ISCSI_KEVENT_PATH_REQ)
360 static void cnic_cm_upcall(struct cnic_local *, struct cnic_sock *, u8);
362 static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
368 case ISCSI_UEVENT_PATH_UPDATE: {
369 struct cnic_local *cp;
371 struct cnic_sock *csk;
372 struct iscsi_path *path_resp;
374 if (len < sizeof(*path_resp))
377 path_resp = (struct iscsi_path *) buf;
379 l5_cid = (u32) path_resp->handle;
380 if (l5_cid >= MAX_CM_SK_TBL_SZ)
384 if (!rcu_dereference(cp->ulp_ops[CNIC_ULP_L4])) {
389 csk = &cp->csk_tbl[l5_cid];
391 if (cnic_in_use(csk) &&
392 test_bit(SK_F_CONNECT_START, &csk->flags)) {
394 csk->vlan_id = path_resp->vlan_id;
396 memcpy(csk->ha, path_resp->mac_addr, 6);
397 if (test_bit(SK_F_IPV6, &csk->flags))
398 memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
399 sizeof(struct in6_addr));
401 memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
402 sizeof(struct in_addr));
404 if (is_valid_ether_addr(csk->ha)) {
406 } else if (!test_bit(SK_F_OFFLD_SCHED, &csk->flags) &&
407 !test_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
409 cnic_cm_upcall(cp, csk,
410 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
411 clear_bit(SK_F_CONNECT_START, &csk->flags);
423 static int cnic_offld_prep(struct cnic_sock *csk)
425 if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
428 if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
429 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
436 static int cnic_close_prep(struct cnic_sock *csk)
438 clear_bit(SK_F_CONNECT_START, &csk->flags);
439 smp_mb__after_clear_bit();
441 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
442 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
450 static int cnic_abort_prep(struct cnic_sock *csk)
452 clear_bit(SK_F_CONNECT_START, &csk->flags);
453 smp_mb__after_clear_bit();
455 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
458 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
459 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
466 int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
468 struct cnic_dev *dev;
470 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
471 pr_err("%s: Bad type %d\n", __func__, ulp_type);
474 mutex_lock(&cnic_lock);
475 if (cnic_ulp_tbl_prot(ulp_type)) {
476 pr_err("%s: Type %d has already been registered\n",
478 mutex_unlock(&cnic_lock);
482 read_lock(&cnic_dev_lock);
483 list_for_each_entry(dev, &cnic_dev_list, list) {
484 struct cnic_local *cp = dev->cnic_priv;
486 clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
488 read_unlock(&cnic_dev_lock);
490 atomic_set(&ulp_ops->ref_count, 0);
491 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
492 mutex_unlock(&cnic_lock);
494 /* Prevent race conditions with netdev_event */
496 list_for_each_entry(dev, &cnic_dev_list, list) {
497 struct cnic_local *cp = dev->cnic_priv;
499 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
500 ulp_ops->cnic_init(dev);
507 int cnic_unregister_driver(int ulp_type)
509 struct cnic_dev *dev;
510 struct cnic_ulp_ops *ulp_ops;
513 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
514 pr_err("%s: Bad type %d\n", __func__, ulp_type);
517 mutex_lock(&cnic_lock);
518 ulp_ops = cnic_ulp_tbl_prot(ulp_type);
520 pr_err("%s: Type %d has not been registered\n",
524 read_lock(&cnic_dev_lock);
525 list_for_each_entry(dev, &cnic_dev_list, list) {
526 struct cnic_local *cp = dev->cnic_priv;
528 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
529 pr_err("%s: Type %d still has devices registered\n",
531 read_unlock(&cnic_dev_lock);
535 read_unlock(&cnic_dev_lock);
537 RCU_INIT_POINTER(cnic_ulp_tbl[ulp_type], NULL);
539 mutex_unlock(&cnic_lock);
541 while ((atomic_read(&ulp_ops->ref_count) != 0) && (i < 20)) {
546 if (atomic_read(&ulp_ops->ref_count) != 0)
547 pr_warn("%s: Failed waiting for ref count to go to zero\n",
552 mutex_unlock(&cnic_lock);
556 static int cnic_start_hw(struct cnic_dev *);
557 static void cnic_stop_hw(struct cnic_dev *);
559 static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
562 struct cnic_local *cp = dev->cnic_priv;
563 struct cnic_ulp_ops *ulp_ops;
565 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
566 pr_err("%s: Bad type %d\n", __func__, ulp_type);
569 mutex_lock(&cnic_lock);
570 if (cnic_ulp_tbl_prot(ulp_type) == NULL) {
571 pr_err("%s: Driver with type %d has not been registered\n",
573 mutex_unlock(&cnic_lock);
576 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
577 pr_err("%s: Type %d has already been registered to this device\n",
579 mutex_unlock(&cnic_lock);
583 clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
584 cp->ulp_handle[ulp_type] = ulp_ctx;
585 ulp_ops = cnic_ulp_tbl_prot(ulp_type);
586 rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
589 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
590 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
591 ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
593 mutex_unlock(&cnic_lock);
595 cnic_ulp_ctl(dev, ulp_type, true);
600 EXPORT_SYMBOL(cnic_register_driver);
602 static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
604 struct cnic_local *cp = dev->cnic_priv;
607 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
608 pr_err("%s: Bad type %d\n", __func__, ulp_type);
611 mutex_lock(&cnic_lock);
612 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
613 RCU_INIT_POINTER(cp->ulp_ops[ulp_type], NULL);
616 pr_err("%s: device not registered to this ulp type %d\n",
618 mutex_unlock(&cnic_lock);
621 mutex_unlock(&cnic_lock);
623 if (ulp_type == CNIC_ULP_ISCSI)
624 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
625 else if (ulp_type == CNIC_ULP_FCOE)
626 dev->fcoe_cap = NULL;
630 while (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]) &&
635 if (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]))
636 netdev_warn(dev->netdev, "Failed waiting for ULP up call to complete\n");
638 cnic_ulp_ctl(dev, ulp_type, false);
642 EXPORT_SYMBOL(cnic_unregister_driver);
644 static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id,
647 id_tbl->start = start_id;
650 spin_lock_init(&id_tbl->lock);
651 id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
658 static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
660 kfree(id_tbl->table);
661 id_tbl->table = NULL;
664 static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
669 if (id >= id_tbl->max)
672 spin_lock(&id_tbl->lock);
673 if (!test_bit(id, id_tbl->table)) {
674 set_bit(id, id_tbl->table);
677 spin_unlock(&id_tbl->lock);
681 /* Returns -1 if not successful */
682 static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
686 spin_lock(&id_tbl->lock);
687 id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
688 if (id >= id_tbl->max) {
690 if (id_tbl->next != 0) {
691 id = find_first_zero_bit(id_tbl->table, id_tbl->next);
692 if (id >= id_tbl->next)
697 if (id < id_tbl->max) {
698 set_bit(id, id_tbl->table);
699 id_tbl->next = (id + 1) & (id_tbl->max - 1);
703 spin_unlock(&id_tbl->lock);
708 static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
714 if (id >= id_tbl->max)
717 clear_bit(id, id_tbl->table);
720 static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
727 for (i = 0; i < dma->num_pages; i++) {
728 if (dma->pg_arr[i]) {
729 dma_free_coherent(&dev->pcidev->dev, BNX2_PAGE_SIZE,
730 dma->pg_arr[i], dma->pg_map_arr[i]);
731 dma->pg_arr[i] = NULL;
735 dma_free_coherent(&dev->pcidev->dev, dma->pgtbl_size,
736 dma->pgtbl, dma->pgtbl_map);
744 static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
747 __le32 *page_table = (__le32 *) dma->pgtbl;
749 for (i = 0; i < dma->num_pages; i++) {
750 /* Each entry needs to be in big endian format. */
751 *page_table = cpu_to_le32((u64) dma->pg_map_arr[i] >> 32);
753 *page_table = cpu_to_le32(dma->pg_map_arr[i] & 0xffffffff);
758 static void cnic_setup_page_tbl_le(struct cnic_dev *dev, struct cnic_dma *dma)
761 __le32 *page_table = (__le32 *) dma->pgtbl;
763 for (i = 0; i < dma->num_pages; i++) {
764 /* Each entry needs to be in little endian format. */
765 *page_table = cpu_to_le32(dma->pg_map_arr[i] & 0xffffffff);
767 *page_table = cpu_to_le32((u64) dma->pg_map_arr[i] >> 32);
772 static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
773 int pages, int use_pg_tbl)
776 struct cnic_local *cp = dev->cnic_priv;
778 size = pages * (sizeof(void *) + sizeof(dma_addr_t));
779 dma->pg_arr = kzalloc(size, GFP_ATOMIC);
780 if (dma->pg_arr == NULL)
783 dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
784 dma->num_pages = pages;
786 for (i = 0; i < pages; i++) {
787 dma->pg_arr[i] = dma_alloc_coherent(&dev->pcidev->dev,
791 if (dma->pg_arr[i] == NULL)
797 dma->pgtbl_size = ((pages * 8) + BNX2_PAGE_SIZE - 1) &
798 ~(BNX2_PAGE_SIZE - 1);
799 dma->pgtbl = dma_alloc_coherent(&dev->pcidev->dev, dma->pgtbl_size,
800 &dma->pgtbl_map, GFP_ATOMIC);
801 if (dma->pgtbl == NULL)
804 cp->setup_pgtbl(dev, dma);
809 cnic_free_dma(dev, dma);
813 static void cnic_free_context(struct cnic_dev *dev)
815 struct cnic_local *cp = dev->cnic_priv;
818 for (i = 0; i < cp->ctx_blks; i++) {
819 if (cp->ctx_arr[i].ctx) {
820 dma_free_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
822 cp->ctx_arr[i].mapping);
823 cp->ctx_arr[i].ctx = NULL;
828 static void __cnic_free_uio_rings(struct cnic_uio_dev *udev)
831 dma_free_coherent(&udev->pdev->dev, udev->l2_buf_size,
832 udev->l2_buf, udev->l2_buf_map);
837 dma_free_coherent(&udev->pdev->dev, udev->l2_ring_size,
838 udev->l2_ring, udev->l2_ring_map);
839 udev->l2_ring = NULL;
844 static void __cnic_free_uio(struct cnic_uio_dev *udev)
846 uio_unregister_device(&udev->cnic_uinfo);
848 __cnic_free_uio_rings(udev);
850 pci_dev_put(udev->pdev);
854 static void cnic_free_uio(struct cnic_uio_dev *udev)
859 write_lock(&cnic_dev_lock);
860 list_del_init(&udev->list);
861 write_unlock(&cnic_dev_lock);
862 __cnic_free_uio(udev);
865 static void cnic_free_resc(struct cnic_dev *dev)
867 struct cnic_local *cp = dev->cnic_priv;
868 struct cnic_uio_dev *udev = cp->udev;
873 if (udev->uio_dev == -1)
874 __cnic_free_uio_rings(udev);
877 cnic_free_context(dev);
882 cnic_free_dma(dev, &cp->gbl_buf_info);
883 cnic_free_dma(dev, &cp->kwq_info);
884 cnic_free_dma(dev, &cp->kwq_16_data_info);
885 cnic_free_dma(dev, &cp->kcq2.dma);
886 cnic_free_dma(dev, &cp->kcq1.dma);
887 kfree(cp->iscsi_tbl);
888 cp->iscsi_tbl = NULL;
892 cnic_free_id_tbl(&cp->fcoe_cid_tbl);
893 cnic_free_id_tbl(&cp->cid_tbl);
896 static int cnic_alloc_context(struct cnic_dev *dev)
898 struct cnic_local *cp = dev->cnic_priv;
900 if (BNX2_CHIP(cp) == BNX2_CHIP_5709) {
903 cp->ctx_blk_size = BNX2_PAGE_SIZE;
904 cp->cids_per_blk = BNX2_PAGE_SIZE / 128;
905 arr_size = BNX2_MAX_CID / cp->cids_per_blk *
906 sizeof(struct cnic_ctx);
907 cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
908 if (cp->ctx_arr == NULL)
912 for (i = 0; i < 2; i++) {
913 u32 j, reg, off, lo, hi;
916 off = BNX2_PG_CTX_MAP;
918 off = BNX2_ISCSI_CTX_MAP;
920 reg = cnic_reg_rd_ind(dev, off);
923 for (j = lo; j < hi; j += cp->cids_per_blk, k++)
924 cp->ctx_arr[k].cid = j;
928 if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
933 for (i = 0; i < cp->ctx_blks; i++) {
935 dma_alloc_coherent(&dev->pcidev->dev,
937 &cp->ctx_arr[i].mapping,
939 if (cp->ctx_arr[i].ctx == NULL)
946 static u16 cnic_bnx2_next_idx(u16 idx)
951 static u16 cnic_bnx2_hw_idx(u16 idx)
956 static u16 cnic_bnx2x_next_idx(u16 idx)
959 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
965 static u16 cnic_bnx2x_hw_idx(u16 idx)
967 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
972 static int cnic_alloc_kcq(struct cnic_dev *dev, struct kcq_info *info,
975 int err, i, use_page_tbl = 0;
981 err = cnic_alloc_dma(dev, &info->dma, KCQ_PAGE_CNT, use_page_tbl);
985 kcq = (struct kcqe **) info->dma.pg_arr;
988 info->next_idx = cnic_bnx2_next_idx;
989 info->hw_idx = cnic_bnx2_hw_idx;
993 info->next_idx = cnic_bnx2x_next_idx;
994 info->hw_idx = cnic_bnx2x_hw_idx;
996 for (i = 0; i < KCQ_PAGE_CNT; i++) {
997 struct bnx2x_bd_chain_next *next =
998 (struct bnx2x_bd_chain_next *) &kcq[i][MAX_KCQE_CNT];
1001 if (j >= KCQ_PAGE_CNT)
1003 next->addr_hi = (u64) info->dma.pg_map_arr[j] >> 32;
1004 next->addr_lo = info->dma.pg_map_arr[j] & 0xffffffff;
1009 static int __cnic_alloc_uio_rings(struct cnic_uio_dev *udev, int pages)
1011 struct cnic_local *cp = udev->dev->cnic_priv;
1016 udev->l2_ring_size = pages * BNX2_PAGE_SIZE;
1017 udev->l2_ring = dma_alloc_coherent(&udev->pdev->dev, udev->l2_ring_size,
1019 GFP_KERNEL | __GFP_COMP);
1023 udev->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
1024 udev->l2_buf_size = PAGE_ALIGN(udev->l2_buf_size);
1025 udev->l2_buf = dma_alloc_coherent(&udev->pdev->dev, udev->l2_buf_size,
1027 GFP_KERNEL | __GFP_COMP);
1028 if (!udev->l2_buf) {
1029 __cnic_free_uio_rings(udev);
1037 static int cnic_alloc_uio_rings(struct cnic_dev *dev, int pages)
1039 struct cnic_local *cp = dev->cnic_priv;
1040 struct cnic_uio_dev *udev;
1042 read_lock(&cnic_dev_lock);
1043 list_for_each_entry(udev, &cnic_udev_list, list) {
1044 if (udev->pdev == dev->pcidev) {
1046 if (__cnic_alloc_uio_rings(udev, pages)) {
1048 read_unlock(&cnic_dev_lock);
1052 read_unlock(&cnic_dev_lock);
1056 read_unlock(&cnic_dev_lock);
1058 udev = kzalloc(sizeof(struct cnic_uio_dev), GFP_ATOMIC);
1065 udev->pdev = dev->pcidev;
1067 if (__cnic_alloc_uio_rings(udev, pages))
1070 write_lock(&cnic_dev_lock);
1071 list_add(&udev->list, &cnic_udev_list);
1072 write_unlock(&cnic_dev_lock);
1074 pci_dev_get(udev->pdev);
1085 static int cnic_init_uio(struct cnic_dev *dev)
1087 struct cnic_local *cp = dev->cnic_priv;
1088 struct cnic_uio_dev *udev = cp->udev;
1089 struct uio_info *uinfo;
1095 uinfo = &udev->cnic_uinfo;
1097 uinfo->mem[0].addr = pci_resource_start(dev->pcidev, 0);
1098 uinfo->mem[0].internal_addr = dev->regview;
1099 uinfo->mem[0].memtype = UIO_MEM_PHYS;
1101 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
1102 uinfo->mem[0].size = MB_GET_CID_ADDR(TX_TSS_CID +
1103 TX_MAX_TSS_RINGS + 1);
1104 uinfo->mem[1].addr = (unsigned long) cp->status_blk.gen &
1106 if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
1107 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
1109 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
1111 uinfo->name = "bnx2_cnic";
1112 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
1113 uinfo->mem[0].size = pci_resource_len(dev->pcidev, 0);
1115 uinfo->mem[1].addr = (unsigned long) cp->bnx2x_def_status_blk &
1117 uinfo->mem[1].size = sizeof(*cp->bnx2x_def_status_blk);
1119 uinfo->name = "bnx2x_cnic";
1122 uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
1124 uinfo->mem[2].addr = (unsigned long) udev->l2_ring;
1125 uinfo->mem[2].size = udev->l2_ring_size;
1126 uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
1128 uinfo->mem[3].addr = (unsigned long) udev->l2_buf;
1129 uinfo->mem[3].size = udev->l2_buf_size;
1130 uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
1132 uinfo->version = CNIC_MODULE_VERSION;
1133 uinfo->irq = UIO_IRQ_CUSTOM;
1135 uinfo->open = cnic_uio_open;
1136 uinfo->release = cnic_uio_close;
1138 if (udev->uio_dev == -1) {
1142 ret = uio_register_device(&udev->pdev->dev, uinfo);
1145 cnic_init_rings(dev);
1151 static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
1153 struct cnic_local *cp = dev->cnic_priv;
1156 ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
1159 cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
1161 ret = cnic_alloc_kcq(dev, &cp->kcq1, true);
1165 ret = cnic_alloc_context(dev);
1169 ret = cnic_alloc_uio_rings(dev, 2);
1173 ret = cnic_init_uio(dev);
1180 cnic_free_resc(dev);
1184 static int cnic_alloc_bnx2x_context(struct cnic_dev *dev)
1186 struct cnic_local *cp = dev->cnic_priv;
1187 int ctx_blk_size = cp->ethdev->ctx_blk_size;
1188 int total_mem, blks, i;
1190 total_mem = BNX2X_CONTEXT_MEM_SIZE * cp->max_cid_space;
1191 blks = total_mem / ctx_blk_size;
1192 if (total_mem % ctx_blk_size)
1195 if (blks > cp->ethdev->ctx_tbl_len)
1198 cp->ctx_arr = kcalloc(blks, sizeof(struct cnic_ctx), GFP_KERNEL);
1199 if (cp->ctx_arr == NULL)
1202 cp->ctx_blks = blks;
1203 cp->ctx_blk_size = ctx_blk_size;
1204 if (!BNX2X_CHIP_IS_57710(cp->chip_id))
1207 cp->ctx_align = ctx_blk_size;
1209 cp->cids_per_blk = ctx_blk_size / BNX2X_CONTEXT_MEM_SIZE;
1211 for (i = 0; i < blks; i++) {
1212 cp->ctx_arr[i].ctx =
1213 dma_alloc_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
1214 &cp->ctx_arr[i].mapping,
1216 if (cp->ctx_arr[i].ctx == NULL)
1219 if (cp->ctx_align && cp->ctx_blk_size == ctx_blk_size) {
1220 if (cp->ctx_arr[i].mapping & (cp->ctx_align - 1)) {
1221 cnic_free_context(dev);
1222 cp->ctx_blk_size += cp->ctx_align;
1231 static int cnic_alloc_bnx2x_resc(struct cnic_dev *dev)
1233 struct cnic_local *cp = dev->cnic_priv;
1234 struct cnic_eth_dev *ethdev = cp->ethdev;
1235 u32 start_cid = ethdev->starting_cid;
1236 int i, j, n, ret, pages;
1237 struct cnic_dma *kwq_16_dma = &cp->kwq_16_data_info;
1239 cp->max_cid_space = MAX_ISCSI_TBL_SZ;
1240 cp->iscsi_start_cid = start_cid;
1241 cp->fcoe_start_cid = start_cid + MAX_ISCSI_TBL_SZ;
1243 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
1244 cp->max_cid_space += dev->max_fcoe_conn;
1245 cp->fcoe_init_cid = ethdev->fcoe_init_cid;
1246 if (!cp->fcoe_init_cid)
1247 cp->fcoe_init_cid = 0x10;
1250 cp->iscsi_tbl = kzalloc(sizeof(struct cnic_iscsi) * MAX_ISCSI_TBL_SZ,
1255 cp->ctx_tbl = kzalloc(sizeof(struct cnic_context) *
1256 cp->max_cid_space, GFP_KERNEL);
1260 for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) {
1261 cp->ctx_tbl[i].proto.iscsi = &cp->iscsi_tbl[i];
1262 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_ISCSI;
1265 for (i = MAX_ISCSI_TBL_SZ; i < cp->max_cid_space; i++)
1266 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_FCOE;
1268 pages = PAGE_ALIGN(cp->max_cid_space * CNIC_KWQ16_DATA_SIZE) /
1271 ret = cnic_alloc_dma(dev, kwq_16_dma, pages, 0);
1275 n = PAGE_SIZE / CNIC_KWQ16_DATA_SIZE;
1276 for (i = 0, j = 0; i < cp->max_cid_space; i++) {
1277 long off = CNIC_KWQ16_DATA_SIZE * (i % n);
1279 cp->ctx_tbl[i].kwqe_data = kwq_16_dma->pg_arr[j] + off;
1280 cp->ctx_tbl[i].kwqe_data_mapping = kwq_16_dma->pg_map_arr[j] +
1283 if ((i % n) == (n - 1))
1287 ret = cnic_alloc_kcq(dev, &cp->kcq1, false);
1291 if (CNIC_SUPPORTS_FCOE(cp)) {
1292 ret = cnic_alloc_kcq(dev, &cp->kcq2, true);
1297 pages = PAGE_ALIGN(BNX2X_ISCSI_GLB_BUF_SIZE) / PAGE_SIZE;
1298 ret = cnic_alloc_dma(dev, &cp->gbl_buf_info, pages, 0);
1302 ret = cnic_alloc_bnx2x_context(dev);
1306 if (cp->ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI)
1309 cp->bnx2x_def_status_blk = cp->ethdev->irq_arr[1].status_blk;
1311 cp->l2_rx_ring_size = 15;
1313 ret = cnic_alloc_uio_rings(dev, 4);
1317 ret = cnic_init_uio(dev);
1324 cnic_free_resc(dev);
1328 static inline u32 cnic_kwq_avail(struct cnic_local *cp)
1330 return cp->max_kwq_idx -
1331 ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
1334 static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1337 struct cnic_local *cp = dev->cnic_priv;
1338 struct kwqe *prod_qe;
1339 u16 prod, sw_prod, i;
1341 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
1342 return -EAGAIN; /* bnx2 is down */
1344 spin_lock_bh(&cp->cnic_ulp_lock);
1345 if (num_wqes > cnic_kwq_avail(cp) &&
1346 !test_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags)) {
1347 spin_unlock_bh(&cp->cnic_ulp_lock);
1351 clear_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
1353 prod = cp->kwq_prod_idx;
1354 sw_prod = prod & MAX_KWQ_IDX;
1355 for (i = 0; i < num_wqes; i++) {
1356 prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
1357 memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
1359 sw_prod = prod & MAX_KWQ_IDX;
1361 cp->kwq_prod_idx = prod;
1363 CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
1365 spin_unlock_bh(&cp->cnic_ulp_lock);
1369 static void *cnic_get_kwqe_16_data(struct cnic_local *cp, u32 l5_cid,
1370 union l5cm_specific_data *l5_data)
1372 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1375 map = ctx->kwqe_data_mapping;
1376 l5_data->phy_address.lo = (u64) map & 0xffffffff;
1377 l5_data->phy_address.hi = (u64) map >> 32;
1378 return ctx->kwqe_data;
1381 static int cnic_submit_kwqe_16(struct cnic_dev *dev, u32 cmd, u32 cid,
1382 u32 type, union l5cm_specific_data *l5_data)
1384 struct cnic_local *cp = dev->cnic_priv;
1385 struct l5cm_spe kwqe;
1386 struct kwqe_16 *kwq[1];
1390 kwqe.hdr.conn_and_cmd_data =
1391 cpu_to_le32(((cmd << SPE_HDR_CMD_ID_SHIFT) |
1392 BNX2X_HW_CID(cp, cid)));
1394 type_16 = (type << SPE_HDR_CONN_TYPE_SHIFT) & SPE_HDR_CONN_TYPE;
1395 type_16 |= (cp->pfid << SPE_HDR_FUNCTION_ID_SHIFT) &
1396 SPE_HDR_FUNCTION_ID;
1398 kwqe.hdr.type = cpu_to_le16(type_16);
1399 kwqe.hdr.reserved1 = 0;
1400 kwqe.data.phy_address.lo = cpu_to_le32(l5_data->phy_address.lo);
1401 kwqe.data.phy_address.hi = cpu_to_le32(l5_data->phy_address.hi);
1403 kwq[0] = (struct kwqe_16 *) &kwqe;
1405 spin_lock_bh(&cp->cnic_ulp_lock);
1406 ret = cp->ethdev->drv_submit_kwqes_16(dev->netdev, kwq, 1);
1407 spin_unlock_bh(&cp->cnic_ulp_lock);
1415 static void cnic_reply_bnx2x_kcqes(struct cnic_dev *dev, int ulp_type,
1416 struct kcqe *cqes[], u32 num_cqes)
1418 struct cnic_local *cp = dev->cnic_priv;
1419 struct cnic_ulp_ops *ulp_ops;
1422 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
1423 if (likely(ulp_ops)) {
1424 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
1430 static void cnic_bnx2x_set_tcp_options(struct cnic_dev *dev, int time_stamps,
1433 struct cnic_local *cp = dev->cnic_priv;
1434 struct bnx2x *bp = netdev_priv(dev->netdev);
1435 u8 xstorm_flags = XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN;
1436 u16 tstorm_flags = 0;
1439 xstorm_flags |= XSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1440 tstorm_flags |= TSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1443 tstorm_flags |= TSTORM_L5CM_TCP_FLAGS_DELAYED_ACK_EN;
1445 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1446 XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->pfid), xstorm_flags);
1448 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1449 TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->pfid), tstorm_flags);
1452 static int cnic_bnx2x_iscsi_init1(struct cnic_dev *dev, struct kwqe *kwqe)
1454 struct cnic_local *cp = dev->cnic_priv;
1455 struct bnx2x *bp = netdev_priv(dev->netdev);
1456 struct iscsi_kwqe_init1 *req1 = (struct iscsi_kwqe_init1 *) kwqe;
1458 u32 pfid = cp->pfid;
1460 cp->num_iscsi_tasks = req1->num_tasks_per_conn;
1461 cp->num_ccells = req1->num_ccells_per_conn;
1462 cp->task_array_size = BNX2X_ISCSI_TASK_CONTEXT_SIZE *
1463 cp->num_iscsi_tasks;
1464 cp->r2tq_size = cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS *
1465 BNX2X_ISCSI_R2TQE_SIZE;
1466 cp->hq_size = cp->num_ccells * BNX2X_ISCSI_HQ_BD_SIZE;
1467 pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1468 hq_bds = pages * (PAGE_SIZE / BNX2X_ISCSI_HQ_BD_SIZE);
1469 cp->num_cqs = req1->num_cqs;
1471 if (!dev->max_iscsi_conn)
1474 /* init Tstorm RAM */
1475 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_RQ_SIZE_OFFSET(pfid),
1477 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1479 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1480 TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1481 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1482 TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1483 req1->num_tasks_per_conn);
1485 /* init Ustorm RAM */
1486 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1487 USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfid),
1488 req1->rq_buffer_size);
1489 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1491 CNIC_WR8(dev, BAR_USTRORM_INTMEM +
1492 USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1493 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1494 USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1495 req1->num_tasks_per_conn);
1496 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_RQ_SIZE_OFFSET(pfid),
1498 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_CQ_SIZE_OFFSET(pfid),
1500 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid),
1501 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1503 /* init Xstorm RAM */
1504 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1506 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1507 XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1508 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1509 XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1510 req1->num_tasks_per_conn);
1511 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_HQ_SIZE_OFFSET(pfid),
1513 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_SQ_SIZE_OFFSET(pfid),
1514 req1->num_tasks_per_conn);
1515 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid),
1516 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1518 /* init Cstorm RAM */
1519 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1521 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
1522 CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1523 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1524 CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1525 req1->num_tasks_per_conn);
1526 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_CQ_SIZE_OFFSET(pfid),
1528 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_HQ_SIZE_OFFSET(pfid),
1531 cnic_bnx2x_set_tcp_options(dev,
1532 req1->flags & ISCSI_KWQE_INIT1_TIME_STAMPS_ENABLE,
1533 req1->flags & ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE);
1538 static int cnic_bnx2x_iscsi_init2(struct cnic_dev *dev, struct kwqe *kwqe)
1540 struct iscsi_kwqe_init2 *req2 = (struct iscsi_kwqe_init2 *) kwqe;
1541 struct cnic_local *cp = dev->cnic_priv;
1542 struct bnx2x *bp = netdev_priv(dev->netdev);
1543 u32 pfid = cp->pfid;
1544 struct iscsi_kcqe kcqe;
1545 struct kcqe *cqes[1];
1547 memset(&kcqe, 0, sizeof(kcqe));
1548 if (!dev->max_iscsi_conn) {
1549 kcqe.completion_status =
1550 ISCSI_KCQE_COMPLETION_STATUS_ISCSI_NOT_SUPPORTED;
1554 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1555 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid), req2->error_bit_map[0]);
1556 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1557 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid) + 4,
1558 req2->error_bit_map[1]);
1560 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1561 USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid), req2->max_cq_sqn);
1562 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1563 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid), req2->error_bit_map[0]);
1564 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1565 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid) + 4,
1566 req2->error_bit_map[1]);
1568 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1569 CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid), req2->max_cq_sqn);
1571 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1574 kcqe.op_code = ISCSI_KCQE_OPCODE_INIT;
1575 cqes[0] = (struct kcqe *) &kcqe;
1576 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1581 static void cnic_free_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1583 struct cnic_local *cp = dev->cnic_priv;
1584 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1586 if (ctx->ulp_proto_id == CNIC_ULP_ISCSI) {
1587 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1589 cnic_free_dma(dev, &iscsi->hq_info);
1590 cnic_free_dma(dev, &iscsi->r2tq_info);
1591 cnic_free_dma(dev, &iscsi->task_array_info);
1592 cnic_free_id(&cp->cid_tbl, ctx->cid);
1594 cnic_free_id(&cp->fcoe_cid_tbl, ctx->cid);
1600 static int cnic_alloc_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1604 struct cnic_local *cp = dev->cnic_priv;
1605 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1606 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1608 if (ctx->ulp_proto_id == CNIC_ULP_FCOE) {
1609 cid = cnic_alloc_new_id(&cp->fcoe_cid_tbl);
1618 cid = cnic_alloc_new_id(&cp->cid_tbl);
1625 pages = PAGE_ALIGN(cp->task_array_size) / PAGE_SIZE;
1627 ret = cnic_alloc_dma(dev, &iscsi->task_array_info, pages, 1);
1631 pages = PAGE_ALIGN(cp->r2tq_size) / PAGE_SIZE;
1632 ret = cnic_alloc_dma(dev, &iscsi->r2tq_info, pages, 1);
1636 pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1637 ret = cnic_alloc_dma(dev, &iscsi->hq_info, pages, 1);
1644 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1648 static void *cnic_get_bnx2x_ctx(struct cnic_dev *dev, u32 cid, int init,
1649 struct regpair *ctx_addr)
1651 struct cnic_local *cp = dev->cnic_priv;
1652 struct cnic_eth_dev *ethdev = cp->ethdev;
1653 int blk = (cid - ethdev->starting_cid) / cp->cids_per_blk;
1654 int off = (cid - ethdev->starting_cid) % cp->cids_per_blk;
1655 unsigned long align_off = 0;
1659 if (cp->ctx_align) {
1660 unsigned long mask = cp->ctx_align - 1;
1662 if (cp->ctx_arr[blk].mapping & mask)
1663 align_off = cp->ctx_align -
1664 (cp->ctx_arr[blk].mapping & mask);
1666 ctx_map = cp->ctx_arr[blk].mapping + align_off +
1667 (off * BNX2X_CONTEXT_MEM_SIZE);
1668 ctx = cp->ctx_arr[blk].ctx + align_off +
1669 (off * BNX2X_CONTEXT_MEM_SIZE);
1671 memset(ctx, 0, BNX2X_CONTEXT_MEM_SIZE);
1673 ctx_addr->lo = ctx_map & 0xffffffff;
1674 ctx_addr->hi = (u64) ctx_map >> 32;
1678 static int cnic_setup_bnx2x_ctx(struct cnic_dev *dev, struct kwqe *wqes[],
1681 struct cnic_local *cp = dev->cnic_priv;
1682 struct iscsi_kwqe_conn_offload1 *req1 =
1683 (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1684 struct iscsi_kwqe_conn_offload2 *req2 =
1685 (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1686 struct iscsi_kwqe_conn_offload3 *req3;
1687 struct cnic_context *ctx = &cp->ctx_tbl[req1->iscsi_conn_id];
1688 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1690 u32 hw_cid = BNX2X_HW_CID(cp, cid);
1691 struct iscsi_context *ictx;
1692 struct regpair context_addr;
1693 int i, j, n = 2, n_max;
1694 u8 port = CNIC_PORT(cp);
1697 if (!req2->num_additional_wqes)
1700 n_max = req2->num_additional_wqes + 2;
1702 ictx = cnic_get_bnx2x_ctx(dev, cid, 1, &context_addr);
1706 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1708 ictx->xstorm_ag_context.hq_prod = 1;
1710 ictx->xstorm_st_context.iscsi.first_burst_length =
1711 ISCSI_DEF_FIRST_BURST_LEN;
1712 ictx->xstorm_st_context.iscsi.max_send_pdu_length =
1713 ISCSI_DEF_MAX_RECV_SEG_LEN;
1714 ictx->xstorm_st_context.iscsi.sq_pbl_base.lo =
1715 req1->sq_page_table_addr_lo;
1716 ictx->xstorm_st_context.iscsi.sq_pbl_base.hi =
1717 req1->sq_page_table_addr_hi;
1718 ictx->xstorm_st_context.iscsi.sq_curr_pbe.lo = req2->sq_first_pte.hi;
1719 ictx->xstorm_st_context.iscsi.sq_curr_pbe.hi = req2->sq_first_pte.lo;
1720 ictx->xstorm_st_context.iscsi.hq_pbl_base.lo =
1721 iscsi->hq_info.pgtbl_map & 0xffffffff;
1722 ictx->xstorm_st_context.iscsi.hq_pbl_base.hi =
1723 (u64) iscsi->hq_info.pgtbl_map >> 32;
1724 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.lo =
1725 iscsi->hq_info.pgtbl[0];
1726 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.hi =
1727 iscsi->hq_info.pgtbl[1];
1728 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.lo =
1729 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1730 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.hi =
1731 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1732 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.lo =
1733 iscsi->r2tq_info.pgtbl[0];
1734 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.hi =
1735 iscsi->r2tq_info.pgtbl[1];
1736 ictx->xstorm_st_context.iscsi.task_pbl_base.lo =
1737 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1738 ictx->xstorm_st_context.iscsi.task_pbl_base.hi =
1739 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1740 ictx->xstorm_st_context.iscsi.task_pbl_cache_idx =
1741 BNX2X_ISCSI_PBL_NOT_CACHED;
1742 ictx->xstorm_st_context.iscsi.flags.flags |=
1743 XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA;
1744 ictx->xstorm_st_context.iscsi.flags.flags |=
1745 XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T;
1746 ictx->xstorm_st_context.common.ethernet.reserved_vlan_type =
1748 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id) &&
1749 cp->port_mode == CHIP_2_PORT_MODE) {
1753 ictx->xstorm_st_context.common.flags =
1754 1 << XSTORM_COMMON_CONTEXT_SECTION_PHYSQ_INITIALIZED_SHIFT;
1755 ictx->xstorm_st_context.common.flags =
1756 port << XSTORM_COMMON_CONTEXT_SECTION_PBF_PORT_SHIFT;
1758 ictx->tstorm_st_context.iscsi.hdr_bytes_2_fetch = ISCSI_HEADER_SIZE;
1759 /* TSTORM requires the base address of RQ DB & not PTE */
1760 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.lo =
1761 req2->rq_page_table_addr_lo & PAGE_MASK;
1762 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.hi =
1763 req2->rq_page_table_addr_hi;
1764 ictx->tstorm_st_context.iscsi.iscsi_conn_id = req1->iscsi_conn_id;
1765 ictx->tstorm_st_context.tcp.cwnd = 0x5A8;
1766 ictx->tstorm_st_context.tcp.flags2 |=
1767 TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN;
1768 ictx->tstorm_st_context.tcp.ooo_support_mode =
1769 TCP_TSTORM_OOO_DROP_AND_PROC_ACK;
1771 ictx->timers_context.flags |= TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG;
1773 ictx->ustorm_st_context.ring.rq.pbl_base.lo =
1774 req2->rq_page_table_addr_lo;
1775 ictx->ustorm_st_context.ring.rq.pbl_base.hi =
1776 req2->rq_page_table_addr_hi;
1777 ictx->ustorm_st_context.ring.rq.curr_pbe.lo = req3->qp_first_pte[0].hi;
1778 ictx->ustorm_st_context.ring.rq.curr_pbe.hi = req3->qp_first_pte[0].lo;
1779 ictx->ustorm_st_context.ring.r2tq.pbl_base.lo =
1780 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1781 ictx->ustorm_st_context.ring.r2tq.pbl_base.hi =
1782 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1783 ictx->ustorm_st_context.ring.r2tq.curr_pbe.lo =
1784 iscsi->r2tq_info.pgtbl[0];
1785 ictx->ustorm_st_context.ring.r2tq.curr_pbe.hi =
1786 iscsi->r2tq_info.pgtbl[1];
1787 ictx->ustorm_st_context.ring.cq_pbl_base.lo =
1788 req1->cq_page_table_addr_lo;
1789 ictx->ustorm_st_context.ring.cq_pbl_base.hi =
1790 req1->cq_page_table_addr_hi;
1791 ictx->ustorm_st_context.ring.cq[0].cq_sn = ISCSI_INITIAL_SN;
1792 ictx->ustorm_st_context.ring.cq[0].curr_pbe.lo = req2->cq_first_pte.hi;
1793 ictx->ustorm_st_context.ring.cq[0].curr_pbe.hi = req2->cq_first_pte.lo;
1794 ictx->ustorm_st_context.task_pbe_cache_index =
1795 BNX2X_ISCSI_PBL_NOT_CACHED;
1796 ictx->ustorm_st_context.task_pdu_cache_index =
1797 BNX2X_ISCSI_PDU_HEADER_NOT_CACHED;
1799 for (i = 1, j = 1; i < cp->num_cqs; i++, j++) {
1803 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1806 ictx->ustorm_st_context.ring.cq[i].cq_sn = ISCSI_INITIAL_SN;
1807 ictx->ustorm_st_context.ring.cq[i].curr_pbe.lo =
1808 req3->qp_first_pte[j].hi;
1809 ictx->ustorm_st_context.ring.cq[i].curr_pbe.hi =
1810 req3->qp_first_pte[j].lo;
1813 ictx->ustorm_st_context.task_pbl_base.lo =
1814 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1815 ictx->ustorm_st_context.task_pbl_base.hi =
1816 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1817 ictx->ustorm_st_context.tce_phy_addr.lo =
1818 iscsi->task_array_info.pgtbl[0];
1819 ictx->ustorm_st_context.tce_phy_addr.hi =
1820 iscsi->task_array_info.pgtbl[1];
1821 ictx->ustorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1822 ictx->ustorm_st_context.num_cqs = cp->num_cqs;
1823 ictx->ustorm_st_context.negotiated_rx |= ISCSI_DEF_MAX_RECV_SEG_LEN;
1824 ictx->ustorm_st_context.negotiated_rx_and_flags |=
1825 ISCSI_DEF_MAX_BURST_LEN;
1826 ictx->ustorm_st_context.negotiated_rx |=
1827 ISCSI_DEFAULT_MAX_OUTSTANDING_R2T <<
1828 USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT;
1830 ictx->cstorm_st_context.hq_pbl_base.lo =
1831 iscsi->hq_info.pgtbl_map & 0xffffffff;
1832 ictx->cstorm_st_context.hq_pbl_base.hi =
1833 (u64) iscsi->hq_info.pgtbl_map >> 32;
1834 ictx->cstorm_st_context.hq_curr_pbe.lo = iscsi->hq_info.pgtbl[0];
1835 ictx->cstorm_st_context.hq_curr_pbe.hi = iscsi->hq_info.pgtbl[1];
1836 ictx->cstorm_st_context.task_pbl_base.lo =
1837 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1838 ictx->cstorm_st_context.task_pbl_base.hi =
1839 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1840 /* CSTORM and USTORM initialization is different, CSTORM requires
1841 * CQ DB base & not PTE addr */
1842 ictx->cstorm_st_context.cq_db_base.lo =
1843 req1->cq_page_table_addr_lo & PAGE_MASK;
1844 ictx->cstorm_st_context.cq_db_base.hi = req1->cq_page_table_addr_hi;
1845 ictx->cstorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1846 ictx->cstorm_st_context.cq_proc_en_bit_map = (1 << cp->num_cqs) - 1;
1847 for (i = 0; i < cp->num_cqs; i++) {
1848 ictx->cstorm_st_context.cq_c_prod_sqn_arr.sqn[i] =
1850 ictx->cstorm_st_context.cq_c_sqn_2_notify_arr.sqn[i] =
1854 ictx->xstorm_ag_context.cdu_reserved =
1855 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
1856 ISCSI_CONNECTION_TYPE);
1857 ictx->ustorm_ag_context.cdu_usage =
1858 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
1859 ISCSI_CONNECTION_TYPE);
1864 static int cnic_bnx2x_iscsi_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
1867 struct iscsi_kwqe_conn_offload1 *req1;
1868 struct iscsi_kwqe_conn_offload2 *req2;
1869 struct cnic_local *cp = dev->cnic_priv;
1870 struct cnic_context *ctx;
1871 struct iscsi_kcqe kcqe;
1872 struct kcqe *cqes[1];
1881 req1 = (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1882 req2 = (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1883 if ((num - 2) < req2->num_additional_wqes) {
1887 *work = 2 + req2->num_additional_wqes;
1889 l5_cid = req1->iscsi_conn_id;
1890 if (l5_cid >= MAX_ISCSI_TBL_SZ)
1893 memset(&kcqe, 0, sizeof(kcqe));
1894 kcqe.op_code = ISCSI_KCQE_OPCODE_OFFLOAD_CONN;
1895 kcqe.iscsi_conn_id = l5_cid;
1896 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
1898 ctx = &cp->ctx_tbl[l5_cid];
1899 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags)) {
1900 kcqe.completion_status =
1901 ISCSI_KCQE_COMPLETION_STATUS_CID_BUSY;
1905 if (atomic_inc_return(&cp->iscsi_conn) > dev->max_iscsi_conn) {
1906 atomic_dec(&cp->iscsi_conn);
1909 ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
1911 atomic_dec(&cp->iscsi_conn);
1915 ret = cnic_setup_bnx2x_ctx(dev, wqes, num);
1917 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1918 atomic_dec(&cp->iscsi_conn);
1922 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1923 kcqe.iscsi_conn_context_id = BNX2X_HW_CID(cp, cp->ctx_tbl[l5_cid].cid);
1926 cqes[0] = (struct kcqe *) &kcqe;
1927 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1932 static int cnic_bnx2x_iscsi_update(struct cnic_dev *dev, struct kwqe *kwqe)
1934 struct cnic_local *cp = dev->cnic_priv;
1935 struct iscsi_kwqe_conn_update *req =
1936 (struct iscsi_kwqe_conn_update *) kwqe;
1938 union l5cm_specific_data l5_data;
1939 u32 l5_cid, cid = BNX2X_SW_CID(req->context_id);
1942 if (cnic_get_l5_cid(cp, cid, &l5_cid) != 0)
1945 data = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1949 memcpy(data, kwqe, sizeof(struct kwqe));
1951 ret = cnic_submit_kwqe_16(dev, ISCSI_RAMROD_CMD_ID_UPDATE_CONN,
1952 req->context_id, ISCSI_CONNECTION_TYPE, &l5_data);
1956 static int cnic_bnx2x_destroy_ramrod(struct cnic_dev *dev, u32 l5_cid)
1958 struct cnic_local *cp = dev->cnic_priv;
1959 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1960 union l5cm_specific_data l5_data;
1964 init_waitqueue_head(&ctx->waitq);
1966 memset(&l5_data, 0, sizeof(l5_data));
1967 hw_cid = BNX2X_HW_CID(cp, ctx->cid);
1969 ret = cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL,
1970 hw_cid, NONE_CONNECTION_TYPE, &l5_data);
1973 wait_event_timeout(ctx->waitq, ctx->wait_cond, CNIC_RAMROD_TMO);
1974 if (unlikely(test_bit(CTX_FL_CID_ERROR, &ctx->ctx_flags)))
1981 static int cnic_bnx2x_iscsi_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
1983 struct cnic_local *cp = dev->cnic_priv;
1984 struct iscsi_kwqe_conn_destroy *req =
1985 (struct iscsi_kwqe_conn_destroy *) kwqe;
1986 u32 l5_cid = req->reserved0;
1987 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1989 struct iscsi_kcqe kcqe;
1990 struct kcqe *cqes[1];
1992 if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
1993 goto skip_cfc_delete;
1995 if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) {
1996 unsigned long delta = ctx->timestamp + (2 * HZ) - jiffies;
1998 if (delta > (2 * HZ))
2001 set_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags);
2002 queue_delayed_work(cnic_wq, &cp->delete_task, delta);
2006 ret = cnic_bnx2x_destroy_ramrod(dev, l5_cid);
2009 cnic_free_bnx2x_conn_resc(dev, l5_cid);
2012 atomic_dec(&cp->iscsi_conn);
2013 clear_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2017 memset(&kcqe, 0, sizeof(kcqe));
2018 kcqe.op_code = ISCSI_KCQE_OPCODE_DESTROY_CONN;
2019 kcqe.iscsi_conn_id = l5_cid;
2020 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
2021 kcqe.iscsi_conn_context_id = req->context_id;
2023 cqes[0] = (struct kcqe *) &kcqe;
2024 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
2029 static void cnic_init_storm_conn_bufs(struct cnic_dev *dev,
2030 struct l4_kwq_connect_req1 *kwqe1,
2031 struct l4_kwq_connect_req3 *kwqe3,
2032 struct l5cm_active_conn_buffer *conn_buf)
2034 struct l5cm_conn_addr_params *conn_addr = &conn_buf->conn_addr_buf;
2035 struct l5cm_xstorm_conn_buffer *xstorm_buf =
2036 &conn_buf->xstorm_conn_buffer;
2037 struct l5cm_tstorm_conn_buffer *tstorm_buf =
2038 &conn_buf->tstorm_conn_buffer;
2039 struct regpair context_addr;
2040 u32 cid = BNX2X_SW_CID(kwqe1->cid);
2041 struct in6_addr src_ip, dst_ip;
2045 addrp = (u32 *) &conn_addr->local_ip_addr;
2046 for (i = 0; i < 4; i++, addrp++)
2047 src_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
2049 addrp = (u32 *) &conn_addr->remote_ip_addr;
2050 for (i = 0; i < 4; i++, addrp++)
2051 dst_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
2053 cnic_get_bnx2x_ctx(dev, cid, 0, &context_addr);
2055 xstorm_buf->context_addr.hi = context_addr.hi;
2056 xstorm_buf->context_addr.lo = context_addr.lo;
2057 xstorm_buf->mss = 0xffff;
2058 xstorm_buf->rcv_buf = kwqe3->rcv_buf;
2059 if (kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE)
2060 xstorm_buf->params |= L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE;
2061 xstorm_buf->pseudo_header_checksum =
2062 swab16(~csum_ipv6_magic(&src_ip, &dst_ip, 0, IPPROTO_TCP, 0));
2064 if (kwqe3->ka_timeout) {
2065 tstorm_buf->ka_enable = 1;
2066 tstorm_buf->ka_timeout = kwqe3->ka_timeout;
2067 tstorm_buf->ka_interval = kwqe3->ka_interval;
2068 tstorm_buf->ka_max_probe_count = kwqe3->ka_max_probe_count;
2070 tstorm_buf->max_rt_time = 0xffffffff;
2073 static void cnic_init_bnx2x_mac(struct cnic_dev *dev)
2075 struct cnic_local *cp = dev->cnic_priv;
2076 struct bnx2x *bp = netdev_priv(dev->netdev);
2077 u32 pfid = cp->pfid;
2078 u8 *mac = dev->mac_addr;
2080 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2081 XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfid), mac[0]);
2082 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2083 XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfid), mac[1]);
2084 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2085 XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfid), mac[2]);
2086 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2087 XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfid), mac[3]);
2088 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2089 XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfid), mac[4]);
2090 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2091 XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfid), mac[5]);
2093 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2094 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[5]);
2095 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2096 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
2098 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2099 TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfid), mac[3]);
2100 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2101 TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
2103 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2104 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[1]);
2105 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2106 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
2110 static int cnic_bnx2x_connect(struct cnic_dev *dev, struct kwqe *wqes[],
2113 struct cnic_local *cp = dev->cnic_priv;
2114 struct bnx2x *bp = netdev_priv(dev->netdev);
2115 struct l4_kwq_connect_req1 *kwqe1 =
2116 (struct l4_kwq_connect_req1 *) wqes[0];
2117 struct l4_kwq_connect_req3 *kwqe3;
2118 struct l5cm_active_conn_buffer *conn_buf;
2119 struct l5cm_conn_addr_params *conn_addr;
2120 union l5cm_specific_data l5_data;
2121 u32 l5_cid = kwqe1->pg_cid;
2122 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
2123 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
2131 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6)
2141 if (sizeof(*conn_buf) > CNIC_KWQ16_DATA_SIZE) {
2142 netdev_err(dev->netdev, "conn_buf size too big\n");
2145 conn_buf = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2149 memset(conn_buf, 0, sizeof(*conn_buf));
2151 conn_addr = &conn_buf->conn_addr_buf;
2152 conn_addr->remote_addr_0 = csk->ha[0];
2153 conn_addr->remote_addr_1 = csk->ha[1];
2154 conn_addr->remote_addr_2 = csk->ha[2];
2155 conn_addr->remote_addr_3 = csk->ha[3];
2156 conn_addr->remote_addr_4 = csk->ha[4];
2157 conn_addr->remote_addr_5 = csk->ha[5];
2159 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6) {
2160 struct l4_kwq_connect_req2 *kwqe2 =
2161 (struct l4_kwq_connect_req2 *) wqes[1];
2163 conn_addr->local_ip_addr.ip_addr_hi_hi = kwqe2->src_ip_v6_4;
2164 conn_addr->local_ip_addr.ip_addr_hi_lo = kwqe2->src_ip_v6_3;
2165 conn_addr->local_ip_addr.ip_addr_lo_hi = kwqe2->src_ip_v6_2;
2167 conn_addr->remote_ip_addr.ip_addr_hi_hi = kwqe2->dst_ip_v6_4;
2168 conn_addr->remote_ip_addr.ip_addr_hi_lo = kwqe2->dst_ip_v6_3;
2169 conn_addr->remote_ip_addr.ip_addr_lo_hi = kwqe2->dst_ip_v6_2;
2170 conn_addr->params |= L5CM_CONN_ADDR_PARAMS_IP_VERSION;
2172 kwqe3 = (struct l4_kwq_connect_req3 *) wqes[*work - 1];
2174 conn_addr->local_ip_addr.ip_addr_lo_lo = kwqe1->src_ip;
2175 conn_addr->remote_ip_addr.ip_addr_lo_lo = kwqe1->dst_ip;
2176 conn_addr->local_tcp_port = kwqe1->src_port;
2177 conn_addr->remote_tcp_port = kwqe1->dst_port;
2179 conn_addr->pmtu = kwqe3->pmtu;
2180 cnic_init_storm_conn_bufs(dev, kwqe1, kwqe3, conn_buf);
2182 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
2183 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(cp->pfid), csk->vlan_id);
2185 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_TCP_CONNECT,
2186 kwqe1->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2188 set_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2193 static int cnic_bnx2x_close(struct cnic_dev *dev, struct kwqe *kwqe)
2195 struct l4_kwq_close_req *req = (struct l4_kwq_close_req *) kwqe;
2196 union l5cm_specific_data l5_data;
2199 memset(&l5_data, 0, sizeof(l5_data));
2200 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_CLOSE,
2201 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2205 static int cnic_bnx2x_reset(struct cnic_dev *dev, struct kwqe *kwqe)
2207 struct l4_kwq_reset_req *req = (struct l4_kwq_reset_req *) kwqe;
2208 union l5cm_specific_data l5_data;
2211 memset(&l5_data, 0, sizeof(l5_data));
2212 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_ABORT,
2213 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2216 static int cnic_bnx2x_offload_pg(struct cnic_dev *dev, struct kwqe *kwqe)
2218 struct l4_kwq_offload_pg *req = (struct l4_kwq_offload_pg *) kwqe;
2220 struct kcqe *cqes[1];
2222 memset(&kcqe, 0, sizeof(kcqe));
2223 kcqe.pg_host_opaque = req->host_opaque;
2224 kcqe.pg_cid = req->host_opaque;
2225 kcqe.op_code = L4_KCQE_OPCODE_VALUE_OFFLOAD_PG;
2226 cqes[0] = (struct kcqe *) &kcqe;
2227 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
2231 static int cnic_bnx2x_update_pg(struct cnic_dev *dev, struct kwqe *kwqe)
2233 struct l4_kwq_update_pg *req = (struct l4_kwq_update_pg *) kwqe;
2235 struct kcqe *cqes[1];
2237 memset(&kcqe, 0, sizeof(kcqe));
2238 kcqe.pg_host_opaque = req->pg_host_opaque;
2239 kcqe.pg_cid = req->pg_cid;
2240 kcqe.op_code = L4_KCQE_OPCODE_VALUE_UPDATE_PG;
2241 cqes[0] = (struct kcqe *) &kcqe;
2242 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
2246 static int cnic_bnx2x_fcoe_stat(struct cnic_dev *dev, struct kwqe *kwqe)
2248 struct fcoe_kwqe_stat *req;
2249 struct fcoe_stat_ramrod_params *fcoe_stat;
2250 union l5cm_specific_data l5_data;
2251 struct cnic_local *cp = dev->cnic_priv;
2255 req = (struct fcoe_kwqe_stat *) kwqe;
2256 cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid);
2258 fcoe_stat = cnic_get_kwqe_16_data(cp, BNX2X_FCOE_L5_CID_BASE, &l5_data);
2262 memset(fcoe_stat, 0, sizeof(*fcoe_stat));
2263 memcpy(&fcoe_stat->stat_kwqe, req, sizeof(*req));
2265 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_STAT_FUNC, cid,
2266 FCOE_CONNECTION_TYPE, &l5_data);
2270 static int cnic_bnx2x_fcoe_init1(struct cnic_dev *dev, struct kwqe *wqes[],
2274 struct cnic_local *cp = dev->cnic_priv;
2276 struct fcoe_init_ramrod_params *fcoe_init;
2277 struct fcoe_kwqe_init1 *req1;
2278 struct fcoe_kwqe_init2 *req2;
2279 struct fcoe_kwqe_init3 *req3;
2280 union l5cm_specific_data l5_data;
2286 req1 = (struct fcoe_kwqe_init1 *) wqes[0];
2287 req2 = (struct fcoe_kwqe_init2 *) wqes[1];
2288 req3 = (struct fcoe_kwqe_init3 *) wqes[2];
2289 if (req2->hdr.op_code != FCOE_KWQE_OPCODE_INIT2) {
2293 if (req3->hdr.op_code != FCOE_KWQE_OPCODE_INIT3) {
2298 if (sizeof(*fcoe_init) > CNIC_KWQ16_DATA_SIZE) {
2299 netdev_err(dev->netdev, "fcoe_init size too big\n");
2302 fcoe_init = cnic_get_kwqe_16_data(cp, BNX2X_FCOE_L5_CID_BASE, &l5_data);
2306 memset(fcoe_init, 0, sizeof(*fcoe_init));
2307 memcpy(&fcoe_init->init_kwqe1, req1, sizeof(*req1));
2308 memcpy(&fcoe_init->init_kwqe2, req2, sizeof(*req2));
2309 memcpy(&fcoe_init->init_kwqe3, req3, sizeof(*req3));
2310 fcoe_init->eq_pbl_base.lo = cp->kcq2.dma.pgtbl_map & 0xffffffff;
2311 fcoe_init->eq_pbl_base.hi = (u64) cp->kcq2.dma.pgtbl_map >> 32;
2312 fcoe_init->eq_pbl_size = cp->kcq2.dma.num_pages;
2314 fcoe_init->sb_num = cp->status_blk_num;
2315 fcoe_init->eq_prod = MAX_KCQ_IDX;
2316 fcoe_init->sb_id = HC_INDEX_FCOE_EQ_CONS;
2317 cp->kcq2.sw_prod_idx = 0;
2319 cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid);
2320 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_INIT_FUNC, cid,
2321 FCOE_CONNECTION_TYPE, &l5_data);
2326 static int cnic_bnx2x_fcoe_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
2330 u32 cid = -1, l5_cid;
2331 struct cnic_local *cp = dev->cnic_priv;
2332 struct fcoe_kwqe_conn_offload1 *req1;
2333 struct fcoe_kwqe_conn_offload2 *req2;
2334 struct fcoe_kwqe_conn_offload3 *req3;
2335 struct fcoe_kwqe_conn_offload4 *req4;
2336 struct fcoe_conn_offload_ramrod_params *fcoe_offload;
2337 struct cnic_context *ctx;
2338 struct fcoe_context *fctx;
2339 struct regpair ctx_addr;
2340 union l5cm_specific_data l5_data;
2341 struct fcoe_kcqe kcqe;
2342 struct kcqe *cqes[1];
2348 req1 = (struct fcoe_kwqe_conn_offload1 *) wqes[0];
2349 req2 = (struct fcoe_kwqe_conn_offload2 *) wqes[1];
2350 req3 = (struct fcoe_kwqe_conn_offload3 *) wqes[2];
2351 req4 = (struct fcoe_kwqe_conn_offload4 *) wqes[3];
2355 l5_cid = req1->fcoe_conn_id;
2356 if (l5_cid >= dev->max_fcoe_conn)
2359 l5_cid += BNX2X_FCOE_L5_CID_BASE;
2361 ctx = &cp->ctx_tbl[l5_cid];
2362 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2365 ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
2372 fctx = cnic_get_bnx2x_ctx(dev, cid, 1, &ctx_addr);
2374 u32 hw_cid = BNX2X_HW_CID(cp, cid);
2377 val = CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
2378 FCOE_CONNECTION_TYPE);
2379 fctx->xstorm_ag_context.cdu_reserved = val;
2380 val = CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
2381 FCOE_CONNECTION_TYPE);
2382 fctx->ustorm_ag_context.cdu_usage = val;
2384 if (sizeof(*fcoe_offload) > CNIC_KWQ16_DATA_SIZE) {
2385 netdev_err(dev->netdev, "fcoe_offload size too big\n");
2388 fcoe_offload = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2392 memset(fcoe_offload, 0, sizeof(*fcoe_offload));
2393 memcpy(&fcoe_offload->offload_kwqe1, req1, sizeof(*req1));
2394 memcpy(&fcoe_offload->offload_kwqe2, req2, sizeof(*req2));
2395 memcpy(&fcoe_offload->offload_kwqe3, req3, sizeof(*req3));
2396 memcpy(&fcoe_offload->offload_kwqe4, req4, sizeof(*req4));
2398 cid = BNX2X_HW_CID(cp, cid);
2399 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_OFFLOAD_CONN, cid,
2400 FCOE_CONNECTION_TYPE, &l5_data);
2402 set_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2408 cnic_free_bnx2x_conn_resc(dev, l5_cid);
2410 memset(&kcqe, 0, sizeof(kcqe));
2411 kcqe.op_code = FCOE_KCQE_OPCODE_OFFLOAD_CONN;
2412 kcqe.fcoe_conn_id = req1->fcoe_conn_id;
2413 kcqe.completion_status = FCOE_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
2415 cqes[0] = (struct kcqe *) &kcqe;
2416 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_FCOE, cqes, 1);
2420 static int cnic_bnx2x_fcoe_enable(struct cnic_dev *dev, struct kwqe *kwqe)
2422 struct fcoe_kwqe_conn_enable_disable *req;
2423 struct fcoe_conn_enable_disable_ramrod_params *fcoe_enable;
2424 union l5cm_specific_data l5_data;
2427 struct cnic_local *cp = dev->cnic_priv;
2429 req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2430 cid = req->context_id;
2431 l5_cid = req->conn_id + BNX2X_FCOE_L5_CID_BASE;
2433 if (sizeof(*fcoe_enable) > CNIC_KWQ16_DATA_SIZE) {
2434 netdev_err(dev->netdev, "fcoe_enable size too big\n");
2437 fcoe_enable = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2441 memset(fcoe_enable, 0, sizeof(*fcoe_enable));
2442 memcpy(&fcoe_enable->enable_disable_kwqe, req, sizeof(*req));
2443 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_ENABLE_CONN, cid,
2444 FCOE_CONNECTION_TYPE, &l5_data);
2448 static int cnic_bnx2x_fcoe_disable(struct cnic_dev *dev, struct kwqe *kwqe)
2450 struct fcoe_kwqe_conn_enable_disable *req;
2451 struct fcoe_conn_enable_disable_ramrod_params *fcoe_disable;
2452 union l5cm_specific_data l5_data;
2455 struct cnic_local *cp = dev->cnic_priv;
2457 req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2458 cid = req->context_id;
2459 l5_cid = req->conn_id;
2460 if (l5_cid >= dev->max_fcoe_conn)
2463 l5_cid += BNX2X_FCOE_L5_CID_BASE;
2465 if (sizeof(*fcoe_disable) > CNIC_KWQ16_DATA_SIZE) {
2466 netdev_err(dev->netdev, "fcoe_disable size too big\n");
2469 fcoe_disable = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2473 memset(fcoe_disable, 0, sizeof(*fcoe_disable));
2474 memcpy(&fcoe_disable->enable_disable_kwqe, req, sizeof(*req));
2475 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_DISABLE_CONN, cid,
2476 FCOE_CONNECTION_TYPE, &l5_data);
2480 static int cnic_bnx2x_fcoe_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
2482 struct fcoe_kwqe_conn_destroy *req;
2483 union l5cm_specific_data l5_data;
2486 struct cnic_local *cp = dev->cnic_priv;
2487 struct cnic_context *ctx;
2488 struct fcoe_kcqe kcqe;
2489 struct kcqe *cqes[1];
2491 req = (struct fcoe_kwqe_conn_destroy *) kwqe;
2492 cid = req->context_id;
2493 l5_cid = req->conn_id;
2494 if (l5_cid >= dev->max_fcoe_conn)
2497 l5_cid += BNX2X_FCOE_L5_CID_BASE;
2499 ctx = &cp->ctx_tbl[l5_cid];
2501 init_waitqueue_head(&ctx->waitq);
2504 memset(&kcqe, 0, sizeof(kcqe));
2505 kcqe.completion_status = FCOE_KCQE_COMPLETION_STATUS_ERROR;
2506 memset(&l5_data, 0, sizeof(l5_data));
2507 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_TERMINATE_CONN, cid,
2508 FCOE_CONNECTION_TYPE, &l5_data);
2510 wait_event_timeout(ctx->waitq, ctx->wait_cond, CNIC_RAMROD_TMO);
2512 kcqe.completion_status = 0;
2515 set_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags);
2516 queue_delayed_work(cnic_wq, &cp->delete_task, msecs_to_jiffies(2000));
2518 kcqe.op_code = FCOE_KCQE_OPCODE_DESTROY_CONN;
2519 kcqe.fcoe_conn_id = req->conn_id;
2520 kcqe.fcoe_conn_context_id = cid;
2522 cqes[0] = (struct kcqe *) &kcqe;
2523 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_FCOE, cqes, 1);
2527 static void cnic_bnx2x_delete_wait(struct cnic_dev *dev, u32 start_cid)
2529 struct cnic_local *cp = dev->cnic_priv;
2532 for (i = start_cid; i < cp->max_cid_space; i++) {
2533 struct cnic_context *ctx = &cp->ctx_tbl[i];
2536 while (test_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
2539 for (j = 0; j < 5; j++) {
2540 if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2545 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2546 netdev_warn(dev->netdev, "CID %x not deleted\n",
2551 static int cnic_bnx2x_fcoe_fw_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
2553 struct fcoe_kwqe_destroy *req;
2554 union l5cm_specific_data l5_data;
2555 struct cnic_local *cp = dev->cnic_priv;
2559 cnic_bnx2x_delete_wait(dev, MAX_ISCSI_TBL_SZ);
2561 req = (struct fcoe_kwqe_destroy *) kwqe;
2562 cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid);
2564 memset(&l5_data, 0, sizeof(l5_data));
2565 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_DESTROY_FUNC, cid,
2566 FCOE_CONNECTION_TYPE, &l5_data);
2570 static void cnic_bnx2x_kwqe_err(struct cnic_dev *dev, struct kwqe *kwqe)
2572 struct cnic_local *cp = dev->cnic_priv;
2574 struct kcqe *cqes[1];
2576 u32 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2577 u32 layer_code = kwqe->kwqe_op_flag & KWQE_LAYER_MASK;
2581 cid = kwqe->kwqe_info0;
2582 memset(&kcqe, 0, sizeof(kcqe));
2584 if (layer_code == KWQE_FLAGS_LAYER_MASK_L5_FCOE) {
2587 ulp_type = CNIC_ULP_FCOE;
2588 if (opcode == FCOE_KWQE_OPCODE_DISABLE_CONN) {
2589 struct fcoe_kwqe_conn_enable_disable *req;
2591 req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2592 kcqe_op = FCOE_KCQE_OPCODE_DISABLE_CONN;
2593 cid = req->context_id;
2594 l5_cid = req->conn_id;
2595 } else if (opcode == FCOE_KWQE_OPCODE_DESTROY) {
2596 kcqe_op = FCOE_KCQE_OPCODE_DESTROY_FUNC;
2600 kcqe.kcqe_op_flag = kcqe_op << KCQE_FLAGS_OPCODE_SHIFT;
2601 kcqe.kcqe_op_flag |= KCQE_FLAGS_LAYER_MASK_L5_FCOE;
2602 kcqe.kcqe_info1 = FCOE_KCQE_COMPLETION_STATUS_PARITY_ERROR;
2603 kcqe.kcqe_info2 = cid;
2604 kcqe.kcqe_info0 = l5_cid;
2606 } else if (layer_code == KWQE_FLAGS_LAYER_MASK_L5_ISCSI) {
2607 ulp_type = CNIC_ULP_ISCSI;
2608 if (opcode == ISCSI_KWQE_OPCODE_UPDATE_CONN)
2609 cid = kwqe->kwqe_info1;
2611 kcqe.kcqe_op_flag = (opcode + 0x10) << KCQE_FLAGS_OPCODE_SHIFT;
2612 kcqe.kcqe_op_flag |= KCQE_FLAGS_LAYER_MASK_L5_ISCSI;
2613 kcqe.kcqe_info1 = ISCSI_KCQE_COMPLETION_STATUS_PARITY_ERR;
2614 kcqe.kcqe_info2 = cid;
2615 cnic_get_l5_cid(cp, BNX2X_SW_CID(cid), &kcqe.kcqe_info0);
2617 } else if (layer_code == KWQE_FLAGS_LAYER_MASK_L4) {
2618 struct l4_kcq *l4kcqe = (struct l4_kcq *) &kcqe;
2620 ulp_type = CNIC_ULP_L4;
2621 if (opcode == L4_KWQE_OPCODE_VALUE_CONNECT1)
2622 kcqe_op = L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE;
2623 else if (opcode == L4_KWQE_OPCODE_VALUE_RESET)
2624 kcqe_op = L4_KCQE_OPCODE_VALUE_RESET_COMP;
2625 else if (opcode == L4_KWQE_OPCODE_VALUE_CLOSE)
2626 kcqe_op = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
2630 kcqe.kcqe_op_flag = (kcqe_op << KCQE_FLAGS_OPCODE_SHIFT) |
2631 KCQE_FLAGS_LAYER_MASK_L4;
2632 l4kcqe->status = L4_KCQE_COMPLETION_STATUS_PARITY_ERROR;
2634 cnic_get_l5_cid(cp, BNX2X_SW_CID(cid), &l4kcqe->conn_id);
2640 cnic_reply_bnx2x_kcqes(dev, ulp_type, cqes, 1);
2643 static int cnic_submit_bnx2x_iscsi_kwqes(struct cnic_dev *dev,
2644 struct kwqe *wqes[], u32 num_wqes)
2650 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2651 return -EAGAIN; /* bnx2 is down */
2653 for (i = 0; i < num_wqes; ) {
2655 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2659 case ISCSI_KWQE_OPCODE_INIT1:
2660 ret = cnic_bnx2x_iscsi_init1(dev, kwqe);
2662 case ISCSI_KWQE_OPCODE_INIT2:
2663 ret = cnic_bnx2x_iscsi_init2(dev, kwqe);
2665 case ISCSI_KWQE_OPCODE_OFFLOAD_CONN1:
2666 ret = cnic_bnx2x_iscsi_ofld1(dev, &wqes[i],
2667 num_wqes - i, &work);
2669 case ISCSI_KWQE_OPCODE_UPDATE_CONN:
2670 ret = cnic_bnx2x_iscsi_update(dev, kwqe);
2672 case ISCSI_KWQE_OPCODE_DESTROY_CONN:
2673 ret = cnic_bnx2x_iscsi_destroy(dev, kwqe);
2675 case L4_KWQE_OPCODE_VALUE_CONNECT1:
2676 ret = cnic_bnx2x_connect(dev, &wqes[i], num_wqes - i,
2679 case L4_KWQE_OPCODE_VALUE_CLOSE:
2680 ret = cnic_bnx2x_close(dev, kwqe);
2682 case L4_KWQE_OPCODE_VALUE_RESET:
2683 ret = cnic_bnx2x_reset(dev, kwqe);
2685 case L4_KWQE_OPCODE_VALUE_OFFLOAD_PG:
2686 ret = cnic_bnx2x_offload_pg(dev, kwqe);
2688 case L4_KWQE_OPCODE_VALUE_UPDATE_PG:
2689 ret = cnic_bnx2x_update_pg(dev, kwqe);
2691 case L4_KWQE_OPCODE_VALUE_UPLOAD_PG:
2696 netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2701 netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2704 /* Possibly bnx2x parity error, send completion
2705 * to ulp drivers with error code to speed up
2706 * cleanup and reset recovery.
2708 if (ret == -EIO || ret == -EAGAIN)
2709 cnic_bnx2x_kwqe_err(dev, kwqe);
2716 static int cnic_submit_bnx2x_fcoe_kwqes(struct cnic_dev *dev,
2717 struct kwqe *wqes[], u32 num_wqes)
2719 struct cnic_local *cp = dev->cnic_priv;
2724 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2725 return -EAGAIN; /* bnx2 is down */
2727 if (!BNX2X_CHIP_IS_E2_PLUS(cp->chip_id))
2730 for (i = 0; i < num_wqes; ) {
2732 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2736 case FCOE_KWQE_OPCODE_INIT1:
2737 ret = cnic_bnx2x_fcoe_init1(dev, &wqes[i],
2738 num_wqes - i, &work);
2740 case FCOE_KWQE_OPCODE_OFFLOAD_CONN1:
2741 ret = cnic_bnx2x_fcoe_ofld1(dev, &wqes[i],
2742 num_wqes - i, &work);
2744 case FCOE_KWQE_OPCODE_ENABLE_CONN:
2745 ret = cnic_bnx2x_fcoe_enable(dev, kwqe);
2747 case FCOE_KWQE_OPCODE_DISABLE_CONN:
2748 ret = cnic_bnx2x_fcoe_disable(dev, kwqe);
2750 case FCOE_KWQE_OPCODE_DESTROY_CONN:
2751 ret = cnic_bnx2x_fcoe_destroy(dev, kwqe);
2753 case FCOE_KWQE_OPCODE_DESTROY:
2754 ret = cnic_bnx2x_fcoe_fw_destroy(dev, kwqe);
2756 case FCOE_KWQE_OPCODE_STAT:
2757 ret = cnic_bnx2x_fcoe_stat(dev, kwqe);
2761 netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2766 netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2769 /* Possibly bnx2x parity error, send completion
2770 * to ulp drivers with error code to speed up
2771 * cleanup and reset recovery.
2773 if (ret == -EIO || ret == -EAGAIN)
2774 cnic_bnx2x_kwqe_err(dev, kwqe);
2781 static int cnic_submit_bnx2x_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
2787 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2788 return -EAGAIN; /* bnx2x is down */
2793 layer_code = wqes[0]->kwqe_op_flag & KWQE_LAYER_MASK;
2794 switch (layer_code) {
2795 case KWQE_FLAGS_LAYER_MASK_L5_ISCSI:
2796 case KWQE_FLAGS_LAYER_MASK_L4:
2797 case KWQE_FLAGS_LAYER_MASK_L2:
2798 ret = cnic_submit_bnx2x_iscsi_kwqes(dev, wqes, num_wqes);
2801 case KWQE_FLAGS_LAYER_MASK_L5_FCOE:
2802 ret = cnic_submit_bnx2x_fcoe_kwqes(dev, wqes, num_wqes);
2808 static inline u32 cnic_get_kcqe_layer_mask(u32 opflag)
2810 if (unlikely(KCQE_OPCODE(opflag) == FCOE_RAMROD_CMD_ID_TERMINATE_CONN))
2811 return KCQE_FLAGS_LAYER_MASK_L4;
2813 return opflag & KCQE_FLAGS_LAYER_MASK;
2816 static void service_kcqes(struct cnic_dev *dev, int num_cqes)
2818 struct cnic_local *cp = dev->cnic_priv;
2824 struct cnic_ulp_ops *ulp_ops;
2826 u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
2827 u32 kcqe_layer = cnic_get_kcqe_layer_mask(kcqe_op_flag);
2829 if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
2832 while (j < num_cqes) {
2833 u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
2835 if (cnic_get_kcqe_layer_mask(next_op) != kcqe_layer)
2838 if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
2843 if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
2844 ulp_type = CNIC_ULP_RDMA;
2845 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
2846 ulp_type = CNIC_ULP_ISCSI;
2847 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_FCOE)
2848 ulp_type = CNIC_ULP_FCOE;
2849 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
2850 ulp_type = CNIC_ULP_L4;
2851 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
2854 netdev_err(dev->netdev, "Unknown type of KCQE(0x%x)\n",
2860 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
2861 if (likely(ulp_ops)) {
2862 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
2863 cp->completed_kcq + i, j);
2872 cnic_spq_completion(dev, DRV_CTL_RET_L5_SPQ_CREDIT_CMD, comp);
2875 static int cnic_get_kcqes(struct cnic_dev *dev, struct kcq_info *info)
2877 struct cnic_local *cp = dev->cnic_priv;
2878 u16 i, ri, hw_prod, last;
2880 int kcqe_cnt = 0, last_cnt = 0;
2882 i = ri = last = info->sw_prod_idx;
2884 hw_prod = *info->hw_prod_idx_ptr;
2885 hw_prod = info->hw_idx(hw_prod);
2887 while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
2888 kcqe = &info->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
2889 cp->completed_kcq[kcqe_cnt++] = kcqe;
2890 i = info->next_idx(i);
2891 ri = i & MAX_KCQ_IDX;
2892 if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
2893 last_cnt = kcqe_cnt;
2898 info->sw_prod_idx = last;
2902 static int cnic_l2_completion(struct cnic_local *cp)
2904 u16 hw_cons, sw_cons;
2905 struct cnic_uio_dev *udev = cp->udev;
2906 union eth_rx_cqe *cqe, *cqe_ring = (union eth_rx_cqe *)
2907 (udev->l2_ring + (2 * BNX2_PAGE_SIZE));
2911 if (!test_bit(CNIC_F_BNX2X_CLASS, &cp->dev->flags))
2914 hw_cons = *cp->rx_cons_ptr;
2915 if ((hw_cons & BNX2X_MAX_RCQ_DESC_CNT) == BNX2X_MAX_RCQ_DESC_CNT)
2918 sw_cons = cp->rx_cons;
2919 while (sw_cons != hw_cons) {
2922 cqe = &cqe_ring[sw_cons & BNX2X_MAX_RCQ_DESC_CNT];
2923 cqe_fp_flags = cqe->fast_path_cqe.type_error_flags;
2924 if (cqe_fp_flags & ETH_FAST_PATH_RX_CQE_TYPE) {
2925 cmd = le32_to_cpu(cqe->ramrod_cqe.conn_and_cmd_data);
2926 cmd >>= COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT;
2927 if (cmd == RAMROD_CMD_ID_ETH_CLIENT_SETUP ||
2928 cmd == RAMROD_CMD_ID_ETH_HALT)
2931 sw_cons = BNX2X_NEXT_RCQE(sw_cons);
2936 static void cnic_chk_pkt_rings(struct cnic_local *cp)
2938 u16 rx_cons, tx_cons;
2941 if (!test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
2944 rx_cons = *cp->rx_cons_ptr;
2945 tx_cons = *cp->tx_cons_ptr;
2946 if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
2947 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
2948 comp = cnic_l2_completion(cp);
2950 cp->tx_cons = tx_cons;
2951 cp->rx_cons = rx_cons;
2954 uio_event_notify(&cp->udev->cnic_uinfo);
2957 clear_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
2960 static u32 cnic_service_bnx2_queues(struct cnic_dev *dev)
2962 struct cnic_local *cp = dev->cnic_priv;
2963 u32 status_idx = (u16) *cp->kcq1.status_idx_ptr;
2966 /* status block index must be read before reading other fields */
2968 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2970 while ((kcqe_cnt = cnic_get_kcqes(dev, &cp->kcq1))) {
2972 service_kcqes(dev, kcqe_cnt);
2974 /* Tell compiler that status_blk fields can change. */
2976 status_idx = (u16) *cp->kcq1.status_idx_ptr;
2977 /* status block index must be read first */
2979 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2982 CNIC_WR16(dev, cp->kcq1.io_addr, cp->kcq1.sw_prod_idx);
2984 cnic_chk_pkt_rings(cp);
2989 static int cnic_service_bnx2(void *data, void *status_blk)
2991 struct cnic_dev *dev = data;
2993 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
2994 struct status_block *sblk = status_blk;
2996 return sblk->status_idx;
2999 return cnic_service_bnx2_queues(dev);
3002 static void cnic_service_bnx2_msix(unsigned long data)
3004 struct cnic_dev *dev = (struct cnic_dev *) data;
3005 struct cnic_local *cp = dev->cnic_priv;
3007 cp->last_status_idx = cnic_service_bnx2_queues(dev);
3009 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
3010 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
3013 static void cnic_doirq(struct cnic_dev *dev)
3015 struct cnic_local *cp = dev->cnic_priv;
3017 if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
3018 u16 prod = cp->kcq1.sw_prod_idx & MAX_KCQ_IDX;
3020 prefetch(cp->status_blk.gen);
3021 prefetch(&cp->kcq1.kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
3023 tasklet_schedule(&cp->cnic_irq_task);
3027 static irqreturn_t cnic_irq(int irq, void *dev_instance)
3029 struct cnic_dev *dev = dev_instance;
3030 struct cnic_local *cp = dev->cnic_priv;
3040 static inline void cnic_ack_bnx2x_int(struct cnic_dev *dev, u8 id, u8 storm,
3041 u16 index, u8 op, u8 update)
3043 struct cnic_local *cp = dev->cnic_priv;
3044 u32 hc_addr = (HC_REG_COMMAND_REG + CNIC_PORT(cp) * 32 +
3045 COMMAND_REG_INT_ACK);
3046 struct igu_ack_register igu_ack;
3048 igu_ack.status_block_index = index;
3049 igu_ack.sb_id_and_flags =
3050 ((id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) |
3051 (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) |
3052 (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) |
3053 (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT));
3055 CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack));
3058 static void cnic_ack_igu_sb(struct cnic_dev *dev, u8 igu_sb_id, u8 segment,
3059 u16 index, u8 op, u8 update)
3061 struct igu_regular cmd_data;
3062 u32 igu_addr = BAR_IGU_INTMEM + (IGU_CMD_INT_ACK_BASE + igu_sb_id) * 8;
3064 cmd_data.sb_id_and_flags =
3065 (index << IGU_REGULAR_SB_INDEX_SHIFT) |
3066 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
3067 (update << IGU_REGULAR_BUPDATE_SHIFT) |
3068 (op << IGU_REGULAR_ENABLE_INT_SHIFT);
3071 CNIC_WR(dev, igu_addr, cmd_data.sb_id_and_flags);
3074 static void cnic_ack_bnx2x_msix(struct cnic_dev *dev)
3076 struct cnic_local *cp = dev->cnic_priv;
3078 cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, CSTORM_ID, 0,
3079 IGU_INT_DISABLE, 0);
3082 static void cnic_ack_bnx2x_e2_msix(struct cnic_dev *dev)
3084 struct cnic_local *cp = dev->cnic_priv;
3086 cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF, 0,
3087 IGU_INT_DISABLE, 0);
3090 static void cnic_arm_bnx2x_msix(struct cnic_dev *dev, u32 idx)
3092 struct cnic_local *cp = dev->cnic_priv;
3094 cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, CSTORM_ID, idx,
3098 static void cnic_arm_bnx2x_e2_msix(struct cnic_dev *dev, u32 idx)
3100 struct cnic_local *cp = dev->cnic_priv;
3102 cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF, idx,
3106 static u32 cnic_service_bnx2x_kcq(struct cnic_dev *dev, struct kcq_info *info)
3108 u32 last_status = *info->status_idx_ptr;
3111 /* status block index must be read before reading the KCQ */
3113 while ((kcqe_cnt = cnic_get_kcqes(dev, info))) {
3115 service_kcqes(dev, kcqe_cnt);
3117 /* Tell compiler that sblk fields can change. */
3120 last_status = *info->status_idx_ptr;
3121 /* status block index must be read before reading the KCQ */
3127 static void cnic_service_bnx2x_bh(unsigned long data)
3129 struct cnic_dev *dev = (struct cnic_dev *) data;
3130 struct cnic_local *cp = dev->cnic_priv;
3131 u32 status_idx, new_status_idx;
3133 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
3137 status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq1);
3139 CNIC_WR16(dev, cp->kcq1.io_addr,
3140 cp->kcq1.sw_prod_idx + MAX_KCQ_IDX);
3142 if (cp->ethdev->drv_state & CNIC_DRV_STATE_NO_FCOE) {
3143 cp->arm_int(dev, status_idx);
3147 new_status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq2);
3149 if (new_status_idx != status_idx)
3152 CNIC_WR16(dev, cp->kcq2.io_addr, cp->kcq2.sw_prod_idx +
3155 cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF,
3156 status_idx, IGU_INT_ENABLE, 1);
3162 static int cnic_service_bnx2x(void *data, void *status_blk)
3164 struct cnic_dev *dev = data;
3165 struct cnic_local *cp = dev->cnic_priv;
3167 if (!(cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3170 cnic_chk_pkt_rings(cp);
3175 static void cnic_ulp_stop_one(struct cnic_local *cp, int if_type)
3177 struct cnic_ulp_ops *ulp_ops;
3179 if (if_type == CNIC_ULP_ISCSI)
3180 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
3182 mutex_lock(&cnic_lock);
3183 ulp_ops = rcu_dereference_protected(cp->ulp_ops[if_type],
3184 lockdep_is_held(&cnic_lock));
3186 mutex_unlock(&cnic_lock);
3189 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3190 mutex_unlock(&cnic_lock);
3192 if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
3193 ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
3195 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3198 static void cnic_ulp_stop(struct cnic_dev *dev)
3200 struct cnic_local *cp = dev->cnic_priv;
3203 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++)
3204 cnic_ulp_stop_one(cp, if_type);
3207 static void cnic_ulp_start(struct cnic_dev *dev)
3209 struct cnic_local *cp = dev->cnic_priv;
3212 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
3213 struct cnic_ulp_ops *ulp_ops;
3215 mutex_lock(&cnic_lock);
3216 ulp_ops = rcu_dereference_protected(cp->ulp_ops[if_type],
3217 lockdep_is_held(&cnic_lock));
3218 if (!ulp_ops || !ulp_ops->cnic_start) {
3219 mutex_unlock(&cnic_lock);
3222 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3223 mutex_unlock(&cnic_lock);
3225 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
3226 ulp_ops->cnic_start(cp->ulp_handle[if_type]);
3228 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3232 static int cnic_copy_ulp_stats(struct cnic_dev *dev, int ulp_type)
3234 struct cnic_local *cp = dev->cnic_priv;
3235 struct cnic_ulp_ops *ulp_ops;
3238 mutex_lock(&cnic_lock);
3239 ulp_ops = cnic_ulp_tbl_prot(ulp_type);
3240 if (ulp_ops && ulp_ops->cnic_get_stats)
3241 rc = ulp_ops->cnic_get_stats(cp->ulp_handle[ulp_type]);
3244 mutex_unlock(&cnic_lock);
3248 static int cnic_ctl(void *data, struct cnic_ctl_info *info)
3250 struct cnic_dev *dev = data;
3251 int ulp_type = CNIC_ULP_ISCSI;
3253 switch (info->cmd) {
3254 case CNIC_CTL_STOP_CMD:
3262 case CNIC_CTL_START_CMD:
3265 if (!cnic_start_hw(dev))
3266 cnic_ulp_start(dev);
3270 case CNIC_CTL_STOP_ISCSI_CMD: {
3271 struct cnic_local *cp = dev->cnic_priv;
3272 set_bit(CNIC_LCL_FL_STOP_ISCSI, &cp->cnic_local_flags);
3273 queue_delayed_work(cnic_wq, &cp->delete_task, 0);
3276 case CNIC_CTL_COMPLETION_CMD: {
3277 struct cnic_ctl_completion *comp = &info->data.comp;
3278 u32 cid = BNX2X_SW_CID(comp->cid);
3280 struct cnic_local *cp = dev->cnic_priv;
3282 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
3285 if (cnic_get_l5_cid(cp, cid, &l5_cid) == 0) {
3286 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3288 if (unlikely(comp->error)) {
3289 set_bit(CTX_FL_CID_ERROR, &ctx->ctx_flags);
3290 netdev_err(dev->netdev,
3291 "CID %x CFC delete comp error %x\n",
3296 wake_up(&ctx->waitq);
3300 case CNIC_CTL_FCOE_STATS_GET_CMD:
3301 ulp_type = CNIC_ULP_FCOE;
3303 case CNIC_CTL_ISCSI_STATS_GET_CMD:
3305 cnic_copy_ulp_stats(dev, ulp_type);
3315 static void cnic_ulp_init(struct cnic_dev *dev)
3318 struct cnic_local *cp = dev->cnic_priv;
3320 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
3321 struct cnic_ulp_ops *ulp_ops;
3323 mutex_lock(&cnic_lock);
3324 ulp_ops = cnic_ulp_tbl_prot(i);
3325 if (!ulp_ops || !ulp_ops->cnic_init) {
3326 mutex_unlock(&cnic_lock);
3330 mutex_unlock(&cnic_lock);
3332 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
3333 ulp_ops->cnic_init(dev);
3339 static void cnic_ulp_exit(struct cnic_dev *dev)
3342 struct cnic_local *cp = dev->cnic_priv;
3344 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
3345 struct cnic_ulp_ops *ulp_ops;
3347 mutex_lock(&cnic_lock);
3348 ulp_ops = cnic_ulp_tbl_prot(i);
3349 if (!ulp_ops || !ulp_ops->cnic_exit) {
3350 mutex_unlock(&cnic_lock);
3354 mutex_unlock(&cnic_lock);
3356 if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
3357 ulp_ops->cnic_exit(dev);
3363 static int cnic_cm_offload_pg(struct cnic_sock *csk)
3365 struct cnic_dev *dev = csk->dev;
3366 struct l4_kwq_offload_pg *l4kwqe;
3367 struct kwqe *wqes[1];
3369 l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
3370 memset(l4kwqe, 0, sizeof(*l4kwqe));
3371 wqes[0] = (struct kwqe *) l4kwqe;
3373 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
3375 L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
3376 l4kwqe->l2hdr_nbytes = ETH_HLEN;
3378 l4kwqe->da0 = csk->ha[0];
3379 l4kwqe->da1 = csk->ha[1];
3380 l4kwqe->da2 = csk->ha[2];
3381 l4kwqe->da3 = csk->ha[3];
3382 l4kwqe->da4 = csk->ha[4];
3383 l4kwqe->da5 = csk->ha[5];
3385 l4kwqe->sa0 = dev->mac_addr[0];
3386 l4kwqe->sa1 = dev->mac_addr[1];
3387 l4kwqe->sa2 = dev->mac_addr[2];
3388 l4kwqe->sa3 = dev->mac_addr[3];
3389 l4kwqe->sa4 = dev->mac_addr[4];
3390 l4kwqe->sa5 = dev->mac_addr[5];
3392 l4kwqe->etype = ETH_P_IP;
3393 l4kwqe->ipid_start = DEF_IPID_START;
3394 l4kwqe->host_opaque = csk->l5_cid;
3397 l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
3398 l4kwqe->vlan_tag = csk->vlan_id;
3399 l4kwqe->l2hdr_nbytes += 4;
3402 return dev->submit_kwqes(dev, wqes, 1);
3405 static int cnic_cm_update_pg(struct cnic_sock *csk)
3407 struct cnic_dev *dev = csk->dev;
3408 struct l4_kwq_update_pg *l4kwqe;
3409 struct kwqe *wqes[1];
3411 l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
3412 memset(l4kwqe, 0, sizeof(*l4kwqe));
3413 wqes[0] = (struct kwqe *) l4kwqe;
3415 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
3417 L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
3418 l4kwqe->pg_cid = csk->pg_cid;
3420 l4kwqe->da0 = csk->ha[0];
3421 l4kwqe->da1 = csk->ha[1];
3422 l4kwqe->da2 = csk->ha[2];
3423 l4kwqe->da3 = csk->ha[3];
3424 l4kwqe->da4 = csk->ha[4];
3425 l4kwqe->da5 = csk->ha[5];
3427 l4kwqe->pg_host_opaque = csk->l5_cid;
3428 l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
3430 return dev->submit_kwqes(dev, wqes, 1);
3433 static int cnic_cm_upload_pg(struct cnic_sock *csk)
3435 struct cnic_dev *dev = csk->dev;
3436 struct l4_kwq_upload *l4kwqe;
3437 struct kwqe *wqes[1];
3439 l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
3440 memset(l4kwqe, 0, sizeof(*l4kwqe));
3441 wqes[0] = (struct kwqe *) l4kwqe;
3443 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
3445 L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
3446 l4kwqe->cid = csk->pg_cid;
3448 return dev->submit_kwqes(dev, wqes, 1);
3451 static int cnic_cm_conn_req(struct cnic_sock *csk)
3453 struct cnic_dev *dev = csk->dev;
3454 struct l4_kwq_connect_req1 *l4kwqe1;
3455 struct l4_kwq_connect_req2 *l4kwqe2;
3456 struct l4_kwq_connect_req3 *l4kwqe3;
3457 struct kwqe *wqes[3];
3461 l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
3462 l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
3463 l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
3464 memset(l4kwqe1, 0, sizeof(*l4kwqe1));
3465 memset(l4kwqe2, 0, sizeof(*l4kwqe2));
3466 memset(l4kwqe3, 0, sizeof(*l4kwqe3));
3468 l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
3470 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
3471 l4kwqe3->ka_timeout = csk->ka_timeout;
3472 l4kwqe3->ka_interval = csk->ka_interval;
3473 l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
3474 l4kwqe3->tos = csk->tos;
3475 l4kwqe3->ttl = csk->ttl;
3476 l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
3477 l4kwqe3->pmtu = csk->mtu;
3478 l4kwqe3->rcv_buf = csk->rcv_buf;
3479 l4kwqe3->snd_buf = csk->snd_buf;
3480 l4kwqe3->seed = csk->seed;
3482 wqes[0] = (struct kwqe *) l4kwqe1;
3483 if (test_bit(SK_F_IPV6, &csk->flags)) {
3484 wqes[1] = (struct kwqe *) l4kwqe2;
3485 wqes[2] = (struct kwqe *) l4kwqe3;
3488 l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
3489 l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
3491 L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
3492 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
3493 l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
3494 l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
3495 l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
3496 l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
3497 l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
3498 l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
3499 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
3500 sizeof(struct tcphdr);
3502 wqes[1] = (struct kwqe *) l4kwqe3;
3503 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
3504 sizeof(struct tcphdr);
3507 l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
3509 (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
3510 L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
3511 l4kwqe1->cid = csk->cid;
3512 l4kwqe1->pg_cid = csk->pg_cid;
3513 l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
3514 l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
3515 l4kwqe1->src_port = be16_to_cpu(csk->src_port);
3516 l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
3517 if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
3518 tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
3519 if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
3520 tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
3521 if (csk->tcp_flags & SK_TCP_NAGLE)
3522 tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
3523 if (csk->tcp_flags & SK_TCP_TIMESTAMP)
3524 tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
3525 if (csk->tcp_flags & SK_TCP_SACK)
3526 tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
3527 if (csk->tcp_flags & SK_TCP_SEG_SCALING)
3528 tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
3530 l4kwqe1->tcp_flags = tcp_flags;
3532 return dev->submit_kwqes(dev, wqes, num_wqes);
3535 static int cnic_cm_close_req(struct cnic_sock *csk)
3537 struct cnic_dev *dev = csk->dev;
3538 struct l4_kwq_close_req *l4kwqe;
3539 struct kwqe *wqes[1];
3541 l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
3542 memset(l4kwqe, 0, sizeof(*l4kwqe));
3543 wqes[0] = (struct kwqe *) l4kwqe;
3545 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
3546 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
3547 l4kwqe->cid = csk->cid;
3549 return dev->submit_kwqes(dev, wqes, 1);
3552 static int cnic_cm_abort_req(struct cnic_sock *csk)
3554 struct cnic_dev *dev = csk->dev;
3555 struct l4_kwq_reset_req *l4kwqe;
3556 struct kwqe *wqes[1];
3558 l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
3559 memset(l4kwqe, 0, sizeof(*l4kwqe));
3560 wqes[0] = (struct kwqe *) l4kwqe;
3562 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
3563 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
3564 l4kwqe->cid = csk->cid;
3566 return dev->submit_kwqes(dev, wqes, 1);
3569 static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
3570 u32 l5_cid, struct cnic_sock **csk, void *context)
3572 struct cnic_local *cp = dev->cnic_priv;
3573 struct cnic_sock *csk1;
3575 if (l5_cid >= MAX_CM_SK_TBL_SZ)
3579 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3581 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
3585 csk1 = &cp->csk_tbl[l5_cid];
3586 if (atomic_read(&csk1->ref_count))
3589 if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
3594 csk1->l5_cid = l5_cid;
3595 csk1->ulp_type = ulp_type;
3596 csk1->context = context;
3598 csk1->ka_timeout = DEF_KA_TIMEOUT;
3599 csk1->ka_interval = DEF_KA_INTERVAL;
3600 csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
3601 csk1->tos = DEF_TOS;
3602 csk1->ttl = DEF_TTL;
3603 csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
3604 csk1->rcv_buf = DEF_RCV_BUF;
3605 csk1->snd_buf = DEF_SND_BUF;
3606 csk1->seed = DEF_SEED;
3607 csk1->tcp_flags = 0;
3613 static void cnic_cm_cleanup(struct cnic_sock *csk)
3615 if (csk->src_port) {
3616 struct cnic_dev *dev = csk->dev;
3617 struct cnic_local *cp = dev->cnic_priv;
3619 cnic_free_id(&cp->csk_port_tbl, be16_to_cpu(csk->src_port));
3624 static void cnic_close_conn(struct cnic_sock *csk)
3626 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
3627 cnic_cm_upload_pg(csk);
3628 clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3630 cnic_cm_cleanup(csk);
3633 static int cnic_cm_destroy(struct cnic_sock *csk)
3635 if (!cnic_in_use(csk))
3639 clear_bit(SK_F_INUSE, &csk->flags);
3640 smp_mb__after_clear_bit();
3641 while (atomic_read(&csk->ref_count) != 1)
3643 cnic_cm_cleanup(csk);
3650 static inline u16 cnic_get_vlan(struct net_device *dev,
3651 struct net_device **vlan_dev)
3653 if (dev->priv_flags & IFF_802_1Q_VLAN) {
3654 *vlan_dev = vlan_dev_real_dev(dev);
3655 return vlan_dev_vlan_id(dev);
3661 static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
3662 struct dst_entry **dst)
3664 #if defined(CONFIG_INET)
3667 rt = ip_route_output(&init_net, dst_addr->sin_addr.s_addr, 0, 0, 0);
3674 return -ENETUNREACH;
3678 static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
3679 struct dst_entry **dst)
3681 #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
3684 memset(&fl6, 0, sizeof(fl6));
3685 fl6.daddr = dst_addr->sin6_addr;
3686 if (ipv6_addr_type(&fl6.daddr) & IPV6_ADDR_LINKLOCAL)
3687 fl6.flowi6_oif = dst_addr->sin6_scope_id;
3689 *dst = ip6_route_output(&init_net, NULL, &fl6);
3690 if ((*dst)->error) {
3693 return -ENETUNREACH;
3698 return -ENETUNREACH;
3701 static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
3704 struct cnic_dev *dev = NULL;
3705 struct dst_entry *dst;
3706 struct net_device *netdev = NULL;
3707 int err = -ENETUNREACH;
3709 if (dst_addr->sin_family == AF_INET)
3710 err = cnic_get_v4_route(dst_addr, &dst);
3711 else if (dst_addr->sin_family == AF_INET6) {
3712 struct sockaddr_in6 *dst_addr6 =
3713 (struct sockaddr_in6 *) dst_addr;
3715 err = cnic_get_v6_route(dst_addr6, &dst);
3725 cnic_get_vlan(dst->dev, &netdev);
3727 dev = cnic_from_netdev(netdev);
3736 static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3738 struct cnic_dev *dev = csk->dev;
3739 struct cnic_local *cp = dev->cnic_priv;
3741 return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
3744 static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3746 struct cnic_dev *dev = csk->dev;
3747 struct cnic_local *cp = dev->cnic_priv;
3749 struct dst_entry *dst = NULL;
3750 struct net_device *realdev;
3754 if (saddr->local.v6.sin6_family == AF_INET6 &&
3755 saddr->remote.v6.sin6_family == AF_INET6)
3757 else if (saddr->local.v4.sin_family == AF_INET &&
3758 saddr->remote.v4.sin_family == AF_INET)
3763 clear_bit(SK_F_IPV6, &csk->flags);
3766 set_bit(SK_F_IPV6, &csk->flags);
3767 cnic_get_v6_route(&saddr->remote.v6, &dst);
3769 memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
3770 sizeof(struct in6_addr));
3771 csk->dst_port = saddr->remote.v6.sin6_port;
3772 local_port = saddr->local.v6.sin6_port;
3775 cnic_get_v4_route(&saddr->remote.v4, &dst);
3777 csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
3778 csk->dst_port = saddr->remote.v4.sin_port;
3779 local_port = saddr->local.v4.sin_port;
3783 csk->mtu = dev->netdev->mtu;
3784 if (dst && dst->dev) {
3785 u16 vlan = cnic_get_vlan(dst->dev, &realdev);
3786 if (realdev == dev->netdev) {
3787 csk->vlan_id = vlan;
3788 csk->mtu = dst_mtu(dst);
3792 port_id = be16_to_cpu(local_port);
3793 if (port_id >= CNIC_LOCAL_PORT_MIN &&
3794 port_id < CNIC_LOCAL_PORT_MAX) {
3795 if (cnic_alloc_id(&cp->csk_port_tbl, port_id))
3801 port_id = cnic_alloc_new_id(&cp->csk_port_tbl);
3802 if (port_id == -1) {
3806 local_port = cpu_to_be16(port_id);
3808 csk->src_port = local_port;
3815 static void cnic_init_csk_state(struct cnic_sock *csk)
3818 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3819 clear_bit(SK_F_CLOSING, &csk->flags);
3822 static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3824 struct cnic_local *cp = csk->dev->cnic_priv;
3827 if (cp->ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI)
3830 if (!cnic_in_use(csk))
3833 if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
3836 cnic_init_csk_state(csk);
3838 err = cnic_get_route(csk, saddr);
3842 err = cnic_resolve_addr(csk, saddr);
3847 clear_bit(SK_F_CONNECT_START, &csk->flags);
3851 static int cnic_cm_abort(struct cnic_sock *csk)
3853 struct cnic_local *cp = csk->dev->cnic_priv;
3854 u32 opcode = L4_KCQE_OPCODE_VALUE_RESET_COMP;
3856 if (!cnic_in_use(csk))
3859 if (cnic_abort_prep(csk))
3860 return cnic_cm_abort_req(csk);
3862 /* Getting here means that we haven't started connect, or
3863 * connect was not successful, or it has been reset by the target.
3866 cp->close_conn(csk, opcode);
3867 if (csk->state != opcode) {
3868 /* Wait for remote reset sequence to complete */
3869 while (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3878 static int cnic_cm_close(struct cnic_sock *csk)
3880 if (!cnic_in_use(csk))
3883 if (cnic_close_prep(csk)) {
3884 csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
3885 return cnic_cm_close_req(csk);
3887 /* Wait for remote reset sequence to complete */
3888 while (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3896 static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
3899 struct cnic_ulp_ops *ulp_ops;
3900 int ulp_type = csk->ulp_type;
3903 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
3905 if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
3906 ulp_ops->cm_connect_complete(csk);
3907 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
3908 ulp_ops->cm_close_complete(csk);
3909 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
3910 ulp_ops->cm_remote_abort(csk);
3911 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
3912 ulp_ops->cm_abort_complete(csk);
3913 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
3914 ulp_ops->cm_remote_close(csk);
3919 static int cnic_cm_set_pg(struct cnic_sock *csk)
3921 if (cnic_offld_prep(csk)) {
3922 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3923 cnic_cm_update_pg(csk);
3925 cnic_cm_offload_pg(csk);
3930 static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
3932 struct cnic_local *cp = dev->cnic_priv;
3933 u32 l5_cid = kcqe->pg_host_opaque;
3934 u8 opcode = kcqe->op_code;
3935 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
3938 if (!cnic_in_use(csk))
3941 if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3942 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3945 /* Possible PG kcqe status: SUCCESS, OFFLOADED_PG, or CTX_ALLOC_FAIL */
3946 if (kcqe->status == L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL) {
3947 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3948 cnic_cm_upcall(cp, csk,
3949 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3953 csk->pg_cid = kcqe->pg_cid;
3954 set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3955 cnic_cm_conn_req(csk);
3961 static void cnic_process_fcoe_term_conn(struct cnic_dev *dev, struct kcqe *kcqe)
3963 struct cnic_local *cp = dev->cnic_priv;
3964 struct fcoe_kcqe *fc_kcqe = (struct fcoe_kcqe *) kcqe;
3965 u32 l5_cid = fc_kcqe->fcoe_conn_id + BNX2X_FCOE_L5_CID_BASE;
3966 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3968 ctx->timestamp = jiffies;
3970 wake_up(&ctx->waitq);
3973 static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
3975 struct cnic_local *cp = dev->cnic_priv;
3976 struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
3977 u8 opcode = l4kcqe->op_code;
3979 struct cnic_sock *csk;
3981 if (opcode == FCOE_RAMROD_CMD_ID_TERMINATE_CONN) {
3982 cnic_process_fcoe_term_conn(dev, kcqe);
3985 if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
3986 opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3987 cnic_cm_process_offld_pg(dev, l4kcqe);
3991 l5_cid = l4kcqe->conn_id;
3993 l5_cid = l4kcqe->cid;
3994 if (l5_cid >= MAX_CM_SK_TBL_SZ)
3997 csk = &cp->csk_tbl[l5_cid];
4000 if (!cnic_in_use(csk)) {
4006 case L5CM_RAMROD_CMD_ID_TCP_CONNECT:
4007 if (l4kcqe->status != 0) {
4008 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
4009 cnic_cm_upcall(cp, csk,
4010 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
4013 case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
4014 if (l4kcqe->status == 0)
4015 set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
4016 else if (l4kcqe->status ==
4017 L4_KCQE_COMPLETION_STATUS_PARITY_ERROR)
4018 set_bit(SK_F_HW_ERR, &csk->flags);
4020 smp_mb__before_clear_bit();
4021 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
4022 cnic_cm_upcall(cp, csk, opcode);
4025 case L5CM_RAMROD_CMD_ID_CLOSE: {
4026 struct iscsi_kcqe *l5kcqe = (struct iscsi_kcqe *) kcqe;
4028 if (l4kcqe->status != 0 || l5kcqe->completion_status != 0) {
4029 netdev_warn(dev->netdev, "RAMROD CLOSE compl with status 0x%x completion status 0x%x\n",
4030 l4kcqe->status, l5kcqe->completion_status);
4031 opcode = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
4037 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
4038 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
4039 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
4040 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
4041 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
4042 if (l4kcqe->status == L4_KCQE_COMPLETION_STATUS_PARITY_ERROR)
4043 set_bit(SK_F_HW_ERR, &csk->flags);
4045 cp->close_conn(csk, opcode);
4048 case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
4049 /* after we already sent CLOSE_REQ */
4050 if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags) &&
4051 !test_bit(SK_F_OFFLD_COMPLETE, &csk->flags) &&
4052 csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
4053 cp->close_conn(csk, L4_KCQE_OPCODE_VALUE_RESET_COMP);
4055 cnic_cm_upcall(cp, csk, opcode);
4061 static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
4063 struct cnic_dev *dev = data;
4066 for (i = 0; i < num; i++)
4067 cnic_cm_process_kcqe(dev, kcqe[i]);
4070 static struct cnic_ulp_ops cm_ulp_ops = {
4071 .indicate_kcqes = cnic_cm_indicate_kcqe,
4074 static void cnic_cm_free_mem(struct cnic_dev *dev)
4076 struct cnic_local *cp = dev->cnic_priv;
4080 cnic_free_id_tbl(&cp->csk_port_tbl);
4083 static int cnic_cm_alloc_mem(struct cnic_dev *dev)
4085 struct cnic_local *cp = dev->cnic_priv;
4088 cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
4093 port_id = prandom_u32();
4094 port_id %= CNIC_LOCAL_PORT_RANGE;
4095 if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
4096 CNIC_LOCAL_PORT_MIN, port_id)) {
4097 cnic_cm_free_mem(dev);
4103 static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
4105 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
4106 /* Unsolicited RESET_COMP or RESET_RECEIVED */
4107 opcode = L4_KCQE_OPCODE_VALUE_RESET_RECEIVED;
4108 csk->state = opcode;
4111 /* 1. If event opcode matches the expected event in csk->state
4112 * 2. If the expected event is CLOSE_COMP or RESET_COMP, we accept any
4114 * 3. If the expected event is 0, meaning the connection was never
4115 * never established, we accept the opcode from cm_abort.
4117 if (opcode == csk->state || csk->state == 0 ||
4118 csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP ||
4119 csk->state == L4_KCQE_OPCODE_VALUE_RESET_COMP) {
4120 if (!test_and_set_bit(SK_F_CLOSING, &csk->flags)) {
4121 if (csk->state == 0)
4122 csk->state = opcode;
4129 static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
4131 struct cnic_dev *dev = csk->dev;
4132 struct cnic_local *cp = dev->cnic_priv;
4134 if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED) {
4135 cnic_cm_upcall(cp, csk, opcode);
4139 clear_bit(SK_F_CONNECT_START, &csk->flags);
4140 cnic_close_conn(csk);
4141 csk->state = opcode;
4142 cnic_cm_upcall(cp, csk, opcode);
4145 static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
4149 static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
4153 seed = prandom_u32();
4154 cnic_ctx_wr(dev, 45, 0, seed);
4158 static void cnic_close_bnx2x_conn(struct cnic_sock *csk, u32 opcode)
4160 struct cnic_dev *dev = csk->dev;
4161 struct cnic_local *cp = dev->cnic_priv;
4162 struct cnic_context *ctx = &cp->ctx_tbl[csk->l5_cid];
4163 union l5cm_specific_data l5_data;
4165 int close_complete = 0;
4168 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
4169 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
4170 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
4171 if (cnic_ready_to_close(csk, opcode)) {
4172 if (test_bit(SK_F_HW_ERR, &csk->flags))
4174 else if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
4175 cmd = L5CM_RAMROD_CMD_ID_SEARCHER_DELETE;
4180 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
4181 cmd = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
4183 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
4188 memset(&l5_data, 0, sizeof(l5_data));
4190 cnic_submit_kwqe_16(dev, cmd, csk->cid, ISCSI_CONNECTION_TYPE,
4192 } else if (close_complete) {
4193 ctx->timestamp = jiffies;
4194 cnic_close_conn(csk);
4195 cnic_cm_upcall(cp, csk, csk->state);
4199 static void cnic_cm_stop_bnx2x_hw(struct cnic_dev *dev)
4201 struct cnic_local *cp = dev->cnic_priv;
4206 if (!netif_running(dev->netdev))
4209 cnic_bnx2x_delete_wait(dev, 0);
4211 cancel_delayed_work(&cp->delete_task);
4212 flush_workqueue(cnic_wq);
4214 if (atomic_read(&cp->iscsi_conn) != 0)
4215 netdev_warn(dev->netdev, "%d iSCSI connections not destroyed\n",
4216 atomic_read(&cp->iscsi_conn));
4219 static int cnic_cm_init_bnx2x_hw(struct cnic_dev *dev)
4221 struct cnic_local *cp = dev->cnic_priv;
4222 struct bnx2x *bp = netdev_priv(dev->netdev);
4223 u32 pfid = cp->pfid;
4224 u32 port = CNIC_PORT(cp);
4226 cnic_init_bnx2x_mac(dev);
4227 cnic_bnx2x_set_tcp_options(dev, 0, 1);
4229 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
4230 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfid), 0);
4232 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
4233 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(port), 1);
4234 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
4235 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(port),
4238 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
4239 XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfid), DEF_TTL);
4240 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
4241 XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfid), DEF_TOS);
4242 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
4243 XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfid), 2);
4244 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
4245 XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfid), DEF_SWS_TIMER);
4247 CNIC_WR(dev, BAR_TSTRORM_INTMEM + TSTORM_TCP_MAX_CWND_OFFSET(pfid),
4252 static void cnic_delete_task(struct work_struct *work)
4254 struct cnic_local *cp;
4255 struct cnic_dev *dev;
4257 int need_resched = 0;
4259 cp = container_of(work, struct cnic_local, delete_task.work);
4262 if (test_and_clear_bit(CNIC_LCL_FL_STOP_ISCSI, &cp->cnic_local_flags)) {
4263 struct drv_ctl_info info;
4265 cnic_ulp_stop_one(cp, CNIC_ULP_ISCSI);
4267 info.cmd = DRV_CTL_ISCSI_STOPPED_CMD;
4268 cp->ethdev->drv_ctl(dev->netdev, &info);
4271 for (i = 0; i < cp->max_cid_space; i++) {
4272 struct cnic_context *ctx = &cp->ctx_tbl[i];
4275 if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags) ||
4276 !test_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
4279 if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) {
4284 if (!test_and_clear_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
4287 err = cnic_bnx2x_destroy_ramrod(dev, i);
4289 cnic_free_bnx2x_conn_resc(dev, i);
4291 if (ctx->ulp_proto_id == CNIC_ULP_ISCSI)
4292 atomic_dec(&cp->iscsi_conn);
4294 clear_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
4299 queue_delayed_work(cnic_wq, &cp->delete_task,
4300 msecs_to_jiffies(10));
4304 static int cnic_cm_open(struct cnic_dev *dev)
4306 struct cnic_local *cp = dev->cnic_priv;
4309 err = cnic_cm_alloc_mem(dev);
4313 err = cp->start_cm(dev);
4318 INIT_DELAYED_WORK(&cp->delete_task, cnic_delete_task);
4320 dev->cm_create = cnic_cm_create;
4321 dev->cm_destroy = cnic_cm_destroy;
4322 dev->cm_connect = cnic_cm_connect;
4323 dev->cm_abort = cnic_cm_abort;
4324 dev->cm_close = cnic_cm_close;
4325 dev->cm_select_dev = cnic_cm_select_dev;
4327 cp->ulp_handle[CNIC_ULP_L4] = dev;
4328 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
4332 cnic_cm_free_mem(dev);
4336 static int cnic_cm_shutdown(struct cnic_dev *dev)
4338 struct cnic_local *cp = dev->cnic_priv;
4344 for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
4345 struct cnic_sock *csk = &cp->csk_tbl[i];
4347 clear_bit(SK_F_INUSE, &csk->flags);
4348 cnic_cm_cleanup(csk);
4350 cnic_cm_free_mem(dev);
4355 static void cnic_init_context(struct cnic_dev *dev, u32 cid)
4360 cid_addr = GET_CID_ADDR(cid);
4362 for (i = 0; i < CTX_SIZE; i += 4)
4363 cnic_ctx_wr(dev, cid_addr, i, 0);
4366 static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
4368 struct cnic_local *cp = dev->cnic_priv;
4370 u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
4372 if (BNX2_CHIP(cp) != BNX2_CHIP_5709)
4375 for (i = 0; i < cp->ctx_blks; i++) {
4377 u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
4380 memset(cp->ctx_arr[i].ctx, 0, BNX2_PAGE_SIZE);
4382 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
4383 (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
4384 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
4385 (u64) cp->ctx_arr[i].mapping >> 32);
4386 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
4387 BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
4388 for (j = 0; j < 10; j++) {
4390 val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
4391 if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
4395 if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
4403 static void cnic_free_irq(struct cnic_dev *dev)
4405 struct cnic_local *cp = dev->cnic_priv;
4406 struct cnic_eth_dev *ethdev = cp->ethdev;
4408 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4409 cp->disable_int_sync(dev);
4410 tasklet_kill(&cp->cnic_irq_task);
4411 free_irq(ethdev->irq_arr[0].vector, dev);
4415 static int cnic_request_irq(struct cnic_dev *dev)
4417 struct cnic_local *cp = dev->cnic_priv;
4418 struct cnic_eth_dev *ethdev = cp->ethdev;
4421 err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0, "cnic", dev);
4423 tasklet_disable(&cp->cnic_irq_task);
4428 static int cnic_init_bnx2_irq(struct cnic_dev *dev)
4430 struct cnic_local *cp = dev->cnic_priv;
4431 struct cnic_eth_dev *ethdev = cp->ethdev;
4433 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4435 int sblk_num = cp->status_blk_num;
4436 u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
4437 BNX2_HC_SB_CONFIG_1;
4439 CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
4441 CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
4442 CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
4443 CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
4445 cp->last_status_idx = cp->status_blk.bnx2->status_idx;
4446 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2_msix,
4447 (unsigned long) dev);
4448 err = cnic_request_irq(dev);
4452 while (cp->status_blk.bnx2->status_completion_producer_index &&
4454 CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
4455 1 << (11 + sblk_num));
4460 if (cp->status_blk.bnx2->status_completion_producer_index) {
4466 struct status_block *sblk = cp->status_blk.gen;
4467 u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
4470 while (sblk->status_completion_producer_index && i < 10) {
4471 CNIC_WR(dev, BNX2_HC_COMMAND,
4472 hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
4477 if (sblk->status_completion_producer_index)
4484 netdev_err(dev->netdev, "KCQ index not resetting to 0\n");
4488 static void cnic_enable_bnx2_int(struct cnic_dev *dev)
4490 struct cnic_local *cp = dev->cnic_priv;
4491 struct cnic_eth_dev *ethdev = cp->ethdev;
4493 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
4496 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
4497 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
4500 static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
4502 struct cnic_local *cp = dev->cnic_priv;
4503 struct cnic_eth_dev *ethdev = cp->ethdev;
4505 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
4508 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
4509 BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
4510 CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
4511 synchronize_irq(ethdev->irq_arr[0].vector);
4514 static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
4516 struct cnic_local *cp = dev->cnic_priv;
4517 struct cnic_eth_dev *ethdev = cp->ethdev;
4518 struct cnic_uio_dev *udev = cp->udev;
4519 u32 cid_addr, tx_cid, sb_id;
4520 u32 val, offset0, offset1, offset2, offset3;
4522 struct bnx2_tx_bd *txbd;
4523 dma_addr_t buf_map, ring_map = udev->l2_ring_map;
4524 struct status_block *s_blk = cp->status_blk.gen;
4526 sb_id = cp->status_blk_num;
4528 cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
4529 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4530 struct status_block_msix *sblk = cp->status_blk.bnx2;
4532 tx_cid = TX_TSS_CID + sb_id - 1;
4533 CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
4535 cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
4537 cp->tx_cons = *cp->tx_cons_ptr;
4539 cid_addr = GET_CID_ADDR(tx_cid);
4540 if (BNX2_CHIP(cp) == BNX2_CHIP_5709) {
4541 u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
4543 for (i = 0; i < PHY_CTX_SIZE; i += 4)
4544 cnic_ctx_wr(dev, cid_addr2, i, 0);
4546 offset0 = BNX2_L2CTX_TYPE_XI;
4547 offset1 = BNX2_L2CTX_CMD_TYPE_XI;
4548 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
4549 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
4551 cnic_init_context(dev, tx_cid);
4552 cnic_init_context(dev, tx_cid + 1);
4554 offset0 = BNX2_L2CTX_TYPE;
4555 offset1 = BNX2_L2CTX_CMD_TYPE;
4556 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
4557 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
4559 val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
4560 cnic_ctx_wr(dev, cid_addr, offset0, val);
4562 val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
4563 cnic_ctx_wr(dev, cid_addr, offset1, val);
4565 txbd = udev->l2_ring;
4567 buf_map = udev->l2_buf_map;
4568 for (i = 0; i < BNX2_MAX_TX_DESC_CNT; i++, txbd++) {
4569 txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
4570 txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
4572 val = (u64) ring_map >> 32;
4573 cnic_ctx_wr(dev, cid_addr, offset2, val);
4574 txbd->tx_bd_haddr_hi = val;
4576 val = (u64) ring_map & 0xffffffff;
4577 cnic_ctx_wr(dev, cid_addr, offset3, val);
4578 txbd->tx_bd_haddr_lo = val;
4581 static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
4583 struct cnic_local *cp = dev->cnic_priv;
4584 struct cnic_eth_dev *ethdev = cp->ethdev;
4585 struct cnic_uio_dev *udev = cp->udev;
4586 u32 cid_addr, sb_id, val, coal_reg, coal_val;
4588 struct bnx2_rx_bd *rxbd;
4589 struct status_block *s_blk = cp->status_blk.gen;
4590 dma_addr_t ring_map = udev->l2_ring_map;
4592 sb_id = cp->status_blk_num;
4593 cnic_init_context(dev, 2);
4594 cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
4595 coal_reg = BNX2_HC_COMMAND;
4596 coal_val = CNIC_RD(dev, coal_reg);
4597 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4598 struct status_block_msix *sblk = cp->status_blk.bnx2;
4600 cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
4601 coal_reg = BNX2_HC_COALESCE_NOW;
4602 coal_val = 1 << (11 + sb_id);
4605 while (!(*cp->rx_cons_ptr != 0) && i < 10) {
4606 CNIC_WR(dev, coal_reg, coal_val);
4611 cp->rx_cons = *cp->rx_cons_ptr;
4613 cid_addr = GET_CID_ADDR(2);
4614 val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
4615 BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
4616 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
4619 val = 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT;
4621 val = BNX2_L2CTX_L2_STATUSB_NUM(sb_id);
4622 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
4624 rxbd = udev->l2_ring + BNX2_PAGE_SIZE;
4625 for (i = 0; i < BNX2_MAX_RX_DESC_CNT; i++, rxbd++) {
4627 int n = (i % cp->l2_rx_ring_size) + 1;
4629 buf_map = udev->l2_buf_map + (n * cp->l2_single_buf_size);
4630 rxbd->rx_bd_len = cp->l2_single_buf_size;
4631 rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
4632 rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
4633 rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
4635 val = (u64) (ring_map + BNX2_PAGE_SIZE) >> 32;
4636 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
4637 rxbd->rx_bd_haddr_hi = val;
4639 val = (u64) (ring_map + BNX2_PAGE_SIZE) & 0xffffffff;
4640 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
4641 rxbd->rx_bd_haddr_lo = val;
4643 val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
4644 cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
4647 static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
4649 struct kwqe *wqes[1], l2kwqe;
4651 memset(&l2kwqe, 0, sizeof(l2kwqe));
4653 l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_LAYER_SHIFT) |
4654 (L2_KWQE_OPCODE_VALUE_FLUSH <<
4655 KWQE_OPCODE_SHIFT) | 2;
4656 dev->submit_kwqes(dev, wqes, 1);
4659 static void cnic_set_bnx2_mac(struct cnic_dev *dev)
4661 struct cnic_local *cp = dev->cnic_priv;
4664 val = cp->func << 2;
4666 cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
4668 val = cnic_reg_rd_ind(dev, cp->shmem_base +
4669 BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
4670 dev->mac_addr[0] = (u8) (val >> 8);
4671 dev->mac_addr[1] = (u8) val;
4673 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
4675 val = cnic_reg_rd_ind(dev, cp->shmem_base +
4676 BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
4677 dev->mac_addr[2] = (u8) (val >> 24);
4678 dev->mac_addr[3] = (u8) (val >> 16);
4679 dev->mac_addr[4] = (u8) (val >> 8);
4680 dev->mac_addr[5] = (u8) val;
4682 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
4684 val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
4685 if (BNX2_CHIP(cp) != BNX2_CHIP_5709)
4686 val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
4688 CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
4689 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
4690 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
4693 static int cnic_start_bnx2_hw(struct cnic_dev *dev)
4695 struct cnic_local *cp = dev->cnic_priv;
4696 struct cnic_eth_dev *ethdev = cp->ethdev;
4697 struct status_block *sblk = cp->status_blk.gen;
4698 u32 val, kcq_cid_addr, kwq_cid_addr;
4701 cnic_set_bnx2_mac(dev);
4703 val = CNIC_RD(dev, BNX2_MQ_CONFIG);
4704 val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
4705 if (BNX2_PAGE_BITS > 12)
4706 val |= (12 - 8) << 4;
4708 val |= (BNX2_PAGE_BITS - 8) << 4;
4710 CNIC_WR(dev, BNX2_MQ_CONFIG, val);
4712 CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
4713 CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
4714 CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
4716 err = cnic_setup_5709_context(dev, 1);
4720 cnic_init_context(dev, KWQ_CID);
4721 cnic_init_context(dev, KCQ_CID);
4723 kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
4724 cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
4726 cp->max_kwq_idx = MAX_KWQ_IDX;
4727 cp->kwq_prod_idx = 0;
4728 cp->kwq_con_idx = 0;
4729 set_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
4731 if (BNX2_CHIP(cp) == BNX2_CHIP_5706 || BNX2_CHIP(cp) == BNX2_CHIP_5708)
4732 cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
4734 cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
4736 /* Initialize the kernel work queue context. */
4737 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
4738 (BNX2_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
4739 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_TYPE, val);
4741 val = (BNX2_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
4742 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
4744 val = ((BNX2_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
4745 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
4747 val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
4748 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
4750 val = (u32) cp->kwq_info.pgtbl_map;
4751 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
4753 kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
4754 cp->kcq1.io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
4756 cp->kcq1.sw_prod_idx = 0;
4757 cp->kcq1.hw_prod_idx_ptr =
4758 &sblk->status_completion_producer_index;
4760 cp->kcq1.status_idx_ptr = &sblk->status_idx;
4762 /* Initialize the kernel complete queue context. */
4763 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
4764 (BNX2_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
4765 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_TYPE, val);
4767 val = (BNX2_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
4768 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
4770 val = ((BNX2_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
4771 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
4773 val = (u32) ((u64) cp->kcq1.dma.pgtbl_map >> 32);
4774 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
4776 val = (u32) cp->kcq1.dma.pgtbl_map;
4777 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
4780 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4781 struct status_block_msix *msblk = cp->status_blk.bnx2;
4782 u32 sb_id = cp->status_blk_num;
4783 u32 sb = BNX2_L2CTX_L5_STATUSB_NUM(sb_id);
4785 cp->kcq1.hw_prod_idx_ptr =
4786 &msblk->status_completion_producer_index;
4787 cp->kcq1.status_idx_ptr = &msblk->status_idx;
4788 cp->kwq_con_idx_ptr = &msblk->status_cmd_consumer_index;
4789 cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
4790 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
4791 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
4794 /* Enable Commnad Scheduler notification when we write to the
4795 * host producer index of the kernel contexts. */
4796 CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
4798 /* Enable Command Scheduler notification when we write to either
4799 * the Send Queue or Receive Queue producer indexes of the kernel
4800 * bypass contexts. */
4801 CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
4802 CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
4804 /* Notify COM when the driver post an application buffer. */
4805 CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
4807 /* Set the CP and COM doorbells. These two processors polls the
4808 * doorbell for a non zero value before running. This must be done
4809 * after setting up the kernel queue contexts. */
4810 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
4811 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
4813 cnic_init_bnx2_tx_ring(dev);
4814 cnic_init_bnx2_rx_ring(dev);
4816 err = cnic_init_bnx2_irq(dev);
4818 netdev_err(dev->netdev, "cnic_init_irq failed\n");
4819 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
4820 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
4824 ethdev->drv_state |= CNIC_DRV_STATE_HANDLES_IRQ;
4829 static void cnic_setup_bnx2x_context(struct cnic_dev *dev)
4831 struct cnic_local *cp = dev->cnic_priv;
4832 struct cnic_eth_dev *ethdev = cp->ethdev;
4833 u32 start_offset = ethdev->ctx_tbl_offset;
4836 for (i = 0; i < cp->ctx_blks; i++) {
4837 struct cnic_ctx *ctx = &cp->ctx_arr[i];
4838 dma_addr_t map = ctx->mapping;
4840 if (cp->ctx_align) {
4841 unsigned long mask = cp->ctx_align - 1;
4843 map = (map + mask) & ~mask;
4846 cnic_ctx_tbl_wr(dev, start_offset + i, map);
4850 static int cnic_init_bnx2x_irq(struct cnic_dev *dev)
4852 struct cnic_local *cp = dev->cnic_priv;
4853 struct cnic_eth_dev *ethdev = cp->ethdev;
4856 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2x_bh,
4857 (unsigned long) dev);
4858 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
4859 err = cnic_request_irq(dev);
4864 static inline void cnic_storm_memset_hc_disable(struct cnic_dev *dev,
4865 u16 sb_id, u8 sb_index,
4868 struct bnx2x *bp = netdev_priv(dev->netdev);
4870 u32 addr = BAR_CSTRORM_INTMEM +
4871 CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) +
4872 offsetof(struct hc_status_block_data_e1x, index_data) +
4873 sizeof(struct hc_index_data)*sb_index +
4874 offsetof(struct hc_index_data, flags);
4875 u16 flags = CNIC_RD16(dev, addr);
4877 flags &= ~HC_INDEX_DATA_HC_ENABLED;
4878 flags |= (((~disable) << HC_INDEX_DATA_HC_ENABLED_SHIFT) &
4879 HC_INDEX_DATA_HC_ENABLED);
4880 CNIC_WR16(dev, addr, flags);
4883 static void cnic_enable_bnx2x_int(struct cnic_dev *dev)
4885 struct cnic_local *cp = dev->cnic_priv;
4886 struct bnx2x *bp = netdev_priv(dev->netdev);
4887 u8 sb_id = cp->status_blk_num;
4889 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4890 CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) +
4891 offsetof(struct hc_status_block_data_e1x, index_data) +
4892 sizeof(struct hc_index_data)*HC_INDEX_ISCSI_EQ_CONS +
4893 offsetof(struct hc_index_data, timeout), 64 / 4);
4894 cnic_storm_memset_hc_disable(dev, sb_id, HC_INDEX_ISCSI_EQ_CONS, 0);
4897 static void cnic_disable_bnx2x_int_sync(struct cnic_dev *dev)
4901 static void cnic_init_bnx2x_tx_ring(struct cnic_dev *dev,
4902 struct client_init_ramrod_data *data)
4904 struct cnic_local *cp = dev->cnic_priv;
4905 struct cnic_uio_dev *udev = cp->udev;
4906 union eth_tx_bd_types *txbd = (union eth_tx_bd_types *) udev->l2_ring;
4907 dma_addr_t buf_map, ring_map = udev->l2_ring_map;
4908 struct host_sp_status_block *sb = cp->bnx2x_def_status_blk;
4910 u32 cli = cp->ethdev->iscsi_l2_client_id;
4913 memset(txbd, 0, BNX2_PAGE_SIZE);
4915 buf_map = udev->l2_buf_map;
4916 for (i = 0; i < BNX2_MAX_TX_DESC_CNT; i += 3, txbd += 3) {
4917 struct eth_tx_start_bd *start_bd = &txbd->start_bd;
4918 struct eth_tx_parse_bd_e1x *pbd_e1x =
4919 &((txbd + 1)->parse_bd_e1x);
4920 struct eth_tx_parse_bd_e2 *pbd_e2 = &((txbd + 1)->parse_bd_e2);
4921 struct eth_tx_bd *reg_bd = &((txbd + 2)->reg_bd);
4923 start_bd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
4924 start_bd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
4925 reg_bd->addr_hi = start_bd->addr_hi;
4926 reg_bd->addr_lo = start_bd->addr_lo + 0x10;
4927 start_bd->nbytes = cpu_to_le16(0x10);
4928 start_bd->nbd = cpu_to_le16(3);
4929 start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
4930 start_bd->general_data &= ~ETH_TX_START_BD_PARSE_NBDS;
4931 start_bd->general_data |= (1 << ETH_TX_START_BD_HDR_NBDS_SHIFT);
4933 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id))
4934 pbd_e2->parsing_data = (UNICAST_ADDRESS <<
4935 ETH_TX_PARSE_BD_E2_ETH_ADDR_TYPE_SHIFT);
4937 pbd_e1x->global_data = (UNICAST_ADDRESS <<
4938 ETH_TX_PARSE_BD_E1X_ETH_ADDR_TYPE_SHIFT);
4941 val = (u64) ring_map >> 32;
4942 txbd->next_bd.addr_hi = cpu_to_le32(val);
4944 data->tx.tx_bd_page_base.hi = cpu_to_le32(val);
4946 val = (u64) ring_map & 0xffffffff;
4947 txbd->next_bd.addr_lo = cpu_to_le32(val);
4949 data->tx.tx_bd_page_base.lo = cpu_to_le32(val);
4951 /* Other ramrod params */
4952 data->tx.tx_sb_index_number = HC_SP_INDEX_ETH_ISCSI_CQ_CONS;
4953 data->tx.tx_status_block_id = BNX2X_DEF_SB_ID;
4955 /* reset xstorm per client statistics */
4956 if (cli < MAX_STAT_COUNTER_ID) {
4957 data->general.statistics_zero_flg = 1;
4958 data->general.statistics_en_flg = 1;
4959 data->general.statistics_counter_id = cli;
4963 &sb->sp_sb.index_values[HC_SP_INDEX_ETH_ISCSI_CQ_CONS];
4966 static void cnic_init_bnx2x_rx_ring(struct cnic_dev *dev,
4967 struct client_init_ramrod_data *data)
4969 struct cnic_local *cp = dev->cnic_priv;
4970 struct cnic_uio_dev *udev = cp->udev;
4971 struct eth_rx_bd *rxbd = (struct eth_rx_bd *) (udev->l2_ring +
4973 struct eth_rx_cqe_next_page *rxcqe = (struct eth_rx_cqe_next_page *)
4974 (udev->l2_ring + (2 * BNX2_PAGE_SIZE));
4975 struct host_sp_status_block *sb = cp->bnx2x_def_status_blk;
4977 u32 cli = cp->ethdev->iscsi_l2_client_id;
4978 int cl_qzone_id = BNX2X_CL_QZONE_ID(cp, cli);
4980 dma_addr_t ring_map = udev->l2_ring_map;
4983 data->general.client_id = cli;
4984 data->general.activate_flg = 1;
4985 data->general.sp_client_id = cli;
4986 data->general.mtu = cpu_to_le16(cp->l2_single_buf_size - 14);
4987 data->general.func_id = cp->pfid;
4989 for (i = 0; i < BNX2X_MAX_RX_DESC_CNT; i++, rxbd++) {
4991 int n = (i % cp->l2_rx_ring_size) + 1;
4993 buf_map = udev->l2_buf_map + (n * cp->l2_single_buf_size);
4994 rxbd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
4995 rxbd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
4998 val = (u64) (ring_map + BNX2_PAGE_SIZE) >> 32;
4999 rxbd->addr_hi = cpu_to_le32(val);
5000 data->rx.bd_page_base.hi = cpu_to_le32(val);
5002 val = (u64) (ring_map + BNX2_PAGE_SIZE) & 0xffffffff;
5003 rxbd->addr_lo = cpu_to_le32(val);
5004 data->rx.bd_page_base.lo = cpu_to_le32(val);
5006 rxcqe += BNX2X_MAX_RCQ_DESC_CNT;
5007 val = (u64) (ring_map + (2 * BNX2_PAGE_SIZE)) >> 32;
5008 rxcqe->addr_hi = cpu_to_le32(val);
5009 data->rx.cqe_page_base.hi = cpu_to_le32(val);
5011 val = (u64) (ring_map + (2 * BNX2_PAGE_SIZE)) & 0xffffffff;
5012 rxcqe->addr_lo = cpu_to_le32(val);
5013 data->rx.cqe_page_base.lo = cpu_to_le32(val);
5015 /* Other ramrod params */
5016 data->rx.client_qzone_id = cl_qzone_id;
5017 data->rx.rx_sb_index_number = HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS;
5018 data->rx.status_block_id = BNX2X_DEF_SB_ID;
5020 data->rx.cache_line_alignment_log_size = L1_CACHE_SHIFT;
5022 data->rx.max_bytes_on_bd = cpu_to_le16(cp->l2_single_buf_size);
5023 data->rx.outer_vlan_removal_enable_flg = 1;
5024 data->rx.silent_vlan_removal_flg = 1;
5025 data->rx.silent_vlan_value = 0;
5026 data->rx.silent_vlan_mask = 0xffff;
5029 &sb->sp_sb.index_values[HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS];
5030 cp->rx_cons = *cp->rx_cons_ptr;
5033 static void cnic_init_bnx2x_kcq(struct cnic_dev *dev)
5035 struct cnic_local *cp = dev->cnic_priv;
5036 struct bnx2x *bp = netdev_priv(dev->netdev);
5037 u32 pfid = cp->pfid;
5039 cp->kcq1.io_addr = BAR_CSTRORM_INTMEM +
5040 CSTORM_ISCSI_EQ_PROD_OFFSET(pfid, 0);
5041 cp->kcq1.sw_prod_idx = 0;
5043 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
5044 struct host_hc_status_block_e2 *sb = cp->status_blk.gen;
5046 cp->kcq1.hw_prod_idx_ptr =
5047 &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
5048 cp->kcq1.status_idx_ptr =
5049 &sb->sb.running_index[SM_RX_ID];
5051 struct host_hc_status_block_e1x *sb = cp->status_blk.gen;
5053 cp->kcq1.hw_prod_idx_ptr =
5054 &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
5055 cp->kcq1.status_idx_ptr =
5056 &sb->sb.running_index[SM_RX_ID];
5059 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
5060 struct host_hc_status_block_e2 *sb = cp->status_blk.gen;
5062 cp->kcq2.io_addr = BAR_USTRORM_INTMEM +
5063 USTORM_FCOE_EQ_PROD_OFFSET(pfid);
5064 cp->kcq2.sw_prod_idx = 0;
5065 cp->kcq2.hw_prod_idx_ptr =
5066 &sb->sb.index_values[HC_INDEX_FCOE_EQ_CONS];
5067 cp->kcq2.status_idx_ptr =
5068 &sb->sb.running_index[SM_RX_ID];
5072 static int cnic_start_bnx2x_hw(struct cnic_dev *dev)
5074 struct cnic_local *cp = dev->cnic_priv;
5075 struct bnx2x *bp = netdev_priv(dev->netdev);
5076 struct cnic_eth_dev *ethdev = cp->ethdev;
5080 dev->stats_addr = ethdev->addr_drv_info_to_mcp;
5081 cp->port_mode = bp->common.chip_port_mode;
5082 cp->pfid = bp->pfid;
5083 cp->func = bp->pf_num;
5085 func = CNIC_FUNC(cp);
5088 ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ,
5089 cp->iscsi_start_cid, 0);
5094 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
5095 ret = cnic_init_id_tbl(&cp->fcoe_cid_tbl, dev->max_fcoe_conn,
5096 cp->fcoe_start_cid, 0);
5102 cp->bnx2x_igu_sb_id = ethdev->irq_arr[0].status_blk_num2;
5104 cnic_init_bnx2x_kcq(dev);
5107 CNIC_WR16(dev, cp->kcq1.io_addr, MAX_KCQ_IDX);
5108 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5109 CSTORM_ISCSI_EQ_CONS_OFFSET(pfid, 0), 0);
5110 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5111 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0),
5112 cp->kcq1.dma.pg_map_arr[1] & 0xffffffff);
5113 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5114 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0) + 4,
5115 (u64) cp->kcq1.dma.pg_map_arr[1] >> 32);
5116 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5117 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0),
5118 cp->kcq1.dma.pg_map_arr[0] & 0xffffffff);
5119 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5120 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0) + 4,
5121 (u64) cp->kcq1.dma.pg_map_arr[0] >> 32);
5122 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
5123 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfid, 0), 1);
5124 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
5125 CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfid, 0), cp->status_blk_num);
5126 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
5127 CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfid, 0),
5128 HC_INDEX_ISCSI_EQ_CONS);
5130 CNIC_WR(dev, BAR_USTRORM_INTMEM +
5131 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid),
5132 cp->gbl_buf_info.pg_map_arr[0] & 0xffffffff);
5133 CNIC_WR(dev, BAR_USTRORM_INTMEM +
5134 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid) + 4,
5135 (u64) cp->gbl_buf_info.pg_map_arr[0] >> 32);
5137 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
5138 TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfid), DEF_RCV_BUF);
5140 cnic_setup_bnx2x_context(dev);
5142 ret = cnic_init_bnx2x_irq(dev);
5146 ethdev->drv_state |= CNIC_DRV_STATE_HANDLES_IRQ;
5150 static void cnic_init_rings(struct cnic_dev *dev)
5152 struct cnic_local *cp = dev->cnic_priv;
5153 struct bnx2x *bp = netdev_priv(dev->netdev);
5154 struct cnic_uio_dev *udev = cp->udev;
5156 if (test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
5159 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
5160 cnic_init_bnx2_tx_ring(dev);
5161 cnic_init_bnx2_rx_ring(dev);
5162 set_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5163 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
5164 u32 cli = cp->ethdev->iscsi_l2_client_id;
5165 u32 cid = cp->ethdev->iscsi_l2_cid;
5167 struct client_init_ramrod_data *data;
5168 union l5cm_specific_data l5_data;
5169 struct ustorm_eth_rx_producers rx_prods = {0};
5170 u32 off, i, *cid_ptr;
5172 rx_prods.bd_prod = 0;
5173 rx_prods.cqe_prod = BNX2X_MAX_RCQ_DESC_CNT;
5176 cl_qzone_id = BNX2X_CL_QZONE_ID(cp, cli);
5178 off = BAR_USTRORM_INTMEM +
5179 (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id) ?
5180 USTORM_RX_PRODS_E2_OFFSET(cl_qzone_id) :
5181 USTORM_RX_PRODS_E1X_OFFSET(CNIC_PORT(cp), cli));
5183 for (i = 0; i < sizeof(struct ustorm_eth_rx_producers) / 4; i++)
5184 CNIC_WR(dev, off + i * 4, ((u32 *) &rx_prods)[i]);
5186 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
5188 data = udev->l2_buf;
5189 cid_ptr = udev->l2_buf + 12;
5191 memset(data, 0, sizeof(*data));
5193 cnic_init_bnx2x_tx_ring(dev, data);
5194 cnic_init_bnx2x_rx_ring(dev, data);
5196 l5_data.phy_address.lo = udev->l2_buf_map & 0xffffffff;
5197 l5_data.phy_address.hi = (u64) udev->l2_buf_map >> 32;
5199 set_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5201 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CLIENT_SETUP,
5202 cid, ETH_CONNECTION_TYPE, &l5_data);
5205 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
5209 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
5210 netdev_err(dev->netdev,
5211 "iSCSI CLIENT_SETUP did not complete\n");
5212 cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
5213 cnic_ring_ctl(dev, cid, cli, 1);
5218 static void cnic_shutdown_rings(struct cnic_dev *dev)
5220 struct cnic_local *cp = dev->cnic_priv;
5221 struct cnic_uio_dev *udev = cp->udev;
5224 if (!test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
5227 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
5228 cnic_shutdown_bnx2_rx_ring(dev);
5229 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
5230 u32 cli = cp->ethdev->iscsi_l2_client_id;
5231 u32 cid = cp->ethdev->iscsi_l2_cid;
5232 union l5cm_specific_data l5_data;
5235 cnic_ring_ctl(dev, cid, cli, 0);
5237 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
5239 l5_data.phy_address.lo = cli;
5240 l5_data.phy_address.hi = 0;
5241 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_HALT,
5242 cid, ETH_CONNECTION_TYPE, &l5_data);
5244 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
5248 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
5249 netdev_err(dev->netdev,
5250 "iSCSI CLIENT_HALT did not complete\n");
5251 cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
5253 memset(&l5_data, 0, sizeof(l5_data));
5254 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL,
5255 cid, NONE_CONNECTION_TYPE, &l5_data);
5258 clear_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5259 rx_ring = udev->l2_ring + BNX2_PAGE_SIZE;
5260 memset(rx_ring, 0, BNX2_PAGE_SIZE);
5263 static int cnic_register_netdev(struct cnic_dev *dev)
5265 struct cnic_local *cp = dev->cnic_priv;
5266 struct cnic_eth_dev *ethdev = cp->ethdev;
5272 if (ethdev->drv_state & CNIC_DRV_STATE_REGD)
5275 err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
5277 netdev_err(dev->netdev, "register_cnic failed\n");
5279 /* Read iSCSI config again. On some bnx2x device, iSCSI config
5280 * can change after firmware is downloaded.
5282 dev->max_iscsi_conn = ethdev->max_iscsi_conn;
5283 if (ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI)
5284 dev->max_iscsi_conn = 0;
5289 static void cnic_unregister_netdev(struct cnic_dev *dev)
5291 struct cnic_local *cp = dev->cnic_priv;
5292 struct cnic_eth_dev *ethdev = cp->ethdev;
5297 ethdev->drv_unregister_cnic(dev->netdev);
5300 static int cnic_start_hw(struct cnic_dev *dev)
5302 struct cnic_local *cp = dev->cnic_priv;
5303 struct cnic_eth_dev *ethdev = cp->ethdev;
5306 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
5309 dev->regview = ethdev->io_base;
5310 pci_dev_get(dev->pcidev);
5311 cp->func = PCI_FUNC(dev->pcidev->devfn);
5312 cp->status_blk.gen = ethdev->irq_arr[0].status_blk;
5313 cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
5315 err = cp->alloc_resc(dev);
5317 netdev_err(dev->netdev, "allocate resource failure\n");
5321 err = cp->start_hw(dev);
5325 err = cnic_cm_open(dev);
5329 set_bit(CNIC_F_CNIC_UP, &dev->flags);
5331 cp->enable_int(dev);
5337 pci_dev_put(dev->pcidev);
5341 static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
5343 cnic_disable_bnx2_int_sync(dev);
5345 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
5346 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
5348 cnic_init_context(dev, KWQ_CID);
5349 cnic_init_context(dev, KCQ_CID);
5351 cnic_setup_5709_context(dev, 0);
5354 cnic_free_resc(dev);
5358 static void cnic_stop_bnx2x_hw(struct cnic_dev *dev)
5360 struct cnic_local *cp = dev->cnic_priv;
5361 struct bnx2x *bp = netdev_priv(dev->netdev);
5362 u32 hc_index = HC_INDEX_ISCSI_EQ_CONS;
5363 u32 sb_id = cp->status_blk_num;
5364 u32 idx_off, syn_off;
5368 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
5369 idx_off = offsetof(struct hc_status_block_e2, index_values) +
5370 (hc_index * sizeof(u16));
5372 syn_off = CSTORM_HC_SYNC_LINE_INDEX_E2_OFFSET(hc_index, sb_id);
5374 idx_off = offsetof(struct hc_status_block_e1x, index_values) +
5375 (hc_index * sizeof(u16));
5377 syn_off = CSTORM_HC_SYNC_LINE_INDEX_E1X_OFFSET(hc_index, sb_id);
5379 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + syn_off, 0);
5380 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_STATUS_BLOCK_OFFSET(sb_id) +
5383 *cp->kcq1.hw_prod_idx_ptr = 0;
5384 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5385 CSTORM_ISCSI_EQ_CONS_OFFSET(cp->pfid, 0), 0);
5386 CNIC_WR16(dev, cp->kcq1.io_addr, 0);
5387 cnic_free_resc(dev);
5390 static void cnic_stop_hw(struct cnic_dev *dev)
5392 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
5393 struct cnic_local *cp = dev->cnic_priv;
5396 /* Need to wait for the ring shutdown event to complete
5397 * before clearing the CNIC_UP flag.
5399 while (cp->udev && cp->udev->uio_dev != -1 && i < 15) {
5403 cnic_shutdown_rings(dev);
5405 cp->ethdev->drv_state &= ~CNIC_DRV_STATE_HANDLES_IRQ;
5406 clear_bit(CNIC_F_CNIC_UP, &dev->flags);
5407 RCU_INIT_POINTER(cp->ulp_ops[CNIC_ULP_L4], NULL);
5409 cnic_cm_shutdown(dev);
5411 pci_dev_put(dev->pcidev);
5415 static void cnic_free_dev(struct cnic_dev *dev)
5419 while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
5423 if (atomic_read(&dev->ref_count) != 0)
5424 netdev_err(dev->netdev, "Failed waiting for ref count to go to zero\n");
5426 netdev_info(dev->netdev, "Removed CNIC device\n");
5427 dev_put(dev->netdev);
5431 static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
5432 struct pci_dev *pdev)
5434 struct cnic_dev *cdev;
5435 struct cnic_local *cp;
5438 alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
5440 cdev = kzalloc(alloc_size, GFP_KERNEL);
5445 cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
5446 cdev->register_device = cnic_register_device;
5447 cdev->unregister_device = cnic_unregister_device;
5448 cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
5450 cp = cdev->cnic_priv;
5452 cp->l2_single_buf_size = 0x400;
5453 cp->l2_rx_ring_size = 3;
5455 spin_lock_init(&cp->cnic_ulp_lock);
5457 netdev_info(dev, "Added CNIC device\n");
5462 static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
5464 struct pci_dev *pdev;
5465 struct cnic_dev *cdev;
5466 struct cnic_local *cp;
5467 struct bnx2 *bp = netdev_priv(dev);
5468 struct cnic_eth_dev *ethdev = NULL;
5471 ethdev = (bp->cnic_probe)(dev);
5476 pdev = ethdev->pdev;
5482 if ((pdev->device == PCI_DEVICE_ID_NX2_5709 ||
5483 pdev->device == PCI_DEVICE_ID_NX2_5709S) &&
5484 (pdev->revision < 0x10)) {
5490 cdev = cnic_alloc_dev(dev, pdev);
5494 set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
5495 cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
5497 cp = cdev->cnic_priv;
5498 cp->ethdev = ethdev;
5499 cdev->pcidev = pdev;
5500 cp->chip_id = ethdev->chip_id;
5502 cdev->max_iscsi_conn = ethdev->max_iscsi_conn;
5504 cp->cnic_ops = &cnic_bnx2_ops;
5505 cp->start_hw = cnic_start_bnx2_hw;
5506 cp->stop_hw = cnic_stop_bnx2_hw;
5507 cp->setup_pgtbl = cnic_setup_page_tbl;
5508 cp->alloc_resc = cnic_alloc_bnx2_resc;
5509 cp->free_resc = cnic_free_resc;
5510 cp->start_cm = cnic_cm_init_bnx2_hw;
5511 cp->stop_cm = cnic_cm_stop_bnx2_hw;
5512 cp->enable_int = cnic_enable_bnx2_int;
5513 cp->disable_int_sync = cnic_disable_bnx2_int_sync;
5514 cp->close_conn = cnic_close_bnx2_conn;
5522 static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev)
5524 struct pci_dev *pdev;
5525 struct cnic_dev *cdev;
5526 struct cnic_local *cp;
5527 struct bnx2x *bp = netdev_priv(dev);
5528 struct cnic_eth_dev *ethdev = NULL;
5531 ethdev = bp->cnic_probe(dev);
5536 pdev = ethdev->pdev;
5541 cdev = cnic_alloc_dev(dev, pdev);
5547 set_bit(CNIC_F_BNX2X_CLASS, &cdev->flags);
5548 cdev->submit_kwqes = cnic_submit_bnx2x_kwqes;
5550 cp = cdev->cnic_priv;
5551 cp->ethdev = ethdev;
5552 cdev->pcidev = pdev;
5553 cp->chip_id = ethdev->chip_id;
5555 cdev->stats_addr = ethdev->addr_drv_info_to_mcp;
5557 if (!(ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI))
5558 cdev->max_iscsi_conn = ethdev->max_iscsi_conn;
5559 if (CNIC_SUPPORTS_FCOE(cp)) {
5560 cdev->max_fcoe_conn = ethdev->max_fcoe_conn;
5561 cdev->max_fcoe_exchanges = ethdev->max_fcoe_exchanges;
5564 if (cdev->max_fcoe_conn > BNX2X_FCOE_NUM_CONNECTIONS)
5565 cdev->max_fcoe_conn = BNX2X_FCOE_NUM_CONNECTIONS;
5567 memcpy(cdev->mac_addr, ethdev->iscsi_mac, 6);
5569 cp->cnic_ops = &cnic_bnx2x_ops;
5570 cp->start_hw = cnic_start_bnx2x_hw;
5571 cp->stop_hw = cnic_stop_bnx2x_hw;
5572 cp->setup_pgtbl = cnic_setup_page_tbl_le;
5573 cp->alloc_resc = cnic_alloc_bnx2x_resc;
5574 cp->free_resc = cnic_free_resc;
5575 cp->start_cm = cnic_cm_init_bnx2x_hw;
5576 cp->stop_cm = cnic_cm_stop_bnx2x_hw;
5577 cp->enable_int = cnic_enable_bnx2x_int;
5578 cp->disable_int_sync = cnic_disable_bnx2x_int_sync;
5579 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
5580 cp->ack_int = cnic_ack_bnx2x_e2_msix;
5581 cp->arm_int = cnic_arm_bnx2x_e2_msix;
5583 cp->ack_int = cnic_ack_bnx2x_msix;
5584 cp->arm_int = cnic_arm_bnx2x_msix;
5586 cp->close_conn = cnic_close_bnx2x_conn;
5590 static struct cnic_dev *is_cnic_dev(struct net_device *dev)
5592 struct ethtool_drvinfo drvinfo;
5593 struct cnic_dev *cdev = NULL;
5595 if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
5596 memset(&drvinfo, 0, sizeof(drvinfo));
5597 dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
5599 if (!strcmp(drvinfo.driver, "bnx2"))
5600 cdev = init_bnx2_cnic(dev);
5601 if (!strcmp(drvinfo.driver, "bnx2x"))
5602 cdev = init_bnx2x_cnic(dev);
5604 write_lock(&cnic_dev_lock);
5605 list_add(&cdev->list, &cnic_dev_list);
5606 write_unlock(&cnic_dev_lock);
5612 static void cnic_rcv_netevent(struct cnic_local *cp, unsigned long event,
5618 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
5619 struct cnic_ulp_ops *ulp_ops;
5622 ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
5623 if (!ulp_ops || !ulp_ops->indicate_netevent)
5626 ctx = cp->ulp_handle[if_type];
5628 ulp_ops->indicate_netevent(ctx, event, vlan_id);
5633 /* netdev event handler */
5634 static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
5637 struct net_device *netdev = netdev_notifier_info_to_dev(ptr);
5638 struct cnic_dev *dev;
5641 dev = cnic_from_netdev(netdev);
5643 if (!dev && event == NETDEV_REGISTER) {
5644 /* Check for the hot-plug device */
5645 dev = is_cnic_dev(netdev);
5652 struct cnic_local *cp = dev->cnic_priv;
5656 else if (event == NETDEV_UNREGISTER)
5659 if (event == NETDEV_UP) {
5660 if (cnic_register_netdev(dev) != 0) {
5664 if (!cnic_start_hw(dev))
5665 cnic_ulp_start(dev);
5668 cnic_rcv_netevent(cp, event, 0);
5670 if (event == NETDEV_GOING_DOWN) {
5673 cnic_unregister_netdev(dev);
5674 } else if (event == NETDEV_UNREGISTER) {
5675 write_lock(&cnic_dev_lock);
5676 list_del_init(&dev->list);
5677 write_unlock(&cnic_dev_lock);
5685 struct net_device *realdev;
5688 vid = cnic_get_vlan(netdev, &realdev);
5690 dev = cnic_from_netdev(realdev);
5692 vid |= VLAN_TAG_PRESENT;
5693 cnic_rcv_netevent(dev->cnic_priv, event, vid);
5702 static struct notifier_block cnic_netdev_notifier = {
5703 .notifier_call = cnic_netdev_event
5706 static void cnic_release(void)
5708 struct cnic_uio_dev *udev;
5710 while (!list_empty(&cnic_udev_list)) {
5711 udev = list_entry(cnic_udev_list.next, struct cnic_uio_dev,
5713 cnic_free_uio(udev);
5717 static int __init cnic_init(void)
5721 pr_info("%s", version);
5723 rc = register_netdevice_notifier(&cnic_netdev_notifier);
5729 cnic_wq = create_singlethread_workqueue("cnic_wq");
5732 unregister_netdevice_notifier(&cnic_netdev_notifier);
5739 static void __exit cnic_exit(void)
5741 unregister_netdevice_notifier(&cnic_netdev_notifier);
5743 destroy_workqueue(cnic_wq);
5746 module_init(cnic_init);
5747 module_exit(cnic_exit);