1 /* cnic.c: QLogic CNIC core network driver.
3 * Copyright (c) 2006-2014 Broadcom Corporation
4 * Copyright (c) 2014-2015 QLogic Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation.
10 * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
11 * Previously modified and maintained by: Michael Chan <mchan@broadcom.com>
12 * Maintained By: Dept-HSGLinuxNICDev@qlogic.com
15 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17 #include <linux/module.h>
19 #include <linux/kernel.h>
20 #include <linux/errno.h>
21 #include <linux/list.h>
22 #include <linux/slab.h>
23 #include <linux/pci.h>
24 #include <linux/init.h>
25 #include <linux/netdevice.h>
26 #include <linux/uio_driver.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/delay.h>
30 #include <linux/ethtool.h>
31 #include <linux/if_vlan.h>
32 #include <linux/prefetch.h>
33 #include <linux/random.h>
34 #if IS_ENABLED(CONFIG_VLAN_8021Q)
39 #include <net/route.h>
41 #include <net/ip6_route.h>
42 #include <net/ip6_checksum.h>
43 #include <scsi/iscsi_if.h>
48 #include "bnx2x/bnx2x.h"
49 #include "bnx2x/bnx2x_reg.h"
50 #include "bnx2x/bnx2x_fw_defs.h"
51 #include "bnx2x/bnx2x_hsi.h"
52 #include "../../../scsi/bnx2i/57xx_iscsi_constants.h"
53 #include "../../../scsi/bnx2i/57xx_iscsi_hsi.h"
54 #include "../../../scsi/bnx2fc/bnx2fc_constants.h"
56 #include "cnic_defs.h"
58 #define CNIC_MODULE_NAME "cnic"
60 static char version[] =
61 "QLogic " CNIC_MODULE_NAME "Driver v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
63 MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
64 "Chen (zongxi@broadcom.com");
65 MODULE_DESCRIPTION("QLogic cnic Driver");
66 MODULE_LICENSE("GPL");
67 MODULE_VERSION(CNIC_MODULE_VERSION);
69 /* cnic_dev_list modifications are protected by both rtnl and cnic_dev_lock */
70 static LIST_HEAD(cnic_dev_list);
71 static LIST_HEAD(cnic_udev_list);
72 static DEFINE_RWLOCK(cnic_dev_lock);
73 static DEFINE_MUTEX(cnic_lock);
75 static struct cnic_ulp_ops __rcu *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
77 /* helper function, assuming cnic_lock is held */
78 static inline struct cnic_ulp_ops *cnic_ulp_tbl_prot(int type)
80 return rcu_dereference_protected(cnic_ulp_tbl[type],
81 lockdep_is_held(&cnic_lock));
84 static int cnic_service_bnx2(void *, void *);
85 static int cnic_service_bnx2x(void *, void *);
86 static int cnic_ctl(void *, struct cnic_ctl_info *);
88 static struct cnic_ops cnic_bnx2_ops = {
89 .cnic_owner = THIS_MODULE,
90 .cnic_handler = cnic_service_bnx2,
94 static struct cnic_ops cnic_bnx2x_ops = {
95 .cnic_owner = THIS_MODULE,
96 .cnic_handler = cnic_service_bnx2x,
100 static struct workqueue_struct *cnic_wq;
102 static void cnic_shutdown_rings(struct cnic_dev *);
103 static void cnic_init_rings(struct cnic_dev *);
104 static int cnic_cm_set_pg(struct cnic_sock *);
106 static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
108 struct cnic_uio_dev *udev = uinfo->priv;
109 struct cnic_dev *dev;
111 if (!capable(CAP_NET_ADMIN))
114 if (udev->uio_dev != -1)
120 if (!dev || !test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
125 udev->uio_dev = iminor(inode);
127 cnic_shutdown_rings(dev);
128 cnic_init_rings(dev);
134 static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
136 struct cnic_uio_dev *udev = uinfo->priv;
142 static inline void cnic_hold(struct cnic_dev *dev)
144 atomic_inc(&dev->ref_count);
147 static inline void cnic_put(struct cnic_dev *dev)
149 atomic_dec(&dev->ref_count);
152 static inline void csk_hold(struct cnic_sock *csk)
154 atomic_inc(&csk->ref_count);
157 static inline void csk_put(struct cnic_sock *csk)
159 atomic_dec(&csk->ref_count);
162 static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
164 struct cnic_dev *cdev;
166 read_lock(&cnic_dev_lock);
167 list_for_each_entry(cdev, &cnic_dev_list, list) {
168 if (netdev == cdev->netdev) {
170 read_unlock(&cnic_dev_lock);
174 read_unlock(&cnic_dev_lock);
178 static inline void ulp_get(struct cnic_ulp_ops *ulp_ops)
180 atomic_inc(&ulp_ops->ref_count);
183 static inline void ulp_put(struct cnic_ulp_ops *ulp_ops)
185 atomic_dec(&ulp_ops->ref_count);
188 static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
190 struct cnic_local *cp = dev->cnic_priv;
191 struct cnic_eth_dev *ethdev = cp->ethdev;
192 struct drv_ctl_info info;
193 struct drv_ctl_io *io = &info.data.io;
195 info.cmd = DRV_CTL_CTX_WR_CMD;
196 io->cid_addr = cid_addr;
199 ethdev->drv_ctl(dev->netdev, &info);
202 static void cnic_ctx_tbl_wr(struct cnic_dev *dev, u32 off, dma_addr_t addr)
204 struct cnic_local *cp = dev->cnic_priv;
205 struct cnic_eth_dev *ethdev = cp->ethdev;
206 struct drv_ctl_info info;
207 struct drv_ctl_io *io = &info.data.io;
209 info.cmd = DRV_CTL_CTXTBL_WR_CMD;
212 ethdev->drv_ctl(dev->netdev, &info);
215 static void cnic_ring_ctl(struct cnic_dev *dev, u32 cid, u32 cl_id, int start)
217 struct cnic_local *cp = dev->cnic_priv;
218 struct cnic_eth_dev *ethdev = cp->ethdev;
219 struct drv_ctl_info info;
220 struct drv_ctl_l2_ring *ring = &info.data.ring;
223 info.cmd = DRV_CTL_START_L2_CMD;
225 info.cmd = DRV_CTL_STOP_L2_CMD;
228 ring->client_id = cl_id;
229 ethdev->drv_ctl(dev->netdev, &info);
232 static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
234 struct cnic_local *cp = dev->cnic_priv;
235 struct cnic_eth_dev *ethdev = cp->ethdev;
236 struct drv_ctl_info info;
237 struct drv_ctl_io *io = &info.data.io;
239 info.cmd = DRV_CTL_IO_WR_CMD;
242 ethdev->drv_ctl(dev->netdev, &info);
245 static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
247 struct cnic_local *cp = dev->cnic_priv;
248 struct cnic_eth_dev *ethdev = cp->ethdev;
249 struct drv_ctl_info info;
250 struct drv_ctl_io *io = &info.data.io;
252 info.cmd = DRV_CTL_IO_RD_CMD;
254 ethdev->drv_ctl(dev->netdev, &info);
258 static void cnic_ulp_ctl(struct cnic_dev *dev, int ulp_type, bool reg)
260 struct cnic_local *cp = dev->cnic_priv;
261 struct cnic_eth_dev *ethdev = cp->ethdev;
262 struct drv_ctl_info info;
263 struct fcoe_capabilities *fcoe_cap =
264 &info.data.register_data.fcoe_features;
267 info.cmd = DRV_CTL_ULP_REGISTER_CMD;
268 if (ulp_type == CNIC_ULP_FCOE && dev->fcoe_cap)
269 memcpy(fcoe_cap, dev->fcoe_cap, sizeof(*fcoe_cap));
271 info.cmd = DRV_CTL_ULP_UNREGISTER_CMD;
274 info.data.ulp_type = ulp_type;
275 ethdev->drv_ctl(dev->netdev, &info);
278 static int cnic_in_use(struct cnic_sock *csk)
280 return test_bit(SK_F_INUSE, &csk->flags);
283 static void cnic_spq_completion(struct cnic_dev *dev, int cmd, u32 count)
285 struct cnic_local *cp = dev->cnic_priv;
286 struct cnic_eth_dev *ethdev = cp->ethdev;
287 struct drv_ctl_info info;
290 info.data.credit.credit_count = count;
291 ethdev->drv_ctl(dev->netdev, &info);
294 static int cnic_get_l5_cid(struct cnic_local *cp, u32 cid, u32 *l5_cid)
301 for (i = 0; i < cp->max_cid_space; i++) {
302 if (cp->ctx_tbl[i].cid == cid) {
310 static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
311 struct cnic_sock *csk)
313 struct iscsi_path path_req;
316 u32 msg_type = ISCSI_KEVENT_IF_DOWN;
317 struct cnic_ulp_ops *ulp_ops;
318 struct cnic_uio_dev *udev = cp->udev;
319 int rc = 0, retry = 0;
321 if (!udev || udev->uio_dev == -1)
325 len = sizeof(path_req);
326 buf = (char *) &path_req;
327 memset(&path_req, 0, len);
329 msg_type = ISCSI_KEVENT_PATH_REQ;
330 path_req.handle = (u64) csk->l5_cid;
331 if (test_bit(SK_F_IPV6, &csk->flags)) {
332 memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
333 sizeof(struct in6_addr));
334 path_req.ip_addr_len = 16;
336 memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
337 sizeof(struct in_addr));
338 path_req.ip_addr_len = 4;
340 path_req.vlan_id = csk->vlan_id;
341 path_req.pmtu = csk->mtu;
347 ulp_ops = rcu_dereference(cp->ulp_ops[CNIC_ULP_ISCSI]);
349 rc = ulp_ops->iscsi_nl_send_msg(
350 cp->ulp_handle[CNIC_ULP_ISCSI],
353 if (rc == 0 || msg_type != ISCSI_KEVENT_PATH_REQ)
362 static void cnic_cm_upcall(struct cnic_local *, struct cnic_sock *, u8);
364 static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
370 case ISCSI_UEVENT_PATH_UPDATE: {
371 struct cnic_local *cp;
373 struct cnic_sock *csk;
374 struct iscsi_path *path_resp;
376 if (len < sizeof(*path_resp))
379 path_resp = (struct iscsi_path *) buf;
381 l5_cid = (u32) path_resp->handle;
382 if (l5_cid >= MAX_CM_SK_TBL_SZ)
385 if (!rcu_access_pointer(cp->ulp_ops[CNIC_ULP_L4])) {
389 csk = &cp->csk_tbl[l5_cid];
391 if (cnic_in_use(csk) &&
392 test_bit(SK_F_CONNECT_START, &csk->flags)) {
394 csk->vlan_id = path_resp->vlan_id;
396 memcpy(csk->ha, path_resp->mac_addr, ETH_ALEN);
397 if (test_bit(SK_F_IPV6, &csk->flags))
398 memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
399 sizeof(struct in6_addr));
401 memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
402 sizeof(struct in_addr));
404 if (is_valid_ether_addr(csk->ha)) {
406 } else if (!test_bit(SK_F_OFFLD_SCHED, &csk->flags) &&
407 !test_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
409 cnic_cm_upcall(cp, csk,
410 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
411 clear_bit(SK_F_CONNECT_START, &csk->flags);
422 static int cnic_offld_prep(struct cnic_sock *csk)
424 if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
427 if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
428 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
435 static int cnic_close_prep(struct cnic_sock *csk)
437 clear_bit(SK_F_CONNECT_START, &csk->flags);
438 smp_mb__after_atomic();
440 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
441 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
449 static int cnic_abort_prep(struct cnic_sock *csk)
451 clear_bit(SK_F_CONNECT_START, &csk->flags);
452 smp_mb__after_atomic();
454 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
457 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
458 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
465 int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
467 struct cnic_dev *dev;
469 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
470 pr_err("%s: Bad type %d\n", __func__, ulp_type);
473 mutex_lock(&cnic_lock);
474 if (cnic_ulp_tbl_prot(ulp_type)) {
475 pr_err("%s: Type %d has already been registered\n",
477 mutex_unlock(&cnic_lock);
481 read_lock(&cnic_dev_lock);
482 list_for_each_entry(dev, &cnic_dev_list, list) {
483 struct cnic_local *cp = dev->cnic_priv;
485 clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
487 read_unlock(&cnic_dev_lock);
489 atomic_set(&ulp_ops->ref_count, 0);
490 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
491 mutex_unlock(&cnic_lock);
493 /* Prevent race conditions with netdev_event */
495 list_for_each_entry(dev, &cnic_dev_list, list) {
496 struct cnic_local *cp = dev->cnic_priv;
498 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
499 ulp_ops->cnic_init(dev);
506 int cnic_unregister_driver(int ulp_type)
508 struct cnic_dev *dev;
509 struct cnic_ulp_ops *ulp_ops;
512 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
513 pr_err("%s: Bad type %d\n", __func__, ulp_type);
516 mutex_lock(&cnic_lock);
517 ulp_ops = cnic_ulp_tbl_prot(ulp_type);
519 pr_err("%s: Type %d has not been registered\n",
523 read_lock(&cnic_dev_lock);
524 list_for_each_entry(dev, &cnic_dev_list, list) {
525 struct cnic_local *cp = dev->cnic_priv;
527 if (rcu_access_pointer(cp->ulp_ops[ulp_type])) {
528 pr_err("%s: Type %d still has devices registered\n",
530 read_unlock(&cnic_dev_lock);
534 read_unlock(&cnic_dev_lock);
536 RCU_INIT_POINTER(cnic_ulp_tbl[ulp_type], NULL);
538 mutex_unlock(&cnic_lock);
540 while ((atomic_read(&ulp_ops->ref_count) != 0) && (i < 20)) {
545 if (atomic_read(&ulp_ops->ref_count) != 0)
546 pr_warn("%s: Failed waiting for ref count to go to zero\n",
551 mutex_unlock(&cnic_lock);
555 static int cnic_start_hw(struct cnic_dev *);
556 static void cnic_stop_hw(struct cnic_dev *);
558 static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
561 struct cnic_local *cp = dev->cnic_priv;
562 struct cnic_ulp_ops *ulp_ops;
564 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
565 pr_err("%s: Bad type %d\n", __func__, ulp_type);
568 mutex_lock(&cnic_lock);
569 if (cnic_ulp_tbl_prot(ulp_type) == NULL) {
570 pr_err("%s: Driver with type %d has not been registered\n",
572 mutex_unlock(&cnic_lock);
575 if (rcu_access_pointer(cp->ulp_ops[ulp_type])) {
576 pr_err("%s: Type %d has already been registered to this device\n",
578 mutex_unlock(&cnic_lock);
582 clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
583 cp->ulp_handle[ulp_type] = ulp_ctx;
584 ulp_ops = cnic_ulp_tbl_prot(ulp_type);
585 rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
588 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
589 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
590 ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
592 mutex_unlock(&cnic_lock);
594 cnic_ulp_ctl(dev, ulp_type, true);
599 EXPORT_SYMBOL(cnic_register_driver);
601 static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
603 struct cnic_local *cp = dev->cnic_priv;
606 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
607 pr_err("%s: Bad type %d\n", __func__, ulp_type);
611 if (ulp_type == CNIC_ULP_ISCSI)
612 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
614 mutex_lock(&cnic_lock);
615 if (rcu_access_pointer(cp->ulp_ops[ulp_type])) {
616 RCU_INIT_POINTER(cp->ulp_ops[ulp_type], NULL);
619 pr_err("%s: device not registered to this ulp type %d\n",
621 mutex_unlock(&cnic_lock);
624 mutex_unlock(&cnic_lock);
626 if (ulp_type == CNIC_ULP_FCOE)
627 dev->fcoe_cap = NULL;
631 while (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]) &&
636 if (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]))
637 netdev_warn(dev->netdev, "Failed waiting for ULP up call to complete\n");
639 cnic_ulp_ctl(dev, ulp_type, false);
643 EXPORT_SYMBOL(cnic_unregister_driver);
645 static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id,
648 id_tbl->start = start_id;
651 spin_lock_init(&id_tbl->lock);
652 id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
659 static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
661 kfree(id_tbl->table);
662 id_tbl->table = NULL;
665 static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
670 if (id >= id_tbl->max)
673 spin_lock(&id_tbl->lock);
674 if (!test_bit(id, id_tbl->table)) {
675 set_bit(id, id_tbl->table);
678 spin_unlock(&id_tbl->lock);
682 /* Returns -1 if not successful */
683 static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
687 spin_lock(&id_tbl->lock);
688 id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
689 if (id >= id_tbl->max) {
691 if (id_tbl->next != 0) {
692 id = find_first_zero_bit(id_tbl->table, id_tbl->next);
693 if (id >= id_tbl->next)
698 if (id < id_tbl->max) {
699 set_bit(id, id_tbl->table);
700 id_tbl->next = (id + 1) & (id_tbl->max - 1);
704 spin_unlock(&id_tbl->lock);
709 static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
715 if (id >= id_tbl->max)
718 clear_bit(id, id_tbl->table);
721 static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
728 for (i = 0; i < dma->num_pages; i++) {
729 if (dma->pg_arr[i]) {
730 dma_free_coherent(&dev->pcidev->dev, CNIC_PAGE_SIZE,
731 dma->pg_arr[i], dma->pg_map_arr[i]);
732 dma->pg_arr[i] = NULL;
736 dma_free_coherent(&dev->pcidev->dev, dma->pgtbl_size,
737 dma->pgtbl, dma->pgtbl_map);
745 static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
748 __le32 *page_table = (__le32 *) dma->pgtbl;
750 for (i = 0; i < dma->num_pages; i++) {
751 /* Each entry needs to be in big endian format. */
752 *page_table = cpu_to_le32((u64) dma->pg_map_arr[i] >> 32);
754 *page_table = cpu_to_le32(dma->pg_map_arr[i] & 0xffffffff);
759 static void cnic_setup_page_tbl_le(struct cnic_dev *dev, struct cnic_dma *dma)
762 __le32 *page_table = (__le32 *) dma->pgtbl;
764 for (i = 0; i < dma->num_pages; i++) {
765 /* Each entry needs to be in little endian format. */
766 *page_table = cpu_to_le32(dma->pg_map_arr[i] & 0xffffffff);
768 *page_table = cpu_to_le32((u64) dma->pg_map_arr[i] >> 32);
773 static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
774 int pages, int use_pg_tbl)
777 struct cnic_local *cp = dev->cnic_priv;
779 size = pages * (sizeof(void *) + sizeof(dma_addr_t));
780 dma->pg_arr = kzalloc(size, GFP_ATOMIC);
781 if (dma->pg_arr == NULL)
784 dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
785 dma->num_pages = pages;
787 for (i = 0; i < pages; i++) {
788 dma->pg_arr[i] = dma_alloc_coherent(&dev->pcidev->dev,
792 if (dma->pg_arr[i] == NULL)
798 dma->pgtbl_size = ((pages * 8) + CNIC_PAGE_SIZE - 1) &
799 ~(CNIC_PAGE_SIZE - 1);
800 dma->pgtbl = dma_alloc_coherent(&dev->pcidev->dev, dma->pgtbl_size,
801 &dma->pgtbl_map, GFP_ATOMIC);
802 if (dma->pgtbl == NULL)
805 cp->setup_pgtbl(dev, dma);
810 cnic_free_dma(dev, dma);
814 static void cnic_free_context(struct cnic_dev *dev)
816 struct cnic_local *cp = dev->cnic_priv;
819 for (i = 0; i < cp->ctx_blks; i++) {
820 if (cp->ctx_arr[i].ctx) {
821 dma_free_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
823 cp->ctx_arr[i].mapping);
824 cp->ctx_arr[i].ctx = NULL;
829 static void __cnic_free_uio_rings(struct cnic_uio_dev *udev)
832 dma_free_coherent(&udev->pdev->dev, udev->l2_buf_size,
833 udev->l2_buf, udev->l2_buf_map);
838 dma_free_coherent(&udev->pdev->dev, udev->l2_ring_size,
839 udev->l2_ring, udev->l2_ring_map);
840 udev->l2_ring = NULL;
845 static void __cnic_free_uio(struct cnic_uio_dev *udev)
847 uio_unregister_device(&udev->cnic_uinfo);
849 __cnic_free_uio_rings(udev);
851 pci_dev_put(udev->pdev);
855 static void cnic_free_uio(struct cnic_uio_dev *udev)
860 write_lock(&cnic_dev_lock);
861 list_del_init(&udev->list);
862 write_unlock(&cnic_dev_lock);
863 __cnic_free_uio(udev);
866 static void cnic_free_resc(struct cnic_dev *dev)
868 struct cnic_local *cp = dev->cnic_priv;
869 struct cnic_uio_dev *udev = cp->udev;
874 if (udev->uio_dev == -1)
875 __cnic_free_uio_rings(udev);
878 cnic_free_context(dev);
883 cnic_free_dma(dev, &cp->gbl_buf_info);
884 cnic_free_dma(dev, &cp->kwq_info);
885 cnic_free_dma(dev, &cp->kwq_16_data_info);
886 cnic_free_dma(dev, &cp->kcq2.dma);
887 cnic_free_dma(dev, &cp->kcq1.dma);
888 kfree(cp->iscsi_tbl);
889 cp->iscsi_tbl = NULL;
893 cnic_free_id_tbl(&cp->fcoe_cid_tbl);
894 cnic_free_id_tbl(&cp->cid_tbl);
897 static int cnic_alloc_context(struct cnic_dev *dev)
899 struct cnic_local *cp = dev->cnic_priv;
901 if (BNX2_CHIP(cp) == BNX2_CHIP_5709) {
904 cp->ctx_blk_size = CNIC_PAGE_SIZE;
905 cp->cids_per_blk = CNIC_PAGE_SIZE / 128;
906 arr_size = BNX2_MAX_CID / cp->cids_per_blk *
907 sizeof(struct cnic_ctx);
908 cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
909 if (cp->ctx_arr == NULL)
913 for (i = 0; i < 2; i++) {
914 u32 j, reg, off, lo, hi;
917 off = BNX2_PG_CTX_MAP;
919 off = BNX2_ISCSI_CTX_MAP;
921 reg = cnic_reg_rd_ind(dev, off);
924 for (j = lo; j < hi; j += cp->cids_per_blk, k++)
925 cp->ctx_arr[k].cid = j;
929 if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
934 for (i = 0; i < cp->ctx_blks; i++) {
936 dma_alloc_coherent(&dev->pcidev->dev,
938 &cp->ctx_arr[i].mapping,
940 if (cp->ctx_arr[i].ctx == NULL)
947 static u16 cnic_bnx2_next_idx(u16 idx)
952 static u16 cnic_bnx2_hw_idx(u16 idx)
957 static u16 cnic_bnx2x_next_idx(u16 idx)
960 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
966 static u16 cnic_bnx2x_hw_idx(u16 idx)
968 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
973 static int cnic_alloc_kcq(struct cnic_dev *dev, struct kcq_info *info,
976 int err, i, use_page_tbl = 0;
982 err = cnic_alloc_dma(dev, &info->dma, KCQ_PAGE_CNT, use_page_tbl);
986 kcq = (struct kcqe **) info->dma.pg_arr;
989 info->next_idx = cnic_bnx2_next_idx;
990 info->hw_idx = cnic_bnx2_hw_idx;
994 info->next_idx = cnic_bnx2x_next_idx;
995 info->hw_idx = cnic_bnx2x_hw_idx;
997 for (i = 0; i < KCQ_PAGE_CNT; i++) {
998 struct bnx2x_bd_chain_next *next =
999 (struct bnx2x_bd_chain_next *) &kcq[i][MAX_KCQE_CNT];
1002 if (j >= KCQ_PAGE_CNT)
1004 next->addr_hi = (u64) info->dma.pg_map_arr[j] >> 32;
1005 next->addr_lo = info->dma.pg_map_arr[j] & 0xffffffff;
1010 static int __cnic_alloc_uio_rings(struct cnic_uio_dev *udev, int pages)
1012 struct cnic_local *cp = udev->dev->cnic_priv;
1017 udev->l2_ring_size = pages * CNIC_PAGE_SIZE;
1018 udev->l2_ring = dma_alloc_coherent(&udev->pdev->dev, udev->l2_ring_size,
1020 GFP_KERNEL | __GFP_COMP);
1024 udev->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
1025 udev->l2_buf_size = CNIC_PAGE_ALIGN(udev->l2_buf_size);
1026 udev->l2_buf = dma_alloc_coherent(&udev->pdev->dev, udev->l2_buf_size,
1028 GFP_KERNEL | __GFP_COMP);
1029 if (!udev->l2_buf) {
1030 __cnic_free_uio_rings(udev);
1038 static int cnic_alloc_uio_rings(struct cnic_dev *dev, int pages)
1040 struct cnic_local *cp = dev->cnic_priv;
1041 struct cnic_uio_dev *udev;
1043 list_for_each_entry(udev, &cnic_udev_list, list) {
1044 if (udev->pdev == dev->pcidev) {
1046 if (__cnic_alloc_uio_rings(udev, pages)) {
1055 udev = kzalloc(sizeof(struct cnic_uio_dev), GFP_ATOMIC);
1062 udev->pdev = dev->pcidev;
1064 if (__cnic_alloc_uio_rings(udev, pages))
1067 list_add(&udev->list, &cnic_udev_list);
1069 pci_dev_get(udev->pdev);
1080 static int cnic_init_uio(struct cnic_dev *dev)
1082 struct cnic_local *cp = dev->cnic_priv;
1083 struct cnic_uio_dev *udev = cp->udev;
1084 struct uio_info *uinfo;
1090 uinfo = &udev->cnic_uinfo;
1092 uinfo->mem[0].addr = pci_resource_start(dev->pcidev, 0);
1093 uinfo->mem[0].internal_addr = dev->regview;
1094 uinfo->mem[0].memtype = UIO_MEM_PHYS;
1096 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
1097 uinfo->mem[0].size = MB_GET_CID_ADDR(TX_TSS_CID +
1098 TX_MAX_TSS_RINGS + 1);
1099 uinfo->mem[1].addr = (unsigned long) cp->status_blk.gen &
1101 if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
1102 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
1104 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
1106 uinfo->name = "bnx2_cnic";
1107 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
1108 uinfo->mem[0].size = pci_resource_len(dev->pcidev, 0);
1110 uinfo->mem[1].addr = (unsigned long) cp->bnx2x_def_status_blk &
1112 uinfo->mem[1].size = sizeof(*cp->bnx2x_def_status_blk);
1114 uinfo->name = "bnx2x_cnic";
1117 uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
1119 uinfo->mem[2].addr = (unsigned long) udev->l2_ring;
1120 uinfo->mem[2].size = udev->l2_ring_size;
1121 uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
1123 uinfo->mem[3].addr = (unsigned long) udev->l2_buf;
1124 uinfo->mem[3].size = udev->l2_buf_size;
1125 uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
1127 uinfo->version = CNIC_MODULE_VERSION;
1128 uinfo->irq = UIO_IRQ_CUSTOM;
1130 uinfo->open = cnic_uio_open;
1131 uinfo->release = cnic_uio_close;
1133 if (udev->uio_dev == -1) {
1137 ret = uio_register_device(&udev->pdev->dev, uinfo);
1140 cnic_init_rings(dev);
1146 static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
1148 struct cnic_local *cp = dev->cnic_priv;
1151 ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
1154 cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
1156 ret = cnic_alloc_kcq(dev, &cp->kcq1, true);
1160 ret = cnic_alloc_context(dev);
1164 ret = cnic_alloc_uio_rings(dev, 2);
1168 ret = cnic_init_uio(dev);
1175 cnic_free_resc(dev);
1179 static int cnic_alloc_bnx2x_context(struct cnic_dev *dev)
1181 struct cnic_local *cp = dev->cnic_priv;
1182 struct bnx2x *bp = netdev_priv(dev->netdev);
1183 int ctx_blk_size = cp->ethdev->ctx_blk_size;
1184 int total_mem, blks, i;
1186 total_mem = BNX2X_CONTEXT_MEM_SIZE * cp->max_cid_space;
1187 blks = total_mem / ctx_blk_size;
1188 if (total_mem % ctx_blk_size)
1191 if (blks > cp->ethdev->ctx_tbl_len)
1194 cp->ctx_arr = kcalloc(blks, sizeof(struct cnic_ctx), GFP_KERNEL);
1195 if (cp->ctx_arr == NULL)
1198 cp->ctx_blks = blks;
1199 cp->ctx_blk_size = ctx_blk_size;
1200 if (!CHIP_IS_E1(bp))
1203 cp->ctx_align = ctx_blk_size;
1205 cp->cids_per_blk = ctx_blk_size / BNX2X_CONTEXT_MEM_SIZE;
1207 for (i = 0; i < blks; i++) {
1208 cp->ctx_arr[i].ctx =
1209 dma_alloc_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
1210 &cp->ctx_arr[i].mapping,
1212 if (cp->ctx_arr[i].ctx == NULL)
1215 if (cp->ctx_align && cp->ctx_blk_size == ctx_blk_size) {
1216 if (cp->ctx_arr[i].mapping & (cp->ctx_align - 1)) {
1217 cnic_free_context(dev);
1218 cp->ctx_blk_size += cp->ctx_align;
1227 static int cnic_alloc_bnx2x_resc(struct cnic_dev *dev)
1229 struct cnic_local *cp = dev->cnic_priv;
1230 struct bnx2x *bp = netdev_priv(dev->netdev);
1231 struct cnic_eth_dev *ethdev = cp->ethdev;
1232 u32 start_cid = ethdev->starting_cid;
1233 int i, j, n, ret, pages;
1234 struct cnic_dma *kwq_16_dma = &cp->kwq_16_data_info;
1236 cp->max_cid_space = MAX_ISCSI_TBL_SZ;
1237 cp->iscsi_start_cid = start_cid;
1238 cp->fcoe_start_cid = start_cid + MAX_ISCSI_TBL_SZ;
1240 if (BNX2X_CHIP_IS_E2_PLUS(bp)) {
1241 cp->max_cid_space += dev->max_fcoe_conn;
1242 cp->fcoe_init_cid = ethdev->fcoe_init_cid;
1243 if (!cp->fcoe_init_cid)
1244 cp->fcoe_init_cid = 0x10;
1247 cp->iscsi_tbl = kzalloc(sizeof(struct cnic_iscsi) * MAX_ISCSI_TBL_SZ,
1252 cp->ctx_tbl = kzalloc(sizeof(struct cnic_context) *
1253 cp->max_cid_space, GFP_KERNEL);
1257 for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) {
1258 cp->ctx_tbl[i].proto.iscsi = &cp->iscsi_tbl[i];
1259 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_ISCSI;
1262 for (i = MAX_ISCSI_TBL_SZ; i < cp->max_cid_space; i++)
1263 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_FCOE;
1265 pages = CNIC_PAGE_ALIGN(cp->max_cid_space * CNIC_KWQ16_DATA_SIZE) /
1268 ret = cnic_alloc_dma(dev, kwq_16_dma, pages, 0);
1272 n = CNIC_PAGE_SIZE / CNIC_KWQ16_DATA_SIZE;
1273 for (i = 0, j = 0; i < cp->max_cid_space; i++) {
1274 long off = CNIC_KWQ16_DATA_SIZE * (i % n);
1276 cp->ctx_tbl[i].kwqe_data = kwq_16_dma->pg_arr[j] + off;
1277 cp->ctx_tbl[i].kwqe_data_mapping = kwq_16_dma->pg_map_arr[j] +
1280 if ((i % n) == (n - 1))
1284 ret = cnic_alloc_kcq(dev, &cp->kcq1, false);
1288 if (CNIC_SUPPORTS_FCOE(bp)) {
1289 ret = cnic_alloc_kcq(dev, &cp->kcq2, true);
1294 pages = CNIC_PAGE_ALIGN(BNX2X_ISCSI_GLB_BUF_SIZE) / CNIC_PAGE_SIZE;
1295 ret = cnic_alloc_dma(dev, &cp->gbl_buf_info, pages, 0);
1299 ret = cnic_alloc_bnx2x_context(dev);
1303 if (cp->ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI)
1306 cp->bnx2x_def_status_blk = cp->ethdev->irq_arr[1].status_blk;
1308 cp->l2_rx_ring_size = 15;
1310 ret = cnic_alloc_uio_rings(dev, 4);
1314 ret = cnic_init_uio(dev);
1321 cnic_free_resc(dev);
1325 static inline u32 cnic_kwq_avail(struct cnic_local *cp)
1327 return cp->max_kwq_idx -
1328 ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
1331 static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1334 struct cnic_local *cp = dev->cnic_priv;
1335 struct kwqe *prod_qe;
1336 u16 prod, sw_prod, i;
1338 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
1339 return -EAGAIN; /* bnx2 is down */
1341 spin_lock_bh(&cp->cnic_ulp_lock);
1342 if (num_wqes > cnic_kwq_avail(cp) &&
1343 !test_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags)) {
1344 spin_unlock_bh(&cp->cnic_ulp_lock);
1348 clear_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
1350 prod = cp->kwq_prod_idx;
1351 sw_prod = prod & MAX_KWQ_IDX;
1352 for (i = 0; i < num_wqes; i++) {
1353 prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
1354 memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
1356 sw_prod = prod & MAX_KWQ_IDX;
1358 cp->kwq_prod_idx = prod;
1360 CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
1362 spin_unlock_bh(&cp->cnic_ulp_lock);
1366 static void *cnic_get_kwqe_16_data(struct cnic_local *cp, u32 l5_cid,
1367 union l5cm_specific_data *l5_data)
1369 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1372 map = ctx->kwqe_data_mapping;
1373 l5_data->phy_address.lo = (u64) map & 0xffffffff;
1374 l5_data->phy_address.hi = (u64) map >> 32;
1375 return ctx->kwqe_data;
1378 static int cnic_submit_kwqe_16(struct cnic_dev *dev, u32 cmd, u32 cid,
1379 u32 type, union l5cm_specific_data *l5_data)
1381 struct cnic_local *cp = dev->cnic_priv;
1382 struct bnx2x *bp = netdev_priv(dev->netdev);
1383 struct l5cm_spe kwqe;
1384 struct kwqe_16 *kwq[1];
1388 kwqe.hdr.conn_and_cmd_data =
1389 cpu_to_le32(((cmd << SPE_HDR_CMD_ID_SHIFT) |
1390 BNX2X_HW_CID(bp, cid)));
1392 type_16 = (type << SPE_HDR_CONN_TYPE_SHIFT) & SPE_HDR_CONN_TYPE;
1393 type_16 |= (bp->pfid << SPE_HDR_FUNCTION_ID_SHIFT) &
1394 SPE_HDR_FUNCTION_ID;
1396 kwqe.hdr.type = cpu_to_le16(type_16);
1397 kwqe.hdr.reserved1 = 0;
1398 kwqe.data.phy_address.lo = cpu_to_le32(l5_data->phy_address.lo);
1399 kwqe.data.phy_address.hi = cpu_to_le32(l5_data->phy_address.hi);
1401 kwq[0] = (struct kwqe_16 *) &kwqe;
1403 spin_lock_bh(&cp->cnic_ulp_lock);
1404 ret = cp->ethdev->drv_submit_kwqes_16(dev->netdev, kwq, 1);
1405 spin_unlock_bh(&cp->cnic_ulp_lock);
1413 static void cnic_reply_bnx2x_kcqes(struct cnic_dev *dev, int ulp_type,
1414 struct kcqe *cqes[], u32 num_cqes)
1416 struct cnic_local *cp = dev->cnic_priv;
1417 struct cnic_ulp_ops *ulp_ops;
1420 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
1421 if (likely(ulp_ops)) {
1422 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
1428 static void cnic_bnx2x_set_tcp_options(struct cnic_dev *dev, int time_stamps,
1431 struct bnx2x *bp = netdev_priv(dev->netdev);
1432 u8 xstorm_flags = XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN;
1433 u16 tstorm_flags = 0;
1436 xstorm_flags |= XSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1437 tstorm_flags |= TSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1440 tstorm_flags |= TSTORM_L5CM_TCP_FLAGS_DELAYED_ACK_EN;
1442 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1443 XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(bp->pfid), xstorm_flags);
1445 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1446 TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(bp->pfid), tstorm_flags);
1449 static int cnic_bnx2x_iscsi_init1(struct cnic_dev *dev, struct kwqe *kwqe)
1451 struct cnic_local *cp = dev->cnic_priv;
1452 struct bnx2x *bp = netdev_priv(dev->netdev);
1453 struct iscsi_kwqe_init1 *req1 = (struct iscsi_kwqe_init1 *) kwqe;
1455 u32 pfid = bp->pfid;
1457 cp->num_iscsi_tasks = req1->num_tasks_per_conn;
1458 cp->num_ccells = req1->num_ccells_per_conn;
1459 cp->task_array_size = BNX2X_ISCSI_TASK_CONTEXT_SIZE *
1460 cp->num_iscsi_tasks;
1461 cp->r2tq_size = cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS *
1462 BNX2X_ISCSI_R2TQE_SIZE;
1463 cp->hq_size = cp->num_ccells * BNX2X_ISCSI_HQ_BD_SIZE;
1464 pages = CNIC_PAGE_ALIGN(cp->hq_size) / CNIC_PAGE_SIZE;
1465 hq_bds = pages * (CNIC_PAGE_SIZE / BNX2X_ISCSI_HQ_BD_SIZE);
1466 cp->num_cqs = req1->num_cqs;
1468 if (!dev->max_iscsi_conn)
1471 /* init Tstorm RAM */
1472 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_RQ_SIZE_OFFSET(pfid),
1474 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1476 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1477 TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), CNIC_PAGE_BITS);
1478 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1479 TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1480 req1->num_tasks_per_conn);
1482 /* init Ustorm RAM */
1483 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1484 USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfid),
1485 req1->rq_buffer_size);
1486 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1488 CNIC_WR8(dev, BAR_USTRORM_INTMEM +
1489 USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), CNIC_PAGE_BITS);
1490 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1491 USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1492 req1->num_tasks_per_conn);
1493 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_RQ_SIZE_OFFSET(pfid),
1495 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_CQ_SIZE_OFFSET(pfid),
1497 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid),
1498 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1500 /* init Xstorm RAM */
1501 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1503 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1504 XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), CNIC_PAGE_BITS);
1505 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1506 XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1507 req1->num_tasks_per_conn);
1508 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_HQ_SIZE_OFFSET(pfid),
1510 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_SQ_SIZE_OFFSET(pfid),
1511 req1->num_tasks_per_conn);
1512 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid),
1513 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1515 /* init Cstorm RAM */
1516 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1518 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
1519 CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), CNIC_PAGE_BITS);
1520 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1521 CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1522 req1->num_tasks_per_conn);
1523 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_CQ_SIZE_OFFSET(pfid),
1525 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_HQ_SIZE_OFFSET(pfid),
1528 cnic_bnx2x_set_tcp_options(dev,
1529 req1->flags & ISCSI_KWQE_INIT1_TIME_STAMPS_ENABLE,
1530 req1->flags & ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE);
1535 static int cnic_bnx2x_iscsi_init2(struct cnic_dev *dev, struct kwqe *kwqe)
1537 struct iscsi_kwqe_init2 *req2 = (struct iscsi_kwqe_init2 *) kwqe;
1538 struct bnx2x *bp = netdev_priv(dev->netdev);
1539 u32 pfid = bp->pfid;
1540 struct iscsi_kcqe kcqe;
1541 struct kcqe *cqes[1];
1543 memset(&kcqe, 0, sizeof(kcqe));
1544 if (!dev->max_iscsi_conn) {
1545 kcqe.completion_status =
1546 ISCSI_KCQE_COMPLETION_STATUS_ISCSI_NOT_SUPPORTED;
1550 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1551 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid), req2->error_bit_map[0]);
1552 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1553 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid) + 4,
1554 req2->error_bit_map[1]);
1556 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1557 USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid), req2->max_cq_sqn);
1558 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1559 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid), req2->error_bit_map[0]);
1560 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1561 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid) + 4,
1562 req2->error_bit_map[1]);
1564 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1565 CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid), req2->max_cq_sqn);
1567 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1570 kcqe.op_code = ISCSI_KCQE_OPCODE_INIT;
1571 cqes[0] = (struct kcqe *) &kcqe;
1572 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1577 static void cnic_free_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1579 struct cnic_local *cp = dev->cnic_priv;
1580 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1582 if (ctx->ulp_proto_id == CNIC_ULP_ISCSI) {
1583 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1585 cnic_free_dma(dev, &iscsi->hq_info);
1586 cnic_free_dma(dev, &iscsi->r2tq_info);
1587 cnic_free_dma(dev, &iscsi->task_array_info);
1588 cnic_free_id(&cp->cid_tbl, ctx->cid);
1590 cnic_free_id(&cp->fcoe_cid_tbl, ctx->cid);
1596 static int cnic_alloc_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1600 struct cnic_local *cp = dev->cnic_priv;
1601 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1602 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1604 if (ctx->ulp_proto_id == CNIC_ULP_FCOE) {
1605 cid = cnic_alloc_new_id(&cp->fcoe_cid_tbl);
1614 cid = cnic_alloc_new_id(&cp->cid_tbl);
1621 pages = CNIC_PAGE_ALIGN(cp->task_array_size) / CNIC_PAGE_SIZE;
1623 ret = cnic_alloc_dma(dev, &iscsi->task_array_info, pages, 1);
1627 pages = CNIC_PAGE_ALIGN(cp->r2tq_size) / CNIC_PAGE_SIZE;
1628 ret = cnic_alloc_dma(dev, &iscsi->r2tq_info, pages, 1);
1632 pages = CNIC_PAGE_ALIGN(cp->hq_size) / CNIC_PAGE_SIZE;
1633 ret = cnic_alloc_dma(dev, &iscsi->hq_info, pages, 1);
1640 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1644 static void *cnic_get_bnx2x_ctx(struct cnic_dev *dev, u32 cid, int init,
1645 struct regpair *ctx_addr)
1647 struct cnic_local *cp = dev->cnic_priv;
1648 struct cnic_eth_dev *ethdev = cp->ethdev;
1649 int blk = (cid - ethdev->starting_cid) / cp->cids_per_blk;
1650 int off = (cid - ethdev->starting_cid) % cp->cids_per_blk;
1651 unsigned long align_off = 0;
1655 if (cp->ctx_align) {
1656 unsigned long mask = cp->ctx_align - 1;
1658 if (cp->ctx_arr[blk].mapping & mask)
1659 align_off = cp->ctx_align -
1660 (cp->ctx_arr[blk].mapping & mask);
1662 ctx_map = cp->ctx_arr[blk].mapping + align_off +
1663 (off * BNX2X_CONTEXT_MEM_SIZE);
1664 ctx = cp->ctx_arr[blk].ctx + align_off +
1665 (off * BNX2X_CONTEXT_MEM_SIZE);
1667 memset(ctx, 0, BNX2X_CONTEXT_MEM_SIZE);
1669 ctx_addr->lo = ctx_map & 0xffffffff;
1670 ctx_addr->hi = (u64) ctx_map >> 32;
1674 static int cnic_setup_bnx2x_ctx(struct cnic_dev *dev, struct kwqe *wqes[],
1677 struct cnic_local *cp = dev->cnic_priv;
1678 struct bnx2x *bp = netdev_priv(dev->netdev);
1679 struct iscsi_kwqe_conn_offload1 *req1 =
1680 (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1681 struct iscsi_kwqe_conn_offload2 *req2 =
1682 (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1683 struct iscsi_kwqe_conn_offload3 *req3;
1684 struct cnic_context *ctx = &cp->ctx_tbl[req1->iscsi_conn_id];
1685 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1687 u32 hw_cid = BNX2X_HW_CID(bp, cid);
1688 struct iscsi_context *ictx;
1689 struct regpair context_addr;
1690 int i, j, n = 2, n_max;
1691 u8 port = BP_PORT(bp);
1694 if (!req2->num_additional_wqes)
1697 n_max = req2->num_additional_wqes + 2;
1699 ictx = cnic_get_bnx2x_ctx(dev, cid, 1, &context_addr);
1703 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1705 ictx->xstorm_ag_context.hq_prod = 1;
1707 ictx->xstorm_st_context.iscsi.first_burst_length =
1708 ISCSI_DEF_FIRST_BURST_LEN;
1709 ictx->xstorm_st_context.iscsi.max_send_pdu_length =
1710 ISCSI_DEF_MAX_RECV_SEG_LEN;
1711 ictx->xstorm_st_context.iscsi.sq_pbl_base.lo =
1712 req1->sq_page_table_addr_lo;
1713 ictx->xstorm_st_context.iscsi.sq_pbl_base.hi =
1714 req1->sq_page_table_addr_hi;
1715 ictx->xstorm_st_context.iscsi.sq_curr_pbe.lo = req2->sq_first_pte.hi;
1716 ictx->xstorm_st_context.iscsi.sq_curr_pbe.hi = req2->sq_first_pte.lo;
1717 ictx->xstorm_st_context.iscsi.hq_pbl_base.lo =
1718 iscsi->hq_info.pgtbl_map & 0xffffffff;
1719 ictx->xstorm_st_context.iscsi.hq_pbl_base.hi =
1720 (u64) iscsi->hq_info.pgtbl_map >> 32;
1721 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.lo =
1722 iscsi->hq_info.pgtbl[0];
1723 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.hi =
1724 iscsi->hq_info.pgtbl[1];
1725 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.lo =
1726 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1727 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.hi =
1728 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1729 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.lo =
1730 iscsi->r2tq_info.pgtbl[0];
1731 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.hi =
1732 iscsi->r2tq_info.pgtbl[1];
1733 ictx->xstorm_st_context.iscsi.task_pbl_base.lo =
1734 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1735 ictx->xstorm_st_context.iscsi.task_pbl_base.hi =
1736 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1737 ictx->xstorm_st_context.iscsi.task_pbl_cache_idx =
1738 BNX2X_ISCSI_PBL_NOT_CACHED;
1739 ictx->xstorm_st_context.iscsi.flags.flags |=
1740 XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA;
1741 ictx->xstorm_st_context.iscsi.flags.flags |=
1742 XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T;
1743 ictx->xstorm_st_context.common.ethernet.reserved_vlan_type =
1745 if (BNX2X_CHIP_IS_E2_PLUS(bp) &&
1746 bp->common.chip_port_mode == CHIP_2_PORT_MODE) {
1750 ictx->xstorm_st_context.common.flags =
1751 1 << XSTORM_COMMON_CONTEXT_SECTION_PHYSQ_INITIALIZED_SHIFT;
1752 ictx->xstorm_st_context.common.flags =
1753 port << XSTORM_COMMON_CONTEXT_SECTION_PBF_PORT_SHIFT;
1755 ictx->tstorm_st_context.iscsi.hdr_bytes_2_fetch = ISCSI_HEADER_SIZE;
1756 /* TSTORM requires the base address of RQ DB & not PTE */
1757 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.lo =
1758 req2->rq_page_table_addr_lo & CNIC_PAGE_MASK;
1759 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.hi =
1760 req2->rq_page_table_addr_hi;
1761 ictx->tstorm_st_context.iscsi.iscsi_conn_id = req1->iscsi_conn_id;
1762 ictx->tstorm_st_context.tcp.cwnd = 0x5A8;
1763 ictx->tstorm_st_context.tcp.flags2 |=
1764 TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN;
1765 ictx->tstorm_st_context.tcp.ooo_support_mode =
1766 TCP_TSTORM_OOO_DROP_AND_PROC_ACK;
1768 ictx->timers_context.flags |= TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG;
1770 ictx->ustorm_st_context.ring.rq.pbl_base.lo =
1771 req2->rq_page_table_addr_lo;
1772 ictx->ustorm_st_context.ring.rq.pbl_base.hi =
1773 req2->rq_page_table_addr_hi;
1774 ictx->ustorm_st_context.ring.rq.curr_pbe.lo = req3->qp_first_pte[0].hi;
1775 ictx->ustorm_st_context.ring.rq.curr_pbe.hi = req3->qp_first_pte[0].lo;
1776 ictx->ustorm_st_context.ring.r2tq.pbl_base.lo =
1777 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1778 ictx->ustorm_st_context.ring.r2tq.pbl_base.hi =
1779 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1780 ictx->ustorm_st_context.ring.r2tq.curr_pbe.lo =
1781 iscsi->r2tq_info.pgtbl[0];
1782 ictx->ustorm_st_context.ring.r2tq.curr_pbe.hi =
1783 iscsi->r2tq_info.pgtbl[1];
1784 ictx->ustorm_st_context.ring.cq_pbl_base.lo =
1785 req1->cq_page_table_addr_lo;
1786 ictx->ustorm_st_context.ring.cq_pbl_base.hi =
1787 req1->cq_page_table_addr_hi;
1788 ictx->ustorm_st_context.ring.cq[0].cq_sn = ISCSI_INITIAL_SN;
1789 ictx->ustorm_st_context.ring.cq[0].curr_pbe.lo = req2->cq_first_pte.hi;
1790 ictx->ustorm_st_context.ring.cq[0].curr_pbe.hi = req2->cq_first_pte.lo;
1791 ictx->ustorm_st_context.task_pbe_cache_index =
1792 BNX2X_ISCSI_PBL_NOT_CACHED;
1793 ictx->ustorm_st_context.task_pdu_cache_index =
1794 BNX2X_ISCSI_PDU_HEADER_NOT_CACHED;
1796 for (i = 1, j = 1; i < cp->num_cqs; i++, j++) {
1800 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1803 ictx->ustorm_st_context.ring.cq[i].cq_sn = ISCSI_INITIAL_SN;
1804 ictx->ustorm_st_context.ring.cq[i].curr_pbe.lo =
1805 req3->qp_first_pte[j].hi;
1806 ictx->ustorm_st_context.ring.cq[i].curr_pbe.hi =
1807 req3->qp_first_pte[j].lo;
1810 ictx->ustorm_st_context.task_pbl_base.lo =
1811 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1812 ictx->ustorm_st_context.task_pbl_base.hi =
1813 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1814 ictx->ustorm_st_context.tce_phy_addr.lo =
1815 iscsi->task_array_info.pgtbl[0];
1816 ictx->ustorm_st_context.tce_phy_addr.hi =
1817 iscsi->task_array_info.pgtbl[1];
1818 ictx->ustorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1819 ictx->ustorm_st_context.num_cqs = cp->num_cqs;
1820 ictx->ustorm_st_context.negotiated_rx |= ISCSI_DEF_MAX_RECV_SEG_LEN;
1821 ictx->ustorm_st_context.negotiated_rx_and_flags |=
1822 ISCSI_DEF_MAX_BURST_LEN;
1823 ictx->ustorm_st_context.negotiated_rx |=
1824 ISCSI_DEFAULT_MAX_OUTSTANDING_R2T <<
1825 USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT;
1827 ictx->cstorm_st_context.hq_pbl_base.lo =
1828 iscsi->hq_info.pgtbl_map & 0xffffffff;
1829 ictx->cstorm_st_context.hq_pbl_base.hi =
1830 (u64) iscsi->hq_info.pgtbl_map >> 32;
1831 ictx->cstorm_st_context.hq_curr_pbe.lo = iscsi->hq_info.pgtbl[0];
1832 ictx->cstorm_st_context.hq_curr_pbe.hi = iscsi->hq_info.pgtbl[1];
1833 ictx->cstorm_st_context.task_pbl_base.lo =
1834 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1835 ictx->cstorm_st_context.task_pbl_base.hi =
1836 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1837 /* CSTORM and USTORM initialization is different, CSTORM requires
1838 * CQ DB base & not PTE addr */
1839 ictx->cstorm_st_context.cq_db_base.lo =
1840 req1->cq_page_table_addr_lo & CNIC_PAGE_MASK;
1841 ictx->cstorm_st_context.cq_db_base.hi = req1->cq_page_table_addr_hi;
1842 ictx->cstorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1843 ictx->cstorm_st_context.cq_proc_en_bit_map = (1 << cp->num_cqs) - 1;
1844 for (i = 0; i < cp->num_cqs; i++) {
1845 ictx->cstorm_st_context.cq_c_prod_sqn_arr.sqn[i] =
1847 ictx->cstorm_st_context.cq_c_sqn_2_notify_arr.sqn[i] =
1851 ictx->xstorm_ag_context.cdu_reserved =
1852 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
1853 ISCSI_CONNECTION_TYPE);
1854 ictx->ustorm_ag_context.cdu_usage =
1855 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
1856 ISCSI_CONNECTION_TYPE);
1861 static int cnic_bnx2x_iscsi_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
1864 struct iscsi_kwqe_conn_offload1 *req1;
1865 struct iscsi_kwqe_conn_offload2 *req2;
1866 struct cnic_local *cp = dev->cnic_priv;
1867 struct bnx2x *bp = netdev_priv(dev->netdev);
1868 struct cnic_context *ctx;
1869 struct iscsi_kcqe kcqe;
1870 struct kcqe *cqes[1];
1879 req1 = (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1880 req2 = (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1881 if ((num - 2) < req2->num_additional_wqes) {
1885 *work = 2 + req2->num_additional_wqes;
1887 l5_cid = req1->iscsi_conn_id;
1888 if (l5_cid >= MAX_ISCSI_TBL_SZ)
1891 memset(&kcqe, 0, sizeof(kcqe));
1892 kcqe.op_code = ISCSI_KCQE_OPCODE_OFFLOAD_CONN;
1893 kcqe.iscsi_conn_id = l5_cid;
1894 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
1896 ctx = &cp->ctx_tbl[l5_cid];
1897 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags)) {
1898 kcqe.completion_status =
1899 ISCSI_KCQE_COMPLETION_STATUS_CID_BUSY;
1903 if (atomic_inc_return(&cp->iscsi_conn) > dev->max_iscsi_conn) {
1904 atomic_dec(&cp->iscsi_conn);
1907 ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
1909 atomic_dec(&cp->iscsi_conn);
1913 ret = cnic_setup_bnx2x_ctx(dev, wqes, num);
1915 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1916 atomic_dec(&cp->iscsi_conn);
1920 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1921 kcqe.iscsi_conn_context_id = BNX2X_HW_CID(bp, cp->ctx_tbl[l5_cid].cid);
1924 cqes[0] = (struct kcqe *) &kcqe;
1925 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1930 static int cnic_bnx2x_iscsi_update(struct cnic_dev *dev, struct kwqe *kwqe)
1932 struct cnic_local *cp = dev->cnic_priv;
1933 struct iscsi_kwqe_conn_update *req =
1934 (struct iscsi_kwqe_conn_update *) kwqe;
1936 union l5cm_specific_data l5_data;
1937 u32 l5_cid, cid = BNX2X_SW_CID(req->context_id);
1940 if (cnic_get_l5_cid(cp, cid, &l5_cid) != 0)
1943 data = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1947 memcpy(data, kwqe, sizeof(struct kwqe));
1949 ret = cnic_submit_kwqe_16(dev, ISCSI_RAMROD_CMD_ID_UPDATE_CONN,
1950 req->context_id, ISCSI_CONNECTION_TYPE, &l5_data);
1954 static int cnic_bnx2x_destroy_ramrod(struct cnic_dev *dev, u32 l5_cid)
1956 struct cnic_local *cp = dev->cnic_priv;
1957 struct bnx2x *bp = netdev_priv(dev->netdev);
1958 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1959 union l5cm_specific_data l5_data;
1963 init_waitqueue_head(&ctx->waitq);
1965 memset(&l5_data, 0, sizeof(l5_data));
1966 hw_cid = BNX2X_HW_CID(bp, ctx->cid);
1968 ret = cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL,
1969 hw_cid, NONE_CONNECTION_TYPE, &l5_data);
1972 wait_event_timeout(ctx->waitq, ctx->wait_cond, CNIC_RAMROD_TMO);
1973 if (unlikely(test_bit(CTX_FL_CID_ERROR, &ctx->ctx_flags)))
1980 static int cnic_bnx2x_iscsi_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
1982 struct cnic_local *cp = dev->cnic_priv;
1983 struct iscsi_kwqe_conn_destroy *req =
1984 (struct iscsi_kwqe_conn_destroy *) kwqe;
1985 u32 l5_cid = req->reserved0;
1986 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1988 struct iscsi_kcqe kcqe;
1989 struct kcqe *cqes[1];
1991 if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
1992 goto skip_cfc_delete;
1994 if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) {
1995 unsigned long delta = ctx->timestamp + (2 * HZ) - jiffies;
1997 if (delta > (2 * HZ))
2000 set_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags);
2001 queue_delayed_work(cnic_wq, &cp->delete_task, delta);
2005 ret = cnic_bnx2x_destroy_ramrod(dev, l5_cid);
2008 cnic_free_bnx2x_conn_resc(dev, l5_cid);
2011 atomic_dec(&cp->iscsi_conn);
2012 clear_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2016 memset(&kcqe, 0, sizeof(kcqe));
2017 kcqe.op_code = ISCSI_KCQE_OPCODE_DESTROY_CONN;
2018 kcqe.iscsi_conn_id = l5_cid;
2019 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
2020 kcqe.iscsi_conn_context_id = req->context_id;
2022 cqes[0] = (struct kcqe *) &kcqe;
2023 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
2028 static void cnic_init_storm_conn_bufs(struct cnic_dev *dev,
2029 struct l4_kwq_connect_req1 *kwqe1,
2030 struct l4_kwq_connect_req3 *kwqe3,
2031 struct l5cm_active_conn_buffer *conn_buf)
2033 struct l5cm_conn_addr_params *conn_addr = &conn_buf->conn_addr_buf;
2034 struct l5cm_xstorm_conn_buffer *xstorm_buf =
2035 &conn_buf->xstorm_conn_buffer;
2036 struct l5cm_tstorm_conn_buffer *tstorm_buf =
2037 &conn_buf->tstorm_conn_buffer;
2038 struct regpair context_addr;
2039 u32 cid = BNX2X_SW_CID(kwqe1->cid);
2040 struct in6_addr src_ip, dst_ip;
2044 addrp = (u32 *) &conn_addr->local_ip_addr;
2045 for (i = 0; i < 4; i++, addrp++)
2046 src_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
2048 addrp = (u32 *) &conn_addr->remote_ip_addr;
2049 for (i = 0; i < 4; i++, addrp++)
2050 dst_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
2052 cnic_get_bnx2x_ctx(dev, cid, 0, &context_addr);
2054 xstorm_buf->context_addr.hi = context_addr.hi;
2055 xstorm_buf->context_addr.lo = context_addr.lo;
2056 xstorm_buf->mss = 0xffff;
2057 xstorm_buf->rcv_buf = kwqe3->rcv_buf;
2058 if (kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE)
2059 xstorm_buf->params |= L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE;
2060 xstorm_buf->pseudo_header_checksum =
2061 swab16(~csum_ipv6_magic(&src_ip, &dst_ip, 0, IPPROTO_TCP, 0));
2063 if (kwqe3->ka_timeout) {
2064 tstorm_buf->ka_enable = 1;
2065 tstorm_buf->ka_timeout = kwqe3->ka_timeout;
2066 tstorm_buf->ka_interval = kwqe3->ka_interval;
2067 tstorm_buf->ka_max_probe_count = kwqe3->ka_max_probe_count;
2069 tstorm_buf->max_rt_time = 0xffffffff;
2072 static void cnic_init_bnx2x_mac(struct cnic_dev *dev)
2074 struct bnx2x *bp = netdev_priv(dev->netdev);
2075 u32 pfid = bp->pfid;
2076 u8 *mac = dev->mac_addr;
2078 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2079 XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfid), mac[0]);
2080 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2081 XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfid), mac[1]);
2082 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2083 XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfid), mac[2]);
2084 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2085 XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfid), mac[3]);
2086 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2087 XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfid), mac[4]);
2088 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2089 XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfid), mac[5]);
2091 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2092 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[5]);
2093 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2094 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
2096 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2097 TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfid), mac[3]);
2098 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2099 TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
2101 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2102 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[1]);
2103 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2104 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
2108 static int cnic_bnx2x_connect(struct cnic_dev *dev, struct kwqe *wqes[],
2111 struct cnic_local *cp = dev->cnic_priv;
2112 struct bnx2x *bp = netdev_priv(dev->netdev);
2113 struct l4_kwq_connect_req1 *kwqe1 =
2114 (struct l4_kwq_connect_req1 *) wqes[0];
2115 struct l4_kwq_connect_req3 *kwqe3;
2116 struct l5cm_active_conn_buffer *conn_buf;
2117 struct l5cm_conn_addr_params *conn_addr;
2118 union l5cm_specific_data l5_data;
2119 u32 l5_cid = kwqe1->pg_cid;
2120 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
2121 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
2129 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6)
2139 if (sizeof(*conn_buf) > CNIC_KWQ16_DATA_SIZE) {
2140 netdev_err(dev->netdev, "conn_buf size too big\n");
2143 conn_buf = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2147 memset(conn_buf, 0, sizeof(*conn_buf));
2149 conn_addr = &conn_buf->conn_addr_buf;
2150 conn_addr->remote_addr_0 = csk->ha[0];
2151 conn_addr->remote_addr_1 = csk->ha[1];
2152 conn_addr->remote_addr_2 = csk->ha[2];
2153 conn_addr->remote_addr_3 = csk->ha[3];
2154 conn_addr->remote_addr_4 = csk->ha[4];
2155 conn_addr->remote_addr_5 = csk->ha[5];
2157 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6) {
2158 struct l4_kwq_connect_req2 *kwqe2 =
2159 (struct l4_kwq_connect_req2 *) wqes[1];
2161 conn_addr->local_ip_addr.ip_addr_hi_hi = kwqe2->src_ip_v6_4;
2162 conn_addr->local_ip_addr.ip_addr_hi_lo = kwqe2->src_ip_v6_3;
2163 conn_addr->local_ip_addr.ip_addr_lo_hi = kwqe2->src_ip_v6_2;
2165 conn_addr->remote_ip_addr.ip_addr_hi_hi = kwqe2->dst_ip_v6_4;
2166 conn_addr->remote_ip_addr.ip_addr_hi_lo = kwqe2->dst_ip_v6_3;
2167 conn_addr->remote_ip_addr.ip_addr_lo_hi = kwqe2->dst_ip_v6_2;
2168 conn_addr->params |= L5CM_CONN_ADDR_PARAMS_IP_VERSION;
2170 kwqe3 = (struct l4_kwq_connect_req3 *) wqes[*work - 1];
2172 conn_addr->local_ip_addr.ip_addr_lo_lo = kwqe1->src_ip;
2173 conn_addr->remote_ip_addr.ip_addr_lo_lo = kwqe1->dst_ip;
2174 conn_addr->local_tcp_port = kwqe1->src_port;
2175 conn_addr->remote_tcp_port = kwqe1->dst_port;
2177 conn_addr->pmtu = kwqe3->pmtu;
2178 cnic_init_storm_conn_bufs(dev, kwqe1, kwqe3, conn_buf);
2180 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
2181 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(bp->pfid), csk->vlan_id);
2183 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_TCP_CONNECT,
2184 kwqe1->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2186 set_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2191 static int cnic_bnx2x_close(struct cnic_dev *dev, struct kwqe *kwqe)
2193 struct l4_kwq_close_req *req = (struct l4_kwq_close_req *) kwqe;
2194 union l5cm_specific_data l5_data;
2197 memset(&l5_data, 0, sizeof(l5_data));
2198 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_CLOSE,
2199 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2203 static int cnic_bnx2x_reset(struct cnic_dev *dev, struct kwqe *kwqe)
2205 struct l4_kwq_reset_req *req = (struct l4_kwq_reset_req *) kwqe;
2206 union l5cm_specific_data l5_data;
2209 memset(&l5_data, 0, sizeof(l5_data));
2210 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_ABORT,
2211 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2214 static int cnic_bnx2x_offload_pg(struct cnic_dev *dev, struct kwqe *kwqe)
2216 struct l4_kwq_offload_pg *req = (struct l4_kwq_offload_pg *) kwqe;
2218 struct kcqe *cqes[1];
2220 memset(&kcqe, 0, sizeof(kcqe));
2221 kcqe.pg_host_opaque = req->host_opaque;
2222 kcqe.pg_cid = req->host_opaque;
2223 kcqe.op_code = L4_KCQE_OPCODE_VALUE_OFFLOAD_PG;
2224 cqes[0] = (struct kcqe *) &kcqe;
2225 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
2229 static int cnic_bnx2x_update_pg(struct cnic_dev *dev, struct kwqe *kwqe)
2231 struct l4_kwq_update_pg *req = (struct l4_kwq_update_pg *) kwqe;
2233 struct kcqe *cqes[1];
2235 memset(&kcqe, 0, sizeof(kcqe));
2236 kcqe.pg_host_opaque = req->pg_host_opaque;
2237 kcqe.pg_cid = req->pg_cid;
2238 kcqe.op_code = L4_KCQE_OPCODE_VALUE_UPDATE_PG;
2239 cqes[0] = (struct kcqe *) &kcqe;
2240 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
2244 static int cnic_bnx2x_fcoe_stat(struct cnic_dev *dev, struct kwqe *kwqe)
2246 struct fcoe_kwqe_stat *req;
2247 struct fcoe_stat_ramrod_params *fcoe_stat;
2248 union l5cm_specific_data l5_data;
2249 struct cnic_local *cp = dev->cnic_priv;
2250 struct bnx2x *bp = netdev_priv(dev->netdev);
2254 req = (struct fcoe_kwqe_stat *) kwqe;
2255 cid = BNX2X_HW_CID(bp, cp->fcoe_init_cid);
2257 fcoe_stat = cnic_get_kwqe_16_data(cp, BNX2X_FCOE_L5_CID_BASE, &l5_data);
2261 memset(fcoe_stat, 0, sizeof(*fcoe_stat));
2262 memcpy(&fcoe_stat->stat_kwqe, req, sizeof(*req));
2264 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_STAT_FUNC, cid,
2265 FCOE_CONNECTION_TYPE, &l5_data);
2269 static int cnic_bnx2x_fcoe_init1(struct cnic_dev *dev, struct kwqe *wqes[],
2273 struct cnic_local *cp = dev->cnic_priv;
2274 struct bnx2x *bp = netdev_priv(dev->netdev);
2276 struct fcoe_init_ramrod_params *fcoe_init;
2277 struct fcoe_kwqe_init1 *req1;
2278 struct fcoe_kwqe_init2 *req2;
2279 struct fcoe_kwqe_init3 *req3;
2280 union l5cm_specific_data l5_data;
2286 req1 = (struct fcoe_kwqe_init1 *) wqes[0];
2287 req2 = (struct fcoe_kwqe_init2 *) wqes[1];
2288 req3 = (struct fcoe_kwqe_init3 *) wqes[2];
2289 if (req2->hdr.op_code != FCOE_KWQE_OPCODE_INIT2) {
2293 if (req3->hdr.op_code != FCOE_KWQE_OPCODE_INIT3) {
2298 if (sizeof(*fcoe_init) > CNIC_KWQ16_DATA_SIZE) {
2299 netdev_err(dev->netdev, "fcoe_init size too big\n");
2302 fcoe_init = cnic_get_kwqe_16_data(cp, BNX2X_FCOE_L5_CID_BASE, &l5_data);
2306 memset(fcoe_init, 0, sizeof(*fcoe_init));
2307 memcpy(&fcoe_init->init_kwqe1, req1, sizeof(*req1));
2308 memcpy(&fcoe_init->init_kwqe2, req2, sizeof(*req2));
2309 memcpy(&fcoe_init->init_kwqe3, req3, sizeof(*req3));
2310 fcoe_init->eq_pbl_base.lo = cp->kcq2.dma.pgtbl_map & 0xffffffff;
2311 fcoe_init->eq_pbl_base.hi = (u64) cp->kcq2.dma.pgtbl_map >> 32;
2312 fcoe_init->eq_pbl_size = cp->kcq2.dma.num_pages;
2314 fcoe_init->sb_num = cp->status_blk_num;
2315 fcoe_init->eq_prod = MAX_KCQ_IDX;
2316 fcoe_init->sb_id = HC_INDEX_FCOE_EQ_CONS;
2317 cp->kcq2.sw_prod_idx = 0;
2319 cid = BNX2X_HW_CID(bp, cp->fcoe_init_cid);
2320 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_INIT_FUNC, cid,
2321 FCOE_CONNECTION_TYPE, &l5_data);
2326 static int cnic_bnx2x_fcoe_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
2330 u32 cid = -1, l5_cid;
2331 struct cnic_local *cp = dev->cnic_priv;
2332 struct bnx2x *bp = netdev_priv(dev->netdev);
2333 struct fcoe_kwqe_conn_offload1 *req1;
2334 struct fcoe_kwqe_conn_offload2 *req2;
2335 struct fcoe_kwqe_conn_offload3 *req3;
2336 struct fcoe_kwqe_conn_offload4 *req4;
2337 struct fcoe_conn_offload_ramrod_params *fcoe_offload;
2338 struct cnic_context *ctx;
2339 struct fcoe_context *fctx;
2340 struct regpair ctx_addr;
2341 union l5cm_specific_data l5_data;
2342 struct fcoe_kcqe kcqe;
2343 struct kcqe *cqes[1];
2349 req1 = (struct fcoe_kwqe_conn_offload1 *) wqes[0];
2350 req2 = (struct fcoe_kwqe_conn_offload2 *) wqes[1];
2351 req3 = (struct fcoe_kwqe_conn_offload3 *) wqes[2];
2352 req4 = (struct fcoe_kwqe_conn_offload4 *) wqes[3];
2356 l5_cid = req1->fcoe_conn_id;
2357 if (l5_cid >= dev->max_fcoe_conn)
2360 l5_cid += BNX2X_FCOE_L5_CID_BASE;
2362 ctx = &cp->ctx_tbl[l5_cid];
2363 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2366 ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
2373 fctx = cnic_get_bnx2x_ctx(dev, cid, 1, &ctx_addr);
2375 u32 hw_cid = BNX2X_HW_CID(bp, cid);
2378 val = CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
2379 FCOE_CONNECTION_TYPE);
2380 fctx->xstorm_ag_context.cdu_reserved = val;
2381 val = CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
2382 FCOE_CONNECTION_TYPE);
2383 fctx->ustorm_ag_context.cdu_usage = val;
2385 if (sizeof(*fcoe_offload) > CNIC_KWQ16_DATA_SIZE) {
2386 netdev_err(dev->netdev, "fcoe_offload size too big\n");
2389 fcoe_offload = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2393 memset(fcoe_offload, 0, sizeof(*fcoe_offload));
2394 memcpy(&fcoe_offload->offload_kwqe1, req1, sizeof(*req1));
2395 memcpy(&fcoe_offload->offload_kwqe2, req2, sizeof(*req2));
2396 memcpy(&fcoe_offload->offload_kwqe3, req3, sizeof(*req3));
2397 memcpy(&fcoe_offload->offload_kwqe4, req4, sizeof(*req4));
2399 cid = BNX2X_HW_CID(bp, cid);
2400 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_OFFLOAD_CONN, cid,
2401 FCOE_CONNECTION_TYPE, &l5_data);
2403 set_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2409 cnic_free_bnx2x_conn_resc(dev, l5_cid);
2411 memset(&kcqe, 0, sizeof(kcqe));
2412 kcqe.op_code = FCOE_KCQE_OPCODE_OFFLOAD_CONN;
2413 kcqe.fcoe_conn_id = req1->fcoe_conn_id;
2414 kcqe.completion_status = FCOE_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
2416 cqes[0] = (struct kcqe *) &kcqe;
2417 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_FCOE, cqes, 1);
2421 static int cnic_bnx2x_fcoe_enable(struct cnic_dev *dev, struct kwqe *kwqe)
2423 struct fcoe_kwqe_conn_enable_disable *req;
2424 struct fcoe_conn_enable_disable_ramrod_params *fcoe_enable;
2425 union l5cm_specific_data l5_data;
2428 struct cnic_local *cp = dev->cnic_priv;
2430 req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2431 cid = req->context_id;
2432 l5_cid = req->conn_id + BNX2X_FCOE_L5_CID_BASE;
2434 if (sizeof(*fcoe_enable) > CNIC_KWQ16_DATA_SIZE) {
2435 netdev_err(dev->netdev, "fcoe_enable size too big\n");
2438 fcoe_enable = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2442 memset(fcoe_enable, 0, sizeof(*fcoe_enable));
2443 memcpy(&fcoe_enable->enable_disable_kwqe, req, sizeof(*req));
2444 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_ENABLE_CONN, cid,
2445 FCOE_CONNECTION_TYPE, &l5_data);
2449 static int cnic_bnx2x_fcoe_disable(struct cnic_dev *dev, struct kwqe *kwqe)
2451 struct fcoe_kwqe_conn_enable_disable *req;
2452 struct fcoe_conn_enable_disable_ramrod_params *fcoe_disable;
2453 union l5cm_specific_data l5_data;
2456 struct cnic_local *cp = dev->cnic_priv;
2458 req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2459 cid = req->context_id;
2460 l5_cid = req->conn_id;
2461 if (l5_cid >= dev->max_fcoe_conn)
2464 l5_cid += BNX2X_FCOE_L5_CID_BASE;
2466 if (sizeof(*fcoe_disable) > CNIC_KWQ16_DATA_SIZE) {
2467 netdev_err(dev->netdev, "fcoe_disable size too big\n");
2470 fcoe_disable = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2474 memset(fcoe_disable, 0, sizeof(*fcoe_disable));
2475 memcpy(&fcoe_disable->enable_disable_kwqe, req, sizeof(*req));
2476 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_DISABLE_CONN, cid,
2477 FCOE_CONNECTION_TYPE, &l5_data);
2481 static int cnic_bnx2x_fcoe_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
2483 struct fcoe_kwqe_conn_destroy *req;
2484 union l5cm_specific_data l5_data;
2487 struct cnic_local *cp = dev->cnic_priv;
2488 struct cnic_context *ctx;
2489 struct fcoe_kcqe kcqe;
2490 struct kcqe *cqes[1];
2492 req = (struct fcoe_kwqe_conn_destroy *) kwqe;
2493 cid = req->context_id;
2494 l5_cid = req->conn_id;
2495 if (l5_cid >= dev->max_fcoe_conn)
2498 l5_cid += BNX2X_FCOE_L5_CID_BASE;
2500 ctx = &cp->ctx_tbl[l5_cid];
2502 init_waitqueue_head(&ctx->waitq);
2505 memset(&kcqe, 0, sizeof(kcqe));
2506 kcqe.completion_status = FCOE_KCQE_COMPLETION_STATUS_ERROR;
2507 memset(&l5_data, 0, sizeof(l5_data));
2508 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_TERMINATE_CONN, cid,
2509 FCOE_CONNECTION_TYPE, &l5_data);
2511 wait_event_timeout(ctx->waitq, ctx->wait_cond, CNIC_RAMROD_TMO);
2513 kcqe.completion_status = 0;
2516 set_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags);
2517 queue_delayed_work(cnic_wq, &cp->delete_task, msecs_to_jiffies(2000));
2519 kcqe.op_code = FCOE_KCQE_OPCODE_DESTROY_CONN;
2520 kcqe.fcoe_conn_id = req->conn_id;
2521 kcqe.fcoe_conn_context_id = cid;
2523 cqes[0] = (struct kcqe *) &kcqe;
2524 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_FCOE, cqes, 1);
2528 static void cnic_bnx2x_delete_wait(struct cnic_dev *dev, u32 start_cid)
2530 struct cnic_local *cp = dev->cnic_priv;
2533 for (i = start_cid; i < cp->max_cid_space; i++) {
2534 struct cnic_context *ctx = &cp->ctx_tbl[i];
2537 while (test_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
2540 for (j = 0; j < 5; j++) {
2541 if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2546 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2547 netdev_warn(dev->netdev, "CID %x not deleted\n",
2552 static int cnic_bnx2x_fcoe_fw_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
2554 struct fcoe_kwqe_destroy *req;
2555 union l5cm_specific_data l5_data;
2556 struct cnic_local *cp = dev->cnic_priv;
2557 struct bnx2x *bp = netdev_priv(dev->netdev);
2561 cnic_bnx2x_delete_wait(dev, MAX_ISCSI_TBL_SZ);
2563 req = (struct fcoe_kwqe_destroy *) kwqe;
2564 cid = BNX2X_HW_CID(bp, cp->fcoe_init_cid);
2566 memset(&l5_data, 0, sizeof(l5_data));
2567 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_DESTROY_FUNC, cid,
2568 FCOE_CONNECTION_TYPE, &l5_data);
2572 static void cnic_bnx2x_kwqe_err(struct cnic_dev *dev, struct kwqe *kwqe)
2574 struct cnic_local *cp = dev->cnic_priv;
2576 struct kcqe *cqes[1];
2578 u32 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2579 u32 layer_code = kwqe->kwqe_op_flag & KWQE_LAYER_MASK;
2583 cid = kwqe->kwqe_info0;
2584 memset(&kcqe, 0, sizeof(kcqe));
2586 if (layer_code == KWQE_FLAGS_LAYER_MASK_L5_FCOE) {
2589 ulp_type = CNIC_ULP_FCOE;
2590 if (opcode == FCOE_KWQE_OPCODE_DISABLE_CONN) {
2591 struct fcoe_kwqe_conn_enable_disable *req;
2593 req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2594 kcqe_op = FCOE_KCQE_OPCODE_DISABLE_CONN;
2595 cid = req->context_id;
2596 l5_cid = req->conn_id;
2597 } else if (opcode == FCOE_KWQE_OPCODE_DESTROY) {
2598 kcqe_op = FCOE_KCQE_OPCODE_DESTROY_FUNC;
2602 kcqe.kcqe_op_flag = kcqe_op << KCQE_FLAGS_OPCODE_SHIFT;
2603 kcqe.kcqe_op_flag |= KCQE_FLAGS_LAYER_MASK_L5_FCOE;
2604 kcqe.kcqe_info1 = FCOE_KCQE_COMPLETION_STATUS_PARITY_ERROR;
2605 kcqe.kcqe_info2 = cid;
2606 kcqe.kcqe_info0 = l5_cid;
2608 } else if (layer_code == KWQE_FLAGS_LAYER_MASK_L5_ISCSI) {
2609 ulp_type = CNIC_ULP_ISCSI;
2610 if (opcode == ISCSI_KWQE_OPCODE_UPDATE_CONN)
2611 cid = kwqe->kwqe_info1;
2613 kcqe.kcqe_op_flag = (opcode + 0x10) << KCQE_FLAGS_OPCODE_SHIFT;
2614 kcqe.kcqe_op_flag |= KCQE_FLAGS_LAYER_MASK_L5_ISCSI;
2615 kcqe.kcqe_info1 = ISCSI_KCQE_COMPLETION_STATUS_PARITY_ERR;
2616 kcqe.kcqe_info2 = cid;
2617 cnic_get_l5_cid(cp, BNX2X_SW_CID(cid), &kcqe.kcqe_info0);
2619 } else if (layer_code == KWQE_FLAGS_LAYER_MASK_L4) {
2620 struct l4_kcq *l4kcqe = (struct l4_kcq *) &kcqe;
2622 ulp_type = CNIC_ULP_L4;
2623 if (opcode == L4_KWQE_OPCODE_VALUE_CONNECT1)
2624 kcqe_op = L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE;
2625 else if (opcode == L4_KWQE_OPCODE_VALUE_RESET)
2626 kcqe_op = L4_KCQE_OPCODE_VALUE_RESET_COMP;
2627 else if (opcode == L4_KWQE_OPCODE_VALUE_CLOSE)
2628 kcqe_op = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
2632 kcqe.kcqe_op_flag = (kcqe_op << KCQE_FLAGS_OPCODE_SHIFT) |
2633 KCQE_FLAGS_LAYER_MASK_L4;
2634 l4kcqe->status = L4_KCQE_COMPLETION_STATUS_PARITY_ERROR;
2636 cnic_get_l5_cid(cp, BNX2X_SW_CID(cid), &l4kcqe->conn_id);
2642 cnic_reply_bnx2x_kcqes(dev, ulp_type, cqes, 1);
2645 static int cnic_submit_bnx2x_iscsi_kwqes(struct cnic_dev *dev,
2646 struct kwqe *wqes[], u32 num_wqes)
2652 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2653 return -EAGAIN; /* bnx2 is down */
2655 for (i = 0; i < num_wqes; ) {
2657 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2661 case ISCSI_KWQE_OPCODE_INIT1:
2662 ret = cnic_bnx2x_iscsi_init1(dev, kwqe);
2664 case ISCSI_KWQE_OPCODE_INIT2:
2665 ret = cnic_bnx2x_iscsi_init2(dev, kwqe);
2667 case ISCSI_KWQE_OPCODE_OFFLOAD_CONN1:
2668 ret = cnic_bnx2x_iscsi_ofld1(dev, &wqes[i],
2669 num_wqes - i, &work);
2671 case ISCSI_KWQE_OPCODE_UPDATE_CONN:
2672 ret = cnic_bnx2x_iscsi_update(dev, kwqe);
2674 case ISCSI_KWQE_OPCODE_DESTROY_CONN:
2675 ret = cnic_bnx2x_iscsi_destroy(dev, kwqe);
2677 case L4_KWQE_OPCODE_VALUE_CONNECT1:
2678 ret = cnic_bnx2x_connect(dev, &wqes[i], num_wqes - i,
2681 case L4_KWQE_OPCODE_VALUE_CLOSE:
2682 ret = cnic_bnx2x_close(dev, kwqe);
2684 case L4_KWQE_OPCODE_VALUE_RESET:
2685 ret = cnic_bnx2x_reset(dev, kwqe);
2687 case L4_KWQE_OPCODE_VALUE_OFFLOAD_PG:
2688 ret = cnic_bnx2x_offload_pg(dev, kwqe);
2690 case L4_KWQE_OPCODE_VALUE_UPDATE_PG:
2691 ret = cnic_bnx2x_update_pg(dev, kwqe);
2693 case L4_KWQE_OPCODE_VALUE_UPLOAD_PG:
2698 netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2703 netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2706 /* Possibly bnx2x parity error, send completion
2707 * to ulp drivers with error code to speed up
2708 * cleanup and reset recovery.
2710 if (ret == -EIO || ret == -EAGAIN)
2711 cnic_bnx2x_kwqe_err(dev, kwqe);
2718 static int cnic_submit_bnx2x_fcoe_kwqes(struct cnic_dev *dev,
2719 struct kwqe *wqes[], u32 num_wqes)
2721 struct bnx2x *bp = netdev_priv(dev->netdev);
2726 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2727 return -EAGAIN; /* bnx2 is down */
2729 if (!BNX2X_CHIP_IS_E2_PLUS(bp))
2732 for (i = 0; i < num_wqes; ) {
2734 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2738 case FCOE_KWQE_OPCODE_INIT1:
2739 ret = cnic_bnx2x_fcoe_init1(dev, &wqes[i],
2740 num_wqes - i, &work);
2742 case FCOE_KWQE_OPCODE_OFFLOAD_CONN1:
2743 ret = cnic_bnx2x_fcoe_ofld1(dev, &wqes[i],
2744 num_wqes - i, &work);
2746 case FCOE_KWQE_OPCODE_ENABLE_CONN:
2747 ret = cnic_bnx2x_fcoe_enable(dev, kwqe);
2749 case FCOE_KWQE_OPCODE_DISABLE_CONN:
2750 ret = cnic_bnx2x_fcoe_disable(dev, kwqe);
2752 case FCOE_KWQE_OPCODE_DESTROY_CONN:
2753 ret = cnic_bnx2x_fcoe_destroy(dev, kwqe);
2755 case FCOE_KWQE_OPCODE_DESTROY:
2756 ret = cnic_bnx2x_fcoe_fw_destroy(dev, kwqe);
2758 case FCOE_KWQE_OPCODE_STAT:
2759 ret = cnic_bnx2x_fcoe_stat(dev, kwqe);
2763 netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2768 netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2771 /* Possibly bnx2x parity error, send completion
2772 * to ulp drivers with error code to speed up
2773 * cleanup and reset recovery.
2775 if (ret == -EIO || ret == -EAGAIN)
2776 cnic_bnx2x_kwqe_err(dev, kwqe);
2783 static int cnic_submit_bnx2x_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
2789 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2790 return -EAGAIN; /* bnx2x is down */
2795 layer_code = wqes[0]->kwqe_op_flag & KWQE_LAYER_MASK;
2796 switch (layer_code) {
2797 case KWQE_FLAGS_LAYER_MASK_L5_ISCSI:
2798 case KWQE_FLAGS_LAYER_MASK_L4:
2799 case KWQE_FLAGS_LAYER_MASK_L2:
2800 ret = cnic_submit_bnx2x_iscsi_kwqes(dev, wqes, num_wqes);
2803 case KWQE_FLAGS_LAYER_MASK_L5_FCOE:
2804 ret = cnic_submit_bnx2x_fcoe_kwqes(dev, wqes, num_wqes);
2810 static inline u32 cnic_get_kcqe_layer_mask(u32 opflag)
2812 if (unlikely(KCQE_OPCODE(opflag) == FCOE_RAMROD_CMD_ID_TERMINATE_CONN))
2813 return KCQE_FLAGS_LAYER_MASK_L4;
2815 return opflag & KCQE_FLAGS_LAYER_MASK;
2818 static void service_kcqes(struct cnic_dev *dev, int num_cqes)
2820 struct cnic_local *cp = dev->cnic_priv;
2826 struct cnic_ulp_ops *ulp_ops;
2828 u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
2829 u32 kcqe_layer = cnic_get_kcqe_layer_mask(kcqe_op_flag);
2831 if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
2834 while (j < num_cqes) {
2835 u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
2837 if (cnic_get_kcqe_layer_mask(next_op) != kcqe_layer)
2840 if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
2845 if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
2846 ulp_type = CNIC_ULP_RDMA;
2847 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
2848 ulp_type = CNIC_ULP_ISCSI;
2849 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_FCOE)
2850 ulp_type = CNIC_ULP_FCOE;
2851 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
2852 ulp_type = CNIC_ULP_L4;
2853 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
2856 netdev_err(dev->netdev, "Unknown type of KCQE(0x%x)\n",
2862 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
2863 if (likely(ulp_ops)) {
2864 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
2865 cp->completed_kcq + i, j);
2874 cnic_spq_completion(dev, DRV_CTL_RET_L5_SPQ_CREDIT_CMD, comp);
2877 static int cnic_get_kcqes(struct cnic_dev *dev, struct kcq_info *info)
2879 struct cnic_local *cp = dev->cnic_priv;
2880 u16 i, ri, hw_prod, last;
2882 int kcqe_cnt = 0, last_cnt = 0;
2884 i = ri = last = info->sw_prod_idx;
2886 hw_prod = *info->hw_prod_idx_ptr;
2887 hw_prod = info->hw_idx(hw_prod);
2889 while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
2890 kcqe = &info->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
2891 cp->completed_kcq[kcqe_cnt++] = kcqe;
2892 i = info->next_idx(i);
2893 ri = i & MAX_KCQ_IDX;
2894 if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
2895 last_cnt = kcqe_cnt;
2900 info->sw_prod_idx = last;
2904 static int cnic_l2_completion(struct cnic_local *cp)
2906 u16 hw_cons, sw_cons;
2907 struct cnic_uio_dev *udev = cp->udev;
2908 union eth_rx_cqe *cqe, *cqe_ring = (union eth_rx_cqe *)
2909 (udev->l2_ring + (2 * CNIC_PAGE_SIZE));
2913 if (!test_bit(CNIC_F_BNX2X_CLASS, &cp->dev->flags))
2916 hw_cons = *cp->rx_cons_ptr;
2917 if ((hw_cons & BNX2X_MAX_RCQ_DESC_CNT) == BNX2X_MAX_RCQ_DESC_CNT)
2920 sw_cons = cp->rx_cons;
2921 while (sw_cons != hw_cons) {
2924 cqe = &cqe_ring[sw_cons & BNX2X_MAX_RCQ_DESC_CNT];
2925 cqe_fp_flags = cqe->fast_path_cqe.type_error_flags;
2926 if (cqe_fp_flags & ETH_FAST_PATH_RX_CQE_TYPE) {
2927 cmd = le32_to_cpu(cqe->ramrod_cqe.conn_and_cmd_data);
2928 cmd >>= COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT;
2929 if (cmd == RAMROD_CMD_ID_ETH_CLIENT_SETUP ||
2930 cmd == RAMROD_CMD_ID_ETH_HALT)
2933 sw_cons = BNX2X_NEXT_RCQE(sw_cons);
2938 static void cnic_chk_pkt_rings(struct cnic_local *cp)
2940 u16 rx_cons, tx_cons;
2943 if (!test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
2946 rx_cons = *cp->rx_cons_ptr;
2947 tx_cons = *cp->tx_cons_ptr;
2948 if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
2949 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
2950 comp = cnic_l2_completion(cp);
2952 cp->tx_cons = tx_cons;
2953 cp->rx_cons = rx_cons;
2956 uio_event_notify(&cp->udev->cnic_uinfo);
2959 clear_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
2962 static u32 cnic_service_bnx2_queues(struct cnic_dev *dev)
2964 struct cnic_local *cp = dev->cnic_priv;
2965 u32 status_idx = (u16) *cp->kcq1.status_idx_ptr;
2968 /* status block index must be read before reading other fields */
2970 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2972 while ((kcqe_cnt = cnic_get_kcqes(dev, &cp->kcq1))) {
2974 service_kcqes(dev, kcqe_cnt);
2976 /* Tell compiler that status_blk fields can change. */
2978 status_idx = (u16) *cp->kcq1.status_idx_ptr;
2979 /* status block index must be read first */
2981 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2984 CNIC_WR16(dev, cp->kcq1.io_addr, cp->kcq1.sw_prod_idx);
2986 cnic_chk_pkt_rings(cp);
2991 static int cnic_service_bnx2(void *data, void *status_blk)
2993 struct cnic_dev *dev = data;
2995 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
2996 struct status_block *sblk = status_blk;
2998 return sblk->status_idx;
3001 return cnic_service_bnx2_queues(dev);
3004 static void cnic_service_bnx2_msix(unsigned long data)
3006 struct cnic_dev *dev = (struct cnic_dev *) data;
3007 struct cnic_local *cp = dev->cnic_priv;
3009 cp->last_status_idx = cnic_service_bnx2_queues(dev);
3011 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
3012 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
3015 static void cnic_doirq(struct cnic_dev *dev)
3017 struct cnic_local *cp = dev->cnic_priv;
3019 if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
3020 u16 prod = cp->kcq1.sw_prod_idx & MAX_KCQ_IDX;
3022 prefetch(cp->status_blk.gen);
3023 prefetch(&cp->kcq1.kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
3025 tasklet_schedule(&cp->cnic_irq_task);
3029 static irqreturn_t cnic_irq(int irq, void *dev_instance)
3031 struct cnic_dev *dev = dev_instance;
3032 struct cnic_local *cp = dev->cnic_priv;
3042 static inline void cnic_ack_bnx2x_int(struct cnic_dev *dev, u8 id, u8 storm,
3043 u16 index, u8 op, u8 update)
3045 struct bnx2x *bp = netdev_priv(dev->netdev);
3046 u32 hc_addr = (HC_REG_COMMAND_REG + BP_PORT(bp) * 32 +
3047 COMMAND_REG_INT_ACK);
3048 struct igu_ack_register igu_ack;
3050 igu_ack.status_block_index = index;
3051 igu_ack.sb_id_and_flags =
3052 ((id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) |
3053 (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) |
3054 (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) |
3055 (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT));
3057 CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack));
3060 static void cnic_ack_igu_sb(struct cnic_dev *dev, u8 igu_sb_id, u8 segment,
3061 u16 index, u8 op, u8 update)
3063 struct igu_regular cmd_data;
3064 u32 igu_addr = BAR_IGU_INTMEM + (IGU_CMD_INT_ACK_BASE + igu_sb_id) * 8;
3066 cmd_data.sb_id_and_flags =
3067 (index << IGU_REGULAR_SB_INDEX_SHIFT) |
3068 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
3069 (update << IGU_REGULAR_BUPDATE_SHIFT) |
3070 (op << IGU_REGULAR_ENABLE_INT_SHIFT);
3073 CNIC_WR(dev, igu_addr, cmd_data.sb_id_and_flags);
3076 static void cnic_ack_bnx2x_msix(struct cnic_dev *dev)
3078 struct cnic_local *cp = dev->cnic_priv;
3080 cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, CSTORM_ID, 0,
3081 IGU_INT_DISABLE, 0);
3084 static void cnic_ack_bnx2x_e2_msix(struct cnic_dev *dev)
3086 struct cnic_local *cp = dev->cnic_priv;
3088 cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF, 0,
3089 IGU_INT_DISABLE, 0);
3092 static void cnic_arm_bnx2x_msix(struct cnic_dev *dev, u32 idx)
3094 struct cnic_local *cp = dev->cnic_priv;
3096 cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, CSTORM_ID, idx,
3100 static void cnic_arm_bnx2x_e2_msix(struct cnic_dev *dev, u32 idx)
3102 struct cnic_local *cp = dev->cnic_priv;
3104 cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF, idx,
3108 static u32 cnic_service_bnx2x_kcq(struct cnic_dev *dev, struct kcq_info *info)
3110 u32 last_status = *info->status_idx_ptr;
3113 /* status block index must be read before reading the KCQ */
3115 while ((kcqe_cnt = cnic_get_kcqes(dev, info))) {
3117 service_kcqes(dev, kcqe_cnt);
3119 /* Tell compiler that sblk fields can change. */
3122 last_status = *info->status_idx_ptr;
3123 /* status block index must be read before reading the KCQ */
3129 static void cnic_service_bnx2x_bh(unsigned long data)
3131 struct cnic_dev *dev = (struct cnic_dev *) data;
3132 struct cnic_local *cp = dev->cnic_priv;
3133 struct bnx2x *bp = netdev_priv(dev->netdev);
3134 u32 status_idx, new_status_idx;
3136 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
3140 status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq1);
3142 CNIC_WR16(dev, cp->kcq1.io_addr,
3143 cp->kcq1.sw_prod_idx + MAX_KCQ_IDX);
3145 if (!CNIC_SUPPORTS_FCOE(bp)) {
3146 cp->arm_int(dev, status_idx);
3150 new_status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq2);
3152 if (new_status_idx != status_idx)
3155 CNIC_WR16(dev, cp->kcq2.io_addr, cp->kcq2.sw_prod_idx +
3158 cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF,
3159 status_idx, IGU_INT_ENABLE, 1);
3165 static int cnic_service_bnx2x(void *data, void *status_blk)
3167 struct cnic_dev *dev = data;
3168 struct cnic_local *cp = dev->cnic_priv;
3170 if (!(cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3173 cnic_chk_pkt_rings(cp);
3178 static void cnic_ulp_stop_one(struct cnic_local *cp, int if_type)
3180 struct cnic_ulp_ops *ulp_ops;
3182 if (if_type == CNIC_ULP_ISCSI)
3183 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
3185 mutex_lock(&cnic_lock);
3186 ulp_ops = rcu_dereference_protected(cp->ulp_ops[if_type],
3187 lockdep_is_held(&cnic_lock));
3189 mutex_unlock(&cnic_lock);
3192 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3193 mutex_unlock(&cnic_lock);
3195 if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
3196 ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
3198 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3201 static void cnic_ulp_stop(struct cnic_dev *dev)
3203 struct cnic_local *cp = dev->cnic_priv;
3206 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++)
3207 cnic_ulp_stop_one(cp, if_type);
3210 static void cnic_ulp_start(struct cnic_dev *dev)
3212 struct cnic_local *cp = dev->cnic_priv;
3215 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
3216 struct cnic_ulp_ops *ulp_ops;
3218 mutex_lock(&cnic_lock);
3219 ulp_ops = rcu_dereference_protected(cp->ulp_ops[if_type],
3220 lockdep_is_held(&cnic_lock));
3221 if (!ulp_ops || !ulp_ops->cnic_start) {
3222 mutex_unlock(&cnic_lock);
3225 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3226 mutex_unlock(&cnic_lock);
3228 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
3229 ulp_ops->cnic_start(cp->ulp_handle[if_type]);
3231 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3235 static int cnic_copy_ulp_stats(struct cnic_dev *dev, int ulp_type)
3237 struct cnic_local *cp = dev->cnic_priv;
3238 struct cnic_ulp_ops *ulp_ops;
3241 mutex_lock(&cnic_lock);
3242 ulp_ops = rcu_dereference_protected(cp->ulp_ops[ulp_type],
3243 lockdep_is_held(&cnic_lock));
3244 if (ulp_ops && ulp_ops->cnic_get_stats)
3245 rc = ulp_ops->cnic_get_stats(cp->ulp_handle[ulp_type]);
3248 mutex_unlock(&cnic_lock);
3252 static int cnic_ctl(void *data, struct cnic_ctl_info *info)
3254 struct cnic_dev *dev = data;
3255 int ulp_type = CNIC_ULP_ISCSI;
3257 switch (info->cmd) {
3258 case CNIC_CTL_STOP_CMD:
3266 case CNIC_CTL_START_CMD:
3269 if (!cnic_start_hw(dev))
3270 cnic_ulp_start(dev);
3274 case CNIC_CTL_STOP_ISCSI_CMD: {
3275 struct cnic_local *cp = dev->cnic_priv;
3276 set_bit(CNIC_LCL_FL_STOP_ISCSI, &cp->cnic_local_flags);
3277 queue_delayed_work(cnic_wq, &cp->delete_task, 0);
3280 case CNIC_CTL_COMPLETION_CMD: {
3281 struct cnic_ctl_completion *comp = &info->data.comp;
3282 u32 cid = BNX2X_SW_CID(comp->cid);
3284 struct cnic_local *cp = dev->cnic_priv;
3286 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
3289 if (cnic_get_l5_cid(cp, cid, &l5_cid) == 0) {
3290 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3292 if (unlikely(comp->error)) {
3293 set_bit(CTX_FL_CID_ERROR, &ctx->ctx_flags);
3294 netdev_err(dev->netdev,
3295 "CID %x CFC delete comp error %x\n",
3300 wake_up(&ctx->waitq);
3304 case CNIC_CTL_FCOE_STATS_GET_CMD:
3305 ulp_type = CNIC_ULP_FCOE;
3307 case CNIC_CTL_ISCSI_STATS_GET_CMD:
3309 cnic_copy_ulp_stats(dev, ulp_type);
3319 static void cnic_ulp_init(struct cnic_dev *dev)
3322 struct cnic_local *cp = dev->cnic_priv;
3324 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
3325 struct cnic_ulp_ops *ulp_ops;
3327 mutex_lock(&cnic_lock);
3328 ulp_ops = cnic_ulp_tbl_prot(i);
3329 if (!ulp_ops || !ulp_ops->cnic_init) {
3330 mutex_unlock(&cnic_lock);
3334 mutex_unlock(&cnic_lock);
3336 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
3337 ulp_ops->cnic_init(dev);
3343 static void cnic_ulp_exit(struct cnic_dev *dev)
3346 struct cnic_local *cp = dev->cnic_priv;
3348 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
3349 struct cnic_ulp_ops *ulp_ops;
3351 mutex_lock(&cnic_lock);
3352 ulp_ops = cnic_ulp_tbl_prot(i);
3353 if (!ulp_ops || !ulp_ops->cnic_exit) {
3354 mutex_unlock(&cnic_lock);
3358 mutex_unlock(&cnic_lock);
3360 if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
3361 ulp_ops->cnic_exit(dev);
3367 static int cnic_cm_offload_pg(struct cnic_sock *csk)
3369 struct cnic_dev *dev = csk->dev;
3370 struct l4_kwq_offload_pg *l4kwqe;
3371 struct kwqe *wqes[1];
3373 l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
3374 memset(l4kwqe, 0, sizeof(*l4kwqe));
3375 wqes[0] = (struct kwqe *) l4kwqe;
3377 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
3379 L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
3380 l4kwqe->l2hdr_nbytes = ETH_HLEN;
3382 l4kwqe->da0 = csk->ha[0];
3383 l4kwqe->da1 = csk->ha[1];
3384 l4kwqe->da2 = csk->ha[2];
3385 l4kwqe->da3 = csk->ha[3];
3386 l4kwqe->da4 = csk->ha[4];
3387 l4kwqe->da5 = csk->ha[5];
3389 l4kwqe->sa0 = dev->mac_addr[0];
3390 l4kwqe->sa1 = dev->mac_addr[1];
3391 l4kwqe->sa2 = dev->mac_addr[2];
3392 l4kwqe->sa3 = dev->mac_addr[3];
3393 l4kwqe->sa4 = dev->mac_addr[4];
3394 l4kwqe->sa5 = dev->mac_addr[5];
3396 l4kwqe->etype = ETH_P_IP;
3397 l4kwqe->ipid_start = DEF_IPID_START;
3398 l4kwqe->host_opaque = csk->l5_cid;
3401 l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
3402 l4kwqe->vlan_tag = csk->vlan_id;
3403 l4kwqe->l2hdr_nbytes += 4;
3406 return dev->submit_kwqes(dev, wqes, 1);
3409 static int cnic_cm_update_pg(struct cnic_sock *csk)
3411 struct cnic_dev *dev = csk->dev;
3412 struct l4_kwq_update_pg *l4kwqe;
3413 struct kwqe *wqes[1];
3415 l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
3416 memset(l4kwqe, 0, sizeof(*l4kwqe));
3417 wqes[0] = (struct kwqe *) l4kwqe;
3419 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
3421 L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
3422 l4kwqe->pg_cid = csk->pg_cid;
3424 l4kwqe->da0 = csk->ha[0];
3425 l4kwqe->da1 = csk->ha[1];
3426 l4kwqe->da2 = csk->ha[2];
3427 l4kwqe->da3 = csk->ha[3];
3428 l4kwqe->da4 = csk->ha[4];
3429 l4kwqe->da5 = csk->ha[5];
3431 l4kwqe->pg_host_opaque = csk->l5_cid;
3432 l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
3434 return dev->submit_kwqes(dev, wqes, 1);
3437 static int cnic_cm_upload_pg(struct cnic_sock *csk)
3439 struct cnic_dev *dev = csk->dev;
3440 struct l4_kwq_upload *l4kwqe;
3441 struct kwqe *wqes[1];
3443 l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
3444 memset(l4kwqe, 0, sizeof(*l4kwqe));
3445 wqes[0] = (struct kwqe *) l4kwqe;
3447 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
3449 L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
3450 l4kwqe->cid = csk->pg_cid;
3452 return dev->submit_kwqes(dev, wqes, 1);
3455 static int cnic_cm_conn_req(struct cnic_sock *csk)
3457 struct cnic_dev *dev = csk->dev;
3458 struct l4_kwq_connect_req1 *l4kwqe1;
3459 struct l4_kwq_connect_req2 *l4kwqe2;
3460 struct l4_kwq_connect_req3 *l4kwqe3;
3461 struct kwqe *wqes[3];
3465 l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
3466 l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
3467 l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
3468 memset(l4kwqe1, 0, sizeof(*l4kwqe1));
3469 memset(l4kwqe2, 0, sizeof(*l4kwqe2));
3470 memset(l4kwqe3, 0, sizeof(*l4kwqe3));
3472 l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
3474 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
3475 l4kwqe3->ka_timeout = csk->ka_timeout;
3476 l4kwqe3->ka_interval = csk->ka_interval;
3477 l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
3478 l4kwqe3->tos = csk->tos;
3479 l4kwqe3->ttl = csk->ttl;
3480 l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
3481 l4kwqe3->pmtu = csk->mtu;
3482 l4kwqe3->rcv_buf = csk->rcv_buf;
3483 l4kwqe3->snd_buf = csk->snd_buf;
3484 l4kwqe3->seed = csk->seed;
3486 wqes[0] = (struct kwqe *) l4kwqe1;
3487 if (test_bit(SK_F_IPV6, &csk->flags)) {
3488 wqes[1] = (struct kwqe *) l4kwqe2;
3489 wqes[2] = (struct kwqe *) l4kwqe3;
3492 l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
3493 l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
3495 L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
3496 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
3497 l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
3498 l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
3499 l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
3500 l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
3501 l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
3502 l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
3503 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
3504 sizeof(struct tcphdr);
3506 wqes[1] = (struct kwqe *) l4kwqe3;
3507 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
3508 sizeof(struct tcphdr);
3511 l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
3513 (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
3514 L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
3515 l4kwqe1->cid = csk->cid;
3516 l4kwqe1->pg_cid = csk->pg_cid;
3517 l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
3518 l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
3519 l4kwqe1->src_port = be16_to_cpu(csk->src_port);
3520 l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
3521 if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
3522 tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
3523 if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
3524 tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
3525 if (csk->tcp_flags & SK_TCP_NAGLE)
3526 tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
3527 if (csk->tcp_flags & SK_TCP_TIMESTAMP)
3528 tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
3529 if (csk->tcp_flags & SK_TCP_SACK)
3530 tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
3531 if (csk->tcp_flags & SK_TCP_SEG_SCALING)
3532 tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
3534 l4kwqe1->tcp_flags = tcp_flags;
3536 return dev->submit_kwqes(dev, wqes, num_wqes);
3539 static int cnic_cm_close_req(struct cnic_sock *csk)
3541 struct cnic_dev *dev = csk->dev;
3542 struct l4_kwq_close_req *l4kwqe;
3543 struct kwqe *wqes[1];
3545 l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
3546 memset(l4kwqe, 0, sizeof(*l4kwqe));
3547 wqes[0] = (struct kwqe *) l4kwqe;
3549 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
3550 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
3551 l4kwqe->cid = csk->cid;
3553 return dev->submit_kwqes(dev, wqes, 1);
3556 static int cnic_cm_abort_req(struct cnic_sock *csk)
3558 struct cnic_dev *dev = csk->dev;
3559 struct l4_kwq_reset_req *l4kwqe;
3560 struct kwqe *wqes[1];
3562 l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
3563 memset(l4kwqe, 0, sizeof(*l4kwqe));
3564 wqes[0] = (struct kwqe *) l4kwqe;
3566 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
3567 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
3568 l4kwqe->cid = csk->cid;
3570 return dev->submit_kwqes(dev, wqes, 1);
3573 static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
3574 u32 l5_cid, struct cnic_sock **csk, void *context)
3576 struct cnic_local *cp = dev->cnic_priv;
3577 struct cnic_sock *csk1;
3579 if (l5_cid >= MAX_CM_SK_TBL_SZ)
3583 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3585 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
3589 csk1 = &cp->csk_tbl[l5_cid];
3590 if (atomic_read(&csk1->ref_count))
3593 if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
3598 csk1->l5_cid = l5_cid;
3599 csk1->ulp_type = ulp_type;
3600 csk1->context = context;
3602 csk1->ka_timeout = DEF_KA_TIMEOUT;
3603 csk1->ka_interval = DEF_KA_INTERVAL;
3604 csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
3605 csk1->tos = DEF_TOS;
3606 csk1->ttl = DEF_TTL;
3607 csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
3608 csk1->rcv_buf = DEF_RCV_BUF;
3609 csk1->snd_buf = DEF_SND_BUF;
3610 csk1->seed = DEF_SEED;
3611 csk1->tcp_flags = 0;
3617 static void cnic_cm_cleanup(struct cnic_sock *csk)
3619 if (csk->src_port) {
3620 struct cnic_dev *dev = csk->dev;
3621 struct cnic_local *cp = dev->cnic_priv;
3623 cnic_free_id(&cp->csk_port_tbl, be16_to_cpu(csk->src_port));
3628 static void cnic_close_conn(struct cnic_sock *csk)
3630 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
3631 cnic_cm_upload_pg(csk);
3632 clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3634 cnic_cm_cleanup(csk);
3637 static int cnic_cm_destroy(struct cnic_sock *csk)
3639 if (!cnic_in_use(csk))
3643 clear_bit(SK_F_INUSE, &csk->flags);
3644 smp_mb__after_atomic();
3645 while (atomic_read(&csk->ref_count) != 1)
3647 cnic_cm_cleanup(csk);
3654 static inline u16 cnic_get_vlan(struct net_device *dev,
3655 struct net_device **vlan_dev)
3657 if (dev->priv_flags & IFF_802_1Q_VLAN) {
3658 *vlan_dev = vlan_dev_real_dev(dev);
3659 return vlan_dev_vlan_id(dev);
3665 static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
3666 struct dst_entry **dst)
3668 #if defined(CONFIG_INET)
3671 rt = ip_route_output(&init_net, dst_addr->sin_addr.s_addr, 0, 0, 0);
3678 return -ENETUNREACH;
3682 static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
3683 struct dst_entry **dst)
3685 #if IS_ENABLED(CONFIG_IPV6)
3688 memset(&fl6, 0, sizeof(fl6));
3689 fl6.daddr = dst_addr->sin6_addr;
3690 if (ipv6_addr_type(&fl6.daddr) & IPV6_ADDR_LINKLOCAL)
3691 fl6.flowi6_oif = dst_addr->sin6_scope_id;
3693 *dst = ip6_route_output(&init_net, NULL, &fl6);
3694 if ((*dst)->error) {
3697 return -ENETUNREACH;
3702 return -ENETUNREACH;
3705 static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
3708 struct cnic_dev *dev = NULL;
3709 struct dst_entry *dst;
3710 struct net_device *netdev = NULL;
3711 int err = -ENETUNREACH;
3713 if (dst_addr->sin_family == AF_INET)
3714 err = cnic_get_v4_route(dst_addr, &dst);
3715 else if (dst_addr->sin_family == AF_INET6) {
3716 struct sockaddr_in6 *dst_addr6 =
3717 (struct sockaddr_in6 *) dst_addr;
3719 err = cnic_get_v6_route(dst_addr6, &dst);
3729 cnic_get_vlan(dst->dev, &netdev);
3731 dev = cnic_from_netdev(netdev);
3740 static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3742 struct cnic_dev *dev = csk->dev;
3743 struct cnic_local *cp = dev->cnic_priv;
3745 return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
3748 static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3750 struct cnic_dev *dev = csk->dev;
3751 struct cnic_local *cp = dev->cnic_priv;
3753 struct dst_entry *dst = NULL;
3754 struct net_device *realdev;
3758 if (saddr->local.v6.sin6_family == AF_INET6 &&
3759 saddr->remote.v6.sin6_family == AF_INET6)
3761 else if (saddr->local.v4.sin_family == AF_INET &&
3762 saddr->remote.v4.sin_family == AF_INET)
3767 clear_bit(SK_F_IPV6, &csk->flags);
3770 set_bit(SK_F_IPV6, &csk->flags);
3771 cnic_get_v6_route(&saddr->remote.v6, &dst);
3773 memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
3774 sizeof(struct in6_addr));
3775 csk->dst_port = saddr->remote.v6.sin6_port;
3776 local_port = saddr->local.v6.sin6_port;
3779 cnic_get_v4_route(&saddr->remote.v4, &dst);
3781 csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
3782 csk->dst_port = saddr->remote.v4.sin_port;
3783 local_port = saddr->local.v4.sin_port;
3787 csk->mtu = dev->netdev->mtu;
3788 if (dst && dst->dev) {
3789 u16 vlan = cnic_get_vlan(dst->dev, &realdev);
3790 if (realdev == dev->netdev) {
3791 csk->vlan_id = vlan;
3792 csk->mtu = dst_mtu(dst);
3796 port_id = be16_to_cpu(local_port);
3797 if (port_id >= CNIC_LOCAL_PORT_MIN &&
3798 port_id < CNIC_LOCAL_PORT_MAX) {
3799 if (cnic_alloc_id(&cp->csk_port_tbl, port_id))
3805 port_id = cnic_alloc_new_id(&cp->csk_port_tbl);
3806 if (port_id == -1) {
3810 local_port = cpu_to_be16(port_id);
3812 csk->src_port = local_port;
3819 static void cnic_init_csk_state(struct cnic_sock *csk)
3822 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3823 clear_bit(SK_F_CLOSING, &csk->flags);
3826 static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3828 struct cnic_local *cp = csk->dev->cnic_priv;
3831 if (cp->ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI)
3834 if (!cnic_in_use(csk))
3837 if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
3840 cnic_init_csk_state(csk);
3842 err = cnic_get_route(csk, saddr);
3846 err = cnic_resolve_addr(csk, saddr);
3851 clear_bit(SK_F_CONNECT_START, &csk->flags);
3855 static int cnic_cm_abort(struct cnic_sock *csk)
3857 struct cnic_local *cp = csk->dev->cnic_priv;
3858 u32 opcode = L4_KCQE_OPCODE_VALUE_RESET_COMP;
3860 if (!cnic_in_use(csk))
3863 if (cnic_abort_prep(csk))
3864 return cnic_cm_abort_req(csk);
3866 /* Getting here means that we haven't started connect, or
3867 * connect was not successful, or it has been reset by the target.
3870 cp->close_conn(csk, opcode);
3871 if (csk->state != opcode) {
3872 /* Wait for remote reset sequence to complete */
3873 while (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3882 static int cnic_cm_close(struct cnic_sock *csk)
3884 if (!cnic_in_use(csk))
3887 if (cnic_close_prep(csk)) {
3888 csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
3889 return cnic_cm_close_req(csk);
3891 /* Wait for remote reset sequence to complete */
3892 while (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3900 static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
3903 struct cnic_ulp_ops *ulp_ops;
3904 int ulp_type = csk->ulp_type;
3907 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
3909 if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
3910 ulp_ops->cm_connect_complete(csk);
3911 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
3912 ulp_ops->cm_close_complete(csk);
3913 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
3914 ulp_ops->cm_remote_abort(csk);
3915 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
3916 ulp_ops->cm_abort_complete(csk);
3917 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
3918 ulp_ops->cm_remote_close(csk);
3923 static int cnic_cm_set_pg(struct cnic_sock *csk)
3925 if (cnic_offld_prep(csk)) {
3926 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3927 cnic_cm_update_pg(csk);
3929 cnic_cm_offload_pg(csk);
3934 static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
3936 struct cnic_local *cp = dev->cnic_priv;
3937 u32 l5_cid = kcqe->pg_host_opaque;
3938 u8 opcode = kcqe->op_code;
3939 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
3942 if (!cnic_in_use(csk))
3945 if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3946 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3949 /* Possible PG kcqe status: SUCCESS, OFFLOADED_PG, or CTX_ALLOC_FAIL */
3950 if (kcqe->status == L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL) {
3951 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3952 cnic_cm_upcall(cp, csk,
3953 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3957 csk->pg_cid = kcqe->pg_cid;
3958 set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3959 cnic_cm_conn_req(csk);
3965 static void cnic_process_fcoe_term_conn(struct cnic_dev *dev, struct kcqe *kcqe)
3967 struct cnic_local *cp = dev->cnic_priv;
3968 struct fcoe_kcqe *fc_kcqe = (struct fcoe_kcqe *) kcqe;
3969 u32 l5_cid = fc_kcqe->fcoe_conn_id + BNX2X_FCOE_L5_CID_BASE;
3970 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3972 ctx->timestamp = jiffies;
3974 wake_up(&ctx->waitq);
3977 static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
3979 struct cnic_local *cp = dev->cnic_priv;
3980 struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
3981 u8 opcode = l4kcqe->op_code;
3983 struct cnic_sock *csk;
3985 if (opcode == FCOE_RAMROD_CMD_ID_TERMINATE_CONN) {
3986 cnic_process_fcoe_term_conn(dev, kcqe);
3989 if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
3990 opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3991 cnic_cm_process_offld_pg(dev, l4kcqe);
3995 l5_cid = l4kcqe->conn_id;
3997 l5_cid = l4kcqe->cid;
3998 if (l5_cid >= MAX_CM_SK_TBL_SZ)
4001 csk = &cp->csk_tbl[l5_cid];
4004 if (!cnic_in_use(csk)) {
4010 case L5CM_RAMROD_CMD_ID_TCP_CONNECT:
4011 if (l4kcqe->status != 0) {
4012 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
4013 cnic_cm_upcall(cp, csk,
4014 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
4017 case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
4018 if (l4kcqe->status == 0)
4019 set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
4020 else if (l4kcqe->status ==
4021 L4_KCQE_COMPLETION_STATUS_PARITY_ERROR)
4022 set_bit(SK_F_HW_ERR, &csk->flags);
4024 smp_mb__before_atomic();
4025 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
4026 cnic_cm_upcall(cp, csk, opcode);
4029 case L5CM_RAMROD_CMD_ID_CLOSE: {
4030 struct iscsi_kcqe *l5kcqe = (struct iscsi_kcqe *) kcqe;
4032 if (l4kcqe->status != 0 || l5kcqe->completion_status != 0) {
4033 netdev_warn(dev->netdev, "RAMROD CLOSE compl with status 0x%x completion status 0x%x\n",
4034 l4kcqe->status, l5kcqe->completion_status);
4035 opcode = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
4041 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
4042 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
4043 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
4044 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
4045 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
4046 if (l4kcqe->status == L4_KCQE_COMPLETION_STATUS_PARITY_ERROR)
4047 set_bit(SK_F_HW_ERR, &csk->flags);
4049 cp->close_conn(csk, opcode);
4052 case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
4053 /* after we already sent CLOSE_REQ */
4054 if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags) &&
4055 !test_bit(SK_F_OFFLD_COMPLETE, &csk->flags) &&
4056 csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
4057 cp->close_conn(csk, L4_KCQE_OPCODE_VALUE_RESET_COMP);
4059 cnic_cm_upcall(cp, csk, opcode);
4065 static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
4067 struct cnic_dev *dev = data;
4070 for (i = 0; i < num; i++)
4071 cnic_cm_process_kcqe(dev, kcqe[i]);
4074 static struct cnic_ulp_ops cm_ulp_ops = {
4075 .indicate_kcqes = cnic_cm_indicate_kcqe,
4078 static void cnic_cm_free_mem(struct cnic_dev *dev)
4080 struct cnic_local *cp = dev->cnic_priv;
4084 cnic_free_id_tbl(&cp->csk_port_tbl);
4087 static int cnic_cm_alloc_mem(struct cnic_dev *dev)
4089 struct cnic_local *cp = dev->cnic_priv;
4092 cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
4097 port_id = prandom_u32();
4098 port_id %= CNIC_LOCAL_PORT_RANGE;
4099 if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
4100 CNIC_LOCAL_PORT_MIN, port_id)) {
4101 cnic_cm_free_mem(dev);
4107 static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
4109 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
4110 /* Unsolicited RESET_COMP or RESET_RECEIVED */
4111 opcode = L4_KCQE_OPCODE_VALUE_RESET_RECEIVED;
4112 csk->state = opcode;
4115 /* 1. If event opcode matches the expected event in csk->state
4116 * 2. If the expected event is CLOSE_COMP or RESET_COMP, we accept any
4118 * 3. If the expected event is 0, meaning the connection was never
4119 * never established, we accept the opcode from cm_abort.
4121 if (opcode == csk->state || csk->state == 0 ||
4122 csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP ||
4123 csk->state == L4_KCQE_OPCODE_VALUE_RESET_COMP) {
4124 if (!test_and_set_bit(SK_F_CLOSING, &csk->flags)) {
4125 if (csk->state == 0)
4126 csk->state = opcode;
4133 static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
4135 struct cnic_dev *dev = csk->dev;
4136 struct cnic_local *cp = dev->cnic_priv;
4138 if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED) {
4139 cnic_cm_upcall(cp, csk, opcode);
4143 clear_bit(SK_F_CONNECT_START, &csk->flags);
4144 cnic_close_conn(csk);
4145 csk->state = opcode;
4146 cnic_cm_upcall(cp, csk, opcode);
4149 static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
4153 static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
4157 seed = prandom_u32();
4158 cnic_ctx_wr(dev, 45, 0, seed);
4162 static void cnic_close_bnx2x_conn(struct cnic_sock *csk, u32 opcode)
4164 struct cnic_dev *dev = csk->dev;
4165 struct cnic_local *cp = dev->cnic_priv;
4166 struct cnic_context *ctx = &cp->ctx_tbl[csk->l5_cid];
4167 union l5cm_specific_data l5_data;
4169 int close_complete = 0;
4172 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
4173 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
4174 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
4175 if (cnic_ready_to_close(csk, opcode)) {
4176 if (test_bit(SK_F_HW_ERR, &csk->flags))
4178 else if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
4179 cmd = L5CM_RAMROD_CMD_ID_SEARCHER_DELETE;
4184 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
4185 cmd = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
4187 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
4192 memset(&l5_data, 0, sizeof(l5_data));
4194 cnic_submit_kwqe_16(dev, cmd, csk->cid, ISCSI_CONNECTION_TYPE,
4196 } else if (close_complete) {
4197 ctx->timestamp = jiffies;
4198 cnic_close_conn(csk);
4199 cnic_cm_upcall(cp, csk, csk->state);
4203 static void cnic_cm_stop_bnx2x_hw(struct cnic_dev *dev)
4205 struct cnic_local *cp = dev->cnic_priv;
4210 if (!netif_running(dev->netdev))
4213 cnic_bnx2x_delete_wait(dev, 0);
4215 cancel_delayed_work(&cp->delete_task);
4216 flush_workqueue(cnic_wq);
4218 if (atomic_read(&cp->iscsi_conn) != 0)
4219 netdev_warn(dev->netdev, "%d iSCSI connections not destroyed\n",
4220 atomic_read(&cp->iscsi_conn));
4223 static int cnic_cm_init_bnx2x_hw(struct cnic_dev *dev)
4225 struct bnx2x *bp = netdev_priv(dev->netdev);
4226 u32 pfid = bp->pfid;
4227 u32 port = BP_PORT(bp);
4229 cnic_init_bnx2x_mac(dev);
4230 cnic_bnx2x_set_tcp_options(dev, 0, 1);
4232 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
4233 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfid), 0);
4235 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
4236 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(port), 1);
4237 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
4238 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(port),
4241 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
4242 XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfid), DEF_TTL);
4243 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
4244 XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfid), DEF_TOS);
4245 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
4246 XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfid), 2);
4247 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
4248 XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfid), DEF_SWS_TIMER);
4250 CNIC_WR(dev, BAR_TSTRORM_INTMEM + TSTORM_TCP_MAX_CWND_OFFSET(pfid),
4255 static void cnic_delete_task(struct work_struct *work)
4257 struct cnic_local *cp;
4258 struct cnic_dev *dev;
4260 int need_resched = 0;
4262 cp = container_of(work, struct cnic_local, delete_task.work);
4265 if (test_and_clear_bit(CNIC_LCL_FL_STOP_ISCSI, &cp->cnic_local_flags)) {
4266 struct drv_ctl_info info;
4268 cnic_ulp_stop_one(cp, CNIC_ULP_ISCSI);
4270 info.cmd = DRV_CTL_ISCSI_STOPPED_CMD;
4271 cp->ethdev->drv_ctl(dev->netdev, &info);
4274 for (i = 0; i < cp->max_cid_space; i++) {
4275 struct cnic_context *ctx = &cp->ctx_tbl[i];
4278 if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags) ||
4279 !test_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
4282 if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) {
4287 if (!test_and_clear_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
4290 err = cnic_bnx2x_destroy_ramrod(dev, i);
4292 cnic_free_bnx2x_conn_resc(dev, i);
4294 if (ctx->ulp_proto_id == CNIC_ULP_ISCSI)
4295 atomic_dec(&cp->iscsi_conn);
4297 clear_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
4302 queue_delayed_work(cnic_wq, &cp->delete_task,
4303 msecs_to_jiffies(10));
4307 static int cnic_cm_open(struct cnic_dev *dev)
4309 struct cnic_local *cp = dev->cnic_priv;
4312 err = cnic_cm_alloc_mem(dev);
4316 err = cp->start_cm(dev);
4321 INIT_DELAYED_WORK(&cp->delete_task, cnic_delete_task);
4323 dev->cm_create = cnic_cm_create;
4324 dev->cm_destroy = cnic_cm_destroy;
4325 dev->cm_connect = cnic_cm_connect;
4326 dev->cm_abort = cnic_cm_abort;
4327 dev->cm_close = cnic_cm_close;
4328 dev->cm_select_dev = cnic_cm_select_dev;
4330 cp->ulp_handle[CNIC_ULP_L4] = dev;
4331 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
4335 cnic_cm_free_mem(dev);
4339 static int cnic_cm_shutdown(struct cnic_dev *dev)
4341 struct cnic_local *cp = dev->cnic_priv;
4347 for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
4348 struct cnic_sock *csk = &cp->csk_tbl[i];
4350 clear_bit(SK_F_INUSE, &csk->flags);
4351 cnic_cm_cleanup(csk);
4353 cnic_cm_free_mem(dev);
4358 static void cnic_init_context(struct cnic_dev *dev, u32 cid)
4363 cid_addr = GET_CID_ADDR(cid);
4365 for (i = 0; i < CTX_SIZE; i += 4)
4366 cnic_ctx_wr(dev, cid_addr, i, 0);
4369 static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
4371 struct cnic_local *cp = dev->cnic_priv;
4373 u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
4375 if (BNX2_CHIP(cp) != BNX2_CHIP_5709)
4378 for (i = 0; i < cp->ctx_blks; i++) {
4380 u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
4383 memset(cp->ctx_arr[i].ctx, 0, CNIC_PAGE_SIZE);
4385 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
4386 (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
4387 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
4388 (u64) cp->ctx_arr[i].mapping >> 32);
4389 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
4390 BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
4391 for (j = 0; j < 10; j++) {
4393 val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
4394 if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
4398 if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
4406 static void cnic_free_irq(struct cnic_dev *dev)
4408 struct cnic_local *cp = dev->cnic_priv;
4409 struct cnic_eth_dev *ethdev = cp->ethdev;
4411 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4412 cp->disable_int_sync(dev);
4413 tasklet_kill(&cp->cnic_irq_task);
4414 free_irq(ethdev->irq_arr[0].vector, dev);
4418 static int cnic_request_irq(struct cnic_dev *dev)
4420 struct cnic_local *cp = dev->cnic_priv;
4421 struct cnic_eth_dev *ethdev = cp->ethdev;
4424 err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0, "cnic", dev);
4426 tasklet_disable(&cp->cnic_irq_task);
4431 static int cnic_init_bnx2_irq(struct cnic_dev *dev)
4433 struct cnic_local *cp = dev->cnic_priv;
4434 struct cnic_eth_dev *ethdev = cp->ethdev;
4436 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4438 int sblk_num = cp->status_blk_num;
4439 u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
4440 BNX2_HC_SB_CONFIG_1;
4442 CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
4444 CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
4445 CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
4446 CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
4448 cp->last_status_idx = cp->status_blk.bnx2->status_idx;
4449 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2_msix,
4450 (unsigned long) dev);
4451 err = cnic_request_irq(dev);
4455 while (cp->status_blk.bnx2->status_completion_producer_index &&
4457 CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
4458 1 << (11 + sblk_num));
4463 if (cp->status_blk.bnx2->status_completion_producer_index) {
4469 struct status_block *sblk = cp->status_blk.gen;
4470 u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
4473 while (sblk->status_completion_producer_index && i < 10) {
4474 CNIC_WR(dev, BNX2_HC_COMMAND,
4475 hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
4480 if (sblk->status_completion_producer_index)
4487 netdev_err(dev->netdev, "KCQ index not resetting to 0\n");
4491 static void cnic_enable_bnx2_int(struct cnic_dev *dev)
4493 struct cnic_local *cp = dev->cnic_priv;
4494 struct cnic_eth_dev *ethdev = cp->ethdev;
4496 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
4499 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
4500 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
4503 static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
4505 struct cnic_local *cp = dev->cnic_priv;
4506 struct cnic_eth_dev *ethdev = cp->ethdev;
4508 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
4511 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
4512 BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
4513 CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
4514 synchronize_irq(ethdev->irq_arr[0].vector);
4517 static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
4519 struct cnic_local *cp = dev->cnic_priv;
4520 struct cnic_eth_dev *ethdev = cp->ethdev;
4521 struct cnic_uio_dev *udev = cp->udev;
4522 u32 cid_addr, tx_cid, sb_id;
4523 u32 val, offset0, offset1, offset2, offset3;
4525 struct bnx2_tx_bd *txbd;
4526 dma_addr_t buf_map, ring_map = udev->l2_ring_map;
4527 struct status_block *s_blk = cp->status_blk.gen;
4529 sb_id = cp->status_blk_num;
4531 cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
4532 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4533 struct status_block_msix *sblk = cp->status_blk.bnx2;
4535 tx_cid = TX_TSS_CID + sb_id - 1;
4536 CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
4538 cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
4540 cp->tx_cons = *cp->tx_cons_ptr;
4542 cid_addr = GET_CID_ADDR(tx_cid);
4543 if (BNX2_CHIP(cp) == BNX2_CHIP_5709) {
4544 u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
4546 for (i = 0; i < PHY_CTX_SIZE; i += 4)
4547 cnic_ctx_wr(dev, cid_addr2, i, 0);
4549 offset0 = BNX2_L2CTX_TYPE_XI;
4550 offset1 = BNX2_L2CTX_CMD_TYPE_XI;
4551 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
4552 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
4554 cnic_init_context(dev, tx_cid);
4555 cnic_init_context(dev, tx_cid + 1);
4557 offset0 = BNX2_L2CTX_TYPE;
4558 offset1 = BNX2_L2CTX_CMD_TYPE;
4559 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
4560 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
4562 val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
4563 cnic_ctx_wr(dev, cid_addr, offset0, val);
4565 val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
4566 cnic_ctx_wr(dev, cid_addr, offset1, val);
4568 txbd = udev->l2_ring;
4570 buf_map = udev->l2_buf_map;
4571 for (i = 0; i < BNX2_MAX_TX_DESC_CNT; i++, txbd++) {
4572 txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
4573 txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
4575 val = (u64) ring_map >> 32;
4576 cnic_ctx_wr(dev, cid_addr, offset2, val);
4577 txbd->tx_bd_haddr_hi = val;
4579 val = (u64) ring_map & 0xffffffff;
4580 cnic_ctx_wr(dev, cid_addr, offset3, val);
4581 txbd->tx_bd_haddr_lo = val;
4584 static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
4586 struct cnic_local *cp = dev->cnic_priv;
4587 struct cnic_eth_dev *ethdev = cp->ethdev;
4588 struct cnic_uio_dev *udev = cp->udev;
4589 u32 cid_addr, sb_id, val, coal_reg, coal_val;
4591 struct bnx2_rx_bd *rxbd;
4592 struct status_block *s_blk = cp->status_blk.gen;
4593 dma_addr_t ring_map = udev->l2_ring_map;
4595 sb_id = cp->status_blk_num;
4596 cnic_init_context(dev, 2);
4597 cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
4598 coal_reg = BNX2_HC_COMMAND;
4599 coal_val = CNIC_RD(dev, coal_reg);
4600 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4601 struct status_block_msix *sblk = cp->status_blk.bnx2;
4603 cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
4604 coal_reg = BNX2_HC_COALESCE_NOW;
4605 coal_val = 1 << (11 + sb_id);
4608 while (!(*cp->rx_cons_ptr != 0) && i < 10) {
4609 CNIC_WR(dev, coal_reg, coal_val);
4614 cp->rx_cons = *cp->rx_cons_ptr;
4616 cid_addr = GET_CID_ADDR(2);
4617 val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
4618 BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
4619 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
4622 val = 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT;
4624 val = BNX2_L2CTX_L2_STATUSB_NUM(sb_id);
4625 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
4627 rxbd = udev->l2_ring + CNIC_PAGE_SIZE;
4628 for (i = 0; i < BNX2_MAX_RX_DESC_CNT; i++, rxbd++) {
4630 int n = (i % cp->l2_rx_ring_size) + 1;
4632 buf_map = udev->l2_buf_map + (n * cp->l2_single_buf_size);
4633 rxbd->rx_bd_len = cp->l2_single_buf_size;
4634 rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
4635 rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
4636 rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
4638 val = (u64) (ring_map + CNIC_PAGE_SIZE) >> 32;
4639 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
4640 rxbd->rx_bd_haddr_hi = val;
4642 val = (u64) (ring_map + CNIC_PAGE_SIZE) & 0xffffffff;
4643 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
4644 rxbd->rx_bd_haddr_lo = val;
4646 val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
4647 cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
4650 static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
4652 struct kwqe *wqes[1], l2kwqe;
4654 memset(&l2kwqe, 0, sizeof(l2kwqe));
4656 l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_LAYER_SHIFT) |
4657 (L2_KWQE_OPCODE_VALUE_FLUSH <<
4658 KWQE_OPCODE_SHIFT) | 2;
4659 dev->submit_kwqes(dev, wqes, 1);
4662 static void cnic_set_bnx2_mac(struct cnic_dev *dev)
4664 struct cnic_local *cp = dev->cnic_priv;
4667 val = cp->func << 2;
4669 cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
4671 val = cnic_reg_rd_ind(dev, cp->shmem_base +
4672 BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
4673 dev->mac_addr[0] = (u8) (val >> 8);
4674 dev->mac_addr[1] = (u8) val;
4676 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
4678 val = cnic_reg_rd_ind(dev, cp->shmem_base +
4679 BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
4680 dev->mac_addr[2] = (u8) (val >> 24);
4681 dev->mac_addr[3] = (u8) (val >> 16);
4682 dev->mac_addr[4] = (u8) (val >> 8);
4683 dev->mac_addr[5] = (u8) val;
4685 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
4687 val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
4688 if (BNX2_CHIP(cp) != BNX2_CHIP_5709)
4689 val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
4691 CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
4692 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
4693 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
4696 static int cnic_start_bnx2_hw(struct cnic_dev *dev)
4698 struct cnic_local *cp = dev->cnic_priv;
4699 struct cnic_eth_dev *ethdev = cp->ethdev;
4700 struct status_block *sblk = cp->status_blk.gen;
4701 u32 val, kcq_cid_addr, kwq_cid_addr;
4704 cnic_set_bnx2_mac(dev);
4706 val = CNIC_RD(dev, BNX2_MQ_CONFIG);
4707 val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
4708 if (CNIC_PAGE_BITS > 12)
4709 val |= (12 - 8) << 4;
4711 val |= (CNIC_PAGE_BITS - 8) << 4;
4713 CNIC_WR(dev, BNX2_MQ_CONFIG, val);
4715 CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
4716 CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
4717 CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
4719 err = cnic_setup_5709_context(dev, 1);
4723 cnic_init_context(dev, KWQ_CID);
4724 cnic_init_context(dev, KCQ_CID);
4726 kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
4727 cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
4729 cp->max_kwq_idx = MAX_KWQ_IDX;
4730 cp->kwq_prod_idx = 0;
4731 cp->kwq_con_idx = 0;
4732 set_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
4734 if (BNX2_CHIP(cp) == BNX2_CHIP_5706 || BNX2_CHIP(cp) == BNX2_CHIP_5708)
4735 cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
4737 cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
4739 /* Initialize the kernel work queue context. */
4740 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
4741 (CNIC_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
4742 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_TYPE, val);
4744 val = (CNIC_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
4745 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
4747 val = ((CNIC_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
4748 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
4750 val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
4751 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
4753 val = (u32) cp->kwq_info.pgtbl_map;
4754 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
4756 kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
4757 cp->kcq1.io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
4759 cp->kcq1.sw_prod_idx = 0;
4760 cp->kcq1.hw_prod_idx_ptr =
4761 &sblk->status_completion_producer_index;
4763 cp->kcq1.status_idx_ptr = &sblk->status_idx;
4765 /* Initialize the kernel complete queue context. */
4766 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
4767 (CNIC_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
4768 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_TYPE, val);
4770 val = (CNIC_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
4771 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
4773 val = ((CNIC_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
4774 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
4776 val = (u32) ((u64) cp->kcq1.dma.pgtbl_map >> 32);
4777 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
4779 val = (u32) cp->kcq1.dma.pgtbl_map;
4780 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
4783 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4784 struct status_block_msix *msblk = cp->status_blk.bnx2;
4785 u32 sb_id = cp->status_blk_num;
4786 u32 sb = BNX2_L2CTX_L5_STATUSB_NUM(sb_id);
4788 cp->kcq1.hw_prod_idx_ptr =
4789 &msblk->status_completion_producer_index;
4790 cp->kcq1.status_idx_ptr = &msblk->status_idx;
4791 cp->kwq_con_idx_ptr = &msblk->status_cmd_consumer_index;
4792 cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
4793 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
4794 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
4797 /* Enable Commnad Scheduler notification when we write to the
4798 * host producer index of the kernel contexts. */
4799 CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
4801 /* Enable Command Scheduler notification when we write to either
4802 * the Send Queue or Receive Queue producer indexes of the kernel
4803 * bypass contexts. */
4804 CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
4805 CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
4807 /* Notify COM when the driver post an application buffer. */
4808 CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
4810 /* Set the CP and COM doorbells. These two processors polls the
4811 * doorbell for a non zero value before running. This must be done
4812 * after setting up the kernel queue contexts. */
4813 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
4814 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
4816 cnic_init_bnx2_tx_ring(dev);
4817 cnic_init_bnx2_rx_ring(dev);
4819 err = cnic_init_bnx2_irq(dev);
4821 netdev_err(dev->netdev, "cnic_init_irq failed\n");
4822 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
4823 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
4827 ethdev->drv_state |= CNIC_DRV_STATE_HANDLES_IRQ;
4832 static void cnic_setup_bnx2x_context(struct cnic_dev *dev)
4834 struct cnic_local *cp = dev->cnic_priv;
4835 struct cnic_eth_dev *ethdev = cp->ethdev;
4836 u32 start_offset = ethdev->ctx_tbl_offset;
4839 for (i = 0; i < cp->ctx_blks; i++) {
4840 struct cnic_ctx *ctx = &cp->ctx_arr[i];
4841 dma_addr_t map = ctx->mapping;
4843 if (cp->ctx_align) {
4844 unsigned long mask = cp->ctx_align - 1;
4846 map = (map + mask) & ~mask;
4849 cnic_ctx_tbl_wr(dev, start_offset + i, map);
4853 static int cnic_init_bnx2x_irq(struct cnic_dev *dev)
4855 struct cnic_local *cp = dev->cnic_priv;
4856 struct cnic_eth_dev *ethdev = cp->ethdev;
4859 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2x_bh,
4860 (unsigned long) dev);
4861 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
4862 err = cnic_request_irq(dev);
4867 static inline void cnic_storm_memset_hc_disable(struct cnic_dev *dev,
4868 u16 sb_id, u8 sb_index,
4871 struct bnx2x *bp = netdev_priv(dev->netdev);
4873 u32 addr = BAR_CSTRORM_INTMEM +
4874 CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) +
4875 offsetof(struct hc_status_block_data_e1x, index_data) +
4876 sizeof(struct hc_index_data)*sb_index +
4877 offsetof(struct hc_index_data, flags);
4878 u16 flags = CNIC_RD16(dev, addr);
4880 flags &= ~HC_INDEX_DATA_HC_ENABLED;
4881 flags |= (((~disable) << HC_INDEX_DATA_HC_ENABLED_SHIFT) &
4882 HC_INDEX_DATA_HC_ENABLED);
4883 CNIC_WR16(dev, addr, flags);
4886 static void cnic_enable_bnx2x_int(struct cnic_dev *dev)
4888 struct cnic_local *cp = dev->cnic_priv;
4889 struct bnx2x *bp = netdev_priv(dev->netdev);
4890 u8 sb_id = cp->status_blk_num;
4892 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4893 CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) +
4894 offsetof(struct hc_status_block_data_e1x, index_data) +
4895 sizeof(struct hc_index_data)*HC_INDEX_ISCSI_EQ_CONS +
4896 offsetof(struct hc_index_data, timeout), 64 / 4);
4897 cnic_storm_memset_hc_disable(dev, sb_id, HC_INDEX_ISCSI_EQ_CONS, 0);
4900 static void cnic_disable_bnx2x_int_sync(struct cnic_dev *dev)
4904 static void cnic_init_bnx2x_tx_ring(struct cnic_dev *dev,
4905 struct client_init_ramrod_data *data)
4907 struct cnic_local *cp = dev->cnic_priv;
4908 struct bnx2x *bp = netdev_priv(dev->netdev);
4909 struct cnic_uio_dev *udev = cp->udev;
4910 union eth_tx_bd_types *txbd = (union eth_tx_bd_types *) udev->l2_ring;
4911 dma_addr_t buf_map, ring_map = udev->l2_ring_map;
4912 struct host_sp_status_block *sb = cp->bnx2x_def_status_blk;
4914 u32 cli = cp->ethdev->iscsi_l2_client_id;
4917 memset(txbd, 0, CNIC_PAGE_SIZE);
4919 buf_map = udev->l2_buf_map;
4920 for (i = 0; i < BNX2_MAX_TX_DESC_CNT; i += 3, txbd += 3) {
4921 struct eth_tx_start_bd *start_bd = &txbd->start_bd;
4922 struct eth_tx_parse_bd_e1x *pbd_e1x =
4923 &((txbd + 1)->parse_bd_e1x);
4924 struct eth_tx_parse_bd_e2 *pbd_e2 = &((txbd + 1)->parse_bd_e2);
4925 struct eth_tx_bd *reg_bd = &((txbd + 2)->reg_bd);
4927 start_bd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
4928 start_bd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
4929 reg_bd->addr_hi = start_bd->addr_hi;
4930 reg_bd->addr_lo = start_bd->addr_lo + 0x10;
4931 start_bd->nbytes = cpu_to_le16(0x10);
4932 start_bd->nbd = cpu_to_le16(3);
4933 start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
4934 start_bd->general_data &= ~ETH_TX_START_BD_PARSE_NBDS;
4935 start_bd->general_data |= (1 << ETH_TX_START_BD_HDR_NBDS_SHIFT);
4937 if (BNX2X_CHIP_IS_E2_PLUS(bp))
4938 pbd_e2->parsing_data = (UNICAST_ADDRESS <<
4939 ETH_TX_PARSE_BD_E2_ETH_ADDR_TYPE_SHIFT);
4941 pbd_e1x->global_data = (UNICAST_ADDRESS <<
4942 ETH_TX_PARSE_BD_E1X_ETH_ADDR_TYPE_SHIFT);
4945 val = (u64) ring_map >> 32;
4946 txbd->next_bd.addr_hi = cpu_to_le32(val);
4948 data->tx.tx_bd_page_base.hi = cpu_to_le32(val);
4950 val = (u64) ring_map & 0xffffffff;
4951 txbd->next_bd.addr_lo = cpu_to_le32(val);
4953 data->tx.tx_bd_page_base.lo = cpu_to_le32(val);
4955 /* Other ramrod params */
4956 data->tx.tx_sb_index_number = HC_SP_INDEX_ETH_ISCSI_CQ_CONS;
4957 data->tx.tx_status_block_id = BNX2X_DEF_SB_ID;
4959 /* reset xstorm per client statistics */
4960 if (cli < MAX_STAT_COUNTER_ID) {
4961 data->general.statistics_zero_flg = 1;
4962 data->general.statistics_en_flg = 1;
4963 data->general.statistics_counter_id = cli;
4967 &sb->sp_sb.index_values[HC_SP_INDEX_ETH_ISCSI_CQ_CONS];
4970 static void cnic_init_bnx2x_rx_ring(struct cnic_dev *dev,
4971 struct client_init_ramrod_data *data)
4973 struct cnic_local *cp = dev->cnic_priv;
4974 struct bnx2x *bp = netdev_priv(dev->netdev);
4975 struct cnic_uio_dev *udev = cp->udev;
4976 struct eth_rx_bd *rxbd = (struct eth_rx_bd *) (udev->l2_ring +
4978 struct eth_rx_cqe_next_page *rxcqe = (struct eth_rx_cqe_next_page *)
4979 (udev->l2_ring + (2 * CNIC_PAGE_SIZE));
4980 struct host_sp_status_block *sb = cp->bnx2x_def_status_blk;
4982 u32 cli = cp->ethdev->iscsi_l2_client_id;
4983 int cl_qzone_id = BNX2X_CL_QZONE_ID(bp, cli);
4985 dma_addr_t ring_map = udev->l2_ring_map;
4988 data->general.client_id = cli;
4989 data->general.activate_flg = 1;
4990 data->general.sp_client_id = cli;
4991 data->general.mtu = cpu_to_le16(cp->l2_single_buf_size - 14);
4992 data->general.func_id = bp->pfid;
4994 for (i = 0; i < BNX2X_MAX_RX_DESC_CNT; i++, rxbd++) {
4996 int n = (i % cp->l2_rx_ring_size) + 1;
4998 buf_map = udev->l2_buf_map + (n * cp->l2_single_buf_size);
4999 rxbd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
5000 rxbd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
5003 val = (u64) (ring_map + CNIC_PAGE_SIZE) >> 32;
5004 rxbd->addr_hi = cpu_to_le32(val);
5005 data->rx.bd_page_base.hi = cpu_to_le32(val);
5007 val = (u64) (ring_map + CNIC_PAGE_SIZE) & 0xffffffff;
5008 rxbd->addr_lo = cpu_to_le32(val);
5009 data->rx.bd_page_base.lo = cpu_to_le32(val);
5011 rxcqe += BNX2X_MAX_RCQ_DESC_CNT;
5012 val = (u64) (ring_map + (2 * CNIC_PAGE_SIZE)) >> 32;
5013 rxcqe->addr_hi = cpu_to_le32(val);
5014 data->rx.cqe_page_base.hi = cpu_to_le32(val);
5016 val = (u64) (ring_map + (2 * CNIC_PAGE_SIZE)) & 0xffffffff;
5017 rxcqe->addr_lo = cpu_to_le32(val);
5018 data->rx.cqe_page_base.lo = cpu_to_le32(val);
5020 /* Other ramrod params */
5021 data->rx.client_qzone_id = cl_qzone_id;
5022 data->rx.rx_sb_index_number = HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS;
5023 data->rx.status_block_id = BNX2X_DEF_SB_ID;
5025 data->rx.cache_line_alignment_log_size = L1_CACHE_SHIFT;
5027 data->rx.max_bytes_on_bd = cpu_to_le16(cp->l2_single_buf_size);
5028 data->rx.outer_vlan_removal_enable_flg = 1;
5029 data->rx.silent_vlan_removal_flg = 1;
5030 data->rx.silent_vlan_value = 0;
5031 data->rx.silent_vlan_mask = 0xffff;
5034 &sb->sp_sb.index_values[HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS];
5035 cp->rx_cons = *cp->rx_cons_ptr;
5038 static void cnic_init_bnx2x_kcq(struct cnic_dev *dev)
5040 struct cnic_local *cp = dev->cnic_priv;
5041 struct bnx2x *bp = netdev_priv(dev->netdev);
5042 u32 pfid = bp->pfid;
5044 cp->kcq1.io_addr = BAR_CSTRORM_INTMEM +
5045 CSTORM_ISCSI_EQ_PROD_OFFSET(pfid, 0);
5046 cp->kcq1.sw_prod_idx = 0;
5048 if (BNX2X_CHIP_IS_E2_PLUS(bp)) {
5049 struct host_hc_status_block_e2 *sb = cp->status_blk.gen;
5051 cp->kcq1.hw_prod_idx_ptr =
5052 &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
5053 cp->kcq1.status_idx_ptr =
5054 &sb->sb.running_index[SM_RX_ID];
5056 struct host_hc_status_block_e1x *sb = cp->status_blk.gen;
5058 cp->kcq1.hw_prod_idx_ptr =
5059 &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
5060 cp->kcq1.status_idx_ptr =
5061 &sb->sb.running_index[SM_RX_ID];
5064 if (BNX2X_CHIP_IS_E2_PLUS(bp)) {
5065 struct host_hc_status_block_e2 *sb = cp->status_blk.gen;
5067 cp->kcq2.io_addr = BAR_USTRORM_INTMEM +
5068 USTORM_FCOE_EQ_PROD_OFFSET(pfid);
5069 cp->kcq2.sw_prod_idx = 0;
5070 cp->kcq2.hw_prod_idx_ptr =
5071 &sb->sb.index_values[HC_INDEX_FCOE_EQ_CONS];
5072 cp->kcq2.status_idx_ptr =
5073 &sb->sb.running_index[SM_RX_ID];
5077 static int cnic_start_bnx2x_hw(struct cnic_dev *dev)
5079 struct cnic_local *cp = dev->cnic_priv;
5080 struct bnx2x *bp = netdev_priv(dev->netdev);
5081 struct cnic_eth_dev *ethdev = cp->ethdev;
5085 dev->stats_addr = ethdev->addr_drv_info_to_mcp;
5086 cp->func = bp->pf_num;
5088 func = CNIC_FUNC(cp);
5091 ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ,
5092 cp->iscsi_start_cid, 0);
5097 if (BNX2X_CHIP_IS_E2_PLUS(bp)) {
5098 ret = cnic_init_id_tbl(&cp->fcoe_cid_tbl, dev->max_fcoe_conn,
5099 cp->fcoe_start_cid, 0);
5105 cp->bnx2x_igu_sb_id = ethdev->irq_arr[0].status_blk_num2;
5107 cnic_init_bnx2x_kcq(dev);
5110 CNIC_WR16(dev, cp->kcq1.io_addr, MAX_KCQ_IDX);
5111 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5112 CSTORM_ISCSI_EQ_CONS_OFFSET(pfid, 0), 0);
5113 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5114 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0),
5115 cp->kcq1.dma.pg_map_arr[1] & 0xffffffff);
5116 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5117 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0) + 4,
5118 (u64) cp->kcq1.dma.pg_map_arr[1] >> 32);
5119 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5120 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0),
5121 cp->kcq1.dma.pg_map_arr[0] & 0xffffffff);
5122 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5123 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0) + 4,
5124 (u64) cp->kcq1.dma.pg_map_arr[0] >> 32);
5125 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
5126 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfid, 0), 1);
5127 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
5128 CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfid, 0), cp->status_blk_num);
5129 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
5130 CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfid, 0),
5131 HC_INDEX_ISCSI_EQ_CONS);
5133 CNIC_WR(dev, BAR_USTRORM_INTMEM +
5134 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid),
5135 cp->gbl_buf_info.pg_map_arr[0] & 0xffffffff);
5136 CNIC_WR(dev, BAR_USTRORM_INTMEM +
5137 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid) + 4,
5138 (u64) cp->gbl_buf_info.pg_map_arr[0] >> 32);
5140 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
5141 TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfid), DEF_RCV_BUF);
5143 cnic_setup_bnx2x_context(dev);
5145 ret = cnic_init_bnx2x_irq(dev);
5149 ethdev->drv_state |= CNIC_DRV_STATE_HANDLES_IRQ;
5153 static void cnic_init_rings(struct cnic_dev *dev)
5155 struct cnic_local *cp = dev->cnic_priv;
5156 struct bnx2x *bp = netdev_priv(dev->netdev);
5157 struct cnic_uio_dev *udev = cp->udev;
5159 if (test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
5162 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
5163 cnic_init_bnx2_tx_ring(dev);
5164 cnic_init_bnx2_rx_ring(dev);
5165 set_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5166 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
5167 u32 cli = cp->ethdev->iscsi_l2_client_id;
5168 u32 cid = cp->ethdev->iscsi_l2_cid;
5170 struct client_init_ramrod_data *data;
5171 union l5cm_specific_data l5_data;
5172 struct ustorm_eth_rx_producers rx_prods = {0};
5173 u32 off, i, *cid_ptr;
5175 rx_prods.bd_prod = 0;
5176 rx_prods.cqe_prod = BNX2X_MAX_RCQ_DESC_CNT;
5179 cl_qzone_id = BNX2X_CL_QZONE_ID(bp, cli);
5181 off = BAR_USTRORM_INTMEM +
5182 (BNX2X_CHIP_IS_E2_PLUS(bp) ?
5183 USTORM_RX_PRODS_E2_OFFSET(cl_qzone_id) :
5184 USTORM_RX_PRODS_E1X_OFFSET(BP_PORT(bp), cli));
5186 for (i = 0; i < sizeof(struct ustorm_eth_rx_producers) / 4; i++)
5187 CNIC_WR(dev, off + i * 4, ((u32 *) &rx_prods)[i]);
5189 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
5191 data = udev->l2_buf;
5192 cid_ptr = udev->l2_buf + 12;
5194 memset(data, 0, sizeof(*data));
5196 cnic_init_bnx2x_tx_ring(dev, data);
5197 cnic_init_bnx2x_rx_ring(dev, data);
5199 l5_data.phy_address.lo = udev->l2_buf_map & 0xffffffff;
5200 l5_data.phy_address.hi = (u64) udev->l2_buf_map >> 32;
5202 set_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5204 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CLIENT_SETUP,
5205 cid, ETH_CONNECTION_TYPE, &l5_data);
5208 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
5212 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
5213 netdev_err(dev->netdev,
5214 "iSCSI CLIENT_SETUP did not complete\n");
5215 cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
5216 cnic_ring_ctl(dev, cid, cli, 1);
5217 *cid_ptr = cid >> 4;
5218 *(cid_ptr + 1) = cid * bp->db_size;
5219 *(cid_ptr + 2) = UIO_USE_TX_DOORBELL;
5223 static void cnic_shutdown_rings(struct cnic_dev *dev)
5225 struct cnic_local *cp = dev->cnic_priv;
5226 struct cnic_uio_dev *udev = cp->udev;
5229 if (!test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
5232 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
5233 cnic_shutdown_bnx2_rx_ring(dev);
5234 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
5235 u32 cli = cp->ethdev->iscsi_l2_client_id;
5236 u32 cid = cp->ethdev->iscsi_l2_cid;
5237 union l5cm_specific_data l5_data;
5240 cnic_ring_ctl(dev, cid, cli, 0);
5242 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
5244 l5_data.phy_address.lo = cli;
5245 l5_data.phy_address.hi = 0;
5246 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_HALT,
5247 cid, ETH_CONNECTION_TYPE, &l5_data);
5249 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
5253 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
5254 netdev_err(dev->netdev,
5255 "iSCSI CLIENT_HALT did not complete\n");
5256 cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
5258 memset(&l5_data, 0, sizeof(l5_data));
5259 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL,
5260 cid, NONE_CONNECTION_TYPE, &l5_data);
5263 clear_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5264 rx_ring = udev->l2_ring + CNIC_PAGE_SIZE;
5265 memset(rx_ring, 0, CNIC_PAGE_SIZE);
5268 static int cnic_register_netdev(struct cnic_dev *dev)
5270 struct cnic_local *cp = dev->cnic_priv;
5271 struct cnic_eth_dev *ethdev = cp->ethdev;
5277 if (ethdev->drv_state & CNIC_DRV_STATE_REGD)
5280 err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
5282 netdev_err(dev->netdev, "register_cnic failed\n");
5284 /* Read iSCSI config again. On some bnx2x device, iSCSI config
5285 * can change after firmware is downloaded.
5287 dev->max_iscsi_conn = ethdev->max_iscsi_conn;
5288 if (ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI)
5289 dev->max_iscsi_conn = 0;
5294 static void cnic_unregister_netdev(struct cnic_dev *dev)
5296 struct cnic_local *cp = dev->cnic_priv;
5297 struct cnic_eth_dev *ethdev = cp->ethdev;
5302 ethdev->drv_unregister_cnic(dev->netdev);
5305 static int cnic_start_hw(struct cnic_dev *dev)
5307 struct cnic_local *cp = dev->cnic_priv;
5308 struct cnic_eth_dev *ethdev = cp->ethdev;
5311 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
5314 dev->regview = ethdev->io_base;
5315 pci_dev_get(dev->pcidev);
5316 cp->func = PCI_FUNC(dev->pcidev->devfn);
5317 cp->status_blk.gen = ethdev->irq_arr[0].status_blk;
5318 cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
5320 err = cp->alloc_resc(dev);
5322 netdev_err(dev->netdev, "allocate resource failure\n");
5326 err = cp->start_hw(dev);
5330 err = cnic_cm_open(dev);
5334 set_bit(CNIC_F_CNIC_UP, &dev->flags);
5336 cp->enable_int(dev);
5342 pci_dev_put(dev->pcidev);
5346 static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
5348 cnic_disable_bnx2_int_sync(dev);
5350 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
5351 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
5353 cnic_init_context(dev, KWQ_CID);
5354 cnic_init_context(dev, KCQ_CID);
5356 cnic_setup_5709_context(dev, 0);
5359 cnic_free_resc(dev);
5363 static void cnic_stop_bnx2x_hw(struct cnic_dev *dev)
5365 struct cnic_local *cp = dev->cnic_priv;
5366 struct bnx2x *bp = netdev_priv(dev->netdev);
5367 u32 hc_index = HC_INDEX_ISCSI_EQ_CONS;
5368 u32 sb_id = cp->status_blk_num;
5369 u32 idx_off, syn_off;
5373 if (BNX2X_CHIP_IS_E2_PLUS(bp)) {
5374 idx_off = offsetof(struct hc_status_block_e2, index_values) +
5375 (hc_index * sizeof(u16));
5377 syn_off = CSTORM_HC_SYNC_LINE_INDEX_E2_OFFSET(hc_index, sb_id);
5379 idx_off = offsetof(struct hc_status_block_e1x, index_values) +
5380 (hc_index * sizeof(u16));
5382 syn_off = CSTORM_HC_SYNC_LINE_INDEX_E1X_OFFSET(hc_index, sb_id);
5384 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + syn_off, 0);
5385 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_STATUS_BLOCK_OFFSET(sb_id) +
5388 *cp->kcq1.hw_prod_idx_ptr = 0;
5389 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5390 CSTORM_ISCSI_EQ_CONS_OFFSET(bp->pfid, 0), 0);
5391 CNIC_WR16(dev, cp->kcq1.io_addr, 0);
5392 cnic_free_resc(dev);
5395 static void cnic_stop_hw(struct cnic_dev *dev)
5397 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
5398 struct cnic_local *cp = dev->cnic_priv;
5401 /* Need to wait for the ring shutdown event to complete
5402 * before clearing the CNIC_UP flag.
5404 while (cp->udev && cp->udev->uio_dev != -1 && i < 15) {
5408 cnic_shutdown_rings(dev);
5410 cp->ethdev->drv_state &= ~CNIC_DRV_STATE_HANDLES_IRQ;
5411 clear_bit(CNIC_F_CNIC_UP, &dev->flags);
5412 RCU_INIT_POINTER(cp->ulp_ops[CNIC_ULP_L4], NULL);
5414 cnic_cm_shutdown(dev);
5416 pci_dev_put(dev->pcidev);
5420 static void cnic_free_dev(struct cnic_dev *dev)
5424 while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
5428 if (atomic_read(&dev->ref_count) != 0)
5429 netdev_err(dev->netdev, "Failed waiting for ref count to go to zero\n");
5431 netdev_info(dev->netdev, "Removed CNIC device\n");
5432 dev_put(dev->netdev);
5436 static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
5437 struct pci_dev *pdev)
5439 struct cnic_dev *cdev;
5440 struct cnic_local *cp;
5443 alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
5445 cdev = kzalloc(alloc_size, GFP_KERNEL);
5450 cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
5451 cdev->register_device = cnic_register_device;
5452 cdev->unregister_device = cnic_unregister_device;
5453 cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
5455 cp = cdev->cnic_priv;
5457 cp->l2_single_buf_size = 0x400;
5458 cp->l2_rx_ring_size = 3;
5460 spin_lock_init(&cp->cnic_ulp_lock);
5462 netdev_info(dev, "Added CNIC device\n");
5467 static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
5469 struct pci_dev *pdev;
5470 struct cnic_dev *cdev;
5471 struct cnic_local *cp;
5472 struct bnx2 *bp = netdev_priv(dev);
5473 struct cnic_eth_dev *ethdev = NULL;
5476 ethdev = (bp->cnic_probe)(dev);
5481 pdev = ethdev->pdev;
5487 if ((pdev->device == PCI_DEVICE_ID_NX2_5709 ||
5488 pdev->device == PCI_DEVICE_ID_NX2_5709S) &&
5489 (pdev->revision < 0x10)) {
5495 cdev = cnic_alloc_dev(dev, pdev);
5499 set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
5500 cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
5502 cp = cdev->cnic_priv;
5503 cp->ethdev = ethdev;
5504 cdev->pcidev = pdev;
5505 cp->chip_id = ethdev->chip_id;
5507 cdev->max_iscsi_conn = ethdev->max_iscsi_conn;
5509 cp->cnic_ops = &cnic_bnx2_ops;
5510 cp->start_hw = cnic_start_bnx2_hw;
5511 cp->stop_hw = cnic_stop_bnx2_hw;
5512 cp->setup_pgtbl = cnic_setup_page_tbl;
5513 cp->alloc_resc = cnic_alloc_bnx2_resc;
5514 cp->free_resc = cnic_free_resc;
5515 cp->start_cm = cnic_cm_init_bnx2_hw;
5516 cp->stop_cm = cnic_cm_stop_bnx2_hw;
5517 cp->enable_int = cnic_enable_bnx2_int;
5518 cp->disable_int_sync = cnic_disable_bnx2_int_sync;
5519 cp->close_conn = cnic_close_bnx2_conn;
5527 static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev)
5529 struct pci_dev *pdev;
5530 struct cnic_dev *cdev;
5531 struct cnic_local *cp;
5532 struct bnx2x *bp = netdev_priv(dev);
5533 struct cnic_eth_dev *ethdev = NULL;
5536 ethdev = bp->cnic_probe(dev);
5541 pdev = ethdev->pdev;
5546 cdev = cnic_alloc_dev(dev, pdev);
5552 set_bit(CNIC_F_BNX2X_CLASS, &cdev->flags);
5553 cdev->submit_kwqes = cnic_submit_bnx2x_kwqes;
5555 cp = cdev->cnic_priv;
5556 cp->ethdev = ethdev;
5557 cdev->pcidev = pdev;
5558 cp->chip_id = ethdev->chip_id;
5560 cdev->stats_addr = ethdev->addr_drv_info_to_mcp;
5562 if (!(ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI))
5563 cdev->max_iscsi_conn = ethdev->max_iscsi_conn;
5564 if (CNIC_SUPPORTS_FCOE(bp)) {
5565 cdev->max_fcoe_conn = ethdev->max_fcoe_conn;
5566 cdev->max_fcoe_exchanges = ethdev->max_fcoe_exchanges;
5569 if (cdev->max_fcoe_conn > BNX2X_FCOE_NUM_CONNECTIONS)
5570 cdev->max_fcoe_conn = BNX2X_FCOE_NUM_CONNECTIONS;
5572 memcpy(cdev->mac_addr, ethdev->iscsi_mac, ETH_ALEN);
5574 cp->cnic_ops = &cnic_bnx2x_ops;
5575 cp->start_hw = cnic_start_bnx2x_hw;
5576 cp->stop_hw = cnic_stop_bnx2x_hw;
5577 cp->setup_pgtbl = cnic_setup_page_tbl_le;
5578 cp->alloc_resc = cnic_alloc_bnx2x_resc;
5579 cp->free_resc = cnic_free_resc;
5580 cp->start_cm = cnic_cm_init_bnx2x_hw;
5581 cp->stop_cm = cnic_cm_stop_bnx2x_hw;
5582 cp->enable_int = cnic_enable_bnx2x_int;
5583 cp->disable_int_sync = cnic_disable_bnx2x_int_sync;
5584 if (BNX2X_CHIP_IS_E2_PLUS(bp)) {
5585 cp->ack_int = cnic_ack_bnx2x_e2_msix;
5586 cp->arm_int = cnic_arm_bnx2x_e2_msix;
5588 cp->ack_int = cnic_ack_bnx2x_msix;
5589 cp->arm_int = cnic_arm_bnx2x_msix;
5591 cp->close_conn = cnic_close_bnx2x_conn;
5595 static struct cnic_dev *is_cnic_dev(struct net_device *dev)
5597 struct ethtool_drvinfo drvinfo;
5598 struct cnic_dev *cdev = NULL;
5600 if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
5601 memset(&drvinfo, 0, sizeof(drvinfo));
5602 dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
5604 if (!strcmp(drvinfo.driver, "bnx2"))
5605 cdev = init_bnx2_cnic(dev);
5606 if (!strcmp(drvinfo.driver, "bnx2x"))
5607 cdev = init_bnx2x_cnic(dev);
5609 write_lock(&cnic_dev_lock);
5610 list_add(&cdev->list, &cnic_dev_list);
5611 write_unlock(&cnic_dev_lock);
5617 static void cnic_rcv_netevent(struct cnic_local *cp, unsigned long event,
5622 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
5623 struct cnic_ulp_ops *ulp_ops;
5626 mutex_lock(&cnic_lock);
5627 ulp_ops = rcu_dereference_protected(cp->ulp_ops[if_type],
5628 lockdep_is_held(&cnic_lock));
5629 if (!ulp_ops || !ulp_ops->indicate_netevent) {
5630 mutex_unlock(&cnic_lock);
5634 ctx = cp->ulp_handle[if_type];
5636 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
5637 mutex_unlock(&cnic_lock);
5639 ulp_ops->indicate_netevent(ctx, event, vlan_id);
5641 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
5645 /* netdev event handler */
5646 static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
5649 struct net_device *netdev = netdev_notifier_info_to_dev(ptr);
5650 struct cnic_dev *dev;
5653 dev = cnic_from_netdev(netdev);
5655 if (!dev && event == NETDEV_REGISTER) {
5656 /* Check for the hot-plug device */
5657 dev = is_cnic_dev(netdev);
5664 struct cnic_local *cp = dev->cnic_priv;
5668 else if (event == NETDEV_UNREGISTER)
5671 if (event == NETDEV_UP) {
5672 if (cnic_register_netdev(dev) != 0) {
5676 if (!cnic_start_hw(dev))
5677 cnic_ulp_start(dev);
5680 cnic_rcv_netevent(cp, event, 0);
5682 if (event == NETDEV_GOING_DOWN) {
5685 cnic_unregister_netdev(dev);
5686 } else if (event == NETDEV_UNREGISTER) {
5687 write_lock(&cnic_dev_lock);
5688 list_del_init(&dev->list);
5689 write_unlock(&cnic_dev_lock);
5697 struct net_device *realdev;
5700 vid = cnic_get_vlan(netdev, &realdev);
5702 dev = cnic_from_netdev(realdev);
5704 vid |= VLAN_TAG_PRESENT;
5705 cnic_rcv_netevent(dev->cnic_priv, event, vid);
5714 static struct notifier_block cnic_netdev_notifier = {
5715 .notifier_call = cnic_netdev_event
5718 static void cnic_release(void)
5720 struct cnic_uio_dev *udev;
5722 while (!list_empty(&cnic_udev_list)) {
5723 udev = list_entry(cnic_udev_list.next, struct cnic_uio_dev,
5725 cnic_free_uio(udev);
5729 static int __init cnic_init(void)
5733 pr_info("%s", version);
5735 rc = register_netdevice_notifier(&cnic_netdev_notifier);
5741 cnic_wq = create_singlethread_workqueue("cnic_wq");
5744 unregister_netdevice_notifier(&cnic_netdev_notifier);
5751 static void __exit cnic_exit(void)
5753 unregister_netdevice_notifier(&cnic_netdev_notifier);
5755 destroy_workqueue(cnic_wq);
5758 module_init(cnic_init);
5759 module_exit(cnic_exit);