2 * Linux network driver for Brocade Converged Network Adapter.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License (GPL) Version 2 as
6 * published by the Free Software Foundation
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
14 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
21 #include <linux/rtnetlink.h>
22 #include <linux/workqueue.h>
23 #include <linux/ipv6.h>
24 #include <linux/etherdevice.h>
25 #include <linux/mutex.h>
26 #include <linux/firmware.h>
27 #include <linux/if_vlan.h>
30 #include <asm/checksum.h>
31 #include <net/ip6_checksum.h>
38 #define BNAD_TXQ_DEPTH 2048
39 #define BNAD_RXQ_DEPTH 2048
41 #define BNAD_MAX_TXS 1
42 #define BNAD_MAX_TXQ_PER_TX 8 /* 8 priority queues */
43 #define BNAD_TXQ_NUM 1
45 #define BNAD_MAX_RXS 1
46 #define BNAD_MAX_RXPS_PER_RX 16
47 #define BNAD_MAX_RXQ_PER_RXP 2
50 * Control structure pointed to ccb->ctrl, which
51 * determines the NAPI / LRO behavior CCB
52 * There is 1:1 corres. between ccb & ctrl
57 struct napi_struct napi;
60 #define BNAD_RXMODE_PROMISC_DEFAULT BNA_RXMODE_PROMISC
62 #define BNAD_GET_TX_ID(_skb) (0)
65 * GLOBAL #defines (CONSTANTS)
67 #define BNAD_NAME "bna"
68 #define BNAD_NAME_LEN 64
70 #define BNAD_VERSION "2.3.2.3"
72 #define BNAD_MAILBOX_MSIX_INDEX 0
73 #define BNAD_MAILBOX_MSIX_VECTORS 1
74 #define BNAD_INTX_TX_IB_BITMASK 0x1
75 #define BNAD_INTX_RX_IB_BITMASK 0x2
77 #define BNAD_STATS_TIMER_FREQ 1000 /* in msecs */
78 #define BNAD_DIM_TIMER_FREQ 1000 /* in msecs */
80 #define BNAD_IOCETH_TIMEOUT 10000
82 #define BNAD_MAX_Q_DEPTH 0x10000
83 #define BNAD_MIN_Q_DEPTH 0x200
85 #define BNAD_JUMBO_MTU 9000
87 #define BNAD_NETIF_WAKE_THRESHOLD 8
89 #define BNAD_RXQ_REFILL_THRESHOLD_SHIFT 3
91 /* Bit positions for tcb->flags */
92 #define BNAD_TXQ_FREE_SENT 0
93 #define BNAD_TXQ_TX_STARTED 1
95 /* Bit positions for rcb->flags */
96 #define BNAD_RXQ_REFILL 0
97 #define BNAD_RXQ_STARTED 1
100 #define BNAD_NUM_TXQ (bnad->num_tx * bnad->num_txq_per_tx)
101 #define BNAD_NUM_RXP (bnad->num_rx * bnad->num_rxp_per_rx)
108 enum bnad_intr_source {
113 enum bnad_link_state {
118 struct bnad_completion {
119 struct completion ioc_comp;
120 struct completion ucast_comp;
121 struct completion mcast_comp;
122 struct completion tx_comp;
123 struct completion rx_comp;
124 struct completion stats_comp;
125 struct completion enet_comp;
126 struct completion mtu_comp;
129 u8 ucast_comp_status;
130 u8 mcast_comp_status;
133 u8 stats_comp_status;
138 /* Tx Rx Control Stats */
139 struct bnad_drv_stats {
140 u64 netif_queue_stop;
141 u64 netif_queue_wakeup;
142 u64 netif_queue_stopped;
151 u64 hw_stats_updates;
152 u64 netif_rx_schedule;
153 u64 netif_rx_complete;
154 u64 netif_rx_dropped;
160 u64 rxp_info_alloc_failed;
161 u64 mbox_intr_disabled;
162 u64 mbox_intr_enabled;
163 u64 tx_unmap_q_alloc_failed;
164 u64 rx_unmap_q_alloc_failed;
166 u64 rxbuf_alloc_failed;
169 /* Complete driver stats */
171 struct bnad_drv_stats drv_stats;
172 struct bna_stats *bna_stats;
175 /* Tx / Rx Resources */
176 struct bnad_tx_res_info {
177 struct bna_res_info res_info[BNA_TX_RES_T_MAX];
180 struct bnad_rx_res_info {
181 struct bna_res_info res_info[BNA_RX_RES_T_MAX];
184 struct bnad_tx_info {
185 struct bna_tx *tx; /* 1:1 between tx_info & tx */
186 struct bna_tcb *tcb[BNAD_MAX_TXQ_PER_TX];
188 } ____cacheline_aligned;
190 struct bnad_rx_info {
191 struct bna_rx *rx; /* 1:1 between rx_info & rx */
193 struct bnad_rx_ctrl rx_ctrl[BNAD_MAX_RXPS_PER_RX];
195 } ____cacheline_aligned;
197 /* Unmap queues for Tx / Rx cleanup */
198 struct bnad_skb_unmap {
200 DEFINE_DMA_UNMAP_ADDR(dma_addr);
203 struct bnad_unmap_q {
207 /* This should be the last one */
208 struct bnad_skb_unmap unmap_array[1];
211 /* Bit mask values for bnad->cfg_flags */
212 #define BNAD_CF_DIM_ENABLED 0x01 /* DIM */
213 #define BNAD_CF_PROMISC 0x02
214 #define BNAD_CF_ALLMULTI 0x04
215 #define BNAD_CF_MSIX 0x08 /* If in MSIx mode */
217 /* Defines for run_flags bit-mask */
218 /* Set, tested & cleared using xxx_bit() functions */
219 /* Values indicated bit positions */
220 #define BNAD_RF_CEE_RUNNING 0
221 #define BNAD_RF_MTU_SET 1
222 #define BNAD_RF_MBOX_IRQ_DISABLED 2
223 #define BNAD_RF_NETDEV_REGISTERED 3
224 #define BNAD_RF_DIM_TIMER_RUNNING 4
225 #define BNAD_RF_STATS_TIMER_RUNNING 5
226 #define BNAD_RF_TX_PRIO_SET 6
229 /* Define for Fast Path flags */
230 /* Defined as bit positions */
231 #define BNAD_FP_IN_RX_PATH 0
234 struct net_device *netdev;
237 struct bnad_tx_info tx_info[BNAD_MAX_TXS];
238 struct bnad_rx_info rx_info[BNAD_MAX_RXS];
240 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
242 * These q numbers are global only because
243 * they are used to calculate MSIx vectors.
244 * Actually the exact # of queues are per Tx/Rx
255 u8 tx_coalescing_timeo;
256 u8 rx_coalescing_timeo;
258 struct bna_rx_config rx_config[BNAD_MAX_RXS];
259 struct bna_tx_config tx_config[BNAD_MAX_TXS];
261 void __iomem *bar0; /* BAR0 address */
266 unsigned long run_flags;
268 struct pci_dev *pcidev;
273 struct msix_entry *msix_table;
275 struct mutex conf_mutex;
276 spinlock_t bna_lock ____cacheline_aligned;
279 struct timer_list ioc_timer;
280 struct timer_list dim_timer;
281 struct timer_list stats_timer;
283 /* Control path resources, memory & irq */
284 struct bna_res_info res_info[BNA_RES_T_MAX];
285 struct bna_res_info mod_res_info[BNA_MOD_RES_T_MAX];
286 struct bnad_tx_res_info tx_res_info[BNAD_MAX_TXS];
287 struct bnad_rx_res_info rx_res_info[BNAD_MAX_RXS];
289 struct bnad_completion bnad_completions;
291 /* Burnt in MAC address */
294 struct tasklet_struct tx_free_tasklet;
297 struct bnad_stats stats;
299 struct bnad_diag *diag;
301 char adapter_name[BNAD_NAME_LEN];
302 char port_name[BNAD_NAME_LEN];
303 char mbox_irq_name[BNAD_NAME_LEN];
309 extern struct firmware *bfi_fw;
310 extern u32 bnad_rxqs_per_cq;
315 extern u32 *cna_get_firmware_buf(struct pci_dev *pdev);
316 /* Netdev entry point prototypes */
317 extern void bnad_set_ethtool_ops(struct net_device *netdev);
319 /* Configuration & setup */
320 extern void bnad_tx_coalescing_timeo_set(struct bnad *bnad);
321 extern void bnad_rx_coalescing_timeo_set(struct bnad *bnad);
323 extern int bnad_setup_rx(struct bnad *bnad, u32 rx_id);
324 extern int bnad_setup_tx(struct bnad *bnad, u32 tx_id);
325 extern void bnad_cleanup_tx(struct bnad *bnad, u32 tx_id);
326 extern void bnad_cleanup_rx(struct bnad *bnad, u32 rx_id);
328 /* Timer start/stop protos */
329 extern void bnad_dim_timer_start(struct bnad *bnad);
332 extern void bnad_netdev_qstats_fill(struct bnad *bnad,
333 struct rtnl_link_stats64 *stats);
334 extern void bnad_netdev_hwstats_fill(struct bnad *bnad,
335 struct rtnl_link_stats64 *stats);
340 /* To set & get the stats counters */
341 #define BNAD_UPDATE_CTR(_bnad, _ctr) \
342 (((_bnad)->stats.drv_stats._ctr)++)
344 #define BNAD_GET_CTR(_bnad, _ctr) ((_bnad)->stats.drv_stats._ctr)
346 #define bnad_enable_rx_irq_unsafe(_ccb) \
348 if (likely(test_bit(BNAD_RXQ_STARTED, &ccb->rcb[0]->flags))) {\
349 bna_ib_coalescing_timer_set((_ccb)->i_dbell, \
350 (_ccb)->rx_coalescing_timeo); \
351 bna_ib_ack((_ccb)->i_dbell, 0); \
355 #define bnad_dim_timer_running(_bnad) \
356 (((_bnad)->cfg_flags & BNAD_CF_DIM_ENABLED) && \
357 (test_bit(BNAD_RF_DIM_TIMER_RUNNING, &((_bnad)->run_flags))))
359 #endif /* __BNAD_H__ */