2 * Copyright (C) 2005 - 2014 Emulex
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@emulex.com
15 * Costa Mesa, CA 92626
19 * The driver sends configuration and managements command requests to the
20 * firmware in the BE. These requests are communicated to the processor
21 * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one
22 * WRB inside a MAILBOX.
23 * The commands are serviced by the ARM processor in the BladeEngine's MPU.
32 #define MCC_WRB_EMBEDDED_MASK 1 /* bit 0 of dword 0*/
33 #define MCC_WRB_SGE_CNT_SHIFT 3 /* bits 3 - 7 of dword 0 */
34 #define MCC_WRB_SGE_CNT_MASK 0x1F /* bits 3 - 7 of dword 0 */
36 u32 embedded; /* dword 0 */
37 u32 payload_length; /* dword 1 */
38 u32 tag0; /* dword 2 */
39 u32 tag1; /* dword 3 */
40 u32 rsvd; /* dword 4 */
42 u8 embedded_payload[236]; /* used by embedded cmds */
43 struct be_sge sgl[19]; /* used by non-embedded cmds */
47 #define CQE_FLAGS_VALID_MASK BIT(31)
48 #define CQE_FLAGS_ASYNC_MASK BIT(30)
49 #define CQE_FLAGS_COMPLETED_MASK BIT(28)
50 #define CQE_FLAGS_CONSUMED_MASK BIT(27)
52 /* Completion Status */
53 enum mcc_base_status {
54 MCC_STATUS_SUCCESS = 0,
55 MCC_STATUS_FAILED = 1,
56 MCC_STATUS_ILLEGAL_REQUEST = 2,
57 MCC_STATUS_ILLEGAL_FIELD = 3,
58 MCC_STATUS_INSUFFICIENT_BUFFER = 4,
59 MCC_STATUS_UNAUTHORIZED_REQUEST = 5,
60 MCC_STATUS_NOT_SUPPORTED = 66,
61 MCC_STATUS_FEATURE_NOT_SUPPORTED = 68
64 /* Additional status */
65 enum mcc_addl_status {
66 MCC_ADDL_STATUS_INSUFFICIENT_RESOURCES = 0x16,
67 MCC_ADDL_STATUS_FLASH_IMAGE_CRC_MISMATCH = 0x4d,
68 MCC_ADDL_STATUS_TOO_MANY_INTERFACES = 0x4a
71 #define CQE_BASE_STATUS_MASK 0xFFFF
72 #define CQE_BASE_STATUS_SHIFT 0 /* bits 0 - 15 */
73 #define CQE_ADDL_STATUS_MASK 0xFF
74 #define CQE_ADDL_STATUS_SHIFT 16 /* bits 16 - 31 */
76 #define base_status(status) \
77 ((enum mcc_base_status) \
78 (status > 0 ? (status & CQE_BASE_STATUS_MASK) : 0))
79 #define addl_status(status) \
80 ((enum mcc_addl_status) \
81 (status > 0 ? (status >> CQE_ADDL_STATUS_SHIFT) & \
82 CQE_ADDL_STATUS_MASK : 0))
85 u32 status; /* dword 0 */
86 u32 tag0; /* dword 1 */
87 u32 tag1; /* dword 2 */
88 u32 flags; /* dword 3 */
91 /* When the async bit of mcc_compl flags is set, flags
92 * is interpreted as follows:
94 #define ASYNC_EVENT_CODE_SHIFT 8 /* bits 8 - 15 */
95 #define ASYNC_EVENT_CODE_MASK 0xFF
96 #define ASYNC_EVENT_TYPE_SHIFT 16
97 #define ASYNC_EVENT_TYPE_MASK 0xFF
98 #define ASYNC_EVENT_CODE_LINK_STATE 0x1
99 #define ASYNC_EVENT_CODE_GRP_5 0x5
100 #define ASYNC_EVENT_QOS_SPEED 0x1
101 #define ASYNC_EVENT_COS_PRIORITY 0x2
102 #define ASYNC_EVENT_PVID_STATE 0x3
103 #define ASYNC_EVENT_CODE_QNQ 0x6
104 #define ASYNC_DEBUG_EVENT_TYPE_QNQ 1
110 #define LINK_STATUS_MASK 0x1
111 #define LOGICAL_LINK_STATUS_MASK 0x2
113 /* When the event code of compl->flags is link-state, the mcc_compl
114 * must be interpreted as follows
116 struct be_async_event_link_state {
126 /* When the event code of compl->flags is GRP-5 and event_type is QOS_SPEED
127 * the mcc_compl must be interpreted as follows
129 struct be_async_event_grp5_qos_link_speed {
137 /* When the event code of compl->flags is GRP5 and event type is
138 * CoS-Priority, the mcc_compl must be interpreted as follows
140 struct be_async_event_grp5_cos_priority {
142 u8 available_priority_bmap;
143 u8 reco_default_priority;
150 /* When the event code of compl->flags is GRP5 and event type is
151 * PVID state, the mcc_compl must be interpreted as follows
153 struct be_async_event_grp5_pvid_state {
162 /* async event indicating outer VLAN tag in QnQ */
163 struct be_async_event_qnq {
164 u8 valid; /* Indicates if outer VLAN is valid */
172 struct be_mcc_mailbox {
173 struct be_mcc_wrb wrb;
174 struct be_mcc_compl compl;
177 #define CMD_SUBSYSTEM_COMMON 0x1
178 #define CMD_SUBSYSTEM_ETH 0x3
179 #define CMD_SUBSYSTEM_LOWLEVEL 0xb
181 #define OPCODE_COMMON_NTWK_MAC_QUERY 1
182 #define OPCODE_COMMON_NTWK_MAC_SET 2
183 #define OPCODE_COMMON_NTWK_MULTICAST_SET 3
184 #define OPCODE_COMMON_NTWK_VLAN_CONFIG 4
185 #define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY 5
186 #define OPCODE_COMMON_READ_FLASHROM 6
187 #define OPCODE_COMMON_WRITE_FLASHROM 7
188 #define OPCODE_COMMON_CQ_CREATE 12
189 #define OPCODE_COMMON_EQ_CREATE 13
190 #define OPCODE_COMMON_MCC_CREATE 21
191 #define OPCODE_COMMON_SET_QOS 28
192 #define OPCODE_COMMON_MCC_CREATE_EXT 90
193 #define OPCODE_COMMON_SEEPROM_READ 30
194 #define OPCODE_COMMON_GET_CNTL_ATTRIBUTES 32
195 #define OPCODE_COMMON_NTWK_RX_FILTER 34
196 #define OPCODE_COMMON_GET_FW_VERSION 35
197 #define OPCODE_COMMON_SET_FLOW_CONTROL 36
198 #define OPCODE_COMMON_GET_FLOW_CONTROL 37
199 #define OPCODE_COMMON_SET_FRAME_SIZE 39
200 #define OPCODE_COMMON_MODIFY_EQ_DELAY 41
201 #define OPCODE_COMMON_FIRMWARE_CONFIG 42
202 #define OPCODE_COMMON_NTWK_INTERFACE_CREATE 50
203 #define OPCODE_COMMON_NTWK_INTERFACE_DESTROY 51
204 #define OPCODE_COMMON_MCC_DESTROY 53
205 #define OPCODE_COMMON_CQ_DESTROY 54
206 #define OPCODE_COMMON_EQ_DESTROY 55
207 #define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG 58
208 #define OPCODE_COMMON_NTWK_PMAC_ADD 59
209 #define OPCODE_COMMON_NTWK_PMAC_DEL 60
210 #define OPCODE_COMMON_FUNCTION_RESET 61
211 #define OPCODE_COMMON_MANAGE_FAT 68
212 #define OPCODE_COMMON_ENABLE_DISABLE_BEACON 69
213 #define OPCODE_COMMON_GET_BEACON_STATE 70
214 #define OPCODE_COMMON_READ_TRANSRECV_DATA 73
215 #define OPCODE_COMMON_GET_PORT_NAME 77
216 #define OPCODE_COMMON_SET_LOGICAL_LINK_CONFIG 80
217 #define OPCODE_COMMON_SET_INTERRUPT_ENABLE 89
218 #define OPCODE_COMMON_SET_FN_PRIVILEGES 100
219 #define OPCODE_COMMON_GET_PHY_DETAILS 102
220 #define OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP 103
221 #define OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES 121
222 #define OPCODE_COMMON_GET_EXT_FAT_CAPABILITES 125
223 #define OPCODE_COMMON_SET_EXT_FAT_CAPABILITES 126
224 #define OPCODE_COMMON_GET_MAC_LIST 147
225 #define OPCODE_COMMON_SET_MAC_LIST 148
226 #define OPCODE_COMMON_GET_HSW_CONFIG 152
227 #define OPCODE_COMMON_GET_FUNC_CONFIG 160
228 #define OPCODE_COMMON_GET_PROFILE_CONFIG 164
229 #define OPCODE_COMMON_SET_PROFILE_CONFIG 165
230 #define OPCODE_COMMON_GET_ACTIVE_PROFILE 167
231 #define OPCODE_COMMON_SET_HSW_CONFIG 153
232 #define OPCODE_COMMON_GET_FN_PRIVILEGES 170
233 #define OPCODE_COMMON_READ_OBJECT 171
234 #define OPCODE_COMMON_WRITE_OBJECT 172
235 #define OPCODE_COMMON_DELETE_OBJECT 174
236 #define OPCODE_COMMON_MANAGE_IFACE_FILTERS 193
237 #define OPCODE_COMMON_GET_IFACE_LIST 194
238 #define OPCODE_COMMON_ENABLE_DISABLE_VF 196
240 #define OPCODE_ETH_RSS_CONFIG 1
241 #define OPCODE_ETH_ACPI_CONFIG 2
242 #define OPCODE_ETH_PROMISCUOUS 3
243 #define OPCODE_ETH_GET_STATISTICS 4
244 #define OPCODE_ETH_TX_CREATE 7
245 #define OPCODE_ETH_RX_CREATE 8
246 #define OPCODE_ETH_TX_DESTROY 9
247 #define OPCODE_ETH_RX_DESTROY 10
248 #define OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG 12
249 #define OPCODE_ETH_GET_PPORT_STATS 18
251 #define OPCODE_LOWLEVEL_HOST_DDR_DMA 17
252 #define OPCODE_LOWLEVEL_LOOPBACK_TEST 18
253 #define OPCODE_LOWLEVEL_SET_LOOPBACK_MODE 19
255 struct be_cmd_req_hdr {
256 u8 opcode; /* dword 0 */
257 u8 subsystem; /* dword 0 */
258 u8 port_number; /* dword 0 */
259 u8 domain; /* dword 0 */
260 u32 timeout; /* dword 1 */
261 u32 request_length; /* dword 2 */
262 u8 version; /* dword 3 */
263 u8 rsvd[3]; /* dword 3 */
266 #define RESP_HDR_INFO_OPCODE_SHIFT 0 /* bits 0 - 7 */
267 #define RESP_HDR_INFO_SUBSYS_SHIFT 8 /* bits 8 - 15 */
268 struct be_cmd_resp_hdr {
269 u8 opcode; /* dword 0 */
270 u8 subsystem; /* dword 0 */
271 u8 rsvd[2]; /* dword 0 */
272 u8 base_status; /* dword 1 */
273 u8 addl_status; /* dword 1 */
274 u8 rsvd1[2]; /* dword 1 */
275 u32 response_length; /* dword 2 */
276 u32 actual_resp_len; /* dword 3 */
284 /**************************
285 * BE Command definitions *
286 **************************/
288 /* Pseudo amap definition in which each bit of the actual structure is defined
289 * as a byte: used to calculate offset/shift/mask of each field */
290 struct amap_eq_context {
291 u8 cidx[13]; /* dword 0*/
292 u8 rsvd0[3]; /* dword 0*/
293 u8 epidx[13]; /* dword 0*/
294 u8 valid; /* dword 0*/
295 u8 rsvd1; /* dword 0*/
296 u8 size; /* dword 0*/
297 u8 pidx[13]; /* dword 1*/
298 u8 rsvd2[3]; /* dword 1*/
299 u8 pd[10]; /* dword 1*/
300 u8 count[3]; /* dword 1*/
301 u8 solevent; /* dword 1*/
302 u8 stalled; /* dword 1*/
303 u8 armed; /* dword 1*/
304 u8 rsvd3[4]; /* dword 2*/
305 u8 func[8]; /* dword 2*/
306 u8 rsvd4; /* dword 2*/
307 u8 delaymult[10]; /* dword 2*/
308 u8 rsvd5[2]; /* dword 2*/
309 u8 phase[2]; /* dword 2*/
310 u8 nodelay; /* dword 2*/
311 u8 rsvd6[4]; /* dword 2*/
312 u8 rsvd7[32]; /* dword 3*/
315 struct be_cmd_req_eq_create {
316 struct be_cmd_req_hdr hdr;
317 u16 num_pages; /* sword */
318 u16 rsvd0; /* sword */
319 u8 context[sizeof(struct amap_eq_context) / 8];
320 struct phys_addr pages[8];
323 struct be_cmd_resp_eq_create {
324 struct be_cmd_resp_hdr resp_hdr;
325 u16 eq_id; /* sword */
326 u16 msix_idx; /* available only in v2 */
329 /******************** Mac query ***************************/
331 MAC_ADDRESS_TYPE_STORAGE = 0x0,
332 MAC_ADDRESS_TYPE_NETWORK = 0x1,
333 MAC_ADDRESS_TYPE_PD = 0x2,
334 MAC_ADDRESS_TYPE_MANAGEMENT = 0x3
342 struct be_cmd_req_mac_query {
343 struct be_cmd_req_hdr hdr;
350 struct be_cmd_resp_mac_query {
351 struct be_cmd_resp_hdr hdr;
355 /******************** PMac Add ***************************/
356 struct be_cmd_req_pmac_add {
357 struct be_cmd_req_hdr hdr;
359 u8 mac_address[ETH_ALEN];
363 struct be_cmd_resp_pmac_add {
364 struct be_cmd_resp_hdr hdr;
368 /******************** PMac Del ***************************/
369 struct be_cmd_req_pmac_del {
370 struct be_cmd_req_hdr hdr;
375 /******************** Create CQ ***************************/
376 /* Pseudo amap definition in which each bit of the actual structure is defined
377 * as a byte: used to calculate offset/shift/mask of each field */
378 struct amap_cq_context_be {
379 u8 cidx[11]; /* dword 0*/
380 u8 rsvd0; /* dword 0*/
381 u8 coalescwm[2]; /* dword 0*/
382 u8 nodelay; /* dword 0*/
383 u8 epidx[11]; /* dword 0*/
384 u8 rsvd1; /* dword 0*/
385 u8 count[2]; /* dword 0*/
386 u8 valid; /* dword 0*/
387 u8 solevent; /* dword 0*/
388 u8 eventable; /* dword 0*/
389 u8 pidx[11]; /* dword 1*/
390 u8 rsvd2; /* dword 1*/
391 u8 pd[10]; /* dword 1*/
392 u8 eqid[8]; /* dword 1*/
393 u8 stalled; /* dword 1*/
394 u8 armed; /* dword 1*/
395 u8 rsvd3[4]; /* dword 2*/
396 u8 func[8]; /* dword 2*/
397 u8 rsvd4[20]; /* dword 2*/
398 u8 rsvd5[32]; /* dword 3*/
401 struct amap_cq_context_v2 {
402 u8 rsvd0[12]; /* dword 0*/
403 u8 coalescwm[2]; /* dword 0*/
404 u8 nodelay; /* dword 0*/
405 u8 rsvd1[12]; /* dword 0*/
406 u8 count[2]; /* dword 0*/
407 u8 valid; /* dword 0*/
408 u8 rsvd2; /* dword 0*/
409 u8 eventable; /* dword 0*/
410 u8 eqid[16]; /* dword 1*/
411 u8 rsvd3[15]; /* dword 1*/
412 u8 armed; /* dword 1*/
413 u8 rsvd4[32]; /* dword 2*/
414 u8 rsvd5[32]; /* dword 3*/
417 struct be_cmd_req_cq_create {
418 struct be_cmd_req_hdr hdr;
422 u8 context[sizeof(struct amap_cq_context_be) / 8];
423 struct phys_addr pages[8];
427 struct be_cmd_resp_cq_create {
428 struct be_cmd_resp_hdr hdr;
433 struct be_cmd_req_get_fat {
434 struct be_cmd_req_hdr hdr;
438 u32 data_buffer_size;
442 struct be_cmd_resp_get_fat {
443 struct be_cmd_resp_hdr hdr;
451 /******************** Create MCCQ ***************************/
452 /* Pseudo amap definition in which each bit of the actual structure is defined
453 * as a byte: used to calculate offset/shift/mask of each field */
454 struct amap_mcc_context_be {
469 struct amap_mcc_context_v1 {
475 u8 async_cq_valid[1];
480 struct be_cmd_req_mcc_create {
481 struct be_cmd_req_hdr hdr;
484 u8 context[sizeof(struct amap_mcc_context_be) / 8];
485 struct phys_addr pages[8];
488 struct be_cmd_req_mcc_ext_create {
489 struct be_cmd_req_hdr hdr;
492 u32 async_event_bitmap[1];
493 u8 context[sizeof(struct amap_mcc_context_v1) / 8];
494 struct phys_addr pages[8];
497 struct be_cmd_resp_mcc_create {
498 struct be_cmd_resp_hdr hdr;
503 /******************** Create TxQ ***************************/
504 #define BE_ETH_TX_RING_TYPE_STANDARD 2
505 #define BE_ULP1_NUM 1
507 struct be_cmd_req_eth_tx_create {
508 struct be_cmd_req_hdr hdr;
519 struct phys_addr pages[8];
522 struct be_cmd_resp_eth_tx_create {
523 struct be_cmd_resp_hdr hdr;
530 /******************** Create RxQ ***************************/
531 struct be_cmd_req_eth_rx_create {
532 struct be_cmd_req_hdr hdr;
536 struct phys_addr pages[2];
543 struct be_cmd_resp_eth_rx_create {
544 struct be_cmd_resp_hdr hdr;
550 /******************** Q Destroy ***************************/
551 /* Type of Queue to be destroyed */
560 struct be_cmd_req_q_destroy {
561 struct be_cmd_req_hdr hdr;
563 u16 bypass_flush; /* valid only for rx q destroy */
566 /************ I/f Create (it's actually I/f Config Create)**********/
568 /* Capability flags for the i/f */
570 BE_IF_FLAGS_RSS = 0x4,
571 BE_IF_FLAGS_PROMISCUOUS = 0x8,
572 BE_IF_FLAGS_BROADCAST = 0x10,
573 BE_IF_FLAGS_UNTAGGED = 0x20,
574 BE_IF_FLAGS_ULP = 0x40,
575 BE_IF_FLAGS_VLAN_PROMISCUOUS = 0x80,
576 BE_IF_FLAGS_VLAN = 0x100,
577 BE_IF_FLAGS_MCAST_PROMISCUOUS = 0x200,
578 BE_IF_FLAGS_PASS_L2_ERRORS = 0x400,
579 BE_IF_FLAGS_PASS_L3L4_ERRORS = 0x800,
580 BE_IF_FLAGS_MULTICAST = 0x1000
583 #define BE_IF_CAP_FLAGS_WANT (BE_IF_FLAGS_RSS | BE_IF_FLAGS_PROMISCUOUS |\
584 BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_VLAN_PROMISCUOUS |\
585 BE_IF_FLAGS_VLAN | BE_IF_FLAGS_MCAST_PROMISCUOUS |\
586 BE_IF_FLAGS_PASS_L3L4_ERRORS | BE_IF_FLAGS_MULTICAST |\
587 BE_IF_FLAGS_UNTAGGED)
589 #define BE_IF_FLAGS_ALL_PROMISCUOUS (BE_IF_FLAGS_PROMISCUOUS | \
590 BE_IF_FLAGS_VLAN_PROMISCUOUS |\
591 BE_IF_FLAGS_MCAST_PROMISCUOUS)
593 /* An RX interface is an object with one or more MAC addresses and
594 * filtering capabilities. */
595 struct be_cmd_req_if_create {
596 struct be_cmd_req_hdr hdr;
597 u32 version; /* ignore currently */
598 u32 capability_flags;
600 u8 mac_addr[ETH_ALEN];
602 u8 pmac_invalid; /* if set, don't attach the mac addr to the i/f */
603 u32 vlan_tag; /* not used currently */
606 struct be_cmd_resp_if_create {
607 struct be_cmd_resp_hdr hdr;
612 /****** I/f Destroy(it's actually I/f Config Destroy )**********/
613 struct be_cmd_req_if_destroy {
614 struct be_cmd_req_hdr hdr;
618 /*************** HW Stats Get **********************************/
619 struct be_port_rxf_stats_v0 {
620 u32 rx_bytes_lsd; /* dword 0*/
621 u32 rx_bytes_msd; /* dword 1*/
622 u32 rx_total_frames; /* dword 2*/
623 u32 rx_unicast_frames; /* dword 3*/
624 u32 rx_multicast_frames; /* dword 4*/
625 u32 rx_broadcast_frames; /* dword 5*/
626 u32 rx_crc_errors; /* dword 6*/
627 u32 rx_alignment_symbol_errors; /* dword 7*/
628 u32 rx_pause_frames; /* dword 8*/
629 u32 rx_control_frames; /* dword 9*/
630 u32 rx_in_range_errors; /* dword 10*/
631 u32 rx_out_range_errors; /* dword 11*/
632 u32 rx_frame_too_long; /* dword 12*/
633 u32 rx_address_filtered; /* dword 13*/
634 u32 rx_vlan_filtered; /* dword 14*/
635 u32 rx_dropped_too_small; /* dword 15*/
636 u32 rx_dropped_too_short; /* dword 16*/
637 u32 rx_dropped_header_too_small; /* dword 17*/
638 u32 rx_dropped_tcp_length; /* dword 18*/
639 u32 rx_dropped_runt; /* dword 19*/
640 u32 rx_64_byte_packets; /* dword 20*/
641 u32 rx_65_127_byte_packets; /* dword 21*/
642 u32 rx_128_256_byte_packets; /* dword 22*/
643 u32 rx_256_511_byte_packets; /* dword 23*/
644 u32 rx_512_1023_byte_packets; /* dword 24*/
645 u32 rx_1024_1518_byte_packets; /* dword 25*/
646 u32 rx_1519_2047_byte_packets; /* dword 26*/
647 u32 rx_2048_4095_byte_packets; /* dword 27*/
648 u32 rx_4096_8191_byte_packets; /* dword 28*/
649 u32 rx_8192_9216_byte_packets; /* dword 29*/
650 u32 rx_ip_checksum_errs; /* dword 30*/
651 u32 rx_tcp_checksum_errs; /* dword 31*/
652 u32 rx_udp_checksum_errs; /* dword 32*/
653 u32 rx_non_rss_packets; /* dword 33*/
654 u32 rx_ipv4_packets; /* dword 34*/
655 u32 rx_ipv6_packets; /* dword 35*/
656 u32 rx_ipv4_bytes_lsd; /* dword 36*/
657 u32 rx_ipv4_bytes_msd; /* dword 37*/
658 u32 rx_ipv6_bytes_lsd; /* dword 38*/
659 u32 rx_ipv6_bytes_msd; /* dword 39*/
660 u32 rx_chute1_packets; /* dword 40*/
661 u32 rx_chute2_packets; /* dword 41*/
662 u32 rx_chute3_packets; /* dword 42*/
663 u32 rx_management_packets; /* dword 43*/
664 u32 rx_switched_unicast_packets; /* dword 44*/
665 u32 rx_switched_multicast_packets; /* dword 45*/
666 u32 rx_switched_broadcast_packets; /* dword 46*/
667 u32 tx_bytes_lsd; /* dword 47*/
668 u32 tx_bytes_msd; /* dword 48*/
669 u32 tx_unicastframes; /* dword 49*/
670 u32 tx_multicastframes; /* dword 50*/
671 u32 tx_broadcastframes; /* dword 51*/
672 u32 tx_pauseframes; /* dword 52*/
673 u32 tx_controlframes; /* dword 53*/
674 u32 tx_64_byte_packets; /* dword 54*/
675 u32 tx_65_127_byte_packets; /* dword 55*/
676 u32 tx_128_256_byte_packets; /* dword 56*/
677 u32 tx_256_511_byte_packets; /* dword 57*/
678 u32 tx_512_1023_byte_packets; /* dword 58*/
679 u32 tx_1024_1518_byte_packets; /* dword 59*/
680 u32 tx_1519_2047_byte_packets; /* dword 60*/
681 u32 tx_2048_4095_byte_packets; /* dword 61*/
682 u32 tx_4096_8191_byte_packets; /* dword 62*/
683 u32 tx_8192_9216_byte_packets; /* dword 63*/
684 u32 rx_fifo_overflow; /* dword 64*/
685 u32 rx_input_fifo_overflow; /* dword 65*/
688 struct be_rxf_stats_v0 {
689 struct be_port_rxf_stats_v0 port[2];
690 u32 rx_drops_no_pbuf; /* dword 132*/
691 u32 rx_drops_no_txpb; /* dword 133*/
692 u32 rx_drops_no_erx_descr; /* dword 134*/
693 u32 rx_drops_no_tpre_descr; /* dword 135*/
694 u32 management_rx_port_packets; /* dword 136*/
695 u32 management_rx_port_bytes; /* dword 137*/
696 u32 management_rx_port_pause_frames; /* dword 138*/
697 u32 management_rx_port_errors; /* dword 139*/
698 u32 management_tx_port_packets; /* dword 140*/
699 u32 management_tx_port_bytes; /* dword 141*/
700 u32 management_tx_port_pause; /* dword 142*/
701 u32 management_rx_port_rxfifo_overflow; /* dword 143*/
702 u32 rx_drops_too_many_frags; /* dword 144*/
703 u32 rx_drops_invalid_ring; /* dword 145*/
704 u32 forwarded_packets; /* dword 146*/
705 u32 rx_drops_mtu; /* dword 147*/
707 u32 port0_jabber_events;
708 u32 port1_jabber_events;
712 struct be_erx_stats_v0 {
713 u32 rx_drops_no_fragments[44]; /* dwordS 0 to 43*/
717 struct be_pmem_stats {
722 struct be_hw_stats_v0 {
723 struct be_rxf_stats_v0 rxf;
725 struct be_erx_stats_v0 erx;
726 struct be_pmem_stats pmem;
729 struct be_cmd_req_get_stats_v0 {
730 struct be_cmd_req_hdr hdr;
731 u8 rsvd[sizeof(struct be_hw_stats_v0)];
734 struct be_cmd_resp_get_stats_v0 {
735 struct be_cmd_resp_hdr hdr;
736 struct be_hw_stats_v0 hw_stats;
739 struct lancer_pport_stats {
742 u32 tx_unicast_packets_lo;
743 u32 tx_unicast_packets_hi;
744 u32 tx_multicast_packets_lo;
745 u32 tx_multicast_packets_hi;
746 u32 tx_broadcast_packets_lo;
747 u32 tx_broadcast_packets_hi;
750 u32 tx_unicast_bytes_lo;
751 u32 tx_unicast_bytes_hi;
752 u32 tx_multicast_bytes_lo;
753 u32 tx_multicast_bytes_hi;
754 u32 tx_broadcast_bytes_lo;
755 u32 tx_broadcast_bytes_hi;
760 u32 tx_pause_frames_lo;
761 u32 tx_pause_frames_hi;
762 u32 tx_pause_on_frames_lo;
763 u32 tx_pause_on_frames_hi;
764 u32 tx_pause_off_frames_lo;
765 u32 tx_pause_off_frames_hi;
766 u32 tx_internal_mac_errors_lo;
767 u32 tx_internal_mac_errors_hi;
768 u32 tx_control_frames_lo;
769 u32 tx_control_frames_hi;
770 u32 tx_packets_64_bytes_lo;
771 u32 tx_packets_64_bytes_hi;
772 u32 tx_packets_65_to_127_bytes_lo;
773 u32 tx_packets_65_to_127_bytes_hi;
774 u32 tx_packets_128_to_255_bytes_lo;
775 u32 tx_packets_128_to_255_bytes_hi;
776 u32 tx_packets_256_to_511_bytes_lo;
777 u32 tx_packets_256_to_511_bytes_hi;
778 u32 tx_packets_512_to_1023_bytes_lo;
779 u32 tx_packets_512_to_1023_bytes_hi;
780 u32 tx_packets_1024_to_1518_bytes_lo;
781 u32 tx_packets_1024_to_1518_bytes_hi;
782 u32 tx_packets_1519_to_2047_bytes_lo;
783 u32 tx_packets_1519_to_2047_bytes_hi;
784 u32 tx_packets_2048_to_4095_bytes_lo;
785 u32 tx_packets_2048_to_4095_bytes_hi;
786 u32 tx_packets_4096_to_8191_bytes_lo;
787 u32 tx_packets_4096_to_8191_bytes_hi;
788 u32 tx_packets_8192_to_9216_bytes_lo;
789 u32 tx_packets_8192_to_9216_bytes_hi;
790 u32 tx_lso_packets_lo;
791 u32 tx_lso_packets_hi;
794 u32 rx_unicast_packets_lo;
795 u32 rx_unicast_packets_hi;
796 u32 rx_multicast_packets_lo;
797 u32 rx_multicast_packets_hi;
798 u32 rx_broadcast_packets_lo;
799 u32 rx_broadcast_packets_hi;
802 u32 rx_unicast_bytes_lo;
803 u32 rx_unicast_bytes_hi;
804 u32 rx_multicast_bytes_lo;
805 u32 rx_multicast_bytes_hi;
806 u32 rx_broadcast_bytes_lo;
807 u32 rx_broadcast_bytes_hi;
808 u32 rx_unknown_protos;
809 u32 rsvd_69; /* Word 69 is reserved */
814 u32 rx_crc_errors_lo;
815 u32 rx_crc_errors_hi;
816 u32 rx_alignment_errors_lo;
817 u32 rx_alignment_errors_hi;
818 u32 rx_symbol_errors_lo;
819 u32 rx_symbol_errors_hi;
820 u32 rx_pause_frames_lo;
821 u32 rx_pause_frames_hi;
822 u32 rx_pause_on_frames_lo;
823 u32 rx_pause_on_frames_hi;
824 u32 rx_pause_off_frames_lo;
825 u32 rx_pause_off_frames_hi;
826 u32 rx_frames_too_long_lo;
827 u32 rx_frames_too_long_hi;
828 u32 rx_internal_mac_errors_lo;
829 u32 rx_internal_mac_errors_hi;
830 u32 rx_undersize_packets;
831 u32 rx_oversize_packets;
832 u32 rx_fragment_packets;
834 u32 rx_control_frames_lo;
835 u32 rx_control_frames_hi;
836 u32 rx_control_frames_unknown_opcode_lo;
837 u32 rx_control_frames_unknown_opcode_hi;
838 u32 rx_in_range_errors;
839 u32 rx_out_of_range_errors;
840 u32 rx_address_filtered;
841 u32 rx_vlan_filtered;
842 u32 rx_dropped_too_small;
843 u32 rx_dropped_too_short;
844 u32 rx_dropped_header_too_small;
845 u32 rx_dropped_invalid_tcp_length;
847 u32 rx_ip_checksum_errors;
848 u32 rx_tcp_checksum_errors;
849 u32 rx_udp_checksum_errors;
850 u32 rx_non_rss_packets;
852 u32 rx_ipv4_packets_lo;
853 u32 rx_ipv4_packets_hi;
854 u32 rx_ipv6_packets_lo;
855 u32 rx_ipv6_packets_hi;
856 u32 rx_ipv4_bytes_lo;
857 u32 rx_ipv4_bytes_hi;
858 u32 rx_ipv6_bytes_lo;
859 u32 rx_ipv6_bytes_hi;
860 u32 rx_nic_packets_lo;
861 u32 rx_nic_packets_hi;
862 u32 rx_tcp_packets_lo;
863 u32 rx_tcp_packets_hi;
864 u32 rx_iscsi_packets_lo;
865 u32 rx_iscsi_packets_hi;
866 u32 rx_management_packets_lo;
867 u32 rx_management_packets_hi;
868 u32 rx_switched_unicast_packets_lo;
869 u32 rx_switched_unicast_packets_hi;
870 u32 rx_switched_multicast_packets_lo;
871 u32 rx_switched_multicast_packets_hi;
872 u32 rx_switched_broadcast_packets_lo;
873 u32 rx_switched_broadcast_packets_hi;
876 u32 rx_fifo_overflow;
877 u32 rx_input_fifo_overflow;
878 u32 rx_drops_too_many_frags_lo;
879 u32 rx_drops_too_many_frags_hi;
880 u32 rx_drops_invalid_queue;
884 u32 rx_packets_64_bytes_lo;
885 u32 rx_packets_64_bytes_hi;
886 u32 rx_packets_65_to_127_bytes_lo;
887 u32 rx_packets_65_to_127_bytes_hi;
888 u32 rx_packets_128_to_255_bytes_lo;
889 u32 rx_packets_128_to_255_bytes_hi;
890 u32 rx_packets_256_to_511_bytes_lo;
891 u32 rx_packets_256_to_511_bytes_hi;
892 u32 rx_packets_512_to_1023_bytes_lo;
893 u32 rx_packets_512_to_1023_bytes_hi;
894 u32 rx_packets_1024_to_1518_bytes_lo;
895 u32 rx_packets_1024_to_1518_bytes_hi;
896 u32 rx_packets_1519_to_2047_bytes_lo;
897 u32 rx_packets_1519_to_2047_bytes_hi;
898 u32 rx_packets_2048_to_4095_bytes_lo;
899 u32 rx_packets_2048_to_4095_bytes_hi;
900 u32 rx_packets_4096_to_8191_bytes_lo;
901 u32 rx_packets_4096_to_8191_bytes_hi;
902 u32 rx_packets_8192_to_9216_bytes_lo;
903 u32 rx_packets_8192_to_9216_bytes_hi;
906 struct pport_stats_params {
912 struct lancer_cmd_req_pport_stats {
913 struct be_cmd_req_hdr hdr;
915 struct pport_stats_params params;
916 u8 rsvd[sizeof(struct lancer_pport_stats)];
920 struct lancer_cmd_resp_pport_stats {
921 struct be_cmd_resp_hdr hdr;
922 struct lancer_pport_stats pport_stats;
925 static inline struct lancer_pport_stats*
926 pport_stats_from_cmd(struct be_adapter *adapter)
928 struct lancer_cmd_resp_pport_stats *cmd = adapter->stats_cmd.va;
929 return &cmd->pport_stats;
932 struct be_cmd_req_get_cntl_addnl_attribs {
933 struct be_cmd_req_hdr hdr;
937 struct be_cmd_resp_get_cntl_addnl_attribs {
938 struct be_cmd_resp_hdr hdr;
942 u8 on_die_temperature; /* in degrees centigrade*/
946 struct be_cmd_req_vlan_config {
947 struct be_cmd_req_hdr hdr;
955 /******************* RX FILTER ******************************/
956 #define BE_MAX_MC 64 /* set mcast promisc if > 64 */
961 struct be_cmd_req_rx_filter {
962 struct be_cmd_req_hdr hdr;
963 u32 global_flags_mask;
969 struct macaddr mcast_mac[BE_MAX_MC];
972 /******************** Link Status Query *******************/
973 struct be_cmd_req_link_status {
974 struct be_cmd_req_hdr hdr;
979 PHY_LINK_DUPLEX_NONE = 0x0,
980 PHY_LINK_DUPLEX_HALF = 0x1,
981 PHY_LINK_DUPLEX_FULL = 0x2
985 PHY_LINK_SPEED_ZERO = 0x0, /* => No link */
986 PHY_LINK_SPEED_10MBPS = 0x1,
987 PHY_LINK_SPEED_100MBPS = 0x2,
988 PHY_LINK_SPEED_1GBPS = 0x3,
989 PHY_LINK_SPEED_10GBPS = 0x4,
990 PHY_LINK_SPEED_20GBPS = 0x5,
991 PHY_LINK_SPEED_25GBPS = 0x6,
992 PHY_LINK_SPEED_40GBPS = 0x7
995 struct be_cmd_resp_link_status {
996 struct be_cmd_resp_hdr hdr;
1004 u8 logical_link_status;
1008 /******************** Port Identification ***************************/
1009 /* Identifies the type of port attached to NIC */
1010 struct be_cmd_req_port_type {
1011 struct be_cmd_req_hdr hdr;
1021 /* From SFF-8436 QSFP+ spec */
1022 #define QSFP_PLUS_CABLE_TYPE_OFFSET 0x83
1023 #define QSFP_PLUS_CR4_CABLE 0x8
1024 #define QSFP_PLUS_SR4_CABLE 0x4
1025 #define QSFP_PLUS_LR4_CABLE 0x2
1027 /* From SFF-8472 spec */
1028 #define SFP_PLUS_SFF_8472_COMP 0x5E
1029 #define SFP_PLUS_CABLE_TYPE_OFFSET 0x8
1030 #define SFP_PLUS_COPPER_CABLE 0x4
1032 #define PAGE_DATA_LEN 256
1033 struct be_cmd_resp_port_type {
1034 struct be_cmd_resp_hdr hdr;
1037 u8 page_data[PAGE_DATA_LEN];
1040 /******************** Get FW Version *******************/
1041 struct be_cmd_req_get_fw_version {
1042 struct be_cmd_req_hdr hdr;
1043 u8 rsvd0[FW_VER_LEN];
1044 u8 rsvd1[FW_VER_LEN];
1047 struct be_cmd_resp_get_fw_version {
1048 struct be_cmd_resp_hdr hdr;
1049 u8 firmware_version_string[FW_VER_LEN];
1050 u8 fw_on_flash_version_string[FW_VER_LEN];
1053 /******************** Set Flow Contrl *******************/
1054 struct be_cmd_req_set_flow_control {
1055 struct be_cmd_req_hdr hdr;
1056 u16 tx_flow_control;
1057 u16 rx_flow_control;
1060 /******************** Get Flow Contrl *******************/
1061 struct be_cmd_req_get_flow_control {
1062 struct be_cmd_req_hdr hdr;
1066 struct be_cmd_resp_get_flow_control {
1067 struct be_cmd_resp_hdr hdr;
1068 u16 tx_flow_control;
1069 u16 rx_flow_control;
1072 /******************** Modify EQ Delay *******************/
1076 u32 delay_multiplier;
1079 struct be_cmd_req_modify_eq_delay {
1080 struct be_cmd_req_hdr hdr;
1082 struct be_set_eqd set_eqd[MAX_EVT_QS];
1085 /******************** Get FW Config *******************/
1086 /* The HW can come up in either of the following multi-channel modes
1087 * based on the skew/IPL.
1089 #define RDMA_ENABLED 0x4
1090 #define QNQ_MODE 0x400
1091 #define VNIC_MODE 0x20000
1092 #define UMC_ENABLED 0x1000000
1093 struct be_cmd_req_query_fw_cfg {
1094 struct be_cmd_req_hdr hdr;
1098 /* ASIC revisions */
1099 #define ASIC_REV_B0 0x10
1100 #define ASIC_REV_P2 0x11
1102 struct be_cmd_resp_query_fw_cfg {
1103 struct be_cmd_resp_hdr hdr;
1104 u32 be_config_number;
1112 /******************** RSS Config ****************************************/
1113 /* RSS type Input parameters used to compute RX hash
1114 * RSS_ENABLE_IPV4 SRC IPv4, DST IPv4
1115 * RSS_ENABLE_TCP_IPV4 SRC IPv4, DST IPv4, TCP SRC PORT, TCP DST PORT
1116 * RSS_ENABLE_IPV6 SRC IPv6, DST IPv6
1117 * RSS_ENABLE_TCP_IPV6 SRC IPv6, DST IPv6, TCP SRC PORT, TCP DST PORT
1118 * RSS_ENABLE_UDP_IPV4 SRC IPv4, DST IPv4, UDP SRC PORT, UDP DST PORT
1119 * RSS_ENABLE_UDP_IPV6 SRC IPv6, DST IPv6, UDP SRC PORT, UDP DST PORT
1121 * When multiple RSS types are enabled, HW picks the best hash policy
1122 * based on the type of the received packet.
1124 #define RSS_ENABLE_NONE 0x0
1125 #define RSS_ENABLE_IPV4 0x1
1126 #define RSS_ENABLE_TCP_IPV4 0x2
1127 #define RSS_ENABLE_IPV6 0x4
1128 #define RSS_ENABLE_TCP_IPV6 0x8
1129 #define RSS_ENABLE_UDP_IPV4 0x10
1130 #define RSS_ENABLE_UDP_IPV6 0x20
1132 #define L3_RSS_FLAGS (RXH_IP_DST | RXH_IP_SRC)
1133 #define L4_RSS_FLAGS (RXH_L4_B_0_1 | RXH_L4_B_2_3)
1135 struct be_cmd_req_rss_config {
1136 struct be_cmd_req_hdr hdr;
1139 u16 cpu_table_size_log2;
1146 /******************** Port Beacon ***************************/
1148 #define BEACON_STATE_ENABLED 0x1
1149 #define BEACON_STATE_DISABLED 0x0
1151 struct be_cmd_req_enable_disable_beacon {
1152 struct be_cmd_req_hdr hdr;
1159 struct be_cmd_req_get_beacon_state {
1160 struct be_cmd_req_hdr hdr;
1166 struct be_cmd_resp_get_beacon_state {
1167 struct be_cmd_resp_hdr resp_hdr;
1172 /* Flashrom related descriptors */
1173 #define MAX_FLASH_COMP 32
1175 #define OPTYPE_ISCSI_ACTIVE 0
1176 #define OPTYPE_REDBOOT 1
1177 #define OPTYPE_BIOS 2
1178 #define OPTYPE_PXE_BIOS 3
1179 #define OPTYPE_OFFSET_SPECIFIED 7
1180 #define OPTYPE_FCOE_BIOS 8
1181 #define OPTYPE_ISCSI_BACKUP 9
1182 #define OPTYPE_FCOE_FW_ACTIVE 10
1183 #define OPTYPE_FCOE_FW_BACKUP 11
1184 #define OPTYPE_NCSI_FW 13
1185 #define OPTYPE_REDBOOT_DIR 18
1186 #define OPTYPE_REDBOOT_CONFIG 19
1187 #define OPTYPE_SH_PHY_FW 21
1188 #define OPTYPE_FLASHISM_JUMPVECTOR 22
1189 #define OPTYPE_UFI_DIR 23
1190 #define OPTYPE_PHY_FW 99
1192 #define FLASH_BIOS_IMAGE_MAX_SIZE_g2 262144 /* Max OPTION ROM image sz */
1193 #define FLASH_REDBOOT_IMAGE_MAX_SIZE_g2 262144 /* Max Redboot image sz */
1194 #define FLASH_IMAGE_MAX_SIZE_g2 1310720 /* Max firmware image size */
1196 #define FLASH_NCSI_IMAGE_MAX_SIZE_g3 262144
1197 #define FLASH_PHY_FW_IMAGE_MAX_SIZE_g3 262144
1198 #define FLASH_BIOS_IMAGE_MAX_SIZE_g3 524288 /* Max OPTION ROM image sz */
1199 #define FLASH_REDBOOT_IMAGE_MAX_SIZE_g3 1048576 /* Max Redboot image sz */
1200 #define FLASH_IMAGE_MAX_SIZE_g3 2097152 /* Max firmware image size */
1202 /* Offsets for components on Flash. */
1203 #define FLASH_REDBOOT_START_g2 0
1204 #define FLASH_FCoE_BIOS_START_g2 524288
1205 #define FLASH_iSCSI_PRIMARY_IMAGE_START_g2 1048576
1206 #define FLASH_iSCSI_BACKUP_IMAGE_START_g2 2359296
1207 #define FLASH_FCoE_PRIMARY_IMAGE_START_g2 3670016
1208 #define FLASH_FCoE_BACKUP_IMAGE_START_g2 4980736
1209 #define FLASH_iSCSI_BIOS_START_g2 7340032
1210 #define FLASH_PXE_BIOS_START_g2 7864320
1212 #define FLASH_REDBOOT_START_g3 262144
1213 #define FLASH_PHY_FW_START_g3 1310720
1214 #define FLASH_iSCSI_PRIMARY_IMAGE_START_g3 2097152
1215 #define FLASH_iSCSI_BACKUP_IMAGE_START_g3 4194304
1216 #define FLASH_FCoE_PRIMARY_IMAGE_START_g3 6291456
1217 #define FLASH_FCoE_BACKUP_IMAGE_START_g3 8388608
1218 #define FLASH_iSCSI_BIOS_START_g3 12582912
1219 #define FLASH_PXE_BIOS_START_g3 13107200
1220 #define FLASH_FCoE_BIOS_START_g3 13631488
1221 #define FLASH_NCSI_START_g3 15990784
1223 #define IMAGE_NCSI 16
1224 #define IMAGE_OPTION_ROM_PXE 32
1225 #define IMAGE_OPTION_ROM_FCoE 33
1226 #define IMAGE_OPTION_ROM_ISCSI 34
1227 #define IMAGE_FLASHISM_JUMPVECTOR 48
1228 #define IMAGE_FIRMWARE_iSCSI 160
1229 #define IMAGE_FIRMWARE_FCoE 162
1230 #define IMAGE_FIRMWARE_BACKUP_iSCSI 176
1231 #define IMAGE_FIRMWARE_BACKUP_FCoE 178
1232 #define IMAGE_FIRMWARE_PHY 192
1233 #define IMAGE_REDBOOT_DIR 208
1234 #define IMAGE_REDBOOT_CONFIG 209
1235 #define IMAGE_UFI_DIR 210
1236 #define IMAGE_BOOT_CODE 224
1238 struct controller_id {
1246 unsigned long offset;
1257 u8 image_version[32];
1260 struct flash_file_hdr_g2 {
1264 struct controller_id cont_id;
1272 /* First letter of the build version of the image */
1273 #define BLD_STR_UFI_TYPE_BE2 '2'
1274 #define BLD_STR_UFI_TYPE_BE3 '3'
1275 #define BLD_STR_UFI_TYPE_SH '4'
1277 struct flash_file_hdr_g3 {
1289 struct flash_section_hdr {
1298 struct flash_section_hdr_g2 {
1307 struct flash_section_entry {
1320 struct flash_section_info {
1322 struct flash_section_hdr fsec_hdr;
1323 struct flash_section_entry fsec_entry[32];
1326 struct flash_section_info_g2 {
1328 struct flash_section_hdr_g2 fsec_hdr;
1329 struct flash_section_entry fsec_entry[32];
1332 /****************** Firmware Flash ******************/
1333 #define FLASHROM_OPER_FLASH 1
1334 #define FLASHROM_OPER_SAVE 2
1335 #define FLASHROM_OPER_REPORT 4
1336 #define FLASHROM_OPER_PHY_FLASH 9
1337 #define FLASHROM_OPER_PHY_SAVE 10
1339 struct flashrom_params {
1346 struct be_cmd_write_flashrom {
1347 struct be_cmd_req_hdr hdr;
1348 struct flashrom_params params;
1353 /* cmd to read flash crc */
1354 struct be_cmd_read_flash_crc {
1355 struct be_cmd_req_hdr hdr;
1356 struct flashrom_params params;
1361 /**************** Lancer Firmware Flash ************/
1362 struct amap_lancer_write_obj_context {
1363 u8 write_length[24];
1368 struct lancer_cmd_req_write_object {
1369 struct be_cmd_req_hdr hdr;
1370 u8 context[sizeof(struct amap_lancer_write_obj_context) / 8];
1372 u8 object_name[104];
1373 u32 descriptor_count;
1379 #define LANCER_NO_RESET_NEEDED 0x00
1380 #define LANCER_FW_RESET_NEEDED 0x02
1381 struct lancer_cmd_resp_write_object {
1386 u8 additional_status;
1389 u32 actual_resp_len;
1390 u32 actual_write_len;
1395 /************************ Lancer Read FW info **************/
1396 #define LANCER_READ_FILE_CHUNK (32*1024)
1397 #define LANCER_READ_FILE_EOF_MASK 0x80000000
1399 #define LANCER_FW_DUMP_FILE "/dbg/dump.bin"
1400 #define LANCER_VPD_PF_FILE "/vpd/ntr_pf.vpd"
1401 #define LANCER_VPD_VF_FILE "/vpd/ntr_vf.vpd"
1403 struct lancer_cmd_req_read_object {
1404 struct be_cmd_req_hdr hdr;
1405 u32 desired_read_len;
1407 u8 object_name[104];
1408 u32 descriptor_count;
1414 struct lancer_cmd_resp_read_object {
1419 u8 additional_status;
1422 u32 actual_resp_len;
1423 u32 actual_read_len;
1427 struct lancer_cmd_req_delete_object {
1428 struct be_cmd_req_hdr hdr;
1431 u8 object_name[104];
1434 /************************ WOL *******************************/
1435 struct be_cmd_req_acpi_wol_magic_config{
1436 struct be_cmd_req_hdr hdr;
1442 struct be_cmd_req_acpi_wol_magic_config_v1 {
1443 struct be_cmd_req_hdr hdr;
1452 struct be_cmd_resp_acpi_wol_magic_config_v1 {
1453 struct be_cmd_resp_hdr hdr;
1460 #define BE_GET_WOL_CAP 2
1462 #define BE_WOL_CAP 0x1
1463 #define BE_PME_D0_CAP 0x8
1464 #define BE_PME_D1_CAP 0x10
1465 #define BE_PME_D2_CAP 0x20
1466 #define BE_PME_D3HOT_CAP 0x40
1467 #define BE_PME_D3COLD_CAP 0x80
1469 /********************** LoopBack test *********************/
1470 struct be_cmd_req_loopback_test {
1471 struct be_cmd_req_hdr hdr;
1480 struct be_cmd_resp_loopback_test {
1481 struct be_cmd_resp_hdr resp_hdr;
1489 struct be_cmd_req_set_lmode {
1490 struct be_cmd_req_hdr hdr;
1497 /********************** DDR DMA test *********************/
1498 struct be_cmd_req_ddrdma_test {
1499 struct be_cmd_req_hdr hdr;
1507 struct be_cmd_resp_ddrdma_test {
1508 struct be_cmd_resp_hdr hdr;
1516 /*********************** SEEPROM Read ***********************/
1518 #define BE_READ_SEEPROM_LEN 1024
1519 struct be_cmd_req_seeprom_read {
1520 struct be_cmd_req_hdr hdr;
1521 u8 rsvd0[BE_READ_SEEPROM_LEN];
1524 struct be_cmd_resp_seeprom_read {
1525 struct be_cmd_req_hdr hdr;
1526 u8 seeprom_data[BE_READ_SEEPROM_LEN];
1530 PHY_TYPE_CX4_10GB = 0,
1533 PHY_TYPE_SFP_PLUS_10GB,
1536 PHY_TYPE_BASET_10GB,
1544 PHY_TYPE_DISABLED = 255
1547 #define BE_SUPPORTED_SPEED_NONE 0
1548 #define BE_SUPPORTED_SPEED_10MBPS 1
1549 #define BE_SUPPORTED_SPEED_100MBPS 2
1550 #define BE_SUPPORTED_SPEED_1GBPS 4
1551 #define BE_SUPPORTED_SPEED_10GBPS 8
1552 #define BE_SUPPORTED_SPEED_20GBPS 0x10
1553 #define BE_SUPPORTED_SPEED_40GBPS 0x20
1555 #define BE_AN_EN 0x2
1556 #define BE_PAUSE_SYM_EN 0x80
1558 /* MAC speed valid values */
1559 #define SPEED_DEFAULT 0x0
1560 #define SPEED_FORCED_10GB 0x1
1561 #define SPEED_FORCED_1GB 0x2
1562 #define SPEED_AUTONEG_10GB 0x3
1563 #define SPEED_AUTONEG_1GB 0x4
1564 #define SPEED_AUTONEG_100MB 0x5
1565 #define SPEED_AUTONEG_10GB_1GB 0x6
1566 #define SPEED_AUTONEG_10GB_1GB_100MB 0x7
1567 #define SPEED_AUTONEG_1GB_100MB 0x8
1568 #define SPEED_AUTONEG_10MB 0x9
1569 #define SPEED_AUTONEG_1GB_100MB_10MB 0xa
1570 #define SPEED_AUTONEG_100MB_10MB 0xb
1571 #define SPEED_FORCED_100MB 0xc
1572 #define SPEED_FORCED_10MB 0xd
1574 struct be_cmd_req_get_phy_info {
1575 struct be_cmd_req_hdr hdr;
1579 struct be_phy_info {
1583 u16 ext_phy_details;
1585 u16 auto_speeds_supported;
1586 u16 fixed_speeds_supported;
1590 struct be_cmd_resp_get_phy_info {
1591 struct be_cmd_req_hdr hdr;
1592 struct be_phy_info phy_info;
1595 /*********************** Set QOS ***********************/
1597 #define BE_QOS_BITS_NIC 1
1599 struct be_cmd_req_set_qos {
1600 struct be_cmd_req_hdr hdr;
1606 /*********************** Controller Attributes ***********************/
1607 struct mgmt_hba_attribs {
1609 u8 controller_model_number[32];
1616 struct mgmt_controller_attrib {
1617 struct mgmt_hba_attribs hba_attribs;
1621 struct be_cmd_req_cntl_attribs {
1622 struct be_cmd_req_hdr hdr;
1625 struct be_cmd_resp_cntl_attribs {
1626 struct be_cmd_resp_hdr hdr;
1627 struct mgmt_controller_attrib attribs;
1630 /*********************** Set driver function ***********************/
1631 #define CAPABILITY_SW_TIMESTAMPS 2
1632 #define CAPABILITY_BE3_NATIVE_ERX_API 4
1634 struct be_cmd_req_set_func_cap {
1635 struct be_cmd_req_hdr hdr;
1636 u32 valid_cap_flags;
1641 struct be_cmd_resp_set_func_cap {
1642 struct be_cmd_resp_hdr hdr;
1643 u32 valid_cap_flags;
1648 /*********************** Function Privileges ***********************/
1650 BE_PRIV_DEFAULT = 0x1,
1651 BE_PRIV_LNKQUERY = 0x2,
1652 BE_PRIV_LNKSTATS = 0x4,
1653 BE_PRIV_LNKMGMT = 0x8,
1654 BE_PRIV_LNKDIAG = 0x10,
1655 BE_PRIV_UTILQUERY = 0x20,
1656 BE_PRIV_FILTMGMT = 0x40,
1657 BE_PRIV_IFACEMGMT = 0x80,
1658 BE_PRIV_VHADM = 0x100,
1659 BE_PRIV_DEVCFG = 0x200,
1660 BE_PRIV_DEVSEC = 0x400
1662 #define MAX_PRIVILEGES (BE_PRIV_VHADM | BE_PRIV_DEVCFG | \
1664 #define MIN_PRIVILEGES BE_PRIV_DEFAULT
1666 struct be_cmd_priv_map {
1672 struct be_cmd_req_get_fn_privileges {
1673 struct be_cmd_req_hdr hdr;
1677 struct be_cmd_resp_get_fn_privileges {
1678 struct be_cmd_resp_hdr hdr;
1682 struct be_cmd_req_set_fn_privileges {
1683 struct be_cmd_req_hdr hdr;
1684 u32 privileges; /* Used by BE3, SH-R */
1685 u32 privileges_lancer; /* Used by Lancer */
1688 /******************** GET/SET_MACLIST **************************/
1689 #define BE_MAX_MAC 64
1690 struct be_cmd_req_get_mac_list {
1691 struct be_cmd_req_hdr hdr;
1699 struct get_list_macaddr {
1706 } __packed s_mac_id;
1707 } __packed mac_addr_id;
1710 struct be_cmd_resp_get_mac_list {
1711 struct be_cmd_resp_hdr hdr;
1712 struct get_list_macaddr fd_macaddr; /* Factory default mac */
1713 struct get_list_macaddr macid_macaddr; /* soft mac */
1715 u8 pseudo_mac_count;
1718 /* perm override mac */
1719 struct get_list_macaddr macaddr_list[BE_MAX_MAC];
1722 struct be_cmd_req_set_mac_list {
1723 struct be_cmd_req_hdr hdr;
1727 struct macaddr mac[BE_MAX_MAC];
1730 /*********************** HSW Config ***********************/
1731 #define PORT_FWD_TYPE_VEPA 0x3
1732 #define PORT_FWD_TYPE_VEB 0x2
1734 struct amap_set_hsw_context {
1735 u8 interface_id[16];
1740 u8 port_fwd_type[3];
1748 struct be_cmd_req_set_hsw_config {
1749 struct be_cmd_req_hdr hdr;
1750 u8 context[sizeof(struct amap_set_hsw_context) / 8];
1753 struct amap_get_hsw_req_context {
1754 u8 interface_id[16];
1760 struct amap_get_hsw_resp_context {
1762 u8 port_fwd_type[3];
1770 struct be_cmd_req_get_hsw_config {
1771 struct be_cmd_req_hdr hdr;
1772 u8 context[sizeof(struct amap_get_hsw_req_context) / 8];
1775 struct be_cmd_resp_get_hsw_config {
1776 struct be_cmd_resp_hdr hdr;
1777 u8 context[sizeof(struct amap_get_hsw_resp_context) / 8];
1781 /******************* get port names ***************/
1782 struct be_cmd_req_get_port_name {
1783 struct be_cmd_req_hdr hdr;
1787 struct be_cmd_resp_get_port_name {
1788 struct be_cmd_req_hdr hdr;
1792 /*************** HW Stats Get v1 **********************************/
1793 #define BE_TXP_SW_SZ 48
1794 struct be_port_rxf_stats_v1 {
1797 u32 rx_alignment_symbol_errors;
1798 u32 rx_pause_frames;
1799 u32 rx_priority_pause_frames;
1800 u32 rx_control_frames;
1801 u32 rx_in_range_errors;
1802 u32 rx_out_range_errors;
1803 u32 rx_frame_too_long;
1804 u32 rx_address_filtered;
1805 u32 rx_dropped_too_small;
1806 u32 rx_dropped_too_short;
1807 u32 rx_dropped_header_too_small;
1808 u32 rx_dropped_tcp_length;
1809 u32 rx_dropped_runt;
1811 u32 rx_ip_checksum_errs;
1812 u32 rx_tcp_checksum_errs;
1813 u32 rx_udp_checksum_errs;
1815 u32 rx_switched_unicast_packets;
1816 u32 rx_switched_multicast_packets;
1817 u32 rx_switched_broadcast_packets;
1820 u32 tx_priority_pauseframes;
1821 u32 tx_controlframes;
1823 u32 rxpp_fifo_overflow_drop;
1824 u32 rx_input_fifo_overflow_drop;
1825 u32 pmem_fifo_overflow_drop;
1831 struct be_rxf_stats_v1 {
1832 struct be_port_rxf_stats_v1 port[4];
1834 u32 rx_drops_no_pbuf;
1835 u32 rx_drops_no_txpb;
1836 u32 rx_drops_no_erx_descr;
1837 u32 rx_drops_no_tpre_descr;
1839 u32 rx_drops_too_many_frags;
1840 u32 rx_drops_invalid_ring;
1841 u32 forwarded_packets;
1846 struct be_erx_stats_v1 {
1847 u32 rx_drops_no_fragments[68]; /* dwordS 0 to 67*/
1851 struct be_port_rxf_stats_v2 {
1853 u32 roce_bytes_received_lsd;
1854 u32 roce_bytes_received_msd;
1856 u32 roce_frames_received;
1858 u32 rx_alignment_symbol_errors;
1859 u32 rx_pause_frames;
1860 u32 rx_priority_pause_frames;
1861 u32 rx_control_frames;
1862 u32 rx_in_range_errors;
1863 u32 rx_out_range_errors;
1864 u32 rx_frame_too_long;
1865 u32 rx_address_filtered;
1866 u32 rx_dropped_too_small;
1867 u32 rx_dropped_too_short;
1868 u32 rx_dropped_header_too_small;
1869 u32 rx_dropped_tcp_length;
1870 u32 rx_dropped_runt;
1872 u32 rx_ip_checksum_errs;
1873 u32 rx_tcp_checksum_errs;
1874 u32 rx_udp_checksum_errs;
1876 u32 rx_switched_unicast_packets;
1877 u32 rx_switched_multicast_packets;
1878 u32 rx_switched_broadcast_packets;
1881 u32 tx_priority_pauseframes;
1882 u32 tx_controlframes;
1884 u32 rxpp_fifo_overflow_drop;
1885 u32 rx_input_fifo_overflow_drop;
1886 u32 pmem_fifo_overflow_drop;
1889 u32 rx_drops_payload_size;
1890 u32 rx_drops_clipped_header;
1892 u32 roce_drops_payload_len;
1897 struct be_rxf_stats_v2 {
1898 struct be_port_rxf_stats_v2 port[4];
1900 u32 rx_drops_no_pbuf;
1901 u32 rx_drops_no_txpb;
1902 u32 rx_drops_no_erx_descr;
1903 u32 rx_drops_no_tpre_descr;
1905 u32 rx_drops_too_many_frags;
1906 u32 rx_drops_invalid_ring;
1907 u32 forwarded_packets;
1912 struct be_hw_stats_v1 {
1913 struct be_rxf_stats_v1 rxf;
1914 u32 rsvd0[BE_TXP_SW_SZ];
1915 struct be_erx_stats_v1 erx;
1916 struct be_pmem_stats pmem;
1920 struct be_cmd_req_get_stats_v1 {
1921 struct be_cmd_req_hdr hdr;
1922 u8 rsvd[sizeof(struct be_hw_stats_v1)];
1925 struct be_cmd_resp_get_stats_v1 {
1926 struct be_cmd_resp_hdr hdr;
1927 struct be_hw_stats_v1 hw_stats;
1930 struct be_erx_stats_v2 {
1931 u32 rx_drops_no_fragments[136]; /* dwordS 0 to 135*/
1935 struct be_hw_stats_v2 {
1936 struct be_rxf_stats_v2 rxf;
1937 u32 rsvd0[BE_TXP_SW_SZ];
1938 struct be_erx_stats_v2 erx;
1939 struct be_pmem_stats pmem;
1943 struct be_cmd_req_get_stats_v2 {
1944 struct be_cmd_req_hdr hdr;
1945 u8 rsvd[sizeof(struct be_hw_stats_v2)];
1948 struct be_cmd_resp_get_stats_v2 {
1949 struct be_cmd_resp_hdr hdr;
1950 struct be_hw_stats_v2 hw_stats;
1953 /************** get fat capabilites *******************/
1954 #define MAX_MODULES 27
1957 #define FW_LOG_LEVEL_DEFAULT 48
1958 #define FW_LOG_LEVEL_FATAL 64
1960 struct ext_fat_mode {
1968 struct ext_fat_modules {
1972 struct ext_fat_mode trace_lvl[MAX_MODES];
1975 struct be_fat_conf_params {
1976 u32 max_log_entries;
1984 struct ext_fat_modules module[MAX_MODULES];
1987 struct be_cmd_req_get_ext_fat_caps {
1988 struct be_cmd_req_hdr hdr;
1992 struct be_cmd_resp_get_ext_fat_caps {
1993 struct be_cmd_resp_hdr hdr;
1994 struct be_fat_conf_params get_params;
1997 struct be_cmd_req_set_ext_fat_caps {
1998 struct be_cmd_req_hdr hdr;
1999 struct be_fat_conf_params set_params;
2002 #define RESOURCE_DESC_SIZE_V0 72
2003 #define RESOURCE_DESC_SIZE_V1 88
2004 #define PCIE_RESOURCE_DESC_TYPE_V0 0x40
2005 #define NIC_RESOURCE_DESC_TYPE_V0 0x41
2006 #define PCIE_RESOURCE_DESC_TYPE_V1 0x50
2007 #define NIC_RESOURCE_DESC_TYPE_V1 0x51
2008 #define PORT_RESOURCE_DESC_TYPE_V1 0x55
2009 #define MAX_RESOURCE_DESC 264
2011 #define VFT_SHIFT 3 /* VF template */
2012 #define IMM_SHIFT 6 /* Immediate */
2013 #define NOSV_SHIFT 7 /* No save */
2015 struct be_res_desc_hdr {
2020 struct be_port_res_desc {
2021 struct be_res_desc_hdr hdr;
2028 #define NV_TYPE_MASK 0x3 /* bits 0-1 */
2029 #define NV_TYPE_DISABLED 1
2030 #define NV_TYPE_VXLAN 3
2031 #define SOCVID_SHIFT 2 /* Strip outer vlan */
2032 #define RCVID_SHIFT 4 /* Report vlan */
2035 __le16 nv_port; /* vxlan/gre port */
2039 struct be_pcie_res_desc {
2040 struct be_res_desc_hdr hdr;
2056 struct be_nic_res_desc {
2057 struct be_res_desc_hdr hdr;
2060 #define QUN_SHIFT 4 /* QoS is in absolute units */
2066 u16 unicast_mac_count;
2070 u16 mcast_mac_count;
2083 u16 channel_id_param;
2089 u16 tunnel_iface_count;
2090 u16 direct_tenant_iface_count;
2094 /************ Multi-Channel type ***********/
2105 /* Is BE in a multi-channel mode */
2106 static inline bool be_is_mc(struct be_adapter *adapter)
2108 return adapter->mc_type > MC_NONE;
2111 struct be_cmd_req_get_func_config {
2112 struct be_cmd_req_hdr hdr;
2115 struct be_cmd_resp_get_func_config {
2116 struct be_cmd_resp_hdr hdr;
2118 u8 func_param[MAX_RESOURCE_DESC * RESOURCE_DESC_SIZE_V1];
2121 #define ACTIVE_PROFILE_TYPE 0x2
2122 struct be_cmd_req_get_profile_config {
2123 struct be_cmd_req_hdr hdr;
2129 struct be_cmd_resp_get_profile_config {
2130 struct be_cmd_resp_hdr hdr;
2132 u8 func_param[MAX_RESOURCE_DESC * RESOURCE_DESC_SIZE_V1];
2135 struct be_cmd_req_set_profile_config {
2136 struct be_cmd_req_hdr hdr;
2139 u8 desc[2 * RESOURCE_DESC_SIZE_V1];
2142 struct be_cmd_req_get_active_profile {
2143 struct be_cmd_req_hdr hdr;
2147 struct be_cmd_resp_get_active_profile {
2148 struct be_cmd_resp_hdr hdr;
2149 u16 active_profile_id;
2150 u16 next_profile_id;
2153 struct be_cmd_enable_disable_vf {
2154 struct be_cmd_req_hdr hdr;
2159 struct be_cmd_req_intr_set {
2160 struct be_cmd_req_hdr hdr;
2165 static inline bool check_privilege(struct be_adapter *adapter, u32 flags)
2167 return flags & adapter->cmd_privileges ? true : false;
2170 /************** Get IFACE LIST *******************/
2177 struct be_cmd_req_get_iface_list {
2178 struct be_cmd_req_hdr hdr;
2181 struct be_cmd_resp_get_iface_list {
2182 struct be_cmd_req_hdr hdr;
2184 struct be_if_desc if_desc;
2187 /*************** Set logical link ********************/
2188 #define PLINK_TRACK_SHIFT 8
2189 struct be_cmd_req_set_ll_link {
2190 struct be_cmd_req_hdr hdr;
2191 u32 link_config; /* Bit 0: UP_DOWN, Bit 9: PLINK */
2194 /************** Manage IFACE Filters *******************/
2195 #define OP_CONVERT_NORMAL_TO_TUNNEL 0
2196 #define OP_CONVERT_TUNNEL_TO_NORMAL 1
2198 struct be_cmd_req_manage_iface_filters {
2199 struct be_cmd_req_hdr hdr;
2204 u32 tunnel_iface_id;
2205 u32 target_iface_id;
2211 u32 cap_control_flags;
2214 int be_pci_fnum_get(struct be_adapter *adapter);
2215 int be_fw_wait_ready(struct be_adapter *adapter);
2216 int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,
2217 bool permanent, u32 if_handle, u32 pmac_id);
2218 int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, u32 if_id,
2219 u32 *pmac_id, u32 domain);
2220 int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id,
2222 int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags,
2223 u32 *if_handle, u32 domain);
2224 int be_cmd_if_destroy(struct be_adapter *adapter, int if_handle, u32 domain);
2225 int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo);
2226 int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq,
2227 struct be_queue_info *eq, bool no_delay,
2228 int num_cqe_dma_coalesce);
2229 int be_cmd_mccq_create(struct be_adapter *adapter, struct be_queue_info *mccq,
2230 struct be_queue_info *cq);
2231 int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo);
2232 int be_cmd_rxq_create(struct be_adapter *adapter, struct be_queue_info *rxq,
2233 u16 cq_id, u16 frag_size, u32 if_id, u32 rss, u8 *rss_id);
2234 int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q,
2236 int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q);
2237 int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed,
2238 u8 *link_status, u32 dom);
2239 int be_cmd_reset(struct be_adapter *adapter);
2240 int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd);
2241 int lancer_cmd_get_pport_stats(struct be_adapter *adapter,
2242 struct be_dma_mem *nonemb_cmd);
2243 int be_cmd_get_fw_ver(struct be_adapter *adapter);
2244 int be_cmd_modify_eqd(struct be_adapter *adapter, struct be_set_eqd *, int num);
2245 int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array,
2247 int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 status);
2248 int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc);
2249 int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc);
2250 int be_cmd_query_fw_cfg(struct be_adapter *adapter);
2251 int be_cmd_reset_function(struct be_adapter *adapter);
2252 int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable,
2253 u32 rss_hash_opts, u16 table_size, const u8 *rss_hkey);
2254 int be_process_mcc(struct be_adapter *adapter);
2255 int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, u8 beacon,
2256 u8 status, u8 state);
2257 int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num,
2259 int be_cmd_read_port_transceiver_data(struct be_adapter *adapter,
2260 u8 page_num, u8 *data);
2261 int be_cmd_query_cable_type(struct be_adapter *adapter);
2262 int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd,
2263 u32 flash_oper, u32 flash_opcode, u32 img_offset,
2265 int lancer_cmd_write_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
2266 u32 data_size, u32 data_offset,
2267 const char *obj_name, u32 *data_written,
2268 u8 *change_status, u8 *addn_status);
2269 int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
2270 u32 data_size, u32 data_offset, const char *obj_name,
2271 u32 *data_read, u32 *eof, u8 *addn_status);
2272 int lancer_cmd_delete_object(struct be_adapter *adapter, const char *obj_name);
2273 int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc,
2274 u16 img_optype, u32 img_offset, u32 crc_offset);
2275 int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,
2276 struct be_dma_mem *nonemb_cmd);
2277 int be_cmd_fw_init(struct be_adapter *adapter);
2278 int be_cmd_fw_clean(struct be_adapter *adapter);
2279 void be_async_mcc_enable(struct be_adapter *adapter);
2280 void be_async_mcc_disable(struct be_adapter *adapter);
2281 int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,
2282 u32 loopback_type, u32 pkt_size, u32 num_pkts,
2284 int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, u32 byte_cnt,
2285 struct be_dma_mem *cmd);
2286 int be_cmd_get_seeprom_data(struct be_adapter *adapter,
2287 struct be_dma_mem *nonemb_cmd);
2288 int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num,
2289 u8 loopback_type, u8 enable);
2290 int be_cmd_get_phy_info(struct be_adapter *adapter);
2291 int be_cmd_config_qos(struct be_adapter *adapter, u32 max_rate,
2292 u16 link_speed, u8 domain);
2293 void be_detect_error(struct be_adapter *adapter);
2294 int be_cmd_get_die_temperature(struct be_adapter *adapter);
2295 int be_cmd_get_cntl_attributes(struct be_adapter *adapter);
2296 int be_cmd_req_native_mode(struct be_adapter *adapter);
2297 int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size);
2298 int be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf);
2299 int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege,
2301 int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges,
2303 int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac,
2304 bool *pmac_id_active, u32 *pmac_id,
2305 u32 if_handle, u8 domain);
2306 int be_cmd_get_active_mac(struct be_adapter *adapter, u32 pmac_id, u8 *mac,
2307 u32 if_handle, bool active, u32 domain);
2308 int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac);
2309 int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, u8 mac_count,
2311 int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom);
2312 int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, u32 domain,
2313 u16 intf_id, u16 hsw_mode);
2314 int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, u32 domain,
2315 u16 intf_id, u8 *mode);
2316 int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter);
2317 int be_cmd_set_fw_log_level(struct be_adapter *adapter, u32 level);
2318 int be_cmd_get_fw_log_level(struct be_adapter *adapter);
2319 int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter,
2320 struct be_dma_mem *cmd);
2321 int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter,
2322 struct be_dma_mem *cmd,
2323 struct be_fat_conf_params *cfgs);
2324 int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask);
2325 int lancer_initiate_dump(struct be_adapter *adapter);
2326 int lancer_delete_dump(struct be_adapter *adapter);
2327 bool dump_present(struct be_adapter *adapter);
2328 int lancer_test_and_set_rdy_state(struct be_adapter *adapter);
2329 int be_cmd_query_port_name(struct be_adapter *adapter, u8 *port_name);
2330 int be_cmd_get_func_config(struct be_adapter *adapter,
2331 struct be_resources *res);
2332 int be_cmd_get_profile_config(struct be_adapter *adapter,
2333 struct be_resources *res, u8 domain);
2334 int be_cmd_get_active_profile(struct be_adapter *adapter, u16 *profile);
2335 int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg,
2337 int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain);
2338 int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable);
2339 int be_cmd_set_logical_link_config(struct be_adapter *adapter,
2340 int link_state, u8 domain);
2341 int be_cmd_set_vxlan_port(struct be_adapter *adapter, __be16 port);
2342 int be_cmd_manage_iface(struct be_adapter *adapter, u32 iface, u8 op);
2343 int be_cmd_set_sriov_config(struct be_adapter *adapter,
2344 struct be_resources res, u16 num_vfs);