drivers/net/ethernet/emulex/benet/be_cmds.h

   1 /*
   2  * Copyright (C) 2005 - 2011 Emulex
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version 2
   7  * as published by the Free Software Foundation.  The full GNU General
   8  * Public License is included in this distribution in the file called COPYING.
   9  *
  10  * Contact Information:
  11  * linux-drivers@emulex.com
  12  *
  13  * Emulex
  14  * 3333 Susan Street
  15  * Costa Mesa, CA 92626
  16  */
  17
  18 /*
  19  * The driver sends configuration and managements command requests to the
  20  * firmware in the BE. These requests are communicated to the processor
  21  * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one
  22  * WRB inside a MAILBOX.
  23  * The commands are serviced by the ARM processor in the BladeEngine's MPU.
  24  */
  25
  26 struct be_sge {
  27         u32 pa_lo;
  28         u32 pa_hi;
  29         u32 len;
  30 };
  31
  32 #define MCC_WRB_EMBEDDED_MASK   1       /* bit 0 of dword 0*/
  33 #define MCC_WRB_SGE_CNT_SHIFT   3       /* bits 3 - 7 of dword 0 */
  34 #define MCC_WRB_SGE_CNT_MASK    0x1F    /* bits 3 - 7 of dword 0 */
  35 struct be_mcc_wrb {
  36         u32 embedded;           /* dword 0 */
  37         u32 payload_length;     /* dword 1 */
  38         u32 tag0;               /* dword 2 */
  39         u32 tag1;               /* dword 3 */
  40         u32 rsvd;               /* dword 4 */
  41         union {
  42                 u8 embedded_payload[236]; /* used by embedded cmds */
  43                 struct be_sge sgl[19];    /* used by non-embedded cmds */
  44         } payload;
  45 };
  46
  47 #define CQE_FLAGS_VALID_MASK            (1 << 31)
  48 #define CQE_FLAGS_ASYNC_MASK            (1 << 30)
  49 #define CQE_FLAGS_COMPLETED_MASK        (1 << 28)
  50 #define CQE_FLAGS_CONSUMED_MASK         (1 << 27)
  51
  52 /* Completion Status */
  53 enum {
  54         MCC_STATUS_SUCCESS = 0,
  55         MCC_STATUS_FAILED = 1,
  56         MCC_STATUS_ILLEGAL_REQUEST = 2,
  57         MCC_STATUS_ILLEGAL_FIELD = 3,
  58         MCC_STATUS_INSUFFICIENT_BUFFER = 4,
  59         MCC_STATUS_UNAUTHORIZED_REQUEST = 5,
  60         MCC_STATUS_NOT_SUPPORTED = 66
  61 };
  62
  63 #define CQE_STATUS_COMPL_MASK           0xFFFF
  64 #define CQE_STATUS_COMPL_SHIFT          0       /* bits 0 - 15 */
  65 #define CQE_STATUS_EXTD_MASK            0xFFFF
  66 #define CQE_STATUS_EXTD_SHIFT           16      /* bits 16 - 31 */
  67
  68 struct be_mcc_compl {
  69         u32 status;             /* dword 0 */
  70         u32 tag0;               /* dword 1 */
  71         u32 tag1;               /* dword 2 */
  72         u32 flags;              /* dword 3 */
  73 };
  74
  75 /* When the async bit of mcc_compl is set, the last 4 bytes of
  76  * mcc_compl is interpreted as follows:
  77  */
  78 #define ASYNC_TRAILER_EVENT_CODE_SHIFT  8       /* bits 8 - 15 */
  79 #define ASYNC_TRAILER_EVENT_CODE_MASK   0xFF
  80 #define ASYNC_TRAILER_EVENT_TYPE_SHIFT  16
  81 #define ASYNC_TRAILER_EVENT_TYPE_MASK   0xFF
  82 #define ASYNC_EVENT_CODE_LINK_STATE     0x1
  83 #define ASYNC_EVENT_CODE_GRP_5          0x5
  84 #define ASYNC_EVENT_QOS_SPEED           0x1
  85 #define ASYNC_EVENT_COS_PRIORITY        0x2
  86 #define ASYNC_EVENT_PVID_STATE          0x3
  87 struct be_async_event_trailer {
  88         u32 code;
  89 };
  90
  91 enum {
  92         LINK_DOWN       = 0x0,
  93         LINK_UP         = 0x1
  94 };
  95 #define LINK_STATUS_MASK                        0x1
  96 #define LOGICAL_LINK_STATUS_MASK                0x2
  97
  98 /* When the event code of an async trailer is link-state, the mcc_compl
  99  * must be interpreted as follows
 100  */
 101 struct be_async_event_link_state {
 102         u8 physical_port;
 103         u8 port_link_status;
 104         u8 port_duplex;
 105         u8 port_speed;
 106         u8 port_fault;
 107         u8 rsvd0[7];
 108         struct be_async_event_trailer trailer;
 109 } __packed;
 110
 111 /* When the event code of an async trailer is GRP-5 and event_type is QOS_SPEED
 112  * the mcc_compl must be interpreted as follows
 113  */
 114 struct be_async_event_grp5_qos_link_speed {
 115         u8 physical_port;
 116         u8 rsvd[5];
 117         u16 qos_link_speed;
 118         u32 event_tag;
 119         struct be_async_event_trailer trailer;
 120 } __packed;
 121
 122 /* When the event code of an async trailer is GRP5 and event type is
 123  * CoS-Priority, the mcc_compl must be interpreted as follows
 124  */
 125 struct be_async_event_grp5_cos_priority {
 126         u8 physical_port;
 127         u8 available_priority_bmap;
 128         u8 reco_default_priority;
 129         u8 valid;
 130         u8 rsvd0;
 131         u8 event_tag;
 132         struct be_async_event_trailer trailer;
 133 } __packed;
 134
 135 /* When the event code of an async trailer is GRP5 and event type is
 136  * PVID state, the mcc_compl must be interpreted as follows
 137  */
 138 struct be_async_event_grp5_pvid_state {
 139         u8 enabled;
 140         u8 rsvd0;
 141         u16 tag;
 142         u32 event_tag;
 143         u32 rsvd1;
 144         struct be_async_event_trailer trailer;
 145 } __packed;
 146
 147 struct be_mcc_mailbox {
 148         struct be_mcc_wrb wrb;
 149         struct be_mcc_compl compl;
 150 };
 151
 152 #define CMD_SUBSYSTEM_COMMON    0x1
 153 #define CMD_SUBSYSTEM_ETH       0x3
 154 #define CMD_SUBSYSTEM_LOWLEVEL  0xb
 155
 156 #define OPCODE_COMMON_NTWK_MAC_QUERY                    1
 157 #define OPCODE_COMMON_NTWK_MAC_SET                      2
 158 #define OPCODE_COMMON_NTWK_MULTICAST_SET                3
 159 #define OPCODE_COMMON_NTWK_VLAN_CONFIG                  4
 160 #define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY            5
 161 #define OPCODE_COMMON_READ_FLASHROM                     6
 162 #define OPCODE_COMMON_WRITE_FLASHROM                    7
 163 #define OPCODE_COMMON_CQ_CREATE                         12
 164 #define OPCODE_COMMON_EQ_CREATE                         13
 165 #define OPCODE_COMMON_MCC_CREATE                        21
 166 #define OPCODE_COMMON_SET_QOS                           28
 167 #define OPCODE_COMMON_MCC_CREATE_EXT                    90
 168 #define OPCODE_COMMON_SEEPROM_READ                      30
 169 #define OPCODE_COMMON_GET_CNTL_ATTRIBUTES               32
 170 #define OPCODE_COMMON_NTWK_RX_FILTER                    34
 171 #define OPCODE_COMMON_GET_FW_VERSION                    35
 172 #define OPCODE_COMMON_SET_FLOW_CONTROL                  36
 173 #define OPCODE_COMMON_GET_FLOW_CONTROL                  37
 174 #define OPCODE_COMMON_SET_FRAME_SIZE                    39
 175 #define OPCODE_COMMON_MODIFY_EQ_DELAY                   41
 176 #define OPCODE_COMMON_FIRMWARE_CONFIG                   42
 177 #define OPCODE_COMMON_NTWK_INTERFACE_CREATE             50
 178 #define OPCODE_COMMON_NTWK_INTERFACE_DESTROY            51
 179 #define OPCODE_COMMON_MCC_DESTROY                       53
 180 #define OPCODE_COMMON_CQ_DESTROY                        54
 181 #define OPCODE_COMMON_EQ_DESTROY                        55
 182 #define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG             58
 183 #define OPCODE_COMMON_NTWK_PMAC_ADD                     59
 184 #define OPCODE_COMMON_NTWK_PMAC_DEL                     60
 185 #define OPCODE_COMMON_FUNCTION_RESET                    61
 186 #define OPCODE_COMMON_MANAGE_FAT                        68
 187 #define OPCODE_COMMON_ENABLE_DISABLE_BEACON             69
 188 #define OPCODE_COMMON_GET_BEACON_STATE                  70
 189 #define OPCODE_COMMON_READ_TRANSRECV_DATA               73
 190 #define OPCODE_COMMON_GET_PORT_NAME                     77
 191 #define OPCODE_COMMON_GET_PHY_DETAILS                   102
 192 #define OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP           103
 193 #define OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES    121
 194 #define OPCODE_COMMON_GET_EXT_FAT_CAPABILITES           125
 195 #define OPCODE_COMMON_SET_EXT_FAT_CAPABILITES           126
 196 #define OPCODE_COMMON_GET_MAC_LIST                      147
 197 #define OPCODE_COMMON_SET_MAC_LIST                      148
 198 #define OPCODE_COMMON_GET_HSW_CONFIG                    152
 199 #define OPCODE_COMMON_GET_FUNC_CONFIG                   160
 200 #define OPCODE_COMMON_GET_PROFILE_CONFIG                164
 201 #define OPCODE_COMMON_SET_PROFILE_CONFIG                165
 202 #define OPCODE_COMMON_SET_HSW_CONFIG                    153
 203 #define OPCODE_COMMON_GET_FN_PRIVILEGES                 170
 204 #define OPCODE_COMMON_READ_OBJECT                       171
 205 #define OPCODE_COMMON_WRITE_OBJECT                      172
 206 #define OPCODE_COMMON_ENABLE_DISABLE_VF                 196
 207
 208 #define OPCODE_ETH_RSS_CONFIG                           1
 209 #define OPCODE_ETH_ACPI_CONFIG                          2
 210 #define OPCODE_ETH_PROMISCUOUS                          3
 211 #define OPCODE_ETH_GET_STATISTICS                       4
 212 #define OPCODE_ETH_TX_CREATE                            7
 213 #define OPCODE_ETH_RX_CREATE                            8
 214 #define OPCODE_ETH_TX_DESTROY                           9
 215 #define OPCODE_ETH_RX_DESTROY                           10
 216 #define OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG                12
 217 #define OPCODE_ETH_GET_PPORT_STATS                      18
 218
 219 #define OPCODE_LOWLEVEL_HOST_DDR_DMA                    17
 220 #define OPCODE_LOWLEVEL_LOOPBACK_TEST                   18
 221 #define OPCODE_LOWLEVEL_SET_LOOPBACK_MODE               19
 222
 223 struct be_cmd_req_hdr {
 224         u8 opcode;              /* dword 0 */
 225         u8 subsystem;           /* dword 0 */
 226         u8 port_number;         /* dword 0 */
 227         u8 domain;              /* dword 0 */
 228         u32 timeout;            /* dword 1 */
 229         u32 request_length;     /* dword 2 */
 230         u8 version;             /* dword 3 */
 231         u8 rsvd[3];             /* dword 3 */
 232 };
 233
 234 #define RESP_HDR_INFO_OPCODE_SHIFT      0       /* bits 0 - 7 */
 235 #define RESP_HDR_INFO_SUBSYS_SHIFT      8       /* bits 8 - 15 */
 236 struct be_cmd_resp_hdr {
 237         u8 opcode;              /* dword 0 */
 238         u8 subsystem;           /* dword 0 */
 239         u8 rsvd[2];             /* dword 0 */
 240         u8 status;              /* dword 1 */
 241         u8 add_status;          /* dword 1 */
 242         u8 rsvd1[2];            /* dword 1 */
 243         u32 response_length;    /* dword 2 */
 244         u32 actual_resp_len;    /* dword 3 */
 245 };
 246
 247 struct phys_addr {
 248         u32 lo;
 249         u32 hi;
 250 };
 251
 252 /**************************
 253  * BE Command definitions *
 254  **************************/
 255
 256 /* Pseudo amap definition in which each bit of the actual structure is defined
 257  * as a byte: used to calculate offset/shift/mask of each field */
 258 struct amap_eq_context {
 259         u8 cidx[13];            /* dword 0*/
 260         u8 rsvd0[3];            /* dword 0*/
 261         u8 epidx[13];           /* dword 0*/
 262         u8 valid;               /* dword 0*/
 263         u8 rsvd1;               /* dword 0*/
 264         u8 size;                /* dword 0*/
 265         u8 pidx[13];            /* dword 1*/
 266         u8 rsvd2[3];            /* dword 1*/
 267         u8 pd[10];              /* dword 1*/
 268         u8 count[3];            /* dword 1*/
 269         u8 solevent;            /* dword 1*/
 270         u8 stalled;             /* dword 1*/
 271         u8 armed;               /* dword 1*/
 272         u8 rsvd3[4];            /* dword 2*/
 273         u8 func[8];             /* dword 2*/
 274         u8 rsvd4;               /* dword 2*/
 275         u8 delaymult[10];       /* dword 2*/
 276         u8 rsvd5[2];            /* dword 2*/
 277         u8 phase[2];            /* dword 2*/
 278         u8 nodelay;             /* dword 2*/
 279         u8 rsvd6[4];            /* dword 2*/
 280         u8 rsvd7[32];           /* dword 3*/
 281 } __packed;
 282
 283 struct be_cmd_req_eq_create {
 284         struct be_cmd_req_hdr hdr;
 285         u16 num_pages;          /* sword */
 286         u16 rsvd0;              /* sword */
 287         u8 context[sizeof(struct amap_eq_context) / 8];
 288         struct phys_addr pages[8];
 289 } __packed;
 290
 291 struct be_cmd_resp_eq_create {
 292         struct be_cmd_resp_hdr resp_hdr;
 293         u16 eq_id;              /* sword */
 294         u16 rsvd0;              /* sword */
 295 } __packed;
 296
 297 /******************** Mac query ***************************/
 298 enum {
 299         MAC_ADDRESS_TYPE_STORAGE = 0x0,
 300         MAC_ADDRESS_TYPE_NETWORK = 0x1,
 301         MAC_ADDRESS_TYPE_PD = 0x2,
 302         MAC_ADDRESS_TYPE_MANAGEMENT = 0x3
 303 };
 304
 305 struct mac_addr {
 306         u16 size_of_struct;
 307         u8 addr[ETH_ALEN];
 308 } __packed;
 309
 310 struct be_cmd_req_mac_query {
 311         struct be_cmd_req_hdr hdr;
 312         u8 type;
 313         u8 permanent;
 314         u16 if_id;
 315         u32 pmac_id;
 316 } __packed;
 317
 318 struct be_cmd_resp_mac_query {
 319         struct be_cmd_resp_hdr hdr;
 320         struct mac_addr mac;
 321 };
 322
 323 /******************** PMac Add ***************************/
 324 struct be_cmd_req_pmac_add {
 325         struct be_cmd_req_hdr hdr;
 326         u32 if_id;
 327         u8 mac_address[ETH_ALEN];
 328         u8 rsvd0[2];
 329 } __packed;
 330
 331 struct be_cmd_resp_pmac_add {
 332         struct be_cmd_resp_hdr hdr;
 333         u32 pmac_id;
 334 };
 335
 336 /******************** PMac Del ***************************/
 337 struct be_cmd_req_pmac_del {
 338         struct be_cmd_req_hdr hdr;
 339         u32 if_id;
 340         u32 pmac_id;
 341 };
 342
 343 /******************** Create CQ ***************************/
 344 /* Pseudo amap definition in which each bit of the actual structure is defined
 345  * as a byte: used to calculate offset/shift/mask of each field */
 346 struct amap_cq_context_be {
 347         u8 cidx[11];            /* dword 0*/
 348         u8 rsvd0;               /* dword 0*/
 349         u8 coalescwm[2];        /* dword 0*/
 350         u8 nodelay;             /* dword 0*/
 351         u8 epidx[11];           /* dword 0*/
 352         u8 rsvd1;               /* dword 0*/
 353         u8 count[2];            /* dword 0*/
 354         u8 valid;               /* dword 0*/
 355         u8 solevent;            /* dword 0*/
 356         u8 eventable;           /* dword 0*/
 357         u8 pidx[11];            /* dword 1*/
 358         u8 rsvd2;               /* dword 1*/
 359         u8 pd[10];              /* dword 1*/
 360         u8 eqid[8];             /* dword 1*/
 361         u8 stalled;             /* dword 1*/
 362         u8 armed;               /* dword 1*/
 363         u8 rsvd3[4];            /* dword 2*/
 364         u8 func[8];             /* dword 2*/
 365         u8 rsvd4[20];           /* dword 2*/
 366         u8 rsvd5[32];           /* dword 3*/
 367 } __packed;
 368
 369 struct amap_cq_context_lancer {
 370         u8 rsvd0[12];           /* dword 0*/
 371         u8 coalescwm[2];        /* dword 0*/
 372         u8 nodelay;             /* dword 0*/
 373         u8 rsvd1[12];           /* dword 0*/
 374         u8 count[2];            /* dword 0*/
 375         u8 valid;               /* dword 0*/
 376         u8 rsvd2;               /* dword 0*/
 377         u8 eventable;           /* dword 0*/
 378         u8 eqid[16];            /* dword 1*/
 379         u8 rsvd3[15];           /* dword 1*/
 380         u8 armed;               /* dword 1*/
 381         u8 rsvd4[32];           /* dword 2*/
 382         u8 rsvd5[32];           /* dword 3*/
 383 } __packed;
 384
 385 struct be_cmd_req_cq_create {
 386         struct be_cmd_req_hdr hdr;
 387         u16 num_pages;
 388         u8 page_size;
 389         u8 rsvd0;
 390         u8 context[sizeof(struct amap_cq_context_be) / 8];
 391         struct phys_addr pages[8];
 392 } __packed;
 393
 394
 395 struct be_cmd_resp_cq_create {
 396         struct be_cmd_resp_hdr hdr;
 397         u16 cq_id;
 398         u16 rsvd0;
 399 } __packed;
 400
 401 struct be_cmd_req_get_fat {
 402         struct be_cmd_req_hdr hdr;
 403         u32 fat_operation;
 404         u32 read_log_offset;
 405         u32 read_log_length;
 406         u32 data_buffer_size;
 407         u32 data_buffer[1];
 408 } __packed;
 409
 410 struct be_cmd_resp_get_fat {
 411         struct be_cmd_resp_hdr hdr;
 412         u32 log_size;
 413         u32 read_log_length;
 414         u32 rsvd[2];
 415         u32 data_buffer[1];
 416 } __packed;
 417
 418
 419 /******************** Create MCCQ ***************************/
 420 /* Pseudo amap definition in which each bit of the actual structure is defined
 421  * as a byte: used to calculate offset/shift/mask of each field */
 422 struct amap_mcc_context_be {
 423         u8 con_index[14];
 424         u8 rsvd0[2];
 425         u8 ring_size[4];
 426         u8 fetch_wrb;
 427         u8 fetch_r2t;
 428         u8 cq_id[10];
 429         u8 prod_index[14];
 430         u8 fid[8];
 431         u8 pdid[9];
 432         u8 valid;
 433         u8 rsvd1[32];
 434         u8 rsvd2[32];
 435 } __packed;
 436
 437 struct amap_mcc_context_lancer {
 438         u8 async_cq_id[16];
 439         u8 ring_size[4];
 440         u8 rsvd0[12];
 441         u8 rsvd1[31];
 442         u8 valid;
 443         u8 async_cq_valid[1];
 444         u8 rsvd2[31];
 445         u8 rsvd3[32];
 446 } __packed;
 447
 448 struct be_cmd_req_mcc_create {
 449         struct be_cmd_req_hdr hdr;
 450         u16 num_pages;
 451         u16 cq_id;
 452         u8 context[sizeof(struct amap_mcc_context_be) / 8];
 453         struct phys_addr pages[8];
 454 } __packed;
 455
 456 struct be_cmd_req_mcc_ext_create {
 457         struct be_cmd_req_hdr hdr;
 458         u16 num_pages;
 459         u16 cq_id;
 460         u32 async_event_bitmap[1];
 461         u8 context[sizeof(struct amap_mcc_context_be) / 8];
 462         struct phys_addr pages[8];
 463 } __packed;
 464
 465 struct be_cmd_resp_mcc_create {
 466         struct be_cmd_resp_hdr hdr;
 467         u16 id;
 468         u16 rsvd0;
 469 } __packed;
 470
 471 /******************** Create TxQ ***************************/
 472 #define BE_ETH_TX_RING_TYPE_STANDARD            2
 473 #define BE_ULP1_NUM                             1
 474
 475 /* Pseudo amap definition in which each bit of the actual structure is defined
 476  * as a byte: used to calculate offset/shift/mask of each field */
 477 struct amap_tx_context {
 478         u8 if_id[16];           /* dword 0 */
 479         u8 tx_ring_size[4];     /* dword 0 */
 480         u8 rsvd1[26];           /* dword 0 */
 481         u8 pci_func_id[8];      /* dword 1 */
 482         u8 rsvd2[9];            /* dword 1 */
 483         u8 ctx_valid;           /* dword 1 */
 484         u8 cq_id_send[16];      /* dword 2 */
 485         u8 rsvd3[16];           /* dword 2 */
 486         u8 rsvd4[32];           /* dword 3 */
 487         u8 rsvd5[32];           /* dword 4 */
 488         u8 rsvd6[32];           /* dword 5 */
 489         u8 rsvd7[32];           /* dword 6 */
 490         u8 rsvd8[32];           /* dword 7 */
 491         u8 rsvd9[32];           /* dword 8 */
 492         u8 rsvd10[32];          /* dword 9 */
 493         u8 rsvd11[32];          /* dword 10 */
 494         u8 rsvd12[32];          /* dword 11 */
 495         u8 rsvd13[32];          /* dword 12 */
 496         u8 rsvd14[32];          /* dword 13 */
 497         u8 rsvd15[32];          /* dword 14 */
 498         u8 rsvd16[32];          /* dword 15 */
 499 } __packed;
 500
 501 struct be_cmd_req_eth_tx_create {
 502         struct be_cmd_req_hdr hdr;
 503         u8 num_pages;
 504         u8 ulp_num;
 505         u8 type;
 506         u8 bound_port;
 507         u8 context[sizeof(struct amap_tx_context) / 8];
 508         struct phys_addr pages[8];
 509 } __packed;
 510
 511 struct be_cmd_resp_eth_tx_create {
 512         struct be_cmd_resp_hdr hdr;
 513         u16 cid;
 514         u16 rsvd0;
 515 } __packed;
 516
 517 /******************** Create RxQ ***************************/
 518 struct be_cmd_req_eth_rx_create {
 519         struct be_cmd_req_hdr hdr;
 520         u16 cq_id;
 521         u8 frag_size;
 522         u8 num_pages;
 523         struct phys_addr pages[2];
 524         u32 interface_id;
 525         u16 max_frame_size;
 526         u16 rsvd0;
 527         u32 rss_queue;
 528 } __packed;
 529
 530 struct be_cmd_resp_eth_rx_create {
 531         struct be_cmd_resp_hdr hdr;
 532         u16 id;
 533         u8 rss_id;
 534         u8 rsvd0;
 535 } __packed;
 536
 537 /******************** Q Destroy  ***************************/
 538 /* Type of Queue to be destroyed */
 539 enum {
 540         QTYPE_EQ = 1,
 541         QTYPE_CQ,
 542         QTYPE_TXQ,
 543         QTYPE_RXQ,
 544         QTYPE_MCCQ
 545 };
 546
 547 struct be_cmd_req_q_destroy {
 548         struct be_cmd_req_hdr hdr;
 549         u16 id;
 550         u16 bypass_flush;       /* valid only for rx q destroy */
 551 } __packed;
 552
 553 /************ I/f Create (it's actually I/f Config Create)**********/
 554
 555 /* Capability flags for the i/f */
 556 enum be_if_flags {
 557         BE_IF_FLAGS_RSS = 0x4,
 558         BE_IF_FLAGS_PROMISCUOUS = 0x8,
 559         BE_IF_FLAGS_BROADCAST = 0x10,
 560         BE_IF_FLAGS_UNTAGGED = 0x20,
 561         BE_IF_FLAGS_ULP = 0x40,
 562         BE_IF_FLAGS_VLAN_PROMISCUOUS = 0x80,
 563         BE_IF_FLAGS_VLAN = 0x100,
 564         BE_IF_FLAGS_MCAST_PROMISCUOUS = 0x200,
 565         BE_IF_FLAGS_PASS_L2_ERRORS = 0x400,
 566         BE_IF_FLAGS_PASS_L3L4_ERRORS = 0x800,
 567         BE_IF_FLAGS_MULTICAST = 0x1000
 568 };
 569
 570 /* An RX interface is an object with one or more MAC addresses and
 571  * filtering capabilities. */
 572 struct be_cmd_req_if_create {
 573         struct be_cmd_req_hdr hdr;
 574         u32 version;            /* ignore currently */
 575         u32 capability_flags;
 576         u32 enable_flags;
 577         u8 mac_addr[ETH_ALEN];
 578         u8 rsvd0;
 579         u8 pmac_invalid; /* if set, don't attach the mac addr to the i/f */
 580         u32 vlan_tag;    /* not used currently */
 581 } __packed;
 582
 583 struct be_cmd_resp_if_create {
 584         struct be_cmd_resp_hdr hdr;
 585         u32 interface_id;
 586         u32 pmac_id;
 587 };
 588
 589 /****** I/f Destroy(it's actually I/f Config Destroy )**********/
 590 struct be_cmd_req_if_destroy {
 591         struct be_cmd_req_hdr hdr;
 592         u32 interface_id;
 593 };
 594
 595 /*************** HW Stats Get **********************************/
 596 struct be_port_rxf_stats_v0 {
 597         u32 rx_bytes_lsd;       /* dword 0*/
 598         u32 rx_bytes_msd;       /* dword 1*/
 599         u32 rx_total_frames;    /* dword 2*/
 600         u32 rx_unicast_frames;  /* dword 3*/
 601         u32 rx_multicast_frames;        /* dword 4*/
 602         u32 rx_broadcast_frames;        /* dword 5*/
 603         u32 rx_crc_errors;      /* dword 6*/
 604         u32 rx_alignment_symbol_errors; /* dword 7*/
 605         u32 rx_pause_frames;    /* dword 8*/
 606         u32 rx_control_frames;  /* dword 9*/
 607         u32 rx_in_range_errors; /* dword 10*/
 608         u32 rx_out_range_errors;        /* dword 11*/
 609         u32 rx_frame_too_long;  /* dword 12*/
 610         u32 rx_address_mismatch_drops;  /* dword 13*/
 611         u32 rx_vlan_mismatch_drops;     /* dword 14*/
 612         u32 rx_dropped_too_small;       /* dword 15*/
 613         u32 rx_dropped_too_short;       /* dword 16*/
 614         u32 rx_dropped_header_too_small;        /* dword 17*/
 615         u32 rx_dropped_tcp_length;      /* dword 18*/
 616         u32 rx_dropped_runt;    /* dword 19*/
 617         u32 rx_64_byte_packets; /* dword 20*/
 618         u32 rx_65_127_byte_packets;     /* dword 21*/
 619         u32 rx_128_256_byte_packets;    /* dword 22*/
 620         u32 rx_256_511_byte_packets;    /* dword 23*/
 621         u32 rx_512_1023_byte_packets;   /* dword 24*/
 622         u32 rx_1024_1518_byte_packets;  /* dword 25*/
 623         u32 rx_1519_2047_byte_packets;  /* dword 26*/
 624         u32 rx_2048_4095_byte_packets;  /* dword 27*/
 625         u32 rx_4096_8191_byte_packets;  /* dword 28*/
 626         u32 rx_8192_9216_byte_packets;  /* dword 29*/
 627         u32 rx_ip_checksum_errs;        /* dword 30*/
 628         u32 rx_tcp_checksum_errs;       /* dword 31*/
 629         u32 rx_udp_checksum_errs;       /* dword 32*/
 630         u32 rx_non_rss_packets; /* dword 33*/
 631         u32 rx_ipv4_packets;    /* dword 34*/
 632         u32 rx_ipv6_packets;    /* dword 35*/
 633         u32 rx_ipv4_bytes_lsd;  /* dword 36*/
 634         u32 rx_ipv4_bytes_msd;  /* dword 37*/
 635         u32 rx_ipv6_bytes_lsd;  /* dword 38*/
 636         u32 rx_ipv6_bytes_msd;  /* dword 39*/
 637         u32 rx_chute1_packets;  /* dword 40*/
 638         u32 rx_chute2_packets;  /* dword 41*/
 639         u32 rx_chute3_packets;  /* dword 42*/
 640         u32 rx_management_packets;      /* dword 43*/
 641         u32 rx_switched_unicast_packets;        /* dword 44*/
 642         u32 rx_switched_multicast_packets;      /* dword 45*/
 643         u32 rx_switched_broadcast_packets;      /* dword 46*/
 644         u32 tx_bytes_lsd;       /* dword 47*/
 645         u32 tx_bytes_msd;       /* dword 48*/
 646         u32 tx_unicastframes;   /* dword 49*/
 647         u32 tx_multicastframes; /* dword 50*/
 648         u32 tx_broadcastframes; /* dword 51*/
 649         u32 tx_pauseframes;     /* dword 52*/
 650         u32 tx_controlframes;   /* dword 53*/
 651         u32 tx_64_byte_packets; /* dword 54*/
 652         u32 tx_65_127_byte_packets;     /* dword 55*/
 653         u32 tx_128_256_byte_packets;    /* dword 56*/
 654         u32 tx_256_511_byte_packets;    /* dword 57*/
 655         u32 tx_512_1023_byte_packets;   /* dword 58*/
 656         u32 tx_1024_1518_byte_packets;  /* dword 59*/
 657         u32 tx_1519_2047_byte_packets;  /* dword 60*/
 658         u32 tx_2048_4095_byte_packets;  /* dword 61*/
 659         u32 tx_4096_8191_byte_packets;  /* dword 62*/
 660         u32 tx_8192_9216_byte_packets;  /* dword 63*/
 661         u32 rx_fifo_overflow;   /* dword 64*/
 662         u32 rx_input_fifo_overflow;     /* dword 65*/
 663 };
 664
 665 struct be_rxf_stats_v0 {
 666         struct be_port_rxf_stats_v0 port[2];
 667         u32 rx_drops_no_pbuf;   /* dword 132*/
 668         u32 rx_drops_no_txpb;   /* dword 133*/
 669         u32 rx_drops_no_erx_descr;      /* dword 134*/
 670         u32 rx_drops_no_tpre_descr;     /* dword 135*/
 671         u32 management_rx_port_packets; /* dword 136*/
 672         u32 management_rx_port_bytes;   /* dword 137*/
 673         u32 management_rx_port_pause_frames;    /* dword 138*/
 674         u32 management_rx_port_errors;  /* dword 139*/
 675         u32 management_tx_port_packets; /* dword 140*/
 676         u32 management_tx_port_bytes;   /* dword 141*/
 677         u32 management_tx_port_pause;   /* dword 142*/
 678         u32 management_rx_port_rxfifo_overflow; /* dword 143*/
 679         u32 rx_drops_too_many_frags;    /* dword 144*/
 680         u32 rx_drops_invalid_ring;      /* dword 145*/
 681         u32 forwarded_packets;  /* dword 146*/
 682         u32 rx_drops_mtu;       /* dword 147*/
 683         u32 rsvd0[7];
 684         u32 port0_jabber_events;
 685         u32 port1_jabber_events;
 686         u32 rsvd1[6];
 687 };
 688
 689 struct be_erx_stats_v0 {
 690         u32 rx_drops_no_fragments[44];     /* dwordS 0 to 43*/
 691         u32 rsvd[4];
 692 };
 693
 694 struct be_pmem_stats {
 695         u32 eth_red_drops;
 696         u32 rsvd[5];
 697 };
 698
 699 struct be_hw_stats_v0 {
 700         struct be_rxf_stats_v0 rxf;
 701         u32 rsvd[48];
 702         struct be_erx_stats_v0 erx;
 703         struct be_pmem_stats pmem;
 704 };
 705
 706 struct be_cmd_req_get_stats_v0 {
 707         struct be_cmd_req_hdr hdr;
 708         u8 rsvd[sizeof(struct be_hw_stats_v0)];
 709 };
 710
 711 struct be_cmd_resp_get_stats_v0 {
 712         struct be_cmd_resp_hdr hdr;
 713         struct be_hw_stats_v0 hw_stats;
 714 };
 715
 716 struct lancer_pport_stats {
 717         u32 tx_packets_lo;
 718         u32 tx_packets_hi;
 719         u32 tx_unicast_packets_lo;
 720         u32 tx_unicast_packets_hi;
 721         u32 tx_multicast_packets_lo;
 722         u32 tx_multicast_packets_hi;
 723         u32 tx_broadcast_packets_lo;
 724         u32 tx_broadcast_packets_hi;
 725         u32 tx_bytes_lo;
 726         u32 tx_bytes_hi;
 727         u32 tx_unicast_bytes_lo;
 728         u32 tx_unicast_bytes_hi;
 729         u32 tx_multicast_bytes_lo;
 730         u32 tx_multicast_bytes_hi;
 731         u32 tx_broadcast_bytes_lo;
 732         u32 tx_broadcast_bytes_hi;
 733         u32 tx_discards_lo;
 734         u32 tx_discards_hi;
 735         u32 tx_errors_lo;
 736         u32 tx_errors_hi;
 737         u32 tx_pause_frames_lo;
 738         u32 tx_pause_frames_hi;
 739         u32 tx_pause_on_frames_lo;
 740         u32 tx_pause_on_frames_hi;
 741         u32 tx_pause_off_frames_lo;
 742         u32 tx_pause_off_frames_hi;
 743         u32 tx_internal_mac_errors_lo;
 744         u32 tx_internal_mac_errors_hi;
 745         u32 tx_control_frames_lo;
 746         u32 tx_control_frames_hi;
 747         u32 tx_packets_64_bytes_lo;
 748         u32 tx_packets_64_bytes_hi;
 749         u32 tx_packets_65_to_127_bytes_lo;
 750         u32 tx_packets_65_to_127_bytes_hi;
 751         u32 tx_packets_128_to_255_bytes_lo;
 752         u32 tx_packets_128_to_255_bytes_hi;
 753         u32 tx_packets_256_to_511_bytes_lo;
 754         u32 tx_packets_256_to_511_bytes_hi;
 755         u32 tx_packets_512_to_1023_bytes_lo;
 756         u32 tx_packets_512_to_1023_bytes_hi;
 757         u32 tx_packets_1024_to_1518_bytes_lo;
 758         u32 tx_packets_1024_to_1518_bytes_hi;
 759         u32 tx_packets_1519_to_2047_bytes_lo;
 760         u32 tx_packets_1519_to_2047_bytes_hi;
 761         u32 tx_packets_2048_to_4095_bytes_lo;
 762         u32 tx_packets_2048_to_4095_bytes_hi;
 763         u32 tx_packets_4096_to_8191_bytes_lo;
 764         u32 tx_packets_4096_to_8191_bytes_hi;
 765         u32 tx_packets_8192_to_9216_bytes_lo;
 766         u32 tx_packets_8192_to_9216_bytes_hi;
 767         u32 tx_lso_packets_lo;
 768         u32 tx_lso_packets_hi;
 769         u32 rx_packets_lo;
 770         u32 rx_packets_hi;
 771         u32 rx_unicast_packets_lo;
 772         u32 rx_unicast_packets_hi;
 773         u32 rx_multicast_packets_lo;
 774         u32 rx_multicast_packets_hi;
 775         u32 rx_broadcast_packets_lo;
 776         u32 rx_broadcast_packets_hi;
 777         u32 rx_bytes_lo;
 778         u32 rx_bytes_hi;
 779         u32 rx_unicast_bytes_lo;
 780         u32 rx_unicast_bytes_hi;
 781         u32 rx_multicast_bytes_lo;
 782         u32 rx_multicast_bytes_hi;
 783         u32 rx_broadcast_bytes_lo;
 784         u32 rx_broadcast_bytes_hi;
 785         u32 rx_unknown_protos;
 786         u32 rsvd_69; /* Word 69 is reserved */
 787         u32 rx_discards_lo;
 788         u32 rx_discards_hi;
 789         u32 rx_errors_lo;
 790         u32 rx_errors_hi;
 791         u32 rx_crc_errors_lo;
 792         u32 rx_crc_errors_hi;
 793         u32 rx_alignment_errors_lo;
 794         u32 rx_alignment_errors_hi;
 795         u32 rx_symbol_errors_lo;
 796         u32 rx_symbol_errors_hi;
 797         u32 rx_pause_frames_lo;
 798         u32 rx_pause_frames_hi;
 799         u32 rx_pause_on_frames_lo;
 800         u32 rx_pause_on_frames_hi;
 801         u32 rx_pause_off_frames_lo;
 802         u32 rx_pause_off_frames_hi;
 803         u32 rx_frames_too_long_lo;
 804         u32 rx_frames_too_long_hi;
 805         u32 rx_internal_mac_errors_lo;
 806         u32 rx_internal_mac_errors_hi;
 807         u32 rx_undersize_packets;
 808         u32 rx_oversize_packets;
 809         u32 rx_fragment_packets;
 810         u32 rx_jabbers;
 811         u32 rx_control_frames_lo;
 812         u32 rx_control_frames_hi;
 813         u32 rx_control_frames_unknown_opcode_lo;
 814         u32 rx_control_frames_unknown_opcode_hi;
 815         u32 rx_in_range_errors;
 816         u32 rx_out_of_range_errors;
 817         u32 rx_address_mismatch_drops;
 818         u32 rx_vlan_mismatch_drops;
 819         u32 rx_dropped_too_small;
 820         u32 rx_dropped_too_short;
 821         u32 rx_dropped_header_too_small;
 822         u32 rx_dropped_invalid_tcp_length;
 823         u32 rx_dropped_runt;
 824         u32 rx_ip_checksum_errors;
 825         u32 rx_tcp_checksum_errors;
 826         u32 rx_udp_checksum_errors;
 827         u32 rx_non_rss_packets;
 828         u32 rsvd_111;
 829         u32 rx_ipv4_packets_lo;
 830         u32 rx_ipv4_packets_hi;
 831         u32 rx_ipv6_packets_lo;
 832         u32 rx_ipv6_packets_hi;
 833         u32 rx_ipv4_bytes_lo;
 834         u32 rx_ipv4_bytes_hi;
 835         u32 rx_ipv6_bytes_lo;
 836         u32 rx_ipv6_bytes_hi;
 837         u32 rx_nic_packets_lo;
 838         u32 rx_nic_packets_hi;
 839         u32 rx_tcp_packets_lo;
 840         u32 rx_tcp_packets_hi;
 841         u32 rx_iscsi_packets_lo;
 842         u32 rx_iscsi_packets_hi;
 843         u32 rx_management_packets_lo;
 844         u32 rx_management_packets_hi;
 845         u32 rx_switched_unicast_packets_lo;
 846         u32 rx_switched_unicast_packets_hi;
 847         u32 rx_switched_multicast_packets_lo;
 848         u32 rx_switched_multicast_packets_hi;
 849         u32 rx_switched_broadcast_packets_lo;
 850         u32 rx_switched_broadcast_packets_hi;
 851         u32 num_forwards_lo;
 852         u32 num_forwards_hi;
 853         u32 rx_fifo_overflow;
 854         u32 rx_input_fifo_overflow;
 855         u32 rx_drops_too_many_frags_lo;
 856         u32 rx_drops_too_many_frags_hi;
 857         u32 rx_drops_invalid_queue;
 858         u32 rsvd_141;
 859         u32 rx_drops_mtu_lo;
 860         u32 rx_drops_mtu_hi;
 861         u32 rx_packets_64_bytes_lo;
 862         u32 rx_packets_64_bytes_hi;
 863         u32 rx_packets_65_to_127_bytes_lo;
 864         u32 rx_packets_65_to_127_bytes_hi;
 865         u32 rx_packets_128_to_255_bytes_lo;
 866         u32 rx_packets_128_to_255_bytes_hi;
 867         u32 rx_packets_256_to_511_bytes_lo;
 868         u32 rx_packets_256_to_511_bytes_hi;
 869         u32 rx_packets_512_to_1023_bytes_lo;
 870         u32 rx_packets_512_to_1023_bytes_hi;
 871         u32 rx_packets_1024_to_1518_bytes_lo;
 872         u32 rx_packets_1024_to_1518_bytes_hi;
 873         u32 rx_packets_1519_to_2047_bytes_lo;
 874         u32 rx_packets_1519_to_2047_bytes_hi;
 875         u32 rx_packets_2048_to_4095_bytes_lo;
 876         u32 rx_packets_2048_to_4095_bytes_hi;
 877         u32 rx_packets_4096_to_8191_bytes_lo;
 878         u32 rx_packets_4096_to_8191_bytes_hi;
 879         u32 rx_packets_8192_to_9216_bytes_lo;
 880         u32 rx_packets_8192_to_9216_bytes_hi;
 881 };
 882
 883 struct pport_stats_params {
 884         u16 pport_num;
 885         u8 rsvd;
 886         u8 reset_stats;
 887 };
 888
 889 struct lancer_cmd_req_pport_stats {
 890         struct be_cmd_req_hdr hdr;
 891         union {
 892                 struct pport_stats_params params;
 893                 u8 rsvd[sizeof(struct lancer_pport_stats)];
 894         } cmd_params;
 895 };
 896
 897 struct lancer_cmd_resp_pport_stats {
 898         struct be_cmd_resp_hdr hdr;
 899         struct lancer_pport_stats pport_stats;
 900 };
 901
 902 static inline struct lancer_pport_stats*
 903         pport_stats_from_cmd(struct be_adapter *adapter)
 904 {
 905         struct lancer_cmd_resp_pport_stats *cmd = adapter->stats_cmd.va;
 906         return &cmd->pport_stats;
 907 }
 908
 909 struct be_cmd_req_get_cntl_addnl_attribs {
 910         struct be_cmd_req_hdr hdr;
 911         u8 rsvd[8];
 912 };
 913
 914 struct be_cmd_resp_get_cntl_addnl_attribs {
 915         struct be_cmd_resp_hdr hdr;
 916         u16 ipl_file_number;
 917         u8 ipl_file_version;
 918         u8 rsvd0;
 919         u8 on_die_temperature; /* in degrees centigrade*/
 920         u8 rsvd1[3];
 921 };
 922
 923 struct be_cmd_req_vlan_config {
 924         struct be_cmd_req_hdr hdr;
 925         u8 interface_id;
 926         u8 promiscuous;
 927         u8 untagged;
 928         u8 num_vlan;
 929         u16 normal_vlan[64];
 930 } __packed;
 931
 932 /******************* RX FILTER ******************************/
 933 #define BE_MAX_MC               64 /* set mcast promisc if > 64 */
 934 struct macaddr {
 935         u8 byte[ETH_ALEN];
 936 };
 937
 938 struct be_cmd_req_rx_filter {
 939         struct be_cmd_req_hdr hdr;
 940         u32 global_flags_mask;
 941         u32 global_flags;
 942         u32 if_flags_mask;
 943         u32 if_flags;
 944         u32 if_id;
 945         u32 mcast_num;
 946         struct macaddr mcast_mac[BE_MAX_MC];
 947 };
 948
 949 /******************** Link Status Query *******************/
 950 struct be_cmd_req_link_status {
 951         struct be_cmd_req_hdr hdr;
 952         u32 rsvd;
 953 };
 954
 955 enum {
 956         PHY_LINK_DUPLEX_NONE = 0x0,
 957         PHY_LINK_DUPLEX_HALF = 0x1,
 958         PHY_LINK_DUPLEX_FULL = 0x2
 959 };
 960
 961 enum {
 962         PHY_LINK_SPEED_ZERO = 0x0,      /* => No link */
 963         PHY_LINK_SPEED_10MBPS = 0x1,
 964         PHY_LINK_SPEED_100MBPS = 0x2,
 965         PHY_LINK_SPEED_1GBPS = 0x3,
 966         PHY_LINK_SPEED_10GBPS = 0x4
 967 };
 968
 969 struct be_cmd_resp_link_status {
 970         struct be_cmd_resp_hdr hdr;
 971         u8 physical_port;
 972         u8 mac_duplex;
 973         u8 mac_speed;
 974         u8 mac_fault;
 975         u8 mgmt_mac_duplex;
 976         u8 mgmt_mac_speed;
 977         u16 link_speed;
 978         u8 logical_link_status;
 979         u8 rsvd1[3];
 980 } __packed;
 981
 982 /******************** Port Identification ***************************/
 983 /*    Identifies the type of port attached to NIC     */
 984 struct be_cmd_req_port_type {
 985         struct be_cmd_req_hdr hdr;
 986         u32 page_num;
 987         u32 port;
 988 };
 989
 990 enum {
 991         TR_PAGE_A0 = 0xa0,
 992         TR_PAGE_A2 = 0xa2
 993 };
 994
 995 struct be_cmd_resp_port_type {
 996         struct be_cmd_resp_hdr hdr;
 997         u32 page_num;
 998         u32 port;
 999         struct data {
1000                 u8 identifier;
1001                 u8 identifier_ext;
1002                 u8 connector;
1003                 u8 transceiver[8];
1004                 u8 rsvd0[3];
1005                 u8 length_km;
1006                 u8 length_hm;
1007                 u8 length_om1;
1008                 u8 length_om2;
1009                 u8 length_cu;
1010                 u8 length_cu_m;
1011                 u8 vendor_name[16];
1012                 u8 rsvd;
1013                 u8 vendor_oui[3];
1014                 u8 vendor_pn[16];
1015                 u8 vendor_rev[4];
1016         } data;
1017 };
1018
1019 /******************** Get FW Version *******************/
1020 struct be_cmd_req_get_fw_version {
1021         struct be_cmd_req_hdr hdr;
1022         u8 rsvd0[FW_VER_LEN];
1023         u8 rsvd1[FW_VER_LEN];
1024 } __packed;
1025
1026 struct be_cmd_resp_get_fw_version {
1027         struct be_cmd_resp_hdr hdr;
1028         u8 firmware_version_string[FW_VER_LEN];
1029         u8 fw_on_flash_version_string[FW_VER_LEN];
1030 } __packed;
1031
1032 /******************** Set Flow Contrl *******************/
1033 struct be_cmd_req_set_flow_control {
1034         struct be_cmd_req_hdr hdr;
1035         u16 tx_flow_control;
1036         u16 rx_flow_control;
1037 } __packed;
1038
1039 /******************** Get Flow Contrl *******************/
1040 struct be_cmd_req_get_flow_control {
1041         struct be_cmd_req_hdr hdr;
1042         u32 rsvd;
1043 };
1044
1045 struct be_cmd_resp_get_flow_control {
1046         struct be_cmd_resp_hdr hdr;
1047         u16 tx_flow_control;
1048         u16 rx_flow_control;
1049 } __packed;
1050
1051 /******************** Modify EQ Delay *******************/
1052 struct be_cmd_req_modify_eq_delay {
1053         struct be_cmd_req_hdr hdr;
1054         u32 num_eq;
1055         struct {
1056                 u32 eq_id;
1057                 u32 phase;
1058                 u32 delay_multiplier;
1059         } delay[8];
1060 } __packed;
1061
1062 struct be_cmd_resp_modify_eq_delay {
1063         struct be_cmd_resp_hdr hdr;
1064         u32 rsvd0;
1065 } __packed;
1066
1067 /******************** Get FW Config *******************/
1068 #define BE_FUNCTION_CAPS_RSS                    0x2
1069 /* The HW can come up in either of the following multi-channel modes
1070  * based on the skew/IPL.
1071  */
1072 #define RDMA_ENABLED                            0x4
1073 #define FLEX10_MODE                             0x400
1074 #define VNIC_MODE                               0x20000
1075 #define UMC_ENABLED                             0x1000000
1076 struct be_cmd_req_query_fw_cfg {
1077         struct be_cmd_req_hdr hdr;
1078         u32 rsvd[31];
1079 };
1080
1081 struct be_cmd_resp_query_fw_cfg {
1082         struct be_cmd_resp_hdr hdr;
1083         u32 be_config_number;
1084         u32 asic_revision;
1085         u32 phys_port;
1086         u32 function_mode;
1087         u32 rsvd[26];
1088         u32 function_caps;
1089 };
1090
1091 /******************** RSS Config ****************************************/
1092 /* RSS type             Input parameters used to compute RX hash
1093  * RSS_ENABLE_IPV4      SRC IPv4, DST IPv4
1094  * RSS_ENABLE_TCP_IPV4  SRC IPv4, DST IPv4, TCP SRC PORT, TCP DST PORT
1095  * RSS_ENABLE_IPV6      SRC IPv6, DST IPv6
1096  * RSS_ENABLE_TCP_IPV6  SRC IPv6, DST IPv6, TCP SRC PORT, TCP DST PORT
1097  * RSS_ENABLE_UDP_IPV4  SRC IPv4, DST IPv4, UDP SRC PORT, UDP DST PORT
1098  * RSS_ENABLE_UDP_IPV6  SRC IPv6, DST IPv6, UDP SRC PORT, UDP DST PORT
1099  *
1100  * When multiple RSS types are enabled, HW picks the best hash policy
1101  * based on the type of the received packet.
1102  */
1103 #define RSS_ENABLE_NONE                         0x0
1104 #define RSS_ENABLE_IPV4                         0x1
1105 #define RSS_ENABLE_TCP_IPV4                     0x2
1106 #define RSS_ENABLE_IPV6                         0x4
1107 #define RSS_ENABLE_TCP_IPV6                     0x8
1108 #define RSS_ENABLE_UDP_IPV4                     0x10
1109 #define RSS_ENABLE_UDP_IPV6                     0x20
1110
1111 struct be_cmd_req_rss_config {
1112         struct be_cmd_req_hdr hdr;
1113         u32 if_id;
1114         u16 enable_rss;
1115         u16 cpu_table_size_log2;
1116         u32 hash[10];
1117         u8 cpu_table[128];
1118         u8 flush;
1119         u8 rsvd0[3];
1120 };
1121
1122 /******************** Port Beacon ***************************/
1123
1124 #define BEACON_STATE_ENABLED            0x1
1125 #define BEACON_STATE_DISABLED           0x0
1126
1127 struct be_cmd_req_enable_disable_beacon {
1128         struct be_cmd_req_hdr hdr;
1129         u8  port_num;
1130         u8  beacon_state;
1131         u8  beacon_duration;
1132         u8  status_duration;
1133 } __packed;
1134
1135 struct be_cmd_resp_enable_disable_beacon {
1136         struct be_cmd_resp_hdr resp_hdr;
1137         u32 rsvd0;
1138 } __packed;
1139
1140 struct be_cmd_req_get_beacon_state {
1141         struct be_cmd_req_hdr hdr;
1142         u8  port_num;
1143         u8  rsvd0;
1144         u16 rsvd1;
1145 } __packed;
1146
1147 struct be_cmd_resp_get_beacon_state {
1148         struct be_cmd_resp_hdr resp_hdr;
1149         u8 beacon_state;
1150         u8 rsvd0[3];
1151 } __packed;
1152
1153 /****************** Firmware Flash ******************/
1154 struct flashrom_params {
1155         u32 op_code;
1156         u32 op_type;
1157         u32 data_buf_size;
1158         u32 offset;
1159 };
1160
1161 struct be_cmd_write_flashrom {
1162         struct be_cmd_req_hdr hdr;
1163         struct flashrom_params params;
1164         u8 data_buf[32768];
1165         u8 rsvd[4];
1166 } __packed;
1167
1168 /* cmd to read flash crc */
1169 struct be_cmd_read_flash_crc {
1170         struct be_cmd_req_hdr hdr;
1171         struct flashrom_params params;
1172         u8 crc[4];
1173         u8 rsvd[4];
1174 };
1175 /**************** Lancer Firmware Flash ************/
1176 struct amap_lancer_write_obj_context {
1177         u8 write_length[24];
1178         u8 reserved1[7];
1179         u8 eof;
1180 } __packed;
1181
1182 struct lancer_cmd_req_write_object {
1183         struct be_cmd_req_hdr hdr;
1184         u8 context[sizeof(struct amap_lancer_write_obj_context) / 8];
1185         u32 write_offset;
1186         u8 object_name[104];
1187         u32 descriptor_count;
1188         u32 buf_len;
1189         u32 addr_low;
1190         u32 addr_high;
1191 };
1192
1193 #define LANCER_NO_RESET_NEEDED          0x00
1194 #define LANCER_FW_RESET_NEEDED          0x02
1195 struct lancer_cmd_resp_write_object {
1196         u8 opcode;
1197         u8 subsystem;
1198         u8 rsvd1[2];
1199         u8 status;
1200         u8 additional_status;
1201         u8 rsvd2[2];
1202         u32 resp_len;
1203         u32 actual_resp_len;
1204         u32 actual_write_len;
1205         u8 change_status;
1206         u8 rsvd3[3];
1207 };
1208
1209 /************************ Lancer Read FW info **************/
1210 #define LANCER_READ_FILE_CHUNK                  (32*1024)
1211 #define LANCER_READ_FILE_EOF_MASK               0x80000000
1212
1213 #define LANCER_FW_DUMP_FILE                     "/dbg/dump.bin"
1214 #define LANCER_VPD_PF_FILE                      "/vpd/ntr_pf.vpd"
1215 #define LANCER_VPD_VF_FILE                      "/vpd/ntr_vf.vpd"
1216
1217 struct lancer_cmd_req_read_object {
1218         struct be_cmd_req_hdr hdr;
1219         u32 desired_read_len;
1220         u32 read_offset;
1221         u8 object_name[104];
1222         u32 descriptor_count;
1223         u32 buf_len;
1224         u32 addr_low;
1225         u32 addr_high;
1226 };
1227
1228 struct lancer_cmd_resp_read_object {
1229         u8 opcode;
1230         u8 subsystem;
1231         u8 rsvd1[2];
1232         u8 status;
1233         u8 additional_status;
1234         u8 rsvd2[2];
1235         u32 resp_len;
1236         u32 actual_resp_len;
1237         u32 actual_read_len;
1238         u32 eof;
1239 };
1240
1241 /************************ WOL *******************************/
1242 struct be_cmd_req_acpi_wol_magic_config{
1243         struct be_cmd_req_hdr hdr;
1244         u32 rsvd0[145];
1245         u8 magic_mac[6];
1246         u8 rsvd2[2];
1247 } __packed;
1248
1249 struct be_cmd_req_acpi_wol_magic_config_v1 {
1250         struct be_cmd_req_hdr hdr;
1251         u8 rsvd0[2];
1252         u8 query_options;
1253         u8 rsvd1[5];
1254         u32 rsvd2[288];
1255         u8 magic_mac[6];
1256         u8 rsvd3[22];
1257 } __packed;
1258
1259 struct be_cmd_resp_acpi_wol_magic_config_v1 {
1260         struct be_cmd_resp_hdr hdr;
1261         u8 rsvd0[2];
1262         u8 wol_settings;
1263         u8 rsvd1[5];
1264         u32 rsvd2[295];
1265 } __packed;
1266
1267 #define BE_GET_WOL_CAP                  2
1268
1269 #define BE_WOL_CAP                      0x1
1270 #define BE_PME_D0_CAP                   0x8
1271 #define BE_PME_D1_CAP                   0x10
1272 #define BE_PME_D2_CAP                   0x20
1273 #define BE_PME_D3HOT_CAP                0x40
1274 #define BE_PME_D3COLD_CAP               0x80
1275
1276 /********************** LoopBack test *********************/
1277 struct be_cmd_req_loopback_test {
1278         struct be_cmd_req_hdr hdr;
1279         u32 loopback_type;
1280         u32 num_pkts;
1281         u64 pattern;
1282         u32 src_port;
1283         u32 dest_port;
1284         u32 pkt_size;
1285 };
1286
1287 struct be_cmd_resp_loopback_test {
1288         struct be_cmd_resp_hdr resp_hdr;
1289         u32    status;
1290         u32    num_txfer;
1291         u32    num_rx;
1292         u32    miscomp_off;
1293         u32    ticks_compl;
1294 };
1295
1296 struct be_cmd_req_set_lmode {
1297         struct be_cmd_req_hdr hdr;
1298         u8 src_port;
1299         u8 dest_port;
1300         u8 loopback_type;
1301         u8 loopback_state;
1302 };
1303
1304 struct be_cmd_resp_set_lmode {
1305         struct be_cmd_resp_hdr resp_hdr;
1306         u8 rsvd0[4];
1307 };
1308
1309 /********************** DDR DMA test *********************/
1310 struct be_cmd_req_ddrdma_test {
1311         struct be_cmd_req_hdr hdr;
1312         u64 pattern;
1313         u32 byte_count;
1314         u32 rsvd0;
1315         u8  snd_buff[4096];
1316         u8  rsvd1[4096];
1317 };
1318
1319 struct be_cmd_resp_ddrdma_test {
1320         struct be_cmd_resp_hdr hdr;
1321         u64 pattern;
1322         u32 byte_cnt;
1323         u32 snd_err;
1324         u8  rsvd0[4096];
1325         u8  rcv_buff[4096];
1326 };
1327
1328 /*********************** SEEPROM Read ***********************/
1329
1330 #define BE_READ_SEEPROM_LEN 1024
1331 struct be_cmd_req_seeprom_read {
1332         struct be_cmd_req_hdr hdr;
1333         u8 rsvd0[BE_READ_SEEPROM_LEN];
1334 };
1335
1336 struct be_cmd_resp_seeprom_read {
1337         struct be_cmd_req_hdr hdr;
1338         u8 seeprom_data[BE_READ_SEEPROM_LEN];
1339 };
1340
1341 enum {
1342         PHY_TYPE_CX4_10GB = 0,
1343         PHY_TYPE_XFP_10GB,
1344         PHY_TYPE_SFP_1GB,
1345         PHY_TYPE_SFP_PLUS_10GB,
1346         PHY_TYPE_KR_10GB,
1347         PHY_TYPE_KX4_10GB,
1348         PHY_TYPE_BASET_10GB,
1349         PHY_TYPE_BASET_1GB,
1350         PHY_TYPE_BASEX_1GB,
1351         PHY_TYPE_SGMII,
1352         PHY_TYPE_DISABLED = 255
1353 };
1354
1355 #define BE_SUPPORTED_SPEED_NONE         0
1356 #define BE_SUPPORTED_SPEED_10MBPS       1
1357 #define BE_SUPPORTED_SPEED_100MBPS      2
1358 #define BE_SUPPORTED_SPEED_1GBPS        4
1359 #define BE_SUPPORTED_SPEED_10GBPS       8
1360
1361 #define BE_AN_EN                        0x2
1362 #define BE_PAUSE_SYM_EN                 0x80
1363
1364 /* MAC speed valid values */
1365 #define SPEED_DEFAULT  0x0
1366 #define SPEED_FORCED_10GB  0x1
1367 #define SPEED_FORCED_1GB  0x2
1368 #define SPEED_AUTONEG_10GB  0x3
1369 #define SPEED_AUTONEG_1GB  0x4
1370 #define SPEED_AUTONEG_100MB  0x5
1371 #define SPEED_AUTONEG_10GB_1GB 0x6
1372 #define SPEED_AUTONEG_10GB_1GB_100MB 0x7
1373 #define SPEED_AUTONEG_1GB_100MB  0x8
1374 #define SPEED_AUTONEG_10MB  0x9
1375 #define SPEED_AUTONEG_1GB_100MB_10MB 0xa
1376 #define SPEED_AUTONEG_100MB_10MB 0xb
1377 #define SPEED_FORCED_100MB  0xc
1378 #define SPEED_FORCED_10MB  0xd
1379
1380 struct be_cmd_req_get_phy_info {
1381         struct be_cmd_req_hdr hdr;
1382         u8 rsvd0[24];
1383 };
1384
1385 struct be_phy_info {
1386         u16 phy_type;
1387         u16 interface_type;
1388         u32 misc_params;
1389         u16 ext_phy_details;
1390         u16 rsvd;
1391         u16 auto_speeds_supported;
1392         u16 fixed_speeds_supported;
1393         u32 future_use[2];
1394 };
1395
1396 struct be_cmd_resp_get_phy_info {
1397         struct be_cmd_req_hdr hdr;
1398         struct be_phy_info phy_info;
1399 };
1400
1401 /*********************** Set QOS ***********************/
1402
1403 #define BE_QOS_BITS_NIC                         1
1404
1405 struct be_cmd_req_set_qos {
1406         struct be_cmd_req_hdr hdr;
1407         u32 valid_bits;
1408         u32 max_bps_nic;
1409         u32 rsvd[7];
1410 };
1411
1412 struct be_cmd_resp_set_qos {
1413         struct be_cmd_resp_hdr hdr;
1414         u32 rsvd;
1415 };
1416
1417 /*********************** Controller Attributes ***********************/
1418 struct be_cmd_req_cntl_attribs {
1419         struct be_cmd_req_hdr hdr;
1420 };
1421
1422 struct be_cmd_resp_cntl_attribs {
1423         struct be_cmd_resp_hdr hdr;
1424         struct mgmt_controller_attrib attribs;
1425 };
1426
1427 /*********************** Set driver function ***********************/
1428 #define CAPABILITY_SW_TIMESTAMPS        2
1429 #define CAPABILITY_BE3_NATIVE_ERX_API   4
1430
1431 struct be_cmd_req_set_func_cap {
1432         struct be_cmd_req_hdr hdr;
1433         u32 valid_cap_flags;
1434         u32 cap_flags;
1435         u8 rsvd[212];
1436 };
1437
1438 struct be_cmd_resp_set_func_cap {
1439         struct be_cmd_resp_hdr hdr;
1440         u32 valid_cap_flags;
1441         u32 cap_flags;
1442         u8 rsvd[212];
1443 };
1444
1445 /*********************** Function Privileges ***********************/
1446 enum {
1447         BE_PRIV_DEFAULT = 0x1,
1448         BE_PRIV_LNKQUERY = 0x2,
1449         BE_PRIV_LNKSTATS = 0x4,
1450         BE_PRIV_LNKMGMT = 0x8,
1451         BE_PRIV_LNKDIAG = 0x10,
1452         BE_PRIV_UTILQUERY = 0x20,
1453         BE_PRIV_FILTMGMT = 0x40,
1454         BE_PRIV_IFACEMGMT = 0x80,
1455         BE_PRIV_VHADM = 0x100,
1456         BE_PRIV_DEVCFG = 0x200,
1457         BE_PRIV_DEVSEC = 0x400
1458 };
1459 #define MAX_PRIVILEGES          (BE_PRIV_VHADM | BE_PRIV_DEVCFG | \
1460                                  BE_PRIV_DEVSEC)
1461 #define MIN_PRIVILEGES          BE_PRIV_DEFAULT
1462
1463 struct be_cmd_priv_map {
1464         u8 opcode;
1465         u8 subsystem;
1466         u32 priv_mask;
1467 };
1468
1469 struct be_cmd_req_get_fn_privileges {
1470         struct be_cmd_req_hdr hdr;
1471         u32 rsvd;
1472 };
1473
1474 struct be_cmd_resp_get_fn_privileges {
1475         struct be_cmd_resp_hdr hdr;
1476         u32 privilege_mask;
1477 };
1478
1479
1480 /******************** GET/SET_MACLIST  **************************/
1481 #define BE_MAX_MAC                      64
1482 struct be_cmd_req_get_mac_list {
1483         struct be_cmd_req_hdr hdr;
1484         u8 mac_type;
1485         u8 perm_override;
1486         u16 iface_id;
1487         u32 mac_id;
1488         u32 rsvd[3];
1489 } __packed;
1490
1491 struct get_list_macaddr {
1492         u16 mac_addr_size;
1493         union {
1494                 u8 macaddr[6];
1495                 struct {
1496                         u8 rsvd[2];
1497                         u32 mac_id;
1498                 } __packed s_mac_id;
1499         } __packed mac_addr_id;
1500 } __packed;
1501
1502 struct be_cmd_resp_get_mac_list {
1503         struct be_cmd_resp_hdr hdr;
1504         struct get_list_macaddr fd_macaddr; /* Factory default mac */
1505         struct get_list_macaddr macid_macaddr; /* soft mac */
1506         u8 true_mac_count;
1507         u8 pseudo_mac_count;
1508         u8 mac_list_size;
1509         u8 rsvd;
1510         /* perm override mac */
1511         struct get_list_macaddr macaddr_list[BE_MAX_MAC];
1512 } __packed;
1513
1514 struct be_cmd_req_set_mac_list {
1515         struct be_cmd_req_hdr hdr;
1516         u8 mac_count;
1517         u8 rsvd1;
1518         u16 rsvd2;
1519         struct macaddr mac[BE_MAX_MAC];
1520 } __packed;
1521
1522 /*********************** HSW Config ***********************/
1523 struct amap_set_hsw_context {
1524         u8 interface_id[16];
1525         u8 rsvd0[14];
1526         u8 pvid_valid;
1527         u8 rsvd1;
1528         u8 rsvd2[16];
1529         u8 pvid[16];
1530         u8 rsvd3[32];
1531         u8 rsvd4[32];
1532         u8 rsvd5[32];
1533 } __packed;
1534
1535 struct be_cmd_req_set_hsw_config {
1536         struct be_cmd_req_hdr hdr;
1537         u8 context[sizeof(struct amap_set_hsw_context) / 8];
1538 } __packed;
1539
1540 struct be_cmd_resp_set_hsw_config {
1541         struct be_cmd_resp_hdr hdr;
1542         u32 rsvd;
1543 };
1544
1545 struct amap_get_hsw_req_context {
1546         u8 interface_id[16];
1547         u8 rsvd0[14];
1548         u8 pvid_valid;
1549         u8 pport;
1550 } __packed;
1551
1552 struct amap_get_hsw_resp_context {
1553         u8 rsvd1[16];
1554         u8 pvid[16];
1555         u8 rsvd2[32];
1556         u8 rsvd3[32];
1557         u8 rsvd4[32];
1558 } __packed;
1559
1560 struct be_cmd_req_get_hsw_config {
1561         struct be_cmd_req_hdr hdr;
1562         u8 context[sizeof(struct amap_get_hsw_req_context) / 8];
1563 } __packed;
1564
1565 struct be_cmd_resp_get_hsw_config {
1566         struct be_cmd_resp_hdr hdr;
1567         u8 context[sizeof(struct amap_get_hsw_resp_context) / 8];
1568         u32 rsvd;
1569 };
1570
1571 /******************* get port names ***************/
1572 struct be_cmd_req_get_port_name {
1573         struct be_cmd_req_hdr hdr;
1574         u32 rsvd0;
1575 };
1576
1577 struct be_cmd_resp_get_port_name {
1578         struct be_cmd_req_hdr hdr;
1579         u8 port_name[4];
1580 };
1581
1582 /*************** HW Stats Get v1 **********************************/
1583 #define BE_TXP_SW_SZ                    48
1584 struct be_port_rxf_stats_v1 {
1585         u32 rsvd0[12];
1586         u32 rx_crc_errors;
1587         u32 rx_alignment_symbol_errors;
1588         u32 rx_pause_frames;
1589         u32 rx_priority_pause_frames;
1590         u32 rx_control_frames;
1591         u32 rx_in_range_errors;
1592         u32 rx_out_range_errors;
1593         u32 rx_frame_too_long;
1594         u32 rx_address_mismatch_drops;
1595         u32 rx_dropped_too_small;
1596         u32 rx_dropped_too_short;
1597         u32 rx_dropped_header_too_small;
1598         u32 rx_dropped_tcp_length;
1599         u32 rx_dropped_runt;
1600         u32 rsvd1[10];
1601         u32 rx_ip_checksum_errs;
1602         u32 rx_tcp_checksum_errs;
1603         u32 rx_udp_checksum_errs;
1604         u32 rsvd2[7];
1605         u32 rx_switched_unicast_packets;
1606         u32 rx_switched_multicast_packets;
1607         u32 rx_switched_broadcast_packets;
1608         u32 rsvd3[3];
1609         u32 tx_pauseframes;
1610         u32 tx_priority_pauseframes;
1611         u32 tx_controlframes;
1612         u32 rsvd4[10];
1613         u32 rxpp_fifo_overflow_drop;
1614         u32 rx_input_fifo_overflow_drop;
1615         u32 pmem_fifo_overflow_drop;
1616         u32 jabber_events;
1617         u32 rsvd5[3];
1618 };
1619
1620
1621 struct be_rxf_stats_v1 {
1622         struct be_port_rxf_stats_v1 port[4];
1623         u32 rsvd0[2];
1624         u32 rx_drops_no_pbuf;
1625         u32 rx_drops_no_txpb;
1626         u32 rx_drops_no_erx_descr;
1627         u32 rx_drops_no_tpre_descr;
1628         u32 rsvd1[6];
1629         u32 rx_drops_too_many_frags;
1630         u32 rx_drops_invalid_ring;
1631         u32 forwarded_packets;
1632         u32 rx_drops_mtu;
1633         u32 rsvd2[14];
1634 };
1635
1636 struct be_erx_stats_v1 {
1637         u32 rx_drops_no_fragments[68];     /* dwordS 0 to 67*/
1638         u32 rsvd[4];
1639 };
1640
1641 struct be_hw_stats_v1 {
1642         struct be_rxf_stats_v1 rxf;
1643         u32 rsvd0[BE_TXP_SW_SZ];
1644         struct be_erx_stats_v1 erx;
1645         struct be_pmem_stats pmem;
1646         u32 rsvd1[18];
1647 };
1648
1649 struct be_cmd_req_get_stats_v1 {
1650         struct be_cmd_req_hdr hdr;
1651         u8 rsvd[sizeof(struct be_hw_stats_v1)];
1652 };
1653
1654 struct be_cmd_resp_get_stats_v1 {
1655         struct be_cmd_resp_hdr hdr;
1656         struct be_hw_stats_v1 hw_stats;
1657 };
1658
1659 /************** get fat capabilites *******************/
1660 #define MAX_MODULES 27
1661 #define MAX_MODES 4
1662 #define MODE_UART 0
1663 #define FW_LOG_LEVEL_DEFAULT 48
1664 #define FW_LOG_LEVEL_FATAL 64
1665
1666 struct ext_fat_mode {
1667         u8 mode;
1668         u8 rsvd0;
1669         u16 port_mask;
1670         u32 dbg_lvl;
1671         u64 fun_mask;
1672 } __packed;
1673
1674 struct ext_fat_modules {
1675         u8 modules_str[32];
1676         u32 modules_id;
1677         u32 num_modes;
1678         struct ext_fat_mode trace_lvl[MAX_MODES];
1679 } __packed;
1680
1681 struct be_fat_conf_params {
1682         u32 max_log_entries;
1683         u32 log_entry_size;
1684         u8 log_type;
1685         u8 max_log_funs;
1686         u8 max_log_ports;
1687         u8 rsvd0;
1688         u32 supp_modes;
1689         u32 num_modules;
1690         struct ext_fat_modules module[MAX_MODULES];
1691 } __packed;
1692
1693 struct be_cmd_req_get_ext_fat_caps {
1694         struct be_cmd_req_hdr hdr;
1695         u32 parameter_type;
1696 };
1697
1698 struct be_cmd_resp_get_ext_fat_caps {
1699         struct be_cmd_resp_hdr hdr;
1700         struct be_fat_conf_params get_params;
1701 };
1702
1703 struct be_cmd_req_set_ext_fat_caps {
1704         struct be_cmd_req_hdr hdr;
1705         struct be_fat_conf_params set_params;
1706 };
1707
1708 #define RESOURCE_DESC_SIZE                      72
1709 #define NIC_RESOURCE_DESC_TYPE_ID               0x41
1710 #define MAX_RESOURCE_DESC                       4
1711
1712 /* QOS unit number */
1713 #define QUN                                     4
1714 /* Immediate */
1715 #define IMM                                     6
1716 /* No save */
1717 #define NOSV                                    7
1718
1719 struct be_nic_resource_desc {
1720         u8 desc_type;
1721         u8 desc_len;
1722         u8 rsvd1;
1723         u8 flags;
1724         u8 vf_num;
1725         u8 rsvd2;
1726         u8 pf_num;
1727         u8 rsvd3;
1728         u16 unicast_mac_count;
1729         u8 rsvd4[6];
1730         u16 mcc_count;
1731         u16 vlan_count;
1732         u16 mcast_mac_count;
1733         u16 txq_count;
1734         u16 rq_count;
1735         u16 rssq_count;
1736         u16 lro_count;
1737         u16 cq_count;
1738         u16 toe_conn_count;
1739         u16 eq_count;
1740         u32 rsvd5;
1741         u32 cap_flags;
1742         u8 link_param;
1743         u8 rsvd6[3];
1744         u32 bw_min;
1745         u32 bw_max;
1746         u8 acpi_params;
1747         u8 wol_param;
1748         u16 rsvd7;
1749         u32 rsvd8[3];
1750 };
1751
1752 struct be_cmd_req_get_func_config {
1753         struct be_cmd_req_hdr hdr;
1754 };
1755
1756 struct be_cmd_resp_get_func_config {
1757         struct be_cmd_req_hdr hdr;
1758         u32 desc_count;
1759         u8 func_param[MAX_RESOURCE_DESC * RESOURCE_DESC_SIZE];
1760 };
1761
1762 #define ACTIVE_PROFILE_TYPE                     0x2
1763 struct be_cmd_req_get_profile_config {
1764         struct be_cmd_req_hdr hdr;
1765         u8 rsvd;
1766         u8 type;
1767         u16 rsvd1;
1768 };
1769
1770 struct be_cmd_resp_get_profile_config {
1771         struct be_cmd_req_hdr hdr;
1772         u32 desc_count;
1773         u8 func_param[MAX_RESOURCE_DESC * RESOURCE_DESC_SIZE];
1774 };
1775
1776 struct be_cmd_req_set_profile_config {
1777         struct be_cmd_req_hdr hdr;
1778         u32 rsvd;
1779         u32 desc_count;
1780         struct be_nic_resource_desc nic_desc;
1781 };
1782
1783 struct be_cmd_resp_set_profile_config {
1784         struct be_cmd_req_hdr hdr;
1785 };
1786
1787 struct be_cmd_enable_disable_vf {
1788         struct be_cmd_req_hdr hdr;
1789         u8 enable;
1790         u8 rsvd[3];
1791 };
1792
1793 static inline bool check_privilege(struct be_adapter *adapter, u32 flags)
1794 {
1795         return flags & adapter->cmd_privileges ? true : false;
1796 }
1797
1798 extern int be_pci_fnum_get(struct be_adapter *adapter);
1799 extern int be_fw_wait_ready(struct be_adapter *adapter);
1800 extern int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,
1801                                  bool permanent, u32 if_handle, u32 pmac_id);
1802 extern int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr,
1803                         u32 if_id, u32 *pmac_id, u32 domain);
1804 extern int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id,
1805                         int pmac_id, u32 domain);
1806 extern int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags,
1807                             u32 en_flags, u32 *if_handle, u32 domain);
1808 extern int be_cmd_if_destroy(struct be_adapter *adapter, int if_handle,
1809                         u32 domain);
1810 extern int be_cmd_eq_create(struct be_adapter *adapter,
1811                         struct be_queue_info *eq, int eq_delay);
1812 extern int be_cmd_cq_create(struct be_adapter *adapter,
1813                         struct be_queue_info *cq, struct be_queue_info *eq,
1814                         bool no_delay, int num_cqe_dma_coalesce);
1815 extern int be_cmd_mccq_create(struct be_adapter *adapter,
1816                         struct be_queue_info *mccq,
1817                         struct be_queue_info *cq);
1818 extern int be_cmd_txq_create(struct be_adapter *adapter,
1819                         struct be_queue_info *txq,
1820                         struct be_queue_info *cq);
1821 extern int be_cmd_rxq_create(struct be_adapter *adapter,
1822                         struct be_queue_info *rxq, u16 cq_id,
1823                         u16 frag_size, u32 if_id, u32 rss, u8 *rss_id);
1824 extern int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q,
1825                         int type);
1826 extern int be_cmd_rxq_destroy(struct be_adapter *adapter,
1827                         struct be_queue_info *q);
1828 extern int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed,
1829                                     u8 *link_status, u32 dom);
1830 extern int be_cmd_reset(struct be_adapter *adapter);
1831 extern int be_cmd_get_stats(struct be_adapter *adapter,
1832                         struct be_dma_mem *nonemb_cmd);
1833 extern int lancer_cmd_get_pport_stats(struct be_adapter *adapter,
1834                         struct be_dma_mem *nonemb_cmd);
1835 extern int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver,
1836                 char *fw_on_flash);
1837
1838 extern int be_cmd_modify_eqd(struct be_adapter *adapter, u32 eq_id, u32 eqd);
1839 extern int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id,
1840                         u16 *vtag_array, u32 num, bool untagged,
1841                         bool promiscuous);
1842 extern int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 status);
1843 extern int be_cmd_set_flow_control(struct be_adapter *adapter,
1844                         u32 tx_fc, u32 rx_fc);
1845 extern int be_cmd_get_flow_control(struct be_adapter *adapter,
1846                         u32 *tx_fc, u32 *rx_fc);
1847 extern int be_cmd_query_fw_cfg(struct be_adapter *adapter,
1848                         u32 *port_num, u32 *function_mode, u32 *function_caps);
1849 extern int be_cmd_reset_function(struct be_adapter *adapter);
1850 extern int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable,
1851                         u16 table_size);
1852 extern int be_process_mcc(struct be_adapter *adapter);
1853 extern int be_cmd_set_beacon_state(struct be_adapter *adapter,
1854                         u8 port_num, u8 beacon, u8 status, u8 state);
1855 extern int be_cmd_get_beacon_state(struct be_adapter *adapter,
1856                         u8 port_num, u32 *state);
1857 extern int be_cmd_write_flashrom(struct be_adapter *adapter,
1858                         struct be_dma_mem *cmd, u32 flash_oper,
1859                         u32 flash_opcode, u32 buf_size);
1860 extern int lancer_cmd_write_object(struct be_adapter *adapter,
1861                                    struct be_dma_mem *cmd,
1862                                    u32 data_size, u32 data_offset,
1863                                    const char *obj_name,
1864                                    u32 *data_written, u8 *change_status,
1865                                    u8 *addn_status);
1866 int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
1867                 u32 data_size, u32 data_offset, const char *obj_name,
1868                 u32 *data_read, u32 *eof, u8 *addn_status);
1869 int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc,
1870                                 int offset);
1871 extern int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,
1872                                 struct be_dma_mem *nonemb_cmd);
1873 extern int be_cmd_fw_init(struct be_adapter *adapter);
1874 extern int be_cmd_fw_clean(struct be_adapter *adapter);
1875 extern void be_async_mcc_enable(struct be_adapter *adapter);
1876 extern void be_async_mcc_disable(struct be_adapter *adapter);
1877 extern int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,
1878                                 u32 loopback_type, u32 pkt_size,
1879                                 u32 num_pkts, u64 pattern);
1880 extern int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern,
1881                         u32 byte_cnt, struct be_dma_mem *cmd);
1882 extern int be_cmd_get_seeprom_data(struct be_adapter *adapter,
1883                                 struct be_dma_mem *nonemb_cmd);
1884 extern int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num,
1885                                 u8 loopback_type, u8 enable);
1886 extern int be_cmd_get_phy_info(struct be_adapter *adapter);
1887 extern int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain);
1888 extern void be_detect_error(struct be_adapter *adapter);
1889 extern int be_cmd_get_die_temperature(struct be_adapter *adapter);
1890 extern int be_cmd_get_cntl_attributes(struct be_adapter *adapter);
1891 extern int be_cmd_req_native_mode(struct be_adapter *adapter);
1892 extern int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size);
1893 extern void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf);
1894 extern int be_cmd_get_fn_privileges(struct be_adapter *adapter,
1895                                     u32 *privilege, u32 domain);
1896 extern int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac,
1897                                     bool *pmac_id_active, u32 *pmac_id,
1898                                     u8 domain);
1899 extern int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array,
1900                                                 u8 mac_count, u32 domain);
1901 extern int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid,
1902                         u32 domain, u16 intf_id);
1903 extern int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid,
1904                         u32 domain, u16 intf_id);
1905 extern int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter);
1906 extern int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter,
1907                                           struct be_dma_mem *cmd);
1908 extern int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter,
1909                                           struct be_dma_mem *cmd,
1910                                           struct be_fat_conf_params *cfgs);
1911 extern int lancer_wait_ready(struct be_adapter *adapter);
1912 extern int lancer_test_and_set_rdy_state(struct be_adapter *adapter);
1913 extern int be_cmd_query_port_name(struct be_adapter *adapter, u8 *port_name);
1914 extern int be_cmd_get_func_config(struct be_adapter *adapter);
1915 extern int be_cmd_get_profile_config(struct be_adapter *adapter, u32 *cap_flags,
1916                                      u8 domain);
1917
1918 extern int be_cmd_set_profile_config(struct be_adapter *adapter, u32 bps,
1919                                      u8 domain);
1920 extern int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain);