1 /* Intel PRO/1000 Linux driver
2 * Copyright(c) 1999 - 2014 Intel Corporation.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * The full GNU General Public License is included in this distribution in
14 * the file called "COPYING".
16 * Contact Information:
17 * Linux NICS <linux.nics@intel.com>
18 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
19 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24 #include <linux/module.h>
25 #include <linux/types.h>
26 #include <linux/init.h>
27 #include <linux/pci.h>
28 #include <linux/vmalloc.h>
29 #include <linux/pagemap.h>
30 #include <linux/delay.h>
31 #include <linux/netdevice.h>
32 #include <linux/interrupt.h>
33 #include <linux/tcp.h>
34 #include <linux/ipv6.h>
35 #include <linux/slab.h>
36 #include <net/checksum.h>
37 #include <net/ip6_checksum.h>
38 #include <linux/ethtool.h>
39 #include <linux/if_vlan.h>
40 #include <linux/cpu.h>
41 #include <linux/smp.h>
42 #include <linux/pm_qos.h>
43 #include <linux/pm_runtime.h>
44 #include <linux/aer.h>
45 #include <linux/prefetch.h>
49 #define DRV_EXTRAVERSION "-k"
51 #define DRV_VERSION "2.3.2" DRV_EXTRAVERSION
52 char e1000e_driver_name[] = "e1000e";
53 const char e1000e_driver_version[] = DRV_VERSION;
55 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
56 static int debug = -1;
57 module_param(debug, int, 0);
58 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
60 static const struct e1000_info *e1000_info_tbl[] = {
61 [board_82571] = &e1000_82571_info,
62 [board_82572] = &e1000_82572_info,
63 [board_82573] = &e1000_82573_info,
64 [board_82574] = &e1000_82574_info,
65 [board_82583] = &e1000_82583_info,
66 [board_80003es2lan] = &e1000_es2_info,
67 [board_ich8lan] = &e1000_ich8_info,
68 [board_ich9lan] = &e1000_ich9_info,
69 [board_ich10lan] = &e1000_ich10_info,
70 [board_pchlan] = &e1000_pch_info,
71 [board_pch2lan] = &e1000_pch2_info,
72 [board_pch_lpt] = &e1000_pch_lpt_info,
75 struct e1000_reg_info {
80 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
81 /* General Registers */
83 {E1000_STATUS, "STATUS"},
84 {E1000_CTRL_EXT, "CTRL_EXT"},
86 /* Interrupt Registers */
91 {E1000_RDLEN(0), "RDLEN"},
92 {E1000_RDH(0), "RDH"},
93 {E1000_RDT(0), "RDT"},
95 {E1000_RXDCTL(0), "RXDCTL"},
97 {E1000_RDBAL(0), "RDBAL"},
98 {E1000_RDBAH(0), "RDBAH"},
100 {E1000_RDFT, "RDFT"},
101 {E1000_RDFHS, "RDFHS"},
102 {E1000_RDFTS, "RDFTS"},
103 {E1000_RDFPC, "RDFPC"},
106 {E1000_TCTL, "TCTL"},
107 {E1000_TDBAL(0), "TDBAL"},
108 {E1000_TDBAH(0), "TDBAH"},
109 {E1000_TDLEN(0), "TDLEN"},
110 {E1000_TDH(0), "TDH"},
111 {E1000_TDT(0), "TDT"},
112 {E1000_TIDV, "TIDV"},
113 {E1000_TXDCTL(0), "TXDCTL"},
114 {E1000_TADV, "TADV"},
115 {E1000_TARC(0), "TARC"},
116 {E1000_TDFH, "TDFH"},
117 {E1000_TDFT, "TDFT"},
118 {E1000_TDFHS, "TDFHS"},
119 {E1000_TDFTS, "TDFTS"},
120 {E1000_TDFPC, "TDFPC"},
122 /* List Terminator */
127 * e1000_regdump - register printout routine
128 * @hw: pointer to the HW structure
129 * @reginfo: pointer to the register info table
131 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
137 switch (reginfo->ofs) {
138 case E1000_RXDCTL(0):
139 for (n = 0; n < 2; n++)
140 regs[n] = __er32(hw, E1000_RXDCTL(n));
142 case E1000_TXDCTL(0):
143 for (n = 0; n < 2; n++)
144 regs[n] = __er32(hw, E1000_TXDCTL(n));
147 for (n = 0; n < 2; n++)
148 regs[n] = __er32(hw, E1000_TARC(n));
151 pr_info("%-15s %08x\n",
152 reginfo->name, __er32(hw, reginfo->ofs));
156 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
157 pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
160 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
161 struct e1000_buffer *bi)
164 struct e1000_ps_page *ps_page;
166 for (i = 0; i < adapter->rx_ps_pages; i++) {
167 ps_page = &bi->ps_pages[i];
170 pr_info("packet dump for ps_page %d:\n", i);
171 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
172 16, 1, page_address(ps_page->page),
179 * e1000e_dump - Print registers, Tx-ring and Rx-ring
180 * @adapter: board private structure
182 static void e1000e_dump(struct e1000_adapter *adapter)
184 struct net_device *netdev = adapter->netdev;
185 struct e1000_hw *hw = &adapter->hw;
186 struct e1000_reg_info *reginfo;
187 struct e1000_ring *tx_ring = adapter->tx_ring;
188 struct e1000_tx_desc *tx_desc;
193 struct e1000_buffer *buffer_info;
194 struct e1000_ring *rx_ring = adapter->rx_ring;
195 union e1000_rx_desc_packet_split *rx_desc_ps;
196 union e1000_rx_desc_extended *rx_desc;
206 if (!netif_msg_hw(adapter))
209 /* Print netdevice Info */
211 dev_info(&adapter->pdev->dev, "Net device Info\n");
212 pr_info("Device Name state trans_start last_rx\n");
213 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
214 netdev->state, netdev->trans_start, netdev->last_rx);
217 /* Print Registers */
218 dev_info(&adapter->pdev->dev, "Register Dump\n");
219 pr_info(" Register Name Value\n");
220 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
221 reginfo->name; reginfo++) {
222 e1000_regdump(hw, reginfo);
225 /* Print Tx Ring Summary */
226 if (!netdev || !netif_running(netdev))
229 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
230 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
231 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
232 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
233 0, tx_ring->next_to_use, tx_ring->next_to_clean,
234 (unsigned long long)buffer_info->dma,
236 buffer_info->next_to_watch,
237 (unsigned long long)buffer_info->time_stamp);
240 if (!netif_msg_tx_done(adapter))
241 goto rx_ring_summary;
243 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
245 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
247 * Legacy Transmit Descriptor
248 * +--------------------------------------------------------------+
249 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
250 * +--------------------------------------------------------------+
251 * 8 | Special | CSS | Status | CMD | CSO | Length |
252 * +--------------------------------------------------------------+
253 * 63 48 47 36 35 32 31 24 23 16 15 0
255 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
256 * 63 48 47 40 39 32 31 16 15 8 7 0
257 * +----------------------------------------------------------------+
258 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
259 * +----------------------------------------------------------------+
260 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
261 * +----------------------------------------------------------------+
262 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
264 * Extended Data Descriptor (DTYP=0x1)
265 * +----------------------------------------------------------------+
266 * 0 | Buffer Address [63:0] |
267 * +----------------------------------------------------------------+
268 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
269 * +----------------------------------------------------------------+
270 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
272 pr_info("Tl[desc] [address 63:0 ] [SpeCssSCmCsLen] [bi->dma ] leng ntw timestamp bi->skb <-- Legacy format\n");
273 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Context format\n");
274 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Data format\n");
275 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
276 const char *next_desc;
277 tx_desc = E1000_TX_DESC(*tx_ring, i);
278 buffer_info = &tx_ring->buffer_info[i];
279 u0 = (struct my_u0 *)tx_desc;
280 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
281 next_desc = " NTC/U";
282 else if (i == tx_ring->next_to_use)
284 else if (i == tx_ring->next_to_clean)
288 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p%s\n",
289 (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' :
290 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')),
292 (unsigned long long)le64_to_cpu(u0->a),
293 (unsigned long long)le64_to_cpu(u0->b),
294 (unsigned long long)buffer_info->dma,
295 buffer_info->length, buffer_info->next_to_watch,
296 (unsigned long long)buffer_info->time_stamp,
297 buffer_info->skb, next_desc);
299 if (netif_msg_pktdata(adapter) && buffer_info->skb)
300 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
301 16, 1, buffer_info->skb->data,
302 buffer_info->skb->len, true);
305 /* Print Rx Ring Summary */
307 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
308 pr_info("Queue [NTU] [NTC]\n");
309 pr_info(" %5d %5X %5X\n",
310 0, rx_ring->next_to_use, rx_ring->next_to_clean);
313 if (!netif_msg_rx_status(adapter))
316 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
317 switch (adapter->rx_ps_pages) {
321 /* [Extended] Packet Split Receive Descriptor Format
323 * +-----------------------------------------------------+
324 * 0 | Buffer Address 0 [63:0] |
325 * +-----------------------------------------------------+
326 * 8 | Buffer Address 1 [63:0] |
327 * +-----------------------------------------------------+
328 * 16 | Buffer Address 2 [63:0] |
329 * +-----------------------------------------------------+
330 * 24 | Buffer Address 3 [63:0] |
331 * +-----------------------------------------------------+
333 pr_info("R [desc] [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] [bi->skb] <-- Ext Pkt Split format\n");
334 /* [Extended] Receive Descriptor (Write-Back) Format
336 * 63 48 47 32 31 13 12 8 7 4 3 0
337 * +------------------------------------------------------+
338 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
339 * | Checksum | Ident | | Queue | | Type |
340 * +------------------------------------------------------+
341 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
342 * +------------------------------------------------------+
343 * 63 48 47 32 31 20 19 0
345 pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
346 for (i = 0; i < rx_ring->count; i++) {
347 const char *next_desc;
348 buffer_info = &rx_ring->buffer_info[i];
349 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
350 u1 = (struct my_u1 *)rx_desc_ps;
352 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
354 if (i == rx_ring->next_to_use)
356 else if (i == rx_ring->next_to_clean)
361 if (staterr & E1000_RXD_STAT_DD) {
362 /* Descriptor Done */
363 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX ---------------- %p%s\n",
365 (unsigned long long)le64_to_cpu(u1->a),
366 (unsigned long long)le64_to_cpu(u1->b),
367 (unsigned long long)le64_to_cpu(u1->c),
368 (unsigned long long)le64_to_cpu(u1->d),
369 buffer_info->skb, next_desc);
371 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX %016llX %p%s\n",
373 (unsigned long long)le64_to_cpu(u1->a),
374 (unsigned long long)le64_to_cpu(u1->b),
375 (unsigned long long)le64_to_cpu(u1->c),
376 (unsigned long long)le64_to_cpu(u1->d),
377 (unsigned long long)buffer_info->dma,
378 buffer_info->skb, next_desc);
380 if (netif_msg_pktdata(adapter))
381 e1000e_dump_ps_pages(adapter,
388 /* Extended Receive Descriptor (Read) Format
390 * +-----------------------------------------------------+
391 * 0 | Buffer Address [63:0] |
392 * +-----------------------------------------------------+
394 * +-----------------------------------------------------+
396 pr_info("R [desc] [buf addr 63:0 ] [reserved 63:0 ] [bi->dma ] [bi->skb] <-- Ext (Read) format\n");
397 /* Extended Receive Descriptor (Write-Back) Format
399 * 63 48 47 32 31 24 23 4 3 0
400 * +------------------------------------------------------+
402 * 0 +-------------------+ Rsvd | Reserved | MRQ RSS |
403 * | Packet | IP | | | Type |
404 * | Checksum | Ident | | | |
405 * +------------------------------------------------------+
406 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
407 * +------------------------------------------------------+
408 * 63 48 47 32 31 20 19 0
410 pr_info("RWB[desc] [cs ipid mrq] [vt ln xe xs] [bi->skb] <-- Ext (Write-Back) format\n");
412 for (i = 0; i < rx_ring->count; i++) {
413 const char *next_desc;
415 buffer_info = &rx_ring->buffer_info[i];
416 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
417 u1 = (struct my_u1 *)rx_desc;
418 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
420 if (i == rx_ring->next_to_use)
422 else if (i == rx_ring->next_to_clean)
427 if (staterr & E1000_RXD_STAT_DD) {
428 /* Descriptor Done */
429 pr_info("%s[0x%03X] %016llX %016llX ---------------- %p%s\n",
431 (unsigned long long)le64_to_cpu(u1->a),
432 (unsigned long long)le64_to_cpu(u1->b),
433 buffer_info->skb, next_desc);
435 pr_info("%s[0x%03X] %016llX %016llX %016llX %p%s\n",
437 (unsigned long long)le64_to_cpu(u1->a),
438 (unsigned long long)le64_to_cpu(u1->b),
439 (unsigned long long)buffer_info->dma,
440 buffer_info->skb, next_desc);
442 if (netif_msg_pktdata(adapter) &&
444 print_hex_dump(KERN_INFO, "",
445 DUMP_PREFIX_ADDRESS, 16,
447 buffer_info->skb->data,
448 adapter->rx_buffer_len,
456 * e1000_desc_unused - calculate if we have unused descriptors
458 static int e1000_desc_unused(struct e1000_ring *ring)
460 if (ring->next_to_clean > ring->next_to_use)
461 return ring->next_to_clean - ring->next_to_use - 1;
463 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
467 * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
468 * @adapter: board private structure
469 * @hwtstamps: time stamp structure to update
470 * @systim: unsigned 64bit system time value.
472 * Convert the system time value stored in the RX/TXSTMP registers into a
473 * hwtstamp which can be used by the upper level time stamping functions.
475 * The 'systim_lock' spinlock is used to protect the consistency of the
476 * system time value. This is needed because reading the 64 bit time
477 * value involves reading two 32 bit registers. The first read latches the
480 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
481 struct skb_shared_hwtstamps *hwtstamps,
487 spin_lock_irqsave(&adapter->systim_lock, flags);
488 ns = timecounter_cyc2time(&adapter->tc, systim);
489 spin_unlock_irqrestore(&adapter->systim_lock, flags);
491 memset(hwtstamps, 0, sizeof(*hwtstamps));
492 hwtstamps->hwtstamp = ns_to_ktime(ns);
496 * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
497 * @adapter: board private structure
498 * @status: descriptor extended error and status field
499 * @skb: particular skb to include time stamp
501 * If the time stamp is valid, convert it into the timecounter ns value
502 * and store that result into the shhwtstamps structure which is passed
503 * up the network stack.
505 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
508 struct e1000_hw *hw = &adapter->hw;
511 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
512 !(status & E1000_RXDEXT_STATERR_TST) ||
513 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
516 /* The Rx time stamp registers contain the time stamp. No other
517 * received packet will be time stamped until the Rx time stamp
518 * registers are read. Because only one packet can be time stamped
519 * at a time, the register values must belong to this packet and
520 * therefore none of the other additional attributes need to be
523 rxstmp = (u64)er32(RXSTMPL);
524 rxstmp |= (u64)er32(RXSTMPH) << 32;
525 e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
527 adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
531 * e1000_receive_skb - helper function to handle Rx indications
532 * @adapter: board private structure
533 * @staterr: descriptor extended error and status field as written by hardware
534 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
535 * @skb: pointer to sk_buff to be indicated to stack
537 static void e1000_receive_skb(struct e1000_adapter *adapter,
538 struct net_device *netdev, struct sk_buff *skb,
539 u32 staterr, __le16 vlan)
541 u16 tag = le16_to_cpu(vlan);
543 e1000e_rx_hwtstamp(adapter, staterr, skb);
545 skb->protocol = eth_type_trans(skb, netdev);
547 if (staterr & E1000_RXD_STAT_VP)
548 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
550 napi_gro_receive(&adapter->napi, skb);
554 * e1000_rx_checksum - Receive Checksum Offload
555 * @adapter: board private structure
556 * @status_err: receive descriptor status and error fields
557 * @csum: receive descriptor csum field
558 * @sk_buff: socket buffer with received data
560 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
563 u16 status = (u16)status_err;
564 u8 errors = (u8)(status_err >> 24);
566 skb_checksum_none_assert(skb);
568 /* Rx checksum disabled */
569 if (!(adapter->netdev->features & NETIF_F_RXCSUM))
572 /* Ignore Checksum bit is set */
573 if (status & E1000_RXD_STAT_IXSM)
576 /* TCP/UDP checksum error bit or IP checksum error bit is set */
577 if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
578 /* let the stack verify checksum errors */
579 adapter->hw_csum_err++;
583 /* TCP/UDP Checksum has not been calculated */
584 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
587 /* It must be a TCP or UDP packet with a valid checksum */
588 skb->ip_summed = CHECKSUM_UNNECESSARY;
589 adapter->hw_csum_good++;
592 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
594 struct e1000_adapter *adapter = rx_ring->adapter;
595 struct e1000_hw *hw = &adapter->hw;
596 s32 ret_val = __ew32_prepare(hw);
598 writel(i, rx_ring->tail);
600 if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) {
601 u32 rctl = er32(RCTL);
603 ew32(RCTL, rctl & ~E1000_RCTL_EN);
604 e_err("ME firmware caused invalid RDT - resetting\n");
605 schedule_work(&adapter->reset_task);
609 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
611 struct e1000_adapter *adapter = tx_ring->adapter;
612 struct e1000_hw *hw = &adapter->hw;
613 s32 ret_val = __ew32_prepare(hw);
615 writel(i, tx_ring->tail);
617 if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) {
618 u32 tctl = er32(TCTL);
620 ew32(TCTL, tctl & ~E1000_TCTL_EN);
621 e_err("ME firmware caused invalid TDT - resetting\n");
622 schedule_work(&adapter->reset_task);
627 * e1000_alloc_rx_buffers - Replace used receive buffers
628 * @rx_ring: Rx descriptor ring
630 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
631 int cleaned_count, gfp_t gfp)
633 struct e1000_adapter *adapter = rx_ring->adapter;
634 struct net_device *netdev = adapter->netdev;
635 struct pci_dev *pdev = adapter->pdev;
636 union e1000_rx_desc_extended *rx_desc;
637 struct e1000_buffer *buffer_info;
640 unsigned int bufsz = adapter->rx_buffer_len;
642 i = rx_ring->next_to_use;
643 buffer_info = &rx_ring->buffer_info[i];
645 while (cleaned_count--) {
646 skb = buffer_info->skb;
652 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
654 /* Better luck next round */
655 adapter->alloc_rx_buff_failed++;
659 buffer_info->skb = skb;
661 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
662 adapter->rx_buffer_len,
664 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
665 dev_err(&pdev->dev, "Rx DMA map failed\n");
666 adapter->rx_dma_failed++;
670 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
671 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
673 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
674 /* Force memory writes to complete before letting h/w
675 * know there are new descriptors to fetch. (Only
676 * applicable for weak-ordered memory model archs,
680 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
681 e1000e_update_rdt_wa(rx_ring, i);
683 writel(i, rx_ring->tail);
686 if (i == rx_ring->count)
688 buffer_info = &rx_ring->buffer_info[i];
691 rx_ring->next_to_use = i;
695 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
696 * @rx_ring: Rx descriptor ring
698 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
699 int cleaned_count, gfp_t gfp)
701 struct e1000_adapter *adapter = rx_ring->adapter;
702 struct net_device *netdev = adapter->netdev;
703 struct pci_dev *pdev = adapter->pdev;
704 union e1000_rx_desc_packet_split *rx_desc;
705 struct e1000_buffer *buffer_info;
706 struct e1000_ps_page *ps_page;
710 i = rx_ring->next_to_use;
711 buffer_info = &rx_ring->buffer_info[i];
713 while (cleaned_count--) {
714 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
716 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
717 ps_page = &buffer_info->ps_pages[j];
718 if (j >= adapter->rx_ps_pages) {
719 /* all unused desc entries get hw null ptr */
720 rx_desc->read.buffer_addr[j + 1] =
724 if (!ps_page->page) {
725 ps_page->page = alloc_page(gfp);
726 if (!ps_page->page) {
727 adapter->alloc_rx_buff_failed++;
730 ps_page->dma = dma_map_page(&pdev->dev,
734 if (dma_mapping_error(&pdev->dev,
736 dev_err(&adapter->pdev->dev,
737 "Rx DMA page map failed\n");
738 adapter->rx_dma_failed++;
742 /* Refresh the desc even if buffer_addrs
743 * didn't change because each write-back
746 rx_desc->read.buffer_addr[j + 1] =
747 cpu_to_le64(ps_page->dma);
750 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
754 adapter->alloc_rx_buff_failed++;
758 buffer_info->skb = skb;
759 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
760 adapter->rx_ps_bsize0,
762 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
763 dev_err(&pdev->dev, "Rx DMA map failed\n");
764 adapter->rx_dma_failed++;
766 dev_kfree_skb_any(skb);
767 buffer_info->skb = NULL;
771 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
773 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
774 /* Force memory writes to complete before letting h/w
775 * know there are new descriptors to fetch. (Only
776 * applicable for weak-ordered memory model archs,
780 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
781 e1000e_update_rdt_wa(rx_ring, i << 1);
783 writel(i << 1, rx_ring->tail);
787 if (i == rx_ring->count)
789 buffer_info = &rx_ring->buffer_info[i];
793 rx_ring->next_to_use = i;
797 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
798 * @rx_ring: Rx descriptor ring
799 * @cleaned_count: number of buffers to allocate this pass
802 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
803 int cleaned_count, gfp_t gfp)
805 struct e1000_adapter *adapter = rx_ring->adapter;
806 struct net_device *netdev = adapter->netdev;
807 struct pci_dev *pdev = adapter->pdev;
808 union e1000_rx_desc_extended *rx_desc;
809 struct e1000_buffer *buffer_info;
812 unsigned int bufsz = 256 - 16; /* for skb_reserve */
814 i = rx_ring->next_to_use;
815 buffer_info = &rx_ring->buffer_info[i];
817 while (cleaned_count--) {
818 skb = buffer_info->skb;
824 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
825 if (unlikely(!skb)) {
826 /* Better luck next round */
827 adapter->alloc_rx_buff_failed++;
831 buffer_info->skb = skb;
833 /* allocate a new page if necessary */
834 if (!buffer_info->page) {
835 buffer_info->page = alloc_page(gfp);
836 if (unlikely(!buffer_info->page)) {
837 adapter->alloc_rx_buff_failed++;
842 if (!buffer_info->dma) {
843 buffer_info->dma = dma_map_page(&pdev->dev,
844 buffer_info->page, 0,
847 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
848 adapter->alloc_rx_buff_failed++;
853 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
854 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
856 if (unlikely(++i == rx_ring->count))
858 buffer_info = &rx_ring->buffer_info[i];
861 if (likely(rx_ring->next_to_use != i)) {
862 rx_ring->next_to_use = i;
863 if (unlikely(i-- == 0))
864 i = (rx_ring->count - 1);
866 /* Force memory writes to complete before letting h/w
867 * know there are new descriptors to fetch. (Only
868 * applicable for weak-ordered memory model archs,
872 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
873 e1000e_update_rdt_wa(rx_ring, i);
875 writel(i, rx_ring->tail);
879 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
882 if (netdev->features & NETIF_F_RXHASH)
883 skb_set_hash(skb, le32_to_cpu(rss), PKT_HASH_TYPE_L3);
887 * e1000_clean_rx_irq - Send received data up the network stack
888 * @rx_ring: Rx descriptor ring
890 * the return value indicates whether actual cleaning was done, there
891 * is no guarantee that everything was cleaned
893 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
896 struct e1000_adapter *adapter = rx_ring->adapter;
897 struct net_device *netdev = adapter->netdev;
898 struct pci_dev *pdev = adapter->pdev;
899 struct e1000_hw *hw = &adapter->hw;
900 union e1000_rx_desc_extended *rx_desc, *next_rxd;
901 struct e1000_buffer *buffer_info, *next_buffer;
904 int cleaned_count = 0;
905 bool cleaned = false;
906 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
908 i = rx_ring->next_to_clean;
909 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
910 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
911 buffer_info = &rx_ring->buffer_info[i];
913 while (staterr & E1000_RXD_STAT_DD) {
916 if (*work_done >= work_to_do)
919 rmb(); /* read descriptor and rx_buffer_info after status DD */
921 skb = buffer_info->skb;
922 buffer_info->skb = NULL;
924 prefetch(skb->data - NET_IP_ALIGN);
927 if (i == rx_ring->count)
929 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
932 next_buffer = &rx_ring->buffer_info[i];
936 dma_unmap_single(&pdev->dev, buffer_info->dma,
937 adapter->rx_buffer_len, DMA_FROM_DEVICE);
938 buffer_info->dma = 0;
940 length = le16_to_cpu(rx_desc->wb.upper.length);
942 /* !EOP means multiple descriptors were used to store a single
943 * packet, if that's the case we need to toss it. In fact, we
944 * need to toss every packet with the EOP bit clear and the
945 * next frame that _does_ have the EOP bit set, as it is by
946 * definition only a frame fragment
948 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
949 adapter->flags2 |= FLAG2_IS_DISCARDING;
951 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
952 /* All receives must fit into a single buffer */
953 e_dbg("Receive packet consumed multiple buffers\n");
955 buffer_info->skb = skb;
956 if (staterr & E1000_RXD_STAT_EOP)
957 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
961 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
962 !(netdev->features & NETIF_F_RXALL))) {
964 buffer_info->skb = skb;
968 /* adjust length to remove Ethernet CRC */
969 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
970 /* If configured to store CRC, don't subtract FCS,
971 * but keep the FCS bytes out of the total_rx_bytes
974 if (netdev->features & NETIF_F_RXFCS)
980 total_rx_bytes += length;
983 /* code added for copybreak, this should improve
984 * performance for small packets with large amounts
985 * of reassembly being done in the stack
987 if (length < copybreak) {
988 struct sk_buff *new_skb =
989 netdev_alloc_skb_ip_align(netdev, length);
991 skb_copy_to_linear_data_offset(new_skb,
997 /* save the skb in buffer_info as good */
998 buffer_info->skb = skb;
1001 /* else just continue with the old one */
1003 /* end copybreak code */
1004 skb_put(skb, length);
1006 /* Receive Checksum Offload */
1007 e1000_rx_checksum(adapter, staterr, skb);
1009 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1011 e1000_receive_skb(adapter, netdev, skb, staterr,
1012 rx_desc->wb.upper.vlan);
1015 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1017 /* return some buffers to hardware, one at a time is too slow */
1018 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1019 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1024 /* use prefetched values */
1026 buffer_info = next_buffer;
1028 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1030 rx_ring->next_to_clean = i;
1032 cleaned_count = e1000_desc_unused(rx_ring);
1034 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1036 adapter->total_rx_bytes += total_rx_bytes;
1037 adapter->total_rx_packets += total_rx_packets;
1041 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1042 struct e1000_buffer *buffer_info)
1044 struct e1000_adapter *adapter = tx_ring->adapter;
1046 if (buffer_info->dma) {
1047 if (buffer_info->mapped_as_page)
1048 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1049 buffer_info->length, DMA_TO_DEVICE);
1051 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1052 buffer_info->length, DMA_TO_DEVICE);
1053 buffer_info->dma = 0;
1055 if (buffer_info->skb) {
1056 dev_kfree_skb_any(buffer_info->skb);
1057 buffer_info->skb = NULL;
1059 buffer_info->time_stamp = 0;
1062 static void e1000_print_hw_hang(struct work_struct *work)
1064 struct e1000_adapter *adapter = container_of(work,
1065 struct e1000_adapter,
1067 struct net_device *netdev = adapter->netdev;
1068 struct e1000_ring *tx_ring = adapter->tx_ring;
1069 unsigned int i = tx_ring->next_to_clean;
1070 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1071 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1072 struct e1000_hw *hw = &adapter->hw;
1073 u16 phy_status, phy_1000t_status, phy_ext_status;
1076 if (test_bit(__E1000_DOWN, &adapter->state))
1079 if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1080 /* May be block on write-back, flush and detect again
1081 * flush pending descriptor writebacks to memory
1083 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1084 /* execute the writes immediately */
1086 /* Due to rare timing issues, write to TIDV again to ensure
1087 * the write is successful
1089 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1090 /* execute the writes immediately */
1092 adapter->tx_hang_recheck = true;
1095 adapter->tx_hang_recheck = false;
1097 if (er32(TDH(0)) == er32(TDT(0))) {
1098 e_dbg("false hang detected, ignoring\n");
1102 /* Real hang detected */
1103 netif_stop_queue(netdev);
1105 e1e_rphy(hw, MII_BMSR, &phy_status);
1106 e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1107 e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1109 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1111 /* detected Hardware unit hang */
1112 e_err("Detected Hardware Unit Hang:\n"
1115 " next_to_use <%x>\n"
1116 " next_to_clean <%x>\n"
1117 "buffer_info[next_to_clean]:\n"
1118 " time_stamp <%lx>\n"
1119 " next_to_watch <%x>\n"
1121 " next_to_watch.status <%x>\n"
1124 "PHY 1000BASE-T Status <%x>\n"
1125 "PHY Extended Status <%x>\n"
1126 "PCI Status <%x>\n",
1127 readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1128 tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1129 eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1130 phy_status, phy_1000t_status, phy_ext_status, pci_status);
1132 e1000e_dump(adapter);
1134 /* Suggest workaround for known h/w issue */
1135 if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1136 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1140 * e1000e_tx_hwtstamp_work - check for Tx time stamp
1141 * @work: pointer to work struct
1143 * This work function polls the TSYNCTXCTL valid bit to determine when a
1144 * timestamp has been taken for the current stored skb. The timestamp must
1145 * be for this skb because only one such packet is allowed in the queue.
1147 static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1149 struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1151 struct e1000_hw *hw = &adapter->hw;
1153 if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1154 struct skb_shared_hwtstamps shhwtstamps;
1157 txstmp = er32(TXSTMPL);
1158 txstmp |= (u64)er32(TXSTMPH) << 32;
1160 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1162 skb_tstamp_tx(adapter->tx_hwtstamp_skb, &shhwtstamps);
1163 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1164 adapter->tx_hwtstamp_skb = NULL;
1165 } else if (time_after(jiffies, adapter->tx_hwtstamp_start
1166 + adapter->tx_timeout_factor * HZ)) {
1167 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1168 adapter->tx_hwtstamp_skb = NULL;
1169 adapter->tx_hwtstamp_timeouts++;
1170 e_warn("clearing Tx timestamp hang\n");
1172 /* reschedule to check later */
1173 schedule_work(&adapter->tx_hwtstamp_work);
1178 * e1000_clean_tx_irq - Reclaim resources after transmit completes
1179 * @tx_ring: Tx descriptor ring
1181 * the return value indicates whether actual cleaning was done, there
1182 * is no guarantee that everything was cleaned
1184 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1186 struct e1000_adapter *adapter = tx_ring->adapter;
1187 struct net_device *netdev = adapter->netdev;
1188 struct e1000_hw *hw = &adapter->hw;
1189 struct e1000_tx_desc *tx_desc, *eop_desc;
1190 struct e1000_buffer *buffer_info;
1191 unsigned int i, eop;
1192 unsigned int count = 0;
1193 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1194 unsigned int bytes_compl = 0, pkts_compl = 0;
1196 i = tx_ring->next_to_clean;
1197 eop = tx_ring->buffer_info[i].next_to_watch;
1198 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1200 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1201 (count < tx_ring->count)) {
1202 bool cleaned = false;
1204 rmb(); /* read buffer_info after eop_desc */
1205 for (; !cleaned; count++) {
1206 tx_desc = E1000_TX_DESC(*tx_ring, i);
1207 buffer_info = &tx_ring->buffer_info[i];
1208 cleaned = (i == eop);
1211 total_tx_packets += buffer_info->segs;
1212 total_tx_bytes += buffer_info->bytecount;
1213 if (buffer_info->skb) {
1214 bytes_compl += buffer_info->skb->len;
1219 e1000_put_txbuf(tx_ring, buffer_info);
1220 tx_desc->upper.data = 0;
1223 if (i == tx_ring->count)
1227 if (i == tx_ring->next_to_use)
1229 eop = tx_ring->buffer_info[i].next_to_watch;
1230 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1233 tx_ring->next_to_clean = i;
1235 netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1237 #define TX_WAKE_THRESHOLD 32
1238 if (count && netif_carrier_ok(netdev) &&
1239 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1240 /* Make sure that anybody stopping the queue after this
1241 * sees the new next_to_clean.
1245 if (netif_queue_stopped(netdev) &&
1246 !(test_bit(__E1000_DOWN, &adapter->state))) {
1247 netif_wake_queue(netdev);
1248 ++adapter->restart_queue;
1252 if (adapter->detect_tx_hung) {
1253 /* Detect a transmit hang in hardware, this serializes the
1254 * check with the clearing of time_stamp and movement of i
1256 adapter->detect_tx_hung = false;
1257 if (tx_ring->buffer_info[i].time_stamp &&
1258 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1259 + (adapter->tx_timeout_factor * HZ)) &&
1260 !(er32(STATUS) & E1000_STATUS_TXOFF))
1261 schedule_work(&adapter->print_hang_task);
1263 adapter->tx_hang_recheck = false;
1265 adapter->total_tx_bytes += total_tx_bytes;
1266 adapter->total_tx_packets += total_tx_packets;
1267 return count < tx_ring->count;
1271 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1272 * @rx_ring: Rx descriptor ring
1274 * the return value indicates whether actual cleaning was done, there
1275 * is no guarantee that everything was cleaned
1277 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1280 struct e1000_adapter *adapter = rx_ring->adapter;
1281 struct e1000_hw *hw = &adapter->hw;
1282 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1283 struct net_device *netdev = adapter->netdev;
1284 struct pci_dev *pdev = adapter->pdev;
1285 struct e1000_buffer *buffer_info, *next_buffer;
1286 struct e1000_ps_page *ps_page;
1287 struct sk_buff *skb;
1289 u32 length, staterr;
1290 int cleaned_count = 0;
1291 bool cleaned = false;
1292 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1294 i = rx_ring->next_to_clean;
1295 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1296 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1297 buffer_info = &rx_ring->buffer_info[i];
1299 while (staterr & E1000_RXD_STAT_DD) {
1300 if (*work_done >= work_to_do)
1303 skb = buffer_info->skb;
1304 rmb(); /* read descriptor and rx_buffer_info after status DD */
1306 /* in the packet split case this is header only */
1307 prefetch(skb->data - NET_IP_ALIGN);
1310 if (i == rx_ring->count)
1312 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1315 next_buffer = &rx_ring->buffer_info[i];
1319 dma_unmap_single(&pdev->dev, buffer_info->dma,
1320 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1321 buffer_info->dma = 0;
1323 /* see !EOP comment in other Rx routine */
1324 if (!(staterr & E1000_RXD_STAT_EOP))
1325 adapter->flags2 |= FLAG2_IS_DISCARDING;
1327 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1328 e_dbg("Packet Split buffers didn't pick up the full packet\n");
1329 dev_kfree_skb_irq(skb);
1330 if (staterr & E1000_RXD_STAT_EOP)
1331 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1335 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1336 !(netdev->features & NETIF_F_RXALL))) {
1337 dev_kfree_skb_irq(skb);
1341 length = le16_to_cpu(rx_desc->wb.middle.length0);
1344 e_dbg("Last part of the packet spanning multiple descriptors\n");
1345 dev_kfree_skb_irq(skb);
1350 skb_put(skb, length);
1353 /* this looks ugly, but it seems compiler issues make
1354 * it more efficient than reusing j
1356 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1358 /* page alloc/put takes too long and effects small
1359 * packet throughput, so unsplit small packets and
1360 * save the alloc/put only valid in softirq (napi)
1361 * context to call kmap_*
1363 if (l1 && (l1 <= copybreak) &&
1364 ((length + l1) <= adapter->rx_ps_bsize0)) {
1367 ps_page = &buffer_info->ps_pages[0];
1369 /* there is no documentation about how to call
1370 * kmap_atomic, so we can't hold the mapping
1373 dma_sync_single_for_cpu(&pdev->dev,
1377 vaddr = kmap_atomic(ps_page->page);
1378 memcpy(skb_tail_pointer(skb), vaddr, l1);
1379 kunmap_atomic(vaddr);
1380 dma_sync_single_for_device(&pdev->dev,
1385 /* remove the CRC */
1386 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1387 if (!(netdev->features & NETIF_F_RXFCS))
1396 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1397 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1401 ps_page = &buffer_info->ps_pages[j];
1402 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1405 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1406 ps_page->page = NULL;
1408 skb->data_len += length;
1409 skb->truesize += PAGE_SIZE;
1412 /* strip the ethernet crc, problem is we're using pages now so
1413 * this whole operation can get a little cpu intensive
1415 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1416 if (!(netdev->features & NETIF_F_RXFCS))
1417 pskb_trim(skb, skb->len - 4);
1421 total_rx_bytes += skb->len;
1424 e1000_rx_checksum(adapter, staterr, skb);
1426 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1428 if (rx_desc->wb.upper.header_status &
1429 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1430 adapter->rx_hdr_split++;
1432 e1000_receive_skb(adapter, netdev, skb, staterr,
1433 rx_desc->wb.middle.vlan);
1436 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1437 buffer_info->skb = NULL;
1439 /* return some buffers to hardware, one at a time is too slow */
1440 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1441 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1446 /* use prefetched values */
1448 buffer_info = next_buffer;
1450 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1452 rx_ring->next_to_clean = i;
1454 cleaned_count = e1000_desc_unused(rx_ring);
1456 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1458 adapter->total_rx_bytes += total_rx_bytes;
1459 adapter->total_rx_packets += total_rx_packets;
1464 * e1000_consume_page - helper function
1466 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1471 skb->data_len += length;
1472 skb->truesize += PAGE_SIZE;
1476 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1477 * @adapter: board private structure
1479 * the return value indicates whether actual cleaning was done, there
1480 * is no guarantee that everything was cleaned
1482 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1485 struct e1000_adapter *adapter = rx_ring->adapter;
1486 struct net_device *netdev = adapter->netdev;
1487 struct pci_dev *pdev = adapter->pdev;
1488 union e1000_rx_desc_extended *rx_desc, *next_rxd;
1489 struct e1000_buffer *buffer_info, *next_buffer;
1490 u32 length, staterr;
1492 int cleaned_count = 0;
1493 bool cleaned = false;
1494 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1495 struct skb_shared_info *shinfo;
1497 i = rx_ring->next_to_clean;
1498 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1499 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1500 buffer_info = &rx_ring->buffer_info[i];
1502 while (staterr & E1000_RXD_STAT_DD) {
1503 struct sk_buff *skb;
1505 if (*work_done >= work_to_do)
1508 rmb(); /* read descriptor and rx_buffer_info after status DD */
1510 skb = buffer_info->skb;
1511 buffer_info->skb = NULL;
1514 if (i == rx_ring->count)
1516 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1519 next_buffer = &rx_ring->buffer_info[i];
1523 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1525 buffer_info->dma = 0;
1527 length = le16_to_cpu(rx_desc->wb.upper.length);
1529 /* errors is only valid for DD + EOP descriptors */
1530 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1531 ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1532 !(netdev->features & NETIF_F_RXALL)))) {
1533 /* recycle both page and skb */
1534 buffer_info->skb = skb;
1535 /* an error means any chain goes out the window too */
1536 if (rx_ring->rx_skb_top)
1537 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1538 rx_ring->rx_skb_top = NULL;
1541 #define rxtop (rx_ring->rx_skb_top)
1542 if (!(staterr & E1000_RXD_STAT_EOP)) {
1543 /* this descriptor is only the beginning (or middle) */
1545 /* this is the beginning of a chain */
1547 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1550 /* this is the middle of a chain */
1551 shinfo = skb_shinfo(rxtop);
1552 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1553 buffer_info->page, 0,
1555 /* re-use the skb, only consumed the page */
1556 buffer_info->skb = skb;
1558 e1000_consume_page(buffer_info, rxtop, length);
1562 /* end of the chain */
1563 shinfo = skb_shinfo(rxtop);
1564 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1565 buffer_info->page, 0,
1567 /* re-use the current skb, we only consumed the
1570 buffer_info->skb = skb;
1573 e1000_consume_page(buffer_info, skb, length);
1575 /* no chain, got EOP, this buf is the packet
1576 * copybreak to save the put_page/alloc_page
1578 if (length <= copybreak &&
1579 skb_tailroom(skb) >= length) {
1581 vaddr = kmap_atomic(buffer_info->page);
1582 memcpy(skb_tail_pointer(skb), vaddr,
1584 kunmap_atomic(vaddr);
1585 /* re-use the page, so don't erase
1588 skb_put(skb, length);
1590 skb_fill_page_desc(skb, 0,
1591 buffer_info->page, 0,
1593 e1000_consume_page(buffer_info, skb,
1599 /* Receive Checksum Offload */
1600 e1000_rx_checksum(adapter, staterr, skb);
1602 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1604 /* probably a little skewed due to removing CRC */
1605 total_rx_bytes += skb->len;
1608 /* eth type trans needs skb->data to point to something */
1609 if (!pskb_may_pull(skb, ETH_HLEN)) {
1610 e_err("pskb_may_pull failed.\n");
1611 dev_kfree_skb_irq(skb);
1615 e1000_receive_skb(adapter, netdev, skb, staterr,
1616 rx_desc->wb.upper.vlan);
1619 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1621 /* return some buffers to hardware, one at a time is too slow */
1622 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1623 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1628 /* use prefetched values */
1630 buffer_info = next_buffer;
1632 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1634 rx_ring->next_to_clean = i;
1636 cleaned_count = e1000_desc_unused(rx_ring);
1638 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1640 adapter->total_rx_bytes += total_rx_bytes;
1641 adapter->total_rx_packets += total_rx_packets;
1646 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1647 * @rx_ring: Rx descriptor ring
1649 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1651 struct e1000_adapter *adapter = rx_ring->adapter;
1652 struct e1000_buffer *buffer_info;
1653 struct e1000_ps_page *ps_page;
1654 struct pci_dev *pdev = adapter->pdev;
1657 /* Free all the Rx ring sk_buffs */
1658 for (i = 0; i < rx_ring->count; i++) {
1659 buffer_info = &rx_ring->buffer_info[i];
1660 if (buffer_info->dma) {
1661 if (adapter->clean_rx == e1000_clean_rx_irq)
1662 dma_unmap_single(&pdev->dev, buffer_info->dma,
1663 adapter->rx_buffer_len,
1665 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1666 dma_unmap_page(&pdev->dev, buffer_info->dma,
1667 PAGE_SIZE, DMA_FROM_DEVICE);
1668 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1669 dma_unmap_single(&pdev->dev, buffer_info->dma,
1670 adapter->rx_ps_bsize0,
1672 buffer_info->dma = 0;
1675 if (buffer_info->page) {
1676 put_page(buffer_info->page);
1677 buffer_info->page = NULL;
1680 if (buffer_info->skb) {
1681 dev_kfree_skb(buffer_info->skb);
1682 buffer_info->skb = NULL;
1685 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1686 ps_page = &buffer_info->ps_pages[j];
1689 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1692 put_page(ps_page->page);
1693 ps_page->page = NULL;
1697 /* there also may be some cached data from a chained receive */
1698 if (rx_ring->rx_skb_top) {
1699 dev_kfree_skb(rx_ring->rx_skb_top);
1700 rx_ring->rx_skb_top = NULL;
1703 /* Zero out the descriptor ring */
1704 memset(rx_ring->desc, 0, rx_ring->size);
1706 rx_ring->next_to_clean = 0;
1707 rx_ring->next_to_use = 0;
1708 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1710 writel(0, rx_ring->head);
1711 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
1712 e1000e_update_rdt_wa(rx_ring, 0);
1714 writel(0, rx_ring->tail);
1717 static void e1000e_downshift_workaround(struct work_struct *work)
1719 struct e1000_adapter *adapter = container_of(work,
1720 struct e1000_adapter,
1723 if (test_bit(__E1000_DOWN, &adapter->state))
1726 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1730 * e1000_intr_msi - Interrupt Handler
1731 * @irq: interrupt number
1732 * @data: pointer to a network interface device structure
1734 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1736 struct net_device *netdev = data;
1737 struct e1000_adapter *adapter = netdev_priv(netdev);
1738 struct e1000_hw *hw = &adapter->hw;
1739 u32 icr = er32(ICR);
1741 /* read ICR disables interrupts using IAM */
1742 if (icr & E1000_ICR_LSC) {
1743 hw->mac.get_link_status = true;
1744 /* ICH8 workaround-- Call gig speed drop workaround on cable
1745 * disconnect (LSC) before accessing any PHY registers
1747 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1748 (!(er32(STATUS) & E1000_STATUS_LU)))
1749 schedule_work(&adapter->downshift_task);
1751 /* 80003ES2LAN workaround-- For packet buffer work-around on
1752 * link down event; disable receives here in the ISR and reset
1753 * adapter in watchdog
1755 if (netif_carrier_ok(netdev) &&
1756 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1757 /* disable receives */
1758 u32 rctl = er32(RCTL);
1760 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1761 adapter->flags |= FLAG_RESTART_NOW;
1763 /* guard against interrupt when we're going down */
1764 if (!test_bit(__E1000_DOWN, &adapter->state))
1765 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1768 /* Reset on uncorrectable ECC error */
1769 if ((icr & E1000_ICR_ECCER) && (hw->mac.type == e1000_pch_lpt)) {
1770 u32 pbeccsts = er32(PBECCSTS);
1772 adapter->corr_errors +=
1773 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1774 adapter->uncorr_errors +=
1775 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1776 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1778 /* Do the reset outside of interrupt context */
1779 schedule_work(&adapter->reset_task);
1781 /* return immediately since reset is imminent */
1785 if (napi_schedule_prep(&adapter->napi)) {
1786 adapter->total_tx_bytes = 0;
1787 adapter->total_tx_packets = 0;
1788 adapter->total_rx_bytes = 0;
1789 adapter->total_rx_packets = 0;
1790 __napi_schedule(&adapter->napi);
1797 * e1000_intr - Interrupt Handler
1798 * @irq: interrupt number
1799 * @data: pointer to a network interface device structure
1801 static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1803 struct net_device *netdev = data;
1804 struct e1000_adapter *adapter = netdev_priv(netdev);
1805 struct e1000_hw *hw = &adapter->hw;
1806 u32 rctl, icr = er32(ICR);
1808 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1809 return IRQ_NONE; /* Not our interrupt */
1811 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1812 * not set, then the adapter didn't send an interrupt
1814 if (!(icr & E1000_ICR_INT_ASSERTED))
1817 /* Interrupt Auto-Mask...upon reading ICR,
1818 * interrupts are masked. No need for the
1822 if (icr & E1000_ICR_LSC) {
1823 hw->mac.get_link_status = true;
1824 /* ICH8 workaround-- Call gig speed drop workaround on cable
1825 * disconnect (LSC) before accessing any PHY registers
1827 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1828 (!(er32(STATUS) & E1000_STATUS_LU)))
1829 schedule_work(&adapter->downshift_task);
1831 /* 80003ES2LAN workaround--
1832 * For packet buffer work-around on link down event;
1833 * disable receives here in the ISR and
1834 * reset adapter in watchdog
1836 if (netif_carrier_ok(netdev) &&
1837 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1838 /* disable receives */
1840 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1841 adapter->flags |= FLAG_RESTART_NOW;
1843 /* guard against interrupt when we're going down */
1844 if (!test_bit(__E1000_DOWN, &adapter->state))
1845 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1848 /* Reset on uncorrectable ECC error */
1849 if ((icr & E1000_ICR_ECCER) && (hw->mac.type == e1000_pch_lpt)) {
1850 u32 pbeccsts = er32(PBECCSTS);
1852 adapter->corr_errors +=
1853 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1854 adapter->uncorr_errors +=
1855 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1856 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1858 /* Do the reset outside of interrupt context */
1859 schedule_work(&adapter->reset_task);
1861 /* return immediately since reset is imminent */
1865 if (napi_schedule_prep(&adapter->napi)) {
1866 adapter->total_tx_bytes = 0;
1867 adapter->total_tx_packets = 0;
1868 adapter->total_rx_bytes = 0;
1869 adapter->total_rx_packets = 0;
1870 __napi_schedule(&adapter->napi);
1876 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1878 struct net_device *netdev = data;
1879 struct e1000_adapter *adapter = netdev_priv(netdev);
1880 struct e1000_hw *hw = &adapter->hw;
1881 u32 icr = er32(ICR);
1883 if (!(icr & E1000_ICR_INT_ASSERTED)) {
1884 if (!test_bit(__E1000_DOWN, &adapter->state))
1885 ew32(IMS, E1000_IMS_OTHER);
1889 if (icr & adapter->eiac_mask)
1890 ew32(ICS, (icr & adapter->eiac_mask));
1892 if (icr & E1000_ICR_OTHER) {
1893 if (!(icr & E1000_ICR_LSC))
1894 goto no_link_interrupt;
1895 hw->mac.get_link_status = true;
1896 /* guard against interrupt when we're going down */
1897 if (!test_bit(__E1000_DOWN, &adapter->state))
1898 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1902 if (!test_bit(__E1000_DOWN, &adapter->state))
1903 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
1908 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1910 struct net_device *netdev = data;
1911 struct e1000_adapter *adapter = netdev_priv(netdev);
1912 struct e1000_hw *hw = &adapter->hw;
1913 struct e1000_ring *tx_ring = adapter->tx_ring;
1915 adapter->total_tx_bytes = 0;
1916 adapter->total_tx_packets = 0;
1918 if (!e1000_clean_tx_irq(tx_ring))
1919 /* Ring was not completely cleaned, so fire another interrupt */
1920 ew32(ICS, tx_ring->ims_val);
1925 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1927 struct net_device *netdev = data;
1928 struct e1000_adapter *adapter = netdev_priv(netdev);
1929 struct e1000_ring *rx_ring = adapter->rx_ring;
1931 /* Write the ITR value calculated at the end of the
1932 * previous interrupt.
1934 if (rx_ring->set_itr) {
1935 writel(1000000000 / (rx_ring->itr_val * 256),
1936 rx_ring->itr_register);
1937 rx_ring->set_itr = 0;
1940 if (napi_schedule_prep(&adapter->napi)) {
1941 adapter->total_rx_bytes = 0;
1942 adapter->total_rx_packets = 0;
1943 __napi_schedule(&adapter->napi);
1949 * e1000_configure_msix - Configure MSI-X hardware
1951 * e1000_configure_msix sets up the hardware to properly
1952 * generate MSI-X interrupts.
1954 static void e1000_configure_msix(struct e1000_adapter *adapter)
1956 struct e1000_hw *hw = &adapter->hw;
1957 struct e1000_ring *rx_ring = adapter->rx_ring;
1958 struct e1000_ring *tx_ring = adapter->tx_ring;
1960 u32 ctrl_ext, ivar = 0;
1962 adapter->eiac_mask = 0;
1964 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1965 if (hw->mac.type == e1000_82574) {
1966 u32 rfctl = er32(RFCTL);
1968 rfctl |= E1000_RFCTL_ACK_DIS;
1972 /* Configure Rx vector */
1973 rx_ring->ims_val = E1000_IMS_RXQ0;
1974 adapter->eiac_mask |= rx_ring->ims_val;
1975 if (rx_ring->itr_val)
1976 writel(1000000000 / (rx_ring->itr_val * 256),
1977 rx_ring->itr_register);
1979 writel(1, rx_ring->itr_register);
1980 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1982 /* Configure Tx vector */
1983 tx_ring->ims_val = E1000_IMS_TXQ0;
1985 if (tx_ring->itr_val)
1986 writel(1000000000 / (tx_ring->itr_val * 256),
1987 tx_ring->itr_register);
1989 writel(1, tx_ring->itr_register);
1990 adapter->eiac_mask |= tx_ring->ims_val;
1991 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1993 /* set vector for Other Causes, e.g. link changes */
1995 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1996 if (rx_ring->itr_val)
1997 writel(1000000000 / (rx_ring->itr_val * 256),
1998 hw->hw_addr + E1000_EITR_82574(vector));
2000 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
2002 /* Cause Tx interrupts on every write back */
2007 /* enable MSI-X PBA support */
2008 ctrl_ext = er32(CTRL_EXT);
2009 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
2011 /* Auto-Mask Other interrupts upon ICR read */
2012 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
2013 ctrl_ext |= E1000_CTRL_EXT_EIAME;
2014 ew32(CTRL_EXT, ctrl_ext);
2018 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2020 if (adapter->msix_entries) {
2021 pci_disable_msix(adapter->pdev);
2022 kfree(adapter->msix_entries);
2023 adapter->msix_entries = NULL;
2024 } else if (adapter->flags & FLAG_MSI_ENABLED) {
2025 pci_disable_msi(adapter->pdev);
2026 adapter->flags &= ~FLAG_MSI_ENABLED;
2031 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2033 * Attempt to configure interrupts using the best available
2034 * capabilities of the hardware and kernel.
2036 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2041 switch (adapter->int_mode) {
2042 case E1000E_INT_MODE_MSIX:
2043 if (adapter->flags & FLAG_HAS_MSIX) {
2044 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2045 adapter->msix_entries = kcalloc(adapter->num_vectors,
2049 if (adapter->msix_entries) {
2050 struct e1000_adapter *a = adapter;
2052 for (i = 0; i < adapter->num_vectors; i++)
2053 adapter->msix_entries[i].entry = i;
2055 err = pci_enable_msix_range(a->pdev,
2062 /* MSI-X failed, so fall through and try MSI */
2063 e_err("Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.\n");
2064 e1000e_reset_interrupt_capability(adapter);
2066 adapter->int_mode = E1000E_INT_MODE_MSI;
2068 case E1000E_INT_MODE_MSI:
2069 if (!pci_enable_msi(adapter->pdev)) {
2070 adapter->flags |= FLAG_MSI_ENABLED;
2072 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2073 e_err("Failed to initialize MSI interrupts. Falling back to legacy interrupts.\n");
2076 case E1000E_INT_MODE_LEGACY:
2077 /* Don't do anything; this is the system default */
2081 /* store the number of vectors being used */
2082 adapter->num_vectors = 1;
2086 * e1000_request_msix - Initialize MSI-X interrupts
2088 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2091 static int e1000_request_msix(struct e1000_adapter *adapter)
2093 struct net_device *netdev = adapter->netdev;
2094 int err = 0, vector = 0;
2096 if (strlen(netdev->name) < (IFNAMSIZ - 5))
2097 snprintf(adapter->rx_ring->name,
2098 sizeof(adapter->rx_ring->name) - 1,
2099 "%s-rx-0", netdev->name);
2101 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2102 err = request_irq(adapter->msix_entries[vector].vector,
2103 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2107 adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2108 E1000_EITR_82574(vector);
2109 adapter->rx_ring->itr_val = adapter->itr;
2112 if (strlen(netdev->name) < (IFNAMSIZ - 5))
2113 snprintf(adapter->tx_ring->name,
2114 sizeof(adapter->tx_ring->name) - 1,
2115 "%s-tx-0", netdev->name);
2117 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2118 err = request_irq(adapter->msix_entries[vector].vector,
2119 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2123 adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2124 E1000_EITR_82574(vector);
2125 adapter->tx_ring->itr_val = adapter->itr;
2128 err = request_irq(adapter->msix_entries[vector].vector,
2129 e1000_msix_other, 0, netdev->name, netdev);
2133 e1000_configure_msix(adapter);
2139 * e1000_request_irq - initialize interrupts
2141 * Attempts to configure interrupts using the best available
2142 * capabilities of the hardware and kernel.
2144 static int e1000_request_irq(struct e1000_adapter *adapter)
2146 struct net_device *netdev = adapter->netdev;
2149 if (adapter->msix_entries) {
2150 err = e1000_request_msix(adapter);
2153 /* fall back to MSI */
2154 e1000e_reset_interrupt_capability(adapter);
2155 adapter->int_mode = E1000E_INT_MODE_MSI;
2156 e1000e_set_interrupt_capability(adapter);
2158 if (adapter->flags & FLAG_MSI_ENABLED) {
2159 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2160 netdev->name, netdev);
2164 /* fall back to legacy interrupt */
2165 e1000e_reset_interrupt_capability(adapter);
2166 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2169 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2170 netdev->name, netdev);
2172 e_err("Unable to allocate interrupt, Error: %d\n", err);
2177 static void e1000_free_irq(struct e1000_adapter *adapter)
2179 struct net_device *netdev = adapter->netdev;
2181 if (adapter->msix_entries) {
2184 free_irq(adapter->msix_entries[vector].vector, netdev);
2187 free_irq(adapter->msix_entries[vector].vector, netdev);
2190 /* Other Causes interrupt vector */
2191 free_irq(adapter->msix_entries[vector].vector, netdev);
2195 free_irq(adapter->pdev->irq, netdev);
2199 * e1000_irq_disable - Mask off interrupt generation on the NIC
2201 static void e1000_irq_disable(struct e1000_adapter *adapter)
2203 struct e1000_hw *hw = &adapter->hw;
2206 if (adapter->msix_entries)
2207 ew32(EIAC_82574, 0);
2210 if (adapter->msix_entries) {
2213 for (i = 0; i < adapter->num_vectors; i++)
2214 synchronize_irq(adapter->msix_entries[i].vector);
2216 synchronize_irq(adapter->pdev->irq);
2221 * e1000_irq_enable - Enable default interrupt generation settings
2223 static void e1000_irq_enable(struct e1000_adapter *adapter)
2225 struct e1000_hw *hw = &adapter->hw;
2227 if (adapter->msix_entries) {
2228 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2229 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
2230 } else if (hw->mac.type == e1000_pch_lpt) {
2231 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2233 ew32(IMS, IMS_ENABLE_MASK);
2239 * e1000e_get_hw_control - get control of the h/w from f/w
2240 * @adapter: address of board private structure
2242 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2243 * For ASF and Pass Through versions of f/w this means that
2244 * the driver is loaded. For AMT version (only with 82573)
2245 * of the f/w this means that the network i/f is open.
2247 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2249 struct e1000_hw *hw = &adapter->hw;
2253 /* Let firmware know the driver has taken over */
2254 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2256 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2257 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2258 ctrl_ext = er32(CTRL_EXT);
2259 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2264 * e1000e_release_hw_control - release control of the h/w to f/w
2265 * @adapter: address of board private structure
2267 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2268 * For ASF and Pass Through versions of f/w this means that the
2269 * driver is no longer loaded. For AMT version (only with 82573) i
2270 * of the f/w this means that the network i/f is closed.
2273 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2275 struct e1000_hw *hw = &adapter->hw;
2279 /* Let firmware taken over control of h/w */
2280 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2282 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2283 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2284 ctrl_ext = er32(CTRL_EXT);
2285 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2290 * e1000_alloc_ring_dma - allocate memory for a ring structure
2292 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2293 struct e1000_ring *ring)
2295 struct pci_dev *pdev = adapter->pdev;
2297 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2306 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2307 * @tx_ring: Tx descriptor ring
2309 * Return 0 on success, negative on failure
2311 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2313 struct e1000_adapter *adapter = tx_ring->adapter;
2314 int err = -ENOMEM, size;
2316 size = sizeof(struct e1000_buffer) * tx_ring->count;
2317 tx_ring->buffer_info = vzalloc(size);
2318 if (!tx_ring->buffer_info)
2321 /* round up to nearest 4K */
2322 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2323 tx_ring->size = ALIGN(tx_ring->size, 4096);
2325 err = e1000_alloc_ring_dma(adapter, tx_ring);
2329 tx_ring->next_to_use = 0;
2330 tx_ring->next_to_clean = 0;
2334 vfree(tx_ring->buffer_info);
2335 e_err("Unable to allocate memory for the transmit descriptor ring\n");
2340 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2341 * @rx_ring: Rx descriptor ring
2343 * Returns 0 on success, negative on failure
2345 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2347 struct e1000_adapter *adapter = rx_ring->adapter;
2348 struct e1000_buffer *buffer_info;
2349 int i, size, desc_len, err = -ENOMEM;
2351 size = sizeof(struct e1000_buffer) * rx_ring->count;
2352 rx_ring->buffer_info = vzalloc(size);
2353 if (!rx_ring->buffer_info)
2356 for (i = 0; i < rx_ring->count; i++) {
2357 buffer_info = &rx_ring->buffer_info[i];
2358 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2359 sizeof(struct e1000_ps_page),
2361 if (!buffer_info->ps_pages)
2365 desc_len = sizeof(union e1000_rx_desc_packet_split);
2367 /* Round up to nearest 4K */
2368 rx_ring->size = rx_ring->count * desc_len;
2369 rx_ring->size = ALIGN(rx_ring->size, 4096);
2371 err = e1000_alloc_ring_dma(adapter, rx_ring);
2375 rx_ring->next_to_clean = 0;
2376 rx_ring->next_to_use = 0;
2377 rx_ring->rx_skb_top = NULL;
2382 for (i = 0; i < rx_ring->count; i++) {
2383 buffer_info = &rx_ring->buffer_info[i];
2384 kfree(buffer_info->ps_pages);
2387 vfree(rx_ring->buffer_info);
2388 e_err("Unable to allocate memory for the receive descriptor ring\n");
2393 * e1000_clean_tx_ring - Free Tx Buffers
2394 * @tx_ring: Tx descriptor ring
2396 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2398 struct e1000_adapter *adapter = tx_ring->adapter;
2399 struct e1000_buffer *buffer_info;
2403 for (i = 0; i < tx_ring->count; i++) {
2404 buffer_info = &tx_ring->buffer_info[i];
2405 e1000_put_txbuf(tx_ring, buffer_info);
2408 netdev_reset_queue(adapter->netdev);
2409 size = sizeof(struct e1000_buffer) * tx_ring->count;
2410 memset(tx_ring->buffer_info, 0, size);
2412 memset(tx_ring->desc, 0, tx_ring->size);
2414 tx_ring->next_to_use = 0;
2415 tx_ring->next_to_clean = 0;
2417 writel(0, tx_ring->head);
2418 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2419 e1000e_update_tdt_wa(tx_ring, 0);
2421 writel(0, tx_ring->tail);
2425 * e1000e_free_tx_resources - Free Tx Resources per Queue
2426 * @tx_ring: Tx descriptor ring
2428 * Free all transmit software resources
2430 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2432 struct e1000_adapter *adapter = tx_ring->adapter;
2433 struct pci_dev *pdev = adapter->pdev;
2435 e1000_clean_tx_ring(tx_ring);
2437 vfree(tx_ring->buffer_info);
2438 tx_ring->buffer_info = NULL;
2440 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2442 tx_ring->desc = NULL;
2446 * e1000e_free_rx_resources - Free Rx Resources
2447 * @rx_ring: Rx descriptor ring
2449 * Free all receive software resources
2451 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2453 struct e1000_adapter *adapter = rx_ring->adapter;
2454 struct pci_dev *pdev = adapter->pdev;
2457 e1000_clean_rx_ring(rx_ring);
2459 for (i = 0; i < rx_ring->count; i++)
2460 kfree(rx_ring->buffer_info[i].ps_pages);
2462 vfree(rx_ring->buffer_info);
2463 rx_ring->buffer_info = NULL;
2465 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2467 rx_ring->desc = NULL;
2471 * e1000_update_itr - update the dynamic ITR value based on statistics
2472 * @adapter: pointer to adapter
2473 * @itr_setting: current adapter->itr
2474 * @packets: the number of packets during this measurement interval
2475 * @bytes: the number of bytes during this measurement interval
2477 * Stores a new ITR value based on packets and byte
2478 * counts during the last interrupt. The advantage of per interrupt
2479 * computation is faster updates and more accurate ITR for the current
2480 * traffic pattern. Constants in this function were computed
2481 * based on theoretical maximum wire speed and thresholds were set based
2482 * on testing data as well as attempting to minimize response time
2483 * while increasing bulk throughput. This functionality is controlled
2484 * by the InterruptThrottleRate module parameter.
2486 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2488 unsigned int retval = itr_setting;
2493 switch (itr_setting) {
2494 case lowest_latency:
2495 /* handle TSO and jumbo frames */
2496 if (bytes / packets > 8000)
2497 retval = bulk_latency;
2498 else if ((packets < 5) && (bytes > 512))
2499 retval = low_latency;
2501 case low_latency: /* 50 usec aka 20000 ints/s */
2502 if (bytes > 10000) {
2503 /* this if handles the TSO accounting */
2504 if (bytes / packets > 8000)
2505 retval = bulk_latency;
2506 else if ((packets < 10) || ((bytes / packets) > 1200))
2507 retval = bulk_latency;
2508 else if ((packets > 35))
2509 retval = lowest_latency;
2510 } else if (bytes / packets > 2000) {
2511 retval = bulk_latency;
2512 } else if (packets <= 2 && bytes < 512) {
2513 retval = lowest_latency;
2516 case bulk_latency: /* 250 usec aka 4000 ints/s */
2517 if (bytes > 25000) {
2519 retval = low_latency;
2520 } else if (bytes < 6000) {
2521 retval = low_latency;
2529 static void e1000_set_itr(struct e1000_adapter *adapter)
2532 u32 new_itr = adapter->itr;
2534 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2535 if (adapter->link_speed != SPEED_1000) {
2541 if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2546 adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2547 adapter->total_tx_packets,
2548 adapter->total_tx_bytes);
2549 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2550 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2551 adapter->tx_itr = low_latency;
2553 adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2554 adapter->total_rx_packets,
2555 adapter->total_rx_bytes);
2556 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2557 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2558 adapter->rx_itr = low_latency;
2560 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2562 /* counts and packets in update_itr are dependent on these numbers */
2563 switch (current_itr) {
2564 case lowest_latency:
2568 new_itr = 20000; /* aka hwitr = ~200 */
2578 if (new_itr != adapter->itr) {
2579 /* this attempts to bias the interrupt rate towards Bulk
2580 * by adding intermediate steps when interrupt rate is
2583 new_itr = new_itr > adapter->itr ?
2584 min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2585 adapter->itr = new_itr;
2586 adapter->rx_ring->itr_val = new_itr;
2587 if (adapter->msix_entries)
2588 adapter->rx_ring->set_itr = 1;
2590 e1000e_write_itr(adapter, new_itr);
2595 * e1000e_write_itr - write the ITR value to the appropriate registers
2596 * @adapter: address of board private structure
2597 * @itr: new ITR value to program
2599 * e1000e_write_itr determines if the adapter is in MSI-X mode
2600 * and, if so, writes the EITR registers with the ITR value.
2601 * Otherwise, it writes the ITR value into the ITR register.
2603 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2605 struct e1000_hw *hw = &adapter->hw;
2606 u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2608 if (adapter->msix_entries) {
2611 for (vector = 0; vector < adapter->num_vectors; vector++)
2612 writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2619 * e1000_alloc_queues - Allocate memory for all rings
2620 * @adapter: board private structure to initialize
2622 static int e1000_alloc_queues(struct e1000_adapter *adapter)
2624 int size = sizeof(struct e1000_ring);
2626 adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2627 if (!adapter->tx_ring)
2629 adapter->tx_ring->count = adapter->tx_ring_count;
2630 adapter->tx_ring->adapter = adapter;
2632 adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2633 if (!adapter->rx_ring)
2635 adapter->rx_ring->count = adapter->rx_ring_count;
2636 adapter->rx_ring->adapter = adapter;
2640 e_err("Unable to allocate memory for queues\n");
2641 kfree(adapter->rx_ring);
2642 kfree(adapter->tx_ring);
2647 * e1000e_poll - NAPI Rx polling callback
2648 * @napi: struct associated with this polling callback
2649 * @weight: number of packets driver is allowed to process this poll
2651 static int e1000e_poll(struct napi_struct *napi, int weight)
2653 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2655 struct e1000_hw *hw = &adapter->hw;
2656 struct net_device *poll_dev = adapter->netdev;
2657 int tx_cleaned = 1, work_done = 0;
2659 adapter = netdev_priv(poll_dev);
2661 if (!adapter->msix_entries ||
2662 (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2663 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2665 adapter->clean_rx(adapter->rx_ring, &work_done, weight);
2670 /* If weight not fully consumed, exit the polling mode */
2671 if (work_done < weight) {
2672 if (adapter->itr_setting & 3)
2673 e1000_set_itr(adapter);
2674 napi_complete(napi);
2675 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2676 if (adapter->msix_entries)
2677 ew32(IMS, adapter->rx_ring->ims_val);
2679 e1000_irq_enable(adapter);
2686 static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2687 __always_unused __be16 proto, u16 vid)
2689 struct e1000_adapter *adapter = netdev_priv(netdev);
2690 struct e1000_hw *hw = &adapter->hw;
2693 /* don't update vlan cookie if already programmed */
2694 if ((adapter->hw.mng_cookie.status &
2695 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2696 (vid == adapter->mng_vlan_id))
2699 /* add VID to filter table */
2700 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2701 index = (vid >> 5) & 0x7F;
2702 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2703 vfta |= (1 << (vid & 0x1F));
2704 hw->mac.ops.write_vfta(hw, index, vfta);
2707 set_bit(vid, adapter->active_vlans);
2712 static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2713 __always_unused __be16 proto, u16 vid)
2715 struct e1000_adapter *adapter = netdev_priv(netdev);
2716 struct e1000_hw *hw = &adapter->hw;
2719 if ((adapter->hw.mng_cookie.status &
2720 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2721 (vid == adapter->mng_vlan_id)) {
2722 /* release control to f/w */
2723 e1000e_release_hw_control(adapter);
2727 /* remove VID from filter table */
2728 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2729 index = (vid >> 5) & 0x7F;
2730 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2731 vfta &= ~(1 << (vid & 0x1F));
2732 hw->mac.ops.write_vfta(hw, index, vfta);
2735 clear_bit(vid, adapter->active_vlans);
2741 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2742 * @adapter: board private structure to initialize
2744 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2746 struct net_device *netdev = adapter->netdev;
2747 struct e1000_hw *hw = &adapter->hw;
2750 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2751 /* disable VLAN receive filtering */
2753 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2756 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2757 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2758 adapter->mng_vlan_id);
2759 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2765 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2766 * @adapter: board private structure to initialize
2768 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2770 struct e1000_hw *hw = &adapter->hw;
2773 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2774 /* enable VLAN receive filtering */
2776 rctl |= E1000_RCTL_VFE;
2777 rctl &= ~E1000_RCTL_CFIEN;
2783 * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping
2784 * @adapter: board private structure to initialize
2786 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2788 struct e1000_hw *hw = &adapter->hw;
2791 /* disable VLAN tag insert/strip */
2793 ctrl &= ~E1000_CTRL_VME;
2798 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2799 * @adapter: board private structure to initialize
2801 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2803 struct e1000_hw *hw = &adapter->hw;
2806 /* enable VLAN tag insert/strip */
2808 ctrl |= E1000_CTRL_VME;
2812 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2814 struct net_device *netdev = adapter->netdev;
2815 u16 vid = adapter->hw.mng_cookie.vlan_id;
2816 u16 old_vid = adapter->mng_vlan_id;
2818 if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2819 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2820 adapter->mng_vlan_id = vid;
2823 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2824 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2827 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2831 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2833 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2834 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2837 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2839 struct e1000_hw *hw = &adapter->hw;
2840 u32 manc, manc2h, mdef, i, j;
2842 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2847 /* enable receiving management packets to the host. this will probably
2848 * generate destination unreachable messages from the host OS, but
2849 * the packets will be handled on SMBUS
2851 manc |= E1000_MANC_EN_MNG2HOST;
2852 manc2h = er32(MANC2H);
2854 switch (hw->mac.type) {
2856 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2860 /* Check if IPMI pass-through decision filter already exists;
2863 for (i = 0, j = 0; i < 8; i++) {
2864 mdef = er32(MDEF(i));
2866 /* Ignore filters with anything other than IPMI ports */
2867 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2870 /* Enable this decision filter in MANC2H */
2877 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2880 /* Create new decision filter in an empty filter */
2881 for (i = 0, j = 0; i < 8; i++)
2882 if (er32(MDEF(i)) == 0) {
2883 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2884 E1000_MDEF_PORT_664));
2891 e_warn("Unable to create IPMI pass-through filter\n");
2895 ew32(MANC2H, manc2h);
2900 * e1000_configure_tx - Configure Transmit Unit after Reset
2901 * @adapter: board private structure
2903 * Configure the Tx unit of the MAC after a reset.
2905 static void e1000_configure_tx(struct e1000_adapter *adapter)
2907 struct e1000_hw *hw = &adapter->hw;
2908 struct e1000_ring *tx_ring = adapter->tx_ring;
2910 u32 tdlen, tctl, tarc;
2912 /* Setup the HW Tx Head and Tail descriptor pointers */
2913 tdba = tx_ring->dma;
2914 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2915 ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2916 ew32(TDBAH(0), (tdba >> 32));
2917 ew32(TDLEN(0), tdlen);
2920 tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2921 tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2923 /* Set the Tx Interrupt Delay register */
2924 ew32(TIDV, adapter->tx_int_delay);
2925 /* Tx irq moderation */
2926 ew32(TADV, adapter->tx_abs_int_delay);
2928 if (adapter->flags2 & FLAG2_DMA_BURST) {
2929 u32 txdctl = er32(TXDCTL(0));
2931 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2932 E1000_TXDCTL_WTHRESH);
2933 /* set up some performance related parameters to encourage the
2934 * hardware to use the bus more efficiently in bursts, depends
2935 * on the tx_int_delay to be enabled,
2936 * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2937 * hthresh = 1 ==> prefetch when one or more available
2938 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2939 * BEWARE: this seems to work but should be considered first if
2940 * there are Tx hangs or other Tx related bugs
2942 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2943 ew32(TXDCTL(0), txdctl);
2945 /* erratum work around: set txdctl the same for both queues */
2946 ew32(TXDCTL(1), er32(TXDCTL(0)));
2948 /* Program the Transmit Control Register */
2950 tctl &= ~E1000_TCTL_CT;
2951 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2952 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2954 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2955 tarc = er32(TARC(0));
2956 /* set the speed mode bit, we'll clear it if we're not at
2957 * gigabit link later
2959 #define SPEED_MODE_BIT (1 << 21)
2960 tarc |= SPEED_MODE_BIT;
2961 ew32(TARC(0), tarc);
2964 /* errata: program both queues to unweighted RR */
2965 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2966 tarc = er32(TARC(0));
2968 ew32(TARC(0), tarc);
2969 tarc = er32(TARC(1));
2971 ew32(TARC(1), tarc);
2974 /* Setup Transmit Descriptor Settings for eop descriptor */
2975 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2977 /* only set IDE if we are delaying interrupts using the timers */
2978 if (adapter->tx_int_delay)
2979 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2981 /* enable Report Status bit */
2982 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2986 hw->mac.ops.config_collision_dist(hw);
2990 * e1000_setup_rctl - configure the receive control registers
2991 * @adapter: Board private structure
2993 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2994 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2995 static void e1000_setup_rctl(struct e1000_adapter *adapter)
2997 struct e1000_hw *hw = &adapter->hw;
3001 /* Workaround Si errata on PCHx - configure jumbo frame flow.
3002 * If jumbo frames not set, program related MAC/PHY registers
3005 if (hw->mac.type >= e1000_pch2lan) {
3008 if (adapter->netdev->mtu > ETH_DATA_LEN)
3009 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
3011 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
3014 e_dbg("failed to enable|disable jumbo frame workaround mode\n");
3017 /* Program MC offset vector base */
3019 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3020 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
3021 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
3022 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3024 /* Do not Store bad packets */
3025 rctl &= ~E1000_RCTL_SBP;
3027 /* Enable Long Packet receive */
3028 if (adapter->netdev->mtu <= ETH_DATA_LEN)
3029 rctl &= ~E1000_RCTL_LPE;
3031 rctl |= E1000_RCTL_LPE;
3033 /* Some systems expect that the CRC is included in SMBUS traffic. The
3034 * hardware strips the CRC before sending to both SMBUS (BMC) and to
3035 * host memory when this is enabled
3037 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3038 rctl |= E1000_RCTL_SECRC;
3040 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3041 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3044 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3046 phy_data |= (1 << 2);
3047 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3049 e1e_rphy(hw, 22, &phy_data);
3051 phy_data |= (1 << 14);
3052 e1e_wphy(hw, 0x10, 0x2823);
3053 e1e_wphy(hw, 0x11, 0x0003);
3054 e1e_wphy(hw, 22, phy_data);
3057 /* Setup buffer sizes */
3058 rctl &= ~E1000_RCTL_SZ_4096;
3059 rctl |= E1000_RCTL_BSEX;
3060 switch (adapter->rx_buffer_len) {
3063 rctl |= E1000_RCTL_SZ_2048;
3064 rctl &= ~E1000_RCTL_BSEX;
3067 rctl |= E1000_RCTL_SZ_4096;
3070 rctl |= E1000_RCTL_SZ_8192;
3073 rctl |= E1000_RCTL_SZ_16384;
3077 /* Enable Extended Status in all Receive Descriptors */
3078 rfctl = er32(RFCTL);
3079 rfctl |= E1000_RFCTL_EXTEN;
3082 /* 82571 and greater support packet-split where the protocol
3083 * header is placed in skb->data and the packet data is
3084 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3085 * In the case of a non-split, skb->data is linearly filled,
3086 * followed by the page buffers. Therefore, skb->data is
3087 * sized to hold the largest protocol header.
3089 * allocations using alloc_page take too long for regular MTU
3090 * so only enable packet split for jumbo frames
3092 * Using pages when the page size is greater than 16k wastes
3093 * a lot of memory, since we allocate 3 pages at all times
3096 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3097 if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3098 adapter->rx_ps_pages = pages;
3100 adapter->rx_ps_pages = 0;
3102 if (adapter->rx_ps_pages) {
3105 /* Enable Packet split descriptors */
3106 rctl |= E1000_RCTL_DTYP_PS;
3108 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3110 switch (adapter->rx_ps_pages) {
3112 psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3115 psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3118 psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3122 ew32(PSRCTL, psrctl);
3125 /* This is useful for sniffing bad packets. */
3126 if (adapter->netdev->features & NETIF_F_RXALL) {
3127 /* UPE and MPE will be handled by normal PROMISC logic
3128 * in e1000e_set_rx_mode
3130 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3131 E1000_RCTL_BAM | /* RX All Bcast Pkts */
3132 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3134 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3135 E1000_RCTL_DPF | /* Allow filtered pause */
3136 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3137 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3138 * and that breaks VLANs.
3143 /* just started the receive unit, no need to restart */
3144 adapter->flags &= ~FLAG_RESTART_NOW;
3148 * e1000_configure_rx - Configure Receive Unit after Reset
3149 * @adapter: board private structure
3151 * Configure the Rx unit of the MAC after a reset.
3153 static void e1000_configure_rx(struct e1000_adapter *adapter)
3155 struct e1000_hw *hw = &adapter->hw;
3156 struct e1000_ring *rx_ring = adapter->rx_ring;
3158 u32 rdlen, rctl, rxcsum, ctrl_ext;
3160 if (adapter->rx_ps_pages) {
3161 /* this is a 32 byte descriptor */
3162 rdlen = rx_ring->count *
3163 sizeof(union e1000_rx_desc_packet_split);
3164 adapter->clean_rx = e1000_clean_rx_irq_ps;
3165 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3166 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3167 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3168 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3169 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3171 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3172 adapter->clean_rx = e1000_clean_rx_irq;
3173 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3176 /* disable receives while setting up the descriptors */
3178 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3179 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3181 usleep_range(10000, 20000);
3183 if (adapter->flags2 & FLAG2_DMA_BURST) {
3184 /* set the writeback threshold (only takes effect if the RDTR
3185 * is set). set GRAN=1 and write back up to 0x4 worth, and
3186 * enable prefetching of 0x20 Rx descriptors
3192 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3193 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3195 /* override the delay timers for enabling bursting, only if
3196 * the value was not set by the user via module options
3198 if (adapter->rx_int_delay == DEFAULT_RDTR)
3199 adapter->rx_int_delay = BURST_RDTR;
3200 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
3201 adapter->rx_abs_int_delay = BURST_RADV;
3204 /* set the Receive Delay Timer Register */
3205 ew32(RDTR, adapter->rx_int_delay);
3207 /* irq moderation */
3208 ew32(RADV, adapter->rx_abs_int_delay);
3209 if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3210 e1000e_write_itr(adapter, adapter->itr);
3212 ctrl_ext = er32(CTRL_EXT);
3213 /* Auto-Mask interrupts upon ICR access */
3214 ctrl_ext |= E1000_CTRL_EXT_IAME;
3215 ew32(IAM, 0xffffffff);
3216 ew32(CTRL_EXT, ctrl_ext);
3219 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3220 * the Base and Length of the Rx Descriptor Ring
3222 rdba = rx_ring->dma;
3223 ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3224 ew32(RDBAH(0), (rdba >> 32));
3225 ew32(RDLEN(0), rdlen);
3228 rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3229 rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3231 /* Enable Receive Checksum Offload for TCP and UDP */
3232 rxcsum = er32(RXCSUM);
3233 if (adapter->netdev->features & NETIF_F_RXCSUM)
3234 rxcsum |= E1000_RXCSUM_TUOFL;
3236 rxcsum &= ~E1000_RXCSUM_TUOFL;
3237 ew32(RXCSUM, rxcsum);
3239 /* With jumbo frames, excessive C-state transition latencies result
3240 * in dropped transactions.
3242 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3244 ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3245 adapter->max_frame_size) * 8 / 1000;
3247 if (adapter->flags & FLAG_IS_ICH) {
3248 u32 rxdctl = er32(RXDCTL(0));
3250 ew32(RXDCTL(0), rxdctl | 0x3);
3253 pm_qos_update_request(&adapter->netdev->pm_qos_req, lat);
3255 pm_qos_update_request(&adapter->netdev->pm_qos_req,
3256 PM_QOS_DEFAULT_VALUE);
3259 /* Enable Receives */
3264 * e1000e_write_mc_addr_list - write multicast addresses to MTA
3265 * @netdev: network interface device structure
3267 * Writes multicast address list to the MTA hash table.
3268 * Returns: -ENOMEM on failure
3269 * 0 on no addresses written
3270 * X on writing X addresses to MTA
3272 static int e1000e_write_mc_addr_list(struct net_device *netdev)
3274 struct e1000_adapter *adapter = netdev_priv(netdev);
3275 struct e1000_hw *hw = &adapter->hw;
3276 struct netdev_hw_addr *ha;
3280 if (netdev_mc_empty(netdev)) {
3281 /* nothing to program, so clear mc list */
3282 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3286 mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC);
3290 /* update_mc_addr_list expects a packed array of only addresses. */
3292 netdev_for_each_mc_addr(ha, netdev)
3293 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3295 hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3298 return netdev_mc_count(netdev);
3302 * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3303 * @netdev: network interface device structure
3305 * Writes unicast address list to the RAR table.
3306 * Returns: -ENOMEM on failure/insufficient address space
3307 * 0 on no addresses written
3308 * X on writing X addresses to the RAR table
3310 static int e1000e_write_uc_addr_list(struct net_device *netdev)
3312 struct e1000_adapter *adapter = netdev_priv(netdev);
3313 struct e1000_hw *hw = &adapter->hw;
3314 unsigned int rar_entries;
3317 rar_entries = hw->mac.ops.rar_get_count(hw);
3319 /* save a rar entry for our hardware address */
3322 /* save a rar entry for the LAA workaround */
3323 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3326 /* return ENOMEM indicating insufficient memory for addresses */
3327 if (netdev_uc_count(netdev) > rar_entries)
3330 if (!netdev_uc_empty(netdev) && rar_entries) {
3331 struct netdev_hw_addr *ha;
3333 /* write the addresses in reverse order to avoid write
3336 netdev_for_each_uc_addr(ha, netdev) {
3341 rval = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3348 /* zero out the remaining RAR entries not used above */
3349 for (; rar_entries > 0; rar_entries--) {
3350 ew32(RAH(rar_entries), 0);
3351 ew32(RAL(rar_entries), 0);
3359 * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3360 * @netdev: network interface device structure
3362 * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3363 * address list or the network interface flags are updated. This routine is
3364 * responsible for configuring the hardware for proper unicast, multicast,
3365 * promiscuous mode, and all-multi behavior.
3367 static void e1000e_set_rx_mode(struct net_device *netdev)
3369 struct e1000_adapter *adapter = netdev_priv(netdev);
3370 struct e1000_hw *hw = &adapter->hw;
3373 if (pm_runtime_suspended(netdev->dev.parent))
3376 /* Check for Promiscuous and All Multicast modes */
3379 /* clear the affected bits */
3380 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3382 if (netdev->flags & IFF_PROMISC) {
3383 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3384 /* Do not hardware filter VLANs in promisc mode */
3385 e1000e_vlan_filter_disable(adapter);
3389 if (netdev->flags & IFF_ALLMULTI) {
3390 rctl |= E1000_RCTL_MPE;
3392 /* Write addresses to the MTA, if the attempt fails
3393 * then we should just turn on promiscuous mode so
3394 * that we can at least receive multicast traffic
3396 count = e1000e_write_mc_addr_list(netdev);
3398 rctl |= E1000_RCTL_MPE;
3400 e1000e_vlan_filter_enable(adapter);
3401 /* Write addresses to available RAR registers, if there is not
3402 * sufficient space to store all the addresses then enable
3403 * unicast promiscuous mode
3405 count = e1000e_write_uc_addr_list(netdev);
3407 rctl |= E1000_RCTL_UPE;
3412 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3413 e1000e_vlan_strip_enable(adapter);
3415 e1000e_vlan_strip_disable(adapter);
3418 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3420 struct e1000_hw *hw = &adapter->hw;
3423 static const u32 rsskey[10] = {
3424 0xda565a6d, 0xc20e5b25, 0x3d256741, 0xb08fa343, 0xcb2bcad0,
3425 0xb4307bae, 0xa32dcb77, 0x0cf23080, 0x3bb7426a, 0xfa01acbe
3428 /* Fill out hash function seed */
3429 for (i = 0; i < 10; i++)
3430 ew32(RSSRK(i), rsskey[i]);
3432 /* Direct all traffic to queue 0 */
3433 for (i = 0; i < 32; i++)
3436 /* Disable raw packet checksumming so that RSS hash is placed in
3437 * descriptor on writeback.
3439 rxcsum = er32(RXCSUM);
3440 rxcsum |= E1000_RXCSUM_PCSD;
3442 ew32(RXCSUM, rxcsum);
3444 mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3445 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3446 E1000_MRQC_RSS_FIELD_IPV6 |
3447 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3448 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3454 * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3455 * @adapter: board private structure
3456 * @timinca: pointer to returned time increment attributes
3458 * Get attributes for incrementing the System Time Register SYSTIML/H at
3459 * the default base frequency, and set the cyclecounter shift value.
3461 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3463 struct e1000_hw *hw = &adapter->hw;
3464 u32 incvalue, incperiod, shift;
3466 /* Make sure clock is enabled on I217 before checking the frequency */
3467 if ((hw->mac.type == e1000_pch_lpt) &&
3468 !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3469 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3470 u32 fextnvm7 = er32(FEXTNVM7);
3472 if (!(fextnvm7 & (1 << 0))) {
3473 ew32(FEXTNVM7, fextnvm7 | (1 << 0));
3478 switch (hw->mac.type) {
3481 /* On I217, the clock frequency is 25MHz or 96MHz as
3482 * indicated by the System Clock Frequency Indication
3484 if ((hw->mac.type != e1000_pch_lpt) ||
3485 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {
3486 /* Stable 96MHz frequency */
3487 incperiod = INCPERIOD_96MHz;
3488 incvalue = INCVALUE_96MHz;
3489 shift = INCVALUE_SHIFT_96MHz;
3490 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz;
3496 /* Stable 25MHz frequency */
3497 incperiod = INCPERIOD_25MHz;
3498 incvalue = INCVALUE_25MHz;
3499 shift = INCVALUE_SHIFT_25MHz;
3500 adapter->cc.shift = shift;
3506 *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3507 ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3513 * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3514 * @adapter: board private structure
3516 * Outgoing time stamping can be enabled and disabled. Play nice and
3517 * disable it when requested, although it shouldn't cause any overhead
3518 * when no packet needs it. At most one packet in the queue may be
3519 * marked for time stamping, otherwise it would be impossible to tell
3520 * for sure to which packet the hardware time stamp belongs.
3522 * Incoming time stamping has to be configured via the hardware filters.
3523 * Not all combinations are supported, in particular event type has to be
3524 * specified. Matching the kind of event packet is not supported, with the
3525 * exception of "all V2 events regardless of level 2 or 4".
3527 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3528 struct hwtstamp_config *config)
3530 struct e1000_hw *hw = &adapter->hw;
3531 u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3532 u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3540 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3543 /* flags reserved for future extensions - must be zero */
3547 switch (config->tx_type) {
3548 case HWTSTAMP_TX_OFF:
3551 case HWTSTAMP_TX_ON:
3557 switch (config->rx_filter) {
3558 case HWTSTAMP_FILTER_NONE:
3561 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3562 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3563 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3566 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3567 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3568 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3571 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3572 /* Also time stamps V2 L2 Path Delay Request/Response */
3573 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3574 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3577 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3578 /* Also time stamps V2 L2 Path Delay Request/Response. */
3579 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3580 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3583 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3584 /* Hardware cannot filter just V2 L4 Sync messages;
3585 * fall-through to V2 (both L2 and L4) Sync.
3587 case HWTSTAMP_FILTER_PTP_V2_SYNC:
3588 /* Also time stamps V2 Path Delay Request/Response. */
3589 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3590 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3594 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3595 /* Hardware cannot filter just V2 L4 Delay Request messages;
3596 * fall-through to V2 (both L2 and L4) Delay Request.
3598 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3599 /* Also time stamps V2 Path Delay Request/Response. */
3600 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3601 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3605 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3606 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3607 /* Hardware cannot filter just V2 L4 or L2 Event messages;
3608 * fall-through to all V2 (both L2 and L4) Events.
3610 case HWTSTAMP_FILTER_PTP_V2_EVENT:
3611 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3612 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3616 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3617 /* For V1, the hardware can only filter Sync messages or
3618 * Delay Request messages but not both so fall-through to
3619 * time stamp all packets.
3621 case HWTSTAMP_FILTER_ALL:
3624 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3625 config->rx_filter = HWTSTAMP_FILTER_ALL;
3631 adapter->hwtstamp_config = *config;
3633 /* enable/disable Tx h/w time stamping */
3634 regval = er32(TSYNCTXCTL);
3635 regval &= ~E1000_TSYNCTXCTL_ENABLED;
3636 regval |= tsync_tx_ctl;
3637 ew32(TSYNCTXCTL, regval);
3638 if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3639 (regval & E1000_TSYNCTXCTL_ENABLED)) {
3640 e_err("Timesync Tx Control register not set as expected\n");
3644 /* enable/disable Rx h/w time stamping */
3645 regval = er32(TSYNCRXCTL);
3646 regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3647 regval |= tsync_rx_ctl;
3648 ew32(TSYNCRXCTL, regval);
3649 if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3650 E1000_TSYNCRXCTL_TYPE_MASK)) !=
3651 (regval & (E1000_TSYNCRXCTL_ENABLED |
3652 E1000_TSYNCRXCTL_TYPE_MASK))) {
3653 e_err("Timesync Rx Control register not set as expected\n");
3657 /* L2: define ethertype filter for time stamped packets */
3659 rxmtrl |= ETH_P_1588;
3661 /* define which PTP packets get time stamped */
3662 ew32(RXMTRL, rxmtrl);
3664 /* Filter by destination port */
3666 rxudp = PTP_EV_PORT;
3667 cpu_to_be16s(&rxudp);
3673 /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3677 /* Get and set the System Time Register SYSTIM base frequency */
3678 ret_val = e1000e_get_base_timinca(adapter, ®val);
3681 ew32(TIMINCA, regval);
3683 /* reset the ns time counter */
3684 timecounter_init(&adapter->tc, &adapter->cc,
3685 ktime_to_ns(ktime_get_real()));
3691 * e1000_configure - configure the hardware for Rx and Tx
3692 * @adapter: private board structure
3694 static void e1000_configure(struct e1000_adapter *adapter)
3696 struct e1000_ring *rx_ring = adapter->rx_ring;
3698 e1000e_set_rx_mode(adapter->netdev);
3700 e1000_restore_vlan(adapter);
3701 e1000_init_manageability_pt(adapter);
3703 e1000_configure_tx(adapter);
3705 if (adapter->netdev->features & NETIF_F_RXHASH)
3706 e1000e_setup_rss_hash(adapter);
3707 e1000_setup_rctl(adapter);
3708 e1000_configure_rx(adapter);
3709 adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3713 * e1000e_power_up_phy - restore link in case the phy was powered down
3714 * @adapter: address of board private structure
3716 * The phy may be powered down to save power and turn off link when the
3717 * driver is unloaded and wake on lan is not enabled (among others)
3718 * *** this routine MUST be followed by a call to e1000e_reset ***
3720 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3722 if (adapter->hw.phy.ops.power_up)
3723 adapter->hw.phy.ops.power_up(&adapter->hw);
3725 adapter->hw.mac.ops.setup_link(&adapter->hw);
3729 * e1000_power_down_phy - Power down the PHY
3731 * Power down the PHY so no link is implied when interface is down.
3732 * The PHY cannot be powered down if management or WoL is active.
3734 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3736 if (adapter->hw.phy.ops.power_down)
3737 adapter->hw.phy.ops.power_down(&adapter->hw);
3741 * e1000e_reset - bring the hardware into a known good state
3743 * This function boots the hardware and enables some settings that
3744 * require a configuration cycle of the hardware - those cannot be
3745 * set/changed during runtime. After reset the device needs to be
3746 * properly configured for Rx, Tx etc.
3748 void e1000e_reset(struct e1000_adapter *adapter)
3750 struct e1000_mac_info *mac = &adapter->hw.mac;
3751 struct e1000_fc_info *fc = &adapter->hw.fc;
3752 struct e1000_hw *hw = &adapter->hw;
3753 u32 tx_space, min_tx_space, min_rx_space;
3754 u32 pba = adapter->pba;
3757 /* reset Packet Buffer Allocation to default */
3760 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
3761 /* To maintain wire speed transmits, the Tx FIFO should be
3762 * large enough to accommodate two full transmit packets,
3763 * rounded up to the next 1KB and expressed in KB. Likewise,
3764 * the Rx FIFO should be large enough to accommodate at least
3765 * one full receive packet and is similarly rounded up and
3769 /* upper 16 bits has Tx packet buffer allocation size in KB */
3770 tx_space = pba >> 16;
3771 /* lower 16 bits has Rx packet buffer allocation size in KB */
3773 /* the Tx fifo also stores 16 bytes of information about the Tx
3774 * but don't include ethernet FCS because hardware appends it
3776 min_tx_space = (adapter->max_frame_size +
3777 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3778 min_tx_space = ALIGN(min_tx_space, 1024);
3779 min_tx_space >>= 10;
3780 /* software strips receive CRC, so leave room for it */
3781 min_rx_space = adapter->max_frame_size;
3782 min_rx_space = ALIGN(min_rx_space, 1024);
3783 min_rx_space >>= 10;
3785 /* If current Tx allocation is less than the min Tx FIFO size,
3786 * and the min Tx FIFO size is less than the current Rx FIFO
3787 * allocation, take space away from current Rx allocation
3789 if ((tx_space < min_tx_space) &&
3790 ((min_tx_space - tx_space) < pba)) {
3791 pba -= min_tx_space - tx_space;
3793 /* if short on Rx space, Rx wins and must trump Tx
3796 if (pba < min_rx_space)
3803 /* flow control settings
3805 * The high water mark must be low enough to fit one full frame
3806 * (or the size used for early receive) above it in the Rx FIFO.
3807 * Set it to the lower of:
3808 * - 90% of the Rx FIFO size, and
3809 * - the full Rx FIFO size minus one full frame
3811 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3812 fc->pause_time = 0xFFFF;
3814 fc->pause_time = E1000_FC_PAUSE_TIME;
3815 fc->send_xon = true;
3816 fc->current_mode = fc->requested_mode;
3818 switch (hw->mac.type) {
3820 case e1000_ich10lan:
3821 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3824 fc->high_water = 0x2800;
3825 fc->low_water = fc->high_water - 8;
3830 hwm = min(((pba << 10) * 9 / 10),
3831 ((pba << 10) - adapter->max_frame_size));
3833 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3834 fc->low_water = fc->high_water - 8;
3837 /* Workaround PCH LOM adapter hangs with certain network
3838 * loads. If hangs persist, try disabling Tx flow control.
3840 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3841 fc->high_water = 0x3500;
3842 fc->low_water = 0x1500;
3844 fc->high_water = 0x5000;
3845 fc->low_water = 0x3000;
3847 fc->refresh_time = 0x1000;
3851 fc->refresh_time = 0x0400;
3853 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
3854 fc->high_water = 0x05C20;
3855 fc->low_water = 0x05048;
3856 fc->pause_time = 0x0650;
3862 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
3863 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
3867 /* Alignment of Tx data is on an arbitrary byte boundary with the
3868 * maximum size per Tx descriptor limited only to the transmit
3869 * allocation of the packet buffer minus 96 bytes with an upper
3870 * limit of 24KB due to receive synchronization limitations.
3872 adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
3875 /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
3876 * fit in receive buffer.
3878 if (adapter->itr_setting & 0x3) {
3879 if ((adapter->max_frame_size * 2) > (pba << 10)) {
3880 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
3881 dev_info(&adapter->pdev->dev,
3882 "Interrupt Throttle Rate off\n");
3883 adapter->flags2 |= FLAG2_DISABLE_AIM;
3884 e1000e_write_itr(adapter, 0);
3886 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
3887 dev_info(&adapter->pdev->dev,
3888 "Interrupt Throttle Rate on\n");
3889 adapter->flags2 &= ~FLAG2_DISABLE_AIM;
3890 adapter->itr = 20000;
3891 e1000e_write_itr(adapter, adapter->itr);
3895 /* Allow time for pending master requests to run */
3896 mac->ops.reset_hw(hw);
3898 /* For parts with AMT enabled, let the firmware know
3899 * that the network interface is in control
3901 if (adapter->flags & FLAG_HAS_AMT)
3902 e1000e_get_hw_control(adapter);
3906 if (mac->ops.init_hw(hw))
3907 e_err("Hardware Error\n");
3909 e1000_update_mng_vlan(adapter);
3911 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3912 ew32(VET, ETH_P_8021Q);
3914 e1000e_reset_adaptive(hw);
3916 /* initialize systim and reset the ns time counter */
3917 e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config);
3919 /* Set EEE advertisement as appropriate */
3920 if (adapter->flags2 & FLAG2_HAS_EEE) {
3924 switch (hw->phy.type) {
3925 case e1000_phy_82579:
3926 adv_addr = I82579_EEE_ADVERTISEMENT;
3928 case e1000_phy_i217:
3929 adv_addr = I217_EEE_ADVERTISEMENT;
3932 dev_err(&adapter->pdev->dev,
3933 "Invalid PHY type setting EEE advertisement\n");
3937 ret_val = hw->phy.ops.acquire(hw);
3939 dev_err(&adapter->pdev->dev,
3940 "EEE advertisement - unable to acquire PHY\n");
3944 e1000_write_emi_reg_locked(hw, adv_addr,
3945 hw->dev_spec.ich8lan.eee_disable ?
3946 0 : adapter->eee_advert);
3948 hw->phy.ops.release(hw);
3951 if (!netif_running(adapter->netdev) &&
3952 !test_bit(__E1000_TESTING, &adapter->state))
3953 e1000_power_down_phy(adapter);
3955 e1000_get_phy_info(hw);
3957 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3958 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
3960 /* speed up time to link by disabling smart power down, ignore
3961 * the return value of this function because there is nothing
3962 * different we would do if it failed
3964 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3965 phy_data &= ~IGP02E1000_PM_SPD;
3966 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3970 int e1000e_up(struct e1000_adapter *adapter)
3972 struct e1000_hw *hw = &adapter->hw;
3974 /* hardware has been reset, we need to reload some things */
3975 e1000_configure(adapter);
3977 clear_bit(__E1000_DOWN, &adapter->state);
3979 if (adapter->msix_entries)
3980 e1000_configure_msix(adapter);
3981 e1000_irq_enable(adapter);
3983 netif_start_queue(adapter->netdev);
3985 /* fire a link change interrupt to start the watchdog */
3986 if (adapter->msix_entries)
3987 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3989 ew32(ICS, E1000_ICS_LSC);
3994 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
3996 struct e1000_hw *hw = &adapter->hw;
3998 if (!(adapter->flags2 & FLAG2_DMA_BURST))
4001 /* flush pending descriptor writebacks to memory */
4002 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4003 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4005 /* execute the writes immediately */
4008 /* due to rare timing issues, write to TIDV/RDTR again to ensure the
4009 * write is successful
4011 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4012 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4014 /* execute the writes immediately */
4018 static void e1000e_update_stats(struct e1000_adapter *adapter);
4021 * e1000e_down - quiesce the device and optionally reset the hardware
4022 * @adapter: board private structure
4023 * @reset: boolean flag to reset the hardware or not
4025 void e1000e_down(struct e1000_adapter *adapter, bool reset)
4027 struct net_device *netdev = adapter->netdev;
4028 struct e1000_hw *hw = &adapter->hw;
4031 /* signal that we're down so the interrupt handler does not
4032 * reschedule our watchdog timer
4034 set_bit(__E1000_DOWN, &adapter->state);
4036 /* disable receives in the hardware */
4038 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
4039 ew32(RCTL, rctl & ~E1000_RCTL_EN);
4040 /* flush and sleep below */
4042 netif_stop_queue(netdev);
4044 /* disable transmits in the hardware */
4046 tctl &= ~E1000_TCTL_EN;
4049 /* flush both disables and wait for them to finish */
4051 usleep_range(10000, 20000);
4053 e1000_irq_disable(adapter);
4055 napi_synchronize(&adapter->napi);
4057 del_timer_sync(&adapter->watchdog_timer);
4058 del_timer_sync(&adapter->phy_info_timer);
4060 netif_carrier_off(netdev);
4062 spin_lock(&adapter->stats64_lock);
4063 e1000e_update_stats(adapter);
4064 spin_unlock(&adapter->stats64_lock);
4066 e1000e_flush_descriptors(adapter);
4067 e1000_clean_tx_ring(adapter->tx_ring);
4068 e1000_clean_rx_ring(adapter->rx_ring);
4070 adapter->link_speed = 0;
4071 adapter->link_duplex = 0;
4073 /* Disable Si errata workaround on PCHx for jumbo frame flow */
4074 if ((hw->mac.type >= e1000_pch2lan) &&
4075 (adapter->netdev->mtu > ETH_DATA_LEN) &&
4076 e1000_lv_jumbo_workaround_ich8lan(hw, false))
4077 e_dbg("failed to disable jumbo frame workaround mode\n");
4079 if (reset && !pci_channel_offline(adapter->pdev))
4080 e1000e_reset(adapter);
4083 void e1000e_reinit_locked(struct e1000_adapter *adapter)
4086 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4087 usleep_range(1000, 2000);
4088 e1000e_down(adapter, true);
4090 clear_bit(__E1000_RESETTING, &adapter->state);
4094 * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4095 * @cc: cyclecounter structure
4097 static cycle_t e1000e_cyclecounter_read(const struct cyclecounter *cc)
4099 struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4101 struct e1000_hw *hw = &adapter->hw;
4102 cycle_t systim, systim_next;
4104 /* latch SYSTIMH on read of SYSTIML */
4105 systim = (cycle_t)er32(SYSTIML);
4106 systim |= (cycle_t)er32(SYSTIMH) << 32;
4108 if ((hw->mac.type == e1000_82574) || (hw->mac.type == e1000_82583)) {
4109 u64 incvalue, time_delta, rem, temp;
4112 /* errata for 82574/82583 possible bad bits read from SYSTIMH/L
4113 * check to see that the time is incrementing at a reasonable
4114 * rate and is a multiple of incvalue
4116 incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK;
4117 for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) {
4118 /* latch SYSTIMH on read of SYSTIML */
4119 systim_next = (cycle_t)er32(SYSTIML);
4120 systim_next |= (cycle_t)er32(SYSTIMH) << 32;
4122 time_delta = systim_next - systim;
4124 rem = do_div(temp, incvalue);
4126 systim = systim_next;
4128 if ((time_delta < E1000_82574_SYSTIM_EPSILON) &&
4137 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4138 * @adapter: board private structure to initialize
4140 * e1000_sw_init initializes the Adapter private data structure.
4141 * Fields are initialized based on PCI device information and
4142 * OS network device settings (MTU size).
4144 static int e1000_sw_init(struct e1000_adapter *adapter)
4146 struct net_device *netdev = adapter->netdev;
4148 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
4149 adapter->rx_ps_bsize0 = 128;
4150 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4151 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4152 adapter->tx_ring_count = E1000_DEFAULT_TXD;
4153 adapter->rx_ring_count = E1000_DEFAULT_RXD;
4155 spin_lock_init(&adapter->stats64_lock);
4157 e1000e_set_interrupt_capability(adapter);
4159 if (e1000_alloc_queues(adapter))
4162 /* Setup hardware time stamping cyclecounter */
4163 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4164 adapter->cc.read = e1000e_cyclecounter_read;
4165 adapter->cc.mask = CLOCKSOURCE_MASK(64);
4166 adapter->cc.mult = 1;
4167 /* cc.shift set in e1000e_get_base_tininca() */
4169 spin_lock_init(&adapter->systim_lock);
4170 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4173 /* Explicitly disable IRQ since the NIC can be in any state. */
4174 e1000_irq_disable(adapter);
4176 set_bit(__E1000_DOWN, &adapter->state);
4181 * e1000_intr_msi_test - Interrupt Handler
4182 * @irq: interrupt number
4183 * @data: pointer to a network interface device structure
4185 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4187 struct net_device *netdev = data;
4188 struct e1000_adapter *adapter = netdev_priv(netdev);
4189 struct e1000_hw *hw = &adapter->hw;
4190 u32 icr = er32(ICR);
4192 e_dbg("icr is %08X\n", icr);
4193 if (icr & E1000_ICR_RXSEQ) {
4194 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4195 /* Force memory writes to complete before acknowledging the
4196 * interrupt is handled.
4205 * e1000_test_msi_interrupt - Returns 0 for successful test
4206 * @adapter: board private struct
4208 * code flow taken from tg3.c
4210 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4212 struct net_device *netdev = adapter->netdev;
4213 struct e1000_hw *hw = &adapter->hw;
4216 /* poll_enable hasn't been called yet, so don't need disable */
4217 /* clear any pending events */
4220 /* free the real vector and request a test handler */
4221 e1000_free_irq(adapter);
4222 e1000e_reset_interrupt_capability(adapter);
4224 /* Assume that the test fails, if it succeeds then the test
4225 * MSI irq handler will unset this flag
4227 adapter->flags |= FLAG_MSI_TEST_FAILED;
4229 err = pci_enable_msi(adapter->pdev);
4231 goto msi_test_failed;
4233 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4234 netdev->name, netdev);
4236 pci_disable_msi(adapter->pdev);
4237 goto msi_test_failed;
4240 /* Force memory writes to complete before enabling and firing an
4245 e1000_irq_enable(adapter);
4247 /* fire an unusual interrupt on the test handler */
4248 ew32(ICS, E1000_ICS_RXSEQ);
4252 e1000_irq_disable(adapter);
4254 rmb(); /* read flags after interrupt has been fired */
4256 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4257 adapter->int_mode = E1000E_INT_MODE_LEGACY;
4258 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4260 e_dbg("MSI interrupt test succeeded!\n");
4263 free_irq(adapter->pdev->irq, netdev);
4264 pci_disable_msi(adapter->pdev);
4267 e1000e_set_interrupt_capability(adapter);
4268 return e1000_request_irq(adapter);
4272 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4273 * @adapter: board private struct
4275 * code flow taken from tg3.c, called with e1000 interrupts disabled.
4277 static int e1000_test_msi(struct e1000_adapter *adapter)
4282 if (!(adapter->flags & FLAG_MSI_ENABLED))
4285 /* disable SERR in case the MSI write causes a master abort */
4286 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4287 if (pci_cmd & PCI_COMMAND_SERR)
4288 pci_write_config_word(adapter->pdev, PCI_COMMAND,
4289 pci_cmd & ~PCI_COMMAND_SERR);
4291 err = e1000_test_msi_interrupt(adapter);
4293 /* re-enable SERR */
4294 if (pci_cmd & PCI_COMMAND_SERR) {
4295 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4296 pci_cmd |= PCI_COMMAND_SERR;
4297 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4304 * e1000_open - Called when a network interface is made active
4305 * @netdev: network interface device structure
4307 * Returns 0 on success, negative value on failure
4309 * The open entry point is called when a network interface is made
4310 * active by the system (IFF_UP). At this point all resources needed
4311 * for transmit and receive operations are allocated, the interrupt
4312 * handler is registered with the OS, the watchdog timer is started,
4313 * and the stack is notified that the interface is ready.
4315 static int e1000_open(struct net_device *netdev)
4317 struct e1000_adapter *adapter = netdev_priv(netdev);
4318 struct e1000_hw *hw = &adapter->hw;
4319 struct pci_dev *pdev = adapter->pdev;
4322 /* disallow open during test */
4323 if (test_bit(__E1000_TESTING, &adapter->state))
4326 pm_runtime_get_sync(&pdev->dev);
4328 netif_carrier_off(netdev);
4330 /* allocate transmit descriptors */
4331 err = e1000e_setup_tx_resources(adapter->tx_ring);
4335 /* allocate receive descriptors */
4336 err = e1000e_setup_rx_resources(adapter->rx_ring);
4340 /* If AMT is enabled, let the firmware know that the network
4341 * interface is now open and reset the part to a known state.
4343 if (adapter->flags & FLAG_HAS_AMT) {
4344 e1000e_get_hw_control(adapter);
4345 e1000e_reset(adapter);
4348 e1000e_power_up_phy(adapter);
4350 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4351 if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4352 e1000_update_mng_vlan(adapter);
4354 /* DMA latency requirement to workaround jumbo issue */
4355 pm_qos_add_request(&adapter->netdev->pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
4356 PM_QOS_DEFAULT_VALUE);
4358 /* before we allocate an interrupt, we must be ready to handle it.
4359 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4360 * as soon as we call pci_request_irq, so we have to setup our
4361 * clean_rx handler before we do so.
4363 e1000_configure(adapter);
4365 err = e1000_request_irq(adapter);
4369 /* Work around PCIe errata with MSI interrupts causing some chipsets to
4370 * ignore e1000e MSI messages, which means we need to test our MSI
4373 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4374 err = e1000_test_msi(adapter);
4376 e_err("Interrupt allocation failed\n");
4381 /* From here on the code is the same as e1000e_up() */
4382 clear_bit(__E1000_DOWN, &adapter->state);
4384 napi_enable(&adapter->napi);
4386 e1000_irq_enable(adapter);
4388 adapter->tx_hang_recheck = false;
4389 netif_start_queue(netdev);
4391 hw->mac.get_link_status = true;
4392 pm_runtime_put(&pdev->dev);
4394 /* fire a link status change interrupt to start the watchdog */
4395 if (adapter->msix_entries)
4396 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
4398 ew32(ICS, E1000_ICS_LSC);
4403 e1000e_release_hw_control(adapter);
4404 e1000_power_down_phy(adapter);
4405 e1000e_free_rx_resources(adapter->rx_ring);
4407 e1000e_free_tx_resources(adapter->tx_ring);
4409 e1000e_reset(adapter);
4410 pm_runtime_put_sync(&pdev->dev);
4416 * e1000_close - Disables a network interface
4417 * @netdev: network interface device structure
4419 * Returns 0, this is not allowed to fail
4421 * The close entry point is called when an interface is de-activated
4422 * by the OS. The hardware is still under the drivers control, but
4423 * needs to be disabled. A global MAC reset is issued to stop the
4424 * hardware, and all transmit and receive resources are freed.
4426 static int e1000_close(struct net_device *netdev)
4428 struct e1000_adapter *adapter = netdev_priv(netdev);
4429 struct pci_dev *pdev = adapter->pdev;
4430 int count = E1000_CHECK_RESET_COUNT;
4432 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4433 usleep_range(10000, 20000);
4435 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4437 pm_runtime_get_sync(&pdev->dev);
4439 if (!test_bit(__E1000_DOWN, &adapter->state)) {
4440 e1000e_down(adapter, true);
4441 e1000_free_irq(adapter);
4443 /* Link status message must follow this format */
4444 pr_info("%s NIC Link is Down\n", adapter->netdev->name);
4447 napi_disable(&adapter->napi);
4449 e1000e_free_tx_resources(adapter->tx_ring);
4450 e1000e_free_rx_resources(adapter->rx_ring);
4452 /* kill manageability vlan ID if supported, but not if a vlan with
4453 * the same ID is registered on the host OS (let 8021q kill it)
4455 if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4456 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4457 adapter->mng_vlan_id);
4459 /* If AMT is enabled, let the firmware know that the network
4460 * interface is now closed
4462 if ((adapter->flags & FLAG_HAS_AMT) &&
4463 !test_bit(__E1000_TESTING, &adapter->state))
4464 e1000e_release_hw_control(adapter);
4466 pm_qos_remove_request(&adapter->netdev->pm_qos_req);
4468 pm_runtime_put_sync(&pdev->dev);
4474 * e1000_set_mac - Change the Ethernet Address of the NIC
4475 * @netdev: network interface device structure
4476 * @p: pointer to an address structure
4478 * Returns 0 on success, negative on failure
4480 static int e1000_set_mac(struct net_device *netdev, void *p)
4482 struct e1000_adapter *adapter = netdev_priv(netdev);
4483 struct e1000_hw *hw = &adapter->hw;
4484 struct sockaddr *addr = p;
4486 if (!is_valid_ether_addr(addr->sa_data))
4487 return -EADDRNOTAVAIL;
4489 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4490 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4492 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4494 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4495 /* activate the work around */
4496 e1000e_set_laa_state_82571(&adapter->hw, 1);
4498 /* Hold a copy of the LAA in RAR[14] This is done so that
4499 * between the time RAR[0] gets clobbered and the time it
4500 * gets fixed (in e1000_watchdog), the actual LAA is in one
4501 * of the RARs and no incoming packets directed to this port
4502 * are dropped. Eventually the LAA will be in RAR[0] and
4505 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4506 adapter->hw.mac.rar_entry_count - 1);
4513 * e1000e_update_phy_task - work thread to update phy
4514 * @work: pointer to our work struct
4516 * this worker thread exists because we must acquire a
4517 * semaphore to read the phy, which we could msleep while
4518 * waiting for it, and we can't msleep in a timer.
4520 static void e1000e_update_phy_task(struct work_struct *work)
4522 struct e1000_adapter *adapter = container_of(work,
4523 struct e1000_adapter,
4525 struct e1000_hw *hw = &adapter->hw;
4527 if (test_bit(__E1000_DOWN, &adapter->state))
4530 e1000_get_phy_info(hw);
4532 /* Enable EEE on 82579 after link up */
4533 if (hw->phy.type == e1000_phy_82579)
4534 e1000_set_eee_pchlan(hw);
4538 * e1000_update_phy_info - timre call-back to update PHY info
4539 * @data: pointer to adapter cast into an unsigned long
4541 * Need to wait a few seconds after link up to get diagnostic information from
4544 static void e1000_update_phy_info(unsigned long data)
4546 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
4548 if (test_bit(__E1000_DOWN, &adapter->state))
4551 schedule_work(&adapter->update_phy_task);
4555 * e1000e_update_phy_stats - Update the PHY statistics counters
4556 * @adapter: board private structure
4558 * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4560 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4562 struct e1000_hw *hw = &adapter->hw;
4566 ret_val = hw->phy.ops.acquire(hw);
4570 /* A page set is expensive so check if already on desired page.
4571 * If not, set to the page with the PHY status registers.
4574 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4578 if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4579 ret_val = hw->phy.ops.set_page(hw,
4580 HV_STATS_PAGE << IGP_PAGE_SHIFT);
4585 /* Single Collision Count */
4586 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4587 ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4589 adapter->stats.scc += phy_data;
4591 /* Excessive Collision Count */
4592 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4593 ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4595 adapter->stats.ecol += phy_data;
4597 /* Multiple Collision Count */
4598 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4599 ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4601 adapter->stats.mcc += phy_data;
4603 /* Late Collision Count */
4604 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4605 ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4607 adapter->stats.latecol += phy_data;
4609 /* Collision Count - also used for adaptive IFS */
4610 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4611 ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4613 hw->mac.collision_delta = phy_data;
4616 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4617 ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4619 adapter->stats.dc += phy_data;
4621 /* Transmit with no CRS */
4622 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4623 ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4625 adapter->stats.tncrs += phy_data;
4628 hw->phy.ops.release(hw);
4632 * e1000e_update_stats - Update the board statistics counters
4633 * @adapter: board private structure
4635 static void e1000e_update_stats(struct e1000_adapter *adapter)
4637 struct net_device *netdev = adapter->netdev;
4638 struct e1000_hw *hw = &adapter->hw;
4639 struct pci_dev *pdev = adapter->pdev;
4641 /* Prevent stats update while adapter is being reset, or if the pci
4642 * connection is down.
4644 if (adapter->link_speed == 0)
4646 if (pci_channel_offline(pdev))
4649 adapter->stats.crcerrs += er32(CRCERRS);
4650 adapter->stats.gprc += er32(GPRC);
4651 adapter->stats.gorc += er32(GORCL);
4652 er32(GORCH); /* Clear gorc */
4653 adapter->stats.bprc += er32(BPRC);
4654 adapter->stats.mprc += er32(MPRC);
4655 adapter->stats.roc += er32(ROC);
4657 adapter->stats.mpc += er32(MPC);
4659 /* Half-duplex statistics */
4660 if (adapter->link_duplex == HALF_DUPLEX) {
4661 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4662 e1000e_update_phy_stats(adapter);
4664 adapter->stats.scc += er32(SCC);
4665 adapter->stats.ecol += er32(ECOL);
4666 adapter->stats.mcc += er32(MCC);
4667 adapter->stats.latecol += er32(LATECOL);
4668 adapter->stats.dc += er32(DC);
4670 hw->mac.collision_delta = er32(COLC);
4672 if ((hw->mac.type != e1000_82574) &&
4673 (hw->mac.type != e1000_82583))
4674 adapter->stats.tncrs += er32(TNCRS);
4676 adapter->stats.colc += hw->mac.collision_delta;
4679 adapter->stats.xonrxc += er32(XONRXC);
4680 adapter->stats.xontxc += er32(XONTXC);
4681 adapter->stats.xoffrxc += er32(XOFFRXC);
4682 adapter->stats.xofftxc += er32(XOFFTXC);
4683 adapter->stats.gptc += er32(GPTC);
4684 adapter->stats.gotc += er32(GOTCL);
4685 er32(GOTCH); /* Clear gotc */
4686 adapter->stats.rnbc += er32(RNBC);
4687 adapter->stats.ruc += er32(RUC);
4689 adapter->stats.mptc += er32(MPTC);
4690 adapter->stats.bptc += er32(BPTC);
4692 /* used for adaptive IFS */
4694 hw->mac.tx_packet_delta = er32(TPT);
4695 adapter->stats.tpt += hw->mac.tx_packet_delta;
4697 adapter->stats.algnerrc += er32(ALGNERRC);
4698 adapter->stats.rxerrc += er32(RXERRC);
4699 adapter->stats.cexterr += er32(CEXTERR);
4700 adapter->stats.tsctc += er32(TSCTC);
4701 adapter->stats.tsctfc += er32(TSCTFC);
4703 /* Fill out the OS statistics structure */
4704 netdev->stats.multicast = adapter->stats.mprc;
4705 netdev->stats.collisions = adapter->stats.colc;
4709 /* RLEC on some newer hardware can be incorrect so build
4710 * our own version based on RUC and ROC
4712 netdev->stats.rx_errors = adapter->stats.rxerrc +
4713 adapter->stats.crcerrs + adapter->stats.algnerrc +
4714 adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
4715 netdev->stats.rx_length_errors = adapter->stats.ruc +
4717 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4718 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4719 netdev->stats.rx_missed_errors = adapter->stats.mpc;
4722 netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
4723 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4724 netdev->stats.tx_window_errors = adapter->stats.latecol;
4725 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
4727 /* Tx Dropped needs to be maintained elsewhere */
4729 /* Management Stats */
4730 adapter->stats.mgptc += er32(MGTPTC);
4731 adapter->stats.mgprc += er32(MGTPRC);
4732 adapter->stats.mgpdc += er32(MGTPDC);
4734 /* Correctable ECC Errors */
4735 if (hw->mac.type == e1000_pch_lpt) {
4736 u32 pbeccsts = er32(PBECCSTS);
4738 adapter->corr_errors +=
4739 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
4740 adapter->uncorr_errors +=
4741 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
4742 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
4747 * e1000_phy_read_status - Update the PHY register status snapshot
4748 * @adapter: board private structure
4750 static void e1000_phy_read_status(struct e1000_adapter *adapter)
4752 struct e1000_hw *hw = &adapter->hw;
4753 struct e1000_phy_regs *phy = &adapter->phy_regs;
4755 if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
4756 (er32(STATUS) & E1000_STATUS_LU) &&
4757 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
4760 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
4761 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
4762 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
4763 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
4764 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
4765 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
4766 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
4767 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
4769 e_warn("Error reading PHY register\n");
4771 /* Do not read PHY registers if link is not up
4772 * Set values to typical power-on defaults
4774 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4775 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4776 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4778 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4779 ADVERTISE_ALL | ADVERTISE_CSMA);
4781 phy->expansion = EXPANSION_ENABLENPAGE;
4782 phy->ctrl1000 = ADVERTISE_1000FULL;
4784 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4788 static void e1000_print_link_info(struct e1000_adapter *adapter)
4790 struct e1000_hw *hw = &adapter->hw;
4791 u32 ctrl = er32(CTRL);
4793 /* Link status message must follow this format for user tools */
4794 pr_info("%s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4795 adapter->netdev->name, adapter->link_speed,
4796 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
4797 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
4798 (ctrl & E1000_CTRL_RFCE) ? "Rx" :
4799 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
4802 static bool e1000e_has_link(struct e1000_adapter *adapter)
4804 struct e1000_hw *hw = &adapter->hw;
4805 bool link_active = false;
4808 /* get_link_status is set on LSC (link status) interrupt or
4809 * Rx sequence error interrupt. get_link_status will stay
4810 * false until the check_for_link establishes link
4811 * for copper adapters ONLY
4813 switch (hw->phy.media_type) {
4814 case e1000_media_type_copper:
4815 if (hw->mac.get_link_status) {
4816 ret_val = hw->mac.ops.check_for_link(hw);
4817 link_active = !hw->mac.get_link_status;
4822 case e1000_media_type_fiber:
4823 ret_val = hw->mac.ops.check_for_link(hw);
4824 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
4826 case e1000_media_type_internal_serdes:
4827 ret_val = hw->mac.ops.check_for_link(hw);
4828 link_active = adapter->hw.mac.serdes_has_link;
4831 case e1000_media_type_unknown:
4835 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4836 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4837 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
4838 e_info("Gigabit has been disabled, downgrading speed\n");
4844 static void e1000e_enable_receives(struct e1000_adapter *adapter)
4846 /* make sure the receive unit is started */
4847 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4848 (adapter->flags & FLAG_RESTART_NOW)) {
4849 struct e1000_hw *hw = &adapter->hw;
4850 u32 rctl = er32(RCTL);
4852 ew32(RCTL, rctl | E1000_RCTL_EN);
4853 adapter->flags &= ~FLAG_RESTART_NOW;
4857 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
4859 struct e1000_hw *hw = &adapter->hw;
4861 /* With 82574 controllers, PHY needs to be checked periodically
4862 * for hung state and reset, if two calls return true
4864 if (e1000_check_phy_82574(hw))
4865 adapter->phy_hang_count++;
4867 adapter->phy_hang_count = 0;
4869 if (adapter->phy_hang_count > 1) {
4870 adapter->phy_hang_count = 0;
4871 e_dbg("PHY appears hung - resetting\n");
4872 schedule_work(&adapter->reset_task);
4877 * e1000_watchdog - Timer Call-back
4878 * @data: pointer to adapter cast into an unsigned long
4880 static void e1000_watchdog(unsigned long data)
4882 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
4884 /* Do the rest outside of interrupt context */
4885 schedule_work(&adapter->watchdog_task);
4887 /* TODO: make this use queue_delayed_work() */
4890 static void e1000_watchdog_task(struct work_struct *work)
4892 struct e1000_adapter *adapter = container_of(work,
4893 struct e1000_adapter,
4895 struct net_device *netdev = adapter->netdev;
4896 struct e1000_mac_info *mac = &adapter->hw.mac;
4897 struct e1000_phy_info *phy = &adapter->hw.phy;
4898 struct e1000_ring *tx_ring = adapter->tx_ring;
4899 struct e1000_hw *hw = &adapter->hw;
4902 if (test_bit(__E1000_DOWN, &adapter->state))
4905 link = e1000e_has_link(adapter);
4906 if ((netif_carrier_ok(netdev)) && link) {
4907 /* Cancel scheduled suspend requests. */
4908 pm_runtime_resume(netdev->dev.parent);
4910 e1000e_enable_receives(adapter);
4914 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4915 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4916 e1000_update_mng_vlan(adapter);
4919 if (!netif_carrier_ok(netdev)) {
4922 /* Cancel scheduled suspend requests. */
4923 pm_runtime_resume(netdev->dev.parent);
4925 /* update snapshot of PHY registers on LSC */
4926 e1000_phy_read_status(adapter);
4927 mac->ops.get_link_up_info(&adapter->hw,
4928 &adapter->link_speed,
4929 &adapter->link_duplex);
4930 e1000_print_link_info(adapter);
4932 /* check if SmartSpeed worked */
4933 e1000e_check_downshift(hw);
4934 if (phy->speed_downgraded)
4936 "Link Speed was downgraded by SmartSpeed\n");
4938 /* On supported PHYs, check for duplex mismatch only
4939 * if link has autonegotiated at 10/100 half
4941 if ((hw->phy.type == e1000_phy_igp_3 ||
4942 hw->phy.type == e1000_phy_bm) &&
4944 (adapter->link_speed == SPEED_10 ||
4945 adapter->link_speed == SPEED_100) &&
4946 (adapter->link_duplex == HALF_DUPLEX)) {
4949 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
4951 if (!(autoneg_exp & EXPANSION_NWAY))
4952 e_info("Autonegotiated half duplex but link partner cannot autoneg. Try forcing full duplex if link gets many collisions.\n");
4955 /* adjust timeout factor according to speed/duplex */
4956 adapter->tx_timeout_factor = 1;
4957 switch (adapter->link_speed) {
4960 adapter->tx_timeout_factor = 16;
4964 adapter->tx_timeout_factor = 10;
4968 /* workaround: re-program speed mode bit after
4971 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4975 tarc0 = er32(TARC(0));
4976 tarc0 &= ~SPEED_MODE_BIT;
4977 ew32(TARC(0), tarc0);
4980 /* disable TSO for pcie and 10/100 speeds, to avoid
4981 * some hardware issues
4983 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4984 switch (adapter->link_speed) {
4987 e_info("10/100 speed: disabling TSO\n");
4988 netdev->features &= ~NETIF_F_TSO;
4989 netdev->features &= ~NETIF_F_TSO6;
4992 netdev->features |= NETIF_F_TSO;
4993 netdev->features |= NETIF_F_TSO6;
5001 /* enable transmits in the hardware, need to do this
5002 * after setting TARC(0)
5005 tctl |= E1000_TCTL_EN;
5008 /* Perform any post-link-up configuration before
5009 * reporting link up.
5011 if (phy->ops.cfg_on_link_up)
5012 phy->ops.cfg_on_link_up(hw);
5014 netif_carrier_on(netdev);
5016 if (!test_bit(__E1000_DOWN, &adapter->state))
5017 mod_timer(&adapter->phy_info_timer,
5018 round_jiffies(jiffies + 2 * HZ));
5021 if (netif_carrier_ok(netdev)) {
5022 adapter->link_speed = 0;
5023 adapter->link_duplex = 0;
5024 /* Link status message must follow this format */
5025 pr_info("%s NIC Link is Down\n", adapter->netdev->name);
5026 netif_carrier_off(netdev);
5027 if (!test_bit(__E1000_DOWN, &adapter->state))
5028 mod_timer(&adapter->phy_info_timer,
5029 round_jiffies(jiffies + 2 * HZ));
5031 /* 8000ES2LAN requires a Rx packet buffer work-around
5032 * on link down event; reset the controller to flush
5033 * the Rx packet buffer.
5035 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
5036 adapter->flags |= FLAG_RESTART_NOW;
5038 pm_schedule_suspend(netdev->dev.parent,
5044 spin_lock(&adapter->stats64_lock);
5045 e1000e_update_stats(adapter);
5047 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
5048 adapter->tpt_old = adapter->stats.tpt;
5049 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
5050 adapter->colc_old = adapter->stats.colc;
5052 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
5053 adapter->gorc_old = adapter->stats.gorc;
5054 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
5055 adapter->gotc_old = adapter->stats.gotc;
5056 spin_unlock(&adapter->stats64_lock);
5058 /* If the link is lost the controller stops DMA, but
5059 * if there is queued Tx work it cannot be done. So
5060 * reset the controller to flush the Tx packet buffers.
5062 if (!netif_carrier_ok(netdev) &&
5063 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
5064 adapter->flags |= FLAG_RESTART_NOW;
5066 /* If reset is necessary, do it outside of interrupt context. */
5067 if (adapter->flags & FLAG_RESTART_NOW) {
5068 schedule_work(&adapter->reset_task);
5069 /* return immediately since reset is imminent */
5073 e1000e_update_adaptive(&adapter->hw);
5075 /* Simple mode for Interrupt Throttle Rate (ITR) */
5076 if (adapter->itr_setting == 4) {
5077 /* Symmetric Tx/Rx gets a reduced ITR=2000;
5078 * Total asymmetrical Tx or Rx gets ITR=8000;
5079 * everyone else is between 2000-8000.
5081 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5082 u32 dif = (adapter->gotc > adapter->gorc ?
5083 adapter->gotc - adapter->gorc :
5084 adapter->gorc - adapter->gotc) / 10000;
5085 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5087 e1000e_write_itr(adapter, itr);
5090 /* Cause software interrupt to ensure Rx ring is cleaned */
5091 if (adapter->msix_entries)
5092 ew32(ICS, adapter->rx_ring->ims_val);
5094 ew32(ICS, E1000_ICS_RXDMT0);
5096 /* flush pending descriptors to memory before detecting Tx hang */
5097 e1000e_flush_descriptors(adapter);
5099 /* Force detection of hung controller every watchdog period */
5100 adapter->detect_tx_hung = true;
5102 /* With 82571 controllers, LAA may be overwritten due to controller
5103 * reset from the other port. Set the appropriate LAA in RAR[0]
5105 if (e1000e_get_laa_state_82571(hw))
5106 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5108 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5109 e1000e_check_82574_phy_workaround(adapter);
5111 /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5112 if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5113 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5114 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5116 adapter->rx_hwtstamp_cleared++;
5118 adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5122 /* Reset the timer */
5123 if (!test_bit(__E1000_DOWN, &adapter->state))
5124 mod_timer(&adapter->watchdog_timer,
5125 round_jiffies(jiffies + 2 * HZ));
5128 #define E1000_TX_FLAGS_CSUM 0x00000001
5129 #define E1000_TX_FLAGS_VLAN 0x00000002
5130 #define E1000_TX_FLAGS_TSO 0x00000004
5131 #define E1000_TX_FLAGS_IPV4 0x00000008
5132 #define E1000_TX_FLAGS_NO_FCS 0x00000010
5133 #define E1000_TX_FLAGS_HWTSTAMP 0x00000020
5134 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
5135 #define E1000_TX_FLAGS_VLAN_SHIFT 16
5137 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb)
5139 struct e1000_context_desc *context_desc;
5140 struct e1000_buffer *buffer_info;
5144 u8 ipcss, ipcso, tucss, tucso, hdr_len;
5147 if (!skb_is_gso(skb))
5150 err = skb_cow_head(skb, 0);
5154 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5155 mss = skb_shinfo(skb)->gso_size;
5156 if (skb->protocol == htons(ETH_P_IP)) {
5157 struct iphdr *iph = ip_hdr(skb);
5160 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5162 cmd_length = E1000_TXD_CMD_IP;
5163 ipcse = skb_transport_offset(skb) - 1;
5164 } else if (skb_is_gso_v6(skb)) {
5165 ipv6_hdr(skb)->payload_len = 0;
5166 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5167 &ipv6_hdr(skb)->daddr,
5171 ipcss = skb_network_offset(skb);
5172 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5173 tucss = skb_transport_offset(skb);
5174 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5176 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5177 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5179 i = tx_ring->next_to_use;
5180 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5181 buffer_info = &tx_ring->buffer_info[i];
5183 context_desc->lower_setup.ip_fields.ipcss = ipcss;
5184 context_desc->lower_setup.ip_fields.ipcso = ipcso;
5185 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5186 context_desc->upper_setup.tcp_fields.tucss = tucss;
5187 context_desc->upper_setup.tcp_fields.tucso = tucso;
5188 context_desc->upper_setup.tcp_fields.tucse = 0;
5189 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5190 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5191 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5193 buffer_info->time_stamp = jiffies;
5194 buffer_info->next_to_watch = i;
5197 if (i == tx_ring->count)
5199 tx_ring->next_to_use = i;
5204 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb)
5206 struct e1000_adapter *adapter = tx_ring->adapter;
5207 struct e1000_context_desc *context_desc;
5208 struct e1000_buffer *buffer_info;
5211 u32 cmd_len = E1000_TXD_CMD_DEXT;
5214 if (skb->ip_summed != CHECKSUM_PARTIAL)
5217 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
5218 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
5220 protocol = skb->protocol;
5223 case cpu_to_be16(ETH_P_IP):
5224 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5225 cmd_len |= E1000_TXD_CMD_TCP;
5227 case cpu_to_be16(ETH_P_IPV6):
5228 /* XXX not handling all IPV6 headers */
5229 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5230 cmd_len |= E1000_TXD_CMD_TCP;
5233 if (unlikely(net_ratelimit()))
5234 e_warn("checksum_partial proto=%x!\n",
5235 be16_to_cpu(protocol));
5239 css = skb_checksum_start_offset(skb);
5241 i = tx_ring->next_to_use;
5242 buffer_info = &tx_ring->buffer_info[i];
5243 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5245 context_desc->lower_setup.ip_config = 0;
5246 context_desc->upper_setup.tcp_fields.tucss = css;
5247 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5248 context_desc->upper_setup.tcp_fields.tucse = 0;
5249 context_desc->tcp_seg_setup.data = 0;
5250 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5252 buffer_info->time_stamp = jiffies;
5253 buffer_info->next_to_watch = i;
5256 if (i == tx_ring->count)
5258 tx_ring->next_to_use = i;
5263 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5264 unsigned int first, unsigned int max_per_txd,
5265 unsigned int nr_frags)
5267 struct e1000_adapter *adapter = tx_ring->adapter;
5268 struct pci_dev *pdev = adapter->pdev;
5269 struct e1000_buffer *buffer_info;
5270 unsigned int len = skb_headlen(skb);
5271 unsigned int offset = 0, size, count = 0, i;
5272 unsigned int f, bytecount, segs;
5274 i = tx_ring->next_to_use;
5277 buffer_info = &tx_ring->buffer_info[i];
5278 size = min(len, max_per_txd);
5280 buffer_info->length = size;
5281 buffer_info->time_stamp = jiffies;
5282 buffer_info->next_to_watch = i;
5283 buffer_info->dma = dma_map_single(&pdev->dev,
5285 size, DMA_TO_DEVICE);
5286 buffer_info->mapped_as_page = false;
5287 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5296 if (i == tx_ring->count)
5301 for (f = 0; f < nr_frags; f++) {
5302 const struct skb_frag_struct *frag;
5304 frag = &skb_shinfo(skb)->frags[f];
5305 len = skb_frag_size(frag);
5310 if (i == tx_ring->count)
5313 buffer_info = &tx_ring->buffer_info[i];
5314 size = min(len, max_per_txd);
5316 buffer_info->length = size;
5317 buffer_info->time_stamp = jiffies;
5318 buffer_info->next_to_watch = i;
5319 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5322 buffer_info->mapped_as_page = true;
5323 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5332 segs = skb_shinfo(skb)->gso_segs ? : 1;
5333 /* multiply data chunks by size of headers */
5334 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5336 tx_ring->buffer_info[i].skb = skb;
5337 tx_ring->buffer_info[i].segs = segs;
5338 tx_ring->buffer_info[i].bytecount = bytecount;
5339 tx_ring->buffer_info[first].next_to_watch = i;
5344 dev_err(&pdev->dev, "Tx DMA map failed\n");
5345 buffer_info->dma = 0;
5351 i += tx_ring->count;
5353 buffer_info = &tx_ring->buffer_info[i];
5354 e1000_put_txbuf(tx_ring, buffer_info);
5360 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5362 struct e1000_adapter *adapter = tx_ring->adapter;
5363 struct e1000_tx_desc *tx_desc = NULL;
5364 struct e1000_buffer *buffer_info;
5365 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5368 if (tx_flags & E1000_TX_FLAGS_TSO) {
5369 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5371 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5373 if (tx_flags & E1000_TX_FLAGS_IPV4)
5374 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5377 if (tx_flags & E1000_TX_FLAGS_CSUM) {
5378 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5379 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5382 if (tx_flags & E1000_TX_FLAGS_VLAN) {
5383 txd_lower |= E1000_TXD_CMD_VLE;
5384 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5387 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5388 txd_lower &= ~(E1000_TXD_CMD_IFCS);
5390 if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5391 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5392 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5395 i = tx_ring->next_to_use;
5398 buffer_info = &tx_ring->buffer_info[i];
5399 tx_desc = E1000_TX_DESC(*tx_ring, i);
5400 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5401 tx_desc->lower.data = cpu_to_le32(txd_lower |
5402 buffer_info->length);
5403 tx_desc->upper.data = cpu_to_le32(txd_upper);
5406 if (i == tx_ring->count)
5408 } while (--count > 0);
5410 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5412 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5413 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5414 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5416 /* Force memory writes to complete before letting h/w
5417 * know there are new descriptors to fetch. (Only
5418 * applicable for weak-ordered memory model archs,
5423 tx_ring->next_to_use = i;
5425 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5426 e1000e_update_tdt_wa(tx_ring, i);
5428 writel(i, tx_ring->tail);
5430 /* we need this if more than one processor can write to our tail
5431 * at a time, it synchronizes IO on IA64/Altix systems
5436 #define MINIMUM_DHCP_PACKET_SIZE 282
5437 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5438 struct sk_buff *skb)
5440 struct e1000_hw *hw = &adapter->hw;
5443 if (vlan_tx_tag_present(skb) &&
5444 !((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5445 (adapter->hw.mng_cookie.status &
5446 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5449 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5452 if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5456 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5459 if (ip->protocol != IPPROTO_UDP)
5462 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5463 if (ntohs(udp->dest) != 67)
5466 offset = (u8 *)udp + 8 - skb->data;
5467 length = skb->len - offset;
5468 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5474 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5476 struct e1000_adapter *adapter = tx_ring->adapter;
5478 netif_stop_queue(adapter->netdev);
5479 /* Herbert's original patch had:
5480 * smp_mb__after_netif_stop_queue();
5481 * but since that doesn't exist yet, just open code it.
5485 /* We need to check again in a case another CPU has just
5486 * made room available.
5488 if (e1000_desc_unused(tx_ring) < size)
5492 netif_start_queue(adapter->netdev);
5493 ++adapter->restart_queue;
5497 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5499 BUG_ON(size > tx_ring->count);
5501 if (e1000_desc_unused(tx_ring) >= size)
5503 return __e1000_maybe_stop_tx(tx_ring, size);
5506 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5507 struct net_device *netdev)
5509 struct e1000_adapter *adapter = netdev_priv(netdev);
5510 struct e1000_ring *tx_ring = adapter->tx_ring;
5512 unsigned int tx_flags = 0;
5513 unsigned int len = skb_headlen(skb);
5514 unsigned int nr_frags;
5520 if (test_bit(__E1000_DOWN, &adapter->state)) {
5521 dev_kfree_skb_any(skb);
5522 return NETDEV_TX_OK;
5525 if (skb->len <= 0) {
5526 dev_kfree_skb_any(skb);
5527 return NETDEV_TX_OK;
5530 /* The minimum packet size with TCTL.PSP set is 17 bytes so
5531 * pad skb in order to meet this minimum size requirement
5533 if (unlikely(skb->len < 17)) {
5534 if (skb_pad(skb, 17 - skb->len))
5535 return NETDEV_TX_OK;
5537 skb_set_tail_pointer(skb, 17);
5540 mss = skb_shinfo(skb)->gso_size;
5544 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5545 * points to just header, pull a few bytes of payload from
5546 * frags into skb->data
5548 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5549 /* we do this workaround for ES2LAN, but it is un-necessary,
5550 * avoiding it could save a lot of cycles
5552 if (skb->data_len && (hdr_len == len)) {
5553 unsigned int pull_size;
5555 pull_size = min_t(unsigned int, 4, skb->data_len);
5556 if (!__pskb_pull_tail(skb, pull_size)) {
5557 e_err("__pskb_pull_tail failed.\n");
5558 dev_kfree_skb_any(skb);
5559 return NETDEV_TX_OK;
5561 len = skb_headlen(skb);
5565 /* reserve a descriptor for the offload context */
5566 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5570 count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5572 nr_frags = skb_shinfo(skb)->nr_frags;
5573 for (f = 0; f < nr_frags; f++)
5574 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5575 adapter->tx_fifo_limit);
5577 if (adapter->hw.mac.tx_pkt_filtering)
5578 e1000_transfer_dhcp_info(adapter, skb);
5580 /* need: count + 2 desc gap to keep tail from touching
5581 * head, otherwise try next time
5583 if (e1000_maybe_stop_tx(tx_ring, count + 2))
5584 return NETDEV_TX_BUSY;
5586 if (vlan_tx_tag_present(skb)) {
5587 tx_flags |= E1000_TX_FLAGS_VLAN;
5588 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
5591 first = tx_ring->next_to_use;
5593 tso = e1000_tso(tx_ring, skb);
5595 dev_kfree_skb_any(skb);
5596 return NETDEV_TX_OK;
5600 tx_flags |= E1000_TX_FLAGS_TSO;
5601 else if (e1000_tx_csum(tx_ring, skb))
5602 tx_flags |= E1000_TX_FLAGS_CSUM;
5604 /* Old method was to assume IPv4 packet by default if TSO was enabled.
5605 * 82571 hardware supports TSO capabilities for IPv6 as well...
5606 * no longer assume, we must.
5608 if (skb->protocol == htons(ETH_P_IP))
5609 tx_flags |= E1000_TX_FLAGS_IPV4;
5611 if (unlikely(skb->no_fcs))
5612 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5614 /* if count is 0 then mapping error has occurred */
5615 count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5618 if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5619 !adapter->tx_hwtstamp_skb)) {
5620 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5621 tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5622 adapter->tx_hwtstamp_skb = skb_get(skb);
5623 adapter->tx_hwtstamp_start = jiffies;
5624 schedule_work(&adapter->tx_hwtstamp_work);
5626 skb_tx_timestamp(skb);
5629 netdev_sent_queue(netdev, skb->len);
5630 e1000_tx_queue(tx_ring, tx_flags, count);
5631 /* Make sure there is space in the ring for the next send. */
5632 e1000_maybe_stop_tx(tx_ring,
5634 DIV_ROUND_UP(PAGE_SIZE,
5635 adapter->tx_fifo_limit) + 2));
5637 dev_kfree_skb_any(skb);
5638 tx_ring->buffer_info[first].time_stamp = 0;
5639 tx_ring->next_to_use = first;
5642 return NETDEV_TX_OK;
5646 * e1000_tx_timeout - Respond to a Tx Hang
5647 * @netdev: network interface device structure
5649 static void e1000_tx_timeout(struct net_device *netdev)
5651 struct e1000_adapter *adapter = netdev_priv(netdev);
5653 /* Do the reset outside of interrupt context */
5654 adapter->tx_timeout_count++;
5655 schedule_work(&adapter->reset_task);
5658 static void e1000_reset_task(struct work_struct *work)
5660 struct e1000_adapter *adapter;
5661 adapter = container_of(work, struct e1000_adapter, reset_task);
5663 /* don't run the task if already down */
5664 if (test_bit(__E1000_DOWN, &adapter->state))
5667 if (!(adapter->flags & FLAG_RESTART_NOW)) {
5668 e1000e_dump(adapter);
5669 e_err("Reset adapter unexpectedly\n");
5671 e1000e_reinit_locked(adapter);
5675 * e1000_get_stats64 - Get System Network Statistics
5676 * @netdev: network interface device structure
5677 * @stats: rtnl_link_stats64 pointer
5679 * Returns the address of the device statistics structure.
5681 struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
5682 struct rtnl_link_stats64 *stats)
5684 struct e1000_adapter *adapter = netdev_priv(netdev);
5686 memset(stats, 0, sizeof(struct rtnl_link_stats64));
5687 spin_lock(&adapter->stats64_lock);
5688 e1000e_update_stats(adapter);
5689 /* Fill out the OS statistics structure */
5690 stats->rx_bytes = adapter->stats.gorc;
5691 stats->rx_packets = adapter->stats.gprc;
5692 stats->tx_bytes = adapter->stats.gotc;
5693 stats->tx_packets = adapter->stats.gptc;
5694 stats->multicast = adapter->stats.mprc;
5695 stats->collisions = adapter->stats.colc;
5699 /* RLEC on some newer hardware can be incorrect so build
5700 * our own version based on RUC and ROC
5702 stats->rx_errors = adapter->stats.rxerrc +
5703 adapter->stats.crcerrs + adapter->stats.algnerrc +
5704 adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5705 stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
5706 stats->rx_crc_errors = adapter->stats.crcerrs;
5707 stats->rx_frame_errors = adapter->stats.algnerrc;
5708 stats->rx_missed_errors = adapter->stats.mpc;
5711 stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5712 stats->tx_aborted_errors = adapter->stats.ecol;
5713 stats->tx_window_errors = adapter->stats.latecol;
5714 stats->tx_carrier_errors = adapter->stats.tncrs;
5716 /* Tx Dropped needs to be maintained elsewhere */
5718 spin_unlock(&adapter->stats64_lock);
5723 * e1000_change_mtu - Change the Maximum Transfer Unit
5724 * @netdev: network interface device structure
5725 * @new_mtu: new value for maximum frame size
5727 * Returns 0 on success, negative on failure
5729 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
5731 struct e1000_adapter *adapter = netdev_priv(netdev);
5732 int max_frame = new_mtu + VLAN_HLEN + ETH_HLEN + ETH_FCS_LEN;
5734 /* Jumbo frame support */
5735 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
5736 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
5737 e_err("Jumbo Frames not supported.\n");
5741 /* Supported frame sizes */
5742 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
5743 (max_frame > adapter->max_hw_frame_size)) {
5744 e_err("Unsupported MTU setting\n");
5748 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
5749 if ((adapter->hw.mac.type >= e1000_pch2lan) &&
5750 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
5751 (new_mtu > ETH_DATA_LEN)) {
5752 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
5756 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
5757 usleep_range(1000, 2000);
5758 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
5759 adapter->max_frame_size = max_frame;
5760 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5761 netdev->mtu = new_mtu;
5763 pm_runtime_get_sync(netdev->dev.parent);
5765 if (netif_running(netdev))
5766 e1000e_down(adapter, true);
5768 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
5769 * means we reserve 2 more, this pushes us to allocate from the next
5771 * i.e. RXBUFFER_2048 --> size-4096 slab
5772 * However with the new *_jumbo_rx* routines, jumbo receives will use
5776 if (max_frame <= 2048)
5777 adapter->rx_buffer_len = 2048;
5779 adapter->rx_buffer_len = 4096;
5781 /* adjust allocation if LPE protects us, and we aren't using SBP */
5782 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
5783 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
5784 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
5787 if (netif_running(netdev))
5790 e1000e_reset(adapter);
5792 pm_runtime_put_sync(netdev->dev.parent);
5794 clear_bit(__E1000_RESETTING, &adapter->state);
5799 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
5802 struct e1000_adapter *adapter = netdev_priv(netdev);
5803 struct mii_ioctl_data *data = if_mii(ifr);
5805 if (adapter->hw.phy.media_type != e1000_media_type_copper)
5810 data->phy_id = adapter->hw.phy.addr;
5813 e1000_phy_read_status(adapter);
5815 switch (data->reg_num & 0x1F) {
5817 data->val_out = adapter->phy_regs.bmcr;
5820 data->val_out = adapter->phy_regs.bmsr;
5823 data->val_out = (adapter->hw.phy.id >> 16);
5826 data->val_out = (adapter->hw.phy.id & 0xFFFF);
5829 data->val_out = adapter->phy_regs.advertise;
5832 data->val_out = adapter->phy_regs.lpa;
5835 data->val_out = adapter->phy_regs.expansion;
5838 data->val_out = adapter->phy_regs.ctrl1000;
5841 data->val_out = adapter->phy_regs.stat1000;
5844 data->val_out = adapter->phy_regs.estatus;
5858 * e1000e_hwtstamp_ioctl - control hardware time stamping
5859 * @netdev: network interface device structure
5860 * @ifreq: interface request
5862 * Outgoing time stamping can be enabled and disabled. Play nice and
5863 * disable it when requested, although it shouldn't cause any overhead
5864 * when no packet needs it. At most one packet in the queue may be
5865 * marked for time stamping, otherwise it would be impossible to tell
5866 * for sure to which packet the hardware time stamp belongs.
5868 * Incoming time stamping has to be configured via the hardware filters.
5869 * Not all combinations are supported, in particular event type has to be
5870 * specified. Matching the kind of event packet is not supported, with the
5871 * exception of "all V2 events regardless of level 2 or 4".
5873 static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
5875 struct e1000_adapter *adapter = netdev_priv(netdev);
5876 struct hwtstamp_config config;
5879 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
5882 ret_val = e1000e_config_hwtstamp(adapter, &config);
5886 switch (config.rx_filter) {
5887 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
5888 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
5889 case HWTSTAMP_FILTER_PTP_V2_SYNC:
5890 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
5891 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
5892 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
5893 /* With V2 type filters which specify a Sync or Delay Request,
5894 * Path Delay Request/Response messages are also time stamped
5895 * by hardware so notify the caller the requested packets plus
5896 * some others are time stamped.
5898 config.rx_filter = HWTSTAMP_FILTER_SOME;
5904 return copy_to_user(ifr->ifr_data, &config,
5905 sizeof(config)) ? -EFAULT : 0;
5908 static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
5910 struct e1000_adapter *adapter = netdev_priv(netdev);
5912 return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config,
5913 sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0;
5916 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5922 return e1000_mii_ioctl(netdev, ifr, cmd);
5924 return e1000e_hwtstamp_set(netdev, ifr);
5926 return e1000e_hwtstamp_get(netdev, ifr);
5932 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
5934 struct e1000_hw *hw = &adapter->hw;
5935 u32 i, mac_reg, wuc;
5936 u16 phy_reg, wuc_enable;
5939 /* copy MAC RARs to PHY RARs */
5940 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
5942 retval = hw->phy.ops.acquire(hw);
5944 e_err("Could not acquire PHY\n");
5948 /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
5949 retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
5953 /* copy MAC MTA to PHY MTA - only needed for pchlan */
5954 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
5955 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
5956 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
5957 (u16)(mac_reg & 0xFFFF));
5958 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
5959 (u16)((mac_reg >> 16) & 0xFFFF));
5962 /* configure PHY Rx Control register */
5963 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
5964 mac_reg = er32(RCTL);
5965 if (mac_reg & E1000_RCTL_UPE)
5966 phy_reg |= BM_RCTL_UPE;
5967 if (mac_reg & E1000_RCTL_MPE)
5968 phy_reg |= BM_RCTL_MPE;
5969 phy_reg &= ~(BM_RCTL_MO_MASK);
5970 if (mac_reg & E1000_RCTL_MO_3)
5971 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
5972 << BM_RCTL_MO_SHIFT);
5973 if (mac_reg & E1000_RCTL_BAM)
5974 phy_reg |= BM_RCTL_BAM;
5975 if (mac_reg & E1000_RCTL_PMCF)
5976 phy_reg |= BM_RCTL_PMCF;
5977 mac_reg = er32(CTRL);
5978 if (mac_reg & E1000_CTRL_RFCE)
5979 phy_reg |= BM_RCTL_RFCE;
5980 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
5982 wuc = E1000_WUC_PME_EN;
5983 if (wufc & (E1000_WUFC_MAG | E1000_WUFC_LNKC))
5984 wuc |= E1000_WUC_APME;
5986 /* enable PHY wakeup in MAC register */
5988 ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |
5989 E1000_WUC_PME_STATUS | wuc));
5991 /* configure and enable PHY wakeup in PHY registers */
5992 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
5993 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, wuc);
5995 /* activate PHY wakeup */
5996 wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
5997 retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
5999 e_err("Could not set PHY Host Wakeup bit\n");
6001 hw->phy.ops.release(hw);
6006 static int e1000e_pm_freeze(struct device *dev)
6008 struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6009 struct e1000_adapter *adapter = netdev_priv(netdev);
6011 netif_device_detach(netdev);
6013 if (netif_running(netdev)) {
6014 int count = E1000_CHECK_RESET_COUNT;
6016 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6017 usleep_range(10000, 20000);
6019 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6021 /* Quiesce the device without resetting the hardware */
6022 e1000e_down(adapter, false);
6023 e1000_free_irq(adapter);
6025 e1000e_reset_interrupt_capability(adapter);
6027 /* Allow time for pending master requests to run */
6028 e1000e_disable_pcie_master(&adapter->hw);
6033 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
6035 struct net_device *netdev = pci_get_drvdata(pdev);
6036 struct e1000_adapter *adapter = netdev_priv(netdev);
6037 struct e1000_hw *hw = &adapter->hw;
6038 u32 ctrl, ctrl_ext, rctl, status;
6039 /* Runtime suspend should only enable wakeup for link changes */
6040 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
6043 status = er32(STATUS);
6044 if (status & E1000_STATUS_LU)
6045 wufc &= ~E1000_WUFC_LNKC;
6048 e1000_setup_rctl(adapter);
6049 e1000e_set_rx_mode(netdev);
6051 /* turn on all-multi mode if wake on multicast is enabled */
6052 if (wufc & E1000_WUFC_MC) {
6054 rctl |= E1000_RCTL_MPE;
6059 ctrl |= E1000_CTRL_ADVD3WUC;
6060 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
6061 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
6064 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
6065 adapter->hw.phy.media_type ==
6066 e1000_media_type_internal_serdes) {
6067 /* keep the laser running in D3 */
6068 ctrl_ext = er32(CTRL_EXT);
6069 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
6070 ew32(CTRL_EXT, ctrl_ext);
6074 e1000e_power_up_phy(adapter);
6076 if (adapter->flags & FLAG_IS_ICH)
6077 e1000_suspend_workarounds_ich8lan(&adapter->hw);
6079 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6080 /* enable wakeup by the PHY */
6081 retval = e1000_init_phy_wakeup(adapter, wufc);
6085 /* enable wakeup by the MAC */
6087 ew32(WUC, E1000_WUC_PME_EN);
6093 e1000_power_down_phy(adapter);
6096 if (adapter->hw.phy.type == e1000_phy_igp_3) {
6097 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6098 } else if (hw->mac.type == e1000_pch_lpt) {
6099 if (!(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC)))
6100 /* ULP does not support wake from unicast, multicast
6103 retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
6110 /* Release control of h/w to f/w. If f/w is AMT enabled, this
6111 * would have already happened in close and is redundant.
6113 e1000e_release_hw_control(adapter);
6115 pci_clear_master(pdev);
6117 /* The pci-e switch on some quad port adapters will report a
6118 * correctable error when the MAC transitions from D0 to D3. To
6119 * prevent this we need to mask off the correctable errors on the
6120 * downstream port of the pci-e switch.
6122 * We don't have the associated upstream bridge while assigning
6123 * the PCI device into guest. For example, the KVM on power is
6126 if (adapter->flags & FLAG_IS_QUAD_PORT) {
6127 struct pci_dev *us_dev = pdev->bus->self;
6133 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6134 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6135 (devctl & ~PCI_EXP_DEVCTL_CERE));
6137 pci_save_state(pdev);
6138 pci_prepare_to_sleep(pdev);
6140 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6147 * e1000e_disable_aspm - Disable ASPM states
6148 * @pdev: pointer to PCI device struct
6149 * @state: bit-mask of ASPM states to disable
6151 * Some devices *must* have certain ASPM states disabled per hardware errata.
6153 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6155 struct pci_dev *parent = pdev->bus->self;
6156 u16 aspm_dis_mask = 0;
6157 u16 pdev_aspmc, parent_aspmc;
6160 case PCIE_LINK_STATE_L0S:
6161 case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6162 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6163 /* fall-through - can't have L1 without L0s */
6164 case PCIE_LINK_STATE_L1:
6165 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6171 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6172 pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6175 pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6177 parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6180 /* Nothing to do if the ASPM states to be disabled already are */
6181 if (!(pdev_aspmc & aspm_dis_mask) &&
6182 (!parent || !(parent_aspmc & aspm_dis_mask)))
6185 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6186 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6188 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6191 #ifdef CONFIG_PCIEASPM
6192 pci_disable_link_state_locked(pdev, state);
6194 /* Double-check ASPM control. If not disabled by the above, the
6195 * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6196 * not enabled); override by writing PCI config space directly.
6198 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6199 pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6201 if (!(aspm_dis_mask & pdev_aspmc))
6205 /* Both device and parent should have the same ASPM setting.
6206 * Disable ASPM in downstream component first and then upstream.
6208 pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6211 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6216 static int __e1000_resume(struct pci_dev *pdev)
6218 struct net_device *netdev = pci_get_drvdata(pdev);
6219 struct e1000_adapter *adapter = netdev_priv(netdev);
6220 struct e1000_hw *hw = &adapter->hw;
6221 u16 aspm_disable_flag = 0;
6223 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6224 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6225 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6226 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6227 if (aspm_disable_flag)
6228 e1000e_disable_aspm(pdev, aspm_disable_flag);
6230 pci_set_master(pdev);
6232 if (hw->mac.type >= e1000_pch2lan)
6233 e1000_resume_workarounds_pchlan(&adapter->hw);
6235 e1000e_power_up_phy(adapter);
6237 /* report the system wakeup cause from S3/S4 */
6238 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6241 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6243 e_info("PHY Wakeup cause - %s\n",
6244 phy_data & E1000_WUS_EX ? "Unicast Packet" :
6245 phy_data & E1000_WUS_MC ? "Multicast Packet" :
6246 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6247 phy_data & E1000_WUS_MAG ? "Magic Packet" :
6248 phy_data & E1000_WUS_LNKC ?
6249 "Link Status Change" : "other");
6251 e1e_wphy(&adapter->hw, BM_WUS, ~0);
6253 u32 wus = er32(WUS);
6256 e_info("MAC Wakeup cause - %s\n",
6257 wus & E1000_WUS_EX ? "Unicast Packet" :
6258 wus & E1000_WUS_MC ? "Multicast Packet" :
6259 wus & E1000_WUS_BC ? "Broadcast Packet" :
6260 wus & E1000_WUS_MAG ? "Magic Packet" :
6261 wus & E1000_WUS_LNKC ? "Link Status Change" :
6267 e1000e_reset(adapter);
6269 e1000_init_manageability_pt(adapter);
6271 /* If the controller has AMT, do not set DRV_LOAD until the interface
6272 * is up. For all other cases, let the f/w know that the h/w is now
6273 * under the control of the driver.
6275 if (!(adapter->flags & FLAG_HAS_AMT))
6276 e1000e_get_hw_control(adapter);
6281 #ifdef CONFIG_PM_SLEEP
6282 static int e1000e_pm_thaw(struct device *dev)
6284 struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6285 struct e1000_adapter *adapter = netdev_priv(netdev);
6287 e1000e_set_interrupt_capability(adapter);
6288 if (netif_running(netdev)) {
6289 u32 err = e1000_request_irq(adapter);
6297 netif_device_attach(netdev);
6302 static int e1000e_pm_suspend(struct device *dev)
6304 struct pci_dev *pdev = to_pci_dev(dev);
6306 e1000e_pm_freeze(dev);
6308 return __e1000_shutdown(pdev, false);
6311 static int e1000e_pm_resume(struct device *dev)
6313 struct pci_dev *pdev = to_pci_dev(dev);
6316 rc = __e1000_resume(pdev);
6320 return e1000e_pm_thaw(dev);
6322 #endif /* CONFIG_PM_SLEEP */
6324 #ifdef CONFIG_PM_RUNTIME
6325 static int e1000e_pm_runtime_idle(struct device *dev)
6327 struct pci_dev *pdev = to_pci_dev(dev);
6328 struct net_device *netdev = pci_get_drvdata(pdev);
6329 struct e1000_adapter *adapter = netdev_priv(netdev);
6331 if (!e1000e_has_link(adapter))
6332 pm_schedule_suspend(dev, 5 * MSEC_PER_SEC);
6337 static int e1000e_pm_runtime_resume(struct device *dev)
6339 struct pci_dev *pdev = to_pci_dev(dev);
6340 struct net_device *netdev = pci_get_drvdata(pdev);
6341 struct e1000_adapter *adapter = netdev_priv(netdev);
6344 rc = __e1000_resume(pdev);
6348 if (netdev->flags & IFF_UP)
6349 rc = e1000e_up(adapter);
6354 static int e1000e_pm_runtime_suspend(struct device *dev)
6356 struct pci_dev *pdev = to_pci_dev(dev);
6357 struct net_device *netdev = pci_get_drvdata(pdev);
6358 struct e1000_adapter *adapter = netdev_priv(netdev);
6360 if (netdev->flags & IFF_UP) {
6361 int count = E1000_CHECK_RESET_COUNT;
6363 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6364 usleep_range(10000, 20000);
6366 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6368 /* Down the device without resetting the hardware */
6369 e1000e_down(adapter, false);
6372 if (__e1000_shutdown(pdev, true)) {
6373 e1000e_pm_runtime_resume(dev);
6379 #endif /* CONFIG_PM_RUNTIME */
6380 #endif /* CONFIG_PM */
6382 static void e1000_shutdown(struct pci_dev *pdev)
6384 e1000e_pm_freeze(&pdev->dev);
6386 __e1000_shutdown(pdev, false);
6389 #ifdef CONFIG_NET_POLL_CONTROLLER
6391 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
6393 struct net_device *netdev = data;
6394 struct e1000_adapter *adapter = netdev_priv(netdev);
6396 if (adapter->msix_entries) {
6397 int vector, msix_irq;
6400 msix_irq = adapter->msix_entries[vector].vector;
6401 disable_irq(msix_irq);
6402 e1000_intr_msix_rx(msix_irq, netdev);
6403 enable_irq(msix_irq);
6406 msix_irq = adapter->msix_entries[vector].vector;
6407 disable_irq(msix_irq);
6408 e1000_intr_msix_tx(msix_irq, netdev);
6409 enable_irq(msix_irq);
6412 msix_irq = adapter->msix_entries[vector].vector;
6413 disable_irq(msix_irq);
6414 e1000_msix_other(msix_irq, netdev);
6415 enable_irq(msix_irq);
6423 * @netdev: network interface device structure
6425 * Polling 'interrupt' - used by things like netconsole to send skbs
6426 * without having to re-enable interrupts. It's not called while
6427 * the interrupt routine is executing.
6429 static void e1000_netpoll(struct net_device *netdev)
6431 struct e1000_adapter *adapter = netdev_priv(netdev);
6433 switch (adapter->int_mode) {
6434 case E1000E_INT_MODE_MSIX:
6435 e1000_intr_msix(adapter->pdev->irq, netdev);
6437 case E1000E_INT_MODE_MSI:
6438 disable_irq(adapter->pdev->irq);
6439 e1000_intr_msi(adapter->pdev->irq, netdev);
6440 enable_irq(adapter->pdev->irq);
6442 default: /* E1000E_INT_MODE_LEGACY */
6443 disable_irq(adapter->pdev->irq);
6444 e1000_intr(adapter->pdev->irq, netdev);
6445 enable_irq(adapter->pdev->irq);
6452 * e1000_io_error_detected - called when PCI error is detected
6453 * @pdev: Pointer to PCI device
6454 * @state: The current pci connection state
6456 * This function is called after a PCI bus error affecting
6457 * this device has been detected.
6459 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
6460 pci_channel_state_t state)
6462 struct net_device *netdev = pci_get_drvdata(pdev);
6463 struct e1000_adapter *adapter = netdev_priv(netdev);
6465 netif_device_detach(netdev);
6467 if (state == pci_channel_io_perm_failure)
6468 return PCI_ERS_RESULT_DISCONNECT;
6470 if (netif_running(netdev))
6471 e1000e_down(adapter, true);
6472 pci_disable_device(pdev);
6474 /* Request a slot slot reset. */
6475 return PCI_ERS_RESULT_NEED_RESET;
6479 * e1000_io_slot_reset - called after the pci bus has been reset.
6480 * @pdev: Pointer to PCI device
6482 * Restart the card from scratch, as if from a cold-boot. Implementation
6483 * resembles the first-half of the e1000e_pm_resume routine.
6485 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
6487 struct net_device *netdev = pci_get_drvdata(pdev);
6488 struct e1000_adapter *adapter = netdev_priv(netdev);
6489 struct e1000_hw *hw = &adapter->hw;
6490 u16 aspm_disable_flag = 0;
6492 pci_ers_result_t result;
6494 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6495 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6496 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6497 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6498 if (aspm_disable_flag)
6499 e1000e_disable_aspm(pdev, aspm_disable_flag);
6501 err = pci_enable_device_mem(pdev);
6504 "Cannot re-enable PCI device after reset.\n");
6505 result = PCI_ERS_RESULT_DISCONNECT;
6507 pdev->state_saved = true;
6508 pci_restore_state(pdev);
6509 pci_set_master(pdev);
6511 pci_enable_wake(pdev, PCI_D3hot, 0);
6512 pci_enable_wake(pdev, PCI_D3cold, 0);
6514 e1000e_reset(adapter);
6516 result = PCI_ERS_RESULT_RECOVERED;
6519 pci_cleanup_aer_uncorrect_error_status(pdev);
6525 * e1000_io_resume - called when traffic can start flowing again.
6526 * @pdev: Pointer to PCI device
6528 * This callback is called when the error recovery driver tells us that
6529 * its OK to resume normal operation. Implementation resembles the
6530 * second-half of the e1000e_pm_resume routine.
6532 static void e1000_io_resume(struct pci_dev *pdev)
6534 struct net_device *netdev = pci_get_drvdata(pdev);
6535 struct e1000_adapter *adapter = netdev_priv(netdev);
6537 e1000_init_manageability_pt(adapter);
6539 if (netif_running(netdev)) {
6540 if (e1000e_up(adapter)) {
6542 "can't bring device back up after reset\n");
6547 netif_device_attach(netdev);
6549 /* If the controller has AMT, do not set DRV_LOAD until the interface
6550 * is up. For all other cases, let the f/w know that the h/w is now
6551 * under the control of the driver.
6553 if (!(adapter->flags & FLAG_HAS_AMT))
6554 e1000e_get_hw_control(adapter);
6557 static void e1000_print_device_info(struct e1000_adapter *adapter)
6559 struct e1000_hw *hw = &adapter->hw;
6560 struct net_device *netdev = adapter->netdev;
6562 u8 pba_str[E1000_PBANUM_LENGTH];
6564 /* print bus type/speed/width info */
6565 e_info("(PCI Express:2.5GT/s:%s) %pM\n",
6567 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
6571 e_info("Intel(R) PRO/%s Network Connection\n",
6572 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
6573 ret_val = e1000_read_pba_string_generic(hw, pba_str,
6574 E1000_PBANUM_LENGTH);
6576 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
6577 e_info("MAC: %d, PHY: %d, PBA No: %s\n",
6578 hw->mac.type, hw->phy.type, pba_str);
6581 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
6583 struct e1000_hw *hw = &adapter->hw;
6587 if (hw->mac.type != e1000_82573)
6590 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
6592 if (!ret_val && (!(buf & (1 << 0)))) {
6593 /* Deep Smart Power Down (DSPD) */
6594 dev_warn(&adapter->pdev->dev,
6595 "Warning: detected DSPD enabled in EEPROM\n");
6599 static int e1000_set_features(struct net_device *netdev,
6600 netdev_features_t features)
6602 struct e1000_adapter *adapter = netdev_priv(netdev);
6603 netdev_features_t changed = features ^ netdev->features;
6605 if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
6606 adapter->flags |= FLAG_TSO_FORCE;
6608 if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
6609 NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
6613 if (changed & NETIF_F_RXFCS) {
6614 if (features & NETIF_F_RXFCS) {
6615 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6617 /* We need to take it back to defaults, which might mean
6618 * stripping is still disabled at the adapter level.
6620 if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
6621 adapter->flags2 |= FLAG2_CRC_STRIPPING;
6623 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6627 netdev->features = features;
6629 if (netif_running(netdev))
6630 e1000e_reinit_locked(adapter);
6632 e1000e_reset(adapter);
6637 static const struct net_device_ops e1000e_netdev_ops = {
6638 .ndo_open = e1000_open,
6639 .ndo_stop = e1000_close,
6640 .ndo_start_xmit = e1000_xmit_frame,
6641 .ndo_get_stats64 = e1000e_get_stats64,
6642 .ndo_set_rx_mode = e1000e_set_rx_mode,
6643 .ndo_set_mac_address = e1000_set_mac,
6644 .ndo_change_mtu = e1000_change_mtu,
6645 .ndo_do_ioctl = e1000_ioctl,
6646 .ndo_tx_timeout = e1000_tx_timeout,
6647 .ndo_validate_addr = eth_validate_addr,
6649 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
6650 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
6651 #ifdef CONFIG_NET_POLL_CONTROLLER
6652 .ndo_poll_controller = e1000_netpoll,
6654 .ndo_set_features = e1000_set_features,
6658 * e1000_probe - Device Initialization Routine
6659 * @pdev: PCI device information struct
6660 * @ent: entry in e1000_pci_tbl
6662 * Returns 0 on success, negative on failure
6664 * e1000_probe initializes an adapter identified by a pci_dev structure.
6665 * The OS initialization, configuring of the adapter private structure,
6666 * and a hardware reset occur.
6668 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
6670 struct net_device *netdev;
6671 struct e1000_adapter *adapter;
6672 struct e1000_hw *hw;
6673 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
6674 resource_size_t mmio_start, mmio_len;
6675 resource_size_t flash_start, flash_len;
6676 static int cards_found;
6677 u16 aspm_disable_flag = 0;
6678 int bars, i, err, pci_using_dac;
6679 u16 eeprom_data = 0;
6680 u16 eeprom_apme_mask = E1000_EEPROM_APME;
6682 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
6683 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6684 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
6685 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6686 if (aspm_disable_flag)
6687 e1000e_disable_aspm(pdev, aspm_disable_flag);
6689 err = pci_enable_device_mem(pdev);
6694 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
6698 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
6701 "No usable DMA configuration, aborting\n");
6706 bars = pci_select_bars(pdev, IORESOURCE_MEM);
6707 err = pci_request_selected_regions_exclusive(pdev, bars,
6708 e1000e_driver_name);
6712 /* AER (Advanced Error Reporting) hooks */
6713 pci_enable_pcie_error_reporting(pdev);
6715 pci_set_master(pdev);
6716 /* PCI config space info */
6717 err = pci_save_state(pdev);
6719 goto err_alloc_etherdev;
6722 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6724 goto err_alloc_etherdev;
6726 SET_NETDEV_DEV(netdev, &pdev->dev);
6728 netdev->irq = pdev->irq;
6730 pci_set_drvdata(pdev, netdev);
6731 adapter = netdev_priv(netdev);
6733 adapter->netdev = netdev;
6734 adapter->pdev = pdev;
6736 adapter->pba = ei->pba;
6737 adapter->flags = ei->flags;
6738 adapter->flags2 = ei->flags2;
6739 adapter->hw.adapter = adapter;
6740 adapter->hw.mac.type = ei->mac;
6741 adapter->max_hw_frame_size = ei->max_hw_frame_size;
6742 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
6744 mmio_start = pci_resource_start(pdev, 0);
6745 mmio_len = pci_resource_len(pdev, 0);
6748 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6749 if (!adapter->hw.hw_addr)
6752 if ((adapter->flags & FLAG_HAS_FLASH) &&
6753 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
6754 flash_start = pci_resource_start(pdev, 1);
6755 flash_len = pci_resource_len(pdev, 1);
6756 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6757 if (!adapter->hw.flash_address)
6761 /* Set default EEE advertisement */
6762 if (adapter->flags2 & FLAG2_HAS_EEE)
6763 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
6765 /* construct the net_device struct */
6766 netdev->netdev_ops = &e1000e_netdev_ops;
6767 e1000e_set_ethtool_ops(netdev);
6768 netdev->watchdog_timeo = 5 * HZ;
6769 netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
6770 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
6772 netdev->mem_start = mmio_start;
6773 netdev->mem_end = mmio_start + mmio_len;
6775 adapter->bd_number = cards_found++;
6777 e1000e_check_options(adapter);
6779 /* setup adapter struct */
6780 err = e1000_sw_init(adapter);
6784 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
6785 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
6786 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
6788 err = ei->get_variants(adapter);
6792 if ((adapter->flags & FLAG_IS_ICH) &&
6793 (adapter->flags & FLAG_READ_ONLY_NVM))
6794 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
6796 hw->mac.ops.get_bus_info(&adapter->hw);
6798 adapter->hw.phy.autoneg_wait_to_complete = 0;
6800 /* Copper options */
6801 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
6802 adapter->hw.phy.mdix = AUTO_ALL_MODES;
6803 adapter->hw.phy.disable_polarity_correction = 0;
6804 adapter->hw.phy.ms_type = e1000_ms_hw_default;
6807 if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
6808 dev_info(&pdev->dev,
6809 "PHY reset is blocked due to SOL/IDER session.\n");
6811 /* Set initial default active device features */
6812 netdev->features = (NETIF_F_SG |
6813 NETIF_F_HW_VLAN_CTAG_RX |
6814 NETIF_F_HW_VLAN_CTAG_TX |
6821 /* Set user-changeable features (subset of all device features) */
6822 netdev->hw_features = netdev->features;
6823 netdev->hw_features |= NETIF_F_RXFCS;
6824 netdev->priv_flags |= IFF_SUPP_NOFCS;
6825 netdev->hw_features |= NETIF_F_RXALL;
6827 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
6828 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
6830 netdev->vlan_features |= (NETIF_F_SG |
6835 netdev->priv_flags |= IFF_UNICAST_FLT;
6837 if (pci_using_dac) {
6838 netdev->features |= NETIF_F_HIGHDMA;
6839 netdev->vlan_features |= NETIF_F_HIGHDMA;
6842 if (e1000e_enable_mng_pass_thru(&adapter->hw))
6843 adapter->flags |= FLAG_MNG_PT_ENABLED;
6845 /* before reading the NVM, reset the controller to
6846 * put the device in a known good starting state
6848 adapter->hw.mac.ops.reset_hw(&adapter->hw);
6850 /* systems with ASPM and others may see the checksum fail on the first
6851 * attempt. Let's give it a few tries
6854 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
6857 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
6863 e1000_eeprom_checks(adapter);
6865 /* copy the MAC address */
6866 if (e1000e_read_mac_addr(&adapter->hw))
6868 "NVM Read Error while reading MAC address\n");
6870 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
6872 if (!is_valid_ether_addr(netdev->dev_addr)) {
6873 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
6879 init_timer(&adapter->watchdog_timer);
6880 adapter->watchdog_timer.function = e1000_watchdog;
6881 adapter->watchdog_timer.data = (unsigned long)adapter;
6883 init_timer(&adapter->phy_info_timer);
6884 adapter->phy_info_timer.function = e1000_update_phy_info;
6885 adapter->phy_info_timer.data = (unsigned long)adapter;
6887 INIT_WORK(&adapter->reset_task, e1000_reset_task);
6888 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
6889 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
6890 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
6891 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
6893 /* Initialize link parameters. User can change them with ethtool */
6894 adapter->hw.mac.autoneg = 1;
6895 adapter->fc_autoneg = true;
6896 adapter->hw.fc.requested_mode = e1000_fc_default;
6897 adapter->hw.fc.current_mode = e1000_fc_default;
6898 adapter->hw.phy.autoneg_advertised = 0x2f;
6900 /* Initial Wake on LAN setting - If APM wake is enabled in
6901 * the EEPROM, enable the ACPI Magic Packet filter
6903 if (adapter->flags & FLAG_APME_IN_WUC) {
6904 /* APME bit in EEPROM is mapped to WUC.APME */
6905 eeprom_data = er32(WUC);
6906 eeprom_apme_mask = E1000_WUC_APME;
6907 if ((hw->mac.type > e1000_ich10lan) &&
6908 (eeprom_data & E1000_WUC_PHY_WAKE))
6909 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
6910 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
6911 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
6912 (adapter->hw.bus.func == 1))
6913 e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_B,
6916 e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_A,
6920 /* fetch WoL from EEPROM */
6921 if (eeprom_data & eeprom_apme_mask)
6922 adapter->eeprom_wol |= E1000_WUFC_MAG;
6924 /* now that we have the eeprom settings, apply the special cases
6925 * where the eeprom may be wrong or the board simply won't support
6926 * wake on lan on a particular port
6928 if (!(adapter->flags & FLAG_HAS_WOL))
6929 adapter->eeprom_wol = 0;
6931 /* initialize the wol settings based on the eeprom settings */
6932 adapter->wol = adapter->eeprom_wol;
6934 /* make sure adapter isn't asleep if manageability is enabled */
6935 if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
6936 (hw->mac.ops.check_mng_mode(hw)))
6937 device_wakeup_enable(&pdev->dev);
6939 /* save off EEPROM version number */
6940 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
6942 /* reset the hardware with the new settings */
6943 e1000e_reset(adapter);
6945 /* If the controller has AMT, do not set DRV_LOAD until the interface
6946 * is up. For all other cases, let the f/w know that the h/w is now
6947 * under the control of the driver.
6949 if (!(adapter->flags & FLAG_HAS_AMT))
6950 e1000e_get_hw_control(adapter);
6952 strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
6953 err = register_netdev(netdev);
6957 /* carrier off reporting is important to ethtool even BEFORE open */
6958 netif_carrier_off(netdev);
6960 /* init PTP hardware clock */
6961 e1000e_ptp_init(adapter);
6963 e1000_print_device_info(adapter);
6965 if (pci_dev_run_wake(pdev))
6966 pm_runtime_put_noidle(&pdev->dev);
6971 if (!(adapter->flags & FLAG_HAS_AMT))
6972 e1000e_release_hw_control(adapter);
6974 if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
6975 e1000_phy_hw_reset(&adapter->hw);
6977 kfree(adapter->tx_ring);
6978 kfree(adapter->rx_ring);
6980 if (adapter->hw.flash_address)
6981 iounmap(adapter->hw.flash_address);
6982 e1000e_reset_interrupt_capability(adapter);
6984 iounmap(adapter->hw.hw_addr);
6986 free_netdev(netdev);
6988 pci_release_selected_regions(pdev,
6989 pci_select_bars(pdev, IORESOURCE_MEM));
6992 pci_disable_device(pdev);
6997 * e1000_remove - Device Removal Routine
6998 * @pdev: PCI device information struct
7000 * e1000_remove is called by the PCI subsystem to alert the driver
7001 * that it should release a PCI device. The could be caused by a
7002 * Hot-Plug event, or because the driver is going to be removed from
7005 static void e1000_remove(struct pci_dev *pdev)
7007 struct net_device *netdev = pci_get_drvdata(pdev);
7008 struct e1000_adapter *adapter = netdev_priv(netdev);
7009 bool down = test_bit(__E1000_DOWN, &adapter->state);
7011 e1000e_ptp_remove(adapter);
7013 /* The timers may be rescheduled, so explicitly disable them
7014 * from being rescheduled.
7017 set_bit(__E1000_DOWN, &adapter->state);
7018 del_timer_sync(&adapter->watchdog_timer);
7019 del_timer_sync(&adapter->phy_info_timer);
7021 cancel_work_sync(&adapter->reset_task);
7022 cancel_work_sync(&adapter->watchdog_task);
7023 cancel_work_sync(&adapter->downshift_task);
7024 cancel_work_sync(&adapter->update_phy_task);
7025 cancel_work_sync(&adapter->print_hang_task);
7027 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
7028 cancel_work_sync(&adapter->tx_hwtstamp_work);
7029 if (adapter->tx_hwtstamp_skb) {
7030 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
7031 adapter->tx_hwtstamp_skb = NULL;
7035 /* Don't lie to e1000_close() down the road. */
7037 clear_bit(__E1000_DOWN, &adapter->state);
7038 unregister_netdev(netdev);
7040 if (pci_dev_run_wake(pdev))
7041 pm_runtime_get_noresume(&pdev->dev);
7043 /* Release control of h/w to f/w. If f/w is AMT enabled, this
7044 * would have already happened in close and is redundant.
7046 e1000e_release_hw_control(adapter);
7048 e1000e_reset_interrupt_capability(adapter);
7049 kfree(adapter->tx_ring);
7050 kfree(adapter->rx_ring);
7052 iounmap(adapter->hw.hw_addr);
7053 if (adapter->hw.flash_address)
7054 iounmap(adapter->hw.flash_address);
7055 pci_release_selected_regions(pdev,
7056 pci_select_bars(pdev, IORESOURCE_MEM));
7058 free_netdev(netdev);
7061 pci_disable_pcie_error_reporting(pdev);
7063 pci_disable_device(pdev);
7066 /* PCI Error Recovery (ERS) */
7067 static const struct pci_error_handlers e1000_err_handler = {
7068 .error_detected = e1000_io_error_detected,
7069 .slot_reset = e1000_io_slot_reset,
7070 .resume = e1000_io_resume,
7073 static const struct pci_device_id e1000_pci_tbl[] = {
7074 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
7075 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
7076 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
7077 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
7079 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
7080 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
7081 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
7082 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
7083 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
7085 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
7086 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
7087 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
7088 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
7090 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
7091 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
7092 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
7094 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
7095 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
7096 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
7098 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
7099 board_80003es2lan },
7100 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
7101 board_80003es2lan },
7102 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
7103 board_80003es2lan },
7104 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
7105 board_80003es2lan },
7107 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
7108 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
7109 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
7110 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
7111 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
7112 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
7113 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
7114 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
7116 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
7117 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
7118 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
7119 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
7120 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
7121 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
7122 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
7123 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
7124 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
7126 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
7127 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
7128 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7130 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7131 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7132 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7134 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7135 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7136 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7137 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7139 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7140 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7142 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7143 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7144 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7145 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7146 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7147 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7148 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7149 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7151 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7153 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7155 static const struct dev_pm_ops e1000_pm_ops = {
7156 #ifdef CONFIG_PM_SLEEP
7157 .suspend = e1000e_pm_suspend,
7158 .resume = e1000e_pm_resume,
7159 .freeze = e1000e_pm_freeze,
7160 .thaw = e1000e_pm_thaw,
7161 .poweroff = e1000e_pm_suspend,
7162 .restore = e1000e_pm_resume,
7164 SET_RUNTIME_PM_OPS(e1000e_pm_runtime_suspend, e1000e_pm_runtime_resume,
7165 e1000e_pm_runtime_idle)
7168 /* PCI Device API Driver */
7169 static struct pci_driver e1000_driver = {
7170 .name = e1000e_driver_name,
7171 .id_table = e1000_pci_tbl,
7172 .probe = e1000_probe,
7173 .remove = e1000_remove,
7175 .pm = &e1000_pm_ops,
7177 .shutdown = e1000_shutdown,
7178 .err_handler = &e1000_err_handler
7182 * e1000_init_module - Driver Registration Routine
7184 * e1000_init_module is the first routine called when the driver is
7185 * loaded. All it does is register with the PCI subsystem.
7187 static int __init e1000_init_module(void)
7191 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
7192 e1000e_driver_version);
7193 pr_info("Copyright(c) 1999 - 2014 Intel Corporation.\n");
7194 ret = pci_register_driver(&e1000_driver);
7198 module_init(e1000_init_module);
7201 * e1000_exit_module - Driver Exit Cleanup Routine
7203 * e1000_exit_module is called just before the driver is removed
7206 static void __exit e1000_exit_module(void)
7208 pci_unregister_driver(&e1000_driver);
7210 module_exit(e1000_exit_module);
7212 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
7213 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7214 MODULE_LICENSE("GPL");
7215 MODULE_VERSION(DRV_VERSION);