1 /*******************************************************************************
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2013 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31 #include <linux/module.h>
32 #include <linux/types.h>
33 #include <linux/init.h>
34 #include <linux/pci.h>
35 #include <linux/vmalloc.h>
36 #include <linux/pagemap.h>
37 #include <linux/delay.h>
38 #include <linux/netdevice.h>
39 #include <linux/interrupt.h>
40 #include <linux/tcp.h>
41 #include <linux/ipv6.h>
42 #include <linux/slab.h>
43 #include <net/checksum.h>
44 #include <net/ip6_checksum.h>
45 #include <linux/ethtool.h>
46 #include <linux/if_vlan.h>
47 #include <linux/cpu.h>
48 #include <linux/smp.h>
49 #include <linux/pm_qos.h>
50 #include <linux/pm_runtime.h>
51 #include <linux/aer.h>
52 #include <linux/prefetch.h>
56 #define DRV_EXTRAVERSION "-k"
58 #define DRV_VERSION "2.3.2" DRV_EXTRAVERSION
59 char e1000e_driver_name[] = "e1000e";
60 const char e1000e_driver_version[] = DRV_VERSION;
62 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
63 static int debug = -1;
64 module_param(debug, int, 0);
65 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
67 static const struct e1000_info *e1000_info_tbl[] = {
68 [board_82571] = &e1000_82571_info,
69 [board_82572] = &e1000_82572_info,
70 [board_82573] = &e1000_82573_info,
71 [board_82574] = &e1000_82574_info,
72 [board_82583] = &e1000_82583_info,
73 [board_80003es2lan] = &e1000_es2_info,
74 [board_ich8lan] = &e1000_ich8_info,
75 [board_ich9lan] = &e1000_ich9_info,
76 [board_ich10lan] = &e1000_ich10_info,
77 [board_pchlan] = &e1000_pch_info,
78 [board_pch2lan] = &e1000_pch2_info,
79 [board_pch_lpt] = &e1000_pch_lpt_info,
82 struct e1000_reg_info {
87 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
88 /* General Registers */
90 {E1000_STATUS, "STATUS"},
91 {E1000_CTRL_EXT, "CTRL_EXT"},
93 /* Interrupt Registers */
98 {E1000_RDLEN(0), "RDLEN"},
99 {E1000_RDH(0), "RDH"},
100 {E1000_RDT(0), "RDT"},
101 {E1000_RDTR, "RDTR"},
102 {E1000_RXDCTL(0), "RXDCTL"},
104 {E1000_RDBAL(0), "RDBAL"},
105 {E1000_RDBAH(0), "RDBAH"},
106 {E1000_RDFH, "RDFH"},
107 {E1000_RDFT, "RDFT"},
108 {E1000_RDFHS, "RDFHS"},
109 {E1000_RDFTS, "RDFTS"},
110 {E1000_RDFPC, "RDFPC"},
113 {E1000_TCTL, "TCTL"},
114 {E1000_TDBAL(0), "TDBAL"},
115 {E1000_TDBAH(0), "TDBAH"},
116 {E1000_TDLEN(0), "TDLEN"},
117 {E1000_TDH(0), "TDH"},
118 {E1000_TDT(0), "TDT"},
119 {E1000_TIDV, "TIDV"},
120 {E1000_TXDCTL(0), "TXDCTL"},
121 {E1000_TADV, "TADV"},
122 {E1000_TARC(0), "TARC"},
123 {E1000_TDFH, "TDFH"},
124 {E1000_TDFT, "TDFT"},
125 {E1000_TDFHS, "TDFHS"},
126 {E1000_TDFTS, "TDFTS"},
127 {E1000_TDFPC, "TDFPC"},
129 /* List Terminator */
134 * e1000_regdump - register printout routine
135 * @hw: pointer to the HW structure
136 * @reginfo: pointer to the register info table
138 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
144 switch (reginfo->ofs) {
145 case E1000_RXDCTL(0):
146 for (n = 0; n < 2; n++)
147 regs[n] = __er32(hw, E1000_RXDCTL(n));
149 case E1000_TXDCTL(0):
150 for (n = 0; n < 2; n++)
151 regs[n] = __er32(hw, E1000_TXDCTL(n));
154 for (n = 0; n < 2; n++)
155 regs[n] = __er32(hw, E1000_TARC(n));
158 pr_info("%-15s %08x\n",
159 reginfo->name, __er32(hw, reginfo->ofs));
163 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
164 pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
167 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
168 struct e1000_buffer *bi)
171 struct e1000_ps_page *ps_page;
173 for (i = 0; i < adapter->rx_ps_pages; i++) {
174 ps_page = &bi->ps_pages[i];
177 pr_info("packet dump for ps_page %d:\n", i);
178 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
179 16, 1, page_address(ps_page->page),
186 * e1000e_dump - Print registers, Tx-ring and Rx-ring
187 * @adapter: board private structure
189 static void e1000e_dump(struct e1000_adapter *adapter)
191 struct net_device *netdev = adapter->netdev;
192 struct e1000_hw *hw = &adapter->hw;
193 struct e1000_reg_info *reginfo;
194 struct e1000_ring *tx_ring = adapter->tx_ring;
195 struct e1000_tx_desc *tx_desc;
200 struct e1000_buffer *buffer_info;
201 struct e1000_ring *rx_ring = adapter->rx_ring;
202 union e1000_rx_desc_packet_split *rx_desc_ps;
203 union e1000_rx_desc_extended *rx_desc;
213 if (!netif_msg_hw(adapter))
216 /* Print netdevice Info */
218 dev_info(&adapter->pdev->dev, "Net device Info\n");
219 pr_info("Device Name state trans_start last_rx\n");
220 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
221 netdev->state, netdev->trans_start, netdev->last_rx);
224 /* Print Registers */
225 dev_info(&adapter->pdev->dev, "Register Dump\n");
226 pr_info(" Register Name Value\n");
227 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
228 reginfo->name; reginfo++) {
229 e1000_regdump(hw, reginfo);
232 /* Print Tx Ring Summary */
233 if (!netdev || !netif_running(netdev))
236 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
237 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
238 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
239 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
240 0, tx_ring->next_to_use, tx_ring->next_to_clean,
241 (unsigned long long)buffer_info->dma,
243 buffer_info->next_to_watch,
244 (unsigned long long)buffer_info->time_stamp);
247 if (!netif_msg_tx_done(adapter))
248 goto rx_ring_summary;
250 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
252 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
254 * Legacy Transmit Descriptor
255 * +--------------------------------------------------------------+
256 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
257 * +--------------------------------------------------------------+
258 * 8 | Special | CSS | Status | CMD | CSO | Length |
259 * +--------------------------------------------------------------+
260 * 63 48 47 36 35 32 31 24 23 16 15 0
262 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
263 * 63 48 47 40 39 32 31 16 15 8 7 0
264 * +----------------------------------------------------------------+
265 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
266 * +----------------------------------------------------------------+
267 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
268 * +----------------------------------------------------------------+
269 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
271 * Extended Data Descriptor (DTYP=0x1)
272 * +----------------------------------------------------------------+
273 * 0 | Buffer Address [63:0] |
274 * +----------------------------------------------------------------+
275 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
276 * +----------------------------------------------------------------+
277 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
279 pr_info("Tl[desc] [address 63:0 ] [SpeCssSCmCsLen] [bi->dma ] leng ntw timestamp bi->skb <-- Legacy format\n");
280 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Context format\n");
281 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Data format\n");
282 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
283 const char *next_desc;
284 tx_desc = E1000_TX_DESC(*tx_ring, i);
285 buffer_info = &tx_ring->buffer_info[i];
286 u0 = (struct my_u0 *)tx_desc;
287 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
288 next_desc = " NTC/U";
289 else if (i == tx_ring->next_to_use)
291 else if (i == tx_ring->next_to_clean)
295 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p%s\n",
296 (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' :
297 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')),
299 (unsigned long long)le64_to_cpu(u0->a),
300 (unsigned long long)le64_to_cpu(u0->b),
301 (unsigned long long)buffer_info->dma,
302 buffer_info->length, buffer_info->next_to_watch,
303 (unsigned long long)buffer_info->time_stamp,
304 buffer_info->skb, next_desc);
306 if (netif_msg_pktdata(adapter) && buffer_info->skb)
307 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
308 16, 1, buffer_info->skb->data,
309 buffer_info->skb->len, true);
312 /* Print Rx Ring Summary */
314 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
315 pr_info("Queue [NTU] [NTC]\n");
316 pr_info(" %5d %5X %5X\n",
317 0, rx_ring->next_to_use, rx_ring->next_to_clean);
320 if (!netif_msg_rx_status(adapter))
323 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
324 switch (adapter->rx_ps_pages) {
328 /* [Extended] Packet Split Receive Descriptor Format
330 * +-----------------------------------------------------+
331 * 0 | Buffer Address 0 [63:0] |
332 * +-----------------------------------------------------+
333 * 8 | Buffer Address 1 [63:0] |
334 * +-----------------------------------------------------+
335 * 16 | Buffer Address 2 [63:0] |
336 * +-----------------------------------------------------+
337 * 24 | Buffer Address 3 [63:0] |
338 * +-----------------------------------------------------+
340 pr_info("R [desc] [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] [bi->skb] <-- Ext Pkt Split format\n");
341 /* [Extended] Receive Descriptor (Write-Back) Format
343 * 63 48 47 32 31 13 12 8 7 4 3 0
344 * +------------------------------------------------------+
345 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
346 * | Checksum | Ident | | Queue | | Type |
347 * +------------------------------------------------------+
348 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
349 * +------------------------------------------------------+
350 * 63 48 47 32 31 20 19 0
352 pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
353 for (i = 0; i < rx_ring->count; i++) {
354 const char *next_desc;
355 buffer_info = &rx_ring->buffer_info[i];
356 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
357 u1 = (struct my_u1 *)rx_desc_ps;
359 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
361 if (i == rx_ring->next_to_use)
363 else if (i == rx_ring->next_to_clean)
368 if (staterr & E1000_RXD_STAT_DD) {
369 /* Descriptor Done */
370 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX ---------------- %p%s\n",
372 (unsigned long long)le64_to_cpu(u1->a),
373 (unsigned long long)le64_to_cpu(u1->b),
374 (unsigned long long)le64_to_cpu(u1->c),
375 (unsigned long long)le64_to_cpu(u1->d),
376 buffer_info->skb, next_desc);
378 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX %016llX %p%s\n",
380 (unsigned long long)le64_to_cpu(u1->a),
381 (unsigned long long)le64_to_cpu(u1->b),
382 (unsigned long long)le64_to_cpu(u1->c),
383 (unsigned long long)le64_to_cpu(u1->d),
384 (unsigned long long)buffer_info->dma,
385 buffer_info->skb, next_desc);
387 if (netif_msg_pktdata(adapter))
388 e1000e_dump_ps_pages(adapter,
395 /* Extended Receive Descriptor (Read) Format
397 * +-----------------------------------------------------+
398 * 0 | Buffer Address [63:0] |
399 * +-----------------------------------------------------+
401 * +-----------------------------------------------------+
403 pr_info("R [desc] [buf addr 63:0 ] [reserved 63:0 ] [bi->dma ] [bi->skb] <-- Ext (Read) format\n");
404 /* Extended Receive Descriptor (Write-Back) Format
406 * 63 48 47 32 31 24 23 4 3 0
407 * +------------------------------------------------------+
409 * 0 +-------------------+ Rsvd | Reserved | MRQ RSS |
410 * | Packet | IP | | | Type |
411 * | Checksum | Ident | | | |
412 * +------------------------------------------------------+
413 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
414 * +------------------------------------------------------+
415 * 63 48 47 32 31 20 19 0
417 pr_info("RWB[desc] [cs ipid mrq] [vt ln xe xs] [bi->skb] <-- Ext (Write-Back) format\n");
419 for (i = 0; i < rx_ring->count; i++) {
420 const char *next_desc;
422 buffer_info = &rx_ring->buffer_info[i];
423 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
424 u1 = (struct my_u1 *)rx_desc;
425 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
427 if (i == rx_ring->next_to_use)
429 else if (i == rx_ring->next_to_clean)
434 if (staterr & E1000_RXD_STAT_DD) {
435 /* Descriptor Done */
436 pr_info("%s[0x%03X] %016llX %016llX ---------------- %p%s\n",
438 (unsigned long long)le64_to_cpu(u1->a),
439 (unsigned long long)le64_to_cpu(u1->b),
440 buffer_info->skb, next_desc);
442 pr_info("%s[0x%03X] %016llX %016llX %016llX %p%s\n",
444 (unsigned long long)le64_to_cpu(u1->a),
445 (unsigned long long)le64_to_cpu(u1->b),
446 (unsigned long long)buffer_info->dma,
447 buffer_info->skb, next_desc);
449 if (netif_msg_pktdata(adapter) &&
451 print_hex_dump(KERN_INFO, "",
452 DUMP_PREFIX_ADDRESS, 16,
454 buffer_info->skb->data,
455 adapter->rx_buffer_len,
463 * e1000_desc_unused - calculate if we have unused descriptors
465 static int e1000_desc_unused(struct e1000_ring *ring)
467 if (ring->next_to_clean > ring->next_to_use)
468 return ring->next_to_clean - ring->next_to_use - 1;
470 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
474 * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
475 * @adapter: board private structure
476 * @hwtstamps: time stamp structure to update
477 * @systim: unsigned 64bit system time value.
479 * Convert the system time value stored in the RX/TXSTMP registers into a
480 * hwtstamp which can be used by the upper level time stamping functions.
482 * The 'systim_lock' spinlock is used to protect the consistency of the
483 * system time value. This is needed because reading the 64 bit time
484 * value involves reading two 32 bit registers. The first read latches the
487 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
488 struct skb_shared_hwtstamps *hwtstamps,
494 spin_lock_irqsave(&adapter->systim_lock, flags);
495 ns = timecounter_cyc2time(&adapter->tc, systim);
496 spin_unlock_irqrestore(&adapter->systim_lock, flags);
498 memset(hwtstamps, 0, sizeof(*hwtstamps));
499 hwtstamps->hwtstamp = ns_to_ktime(ns);
503 * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
504 * @adapter: board private structure
505 * @status: descriptor extended error and status field
506 * @skb: particular skb to include time stamp
508 * If the time stamp is valid, convert it into the timecounter ns value
509 * and store that result into the shhwtstamps structure which is passed
510 * up the network stack.
512 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
515 struct e1000_hw *hw = &adapter->hw;
518 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
519 !(status & E1000_RXDEXT_STATERR_TST) ||
520 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
523 /* The Rx time stamp registers contain the time stamp. No other
524 * received packet will be time stamped until the Rx time stamp
525 * registers are read. Because only one packet can be time stamped
526 * at a time, the register values must belong to this packet and
527 * therefore none of the other additional attributes need to be
530 rxstmp = (u64)er32(RXSTMPL);
531 rxstmp |= (u64)er32(RXSTMPH) << 32;
532 e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
534 adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
538 * e1000_receive_skb - helper function to handle Rx indications
539 * @adapter: board private structure
540 * @staterr: descriptor extended error and status field as written by hardware
541 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
542 * @skb: pointer to sk_buff to be indicated to stack
544 static void e1000_receive_skb(struct e1000_adapter *adapter,
545 struct net_device *netdev, struct sk_buff *skb,
546 u32 staterr, __le16 vlan)
548 u16 tag = le16_to_cpu(vlan);
550 e1000e_rx_hwtstamp(adapter, staterr, skb);
552 skb->protocol = eth_type_trans(skb, netdev);
554 if (staterr & E1000_RXD_STAT_VP)
555 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
557 napi_gro_receive(&adapter->napi, skb);
561 * e1000_rx_checksum - Receive Checksum Offload
562 * @adapter: board private structure
563 * @status_err: receive descriptor status and error fields
564 * @csum: receive descriptor csum field
565 * @sk_buff: socket buffer with received data
567 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
570 u16 status = (u16)status_err;
571 u8 errors = (u8)(status_err >> 24);
573 skb_checksum_none_assert(skb);
575 /* Rx checksum disabled */
576 if (!(adapter->netdev->features & NETIF_F_RXCSUM))
579 /* Ignore Checksum bit is set */
580 if (status & E1000_RXD_STAT_IXSM)
583 /* TCP/UDP checksum error bit or IP checksum error bit is set */
584 if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
585 /* let the stack verify checksum errors */
586 adapter->hw_csum_err++;
590 /* TCP/UDP Checksum has not been calculated */
591 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
594 /* It must be a TCP or UDP packet with a valid checksum */
595 skb->ip_summed = CHECKSUM_UNNECESSARY;
596 adapter->hw_csum_good++;
599 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
601 struct e1000_adapter *adapter = rx_ring->adapter;
602 struct e1000_hw *hw = &adapter->hw;
603 s32 ret_val = __ew32_prepare(hw);
605 writel(i, rx_ring->tail);
607 if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) {
608 u32 rctl = er32(RCTL);
609 ew32(RCTL, rctl & ~E1000_RCTL_EN);
610 e_err("ME firmware caused invalid RDT - resetting\n");
611 schedule_work(&adapter->reset_task);
615 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
617 struct e1000_adapter *adapter = tx_ring->adapter;
618 struct e1000_hw *hw = &adapter->hw;
619 s32 ret_val = __ew32_prepare(hw);
621 writel(i, tx_ring->tail);
623 if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) {
624 u32 tctl = er32(TCTL);
625 ew32(TCTL, tctl & ~E1000_TCTL_EN);
626 e_err("ME firmware caused invalid TDT - resetting\n");
627 schedule_work(&adapter->reset_task);
632 * e1000_alloc_rx_buffers - Replace used receive buffers
633 * @rx_ring: Rx descriptor ring
635 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
636 int cleaned_count, gfp_t gfp)
638 struct e1000_adapter *adapter = rx_ring->adapter;
639 struct net_device *netdev = adapter->netdev;
640 struct pci_dev *pdev = adapter->pdev;
641 union e1000_rx_desc_extended *rx_desc;
642 struct e1000_buffer *buffer_info;
645 unsigned int bufsz = adapter->rx_buffer_len;
647 i = rx_ring->next_to_use;
648 buffer_info = &rx_ring->buffer_info[i];
650 while (cleaned_count--) {
651 skb = buffer_info->skb;
657 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
659 /* Better luck next round */
660 adapter->alloc_rx_buff_failed++;
664 buffer_info->skb = skb;
666 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
667 adapter->rx_buffer_len,
669 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
670 dev_err(&pdev->dev, "Rx DMA map failed\n");
671 adapter->rx_dma_failed++;
675 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
676 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
678 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
679 /* Force memory writes to complete before letting h/w
680 * know there are new descriptors to fetch. (Only
681 * applicable for weak-ordered memory model archs,
685 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
686 e1000e_update_rdt_wa(rx_ring, i);
688 writel(i, rx_ring->tail);
691 if (i == rx_ring->count)
693 buffer_info = &rx_ring->buffer_info[i];
696 rx_ring->next_to_use = i;
700 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
701 * @rx_ring: Rx descriptor ring
703 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
704 int cleaned_count, gfp_t gfp)
706 struct e1000_adapter *adapter = rx_ring->adapter;
707 struct net_device *netdev = adapter->netdev;
708 struct pci_dev *pdev = adapter->pdev;
709 union e1000_rx_desc_packet_split *rx_desc;
710 struct e1000_buffer *buffer_info;
711 struct e1000_ps_page *ps_page;
715 i = rx_ring->next_to_use;
716 buffer_info = &rx_ring->buffer_info[i];
718 while (cleaned_count--) {
719 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
721 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
722 ps_page = &buffer_info->ps_pages[j];
723 if (j >= adapter->rx_ps_pages) {
724 /* all unused desc entries get hw null ptr */
725 rx_desc->read.buffer_addr[j + 1] =
729 if (!ps_page->page) {
730 ps_page->page = alloc_page(gfp);
731 if (!ps_page->page) {
732 adapter->alloc_rx_buff_failed++;
735 ps_page->dma = dma_map_page(&pdev->dev,
739 if (dma_mapping_error(&pdev->dev,
741 dev_err(&adapter->pdev->dev,
742 "Rx DMA page map failed\n");
743 adapter->rx_dma_failed++;
747 /* Refresh the desc even if buffer_addrs
748 * didn't change because each write-back
751 rx_desc->read.buffer_addr[j + 1] =
752 cpu_to_le64(ps_page->dma);
755 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
759 adapter->alloc_rx_buff_failed++;
763 buffer_info->skb = skb;
764 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
765 adapter->rx_ps_bsize0,
767 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
768 dev_err(&pdev->dev, "Rx DMA map failed\n");
769 adapter->rx_dma_failed++;
771 dev_kfree_skb_any(skb);
772 buffer_info->skb = NULL;
776 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
778 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
779 /* Force memory writes to complete before letting h/w
780 * know there are new descriptors to fetch. (Only
781 * applicable for weak-ordered memory model archs,
785 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
786 e1000e_update_rdt_wa(rx_ring, i << 1);
788 writel(i << 1, rx_ring->tail);
792 if (i == rx_ring->count)
794 buffer_info = &rx_ring->buffer_info[i];
798 rx_ring->next_to_use = i;
802 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
803 * @rx_ring: Rx descriptor ring
804 * @cleaned_count: number of buffers to allocate this pass
807 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
808 int cleaned_count, gfp_t gfp)
810 struct e1000_adapter *adapter = rx_ring->adapter;
811 struct net_device *netdev = adapter->netdev;
812 struct pci_dev *pdev = adapter->pdev;
813 union e1000_rx_desc_extended *rx_desc;
814 struct e1000_buffer *buffer_info;
817 unsigned int bufsz = 256 - 16; /* for skb_reserve */
819 i = rx_ring->next_to_use;
820 buffer_info = &rx_ring->buffer_info[i];
822 while (cleaned_count--) {
823 skb = buffer_info->skb;
829 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
830 if (unlikely(!skb)) {
831 /* Better luck next round */
832 adapter->alloc_rx_buff_failed++;
836 buffer_info->skb = skb;
838 /* allocate a new page if necessary */
839 if (!buffer_info->page) {
840 buffer_info->page = alloc_page(gfp);
841 if (unlikely(!buffer_info->page)) {
842 adapter->alloc_rx_buff_failed++;
847 if (!buffer_info->dma) {
848 buffer_info->dma = dma_map_page(&pdev->dev,
849 buffer_info->page, 0,
852 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
853 adapter->alloc_rx_buff_failed++;
858 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
859 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
861 if (unlikely(++i == rx_ring->count))
863 buffer_info = &rx_ring->buffer_info[i];
866 if (likely(rx_ring->next_to_use != i)) {
867 rx_ring->next_to_use = i;
868 if (unlikely(i-- == 0))
869 i = (rx_ring->count - 1);
871 /* Force memory writes to complete before letting h/w
872 * know there are new descriptors to fetch. (Only
873 * applicable for weak-ordered memory model archs,
877 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
878 e1000e_update_rdt_wa(rx_ring, i);
880 writel(i, rx_ring->tail);
884 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
887 if (netdev->features & NETIF_F_RXHASH)
888 skb->rxhash = le32_to_cpu(rss);
892 * e1000_clean_rx_irq - Send received data up the network stack
893 * @rx_ring: Rx descriptor ring
895 * the return value indicates whether actual cleaning was done, there
896 * is no guarantee that everything was cleaned
898 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
901 struct e1000_adapter *adapter = rx_ring->adapter;
902 struct net_device *netdev = adapter->netdev;
903 struct pci_dev *pdev = adapter->pdev;
904 struct e1000_hw *hw = &adapter->hw;
905 union e1000_rx_desc_extended *rx_desc, *next_rxd;
906 struct e1000_buffer *buffer_info, *next_buffer;
909 int cleaned_count = 0;
910 bool cleaned = false;
911 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
913 i = rx_ring->next_to_clean;
914 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
915 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
916 buffer_info = &rx_ring->buffer_info[i];
918 while (staterr & E1000_RXD_STAT_DD) {
921 if (*work_done >= work_to_do)
924 rmb(); /* read descriptor and rx_buffer_info after status DD */
926 skb = buffer_info->skb;
927 buffer_info->skb = NULL;
929 prefetch(skb->data - NET_IP_ALIGN);
932 if (i == rx_ring->count)
934 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
937 next_buffer = &rx_ring->buffer_info[i];
941 dma_unmap_single(&pdev->dev, buffer_info->dma,
942 adapter->rx_buffer_len, DMA_FROM_DEVICE);
943 buffer_info->dma = 0;
945 length = le16_to_cpu(rx_desc->wb.upper.length);
947 /* !EOP means multiple descriptors were used to store a single
948 * packet, if that's the case we need to toss it. In fact, we
949 * need to toss every packet with the EOP bit clear and the
950 * next frame that _does_ have the EOP bit set, as it is by
951 * definition only a frame fragment
953 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
954 adapter->flags2 |= FLAG2_IS_DISCARDING;
956 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
957 /* All receives must fit into a single buffer */
958 e_dbg("Receive packet consumed multiple buffers\n");
960 buffer_info->skb = skb;
961 if (staterr & E1000_RXD_STAT_EOP)
962 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
966 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
967 !(netdev->features & NETIF_F_RXALL))) {
969 buffer_info->skb = skb;
973 /* adjust length to remove Ethernet CRC */
974 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
975 /* If configured to store CRC, don't subtract FCS,
976 * but keep the FCS bytes out of the total_rx_bytes
979 if (netdev->features & NETIF_F_RXFCS)
985 total_rx_bytes += length;
988 /* code added for copybreak, this should improve
989 * performance for small packets with large amounts
990 * of reassembly being done in the stack
992 if (length < copybreak) {
993 struct sk_buff *new_skb =
994 netdev_alloc_skb_ip_align(netdev, length);
996 skb_copy_to_linear_data_offset(new_skb,
1002 /* save the skb in buffer_info as good */
1003 buffer_info->skb = skb;
1006 /* else just continue with the old one */
1008 /* end copybreak code */
1009 skb_put(skb, length);
1011 /* Receive Checksum Offload */
1012 e1000_rx_checksum(adapter, staterr, skb);
1014 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1016 e1000_receive_skb(adapter, netdev, skb, staterr,
1017 rx_desc->wb.upper.vlan);
1020 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1022 /* return some buffers to hardware, one at a time is too slow */
1023 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1024 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1029 /* use prefetched values */
1031 buffer_info = next_buffer;
1033 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1035 rx_ring->next_to_clean = i;
1037 cleaned_count = e1000_desc_unused(rx_ring);
1039 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1041 adapter->total_rx_bytes += total_rx_bytes;
1042 adapter->total_rx_packets += total_rx_packets;
1046 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1047 struct e1000_buffer *buffer_info)
1049 struct e1000_adapter *adapter = tx_ring->adapter;
1051 if (buffer_info->dma) {
1052 if (buffer_info->mapped_as_page)
1053 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1054 buffer_info->length, DMA_TO_DEVICE);
1056 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1057 buffer_info->length, DMA_TO_DEVICE);
1058 buffer_info->dma = 0;
1060 if (buffer_info->skb) {
1061 dev_kfree_skb_any(buffer_info->skb);
1062 buffer_info->skb = NULL;
1064 buffer_info->time_stamp = 0;
1067 static void e1000_print_hw_hang(struct work_struct *work)
1069 struct e1000_adapter *adapter = container_of(work,
1070 struct e1000_adapter,
1072 struct net_device *netdev = adapter->netdev;
1073 struct e1000_ring *tx_ring = adapter->tx_ring;
1074 unsigned int i = tx_ring->next_to_clean;
1075 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1076 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1077 struct e1000_hw *hw = &adapter->hw;
1078 u16 phy_status, phy_1000t_status, phy_ext_status;
1081 if (test_bit(__E1000_DOWN, &adapter->state))
1084 if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1085 /* May be block on write-back, flush and detect again
1086 * flush pending descriptor writebacks to memory
1088 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1089 /* execute the writes immediately */
1091 /* Due to rare timing issues, write to TIDV again to ensure
1092 * the write is successful
1094 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1095 /* execute the writes immediately */
1097 adapter->tx_hang_recheck = true;
1100 /* Real hang detected */
1101 adapter->tx_hang_recheck = false;
1102 netif_stop_queue(netdev);
1104 e1e_rphy(hw, MII_BMSR, &phy_status);
1105 e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1106 e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1108 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1110 /* detected Hardware unit hang */
1111 e_err("Detected Hardware Unit Hang:\n"
1114 " next_to_use <%x>\n"
1115 " next_to_clean <%x>\n"
1116 "buffer_info[next_to_clean]:\n"
1117 " time_stamp <%lx>\n"
1118 " next_to_watch <%x>\n"
1120 " next_to_watch.status <%x>\n"
1123 "PHY 1000BASE-T Status <%x>\n"
1124 "PHY Extended Status <%x>\n"
1125 "PCI Status <%x>\n",
1126 readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1127 tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1128 eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1129 phy_status, phy_1000t_status, phy_ext_status, pci_status);
1131 /* Suggest workaround for known h/w issue */
1132 if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1133 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1137 * e1000e_tx_hwtstamp_work - check for Tx time stamp
1138 * @work: pointer to work struct
1140 * This work function polls the TSYNCTXCTL valid bit to determine when a
1141 * timestamp has been taken for the current stored skb. The timestamp must
1142 * be for this skb because only one such packet is allowed in the queue.
1144 static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1146 struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1148 struct e1000_hw *hw = &adapter->hw;
1150 if (!adapter->tx_hwtstamp_skb)
1153 if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1154 struct skb_shared_hwtstamps shhwtstamps;
1157 txstmp = er32(TXSTMPL);
1158 txstmp |= (u64)er32(TXSTMPH) << 32;
1160 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1162 skb_tstamp_tx(adapter->tx_hwtstamp_skb, &shhwtstamps);
1163 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1164 adapter->tx_hwtstamp_skb = NULL;
1166 /* reschedule to check later */
1167 schedule_work(&adapter->tx_hwtstamp_work);
1172 * e1000_clean_tx_irq - Reclaim resources after transmit completes
1173 * @tx_ring: Tx descriptor ring
1175 * the return value indicates whether actual cleaning was done, there
1176 * is no guarantee that everything was cleaned
1178 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1180 struct e1000_adapter *adapter = tx_ring->adapter;
1181 struct net_device *netdev = adapter->netdev;
1182 struct e1000_hw *hw = &adapter->hw;
1183 struct e1000_tx_desc *tx_desc, *eop_desc;
1184 struct e1000_buffer *buffer_info;
1185 unsigned int i, eop;
1186 unsigned int count = 0;
1187 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1188 unsigned int bytes_compl = 0, pkts_compl = 0;
1190 i = tx_ring->next_to_clean;
1191 eop = tx_ring->buffer_info[i].next_to_watch;
1192 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1194 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1195 (count < tx_ring->count)) {
1196 bool cleaned = false;
1197 rmb(); /* read buffer_info after eop_desc */
1198 for (; !cleaned; count++) {
1199 tx_desc = E1000_TX_DESC(*tx_ring, i);
1200 buffer_info = &tx_ring->buffer_info[i];
1201 cleaned = (i == eop);
1204 total_tx_packets += buffer_info->segs;
1205 total_tx_bytes += buffer_info->bytecount;
1206 if (buffer_info->skb) {
1207 bytes_compl += buffer_info->skb->len;
1212 e1000_put_txbuf(tx_ring, buffer_info);
1213 tx_desc->upper.data = 0;
1216 if (i == tx_ring->count)
1220 if (i == tx_ring->next_to_use)
1222 eop = tx_ring->buffer_info[i].next_to_watch;
1223 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1226 tx_ring->next_to_clean = i;
1228 netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1230 #define TX_WAKE_THRESHOLD 32
1231 if (count && netif_carrier_ok(netdev) &&
1232 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1233 /* Make sure that anybody stopping the queue after this
1234 * sees the new next_to_clean.
1238 if (netif_queue_stopped(netdev) &&
1239 !(test_bit(__E1000_DOWN, &adapter->state))) {
1240 netif_wake_queue(netdev);
1241 ++adapter->restart_queue;
1245 if (adapter->detect_tx_hung) {
1246 /* Detect a transmit hang in hardware, this serializes the
1247 * check with the clearing of time_stamp and movement of i
1249 adapter->detect_tx_hung = false;
1250 if (tx_ring->buffer_info[i].time_stamp &&
1251 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1252 + (adapter->tx_timeout_factor * HZ)) &&
1253 !(er32(STATUS) & E1000_STATUS_TXOFF))
1254 schedule_work(&adapter->print_hang_task);
1256 adapter->tx_hang_recheck = false;
1258 adapter->total_tx_bytes += total_tx_bytes;
1259 adapter->total_tx_packets += total_tx_packets;
1260 return count < tx_ring->count;
1264 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1265 * @rx_ring: Rx descriptor ring
1267 * the return value indicates whether actual cleaning was done, there
1268 * is no guarantee that everything was cleaned
1270 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1273 struct e1000_adapter *adapter = rx_ring->adapter;
1274 struct e1000_hw *hw = &adapter->hw;
1275 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1276 struct net_device *netdev = adapter->netdev;
1277 struct pci_dev *pdev = adapter->pdev;
1278 struct e1000_buffer *buffer_info, *next_buffer;
1279 struct e1000_ps_page *ps_page;
1280 struct sk_buff *skb;
1282 u32 length, staterr;
1283 int cleaned_count = 0;
1284 bool cleaned = false;
1285 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1287 i = rx_ring->next_to_clean;
1288 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1289 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1290 buffer_info = &rx_ring->buffer_info[i];
1292 while (staterr & E1000_RXD_STAT_DD) {
1293 if (*work_done >= work_to_do)
1296 skb = buffer_info->skb;
1297 rmb(); /* read descriptor and rx_buffer_info after status DD */
1299 /* in the packet split case this is header only */
1300 prefetch(skb->data - NET_IP_ALIGN);
1303 if (i == rx_ring->count)
1305 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1308 next_buffer = &rx_ring->buffer_info[i];
1312 dma_unmap_single(&pdev->dev, buffer_info->dma,
1313 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1314 buffer_info->dma = 0;
1316 /* see !EOP comment in other Rx routine */
1317 if (!(staterr & E1000_RXD_STAT_EOP))
1318 adapter->flags2 |= FLAG2_IS_DISCARDING;
1320 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1321 e_dbg("Packet Split buffers didn't pick up the full packet\n");
1322 dev_kfree_skb_irq(skb);
1323 if (staterr & E1000_RXD_STAT_EOP)
1324 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1328 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1329 !(netdev->features & NETIF_F_RXALL))) {
1330 dev_kfree_skb_irq(skb);
1334 length = le16_to_cpu(rx_desc->wb.middle.length0);
1337 e_dbg("Last part of the packet spanning multiple descriptors\n");
1338 dev_kfree_skb_irq(skb);
1343 skb_put(skb, length);
1346 /* this looks ugly, but it seems compiler issues make
1347 * it more efficient than reusing j
1349 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1351 /* page alloc/put takes too long and effects small
1352 * packet throughput, so unsplit small packets and
1353 * save the alloc/put only valid in softirq (napi)
1354 * context to call kmap_*
1356 if (l1 && (l1 <= copybreak) &&
1357 ((length + l1) <= adapter->rx_ps_bsize0)) {
1360 ps_page = &buffer_info->ps_pages[0];
1362 /* there is no documentation about how to call
1363 * kmap_atomic, so we can't hold the mapping
1366 dma_sync_single_for_cpu(&pdev->dev,
1370 vaddr = kmap_atomic(ps_page->page);
1371 memcpy(skb_tail_pointer(skb), vaddr, l1);
1372 kunmap_atomic(vaddr);
1373 dma_sync_single_for_device(&pdev->dev,
1378 /* remove the CRC */
1379 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1380 if (!(netdev->features & NETIF_F_RXFCS))
1389 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1390 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1394 ps_page = &buffer_info->ps_pages[j];
1395 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1398 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1399 ps_page->page = NULL;
1401 skb->data_len += length;
1402 skb->truesize += PAGE_SIZE;
1405 /* strip the ethernet crc, problem is we're using pages now so
1406 * this whole operation can get a little cpu intensive
1408 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1409 if (!(netdev->features & NETIF_F_RXFCS))
1410 pskb_trim(skb, skb->len - 4);
1414 total_rx_bytes += skb->len;
1417 e1000_rx_checksum(adapter, staterr, skb);
1419 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1421 if (rx_desc->wb.upper.header_status &
1422 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1423 adapter->rx_hdr_split++;
1425 e1000_receive_skb(adapter, netdev, skb, staterr,
1426 rx_desc->wb.middle.vlan);
1429 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1430 buffer_info->skb = NULL;
1432 /* return some buffers to hardware, one at a time is too slow */
1433 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1434 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1439 /* use prefetched values */
1441 buffer_info = next_buffer;
1443 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1445 rx_ring->next_to_clean = i;
1447 cleaned_count = e1000_desc_unused(rx_ring);
1449 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1451 adapter->total_rx_bytes += total_rx_bytes;
1452 adapter->total_rx_packets += total_rx_packets;
1457 * e1000_consume_page - helper function
1459 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1464 skb->data_len += length;
1465 skb->truesize += PAGE_SIZE;
1469 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1470 * @adapter: board private structure
1472 * the return value indicates whether actual cleaning was done, there
1473 * is no guarantee that everything was cleaned
1475 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1478 struct e1000_adapter *adapter = rx_ring->adapter;
1479 struct net_device *netdev = adapter->netdev;
1480 struct pci_dev *pdev = adapter->pdev;
1481 union e1000_rx_desc_extended *rx_desc, *next_rxd;
1482 struct e1000_buffer *buffer_info, *next_buffer;
1483 u32 length, staterr;
1485 int cleaned_count = 0;
1486 bool cleaned = false;
1487 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1488 struct skb_shared_info *shinfo;
1490 i = rx_ring->next_to_clean;
1491 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1492 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1493 buffer_info = &rx_ring->buffer_info[i];
1495 while (staterr & E1000_RXD_STAT_DD) {
1496 struct sk_buff *skb;
1498 if (*work_done >= work_to_do)
1501 rmb(); /* read descriptor and rx_buffer_info after status DD */
1503 skb = buffer_info->skb;
1504 buffer_info->skb = NULL;
1507 if (i == rx_ring->count)
1509 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1512 next_buffer = &rx_ring->buffer_info[i];
1516 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1518 buffer_info->dma = 0;
1520 length = le16_to_cpu(rx_desc->wb.upper.length);
1522 /* errors is only valid for DD + EOP descriptors */
1523 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1524 ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1525 !(netdev->features & NETIF_F_RXALL)))) {
1526 /* recycle both page and skb */
1527 buffer_info->skb = skb;
1528 /* an error means any chain goes out the window too */
1529 if (rx_ring->rx_skb_top)
1530 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1531 rx_ring->rx_skb_top = NULL;
1534 #define rxtop (rx_ring->rx_skb_top)
1535 if (!(staterr & E1000_RXD_STAT_EOP)) {
1536 /* this descriptor is only the beginning (or middle) */
1538 /* this is the beginning of a chain */
1540 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1543 /* this is the middle of a chain */
1544 shinfo = skb_shinfo(rxtop);
1545 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1546 buffer_info->page, 0,
1548 /* re-use the skb, only consumed the page */
1549 buffer_info->skb = skb;
1551 e1000_consume_page(buffer_info, rxtop, length);
1555 /* end of the chain */
1556 shinfo = skb_shinfo(rxtop);
1557 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1558 buffer_info->page, 0,
1560 /* re-use the current skb, we only consumed the
1563 buffer_info->skb = skb;
1566 e1000_consume_page(buffer_info, skb, length);
1568 /* no chain, got EOP, this buf is the packet
1569 * copybreak to save the put_page/alloc_page
1571 if (length <= copybreak &&
1572 skb_tailroom(skb) >= length) {
1574 vaddr = kmap_atomic(buffer_info->page);
1575 memcpy(skb_tail_pointer(skb), vaddr,
1577 kunmap_atomic(vaddr);
1578 /* re-use the page, so don't erase
1581 skb_put(skb, length);
1583 skb_fill_page_desc(skb, 0,
1584 buffer_info->page, 0,
1586 e1000_consume_page(buffer_info, skb,
1592 /* Receive Checksum Offload */
1593 e1000_rx_checksum(adapter, staterr, skb);
1595 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1597 /* probably a little skewed due to removing CRC */
1598 total_rx_bytes += skb->len;
1601 /* eth type trans needs skb->data to point to something */
1602 if (!pskb_may_pull(skb, ETH_HLEN)) {
1603 e_err("pskb_may_pull failed.\n");
1604 dev_kfree_skb_irq(skb);
1608 e1000_receive_skb(adapter, netdev, skb, staterr,
1609 rx_desc->wb.upper.vlan);
1612 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1614 /* return some buffers to hardware, one at a time is too slow */
1615 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1616 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1621 /* use prefetched values */
1623 buffer_info = next_buffer;
1625 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1627 rx_ring->next_to_clean = i;
1629 cleaned_count = e1000_desc_unused(rx_ring);
1631 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1633 adapter->total_rx_bytes += total_rx_bytes;
1634 adapter->total_rx_packets += total_rx_packets;
1639 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1640 * @rx_ring: Rx descriptor ring
1642 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1644 struct e1000_adapter *adapter = rx_ring->adapter;
1645 struct e1000_buffer *buffer_info;
1646 struct e1000_ps_page *ps_page;
1647 struct pci_dev *pdev = adapter->pdev;
1650 /* Free all the Rx ring sk_buffs */
1651 for (i = 0; i < rx_ring->count; i++) {
1652 buffer_info = &rx_ring->buffer_info[i];
1653 if (buffer_info->dma) {
1654 if (adapter->clean_rx == e1000_clean_rx_irq)
1655 dma_unmap_single(&pdev->dev, buffer_info->dma,
1656 adapter->rx_buffer_len,
1658 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1659 dma_unmap_page(&pdev->dev, buffer_info->dma,
1660 PAGE_SIZE, DMA_FROM_DEVICE);
1661 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1662 dma_unmap_single(&pdev->dev, buffer_info->dma,
1663 adapter->rx_ps_bsize0,
1665 buffer_info->dma = 0;
1668 if (buffer_info->page) {
1669 put_page(buffer_info->page);
1670 buffer_info->page = NULL;
1673 if (buffer_info->skb) {
1674 dev_kfree_skb(buffer_info->skb);
1675 buffer_info->skb = NULL;
1678 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1679 ps_page = &buffer_info->ps_pages[j];
1682 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1685 put_page(ps_page->page);
1686 ps_page->page = NULL;
1690 /* there also may be some cached data from a chained receive */
1691 if (rx_ring->rx_skb_top) {
1692 dev_kfree_skb(rx_ring->rx_skb_top);
1693 rx_ring->rx_skb_top = NULL;
1696 /* Zero out the descriptor ring */
1697 memset(rx_ring->desc, 0, rx_ring->size);
1699 rx_ring->next_to_clean = 0;
1700 rx_ring->next_to_use = 0;
1701 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1703 writel(0, rx_ring->head);
1704 if (rx_ring->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
1705 e1000e_update_rdt_wa(rx_ring, 0);
1707 writel(0, rx_ring->tail);
1710 static void e1000e_downshift_workaround(struct work_struct *work)
1712 struct e1000_adapter *adapter = container_of(work,
1713 struct e1000_adapter,
1716 if (test_bit(__E1000_DOWN, &adapter->state))
1719 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1723 * e1000_intr_msi - Interrupt Handler
1724 * @irq: interrupt number
1725 * @data: pointer to a network interface device structure
1727 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1729 struct net_device *netdev = data;
1730 struct e1000_adapter *adapter = netdev_priv(netdev);
1731 struct e1000_hw *hw = &adapter->hw;
1732 u32 icr = er32(ICR);
1734 /* read ICR disables interrupts using IAM */
1735 if (icr & E1000_ICR_LSC) {
1736 hw->mac.get_link_status = true;
1737 /* ICH8 workaround-- Call gig speed drop workaround on cable
1738 * disconnect (LSC) before accessing any PHY registers
1740 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1741 (!(er32(STATUS) & E1000_STATUS_LU)))
1742 schedule_work(&adapter->downshift_task);
1744 /* 80003ES2LAN workaround-- For packet buffer work-around on
1745 * link down event; disable receives here in the ISR and reset
1746 * adapter in watchdog
1748 if (netif_carrier_ok(netdev) &&
1749 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1750 /* disable receives */
1751 u32 rctl = er32(RCTL);
1752 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1753 adapter->flags |= FLAG_RESTART_NOW;
1755 /* guard against interrupt when we're going down */
1756 if (!test_bit(__E1000_DOWN, &adapter->state))
1757 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1760 /* Reset on uncorrectable ECC error */
1761 if ((icr & E1000_ICR_ECCER) && (hw->mac.type == e1000_pch_lpt)) {
1762 u32 pbeccsts = er32(PBECCSTS);
1764 adapter->corr_errors +=
1765 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1766 adapter->uncorr_errors +=
1767 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1768 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1770 /* Do the reset outside of interrupt context */
1771 schedule_work(&adapter->reset_task);
1773 /* return immediately since reset is imminent */
1777 if (napi_schedule_prep(&adapter->napi)) {
1778 adapter->total_tx_bytes = 0;
1779 adapter->total_tx_packets = 0;
1780 adapter->total_rx_bytes = 0;
1781 adapter->total_rx_packets = 0;
1782 __napi_schedule(&adapter->napi);
1789 * e1000_intr - Interrupt Handler
1790 * @irq: interrupt number
1791 * @data: pointer to a network interface device structure
1793 static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1795 struct net_device *netdev = data;
1796 struct e1000_adapter *adapter = netdev_priv(netdev);
1797 struct e1000_hw *hw = &adapter->hw;
1798 u32 rctl, icr = er32(ICR);
1800 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1801 return IRQ_NONE; /* Not our interrupt */
1803 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1804 * not set, then the adapter didn't send an interrupt
1806 if (!(icr & E1000_ICR_INT_ASSERTED))
1809 /* Interrupt Auto-Mask...upon reading ICR,
1810 * interrupts are masked. No need for the
1814 if (icr & E1000_ICR_LSC) {
1815 hw->mac.get_link_status = true;
1816 /* ICH8 workaround-- Call gig speed drop workaround on cable
1817 * disconnect (LSC) before accessing any PHY registers
1819 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1820 (!(er32(STATUS) & E1000_STATUS_LU)))
1821 schedule_work(&adapter->downshift_task);
1823 /* 80003ES2LAN workaround--
1824 * For packet buffer work-around on link down event;
1825 * disable receives here in the ISR and
1826 * reset adapter in watchdog
1828 if (netif_carrier_ok(netdev) &&
1829 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1830 /* disable receives */
1832 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1833 adapter->flags |= FLAG_RESTART_NOW;
1835 /* guard against interrupt when we're going down */
1836 if (!test_bit(__E1000_DOWN, &adapter->state))
1837 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1840 /* Reset on uncorrectable ECC error */
1841 if ((icr & E1000_ICR_ECCER) && (hw->mac.type == e1000_pch_lpt)) {
1842 u32 pbeccsts = er32(PBECCSTS);
1844 adapter->corr_errors +=
1845 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1846 adapter->uncorr_errors +=
1847 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1848 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1850 /* Do the reset outside of interrupt context */
1851 schedule_work(&adapter->reset_task);
1853 /* return immediately since reset is imminent */
1857 if (napi_schedule_prep(&adapter->napi)) {
1858 adapter->total_tx_bytes = 0;
1859 adapter->total_tx_packets = 0;
1860 adapter->total_rx_bytes = 0;
1861 adapter->total_rx_packets = 0;
1862 __napi_schedule(&adapter->napi);
1868 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1870 struct net_device *netdev = data;
1871 struct e1000_adapter *adapter = netdev_priv(netdev);
1872 struct e1000_hw *hw = &adapter->hw;
1873 u32 icr = er32(ICR);
1875 if (!(icr & E1000_ICR_INT_ASSERTED)) {
1876 if (!test_bit(__E1000_DOWN, &adapter->state))
1877 ew32(IMS, E1000_IMS_OTHER);
1881 if (icr & adapter->eiac_mask)
1882 ew32(ICS, (icr & adapter->eiac_mask));
1884 if (icr & E1000_ICR_OTHER) {
1885 if (!(icr & E1000_ICR_LSC))
1886 goto no_link_interrupt;
1887 hw->mac.get_link_status = true;
1888 /* guard against interrupt when we're going down */
1889 if (!test_bit(__E1000_DOWN, &adapter->state))
1890 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1894 if (!test_bit(__E1000_DOWN, &adapter->state))
1895 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
1900 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1902 struct net_device *netdev = data;
1903 struct e1000_adapter *adapter = netdev_priv(netdev);
1904 struct e1000_hw *hw = &adapter->hw;
1905 struct e1000_ring *tx_ring = adapter->tx_ring;
1907 adapter->total_tx_bytes = 0;
1908 adapter->total_tx_packets = 0;
1910 if (!e1000_clean_tx_irq(tx_ring))
1911 /* Ring was not completely cleaned, so fire another interrupt */
1912 ew32(ICS, tx_ring->ims_val);
1917 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1919 struct net_device *netdev = data;
1920 struct e1000_adapter *adapter = netdev_priv(netdev);
1921 struct e1000_ring *rx_ring = adapter->rx_ring;
1923 /* Write the ITR value calculated at the end of the
1924 * previous interrupt.
1926 if (rx_ring->set_itr) {
1927 writel(1000000000 / (rx_ring->itr_val * 256),
1928 rx_ring->itr_register);
1929 rx_ring->set_itr = 0;
1932 if (napi_schedule_prep(&adapter->napi)) {
1933 adapter->total_rx_bytes = 0;
1934 adapter->total_rx_packets = 0;
1935 __napi_schedule(&adapter->napi);
1941 * e1000_configure_msix - Configure MSI-X hardware
1943 * e1000_configure_msix sets up the hardware to properly
1944 * generate MSI-X interrupts.
1946 static void e1000_configure_msix(struct e1000_adapter *adapter)
1948 struct e1000_hw *hw = &adapter->hw;
1949 struct e1000_ring *rx_ring = adapter->rx_ring;
1950 struct e1000_ring *tx_ring = adapter->tx_ring;
1952 u32 ctrl_ext, ivar = 0;
1954 adapter->eiac_mask = 0;
1956 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1957 if (hw->mac.type == e1000_82574) {
1958 u32 rfctl = er32(RFCTL);
1959 rfctl |= E1000_RFCTL_ACK_DIS;
1963 /* Configure Rx vector */
1964 rx_ring->ims_val = E1000_IMS_RXQ0;
1965 adapter->eiac_mask |= rx_ring->ims_val;
1966 if (rx_ring->itr_val)
1967 writel(1000000000 / (rx_ring->itr_val * 256),
1968 rx_ring->itr_register);
1970 writel(1, rx_ring->itr_register);
1971 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1973 /* Configure Tx vector */
1974 tx_ring->ims_val = E1000_IMS_TXQ0;
1976 if (tx_ring->itr_val)
1977 writel(1000000000 / (tx_ring->itr_val * 256),
1978 tx_ring->itr_register);
1980 writel(1, tx_ring->itr_register);
1981 adapter->eiac_mask |= tx_ring->ims_val;
1982 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1984 /* set vector for Other Causes, e.g. link changes */
1986 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1987 if (rx_ring->itr_val)
1988 writel(1000000000 / (rx_ring->itr_val * 256),
1989 hw->hw_addr + E1000_EITR_82574(vector));
1991 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1993 /* Cause Tx interrupts on every write back */
1998 /* enable MSI-X PBA support */
1999 ctrl_ext = er32(CTRL_EXT);
2000 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
2002 /* Auto-Mask Other interrupts upon ICR read */
2003 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
2004 ctrl_ext |= E1000_CTRL_EXT_EIAME;
2005 ew32(CTRL_EXT, ctrl_ext);
2009 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2011 if (adapter->msix_entries) {
2012 pci_disable_msix(adapter->pdev);
2013 kfree(adapter->msix_entries);
2014 adapter->msix_entries = NULL;
2015 } else if (adapter->flags & FLAG_MSI_ENABLED) {
2016 pci_disable_msi(adapter->pdev);
2017 adapter->flags &= ~FLAG_MSI_ENABLED;
2022 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2024 * Attempt to configure interrupts using the best available
2025 * capabilities of the hardware and kernel.
2027 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2032 switch (adapter->int_mode) {
2033 case E1000E_INT_MODE_MSIX:
2034 if (adapter->flags & FLAG_HAS_MSIX) {
2035 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2036 adapter->msix_entries = kcalloc(adapter->num_vectors,
2040 if (adapter->msix_entries) {
2041 for (i = 0; i < adapter->num_vectors; i++)
2042 adapter->msix_entries[i].entry = i;
2044 err = pci_enable_msix(adapter->pdev,
2045 adapter->msix_entries,
2046 adapter->num_vectors);
2050 /* MSI-X failed, so fall through and try MSI */
2051 e_err("Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.\n");
2052 e1000e_reset_interrupt_capability(adapter);
2054 adapter->int_mode = E1000E_INT_MODE_MSI;
2056 case E1000E_INT_MODE_MSI:
2057 if (!pci_enable_msi(adapter->pdev)) {
2058 adapter->flags |= FLAG_MSI_ENABLED;
2060 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2061 e_err("Failed to initialize MSI interrupts. Falling back to legacy interrupts.\n");
2064 case E1000E_INT_MODE_LEGACY:
2065 /* Don't do anything; this is the system default */
2069 /* store the number of vectors being used */
2070 adapter->num_vectors = 1;
2074 * e1000_request_msix - Initialize MSI-X interrupts
2076 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2079 static int e1000_request_msix(struct e1000_adapter *adapter)
2081 struct net_device *netdev = adapter->netdev;
2082 int err = 0, vector = 0;
2084 if (strlen(netdev->name) < (IFNAMSIZ - 5))
2085 snprintf(adapter->rx_ring->name,
2086 sizeof(adapter->rx_ring->name) - 1,
2087 "%s-rx-0", netdev->name);
2089 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2090 err = request_irq(adapter->msix_entries[vector].vector,
2091 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2095 adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2096 E1000_EITR_82574(vector);
2097 adapter->rx_ring->itr_val = adapter->itr;
2100 if (strlen(netdev->name) < (IFNAMSIZ - 5))
2101 snprintf(adapter->tx_ring->name,
2102 sizeof(adapter->tx_ring->name) - 1,
2103 "%s-tx-0", netdev->name);
2105 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2106 err = request_irq(adapter->msix_entries[vector].vector,
2107 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2111 adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2112 E1000_EITR_82574(vector);
2113 adapter->tx_ring->itr_val = adapter->itr;
2116 err = request_irq(adapter->msix_entries[vector].vector,
2117 e1000_msix_other, 0, netdev->name, netdev);
2121 e1000_configure_msix(adapter);
2127 * e1000_request_irq - initialize interrupts
2129 * Attempts to configure interrupts using the best available
2130 * capabilities of the hardware and kernel.
2132 static int e1000_request_irq(struct e1000_adapter *adapter)
2134 struct net_device *netdev = adapter->netdev;
2137 if (adapter->msix_entries) {
2138 err = e1000_request_msix(adapter);
2141 /* fall back to MSI */
2142 e1000e_reset_interrupt_capability(adapter);
2143 adapter->int_mode = E1000E_INT_MODE_MSI;
2144 e1000e_set_interrupt_capability(adapter);
2146 if (adapter->flags & FLAG_MSI_ENABLED) {
2147 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2148 netdev->name, netdev);
2152 /* fall back to legacy interrupt */
2153 e1000e_reset_interrupt_capability(adapter);
2154 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2157 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2158 netdev->name, netdev);
2160 e_err("Unable to allocate interrupt, Error: %d\n", err);
2165 static void e1000_free_irq(struct e1000_adapter *adapter)
2167 struct net_device *netdev = adapter->netdev;
2169 if (adapter->msix_entries) {
2172 free_irq(adapter->msix_entries[vector].vector, netdev);
2175 free_irq(adapter->msix_entries[vector].vector, netdev);
2178 /* Other Causes interrupt vector */
2179 free_irq(adapter->msix_entries[vector].vector, netdev);
2183 free_irq(adapter->pdev->irq, netdev);
2187 * e1000_irq_disable - Mask off interrupt generation on the NIC
2189 static void e1000_irq_disable(struct e1000_adapter *adapter)
2191 struct e1000_hw *hw = &adapter->hw;
2194 if (adapter->msix_entries)
2195 ew32(EIAC_82574, 0);
2198 if (adapter->msix_entries) {
2200 for (i = 0; i < adapter->num_vectors; i++)
2201 synchronize_irq(adapter->msix_entries[i].vector);
2203 synchronize_irq(adapter->pdev->irq);
2208 * e1000_irq_enable - Enable default interrupt generation settings
2210 static void e1000_irq_enable(struct e1000_adapter *adapter)
2212 struct e1000_hw *hw = &adapter->hw;
2214 if (adapter->msix_entries) {
2215 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2216 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
2217 } else if (hw->mac.type == e1000_pch_lpt) {
2218 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2220 ew32(IMS, IMS_ENABLE_MASK);
2226 * e1000e_get_hw_control - get control of the h/w from f/w
2227 * @adapter: address of board private structure
2229 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2230 * For ASF and Pass Through versions of f/w this means that
2231 * the driver is loaded. For AMT version (only with 82573)
2232 * of the f/w this means that the network i/f is open.
2234 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2236 struct e1000_hw *hw = &adapter->hw;
2240 /* Let firmware know the driver has taken over */
2241 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2243 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2244 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2245 ctrl_ext = er32(CTRL_EXT);
2246 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2251 * e1000e_release_hw_control - release control of the h/w to f/w
2252 * @adapter: address of board private structure
2254 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2255 * For ASF and Pass Through versions of f/w this means that the
2256 * driver is no longer loaded. For AMT version (only with 82573) i
2257 * of the f/w this means that the network i/f is closed.
2260 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2262 struct e1000_hw *hw = &adapter->hw;
2266 /* Let firmware taken over control of h/w */
2267 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2269 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2270 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2271 ctrl_ext = er32(CTRL_EXT);
2272 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2277 * e1000_alloc_ring_dma - allocate memory for a ring structure
2279 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2280 struct e1000_ring *ring)
2282 struct pci_dev *pdev = adapter->pdev;
2284 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2293 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2294 * @tx_ring: Tx descriptor ring
2296 * Return 0 on success, negative on failure
2298 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2300 struct e1000_adapter *adapter = tx_ring->adapter;
2301 int err = -ENOMEM, size;
2303 size = sizeof(struct e1000_buffer) * tx_ring->count;
2304 tx_ring->buffer_info = vzalloc(size);
2305 if (!tx_ring->buffer_info)
2308 /* round up to nearest 4K */
2309 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2310 tx_ring->size = ALIGN(tx_ring->size, 4096);
2312 err = e1000_alloc_ring_dma(adapter, tx_ring);
2316 tx_ring->next_to_use = 0;
2317 tx_ring->next_to_clean = 0;
2321 vfree(tx_ring->buffer_info);
2322 e_err("Unable to allocate memory for the transmit descriptor ring\n");
2327 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2328 * @rx_ring: Rx descriptor ring
2330 * Returns 0 on success, negative on failure
2332 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2334 struct e1000_adapter *adapter = rx_ring->adapter;
2335 struct e1000_buffer *buffer_info;
2336 int i, size, desc_len, err = -ENOMEM;
2338 size = sizeof(struct e1000_buffer) * rx_ring->count;
2339 rx_ring->buffer_info = vzalloc(size);
2340 if (!rx_ring->buffer_info)
2343 for (i = 0; i < rx_ring->count; i++) {
2344 buffer_info = &rx_ring->buffer_info[i];
2345 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2346 sizeof(struct e1000_ps_page),
2348 if (!buffer_info->ps_pages)
2352 desc_len = sizeof(union e1000_rx_desc_packet_split);
2354 /* Round up to nearest 4K */
2355 rx_ring->size = rx_ring->count * desc_len;
2356 rx_ring->size = ALIGN(rx_ring->size, 4096);
2358 err = e1000_alloc_ring_dma(adapter, rx_ring);
2362 rx_ring->next_to_clean = 0;
2363 rx_ring->next_to_use = 0;
2364 rx_ring->rx_skb_top = NULL;
2369 for (i = 0; i < rx_ring->count; i++) {
2370 buffer_info = &rx_ring->buffer_info[i];
2371 kfree(buffer_info->ps_pages);
2374 vfree(rx_ring->buffer_info);
2375 e_err("Unable to allocate memory for the receive descriptor ring\n");
2380 * e1000_clean_tx_ring - Free Tx Buffers
2381 * @tx_ring: Tx descriptor ring
2383 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2385 struct e1000_adapter *adapter = tx_ring->adapter;
2386 struct e1000_buffer *buffer_info;
2390 for (i = 0; i < tx_ring->count; i++) {
2391 buffer_info = &tx_ring->buffer_info[i];
2392 e1000_put_txbuf(tx_ring, buffer_info);
2395 netdev_reset_queue(adapter->netdev);
2396 size = sizeof(struct e1000_buffer) * tx_ring->count;
2397 memset(tx_ring->buffer_info, 0, size);
2399 memset(tx_ring->desc, 0, tx_ring->size);
2401 tx_ring->next_to_use = 0;
2402 tx_ring->next_to_clean = 0;
2404 writel(0, tx_ring->head);
2405 if (tx_ring->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2406 e1000e_update_tdt_wa(tx_ring, 0);
2408 writel(0, tx_ring->tail);
2412 * e1000e_free_tx_resources - Free Tx Resources per Queue
2413 * @tx_ring: Tx descriptor ring
2415 * Free all transmit software resources
2417 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2419 struct e1000_adapter *adapter = tx_ring->adapter;
2420 struct pci_dev *pdev = adapter->pdev;
2422 e1000_clean_tx_ring(tx_ring);
2424 vfree(tx_ring->buffer_info);
2425 tx_ring->buffer_info = NULL;
2427 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2429 tx_ring->desc = NULL;
2433 * e1000e_free_rx_resources - Free Rx Resources
2434 * @rx_ring: Rx descriptor ring
2436 * Free all receive software resources
2438 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2440 struct e1000_adapter *adapter = rx_ring->adapter;
2441 struct pci_dev *pdev = adapter->pdev;
2444 e1000_clean_rx_ring(rx_ring);
2446 for (i = 0; i < rx_ring->count; i++)
2447 kfree(rx_ring->buffer_info[i].ps_pages);
2449 vfree(rx_ring->buffer_info);
2450 rx_ring->buffer_info = NULL;
2452 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2454 rx_ring->desc = NULL;
2458 * e1000_update_itr - update the dynamic ITR value based on statistics
2459 * @adapter: pointer to adapter
2460 * @itr_setting: current adapter->itr
2461 * @packets: the number of packets during this measurement interval
2462 * @bytes: the number of bytes during this measurement interval
2464 * Stores a new ITR value based on packets and byte
2465 * counts during the last interrupt. The advantage of per interrupt
2466 * computation is faster updates and more accurate ITR for the current
2467 * traffic pattern. Constants in this function were computed
2468 * based on theoretical maximum wire speed and thresholds were set based
2469 * on testing data as well as attempting to minimize response time
2470 * while increasing bulk throughput. This functionality is controlled
2471 * by the InterruptThrottleRate module parameter.
2473 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2475 unsigned int retval = itr_setting;
2480 switch (itr_setting) {
2481 case lowest_latency:
2482 /* handle TSO and jumbo frames */
2483 if (bytes / packets > 8000)
2484 retval = bulk_latency;
2485 else if ((packets < 5) && (bytes > 512))
2486 retval = low_latency;
2488 case low_latency: /* 50 usec aka 20000 ints/s */
2489 if (bytes > 10000) {
2490 /* this if handles the TSO accounting */
2491 if (bytes / packets > 8000)
2492 retval = bulk_latency;
2493 else if ((packets < 10) || ((bytes / packets) > 1200))
2494 retval = bulk_latency;
2495 else if ((packets > 35))
2496 retval = lowest_latency;
2497 } else if (bytes / packets > 2000) {
2498 retval = bulk_latency;
2499 } else if (packets <= 2 && bytes < 512) {
2500 retval = lowest_latency;
2503 case bulk_latency: /* 250 usec aka 4000 ints/s */
2504 if (bytes > 25000) {
2506 retval = low_latency;
2507 } else if (bytes < 6000) {
2508 retval = low_latency;
2516 static void e1000_set_itr(struct e1000_adapter *adapter)
2519 u32 new_itr = adapter->itr;
2521 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2522 if (adapter->link_speed != SPEED_1000) {
2528 if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2533 adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2534 adapter->total_tx_packets,
2535 adapter->total_tx_bytes);
2536 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2537 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2538 adapter->tx_itr = low_latency;
2540 adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2541 adapter->total_rx_packets,
2542 adapter->total_rx_bytes);
2543 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2544 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2545 adapter->rx_itr = low_latency;
2547 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2549 /* counts and packets in update_itr are dependent on these numbers */
2550 switch (current_itr) {
2551 case lowest_latency:
2555 new_itr = 20000; /* aka hwitr = ~200 */
2565 if (new_itr != adapter->itr) {
2566 /* this attempts to bias the interrupt rate towards Bulk
2567 * by adding intermediate steps when interrupt rate is
2570 new_itr = new_itr > adapter->itr ?
2571 min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2572 adapter->itr = new_itr;
2573 adapter->rx_ring->itr_val = new_itr;
2574 if (adapter->msix_entries)
2575 adapter->rx_ring->set_itr = 1;
2577 e1000e_write_itr(adapter, new_itr);
2582 * e1000e_write_itr - write the ITR value to the appropriate registers
2583 * @adapter: address of board private structure
2584 * @itr: new ITR value to program
2586 * e1000e_write_itr determines if the adapter is in MSI-X mode
2587 * and, if so, writes the EITR registers with the ITR value.
2588 * Otherwise, it writes the ITR value into the ITR register.
2590 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2592 struct e1000_hw *hw = &adapter->hw;
2593 u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2595 if (adapter->msix_entries) {
2598 for (vector = 0; vector < adapter->num_vectors; vector++)
2599 writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2606 * e1000_alloc_queues - Allocate memory for all rings
2607 * @adapter: board private structure to initialize
2609 static int e1000_alloc_queues(struct e1000_adapter *adapter)
2611 int size = sizeof(struct e1000_ring);
2613 adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2614 if (!adapter->tx_ring)
2616 adapter->tx_ring->count = adapter->tx_ring_count;
2617 adapter->tx_ring->adapter = adapter;
2619 adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2620 if (!adapter->rx_ring)
2622 adapter->rx_ring->count = adapter->rx_ring_count;
2623 adapter->rx_ring->adapter = adapter;
2627 e_err("Unable to allocate memory for queues\n");
2628 kfree(adapter->rx_ring);
2629 kfree(adapter->tx_ring);
2634 * e1000e_poll - NAPI Rx polling callback
2635 * @napi: struct associated with this polling callback
2636 * @weight: number of packets driver is allowed to process this poll
2638 static int e1000e_poll(struct napi_struct *napi, int weight)
2640 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2642 struct e1000_hw *hw = &adapter->hw;
2643 struct net_device *poll_dev = adapter->netdev;
2644 int tx_cleaned = 1, work_done = 0;
2646 adapter = netdev_priv(poll_dev);
2648 if (!adapter->msix_entries ||
2649 (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2650 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2652 adapter->clean_rx(adapter->rx_ring, &work_done, weight);
2657 /* If weight not fully consumed, exit the polling mode */
2658 if (work_done < weight) {
2659 if (adapter->itr_setting & 3)
2660 e1000_set_itr(adapter);
2661 napi_complete(napi);
2662 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2663 if (adapter->msix_entries)
2664 ew32(IMS, adapter->rx_ring->ims_val);
2666 e1000_irq_enable(adapter);
2673 static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2674 __always_unused __be16 proto, u16 vid)
2676 struct e1000_adapter *adapter = netdev_priv(netdev);
2677 struct e1000_hw *hw = &adapter->hw;
2680 /* don't update vlan cookie if already programmed */
2681 if ((adapter->hw.mng_cookie.status &
2682 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2683 (vid == adapter->mng_vlan_id))
2686 /* add VID to filter table */
2687 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2688 index = (vid >> 5) & 0x7F;
2689 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2690 vfta |= (1 << (vid & 0x1F));
2691 hw->mac.ops.write_vfta(hw, index, vfta);
2694 set_bit(vid, adapter->active_vlans);
2699 static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2700 __always_unused __be16 proto, u16 vid)
2702 struct e1000_adapter *adapter = netdev_priv(netdev);
2703 struct e1000_hw *hw = &adapter->hw;
2706 if ((adapter->hw.mng_cookie.status &
2707 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2708 (vid == adapter->mng_vlan_id)) {
2709 /* release control to f/w */
2710 e1000e_release_hw_control(adapter);
2714 /* remove VID from filter table */
2715 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2716 index = (vid >> 5) & 0x7F;
2717 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2718 vfta &= ~(1 << (vid & 0x1F));
2719 hw->mac.ops.write_vfta(hw, index, vfta);
2722 clear_bit(vid, adapter->active_vlans);
2728 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2729 * @adapter: board private structure to initialize
2731 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2733 struct net_device *netdev = adapter->netdev;
2734 struct e1000_hw *hw = &adapter->hw;
2737 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2738 /* disable VLAN receive filtering */
2740 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2743 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2744 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2745 adapter->mng_vlan_id);
2746 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2752 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2753 * @adapter: board private structure to initialize
2755 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2757 struct e1000_hw *hw = &adapter->hw;
2760 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2761 /* enable VLAN receive filtering */
2763 rctl |= E1000_RCTL_VFE;
2764 rctl &= ~E1000_RCTL_CFIEN;
2770 * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping
2771 * @adapter: board private structure to initialize
2773 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2775 struct e1000_hw *hw = &adapter->hw;
2778 /* disable VLAN tag insert/strip */
2780 ctrl &= ~E1000_CTRL_VME;
2785 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2786 * @adapter: board private structure to initialize
2788 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2790 struct e1000_hw *hw = &adapter->hw;
2793 /* enable VLAN tag insert/strip */
2795 ctrl |= E1000_CTRL_VME;
2799 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2801 struct net_device *netdev = adapter->netdev;
2802 u16 vid = adapter->hw.mng_cookie.vlan_id;
2803 u16 old_vid = adapter->mng_vlan_id;
2805 if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2806 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2807 adapter->mng_vlan_id = vid;
2810 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2811 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2814 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2818 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2820 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2821 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2824 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2826 struct e1000_hw *hw = &adapter->hw;
2827 u32 manc, manc2h, mdef, i, j;
2829 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2834 /* enable receiving management packets to the host. this will probably
2835 * generate destination unreachable messages from the host OS, but
2836 * the packets will be handled on SMBUS
2838 manc |= E1000_MANC_EN_MNG2HOST;
2839 manc2h = er32(MANC2H);
2841 switch (hw->mac.type) {
2843 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2847 /* Check if IPMI pass-through decision filter already exists;
2850 for (i = 0, j = 0; i < 8; i++) {
2851 mdef = er32(MDEF(i));
2853 /* Ignore filters with anything other than IPMI ports */
2854 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2857 /* Enable this decision filter in MANC2H */
2864 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2867 /* Create new decision filter in an empty filter */
2868 for (i = 0, j = 0; i < 8; i++)
2869 if (er32(MDEF(i)) == 0) {
2870 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2871 E1000_MDEF_PORT_664));
2878 e_warn("Unable to create IPMI pass-through filter\n");
2882 ew32(MANC2H, manc2h);
2887 * e1000_configure_tx - Configure Transmit Unit after Reset
2888 * @adapter: board private structure
2890 * Configure the Tx unit of the MAC after a reset.
2892 static void e1000_configure_tx(struct e1000_adapter *adapter)
2894 struct e1000_hw *hw = &adapter->hw;
2895 struct e1000_ring *tx_ring = adapter->tx_ring;
2899 /* Setup the HW Tx Head and Tail descriptor pointers */
2900 tdba = tx_ring->dma;
2901 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2902 ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2903 ew32(TDBAH(0), (tdba >> 32));
2904 ew32(TDLEN(0), tdlen);
2907 tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2908 tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2910 /* Set the Tx Interrupt Delay register */
2911 ew32(TIDV, adapter->tx_int_delay);
2912 /* Tx irq moderation */
2913 ew32(TADV, adapter->tx_abs_int_delay);
2915 if (adapter->flags2 & FLAG2_DMA_BURST) {
2916 u32 txdctl = er32(TXDCTL(0));
2917 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2918 E1000_TXDCTL_WTHRESH);
2919 /* set up some performance related parameters to encourage the
2920 * hardware to use the bus more efficiently in bursts, depends
2921 * on the tx_int_delay to be enabled,
2922 * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2923 * hthresh = 1 ==> prefetch when one or more available
2924 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2925 * BEWARE: this seems to work but should be considered first if
2926 * there are Tx hangs or other Tx related bugs
2928 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2929 ew32(TXDCTL(0), txdctl);
2931 /* erratum work around: set txdctl the same for both queues */
2932 ew32(TXDCTL(1), er32(TXDCTL(0)));
2934 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2935 tarc = er32(TARC(0));
2936 /* set the speed mode bit, we'll clear it if we're not at
2937 * gigabit link later
2939 #define SPEED_MODE_BIT (1 << 21)
2940 tarc |= SPEED_MODE_BIT;
2941 ew32(TARC(0), tarc);
2944 /* errata: program both queues to unweighted RR */
2945 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2946 tarc = er32(TARC(0));
2948 ew32(TARC(0), tarc);
2949 tarc = er32(TARC(1));
2951 ew32(TARC(1), tarc);
2954 /* Setup Transmit Descriptor Settings for eop descriptor */
2955 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2957 /* only set IDE if we are delaying interrupts using the timers */
2958 if (adapter->tx_int_delay)
2959 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2961 /* enable Report Status bit */
2962 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2964 hw->mac.ops.config_collision_dist(hw);
2968 * e1000_setup_rctl - configure the receive control registers
2969 * @adapter: Board private structure
2971 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2972 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2973 static void e1000_setup_rctl(struct e1000_adapter *adapter)
2975 struct e1000_hw *hw = &adapter->hw;
2979 /* Workaround Si errata on PCHx - configure jumbo frame flow */
2980 if ((hw->mac.type >= e1000_pch2lan) &&
2981 (adapter->netdev->mtu > ETH_DATA_LEN) &&
2982 e1000_lv_jumbo_workaround_ich8lan(hw, true))
2983 e_dbg("failed to enable jumbo frame workaround mode\n");
2985 /* Program MC offset vector base */
2987 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2988 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2989 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2990 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2992 /* Do not Store bad packets */
2993 rctl &= ~E1000_RCTL_SBP;
2995 /* Enable Long Packet receive */
2996 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2997 rctl &= ~E1000_RCTL_LPE;
2999 rctl |= E1000_RCTL_LPE;
3001 /* Some systems expect that the CRC is included in SMBUS traffic. The
3002 * hardware strips the CRC before sending to both SMBUS (BMC) and to
3003 * host memory when this is enabled
3005 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3006 rctl |= E1000_RCTL_SECRC;
3008 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3009 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3012 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3014 phy_data |= (1 << 2);
3015 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3017 e1e_rphy(hw, 22, &phy_data);
3019 phy_data |= (1 << 14);
3020 e1e_wphy(hw, 0x10, 0x2823);
3021 e1e_wphy(hw, 0x11, 0x0003);
3022 e1e_wphy(hw, 22, phy_data);
3025 /* Setup buffer sizes */
3026 rctl &= ~E1000_RCTL_SZ_4096;
3027 rctl |= E1000_RCTL_BSEX;
3028 switch (adapter->rx_buffer_len) {
3031 rctl |= E1000_RCTL_SZ_2048;
3032 rctl &= ~E1000_RCTL_BSEX;
3035 rctl |= E1000_RCTL_SZ_4096;
3038 rctl |= E1000_RCTL_SZ_8192;
3041 rctl |= E1000_RCTL_SZ_16384;
3045 /* Enable Extended Status in all Receive Descriptors */
3046 rfctl = er32(RFCTL);
3047 rfctl |= E1000_RFCTL_EXTEN;
3050 /* 82571 and greater support packet-split where the protocol
3051 * header is placed in skb->data and the packet data is
3052 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3053 * In the case of a non-split, skb->data is linearly filled,
3054 * followed by the page buffers. Therefore, skb->data is
3055 * sized to hold the largest protocol header.
3057 * allocations using alloc_page take too long for regular MTU
3058 * so only enable packet split for jumbo frames
3060 * Using pages when the page size is greater than 16k wastes
3061 * a lot of memory, since we allocate 3 pages at all times
3064 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3065 if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3066 adapter->rx_ps_pages = pages;
3068 adapter->rx_ps_pages = 0;
3070 if (adapter->rx_ps_pages) {
3073 /* Enable Packet split descriptors */
3074 rctl |= E1000_RCTL_DTYP_PS;
3076 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3078 switch (adapter->rx_ps_pages) {
3080 psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3083 psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3086 psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3090 ew32(PSRCTL, psrctl);
3093 /* This is useful for sniffing bad packets. */
3094 if (adapter->netdev->features & NETIF_F_RXALL) {
3095 /* UPE and MPE will be handled by normal PROMISC logic
3096 * in e1000e_set_rx_mode
3098 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3099 E1000_RCTL_BAM | /* RX All Bcast Pkts */
3100 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3102 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3103 E1000_RCTL_DPF | /* Allow filtered pause */
3104 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3105 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3106 * and that breaks VLANs.
3111 /* just started the receive unit, no need to restart */
3112 adapter->flags &= ~FLAG_RESTART_NOW;
3116 * e1000_configure_rx - Configure Receive Unit after Reset
3117 * @adapter: board private structure
3119 * Configure the Rx unit of the MAC after a reset.
3121 static void e1000_configure_rx(struct e1000_adapter *adapter)
3123 struct e1000_hw *hw = &adapter->hw;
3124 struct e1000_ring *rx_ring = adapter->rx_ring;
3126 u32 rdlen, rctl, rxcsum, ctrl_ext;
3128 if (adapter->rx_ps_pages) {
3129 /* this is a 32 byte descriptor */
3130 rdlen = rx_ring->count *
3131 sizeof(union e1000_rx_desc_packet_split);
3132 adapter->clean_rx = e1000_clean_rx_irq_ps;
3133 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3134 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3135 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3136 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3137 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3139 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3140 adapter->clean_rx = e1000_clean_rx_irq;
3141 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3144 /* disable receives while setting up the descriptors */
3146 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3147 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3149 usleep_range(10000, 20000);
3151 if (adapter->flags2 & FLAG2_DMA_BURST) {
3152 /* set the writeback threshold (only takes effect if the RDTR
3153 * is set). set GRAN=1 and write back up to 0x4 worth, and
3154 * enable prefetching of 0x20 Rx descriptors
3160 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3161 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3163 /* override the delay timers for enabling bursting, only if
3164 * the value was not set by the user via module options
3166 if (adapter->rx_int_delay == DEFAULT_RDTR)
3167 adapter->rx_int_delay = BURST_RDTR;
3168 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
3169 adapter->rx_abs_int_delay = BURST_RADV;
3172 /* set the Receive Delay Timer Register */
3173 ew32(RDTR, adapter->rx_int_delay);
3175 /* irq moderation */
3176 ew32(RADV, adapter->rx_abs_int_delay);
3177 if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3178 e1000e_write_itr(adapter, adapter->itr);
3180 ctrl_ext = er32(CTRL_EXT);
3181 /* Auto-Mask interrupts upon ICR access */
3182 ctrl_ext |= E1000_CTRL_EXT_IAME;
3183 ew32(IAM, 0xffffffff);
3184 ew32(CTRL_EXT, ctrl_ext);
3187 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3188 * the Base and Length of the Rx Descriptor Ring
3190 rdba = rx_ring->dma;
3191 ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3192 ew32(RDBAH(0), (rdba >> 32));
3193 ew32(RDLEN(0), rdlen);
3196 rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3197 rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3199 /* Enable Receive Checksum Offload for TCP and UDP */
3200 rxcsum = er32(RXCSUM);
3201 if (adapter->netdev->features & NETIF_F_RXCSUM)
3202 rxcsum |= E1000_RXCSUM_TUOFL;
3204 rxcsum &= ~E1000_RXCSUM_TUOFL;
3205 ew32(RXCSUM, rxcsum);
3207 /* With jumbo frames, excessive C-state transition latencies result
3208 * in dropped transactions.
3210 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3212 ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3213 adapter->max_frame_size) * 8 / 1000;
3215 if (adapter->flags & FLAG_IS_ICH) {
3216 u32 rxdctl = er32(RXDCTL(0));
3217 ew32(RXDCTL(0), rxdctl | 0x3);
3220 pm_qos_update_request(&adapter->netdev->pm_qos_req, lat);
3222 pm_qos_update_request(&adapter->netdev->pm_qos_req,
3223 PM_QOS_DEFAULT_VALUE);
3226 /* Enable Receives */
3231 * e1000e_write_mc_addr_list - write multicast addresses to MTA
3232 * @netdev: network interface device structure
3234 * Writes multicast address list to the MTA hash table.
3235 * Returns: -ENOMEM on failure
3236 * 0 on no addresses written
3237 * X on writing X addresses to MTA
3239 static int e1000e_write_mc_addr_list(struct net_device *netdev)
3241 struct e1000_adapter *adapter = netdev_priv(netdev);
3242 struct e1000_hw *hw = &adapter->hw;
3243 struct netdev_hw_addr *ha;
3247 if (netdev_mc_empty(netdev)) {
3248 /* nothing to program, so clear mc list */
3249 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3253 mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC);
3257 /* update_mc_addr_list expects a packed array of only addresses. */
3259 netdev_for_each_mc_addr(ha, netdev)
3260 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3262 hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3265 return netdev_mc_count(netdev);
3269 * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3270 * @netdev: network interface device structure
3272 * Writes unicast address list to the RAR table.
3273 * Returns: -ENOMEM on failure/insufficient address space
3274 * 0 on no addresses written
3275 * X on writing X addresses to the RAR table
3277 static int e1000e_write_uc_addr_list(struct net_device *netdev)
3279 struct e1000_adapter *adapter = netdev_priv(netdev);
3280 struct e1000_hw *hw = &adapter->hw;
3281 unsigned int rar_entries = hw->mac.rar_entry_count;
3284 /* save a rar entry for our hardware address */
3287 /* save a rar entry for the LAA workaround */
3288 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3291 /* return ENOMEM indicating insufficient memory for addresses */
3292 if (netdev_uc_count(netdev) > rar_entries)
3295 if (!netdev_uc_empty(netdev) && rar_entries) {
3296 struct netdev_hw_addr *ha;
3298 /* write the addresses in reverse order to avoid write
3301 netdev_for_each_uc_addr(ha, netdev) {
3304 hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3309 /* zero out the remaining RAR entries not used above */
3310 for (; rar_entries > 0; rar_entries--) {
3311 ew32(RAH(rar_entries), 0);
3312 ew32(RAL(rar_entries), 0);
3320 * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3321 * @netdev: network interface device structure
3323 * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3324 * address list or the network interface flags are updated. This routine is
3325 * responsible for configuring the hardware for proper unicast, multicast,
3326 * promiscuous mode, and all-multi behavior.
3328 static void e1000e_set_rx_mode(struct net_device *netdev)
3330 struct e1000_adapter *adapter = netdev_priv(netdev);
3331 struct e1000_hw *hw = &adapter->hw;
3334 /* Check for Promiscuous and All Multicast modes */
3337 /* clear the affected bits */
3338 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3340 if (netdev->flags & IFF_PROMISC) {
3341 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3342 /* Do not hardware filter VLANs in promisc mode */
3343 e1000e_vlan_filter_disable(adapter);
3347 if (netdev->flags & IFF_ALLMULTI) {
3348 rctl |= E1000_RCTL_MPE;
3350 /* Write addresses to the MTA, if the attempt fails
3351 * then we should just turn on promiscuous mode so
3352 * that we can at least receive multicast traffic
3354 count = e1000e_write_mc_addr_list(netdev);
3356 rctl |= E1000_RCTL_MPE;
3358 e1000e_vlan_filter_enable(adapter);
3359 /* Write addresses to available RAR registers, if there is not
3360 * sufficient space to store all the addresses then enable
3361 * unicast promiscuous mode
3363 count = e1000e_write_uc_addr_list(netdev);
3365 rctl |= E1000_RCTL_UPE;
3370 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3371 e1000e_vlan_strip_enable(adapter);
3373 e1000e_vlan_strip_disable(adapter);
3376 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3378 struct e1000_hw *hw = &adapter->hw;
3381 static const u32 rsskey[10] = {
3382 0xda565a6d, 0xc20e5b25, 0x3d256741, 0xb08fa343, 0xcb2bcad0,
3383 0xb4307bae, 0xa32dcb77, 0x0cf23080, 0x3bb7426a, 0xfa01acbe
3386 /* Fill out hash function seed */
3387 for (i = 0; i < 10; i++)
3388 ew32(RSSRK(i), rsskey[i]);
3390 /* Direct all traffic to queue 0 */
3391 for (i = 0; i < 32; i++)
3394 /* Disable raw packet checksumming so that RSS hash is placed in
3395 * descriptor on writeback.
3397 rxcsum = er32(RXCSUM);
3398 rxcsum |= E1000_RXCSUM_PCSD;
3400 ew32(RXCSUM, rxcsum);
3402 mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3403 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3404 E1000_MRQC_RSS_FIELD_IPV6 |
3405 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3406 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3412 * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3413 * @adapter: board private structure
3414 * @timinca: pointer to returned time increment attributes
3416 * Get attributes for incrementing the System Time Register SYSTIML/H at
3417 * the default base frequency, and set the cyclecounter shift value.
3419 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3421 struct e1000_hw *hw = &adapter->hw;
3422 u32 incvalue, incperiod, shift;
3424 /* Make sure clock is enabled on I217 before checking the frequency */
3425 if ((hw->mac.type == e1000_pch_lpt) &&
3426 !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3427 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3428 u32 fextnvm7 = er32(FEXTNVM7);
3430 if (!(fextnvm7 & (1 << 0))) {
3431 ew32(FEXTNVM7, fextnvm7 | (1 << 0));
3436 switch (hw->mac.type) {
3439 /* On I217, the clock frequency is 25MHz or 96MHz as
3440 * indicated by the System Clock Frequency Indication
3442 if ((hw->mac.type != e1000_pch_lpt) ||
3443 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {
3444 /* Stable 96MHz frequency */
3445 incperiod = INCPERIOD_96MHz;
3446 incvalue = INCVALUE_96MHz;
3447 shift = INCVALUE_SHIFT_96MHz;
3448 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz;
3454 /* Stable 25MHz frequency */
3455 incperiod = INCPERIOD_25MHz;
3456 incvalue = INCVALUE_25MHz;
3457 shift = INCVALUE_SHIFT_25MHz;
3458 adapter->cc.shift = shift;
3464 *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3465 ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3471 * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3472 * @adapter: board private structure
3474 * Outgoing time stamping can be enabled and disabled. Play nice and
3475 * disable it when requested, although it shouldn't cause any overhead
3476 * when no packet needs it. At most one packet in the queue may be
3477 * marked for time stamping, otherwise it would be impossible to tell
3478 * for sure to which packet the hardware time stamp belongs.
3480 * Incoming time stamping has to be configured via the hardware filters.
3481 * Not all combinations are supported, in particular event type has to be
3482 * specified. Matching the kind of event packet is not supported, with the
3483 * exception of "all V2 events regardless of level 2 or 4".
3485 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter)
3487 struct e1000_hw *hw = &adapter->hw;
3488 struct hwtstamp_config *config = &adapter->hwtstamp_config;
3489 u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3490 u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3498 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3501 /* flags reserved for future extensions - must be zero */
3505 switch (config->tx_type) {
3506 case HWTSTAMP_TX_OFF:
3509 case HWTSTAMP_TX_ON:
3515 switch (config->rx_filter) {
3516 case HWTSTAMP_FILTER_NONE:
3519 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3520 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3521 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3524 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3525 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3526 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3529 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3530 /* Also time stamps V2 L2 Path Delay Request/Response */
3531 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3532 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3535 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3536 /* Also time stamps V2 L2 Path Delay Request/Response. */
3537 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3538 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3541 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3542 /* Hardware cannot filter just V2 L4 Sync messages;
3543 * fall-through to V2 (both L2 and L4) Sync.
3545 case HWTSTAMP_FILTER_PTP_V2_SYNC:
3546 /* Also time stamps V2 Path Delay Request/Response. */
3547 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3548 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3552 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3553 /* Hardware cannot filter just V2 L4 Delay Request messages;
3554 * fall-through to V2 (both L2 and L4) Delay Request.
3556 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3557 /* Also time stamps V2 Path Delay Request/Response. */
3558 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3559 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3563 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3564 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3565 /* Hardware cannot filter just V2 L4 or L2 Event messages;
3566 * fall-through to all V2 (both L2 and L4) Events.
3568 case HWTSTAMP_FILTER_PTP_V2_EVENT:
3569 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3570 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3574 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3575 /* For V1, the hardware can only filter Sync messages or
3576 * Delay Request messages but not both so fall-through to
3577 * time stamp all packets.
3579 case HWTSTAMP_FILTER_ALL:
3582 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3583 config->rx_filter = HWTSTAMP_FILTER_ALL;
3589 /* enable/disable Tx h/w time stamping */
3590 regval = er32(TSYNCTXCTL);
3591 regval &= ~E1000_TSYNCTXCTL_ENABLED;
3592 regval |= tsync_tx_ctl;
3593 ew32(TSYNCTXCTL, regval);
3594 if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3595 (regval & E1000_TSYNCTXCTL_ENABLED)) {
3596 e_err("Timesync Tx Control register not set as expected\n");
3600 /* enable/disable Rx h/w time stamping */
3601 regval = er32(TSYNCRXCTL);
3602 regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3603 regval |= tsync_rx_ctl;
3604 ew32(TSYNCRXCTL, regval);
3605 if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3606 E1000_TSYNCRXCTL_TYPE_MASK)) !=
3607 (regval & (E1000_TSYNCRXCTL_ENABLED |
3608 E1000_TSYNCRXCTL_TYPE_MASK))) {
3609 e_err("Timesync Rx Control register not set as expected\n");
3613 /* L2: define ethertype filter for time stamped packets */
3615 rxmtrl |= ETH_P_1588;
3617 /* define which PTP packets get time stamped */
3618 ew32(RXMTRL, rxmtrl);
3620 /* Filter by destination port */
3622 rxudp = PTP_EV_PORT;
3623 cpu_to_be16s(&rxudp);
3629 /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3633 /* Get and set the System Time Register SYSTIM base frequency */
3634 ret_val = e1000e_get_base_timinca(adapter, ®val);
3637 ew32(TIMINCA, regval);
3639 /* reset the ns time counter */
3640 timecounter_init(&adapter->tc, &adapter->cc,
3641 ktime_to_ns(ktime_get_real()));
3647 * e1000_configure - configure the hardware for Rx and Tx
3648 * @adapter: private board structure
3650 static void e1000_configure(struct e1000_adapter *adapter)
3652 struct e1000_ring *rx_ring = adapter->rx_ring;
3654 e1000e_set_rx_mode(adapter->netdev);
3656 e1000_restore_vlan(adapter);
3657 e1000_init_manageability_pt(adapter);
3659 e1000_configure_tx(adapter);
3661 if (adapter->netdev->features & NETIF_F_RXHASH)
3662 e1000e_setup_rss_hash(adapter);
3663 e1000_setup_rctl(adapter);
3664 e1000_configure_rx(adapter);
3665 adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3669 * e1000e_power_up_phy - restore link in case the phy was powered down
3670 * @adapter: address of board private structure
3672 * The phy may be powered down to save power and turn off link when the
3673 * driver is unloaded and wake on lan is not enabled (among others)
3674 * *** this routine MUST be followed by a call to e1000e_reset ***
3676 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3678 if (adapter->hw.phy.ops.power_up)
3679 adapter->hw.phy.ops.power_up(&adapter->hw);
3681 adapter->hw.mac.ops.setup_link(&adapter->hw);
3685 * e1000_power_down_phy - Power down the PHY
3687 * Power down the PHY so no link is implied when interface is down.
3688 * The PHY cannot be powered down if management or WoL is active.
3690 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3692 /* WoL is enabled */
3696 if (adapter->hw.phy.ops.power_down)
3697 adapter->hw.phy.ops.power_down(&adapter->hw);
3701 * e1000e_reset - bring the hardware into a known good state
3703 * This function boots the hardware and enables some settings that
3704 * require a configuration cycle of the hardware - those cannot be
3705 * set/changed during runtime. After reset the device needs to be
3706 * properly configured for Rx, Tx etc.
3708 void e1000e_reset(struct e1000_adapter *adapter)
3710 struct e1000_mac_info *mac = &adapter->hw.mac;
3711 struct e1000_fc_info *fc = &adapter->hw.fc;
3712 struct e1000_hw *hw = &adapter->hw;
3713 u32 tx_space, min_tx_space, min_rx_space;
3714 u32 pba = adapter->pba;
3717 /* reset Packet Buffer Allocation to default */
3720 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
3721 /* To maintain wire speed transmits, the Tx FIFO should be
3722 * large enough to accommodate two full transmit packets,
3723 * rounded up to the next 1KB and expressed in KB. Likewise,
3724 * the Rx FIFO should be large enough to accommodate at least
3725 * one full receive packet and is similarly rounded up and
3729 /* upper 16 bits has Tx packet buffer allocation size in KB */
3730 tx_space = pba >> 16;
3731 /* lower 16 bits has Rx packet buffer allocation size in KB */
3733 /* the Tx fifo also stores 16 bytes of information about the Tx
3734 * but don't include ethernet FCS because hardware appends it
3736 min_tx_space = (adapter->max_frame_size +
3737 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3738 min_tx_space = ALIGN(min_tx_space, 1024);
3739 min_tx_space >>= 10;
3740 /* software strips receive CRC, so leave room for it */
3741 min_rx_space = adapter->max_frame_size;
3742 min_rx_space = ALIGN(min_rx_space, 1024);
3743 min_rx_space >>= 10;
3745 /* If current Tx allocation is less than the min Tx FIFO size,
3746 * and the min Tx FIFO size is less than the current Rx FIFO
3747 * allocation, take space away from current Rx allocation
3749 if ((tx_space < min_tx_space) &&
3750 ((min_tx_space - tx_space) < pba)) {
3751 pba -= min_tx_space - tx_space;
3753 /* if short on Rx space, Rx wins and must trump Tx
3756 if (pba < min_rx_space)
3763 /* flow control settings
3765 * The high water mark must be low enough to fit one full frame
3766 * (or the size used for early receive) above it in the Rx FIFO.
3767 * Set it to the lower of:
3768 * - 90% of the Rx FIFO size, and
3769 * - the full Rx FIFO size minus one full frame
3771 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3772 fc->pause_time = 0xFFFF;
3774 fc->pause_time = E1000_FC_PAUSE_TIME;
3775 fc->send_xon = true;
3776 fc->current_mode = fc->requested_mode;
3778 switch (hw->mac.type) {
3780 case e1000_ich10lan:
3781 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3784 fc->high_water = 0x2800;
3785 fc->low_water = fc->high_water - 8;
3790 hwm = min(((pba << 10) * 9 / 10),
3791 ((pba << 10) - adapter->max_frame_size));
3793 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3794 fc->low_water = fc->high_water - 8;
3797 /* Workaround PCH LOM adapter hangs with certain network
3798 * loads. If hangs persist, try disabling Tx flow control.
3800 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3801 fc->high_water = 0x3500;
3802 fc->low_water = 0x1500;
3804 fc->high_water = 0x5000;
3805 fc->low_water = 0x3000;
3807 fc->refresh_time = 0x1000;
3811 fc->refresh_time = 0x0400;
3813 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
3814 fc->high_water = 0x05C20;
3815 fc->low_water = 0x05048;
3816 fc->pause_time = 0x0650;
3822 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
3823 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
3827 /* Alignment of Tx data is on an arbitrary byte boundary with the
3828 * maximum size per Tx descriptor limited only to the transmit
3829 * allocation of the packet buffer minus 96 bytes with an upper
3830 * limit of 24KB due to receive synchronization limitations.
3832 adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
3835 /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
3836 * fit in receive buffer.
3838 if (adapter->itr_setting & 0x3) {
3839 if ((adapter->max_frame_size * 2) > (pba << 10)) {
3840 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
3841 dev_info(&adapter->pdev->dev,
3842 "Interrupt Throttle Rate off\n");
3843 adapter->flags2 |= FLAG2_DISABLE_AIM;
3844 e1000e_write_itr(adapter, 0);
3846 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
3847 dev_info(&adapter->pdev->dev,
3848 "Interrupt Throttle Rate on\n");
3849 adapter->flags2 &= ~FLAG2_DISABLE_AIM;
3850 adapter->itr = 20000;
3851 e1000e_write_itr(adapter, adapter->itr);
3855 /* Allow time for pending master requests to run */
3856 mac->ops.reset_hw(hw);
3858 /* For parts with AMT enabled, let the firmware know
3859 * that the network interface is in control
3861 if (adapter->flags & FLAG_HAS_AMT)
3862 e1000e_get_hw_control(adapter);
3866 if (mac->ops.init_hw(hw))
3867 e_err("Hardware Error\n");
3869 e1000_update_mng_vlan(adapter);
3871 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3872 ew32(VET, ETH_P_8021Q);
3874 e1000e_reset_adaptive(hw);
3876 /* initialize systim and reset the ns time counter */
3877 e1000e_config_hwtstamp(adapter);
3879 /* Set EEE advertisement as appropriate */
3880 if (adapter->flags2 & FLAG2_HAS_EEE) {
3884 switch (hw->phy.type) {
3885 case e1000_phy_82579:
3886 adv_addr = I82579_EEE_ADVERTISEMENT;
3888 case e1000_phy_i217:
3889 adv_addr = I217_EEE_ADVERTISEMENT;
3892 dev_err(&adapter->pdev->dev,
3893 "Invalid PHY type setting EEE advertisement\n");
3897 ret_val = hw->phy.ops.acquire(hw);
3899 dev_err(&adapter->pdev->dev,
3900 "EEE advertisement - unable to acquire PHY\n");
3904 e1000_write_emi_reg_locked(hw, adv_addr,
3905 hw->dev_spec.ich8lan.eee_disable ?
3906 0 : adapter->eee_advert);
3908 hw->phy.ops.release(hw);
3911 if (!netif_running(adapter->netdev) &&
3912 !test_bit(__E1000_TESTING, &adapter->state)) {
3913 e1000_power_down_phy(adapter);
3917 e1000_get_phy_info(hw);
3919 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3920 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
3922 /* speed up time to link by disabling smart power down, ignore
3923 * the return value of this function because there is nothing
3924 * different we would do if it failed
3926 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3927 phy_data &= ~IGP02E1000_PM_SPD;
3928 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3932 int e1000e_up(struct e1000_adapter *adapter)
3934 struct e1000_hw *hw = &adapter->hw;
3936 /* hardware has been reset, we need to reload some things */
3937 e1000_configure(adapter);
3939 clear_bit(__E1000_DOWN, &adapter->state);
3941 if (adapter->msix_entries)
3942 e1000_configure_msix(adapter);
3943 e1000_irq_enable(adapter);
3945 netif_start_queue(adapter->netdev);
3947 /* fire a link change interrupt to start the watchdog */
3948 if (adapter->msix_entries)
3949 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3951 ew32(ICS, E1000_ICS_LSC);
3956 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
3958 struct e1000_hw *hw = &adapter->hw;
3960 if (!(adapter->flags2 & FLAG2_DMA_BURST))
3963 /* flush pending descriptor writebacks to memory */
3964 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
3965 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
3967 /* execute the writes immediately */
3970 /* due to rare timing issues, write to TIDV/RDTR again to ensure the
3971 * write is successful
3973 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
3974 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
3976 /* execute the writes immediately */
3980 static void e1000e_update_stats(struct e1000_adapter *adapter);
3982 void e1000e_down(struct e1000_adapter *adapter)
3984 struct net_device *netdev = adapter->netdev;
3985 struct e1000_hw *hw = &adapter->hw;
3988 /* signal that we're down so the interrupt handler does not
3989 * reschedule our watchdog timer
3991 set_bit(__E1000_DOWN, &adapter->state);
3993 /* disable receives in the hardware */
3995 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3996 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3997 /* flush and sleep below */
3999 netif_stop_queue(netdev);
4001 /* disable transmits in the hardware */
4003 tctl &= ~E1000_TCTL_EN;
4006 /* flush both disables and wait for them to finish */
4008 usleep_range(10000, 20000);
4010 e1000_irq_disable(adapter);
4012 napi_synchronize(&adapter->napi);
4014 del_timer_sync(&adapter->watchdog_timer);
4015 del_timer_sync(&adapter->phy_info_timer);
4017 netif_carrier_off(netdev);
4019 spin_lock(&adapter->stats64_lock);
4020 e1000e_update_stats(adapter);
4021 spin_unlock(&adapter->stats64_lock);
4023 e1000e_flush_descriptors(adapter);
4024 e1000_clean_tx_ring(adapter->tx_ring);
4025 e1000_clean_rx_ring(adapter->rx_ring);
4027 adapter->link_speed = 0;
4028 adapter->link_duplex = 0;
4030 /* Disable Si errata workaround on PCHx for jumbo frame flow */
4031 if ((hw->mac.type >= e1000_pch2lan) &&
4032 (adapter->netdev->mtu > ETH_DATA_LEN) &&
4033 e1000_lv_jumbo_workaround_ich8lan(hw, false))
4034 e_dbg("failed to disable jumbo frame workaround mode\n");
4036 if (!pci_channel_offline(adapter->pdev))
4037 e1000e_reset(adapter);
4039 /* TODO: for power management, we could drop the link and
4040 * pci_disable_device here.
4044 void e1000e_reinit_locked(struct e1000_adapter *adapter)
4047 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4048 usleep_range(1000, 2000);
4049 e1000e_down(adapter);
4051 clear_bit(__E1000_RESETTING, &adapter->state);
4055 * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4056 * @cc: cyclecounter structure
4058 static cycle_t e1000e_cyclecounter_read(const struct cyclecounter *cc)
4060 struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4062 struct e1000_hw *hw = &adapter->hw;
4065 /* latch SYSTIMH on read of SYSTIML */
4066 systim = (cycle_t)er32(SYSTIML);
4067 systim |= (cycle_t)er32(SYSTIMH) << 32;
4073 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4074 * @adapter: board private structure to initialize
4076 * e1000_sw_init initializes the Adapter private data structure.
4077 * Fields are initialized based on PCI device information and
4078 * OS network device settings (MTU size).
4080 static int e1000_sw_init(struct e1000_adapter *adapter)
4082 struct net_device *netdev = adapter->netdev;
4084 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
4085 adapter->rx_ps_bsize0 = 128;
4086 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4087 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4088 adapter->tx_ring_count = E1000_DEFAULT_TXD;
4089 adapter->rx_ring_count = E1000_DEFAULT_RXD;
4091 spin_lock_init(&adapter->stats64_lock);
4093 e1000e_set_interrupt_capability(adapter);
4095 if (e1000_alloc_queues(adapter))
4098 /* Setup hardware time stamping cyclecounter */
4099 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4100 adapter->cc.read = e1000e_cyclecounter_read;
4101 adapter->cc.mask = CLOCKSOURCE_MASK(64);
4102 adapter->cc.mult = 1;
4103 /* cc.shift set in e1000e_get_base_tininca() */
4105 spin_lock_init(&adapter->systim_lock);
4106 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4109 /* Explicitly disable IRQ since the NIC can be in any state. */
4110 e1000_irq_disable(adapter);
4112 set_bit(__E1000_DOWN, &adapter->state);
4117 * e1000_intr_msi_test - Interrupt Handler
4118 * @irq: interrupt number
4119 * @data: pointer to a network interface device structure
4121 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4123 struct net_device *netdev = data;
4124 struct e1000_adapter *adapter = netdev_priv(netdev);
4125 struct e1000_hw *hw = &adapter->hw;
4126 u32 icr = er32(ICR);
4128 e_dbg("icr is %08X\n", icr);
4129 if (icr & E1000_ICR_RXSEQ) {
4130 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4131 /* Force memory writes to complete before acknowledging the
4132 * interrupt is handled.
4141 * e1000_test_msi_interrupt - Returns 0 for successful test
4142 * @adapter: board private struct
4144 * code flow taken from tg3.c
4146 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4148 struct net_device *netdev = adapter->netdev;
4149 struct e1000_hw *hw = &adapter->hw;
4152 /* poll_enable hasn't been called yet, so don't need disable */
4153 /* clear any pending events */
4156 /* free the real vector and request a test handler */
4157 e1000_free_irq(adapter);
4158 e1000e_reset_interrupt_capability(adapter);
4160 /* Assume that the test fails, if it succeeds then the test
4161 * MSI irq handler will unset this flag
4163 adapter->flags |= FLAG_MSI_TEST_FAILED;
4165 err = pci_enable_msi(adapter->pdev);
4167 goto msi_test_failed;
4169 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4170 netdev->name, netdev);
4172 pci_disable_msi(adapter->pdev);
4173 goto msi_test_failed;
4176 /* Force memory writes to complete before enabling and firing an
4181 e1000_irq_enable(adapter);
4183 /* fire an unusual interrupt on the test handler */
4184 ew32(ICS, E1000_ICS_RXSEQ);
4188 e1000_irq_disable(adapter);
4190 rmb(); /* read flags after interrupt has been fired */
4192 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4193 adapter->int_mode = E1000E_INT_MODE_LEGACY;
4194 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4196 e_dbg("MSI interrupt test succeeded!\n");
4199 free_irq(adapter->pdev->irq, netdev);
4200 pci_disable_msi(adapter->pdev);
4203 e1000e_set_interrupt_capability(adapter);
4204 return e1000_request_irq(adapter);
4208 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4209 * @adapter: board private struct
4211 * code flow taken from tg3.c, called with e1000 interrupts disabled.
4213 static int e1000_test_msi(struct e1000_adapter *adapter)
4218 if (!(adapter->flags & FLAG_MSI_ENABLED))
4221 /* disable SERR in case the MSI write causes a master abort */
4222 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4223 if (pci_cmd & PCI_COMMAND_SERR)
4224 pci_write_config_word(adapter->pdev, PCI_COMMAND,
4225 pci_cmd & ~PCI_COMMAND_SERR);
4227 err = e1000_test_msi_interrupt(adapter);
4229 /* re-enable SERR */
4230 if (pci_cmd & PCI_COMMAND_SERR) {
4231 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4232 pci_cmd |= PCI_COMMAND_SERR;
4233 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4240 * e1000_open - Called when a network interface is made active
4241 * @netdev: network interface device structure
4243 * Returns 0 on success, negative value on failure
4245 * The open entry point is called when a network interface is made
4246 * active by the system (IFF_UP). At this point all resources needed
4247 * for transmit and receive operations are allocated, the interrupt
4248 * handler is registered with the OS, the watchdog timer is started,
4249 * and the stack is notified that the interface is ready.
4251 static int e1000_open(struct net_device *netdev)
4253 struct e1000_adapter *adapter = netdev_priv(netdev);
4254 struct e1000_hw *hw = &adapter->hw;
4255 struct pci_dev *pdev = adapter->pdev;
4258 /* disallow open during test */
4259 if (test_bit(__E1000_TESTING, &adapter->state))
4262 pm_runtime_get_sync(&pdev->dev);
4264 netif_carrier_off(netdev);
4266 /* allocate transmit descriptors */
4267 err = e1000e_setup_tx_resources(adapter->tx_ring);
4271 /* allocate receive descriptors */
4272 err = e1000e_setup_rx_resources(adapter->rx_ring);
4276 /* If AMT is enabled, let the firmware know that the network
4277 * interface is now open and reset the part to a known state.
4279 if (adapter->flags & FLAG_HAS_AMT) {
4280 e1000e_get_hw_control(adapter);
4281 e1000e_reset(adapter);
4284 e1000e_power_up_phy(adapter);
4286 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4287 if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4288 e1000_update_mng_vlan(adapter);
4290 /* DMA latency requirement to workaround jumbo issue */
4291 pm_qos_add_request(&adapter->netdev->pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
4292 PM_QOS_DEFAULT_VALUE);
4294 /* before we allocate an interrupt, we must be ready to handle it.
4295 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4296 * as soon as we call pci_request_irq, so we have to setup our
4297 * clean_rx handler before we do so.
4299 e1000_configure(adapter);
4301 err = e1000_request_irq(adapter);
4305 /* Work around PCIe errata with MSI interrupts causing some chipsets to
4306 * ignore e1000e MSI messages, which means we need to test our MSI
4309 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4310 err = e1000_test_msi(adapter);
4312 e_err("Interrupt allocation failed\n");
4317 /* From here on the code is the same as e1000e_up() */
4318 clear_bit(__E1000_DOWN, &adapter->state);
4320 napi_enable(&adapter->napi);
4322 e1000_irq_enable(adapter);
4324 adapter->tx_hang_recheck = false;
4325 netif_start_queue(netdev);
4327 adapter->idle_check = true;
4328 hw->mac.get_link_status = true;
4329 pm_runtime_put(&pdev->dev);
4331 /* fire a link status change interrupt to start the watchdog */
4332 if (adapter->msix_entries)
4333 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
4335 ew32(ICS, E1000_ICS_LSC);
4340 e1000e_release_hw_control(adapter);
4341 e1000_power_down_phy(adapter);
4342 e1000e_free_rx_resources(adapter->rx_ring);
4344 e1000e_free_tx_resources(adapter->tx_ring);
4346 e1000e_reset(adapter);
4347 pm_runtime_put_sync(&pdev->dev);
4353 * e1000_close - Disables a network interface
4354 * @netdev: network interface device structure
4356 * Returns 0, this is not allowed to fail
4358 * The close entry point is called when an interface is de-activated
4359 * by the OS. The hardware is still under the drivers control, but
4360 * needs to be disabled. A global MAC reset is issued to stop the
4361 * hardware, and all transmit and receive resources are freed.
4363 static int e1000_close(struct net_device *netdev)
4365 struct e1000_adapter *adapter = netdev_priv(netdev);
4366 struct pci_dev *pdev = adapter->pdev;
4367 int count = E1000_CHECK_RESET_COUNT;
4369 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4370 usleep_range(10000, 20000);
4372 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4374 pm_runtime_get_sync(&pdev->dev);
4376 if (!test_bit(__E1000_DOWN, &adapter->state)) {
4377 e1000e_down(adapter);
4378 e1000_free_irq(adapter);
4381 napi_disable(&adapter->napi);
4383 e1000_power_down_phy(adapter);
4385 e1000e_free_tx_resources(adapter->tx_ring);
4386 e1000e_free_rx_resources(adapter->rx_ring);
4388 /* kill manageability vlan ID if supported, but not if a vlan with
4389 * the same ID is registered on the host OS (let 8021q kill it)
4391 if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4392 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4393 adapter->mng_vlan_id);
4395 /* If AMT is enabled, let the firmware know that the network
4396 * interface is now closed
4398 if ((adapter->flags & FLAG_HAS_AMT) &&
4399 !test_bit(__E1000_TESTING, &adapter->state))
4400 e1000e_release_hw_control(adapter);
4402 pm_qos_remove_request(&adapter->netdev->pm_qos_req);
4404 pm_runtime_put_sync(&pdev->dev);
4410 * e1000_set_mac - Change the Ethernet Address of the NIC
4411 * @netdev: network interface device structure
4412 * @p: pointer to an address structure
4414 * Returns 0 on success, negative on failure
4416 static int e1000_set_mac(struct net_device *netdev, void *p)
4418 struct e1000_adapter *adapter = netdev_priv(netdev);
4419 struct e1000_hw *hw = &adapter->hw;
4420 struct sockaddr *addr = p;
4422 if (!is_valid_ether_addr(addr->sa_data))
4423 return -EADDRNOTAVAIL;
4425 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4426 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4428 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4430 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4431 /* activate the work around */
4432 e1000e_set_laa_state_82571(&adapter->hw, 1);
4434 /* Hold a copy of the LAA in RAR[14] This is done so that
4435 * between the time RAR[0] gets clobbered and the time it
4436 * gets fixed (in e1000_watchdog), the actual LAA is in one
4437 * of the RARs and no incoming packets directed to this port
4438 * are dropped. Eventually the LAA will be in RAR[0] and
4441 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4442 adapter->hw.mac.rar_entry_count - 1);
4449 * e1000e_update_phy_task - work thread to update phy
4450 * @work: pointer to our work struct
4452 * this worker thread exists because we must acquire a
4453 * semaphore to read the phy, which we could msleep while
4454 * waiting for it, and we can't msleep in a timer.
4456 static void e1000e_update_phy_task(struct work_struct *work)
4458 struct e1000_adapter *adapter = container_of(work,
4459 struct e1000_adapter,
4462 if (test_bit(__E1000_DOWN, &adapter->state))
4465 e1000_get_phy_info(&adapter->hw);
4469 * e1000_update_phy_info - timre call-back to update PHY info
4470 * @data: pointer to adapter cast into an unsigned long
4472 * Need to wait a few seconds after link up to get diagnostic information from
4475 static void e1000_update_phy_info(unsigned long data)
4477 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
4479 if (test_bit(__E1000_DOWN, &adapter->state))
4482 schedule_work(&adapter->update_phy_task);
4486 * e1000e_update_phy_stats - Update the PHY statistics counters
4487 * @adapter: board private structure
4489 * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4491 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4493 struct e1000_hw *hw = &adapter->hw;
4497 ret_val = hw->phy.ops.acquire(hw);
4501 /* A page set is expensive so check if already on desired page.
4502 * If not, set to the page with the PHY status registers.
4505 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4509 if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4510 ret_val = hw->phy.ops.set_page(hw,
4511 HV_STATS_PAGE << IGP_PAGE_SHIFT);
4516 /* Single Collision Count */
4517 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4518 ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4520 adapter->stats.scc += phy_data;
4522 /* Excessive Collision Count */
4523 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4524 ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4526 adapter->stats.ecol += phy_data;
4528 /* Multiple Collision Count */
4529 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4530 ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4532 adapter->stats.mcc += phy_data;
4534 /* Late Collision Count */
4535 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4536 ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4538 adapter->stats.latecol += phy_data;
4540 /* Collision Count - also used for adaptive IFS */
4541 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4542 ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4544 hw->mac.collision_delta = phy_data;
4547 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4548 ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4550 adapter->stats.dc += phy_data;
4552 /* Transmit with no CRS */
4553 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4554 ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4556 adapter->stats.tncrs += phy_data;
4559 hw->phy.ops.release(hw);
4563 * e1000e_update_stats - Update the board statistics counters
4564 * @adapter: board private structure
4566 static void e1000e_update_stats(struct e1000_adapter *adapter)
4568 struct net_device *netdev = adapter->netdev;
4569 struct e1000_hw *hw = &adapter->hw;
4570 struct pci_dev *pdev = adapter->pdev;
4572 /* Prevent stats update while adapter is being reset, or if the pci
4573 * connection is down.
4575 if (adapter->link_speed == 0)
4577 if (pci_channel_offline(pdev))
4580 adapter->stats.crcerrs += er32(CRCERRS);
4581 adapter->stats.gprc += er32(GPRC);
4582 adapter->stats.gorc += er32(GORCL);
4583 er32(GORCH); /* Clear gorc */
4584 adapter->stats.bprc += er32(BPRC);
4585 adapter->stats.mprc += er32(MPRC);
4586 adapter->stats.roc += er32(ROC);
4588 adapter->stats.mpc += er32(MPC);
4590 /* Half-duplex statistics */
4591 if (adapter->link_duplex == HALF_DUPLEX) {
4592 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4593 e1000e_update_phy_stats(adapter);
4595 adapter->stats.scc += er32(SCC);
4596 adapter->stats.ecol += er32(ECOL);
4597 adapter->stats.mcc += er32(MCC);
4598 adapter->stats.latecol += er32(LATECOL);
4599 adapter->stats.dc += er32(DC);
4601 hw->mac.collision_delta = er32(COLC);
4603 if ((hw->mac.type != e1000_82574) &&
4604 (hw->mac.type != e1000_82583))
4605 adapter->stats.tncrs += er32(TNCRS);
4607 adapter->stats.colc += hw->mac.collision_delta;
4610 adapter->stats.xonrxc += er32(XONRXC);
4611 adapter->stats.xontxc += er32(XONTXC);
4612 adapter->stats.xoffrxc += er32(XOFFRXC);
4613 adapter->stats.xofftxc += er32(XOFFTXC);
4614 adapter->stats.gptc += er32(GPTC);
4615 adapter->stats.gotc += er32(GOTCL);
4616 er32(GOTCH); /* Clear gotc */
4617 adapter->stats.rnbc += er32(RNBC);
4618 adapter->stats.ruc += er32(RUC);
4620 adapter->stats.mptc += er32(MPTC);
4621 adapter->stats.bptc += er32(BPTC);
4623 /* used for adaptive IFS */
4625 hw->mac.tx_packet_delta = er32(TPT);
4626 adapter->stats.tpt += hw->mac.tx_packet_delta;
4628 adapter->stats.algnerrc += er32(ALGNERRC);
4629 adapter->stats.rxerrc += er32(RXERRC);
4630 adapter->stats.cexterr += er32(CEXTERR);
4631 adapter->stats.tsctc += er32(TSCTC);
4632 adapter->stats.tsctfc += er32(TSCTFC);
4634 /* Fill out the OS statistics structure */
4635 netdev->stats.multicast = adapter->stats.mprc;
4636 netdev->stats.collisions = adapter->stats.colc;
4640 /* RLEC on some newer hardware can be incorrect so build
4641 * our own version based on RUC and ROC
4643 netdev->stats.rx_errors = adapter->stats.rxerrc +
4644 adapter->stats.crcerrs + adapter->stats.algnerrc +
4645 adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
4646 netdev->stats.rx_length_errors = adapter->stats.ruc +
4648 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4649 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4650 netdev->stats.rx_missed_errors = adapter->stats.mpc;
4653 netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
4654 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4655 netdev->stats.tx_window_errors = adapter->stats.latecol;
4656 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
4658 /* Tx Dropped needs to be maintained elsewhere */
4660 /* Management Stats */
4661 adapter->stats.mgptc += er32(MGTPTC);
4662 adapter->stats.mgprc += er32(MGTPRC);
4663 adapter->stats.mgpdc += er32(MGTPDC);
4665 /* Correctable ECC Errors */
4666 if (hw->mac.type == e1000_pch_lpt) {
4667 u32 pbeccsts = er32(PBECCSTS);
4668 adapter->corr_errors +=
4669 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
4670 adapter->uncorr_errors +=
4671 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
4672 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
4677 * e1000_phy_read_status - Update the PHY register status snapshot
4678 * @adapter: board private structure
4680 static void e1000_phy_read_status(struct e1000_adapter *adapter)
4682 struct e1000_hw *hw = &adapter->hw;
4683 struct e1000_phy_regs *phy = &adapter->phy_regs;
4685 if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
4686 (er32(STATUS) & E1000_STATUS_LU) &&
4687 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
4690 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
4691 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
4692 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
4693 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
4694 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
4695 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
4696 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
4697 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
4699 e_warn("Error reading PHY register\n");
4701 /* Do not read PHY registers if link is not up
4702 * Set values to typical power-on defaults
4704 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4705 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4706 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4708 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4709 ADVERTISE_ALL | ADVERTISE_CSMA);
4711 phy->expansion = EXPANSION_ENABLENPAGE;
4712 phy->ctrl1000 = ADVERTISE_1000FULL;
4714 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4718 static void e1000_print_link_info(struct e1000_adapter *adapter)
4720 struct e1000_hw *hw = &adapter->hw;
4721 u32 ctrl = er32(CTRL);
4723 /* Link status message must follow this format for user tools */
4724 pr_info("%s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4725 adapter->netdev->name, adapter->link_speed,
4726 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
4727 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
4728 (ctrl & E1000_CTRL_RFCE) ? "Rx" :
4729 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
4732 static bool e1000e_has_link(struct e1000_adapter *adapter)
4734 struct e1000_hw *hw = &adapter->hw;
4735 bool link_active = false;
4738 /* get_link_status is set on LSC (link status) interrupt or
4739 * Rx sequence error interrupt. get_link_status will stay
4740 * false until the check_for_link establishes link
4741 * for copper adapters ONLY
4743 switch (hw->phy.media_type) {
4744 case e1000_media_type_copper:
4745 if (hw->mac.get_link_status) {
4746 ret_val = hw->mac.ops.check_for_link(hw);
4747 link_active = !hw->mac.get_link_status;
4752 case e1000_media_type_fiber:
4753 ret_val = hw->mac.ops.check_for_link(hw);
4754 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
4756 case e1000_media_type_internal_serdes:
4757 ret_val = hw->mac.ops.check_for_link(hw);
4758 link_active = adapter->hw.mac.serdes_has_link;
4761 case e1000_media_type_unknown:
4765 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4766 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4767 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
4768 e_info("Gigabit has been disabled, downgrading speed\n");
4774 static void e1000e_enable_receives(struct e1000_adapter *adapter)
4776 /* make sure the receive unit is started */
4777 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4778 (adapter->flags & FLAG_RESTART_NOW)) {
4779 struct e1000_hw *hw = &adapter->hw;
4780 u32 rctl = er32(RCTL);
4781 ew32(RCTL, rctl | E1000_RCTL_EN);
4782 adapter->flags &= ~FLAG_RESTART_NOW;
4786 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
4788 struct e1000_hw *hw = &adapter->hw;
4790 /* With 82574 controllers, PHY needs to be checked periodically
4791 * for hung state and reset, if two calls return true
4793 if (e1000_check_phy_82574(hw))
4794 adapter->phy_hang_count++;
4796 adapter->phy_hang_count = 0;
4798 if (adapter->phy_hang_count > 1) {
4799 adapter->phy_hang_count = 0;
4800 schedule_work(&adapter->reset_task);
4805 * e1000_watchdog - Timer Call-back
4806 * @data: pointer to adapter cast into an unsigned long
4808 static void e1000_watchdog(unsigned long data)
4810 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
4812 /* Do the rest outside of interrupt context */
4813 schedule_work(&adapter->watchdog_task);
4815 /* TODO: make this use queue_delayed_work() */
4818 static void e1000_watchdog_task(struct work_struct *work)
4820 struct e1000_adapter *adapter = container_of(work,
4821 struct e1000_adapter,
4823 struct net_device *netdev = adapter->netdev;
4824 struct e1000_mac_info *mac = &adapter->hw.mac;
4825 struct e1000_phy_info *phy = &adapter->hw.phy;
4826 struct e1000_ring *tx_ring = adapter->tx_ring;
4827 struct e1000_hw *hw = &adapter->hw;
4830 if (test_bit(__E1000_DOWN, &adapter->state))
4833 link = e1000e_has_link(adapter);
4834 if ((netif_carrier_ok(netdev)) && link) {
4835 /* Cancel scheduled suspend requests. */
4836 pm_runtime_resume(netdev->dev.parent);
4838 e1000e_enable_receives(adapter);
4842 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4843 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4844 e1000_update_mng_vlan(adapter);
4847 if (!netif_carrier_ok(netdev)) {
4850 /* Cancel scheduled suspend requests. */
4851 pm_runtime_resume(netdev->dev.parent);
4853 /* update snapshot of PHY registers on LSC */
4854 e1000_phy_read_status(adapter);
4855 mac->ops.get_link_up_info(&adapter->hw,
4856 &adapter->link_speed,
4857 &adapter->link_duplex);
4858 e1000_print_link_info(adapter);
4860 /* check if SmartSpeed worked */
4861 e1000e_check_downshift(hw);
4862 if (phy->speed_downgraded)
4864 "Link Speed was downgraded by SmartSpeed\n");
4866 /* On supported PHYs, check for duplex mismatch only
4867 * if link has autonegotiated at 10/100 half
4869 if ((hw->phy.type == e1000_phy_igp_3 ||
4870 hw->phy.type == e1000_phy_bm) &&
4871 (hw->mac.autoneg == true) &&
4872 (adapter->link_speed == SPEED_10 ||
4873 adapter->link_speed == SPEED_100) &&
4874 (adapter->link_duplex == HALF_DUPLEX)) {
4877 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
4879 if (!(autoneg_exp & EXPANSION_NWAY))
4880 e_info("Autonegotiated half duplex but link partner cannot autoneg. Try forcing full duplex if link gets many collisions.\n");
4883 /* adjust timeout factor according to speed/duplex */
4884 adapter->tx_timeout_factor = 1;
4885 switch (adapter->link_speed) {
4888 adapter->tx_timeout_factor = 16;
4892 adapter->tx_timeout_factor = 10;
4896 /* workaround: re-program speed mode bit after
4899 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4902 tarc0 = er32(TARC(0));
4903 tarc0 &= ~SPEED_MODE_BIT;
4904 ew32(TARC(0), tarc0);
4907 /* disable TSO for pcie and 10/100 speeds, to avoid
4908 * some hardware issues
4910 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4911 switch (adapter->link_speed) {
4914 e_info("10/100 speed: disabling TSO\n");
4915 netdev->features &= ~NETIF_F_TSO;
4916 netdev->features &= ~NETIF_F_TSO6;
4919 netdev->features |= NETIF_F_TSO;
4920 netdev->features |= NETIF_F_TSO6;
4928 /* enable transmits in the hardware, need to do this
4929 * after setting TARC(0)
4932 tctl |= E1000_TCTL_EN;
4935 /* Perform any post-link-up configuration before
4936 * reporting link up.
4938 if (phy->ops.cfg_on_link_up)
4939 phy->ops.cfg_on_link_up(hw);
4941 netif_carrier_on(netdev);
4943 if (!test_bit(__E1000_DOWN, &adapter->state))
4944 mod_timer(&adapter->phy_info_timer,
4945 round_jiffies(jiffies + 2 * HZ));
4948 if (netif_carrier_ok(netdev)) {
4949 adapter->link_speed = 0;
4950 adapter->link_duplex = 0;
4951 /* Link status message must follow this format */
4952 pr_info("%s NIC Link is Down\n", adapter->netdev->name);
4953 netif_carrier_off(netdev);
4954 if (!test_bit(__E1000_DOWN, &adapter->state))
4955 mod_timer(&adapter->phy_info_timer,
4956 round_jiffies(jiffies + 2 * HZ));
4958 /* The link is lost so the controller stops DMA.
4959 * If there is queued Tx work that cannot be done
4960 * or if on an 8000ES2LAN which requires a Rx packet
4961 * buffer work-around on link down event, reset the
4962 * controller to flush the Tx/Rx packet buffers.
4963 * (Do the reset outside of interrupt context).
4965 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) ||
4966 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
4967 adapter->flags |= FLAG_RESTART_NOW;
4969 pm_schedule_suspend(netdev->dev.parent,
4975 spin_lock(&adapter->stats64_lock);
4976 e1000e_update_stats(adapter);
4978 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4979 adapter->tpt_old = adapter->stats.tpt;
4980 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4981 adapter->colc_old = adapter->stats.colc;
4983 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4984 adapter->gorc_old = adapter->stats.gorc;
4985 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4986 adapter->gotc_old = adapter->stats.gotc;
4987 spin_unlock(&adapter->stats64_lock);
4989 if (adapter->flags & FLAG_RESTART_NOW) {
4990 schedule_work(&adapter->reset_task);
4991 /* return immediately since reset is imminent */
4995 e1000e_update_adaptive(&adapter->hw);
4997 /* Simple mode for Interrupt Throttle Rate (ITR) */
4998 if (adapter->itr_setting == 4) {
4999 /* Symmetric Tx/Rx gets a reduced ITR=2000;
5000 * Total asymmetrical Tx or Rx gets ITR=8000;
5001 * everyone else is between 2000-8000.
5003 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5004 u32 dif = (adapter->gotc > adapter->gorc ?
5005 adapter->gotc - adapter->gorc :
5006 adapter->gorc - adapter->gotc) / 10000;
5007 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5009 e1000e_write_itr(adapter, itr);
5012 /* Cause software interrupt to ensure Rx ring is cleaned */
5013 if (adapter->msix_entries)
5014 ew32(ICS, adapter->rx_ring->ims_val);
5016 ew32(ICS, E1000_ICS_RXDMT0);
5018 /* flush pending descriptors to memory before detecting Tx hang */
5019 e1000e_flush_descriptors(adapter);
5021 /* Force detection of hung controller every watchdog period */
5022 adapter->detect_tx_hung = true;
5024 /* With 82571 controllers, LAA may be overwritten due to controller
5025 * reset from the other port. Set the appropriate LAA in RAR[0]
5027 if (e1000e_get_laa_state_82571(hw))
5028 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5030 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5031 e1000e_check_82574_phy_workaround(adapter);
5033 /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5034 if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5035 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5036 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5038 adapter->rx_hwtstamp_cleared++;
5040 adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5044 /* Reset the timer */
5045 if (!test_bit(__E1000_DOWN, &adapter->state))
5046 mod_timer(&adapter->watchdog_timer,
5047 round_jiffies(jiffies + 2 * HZ));
5050 #define E1000_TX_FLAGS_CSUM 0x00000001
5051 #define E1000_TX_FLAGS_VLAN 0x00000002
5052 #define E1000_TX_FLAGS_TSO 0x00000004
5053 #define E1000_TX_FLAGS_IPV4 0x00000008
5054 #define E1000_TX_FLAGS_NO_FCS 0x00000010
5055 #define E1000_TX_FLAGS_HWTSTAMP 0x00000020
5056 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
5057 #define E1000_TX_FLAGS_VLAN_SHIFT 16
5059 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb)
5061 struct e1000_context_desc *context_desc;
5062 struct e1000_buffer *buffer_info;
5066 u8 ipcss, ipcso, tucss, tucso, hdr_len;
5068 if (!skb_is_gso(skb))
5071 if (skb_header_cloned(skb)) {
5072 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5078 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5079 mss = skb_shinfo(skb)->gso_size;
5080 if (skb->protocol == htons(ETH_P_IP)) {
5081 struct iphdr *iph = ip_hdr(skb);
5084 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5086 cmd_length = E1000_TXD_CMD_IP;
5087 ipcse = skb_transport_offset(skb) - 1;
5088 } else if (skb_is_gso_v6(skb)) {
5089 ipv6_hdr(skb)->payload_len = 0;
5090 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5091 &ipv6_hdr(skb)->daddr,
5095 ipcss = skb_network_offset(skb);
5096 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5097 tucss = skb_transport_offset(skb);
5098 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5100 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5101 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5103 i = tx_ring->next_to_use;
5104 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5105 buffer_info = &tx_ring->buffer_info[i];
5107 context_desc->lower_setup.ip_fields.ipcss = ipcss;
5108 context_desc->lower_setup.ip_fields.ipcso = ipcso;
5109 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5110 context_desc->upper_setup.tcp_fields.tucss = tucss;
5111 context_desc->upper_setup.tcp_fields.tucso = tucso;
5112 context_desc->upper_setup.tcp_fields.tucse = 0;
5113 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5114 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5115 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5117 buffer_info->time_stamp = jiffies;
5118 buffer_info->next_to_watch = i;
5121 if (i == tx_ring->count)
5123 tx_ring->next_to_use = i;
5128 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb)
5130 struct e1000_adapter *adapter = tx_ring->adapter;
5131 struct e1000_context_desc *context_desc;
5132 struct e1000_buffer *buffer_info;
5135 u32 cmd_len = E1000_TXD_CMD_DEXT;
5138 if (skb->ip_summed != CHECKSUM_PARTIAL)
5141 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
5142 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
5144 protocol = skb->protocol;
5147 case cpu_to_be16(ETH_P_IP):
5148 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5149 cmd_len |= E1000_TXD_CMD_TCP;
5151 case cpu_to_be16(ETH_P_IPV6):
5152 /* XXX not handling all IPV6 headers */
5153 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5154 cmd_len |= E1000_TXD_CMD_TCP;
5157 if (unlikely(net_ratelimit()))
5158 e_warn("checksum_partial proto=%x!\n",
5159 be16_to_cpu(protocol));
5163 css = skb_checksum_start_offset(skb);
5165 i = tx_ring->next_to_use;
5166 buffer_info = &tx_ring->buffer_info[i];
5167 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5169 context_desc->lower_setup.ip_config = 0;
5170 context_desc->upper_setup.tcp_fields.tucss = css;
5171 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5172 context_desc->upper_setup.tcp_fields.tucse = 0;
5173 context_desc->tcp_seg_setup.data = 0;
5174 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5176 buffer_info->time_stamp = jiffies;
5177 buffer_info->next_to_watch = i;
5180 if (i == tx_ring->count)
5182 tx_ring->next_to_use = i;
5187 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5188 unsigned int first, unsigned int max_per_txd,
5189 unsigned int nr_frags)
5191 struct e1000_adapter *adapter = tx_ring->adapter;
5192 struct pci_dev *pdev = adapter->pdev;
5193 struct e1000_buffer *buffer_info;
5194 unsigned int len = skb_headlen(skb);
5195 unsigned int offset = 0, size, count = 0, i;
5196 unsigned int f, bytecount, segs;
5198 i = tx_ring->next_to_use;
5201 buffer_info = &tx_ring->buffer_info[i];
5202 size = min(len, max_per_txd);
5204 buffer_info->length = size;
5205 buffer_info->time_stamp = jiffies;
5206 buffer_info->next_to_watch = i;
5207 buffer_info->dma = dma_map_single(&pdev->dev,
5209 size, DMA_TO_DEVICE);
5210 buffer_info->mapped_as_page = false;
5211 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5220 if (i == tx_ring->count)
5225 for (f = 0; f < nr_frags; f++) {
5226 const struct skb_frag_struct *frag;
5228 frag = &skb_shinfo(skb)->frags[f];
5229 len = skb_frag_size(frag);
5234 if (i == tx_ring->count)
5237 buffer_info = &tx_ring->buffer_info[i];
5238 size = min(len, max_per_txd);
5240 buffer_info->length = size;
5241 buffer_info->time_stamp = jiffies;
5242 buffer_info->next_to_watch = i;
5243 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5246 buffer_info->mapped_as_page = true;
5247 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5256 segs = skb_shinfo(skb)->gso_segs ? : 1;
5257 /* multiply data chunks by size of headers */
5258 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5260 tx_ring->buffer_info[i].skb = skb;
5261 tx_ring->buffer_info[i].segs = segs;
5262 tx_ring->buffer_info[i].bytecount = bytecount;
5263 tx_ring->buffer_info[first].next_to_watch = i;
5268 dev_err(&pdev->dev, "Tx DMA map failed\n");
5269 buffer_info->dma = 0;
5275 i += tx_ring->count;
5277 buffer_info = &tx_ring->buffer_info[i];
5278 e1000_put_txbuf(tx_ring, buffer_info);
5284 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5286 struct e1000_adapter *adapter = tx_ring->adapter;
5287 struct e1000_tx_desc *tx_desc = NULL;
5288 struct e1000_buffer *buffer_info;
5289 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5292 if (tx_flags & E1000_TX_FLAGS_TSO) {
5293 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5295 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5297 if (tx_flags & E1000_TX_FLAGS_IPV4)
5298 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5301 if (tx_flags & E1000_TX_FLAGS_CSUM) {
5302 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5303 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5306 if (tx_flags & E1000_TX_FLAGS_VLAN) {
5307 txd_lower |= E1000_TXD_CMD_VLE;
5308 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5311 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5312 txd_lower &= ~(E1000_TXD_CMD_IFCS);
5314 if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5315 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5316 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5319 i = tx_ring->next_to_use;
5322 buffer_info = &tx_ring->buffer_info[i];
5323 tx_desc = E1000_TX_DESC(*tx_ring, i);
5324 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5325 tx_desc->lower.data = cpu_to_le32(txd_lower |
5326 buffer_info->length);
5327 tx_desc->upper.data = cpu_to_le32(txd_upper);
5330 if (i == tx_ring->count)
5332 } while (--count > 0);
5334 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5336 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5337 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5338 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5340 /* Force memory writes to complete before letting h/w
5341 * know there are new descriptors to fetch. (Only
5342 * applicable for weak-ordered memory model archs,
5347 tx_ring->next_to_use = i;
5349 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5350 e1000e_update_tdt_wa(tx_ring, i);
5352 writel(i, tx_ring->tail);
5354 /* we need this if more than one processor can write to our tail
5355 * at a time, it synchronizes IO on IA64/Altix systems
5360 #define MINIMUM_DHCP_PACKET_SIZE 282
5361 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5362 struct sk_buff *skb)
5364 struct e1000_hw *hw = &adapter->hw;
5367 if (vlan_tx_tag_present(skb) &&
5368 !((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5369 (adapter->hw.mng_cookie.status &
5370 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5373 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5376 if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5380 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5383 if (ip->protocol != IPPROTO_UDP)
5386 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5387 if (ntohs(udp->dest) != 67)
5390 offset = (u8 *)udp + 8 - skb->data;
5391 length = skb->len - offset;
5392 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5398 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5400 struct e1000_adapter *adapter = tx_ring->adapter;
5402 netif_stop_queue(adapter->netdev);
5403 /* Herbert's original patch had:
5404 * smp_mb__after_netif_stop_queue();
5405 * but since that doesn't exist yet, just open code it.
5409 /* We need to check again in a case another CPU has just
5410 * made room available.
5412 if (e1000_desc_unused(tx_ring) < size)
5416 netif_start_queue(adapter->netdev);
5417 ++adapter->restart_queue;
5421 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5423 BUG_ON(size > tx_ring->count);
5425 if (e1000_desc_unused(tx_ring) >= size)
5427 return __e1000_maybe_stop_tx(tx_ring, size);
5430 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5431 struct net_device *netdev)
5433 struct e1000_adapter *adapter = netdev_priv(netdev);
5434 struct e1000_ring *tx_ring = adapter->tx_ring;
5436 unsigned int tx_flags = 0;
5437 unsigned int len = skb_headlen(skb);
5438 unsigned int nr_frags;
5444 if (test_bit(__E1000_DOWN, &adapter->state)) {
5445 dev_kfree_skb_any(skb);
5446 return NETDEV_TX_OK;
5449 if (skb->len <= 0) {
5450 dev_kfree_skb_any(skb);
5451 return NETDEV_TX_OK;
5454 /* The minimum packet size with TCTL.PSP set is 17 bytes so
5455 * pad skb in order to meet this minimum size requirement
5457 if (unlikely(skb->len < 17)) {
5458 if (skb_pad(skb, 17 - skb->len))
5459 return NETDEV_TX_OK;
5461 skb_set_tail_pointer(skb, 17);
5464 mss = skb_shinfo(skb)->gso_size;
5468 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5469 * points to just header, pull a few bytes of payload from
5470 * frags into skb->data
5472 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5473 /* we do this workaround for ES2LAN, but it is un-necessary,
5474 * avoiding it could save a lot of cycles
5476 if (skb->data_len && (hdr_len == len)) {
5477 unsigned int pull_size;
5479 pull_size = min_t(unsigned int, 4, skb->data_len);
5480 if (!__pskb_pull_tail(skb, pull_size)) {
5481 e_err("__pskb_pull_tail failed.\n");
5482 dev_kfree_skb_any(skb);
5483 return NETDEV_TX_OK;
5485 len = skb_headlen(skb);
5489 /* reserve a descriptor for the offload context */
5490 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5494 count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5496 nr_frags = skb_shinfo(skb)->nr_frags;
5497 for (f = 0; f < nr_frags; f++)
5498 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5499 adapter->tx_fifo_limit);
5501 if (adapter->hw.mac.tx_pkt_filtering)
5502 e1000_transfer_dhcp_info(adapter, skb);
5504 /* need: count + 2 desc gap to keep tail from touching
5505 * head, otherwise try next time
5507 if (e1000_maybe_stop_tx(tx_ring, count + 2))
5508 return NETDEV_TX_BUSY;
5510 if (vlan_tx_tag_present(skb)) {
5511 tx_flags |= E1000_TX_FLAGS_VLAN;
5512 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
5515 first = tx_ring->next_to_use;
5517 tso = e1000_tso(tx_ring, skb);
5519 dev_kfree_skb_any(skb);
5520 return NETDEV_TX_OK;
5524 tx_flags |= E1000_TX_FLAGS_TSO;
5525 else if (e1000_tx_csum(tx_ring, skb))
5526 tx_flags |= E1000_TX_FLAGS_CSUM;
5528 /* Old method was to assume IPv4 packet by default if TSO was enabled.
5529 * 82571 hardware supports TSO capabilities for IPv6 as well...
5530 * no longer assume, we must.
5532 if (skb->protocol == htons(ETH_P_IP))
5533 tx_flags |= E1000_TX_FLAGS_IPV4;
5535 if (unlikely(skb->no_fcs))
5536 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5538 /* if count is 0 then mapping error has occurred */
5539 count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5542 if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5543 !adapter->tx_hwtstamp_skb)) {
5544 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5545 tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5546 adapter->tx_hwtstamp_skb = skb_get(skb);
5547 schedule_work(&adapter->tx_hwtstamp_work);
5549 skb_tx_timestamp(skb);
5552 netdev_sent_queue(netdev, skb->len);
5553 e1000_tx_queue(tx_ring, tx_flags, count);
5554 /* Make sure there is space in the ring for the next send. */
5555 e1000_maybe_stop_tx(tx_ring,
5557 DIV_ROUND_UP(PAGE_SIZE,
5558 adapter->tx_fifo_limit) + 2));
5560 dev_kfree_skb_any(skb);
5561 tx_ring->buffer_info[first].time_stamp = 0;
5562 tx_ring->next_to_use = first;
5565 return NETDEV_TX_OK;
5569 * e1000_tx_timeout - Respond to a Tx Hang
5570 * @netdev: network interface device structure
5572 static void e1000_tx_timeout(struct net_device *netdev)
5574 struct e1000_adapter *adapter = netdev_priv(netdev);
5576 /* Do the reset outside of interrupt context */
5577 adapter->tx_timeout_count++;
5578 schedule_work(&adapter->reset_task);
5581 static void e1000_reset_task(struct work_struct *work)
5583 struct e1000_adapter *adapter;
5584 adapter = container_of(work, struct e1000_adapter, reset_task);
5586 /* don't run the task if already down */
5587 if (test_bit(__E1000_DOWN, &adapter->state))
5590 if (!(adapter->flags & FLAG_RESTART_NOW)) {
5591 e1000e_dump(adapter);
5592 e_err("Reset adapter unexpectedly\n");
5594 e1000e_reinit_locked(adapter);
5598 * e1000_get_stats64 - Get System Network Statistics
5599 * @netdev: network interface device structure
5600 * @stats: rtnl_link_stats64 pointer
5602 * Returns the address of the device statistics structure.
5604 struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
5605 struct rtnl_link_stats64 *stats)
5607 struct e1000_adapter *adapter = netdev_priv(netdev);
5609 memset(stats, 0, sizeof(struct rtnl_link_stats64));
5610 spin_lock(&adapter->stats64_lock);
5611 e1000e_update_stats(adapter);
5612 /* Fill out the OS statistics structure */
5613 stats->rx_bytes = adapter->stats.gorc;
5614 stats->rx_packets = adapter->stats.gprc;
5615 stats->tx_bytes = adapter->stats.gotc;
5616 stats->tx_packets = adapter->stats.gptc;
5617 stats->multicast = adapter->stats.mprc;
5618 stats->collisions = adapter->stats.colc;
5622 /* RLEC on some newer hardware can be incorrect so build
5623 * our own version based on RUC and ROC
5625 stats->rx_errors = adapter->stats.rxerrc +
5626 adapter->stats.crcerrs + adapter->stats.algnerrc +
5627 adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5628 stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
5629 stats->rx_crc_errors = adapter->stats.crcerrs;
5630 stats->rx_frame_errors = adapter->stats.algnerrc;
5631 stats->rx_missed_errors = adapter->stats.mpc;
5634 stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5635 stats->tx_aborted_errors = adapter->stats.ecol;
5636 stats->tx_window_errors = adapter->stats.latecol;
5637 stats->tx_carrier_errors = adapter->stats.tncrs;
5639 /* Tx Dropped needs to be maintained elsewhere */
5641 spin_unlock(&adapter->stats64_lock);
5646 * e1000_change_mtu - Change the Maximum Transfer Unit
5647 * @netdev: network interface device structure
5648 * @new_mtu: new value for maximum frame size
5650 * Returns 0 on success, negative on failure
5652 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
5654 struct e1000_adapter *adapter = netdev_priv(netdev);
5655 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5657 /* Jumbo frame support */
5658 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
5659 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
5660 e_err("Jumbo Frames not supported.\n");
5664 /* Supported frame sizes */
5665 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
5666 (max_frame > adapter->max_hw_frame_size)) {
5667 e_err("Unsupported MTU setting\n");
5671 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
5672 if ((adapter->hw.mac.type >= e1000_pch2lan) &&
5673 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
5674 (new_mtu > ETH_DATA_LEN)) {
5675 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
5679 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
5680 usleep_range(1000, 2000);
5681 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
5682 adapter->max_frame_size = max_frame;
5683 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5684 netdev->mtu = new_mtu;
5685 if (netif_running(netdev))
5686 e1000e_down(adapter);
5688 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
5689 * means we reserve 2 more, this pushes us to allocate from the next
5691 * i.e. RXBUFFER_2048 --> size-4096 slab
5692 * However with the new *_jumbo_rx* routines, jumbo receives will use
5696 if (max_frame <= 2048)
5697 adapter->rx_buffer_len = 2048;
5699 adapter->rx_buffer_len = 4096;
5701 /* adjust allocation if LPE protects us, and we aren't using SBP */
5702 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
5703 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
5704 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
5707 if (netif_running(netdev))
5710 e1000e_reset(adapter);
5712 clear_bit(__E1000_RESETTING, &adapter->state);
5717 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
5720 struct e1000_adapter *adapter = netdev_priv(netdev);
5721 struct mii_ioctl_data *data = if_mii(ifr);
5723 if (adapter->hw.phy.media_type != e1000_media_type_copper)
5728 data->phy_id = adapter->hw.phy.addr;
5731 e1000_phy_read_status(adapter);
5733 switch (data->reg_num & 0x1F) {
5735 data->val_out = adapter->phy_regs.bmcr;
5738 data->val_out = adapter->phy_regs.bmsr;
5741 data->val_out = (adapter->hw.phy.id >> 16);
5744 data->val_out = (adapter->hw.phy.id & 0xFFFF);
5747 data->val_out = adapter->phy_regs.advertise;
5750 data->val_out = adapter->phy_regs.lpa;
5753 data->val_out = adapter->phy_regs.expansion;
5756 data->val_out = adapter->phy_regs.ctrl1000;
5759 data->val_out = adapter->phy_regs.stat1000;
5762 data->val_out = adapter->phy_regs.estatus;
5776 * e1000e_hwtstamp_ioctl - control hardware time stamping
5777 * @netdev: network interface device structure
5778 * @ifreq: interface request
5780 * Outgoing time stamping can be enabled and disabled. Play nice and
5781 * disable it when requested, although it shouldn't cause any overhead
5782 * when no packet needs it. At most one packet in the queue may be
5783 * marked for time stamping, otherwise it would be impossible to tell
5784 * for sure to which packet the hardware time stamp belongs.
5786 * Incoming time stamping has to be configured via the hardware filters.
5787 * Not all combinations are supported, in particular event type has to be
5788 * specified. Matching the kind of event packet is not supported, with the
5789 * exception of "all V2 events regardless of level 2 or 4".
5791 static int e1000e_hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr)
5793 struct e1000_adapter *adapter = netdev_priv(netdev);
5794 struct hwtstamp_config config;
5797 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
5800 adapter->hwtstamp_config = config;
5802 ret_val = e1000e_config_hwtstamp(adapter);
5806 config = adapter->hwtstamp_config;
5808 switch (config.rx_filter) {
5809 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
5810 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
5811 case HWTSTAMP_FILTER_PTP_V2_SYNC:
5812 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
5813 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
5814 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
5815 /* With V2 type filters which specify a Sync or Delay Request,
5816 * Path Delay Request/Response messages are also time stamped
5817 * by hardware so notify the caller the requested packets plus
5818 * some others are time stamped.
5820 config.rx_filter = HWTSTAMP_FILTER_SOME;
5826 return copy_to_user(ifr->ifr_data, &config,
5827 sizeof(config)) ? -EFAULT : 0;
5830 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5836 return e1000_mii_ioctl(netdev, ifr, cmd);
5838 return e1000e_hwtstamp_ioctl(netdev, ifr);
5844 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
5846 struct e1000_hw *hw = &adapter->hw;
5848 u16 phy_reg, wuc_enable;
5851 /* copy MAC RARs to PHY RARs */
5852 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
5854 retval = hw->phy.ops.acquire(hw);
5856 e_err("Could not acquire PHY\n");
5860 /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
5861 retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
5865 /* copy MAC MTA to PHY MTA - only needed for pchlan */
5866 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
5867 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
5868 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
5869 (u16)(mac_reg & 0xFFFF));
5870 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
5871 (u16)((mac_reg >> 16) & 0xFFFF));
5874 /* configure PHY Rx Control register */
5875 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
5876 mac_reg = er32(RCTL);
5877 if (mac_reg & E1000_RCTL_UPE)
5878 phy_reg |= BM_RCTL_UPE;
5879 if (mac_reg & E1000_RCTL_MPE)
5880 phy_reg |= BM_RCTL_MPE;
5881 phy_reg &= ~(BM_RCTL_MO_MASK);
5882 if (mac_reg & E1000_RCTL_MO_3)
5883 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
5884 << BM_RCTL_MO_SHIFT);
5885 if (mac_reg & E1000_RCTL_BAM)
5886 phy_reg |= BM_RCTL_BAM;
5887 if (mac_reg & E1000_RCTL_PMCF)
5888 phy_reg |= BM_RCTL_PMCF;
5889 mac_reg = er32(CTRL);
5890 if (mac_reg & E1000_CTRL_RFCE)
5891 phy_reg |= BM_RCTL_RFCE;
5892 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
5894 /* enable PHY wakeup in MAC register */
5896 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
5898 /* configure and enable PHY wakeup in PHY registers */
5899 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
5900 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
5902 /* activate PHY wakeup */
5903 wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
5904 retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
5906 e_err("Could not set PHY Host Wakeup bit\n");
5908 hw->phy.ops.release(hw);
5913 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
5915 struct net_device *netdev = pci_get_drvdata(pdev);
5916 struct e1000_adapter *adapter = netdev_priv(netdev);
5917 struct e1000_hw *hw = &adapter->hw;
5918 u32 ctrl, ctrl_ext, rctl, status;
5919 /* Runtime suspend should only enable wakeup for link changes */
5920 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
5923 netif_device_detach(netdev);
5925 if (netif_running(netdev)) {
5926 int count = E1000_CHECK_RESET_COUNT;
5928 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
5929 usleep_range(10000, 20000);
5931 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5932 e1000e_down(adapter);
5933 e1000_free_irq(adapter);
5935 e1000e_reset_interrupt_capability(adapter);
5937 status = er32(STATUS);
5938 if (status & E1000_STATUS_LU)
5939 wufc &= ~E1000_WUFC_LNKC;
5942 e1000_setup_rctl(adapter);
5943 e1000e_set_rx_mode(netdev);
5945 /* turn on all-multi mode if wake on multicast is enabled */
5946 if (wufc & E1000_WUFC_MC) {
5948 rctl |= E1000_RCTL_MPE;
5953 ctrl |= E1000_CTRL_ADVD3WUC;
5954 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5955 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
5958 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5959 adapter->hw.phy.media_type ==
5960 e1000_media_type_internal_serdes) {
5961 /* keep the laser running in D3 */
5962 ctrl_ext = er32(CTRL_EXT);
5963 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
5964 ew32(CTRL_EXT, ctrl_ext);
5967 if (adapter->flags & FLAG_IS_ICH)
5968 e1000_suspend_workarounds_ich8lan(&adapter->hw);
5970 /* Allow time for pending master requests to run */
5971 e1000e_disable_pcie_master(&adapter->hw);
5973 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5974 /* enable wakeup by the PHY */
5975 retval = e1000_init_phy_wakeup(adapter, wufc);
5979 /* enable wakeup by the MAC */
5981 ew32(WUC, E1000_WUC_PME_EN);
5988 if (adapter->hw.phy.type == e1000_phy_igp_3)
5989 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5991 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5992 * would have already happened in close and is redundant.
5994 e1000e_release_hw_control(adapter);
5996 pci_clear_master(pdev);
5998 /* The pci-e switch on some quad port adapters will report a
5999 * correctable error when the MAC transitions from D0 to D3. To
6000 * prevent this we need to mask off the correctable errors on the
6001 * downstream port of the pci-e switch.
6003 * We don't have the associated upstream bridge while assigning
6004 * the PCI device into guest. For example, the KVM on power is
6007 if (adapter->flags & FLAG_IS_QUAD_PORT) {
6008 struct pci_dev *us_dev = pdev->bus->self;
6014 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6015 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6016 (devctl & ~PCI_EXP_DEVCTL_CERE));
6018 pci_save_state(pdev);
6019 pci_prepare_to_sleep(pdev);
6021 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6028 * e1000e_disable_aspm - Disable ASPM states
6029 * @pdev: pointer to PCI device struct
6030 * @state: bit-mask of ASPM states to disable
6032 * Some devices *must* have certain ASPM states disabled per hardware errata.
6034 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6036 struct pci_dev *parent = pdev->bus->self;
6037 u16 aspm_dis_mask = 0;
6038 u16 pdev_aspmc, parent_aspmc;
6041 case PCIE_LINK_STATE_L0S:
6042 case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6043 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6044 /* fall-through - can't have L1 without L0s */
6045 case PCIE_LINK_STATE_L1:
6046 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6052 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6053 pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6056 pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6058 parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6061 /* Nothing to do if the ASPM states to be disabled already are */
6062 if (!(pdev_aspmc & aspm_dis_mask) &&
6063 (!parent || !(parent_aspmc & aspm_dis_mask)))
6066 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6067 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6069 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6072 #ifdef CONFIG_PCIEASPM
6073 pci_disable_link_state_locked(pdev, state);
6075 /* Double-check ASPM control. If not disabled by the above, the
6076 * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6077 * not enabled); override by writing PCI config space directly.
6079 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6080 pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6082 if (!(aspm_dis_mask & pdev_aspmc))
6086 /* Both device and parent should have the same ASPM setting.
6087 * Disable ASPM in downstream component first and then upstream.
6089 pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6092 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6097 static bool e1000e_pm_ready(struct e1000_adapter *adapter)
6099 return !!adapter->tx_ring->buffer_info;
6102 static int __e1000_resume(struct pci_dev *pdev)
6104 struct net_device *netdev = pci_get_drvdata(pdev);
6105 struct e1000_adapter *adapter = netdev_priv(netdev);
6106 struct e1000_hw *hw = &adapter->hw;
6107 u16 aspm_disable_flag = 0;
6110 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6111 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6112 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6113 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6114 if (aspm_disable_flag)
6115 e1000e_disable_aspm(pdev, aspm_disable_flag);
6117 pci_set_master(pdev);
6119 e1000e_set_interrupt_capability(adapter);
6120 if (netif_running(netdev)) {
6121 err = e1000_request_irq(adapter);
6126 if (hw->mac.type >= e1000_pch2lan)
6127 e1000_resume_workarounds_pchlan(&adapter->hw);
6129 e1000e_power_up_phy(adapter);
6131 /* report the system wakeup cause from S3/S4 */
6132 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6135 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6137 e_info("PHY Wakeup cause - %s\n",
6138 phy_data & E1000_WUS_EX ? "Unicast Packet" :
6139 phy_data & E1000_WUS_MC ? "Multicast Packet" :
6140 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6141 phy_data & E1000_WUS_MAG ? "Magic Packet" :
6142 phy_data & E1000_WUS_LNKC ?
6143 "Link Status Change" : "other");
6145 e1e_wphy(&adapter->hw, BM_WUS, ~0);
6147 u32 wus = er32(WUS);
6149 e_info("MAC Wakeup cause - %s\n",
6150 wus & E1000_WUS_EX ? "Unicast Packet" :
6151 wus & E1000_WUS_MC ? "Multicast Packet" :
6152 wus & E1000_WUS_BC ? "Broadcast Packet" :
6153 wus & E1000_WUS_MAG ? "Magic Packet" :
6154 wus & E1000_WUS_LNKC ? "Link Status Change" :
6160 e1000e_reset(adapter);
6162 e1000_init_manageability_pt(adapter);
6164 if (netif_running(netdev))
6167 netif_device_attach(netdev);
6169 /* If the controller has AMT, do not set DRV_LOAD until the interface
6170 * is up. For all other cases, let the f/w know that the h/w is now
6171 * under the control of the driver.
6173 if (!(adapter->flags & FLAG_HAS_AMT))
6174 e1000e_get_hw_control(adapter);
6179 #ifdef CONFIG_PM_SLEEP
6180 static int e1000_suspend(struct device *dev)
6182 struct pci_dev *pdev = to_pci_dev(dev);
6184 return __e1000_shutdown(pdev, false);
6187 static int e1000_resume(struct device *dev)
6189 struct pci_dev *pdev = to_pci_dev(dev);
6190 struct net_device *netdev = pci_get_drvdata(pdev);
6191 struct e1000_adapter *adapter = netdev_priv(netdev);
6193 if (e1000e_pm_ready(adapter))
6194 adapter->idle_check = true;
6196 return __e1000_resume(pdev);
6198 #endif /* CONFIG_PM_SLEEP */
6200 #ifdef CONFIG_PM_RUNTIME
6201 static int e1000_runtime_suspend(struct device *dev)
6203 struct pci_dev *pdev = to_pci_dev(dev);
6204 struct net_device *netdev = pci_get_drvdata(pdev);
6205 struct e1000_adapter *adapter = netdev_priv(netdev);
6207 if (!e1000e_pm_ready(adapter))
6210 return __e1000_shutdown(pdev, true);
6213 static int e1000_idle(struct device *dev)
6215 struct pci_dev *pdev = to_pci_dev(dev);
6216 struct net_device *netdev = pci_get_drvdata(pdev);
6217 struct e1000_adapter *adapter = netdev_priv(netdev);
6219 if (!e1000e_pm_ready(adapter))
6222 if (adapter->idle_check) {
6223 adapter->idle_check = false;
6224 if (!e1000e_has_link(adapter))
6225 pm_schedule_suspend(dev, MSEC_PER_SEC);
6231 static int e1000_runtime_resume(struct device *dev)
6233 struct pci_dev *pdev = to_pci_dev(dev);
6234 struct net_device *netdev = pci_get_drvdata(pdev);
6235 struct e1000_adapter *adapter = netdev_priv(netdev);
6237 if (!e1000e_pm_ready(adapter))
6240 adapter->idle_check = !dev->power.runtime_auto;
6241 return __e1000_resume(pdev);
6243 #endif /* CONFIG_PM_RUNTIME */
6244 #endif /* CONFIG_PM */
6246 static void e1000_shutdown(struct pci_dev *pdev)
6248 __e1000_shutdown(pdev, false);
6251 #ifdef CONFIG_NET_POLL_CONTROLLER
6253 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
6255 struct net_device *netdev = data;
6256 struct e1000_adapter *adapter = netdev_priv(netdev);
6258 if (adapter->msix_entries) {
6259 int vector, msix_irq;
6262 msix_irq = adapter->msix_entries[vector].vector;
6263 disable_irq(msix_irq);
6264 e1000_intr_msix_rx(msix_irq, netdev);
6265 enable_irq(msix_irq);
6268 msix_irq = adapter->msix_entries[vector].vector;
6269 disable_irq(msix_irq);
6270 e1000_intr_msix_tx(msix_irq, netdev);
6271 enable_irq(msix_irq);
6274 msix_irq = adapter->msix_entries[vector].vector;
6275 disable_irq(msix_irq);
6276 e1000_msix_other(msix_irq, netdev);
6277 enable_irq(msix_irq);
6285 * @netdev: network interface device structure
6287 * Polling 'interrupt' - used by things like netconsole to send skbs
6288 * without having to re-enable interrupts. It's not called while
6289 * the interrupt routine is executing.
6291 static void e1000_netpoll(struct net_device *netdev)
6293 struct e1000_adapter *adapter = netdev_priv(netdev);
6295 switch (adapter->int_mode) {
6296 case E1000E_INT_MODE_MSIX:
6297 e1000_intr_msix(adapter->pdev->irq, netdev);
6299 case E1000E_INT_MODE_MSI:
6300 disable_irq(adapter->pdev->irq);
6301 e1000_intr_msi(adapter->pdev->irq, netdev);
6302 enable_irq(adapter->pdev->irq);
6304 default: /* E1000E_INT_MODE_LEGACY */
6305 disable_irq(adapter->pdev->irq);
6306 e1000_intr(adapter->pdev->irq, netdev);
6307 enable_irq(adapter->pdev->irq);
6314 * e1000_io_error_detected - called when PCI error is detected
6315 * @pdev: Pointer to PCI device
6316 * @state: The current pci connection state
6318 * This function is called after a PCI bus error affecting
6319 * this device has been detected.
6321 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
6322 pci_channel_state_t state)
6324 struct net_device *netdev = pci_get_drvdata(pdev);
6325 struct e1000_adapter *adapter = netdev_priv(netdev);
6327 netif_device_detach(netdev);
6329 if (state == pci_channel_io_perm_failure)
6330 return PCI_ERS_RESULT_DISCONNECT;
6332 if (netif_running(netdev))
6333 e1000e_down(adapter);
6334 pci_disable_device(pdev);
6336 /* Request a slot slot reset. */
6337 return PCI_ERS_RESULT_NEED_RESET;
6341 * e1000_io_slot_reset - called after the pci bus has been reset.
6342 * @pdev: Pointer to PCI device
6344 * Restart the card from scratch, as if from a cold-boot. Implementation
6345 * resembles the first-half of the e1000_resume routine.
6347 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
6349 struct net_device *netdev = pci_get_drvdata(pdev);
6350 struct e1000_adapter *adapter = netdev_priv(netdev);
6351 struct e1000_hw *hw = &adapter->hw;
6352 u16 aspm_disable_flag = 0;
6354 pci_ers_result_t result;
6356 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6357 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6358 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6359 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6360 if (aspm_disable_flag)
6361 e1000e_disable_aspm(pdev, aspm_disable_flag);
6363 err = pci_enable_device_mem(pdev);
6366 "Cannot re-enable PCI device after reset.\n");
6367 result = PCI_ERS_RESULT_DISCONNECT;
6369 pdev->state_saved = true;
6370 pci_restore_state(pdev);
6371 pci_set_master(pdev);
6373 pci_enable_wake(pdev, PCI_D3hot, 0);
6374 pci_enable_wake(pdev, PCI_D3cold, 0);
6376 e1000e_reset(adapter);
6378 result = PCI_ERS_RESULT_RECOVERED;
6381 pci_cleanup_aer_uncorrect_error_status(pdev);
6387 * e1000_io_resume - called when traffic can start flowing again.
6388 * @pdev: Pointer to PCI device
6390 * This callback is called when the error recovery driver tells us that
6391 * its OK to resume normal operation. Implementation resembles the
6392 * second-half of the e1000_resume routine.
6394 static void e1000_io_resume(struct pci_dev *pdev)
6396 struct net_device *netdev = pci_get_drvdata(pdev);
6397 struct e1000_adapter *adapter = netdev_priv(netdev);
6399 e1000_init_manageability_pt(adapter);
6401 if (netif_running(netdev)) {
6402 if (e1000e_up(adapter)) {
6404 "can't bring device back up after reset\n");
6409 netif_device_attach(netdev);
6411 /* If the controller has AMT, do not set DRV_LOAD until the interface
6412 * is up. For all other cases, let the f/w know that the h/w is now
6413 * under the control of the driver.
6415 if (!(adapter->flags & FLAG_HAS_AMT))
6416 e1000e_get_hw_control(adapter);
6419 static void e1000_print_device_info(struct e1000_adapter *adapter)
6421 struct e1000_hw *hw = &adapter->hw;
6422 struct net_device *netdev = adapter->netdev;
6424 u8 pba_str[E1000_PBANUM_LENGTH];
6426 /* print bus type/speed/width info */
6427 e_info("(PCI Express:2.5GT/s:%s) %pM\n",
6429 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
6433 e_info("Intel(R) PRO/%s Network Connection\n",
6434 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
6435 ret_val = e1000_read_pba_string_generic(hw, pba_str,
6436 E1000_PBANUM_LENGTH);
6438 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
6439 e_info("MAC: %d, PHY: %d, PBA No: %s\n",
6440 hw->mac.type, hw->phy.type, pba_str);
6443 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
6445 struct e1000_hw *hw = &adapter->hw;
6449 if (hw->mac.type != e1000_82573)
6452 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
6454 if (!ret_val && (!(buf & (1 << 0)))) {
6455 /* Deep Smart Power Down (DSPD) */
6456 dev_warn(&adapter->pdev->dev,
6457 "Warning: detected DSPD enabled in EEPROM\n");
6461 static int e1000_set_features(struct net_device *netdev,
6462 netdev_features_t features)
6464 struct e1000_adapter *adapter = netdev_priv(netdev);
6465 netdev_features_t changed = features ^ netdev->features;
6467 if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
6468 adapter->flags |= FLAG_TSO_FORCE;
6470 if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
6471 NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
6475 if (changed & NETIF_F_RXFCS) {
6476 if (features & NETIF_F_RXFCS) {
6477 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6479 /* We need to take it back to defaults, which might mean
6480 * stripping is still disabled at the adapter level.
6482 if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
6483 adapter->flags2 |= FLAG2_CRC_STRIPPING;
6485 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6489 netdev->features = features;
6491 if (netif_running(netdev))
6492 e1000e_reinit_locked(adapter);
6494 e1000e_reset(adapter);
6499 static const struct net_device_ops e1000e_netdev_ops = {
6500 .ndo_open = e1000_open,
6501 .ndo_stop = e1000_close,
6502 .ndo_start_xmit = e1000_xmit_frame,
6503 .ndo_get_stats64 = e1000e_get_stats64,
6504 .ndo_set_rx_mode = e1000e_set_rx_mode,
6505 .ndo_set_mac_address = e1000_set_mac,
6506 .ndo_change_mtu = e1000_change_mtu,
6507 .ndo_do_ioctl = e1000_ioctl,
6508 .ndo_tx_timeout = e1000_tx_timeout,
6509 .ndo_validate_addr = eth_validate_addr,
6511 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
6512 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
6513 #ifdef CONFIG_NET_POLL_CONTROLLER
6514 .ndo_poll_controller = e1000_netpoll,
6516 .ndo_set_features = e1000_set_features,
6520 * e1000_probe - Device Initialization Routine
6521 * @pdev: PCI device information struct
6522 * @ent: entry in e1000_pci_tbl
6524 * Returns 0 on success, negative on failure
6526 * e1000_probe initializes an adapter identified by a pci_dev structure.
6527 * The OS initialization, configuring of the adapter private structure,
6528 * and a hardware reset occur.
6530 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
6532 struct net_device *netdev;
6533 struct e1000_adapter *adapter;
6534 struct e1000_hw *hw;
6535 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
6536 resource_size_t mmio_start, mmio_len;
6537 resource_size_t flash_start, flash_len;
6538 static int cards_found;
6539 u16 aspm_disable_flag = 0;
6540 int bars, i, err, pci_using_dac;
6541 u16 eeprom_data = 0;
6542 u16 eeprom_apme_mask = E1000_EEPROM_APME;
6544 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
6545 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6546 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
6547 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6548 if (aspm_disable_flag)
6549 e1000e_disable_aspm(pdev, aspm_disable_flag);
6551 err = pci_enable_device_mem(pdev);
6556 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
6558 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
6562 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
6564 err = dma_set_coherent_mask(&pdev->dev,
6568 "No usable DMA configuration, aborting\n");
6574 bars = pci_select_bars(pdev, IORESOURCE_MEM);
6575 err = pci_request_selected_regions_exclusive(pdev, bars,
6576 e1000e_driver_name);
6580 /* AER (Advanced Error Reporting) hooks */
6581 pci_enable_pcie_error_reporting(pdev);
6583 pci_set_master(pdev);
6584 /* PCI config space info */
6585 err = pci_save_state(pdev);
6587 goto err_alloc_etherdev;
6590 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6592 goto err_alloc_etherdev;
6594 SET_NETDEV_DEV(netdev, &pdev->dev);
6596 netdev->irq = pdev->irq;
6598 pci_set_drvdata(pdev, netdev);
6599 adapter = netdev_priv(netdev);
6601 adapter->netdev = netdev;
6602 adapter->pdev = pdev;
6604 adapter->pba = ei->pba;
6605 adapter->flags = ei->flags;
6606 adapter->flags2 = ei->flags2;
6607 adapter->hw.adapter = adapter;
6608 adapter->hw.mac.type = ei->mac;
6609 adapter->max_hw_frame_size = ei->max_hw_frame_size;
6610 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
6612 mmio_start = pci_resource_start(pdev, 0);
6613 mmio_len = pci_resource_len(pdev, 0);
6616 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6617 if (!adapter->hw.hw_addr)
6620 if ((adapter->flags & FLAG_HAS_FLASH) &&
6621 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
6622 flash_start = pci_resource_start(pdev, 1);
6623 flash_len = pci_resource_len(pdev, 1);
6624 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6625 if (!adapter->hw.flash_address)
6629 /* Set default EEE advertisement */
6630 if (adapter->flags2 & FLAG2_HAS_EEE)
6631 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
6633 /* construct the net_device struct */
6634 netdev->netdev_ops = &e1000e_netdev_ops;
6635 e1000e_set_ethtool_ops(netdev);
6636 netdev->watchdog_timeo = 5 * HZ;
6637 netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
6638 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
6640 netdev->mem_start = mmio_start;
6641 netdev->mem_end = mmio_start + mmio_len;
6643 adapter->bd_number = cards_found++;
6645 e1000e_check_options(adapter);
6647 /* setup adapter struct */
6648 err = e1000_sw_init(adapter);
6652 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
6653 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
6654 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
6656 err = ei->get_variants(adapter);
6660 if ((adapter->flags & FLAG_IS_ICH) &&
6661 (adapter->flags & FLAG_READ_ONLY_NVM))
6662 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
6664 hw->mac.ops.get_bus_info(&adapter->hw);
6666 adapter->hw.phy.autoneg_wait_to_complete = 0;
6668 /* Copper options */
6669 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
6670 adapter->hw.phy.mdix = AUTO_ALL_MODES;
6671 adapter->hw.phy.disable_polarity_correction = 0;
6672 adapter->hw.phy.ms_type = e1000_ms_hw_default;
6675 if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
6676 dev_info(&pdev->dev,
6677 "PHY reset is blocked due to SOL/IDER session.\n");
6679 /* Set initial default active device features */
6680 netdev->features = (NETIF_F_SG |
6681 NETIF_F_HW_VLAN_CTAG_RX |
6682 NETIF_F_HW_VLAN_CTAG_TX |
6689 /* Set user-changeable features (subset of all device features) */
6690 netdev->hw_features = netdev->features;
6691 netdev->hw_features |= NETIF_F_RXFCS;
6692 netdev->priv_flags |= IFF_SUPP_NOFCS;
6693 netdev->hw_features |= NETIF_F_RXALL;
6695 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
6696 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
6698 netdev->vlan_features |= (NETIF_F_SG |
6703 netdev->priv_flags |= IFF_UNICAST_FLT;
6705 if (pci_using_dac) {
6706 netdev->features |= NETIF_F_HIGHDMA;
6707 netdev->vlan_features |= NETIF_F_HIGHDMA;
6710 if (e1000e_enable_mng_pass_thru(&adapter->hw))
6711 adapter->flags |= FLAG_MNG_PT_ENABLED;
6713 /* before reading the NVM, reset the controller to
6714 * put the device in a known good starting state
6716 adapter->hw.mac.ops.reset_hw(&adapter->hw);
6718 /* systems with ASPM and others may see the checksum fail on the first
6719 * attempt. Let's give it a few tries
6722 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
6725 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
6731 e1000_eeprom_checks(adapter);
6733 /* copy the MAC address */
6734 if (e1000e_read_mac_addr(&adapter->hw))
6736 "NVM Read Error while reading MAC address\n");
6738 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
6740 if (!is_valid_ether_addr(netdev->dev_addr)) {
6741 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
6747 init_timer(&adapter->watchdog_timer);
6748 adapter->watchdog_timer.function = e1000_watchdog;
6749 adapter->watchdog_timer.data = (unsigned long)adapter;
6751 init_timer(&adapter->phy_info_timer);
6752 adapter->phy_info_timer.function = e1000_update_phy_info;
6753 adapter->phy_info_timer.data = (unsigned long)adapter;
6755 INIT_WORK(&adapter->reset_task, e1000_reset_task);
6756 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
6757 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
6758 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
6759 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
6761 /* Initialize link parameters. User can change them with ethtool */
6762 adapter->hw.mac.autoneg = 1;
6763 adapter->fc_autoneg = true;
6764 adapter->hw.fc.requested_mode = e1000_fc_default;
6765 adapter->hw.fc.current_mode = e1000_fc_default;
6766 adapter->hw.phy.autoneg_advertised = 0x2f;
6768 /* Initial Wake on LAN setting - If APM wake is enabled in
6769 * the EEPROM, enable the ACPI Magic Packet filter
6771 if (adapter->flags & FLAG_APME_IN_WUC) {
6772 /* APME bit in EEPROM is mapped to WUC.APME */
6773 eeprom_data = er32(WUC);
6774 eeprom_apme_mask = E1000_WUC_APME;
6775 if ((hw->mac.type > e1000_ich10lan) &&
6776 (eeprom_data & E1000_WUC_PHY_WAKE))
6777 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
6778 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
6779 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
6780 (adapter->hw.bus.func == 1))
6781 e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_B,
6784 e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_A,
6788 /* fetch WoL from EEPROM */
6789 if (eeprom_data & eeprom_apme_mask)
6790 adapter->eeprom_wol |= E1000_WUFC_MAG;
6792 /* now that we have the eeprom settings, apply the special cases
6793 * where the eeprom may be wrong or the board simply won't support
6794 * wake on lan on a particular port
6796 if (!(adapter->flags & FLAG_HAS_WOL))
6797 adapter->eeprom_wol = 0;
6799 /* initialize the wol settings based on the eeprom settings */
6800 adapter->wol = adapter->eeprom_wol;
6802 /* make sure adapter isn't asleep if manageability is enabled */
6803 if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
6804 (hw->mac.ops.check_mng_mode(hw)))
6805 device_wakeup_enable(&pdev->dev);
6807 /* save off EEPROM version number */
6808 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
6810 /* reset the hardware with the new settings */
6811 e1000e_reset(adapter);
6813 /* If the controller has AMT, do not set DRV_LOAD until the interface
6814 * is up. For all other cases, let the f/w know that the h/w is now
6815 * under the control of the driver.
6817 if (!(adapter->flags & FLAG_HAS_AMT))
6818 e1000e_get_hw_control(adapter);
6820 strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
6821 err = register_netdev(netdev);
6825 /* carrier off reporting is important to ethtool even BEFORE open */
6826 netif_carrier_off(netdev);
6828 /* init PTP hardware clock */
6829 e1000e_ptp_init(adapter);
6831 e1000_print_device_info(adapter);
6833 if (pci_dev_run_wake(pdev))
6834 pm_runtime_put_noidle(&pdev->dev);
6839 if (!(adapter->flags & FLAG_HAS_AMT))
6840 e1000e_release_hw_control(adapter);
6842 if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
6843 e1000_phy_hw_reset(&adapter->hw);
6845 kfree(adapter->tx_ring);
6846 kfree(adapter->rx_ring);
6848 if (adapter->hw.flash_address)
6849 iounmap(adapter->hw.flash_address);
6850 e1000e_reset_interrupt_capability(adapter);
6852 iounmap(adapter->hw.hw_addr);
6854 free_netdev(netdev);
6856 pci_release_selected_regions(pdev,
6857 pci_select_bars(pdev, IORESOURCE_MEM));
6860 pci_disable_device(pdev);
6865 * e1000_remove - Device Removal Routine
6866 * @pdev: PCI device information struct
6868 * e1000_remove is called by the PCI subsystem to alert the driver
6869 * that it should release a PCI device. The could be caused by a
6870 * Hot-Plug event, or because the driver is going to be removed from
6873 static void e1000_remove(struct pci_dev *pdev)
6875 struct net_device *netdev = pci_get_drvdata(pdev);
6876 struct e1000_adapter *adapter = netdev_priv(netdev);
6877 bool down = test_bit(__E1000_DOWN, &adapter->state);
6879 e1000e_ptp_remove(adapter);
6881 /* The timers may be rescheduled, so explicitly disable them
6882 * from being rescheduled.
6885 set_bit(__E1000_DOWN, &adapter->state);
6886 del_timer_sync(&adapter->watchdog_timer);
6887 del_timer_sync(&adapter->phy_info_timer);
6889 cancel_work_sync(&adapter->reset_task);
6890 cancel_work_sync(&adapter->watchdog_task);
6891 cancel_work_sync(&adapter->downshift_task);
6892 cancel_work_sync(&adapter->update_phy_task);
6893 cancel_work_sync(&adapter->print_hang_task);
6895 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
6896 cancel_work_sync(&adapter->tx_hwtstamp_work);
6897 if (adapter->tx_hwtstamp_skb) {
6898 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
6899 adapter->tx_hwtstamp_skb = NULL;
6903 if (!(netdev->flags & IFF_UP))
6904 e1000_power_down_phy(adapter);
6906 /* Don't lie to e1000_close() down the road. */
6908 clear_bit(__E1000_DOWN, &adapter->state);
6909 unregister_netdev(netdev);
6911 if (pci_dev_run_wake(pdev))
6912 pm_runtime_get_noresume(&pdev->dev);
6914 /* Release control of h/w to f/w. If f/w is AMT enabled, this
6915 * would have already happened in close and is redundant.
6917 e1000e_release_hw_control(adapter);
6919 e1000e_reset_interrupt_capability(adapter);
6920 kfree(adapter->tx_ring);
6921 kfree(adapter->rx_ring);
6923 iounmap(adapter->hw.hw_addr);
6924 if (adapter->hw.flash_address)
6925 iounmap(adapter->hw.flash_address);
6926 pci_release_selected_regions(pdev,
6927 pci_select_bars(pdev, IORESOURCE_MEM));
6929 free_netdev(netdev);
6932 pci_disable_pcie_error_reporting(pdev);
6934 pci_disable_device(pdev);
6937 /* PCI Error Recovery (ERS) */
6938 static const struct pci_error_handlers e1000_err_handler = {
6939 .error_detected = e1000_io_error_detected,
6940 .slot_reset = e1000_io_slot_reset,
6941 .resume = e1000_io_resume,
6944 static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
6945 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
6946 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
6947 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
6948 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
6950 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
6951 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
6952 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
6953 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
6954 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
6956 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
6957 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
6958 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
6959 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
6961 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
6962 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
6963 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
6965 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
6966 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
6967 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
6969 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
6970 board_80003es2lan },
6971 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
6972 board_80003es2lan },
6973 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
6974 board_80003es2lan },
6975 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
6976 board_80003es2lan },
6978 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
6979 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
6980 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
6981 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
6982 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
6983 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
6984 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
6985 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
6987 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
6988 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
6989 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
6990 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
6991 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
6992 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
6993 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
6994 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
6995 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
6997 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
6998 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
6999 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7001 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7002 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7003 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7005 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7006 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7007 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7008 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7010 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7011 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7013 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7014 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7015 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7016 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7017 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7018 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7019 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7020 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7022 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7024 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7027 static const struct dev_pm_ops e1000_pm_ops = {
7028 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
7029 SET_RUNTIME_PM_OPS(e1000_runtime_suspend, e1000_runtime_resume,
7034 /* PCI Device API Driver */
7035 static struct pci_driver e1000_driver = {
7036 .name = e1000e_driver_name,
7037 .id_table = e1000_pci_tbl,
7038 .probe = e1000_probe,
7039 .remove = e1000_remove,
7042 .pm = &e1000_pm_ops,
7045 .shutdown = e1000_shutdown,
7046 .err_handler = &e1000_err_handler
7050 * e1000_init_module - Driver Registration Routine
7052 * e1000_init_module is the first routine called when the driver is
7053 * loaded. All it does is register with the PCI subsystem.
7055 static int __init e1000_init_module(void)
7058 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
7059 e1000e_driver_version);
7060 pr_info("Copyright(c) 1999 - 2013 Intel Corporation.\n");
7061 ret = pci_register_driver(&e1000_driver);
7065 module_init(e1000_init_module);
7068 * e1000_exit_module - Driver Exit Cleanup Routine
7070 * e1000_exit_module is called just before the driver is removed
7073 static void __exit e1000_exit_module(void)
7075 pci_unregister_driver(&e1000_driver);
7077 module_exit(e1000_exit_module);
7079 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
7080 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7081 MODULE_LICENSE("GPL");
7082 MODULE_VERSION(DRV_VERSION);