1 /* Intel PRO/1000 Linux driver
2 * Copyright(c) 1999 - 2014 Intel Corporation.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * The full GNU General Public License is included in this distribution in
14 * the file called "COPYING".
16 * Contact Information:
17 * Linux NICS <linux.nics@intel.com>
18 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
19 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 * e1000_raise_eec_clk - Raise EEPROM clock
26 * @hw: pointer to the HW structure
27 * @eecd: pointer to the EEPROM
29 * Enable/Raise the EEPROM clock bit.
31 static void e1000_raise_eec_clk(struct e1000_hw *hw, u32 *eecd)
33 *eecd = *eecd | E1000_EECD_SK;
36 udelay(hw->nvm.delay_usec);
40 * e1000_lower_eec_clk - Lower EEPROM clock
41 * @hw: pointer to the HW structure
42 * @eecd: pointer to the EEPROM
44 * Clear/Lower the EEPROM clock bit.
46 static void e1000_lower_eec_clk(struct e1000_hw *hw, u32 *eecd)
48 *eecd = *eecd & ~E1000_EECD_SK;
51 udelay(hw->nvm.delay_usec);
55 * e1000_shift_out_eec_bits - Shift data bits our to the EEPROM
56 * @hw: pointer to the HW structure
57 * @data: data to send to the EEPROM
58 * @count: number of bits to shift out
60 * We need to shift 'count' bits out to the EEPROM. So, the value in the
61 * "data" parameter will be shifted out to the EEPROM one bit at a time.
62 * In order to do this, "data" must be broken down into bits.
64 static void e1000_shift_out_eec_bits(struct e1000_hw *hw, u16 data, u16 count)
66 struct e1000_nvm_info *nvm = &hw->nvm;
67 u32 eecd = er32(EECD);
70 mask = 0x01 << (count - 1);
71 if (nvm->type == e1000_nvm_eeprom_spi)
72 eecd |= E1000_EECD_DO;
75 eecd &= ~E1000_EECD_DI;
78 eecd |= E1000_EECD_DI;
83 udelay(nvm->delay_usec);
85 e1000_raise_eec_clk(hw, &eecd);
86 e1000_lower_eec_clk(hw, &eecd);
91 eecd &= ~E1000_EECD_DI;
96 * e1000_shift_in_eec_bits - Shift data bits in from the EEPROM
97 * @hw: pointer to the HW structure
98 * @count: number of bits to shift in
100 * In order to read a register from the EEPROM, we need to shift 'count' bits
101 * in from the EEPROM. Bits are "shifted in" by raising the clock input to
102 * the EEPROM (setting the SK bit), and then reading the value of the data out
103 * "DO" bit. During this "shifting in" process the data in "DI" bit should
106 static u16 e1000_shift_in_eec_bits(struct e1000_hw *hw, u16 count)
113 eecd &= ~(E1000_EECD_DO | E1000_EECD_DI);
116 for (i = 0; i < count; i++) {
118 e1000_raise_eec_clk(hw, &eecd);
122 eecd &= ~E1000_EECD_DI;
123 if (eecd & E1000_EECD_DO)
126 e1000_lower_eec_clk(hw, &eecd);
133 * e1000e_poll_eerd_eewr_done - Poll for EEPROM read/write completion
134 * @hw: pointer to the HW structure
135 * @ee_reg: EEPROM flag for polling
137 * Polls the EEPROM status bit for either read or write completion based
138 * upon the value of 'ee_reg'.
140 s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg)
142 u32 attempts = 100000;
145 for (i = 0; i < attempts; i++) {
146 if (ee_reg == E1000_NVM_POLL_READ)
151 if (reg & E1000_NVM_RW_REG_DONE)
157 return -E1000_ERR_NVM;
161 * e1000e_acquire_nvm - Generic request for access to EEPROM
162 * @hw: pointer to the HW structure
164 * Set the EEPROM access request bit and wait for EEPROM access grant bit.
165 * Return successful if access grant bit set, else clear the request for
166 * EEPROM access and return -E1000_ERR_NVM (-1).
168 s32 e1000e_acquire_nvm(struct e1000_hw *hw)
170 u32 eecd = er32(EECD);
171 s32 timeout = E1000_NVM_GRANT_ATTEMPTS;
173 ew32(EECD, eecd | E1000_EECD_REQ);
177 if (eecd & E1000_EECD_GNT)
185 eecd &= ~E1000_EECD_REQ;
187 e_dbg("Could not acquire NVM grant\n");
188 return -E1000_ERR_NVM;
195 * e1000_standby_nvm - Return EEPROM to standby state
196 * @hw: pointer to the HW structure
198 * Return the EEPROM to a standby state.
200 static void e1000_standby_nvm(struct e1000_hw *hw)
202 struct e1000_nvm_info *nvm = &hw->nvm;
203 u32 eecd = er32(EECD);
205 if (nvm->type == e1000_nvm_eeprom_spi) {
206 /* Toggle CS to flush commands */
207 eecd |= E1000_EECD_CS;
210 udelay(nvm->delay_usec);
211 eecd &= ~E1000_EECD_CS;
214 udelay(nvm->delay_usec);
219 * e1000_stop_nvm - Terminate EEPROM command
220 * @hw: pointer to the HW structure
222 * Terminates the current command by inverting the EEPROM's chip select pin.
224 static void e1000_stop_nvm(struct e1000_hw *hw)
229 if (hw->nvm.type == e1000_nvm_eeprom_spi) {
231 eecd |= E1000_EECD_CS;
232 e1000_lower_eec_clk(hw, &eecd);
237 * e1000e_release_nvm - Release exclusive access to EEPROM
238 * @hw: pointer to the HW structure
240 * Stop any current commands to the EEPROM and clear the EEPROM request bit.
242 void e1000e_release_nvm(struct e1000_hw *hw)
249 eecd &= ~E1000_EECD_REQ;
254 * e1000_ready_nvm_eeprom - Prepares EEPROM for read/write
255 * @hw: pointer to the HW structure
257 * Setups the EEPROM for reading and writing.
259 static s32 e1000_ready_nvm_eeprom(struct e1000_hw *hw)
261 struct e1000_nvm_info *nvm = &hw->nvm;
262 u32 eecd = er32(EECD);
265 if (nvm->type == e1000_nvm_eeprom_spi) {
266 u16 timeout = NVM_MAX_RETRY_SPI;
268 /* Clear SK and CS */
269 eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);
274 /* Read "Status Register" repeatedly until the LSB is cleared.
275 * The EEPROM will signal that the command has been completed
276 * by clearing bit 0 of the internal status register. If it's
277 * not cleared within 'timeout', then error out.
280 e1000_shift_out_eec_bits(hw, NVM_RDSR_OPCODE_SPI,
281 hw->nvm.opcode_bits);
282 spi_stat_reg = (u8)e1000_shift_in_eec_bits(hw, 8);
283 if (!(spi_stat_reg & NVM_STATUS_RDY_SPI))
287 e1000_standby_nvm(hw);
292 e_dbg("SPI NVM Status error\n");
293 return -E1000_ERR_NVM;
301 * e1000e_read_nvm_eerd - Reads EEPROM using EERD register
302 * @hw: pointer to the HW structure
303 * @offset: offset of word in the EEPROM to read
304 * @words: number of words to read
305 * @data: word read from the EEPROM
307 * Reads a 16 bit word from the EEPROM using the EERD register.
309 s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
311 struct e1000_nvm_info *nvm = &hw->nvm;
315 /* A check for invalid values: offset too large, too many words,
316 * too many words for the offset, and not enough words.
318 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
320 e_dbg("nvm parameter(s) out of bounds\n");
321 return -E1000_ERR_NVM;
324 for (i = 0; i < words; i++) {
325 eerd = ((offset + i) << E1000_NVM_RW_ADDR_SHIFT) +
326 E1000_NVM_RW_REG_START;
329 ret_val = e1000e_poll_eerd_eewr_done(hw, E1000_NVM_POLL_READ);
333 data[i] = (er32(EERD) >> E1000_NVM_RW_REG_DATA);
340 * e1000e_write_nvm_spi - Write to EEPROM using SPI
341 * @hw: pointer to the HW structure
342 * @offset: offset within the EEPROM to be written to
343 * @words: number of words to write
344 * @data: 16 bit word(s) to be written to the EEPROM
346 * Writes data to EEPROM at offset using SPI interface.
348 * If e1000e_update_nvm_checksum is not called after this function , the
349 * EEPROM will most likely contain an invalid checksum.
351 s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
353 struct e1000_nvm_info *nvm = &hw->nvm;
354 s32 ret_val = -E1000_ERR_NVM;
357 /* A check for invalid values: offset too large, too many words,
358 * and not enough words.
360 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
362 e_dbg("nvm parameter(s) out of bounds\n");
363 return -E1000_ERR_NVM;
366 while (widx < words) {
367 u8 write_opcode = NVM_WRITE_OPCODE_SPI;
369 ret_val = nvm->ops.acquire(hw);
373 ret_val = e1000_ready_nvm_eeprom(hw);
375 nvm->ops.release(hw);
379 e1000_standby_nvm(hw);
381 /* Send the WRITE ENABLE command (8 bit opcode) */
382 e1000_shift_out_eec_bits(hw, NVM_WREN_OPCODE_SPI,
385 e1000_standby_nvm(hw);
387 /* Some SPI eeproms use the 8th address bit embedded in the
390 if ((nvm->address_bits == 8) && (offset >= 128))
391 write_opcode |= NVM_A8_OPCODE_SPI;
393 /* Send the Write command (8-bit opcode + addr) */
394 e1000_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits);
395 e1000_shift_out_eec_bits(hw, (u16)((offset + widx) * 2),
398 /* Loop to allow for up to whole page write of eeprom */
399 while (widx < words) {
400 u16 word_out = data[widx];
402 word_out = (word_out >> 8) | (word_out << 8);
403 e1000_shift_out_eec_bits(hw, word_out, 16);
406 if ((((offset + widx) * 2) % nvm->page_size) == 0) {
407 e1000_standby_nvm(hw);
411 usleep_range(10000, 20000);
412 nvm->ops.release(hw);
419 * e1000_read_pba_string_generic - Read device part number
420 * @hw: pointer to the HW structure
421 * @pba_num: pointer to device part number
422 * @pba_num_size: size of part number buffer
424 * Reads the product board assembly (PBA) number from the EEPROM and stores
425 * the value in pba_num.
427 s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num,
436 if (pba_num == NULL) {
437 e_dbg("PBA string buffer was null\n");
438 return -E1000_ERR_INVALID_ARGUMENT;
441 ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
443 e_dbg("NVM Read Error\n");
447 ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);
449 e_dbg("NVM Read Error\n");
453 /* if nvm_data is not ptr guard the PBA must be in legacy format which
454 * means pba_ptr is actually our second data word for the PBA number
455 * and we can decode it into an ascii string
457 if (nvm_data != NVM_PBA_PTR_GUARD) {
458 e_dbg("NVM PBA number is not stored as string\n");
460 /* make sure callers buffer is big enough to store the PBA */
461 if (pba_num_size < E1000_PBANUM_LENGTH) {
462 e_dbg("PBA string buffer too small\n");
463 return E1000_ERR_NO_SPACE;
466 /* extract hex string from data and pba_ptr */
467 pba_num[0] = (nvm_data >> 12) & 0xF;
468 pba_num[1] = (nvm_data >> 8) & 0xF;
469 pba_num[2] = (nvm_data >> 4) & 0xF;
470 pba_num[3] = nvm_data & 0xF;
471 pba_num[4] = (pba_ptr >> 12) & 0xF;
472 pba_num[5] = (pba_ptr >> 8) & 0xF;
475 pba_num[8] = (pba_ptr >> 4) & 0xF;
476 pba_num[9] = pba_ptr & 0xF;
478 /* put a null character on the end of our string */
481 /* switch all the data but the '-' to hex char */
482 for (offset = 0; offset < 10; offset++) {
483 if (pba_num[offset] < 0xA)
484 pba_num[offset] += '0';
485 else if (pba_num[offset] < 0x10)
486 pba_num[offset] += 'A' - 0xA;
492 ret_val = e1000_read_nvm(hw, pba_ptr, 1, &length);
494 e_dbg("NVM Read Error\n");
498 if (length == 0xFFFF || length == 0) {
499 e_dbg("NVM PBA number section invalid length\n");
500 return -E1000_ERR_NVM_PBA_SECTION;
502 /* check if pba_num buffer is big enough */
503 if (pba_num_size < (((u32)length * 2) - 1)) {
504 e_dbg("PBA string buffer too small\n");
505 return -E1000_ERR_NO_SPACE;
508 /* trim pba length from start of string */
512 for (offset = 0; offset < length; offset++) {
513 ret_val = e1000_read_nvm(hw, pba_ptr + offset, 1, &nvm_data);
515 e_dbg("NVM Read Error\n");
518 pba_num[offset * 2] = (u8)(nvm_data >> 8);
519 pba_num[(offset * 2) + 1] = (u8)(nvm_data & 0xFF);
521 pba_num[offset * 2] = '\0';
527 * e1000_read_mac_addr_generic - Read device MAC address
528 * @hw: pointer to the HW structure
530 * Reads the device MAC address from the EEPROM and stores the value.
531 * Since devices with two ports use the same EEPROM, we increment the
532 * last bit in the MAC address for the second port.
534 s32 e1000_read_mac_addr_generic(struct e1000_hw *hw)
540 rar_high = er32(RAH(0));
541 rar_low = er32(RAL(0));
543 for (i = 0; i < E1000_RAL_MAC_ADDR_LEN; i++)
544 hw->mac.perm_addr[i] = (u8)(rar_low >> (i * 8));
546 for (i = 0; i < E1000_RAH_MAC_ADDR_LEN; i++)
547 hw->mac.perm_addr[i + 4] = (u8)(rar_high >> (i * 8));
549 for (i = 0; i < ETH_ALEN; i++)
550 hw->mac.addr[i] = hw->mac.perm_addr[i];
556 * e1000e_validate_nvm_checksum_generic - Validate EEPROM checksum
557 * @hw: pointer to the HW structure
559 * Calculates the EEPROM checksum by reading/adding each word of the EEPROM
560 * and then verifies that the sum of the EEPROM is equal to 0xBABA.
562 s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw)
568 for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
569 ret_val = e1000_read_nvm(hw, i, 1, &nvm_data);
571 e_dbg("NVM Read Error\n");
574 checksum += nvm_data;
577 if (checksum != (u16)NVM_SUM) {
578 e_dbg("NVM Checksum Invalid\n");
579 return -E1000_ERR_NVM;
586 * e1000e_update_nvm_checksum_generic - Update EEPROM checksum
587 * @hw: pointer to the HW structure
589 * Updates the EEPROM checksum by reading/adding each word of the EEPROM
590 * up to the checksum. Then calculates the EEPROM checksum and writes the
591 * value to the EEPROM.
593 s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw)
599 for (i = 0; i < NVM_CHECKSUM_REG; i++) {
600 ret_val = e1000_read_nvm(hw, i, 1, &nvm_data);
602 e_dbg("NVM Read Error while updating checksum.\n");
605 checksum += nvm_data;
607 checksum = (u16)NVM_SUM - checksum;
608 ret_val = e1000_write_nvm(hw, NVM_CHECKSUM_REG, 1, &checksum);
610 e_dbg("NVM Write Error while updating checksum.\n");
616 * e1000e_reload_nvm_generic - Reloads EEPROM
617 * @hw: pointer to the HW structure
619 * Reloads the EEPROM by setting the "Reinitialize from EEPROM" bit in the
620 * extended control register.
622 void e1000e_reload_nvm_generic(struct e1000_hw *hw)
626 usleep_range(10, 20);
627 ctrl_ext = er32(CTRL_EXT);
628 ctrl_ext |= E1000_CTRL_EXT_EE_RST;
629 ew32(CTRL_EXT, ctrl_ext);