1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2014 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 0
41 #define DRV_VERSION_MINOR 4
42 #define DRV_VERSION_BUILD 13
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
61 /* i40e_pci_tbl - PCI Device ID Table
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static DEFINE_PCI_DEVICE_TABLE(i40e_pci_tbl) = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 /* required last entry */
80 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
82 #define I40E_MAX_VF_COUNT 128
83 static int debug = -1;
84 module_param(debug, int, 0);
85 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
87 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
88 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
89 MODULE_LICENSE("GPL");
90 MODULE_VERSION(DRV_VERSION);
93 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
94 * @hw: pointer to the HW structure
95 * @mem: ptr to mem struct to fill out
96 * @size: size of memory requested
97 * @alignment: what to align the allocation to
99 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
100 u64 size, u32 alignment)
102 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
104 mem->size = ALIGN(size, alignment);
105 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
106 &mem->pa, GFP_KERNEL);
114 * i40e_free_dma_mem_d - OS specific memory free for shared code
115 * @hw: pointer to the HW structure
116 * @mem: ptr to mem struct to free
118 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
120 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
122 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
131 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
132 * @hw: pointer to the HW structure
133 * @mem: ptr to mem struct to fill out
134 * @size: size of memory requested
136 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
140 mem->va = kzalloc(size, GFP_KERNEL);
149 * i40e_free_virt_mem_d - OS specific memory free for shared code
150 * @hw: pointer to the HW structure
151 * @mem: ptr to mem struct to free
153 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
155 /* it's ok to kfree a NULL pointer */
164 * i40e_get_lump - find a lump of free generic resource
165 * @pf: board private structure
166 * @pile: the pile of resource to search
167 * @needed: the number of items needed
168 * @id: an owner id to stick on the items assigned
170 * Returns the base item index of the lump, or negative for error
172 * The search_hint trick and lack of advanced fit-finding only work
173 * because we're highly likely to have all the same size lump requests.
174 * Linear search time and any fragmentation should be minimal.
176 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
182 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
183 dev_info(&pf->pdev->dev,
184 "param err: pile=%p needed=%d id=0x%04x\n",
189 /* start the linear search with an imperfect hint */
190 i = pile->search_hint;
191 while (i < pile->num_entries) {
192 /* skip already allocated entries */
193 if (pile->list[i] & I40E_PILE_VALID_BIT) {
198 /* do we have enough in this lump? */
199 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
200 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
205 /* there was enough, so assign it to the requestor */
206 for (j = 0; j < needed; j++)
207 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
209 pile->search_hint = i + j;
212 /* not enough, so skip over it and continue looking */
221 * i40e_put_lump - return a lump of generic resource
222 * @pile: the pile of resource to search
223 * @index: the base item index
224 * @id: the owner id of the items assigned
226 * Returns the count of items in the lump
228 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
230 int valid_id = (id | I40E_PILE_VALID_BIT);
234 if (!pile || index >= pile->num_entries)
238 i < pile->num_entries && pile->list[i] == valid_id;
244 if (count && index < pile->search_hint)
245 pile->search_hint = index;
251 * i40e_service_event_schedule - Schedule the service task to wake up
252 * @pf: board private structure
254 * If not already scheduled, this puts the task into the work queue
256 static void i40e_service_event_schedule(struct i40e_pf *pf)
258 if (!test_bit(__I40E_DOWN, &pf->state) &&
259 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
260 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
261 schedule_work(&pf->service_task);
265 * i40e_tx_timeout - Respond to a Tx Hang
266 * @netdev: network interface device structure
268 * If any port has noticed a Tx timeout, it is likely that the whole
269 * device is munged, not just the one netdev port, so go for the full
272 static void i40e_tx_timeout(struct net_device *netdev)
274 struct i40e_netdev_priv *np = netdev_priv(netdev);
275 struct i40e_vsi *vsi = np->vsi;
276 struct i40e_pf *pf = vsi->back;
278 pf->tx_timeout_count++;
280 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
281 pf->tx_timeout_recovery_level = 0;
282 pf->tx_timeout_last_recovery = jiffies;
283 netdev_info(netdev, "tx_timeout recovery level %d\n",
284 pf->tx_timeout_recovery_level);
286 switch (pf->tx_timeout_recovery_level) {
288 /* disable and re-enable queues for the VSI */
289 if (in_interrupt()) {
290 set_bit(__I40E_REINIT_REQUESTED, &pf->state);
291 set_bit(__I40E_REINIT_REQUESTED, &vsi->state);
293 i40e_vsi_reinit_locked(vsi);
297 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
300 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
303 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
306 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
307 set_bit(__I40E_DOWN_REQUESTED, &pf->state);
308 set_bit(__I40E_DOWN_REQUESTED, &vsi->state);
311 i40e_service_event_schedule(pf);
312 pf->tx_timeout_recovery_level++;
316 * i40e_release_rx_desc - Store the new tail and head values
317 * @rx_ring: ring to bump
318 * @val: new head index
320 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
322 rx_ring->next_to_use = val;
324 /* Force memory writes to complete before letting h/w
325 * know there are new descriptors to fetch. (Only
326 * applicable for weak-ordered memory model archs,
330 writel(val, rx_ring->tail);
334 * i40e_get_vsi_stats_struct - Get System Network Statistics
335 * @vsi: the VSI we care about
337 * Returns the address of the device statistics structure.
338 * The statistics are actually updated from the service task.
340 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
342 return &vsi->net_stats;
346 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
347 * @netdev: network interface device structure
349 * Returns the address of the device statistics structure.
350 * The statistics are actually updated from the service task.
352 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
353 struct net_device *netdev,
354 struct rtnl_link_stats64 *stats)
356 struct i40e_netdev_priv *np = netdev_priv(netdev);
357 struct i40e_ring *tx_ring, *rx_ring;
358 struct i40e_vsi *vsi = np->vsi;
359 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
362 if (test_bit(__I40E_DOWN, &vsi->state))
369 for (i = 0; i < vsi->num_queue_pairs; i++) {
373 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
378 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
379 packets = tx_ring->stats.packets;
380 bytes = tx_ring->stats.bytes;
381 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
383 stats->tx_packets += packets;
384 stats->tx_bytes += bytes;
385 rx_ring = &tx_ring[1];
388 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
389 packets = rx_ring->stats.packets;
390 bytes = rx_ring->stats.bytes;
391 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
393 stats->rx_packets += packets;
394 stats->rx_bytes += bytes;
398 /* following stats updated by i40e_watchdog_subtask() */
399 stats->multicast = vsi_stats->multicast;
400 stats->tx_errors = vsi_stats->tx_errors;
401 stats->tx_dropped = vsi_stats->tx_dropped;
402 stats->rx_errors = vsi_stats->rx_errors;
403 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
404 stats->rx_length_errors = vsi_stats->rx_length_errors;
410 * i40e_vsi_reset_stats - Resets all stats of the given vsi
411 * @vsi: the VSI to have its stats reset
413 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
415 struct rtnl_link_stats64 *ns;
421 ns = i40e_get_vsi_stats_struct(vsi);
422 memset(ns, 0, sizeof(*ns));
423 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
424 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
425 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
426 if (vsi->rx_rings && vsi->rx_rings[0]) {
427 for (i = 0; i < vsi->num_queue_pairs; i++) {
428 memset(&vsi->rx_rings[i]->stats, 0 ,
429 sizeof(vsi->rx_rings[i]->stats));
430 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
431 sizeof(vsi->rx_rings[i]->rx_stats));
432 memset(&vsi->tx_rings[i]->stats, 0 ,
433 sizeof(vsi->tx_rings[i]->stats));
434 memset(&vsi->tx_rings[i]->tx_stats, 0,
435 sizeof(vsi->tx_rings[i]->tx_stats));
438 vsi->stat_offsets_loaded = false;
442 * i40e_pf_reset_stats - Reset all of the stats for the given pf
443 * @pf: the PF to be reset
445 void i40e_pf_reset_stats(struct i40e_pf *pf)
449 memset(&pf->stats, 0, sizeof(pf->stats));
450 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
451 pf->stat_offsets_loaded = false;
453 for (i = 0; i < I40E_MAX_VEB; i++) {
455 memset(&pf->veb[i]->stats, 0,
456 sizeof(pf->veb[i]->stats));
457 memset(&pf->veb[i]->stats_offsets, 0,
458 sizeof(pf->veb[i]->stats_offsets));
459 pf->veb[i]->stat_offsets_loaded = false;
465 * i40e_stat_update48 - read and update a 48 bit stat from the chip
466 * @hw: ptr to the hardware info
467 * @hireg: the high 32 bit reg to read
468 * @loreg: the low 32 bit reg to read
469 * @offset_loaded: has the initial offset been loaded yet
470 * @offset: ptr to current offset value
471 * @stat: ptr to the stat
473 * Since the device stats are not reset at PFReset, they likely will not
474 * be zeroed when the driver starts. We'll save the first values read
475 * and use them as offsets to be subtracted from the raw values in order
476 * to report stats that count from zero. In the process, we also manage
477 * the potential roll-over.
479 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
480 bool offset_loaded, u64 *offset, u64 *stat)
484 if (hw->device_id == I40E_DEV_ID_QEMU) {
485 new_data = rd32(hw, loreg);
486 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
488 new_data = rd64(hw, loreg);
492 if (likely(new_data >= *offset))
493 *stat = new_data - *offset;
495 *stat = (new_data + ((u64)1 << 48)) - *offset;
496 *stat &= 0xFFFFFFFFFFFFULL;
500 * i40e_stat_update32 - read and update a 32 bit stat from the chip
501 * @hw: ptr to the hardware info
502 * @reg: the hw reg to read
503 * @offset_loaded: has the initial offset been loaded yet
504 * @offset: ptr to current offset value
505 * @stat: ptr to the stat
507 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
508 bool offset_loaded, u64 *offset, u64 *stat)
512 new_data = rd32(hw, reg);
515 if (likely(new_data >= *offset))
516 *stat = (u32)(new_data - *offset);
518 *stat = (u32)((new_data + ((u64)1 << 32)) - *offset);
522 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
523 * @vsi: the VSI to be updated
525 void i40e_update_eth_stats(struct i40e_vsi *vsi)
527 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
528 struct i40e_pf *pf = vsi->back;
529 struct i40e_hw *hw = &pf->hw;
530 struct i40e_eth_stats *oes;
531 struct i40e_eth_stats *es; /* device's eth stats */
533 es = &vsi->eth_stats;
534 oes = &vsi->eth_stats_offsets;
536 /* Gather up the stats that the hw collects */
537 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
538 vsi->stat_offsets_loaded,
539 &oes->tx_errors, &es->tx_errors);
540 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
541 vsi->stat_offsets_loaded,
542 &oes->rx_discards, &es->rx_discards);
543 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
544 vsi->stat_offsets_loaded,
545 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
546 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
547 vsi->stat_offsets_loaded,
548 &oes->tx_errors, &es->tx_errors);
550 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
551 I40E_GLV_GORCL(stat_idx),
552 vsi->stat_offsets_loaded,
553 &oes->rx_bytes, &es->rx_bytes);
554 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
555 I40E_GLV_UPRCL(stat_idx),
556 vsi->stat_offsets_loaded,
557 &oes->rx_unicast, &es->rx_unicast);
558 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
559 I40E_GLV_MPRCL(stat_idx),
560 vsi->stat_offsets_loaded,
561 &oes->rx_multicast, &es->rx_multicast);
562 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
563 I40E_GLV_BPRCL(stat_idx),
564 vsi->stat_offsets_loaded,
565 &oes->rx_broadcast, &es->rx_broadcast);
567 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
568 I40E_GLV_GOTCL(stat_idx),
569 vsi->stat_offsets_loaded,
570 &oes->tx_bytes, &es->tx_bytes);
571 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
572 I40E_GLV_UPTCL(stat_idx),
573 vsi->stat_offsets_loaded,
574 &oes->tx_unicast, &es->tx_unicast);
575 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
576 I40E_GLV_MPTCL(stat_idx),
577 vsi->stat_offsets_loaded,
578 &oes->tx_multicast, &es->tx_multicast);
579 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
580 I40E_GLV_BPTCL(stat_idx),
581 vsi->stat_offsets_loaded,
582 &oes->tx_broadcast, &es->tx_broadcast);
583 vsi->stat_offsets_loaded = true;
587 * i40e_update_veb_stats - Update Switch component statistics
588 * @veb: the VEB being updated
590 static void i40e_update_veb_stats(struct i40e_veb *veb)
592 struct i40e_pf *pf = veb->pf;
593 struct i40e_hw *hw = &pf->hw;
594 struct i40e_eth_stats *oes;
595 struct i40e_eth_stats *es; /* device's eth stats */
598 idx = veb->stats_idx;
600 oes = &veb->stats_offsets;
602 /* Gather up the stats that the hw collects */
603 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
604 veb->stat_offsets_loaded,
605 &oes->tx_discards, &es->tx_discards);
606 if (hw->revision_id > 0)
607 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
608 veb->stat_offsets_loaded,
609 &oes->rx_unknown_protocol,
610 &es->rx_unknown_protocol);
611 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
612 veb->stat_offsets_loaded,
613 &oes->rx_bytes, &es->rx_bytes);
614 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
615 veb->stat_offsets_loaded,
616 &oes->rx_unicast, &es->rx_unicast);
617 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
618 veb->stat_offsets_loaded,
619 &oes->rx_multicast, &es->rx_multicast);
620 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
621 veb->stat_offsets_loaded,
622 &oes->rx_broadcast, &es->rx_broadcast);
624 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
625 veb->stat_offsets_loaded,
626 &oes->tx_bytes, &es->tx_bytes);
627 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
628 veb->stat_offsets_loaded,
629 &oes->tx_unicast, &es->tx_unicast);
630 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
631 veb->stat_offsets_loaded,
632 &oes->tx_multicast, &es->tx_multicast);
633 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
634 veb->stat_offsets_loaded,
635 &oes->tx_broadcast, &es->tx_broadcast);
636 veb->stat_offsets_loaded = true;
640 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
641 * @pf: the corresponding PF
643 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
645 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
647 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
648 struct i40e_hw_port_stats *nsd = &pf->stats;
649 struct i40e_hw *hw = &pf->hw;
653 if ((hw->fc.current_mode != I40E_FC_FULL) &&
654 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
657 xoff = nsd->link_xoff_rx;
658 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
659 pf->stat_offsets_loaded,
660 &osd->link_xoff_rx, &nsd->link_xoff_rx);
662 /* No new LFC xoff rx */
663 if (!(nsd->link_xoff_rx - xoff))
666 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */
667 for (v = 0; v < pf->num_alloc_vsi; v++) {
668 struct i40e_vsi *vsi = pf->vsi[v];
670 if (!vsi || !vsi->tx_rings[0])
673 for (i = 0; i < vsi->num_queue_pairs; i++) {
674 struct i40e_ring *ring = vsi->tx_rings[i];
675 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
681 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
682 * @pf: the corresponding PF
684 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
686 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
688 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
689 struct i40e_hw_port_stats *nsd = &pf->stats;
690 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
691 struct i40e_dcbx_config *dcb_cfg;
692 struct i40e_hw *hw = &pf->hw;
696 dcb_cfg = &hw->local_dcbx_config;
698 /* See if DCB enabled with PFC TC */
699 if (!(pf->flags & I40E_FLAG_DCB_ENABLED) ||
700 !(dcb_cfg->pfc.pfcenable)) {
701 i40e_update_link_xoff_rx(pf);
705 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
706 u64 prio_xoff = nsd->priority_xoff_rx[i];
707 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
708 pf->stat_offsets_loaded,
709 &osd->priority_xoff_rx[i],
710 &nsd->priority_xoff_rx[i]);
712 /* No new PFC xoff rx */
713 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
715 /* Get the TC for given priority */
716 tc = dcb_cfg->etscfg.prioritytable[i];
720 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */
721 for (v = 0; v < pf->num_alloc_vsi; v++) {
722 struct i40e_vsi *vsi = pf->vsi[v];
724 if (!vsi || !vsi->tx_rings[0])
727 for (i = 0; i < vsi->num_queue_pairs; i++) {
728 struct i40e_ring *ring = vsi->tx_rings[i];
732 clear_bit(__I40E_HANG_CHECK_ARMED,
739 * i40e_update_vsi_stats - Update the vsi statistics counters.
740 * @vsi: the VSI to be updated
742 * There are a few instances where we store the same stat in a
743 * couple of different structs. This is partly because we have
744 * the netdev stats that need to be filled out, which is slightly
745 * different from the "eth_stats" defined by the chip and used in
746 * VF communications. We sort it out here.
748 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
750 struct i40e_pf *pf = vsi->back;
751 struct rtnl_link_stats64 *ons;
752 struct rtnl_link_stats64 *ns; /* netdev stats */
753 struct i40e_eth_stats *oes;
754 struct i40e_eth_stats *es; /* device's eth stats */
755 u32 tx_restart, tx_busy;
761 if (test_bit(__I40E_DOWN, &vsi->state) ||
762 test_bit(__I40E_CONFIG_BUSY, &pf->state))
765 ns = i40e_get_vsi_stats_struct(vsi);
766 ons = &vsi->net_stats_offsets;
767 es = &vsi->eth_stats;
768 oes = &vsi->eth_stats_offsets;
770 /* Gather up the netdev and vsi stats that the driver collects
771 * on the fly during packet processing
775 tx_restart = tx_busy = 0;
779 for (q = 0; q < vsi->num_queue_pairs; q++) {
785 p = ACCESS_ONCE(vsi->tx_rings[q]);
788 start = u64_stats_fetch_begin_irq(&p->syncp);
789 packets = p->stats.packets;
790 bytes = p->stats.bytes;
791 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
794 tx_restart += p->tx_stats.restart_queue;
795 tx_busy += p->tx_stats.tx_busy;
797 /* Rx queue is part of the same block as Tx queue */
800 start = u64_stats_fetch_begin_irq(&p->syncp);
801 packets = p->stats.packets;
802 bytes = p->stats.bytes;
803 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
806 rx_buf += p->rx_stats.alloc_buff_failed;
807 rx_page += p->rx_stats.alloc_page_failed;
810 vsi->tx_restart = tx_restart;
811 vsi->tx_busy = tx_busy;
812 vsi->rx_page_failed = rx_page;
813 vsi->rx_buf_failed = rx_buf;
815 ns->rx_packets = rx_p;
817 ns->tx_packets = tx_p;
820 /* update netdev stats from eth stats */
821 i40e_update_eth_stats(vsi);
822 ons->tx_errors = oes->tx_errors;
823 ns->tx_errors = es->tx_errors;
824 ons->multicast = oes->rx_multicast;
825 ns->multicast = es->rx_multicast;
826 ons->rx_dropped = oes->rx_discards;
827 ns->rx_dropped = es->rx_discards;
828 ons->tx_dropped = oes->tx_discards;
829 ns->tx_dropped = es->tx_discards;
831 /* pull in a couple PF stats if this is the main vsi */
832 if (vsi == pf->vsi[pf->lan_vsi]) {
833 ns->rx_crc_errors = pf->stats.crc_errors;
834 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
835 ns->rx_length_errors = pf->stats.rx_length_errors;
840 * i40e_update_pf_stats - Update the pf statistics counters.
841 * @pf: the PF to be updated
843 static void i40e_update_pf_stats(struct i40e_pf *pf)
845 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
846 struct i40e_hw_port_stats *nsd = &pf->stats;
847 struct i40e_hw *hw = &pf->hw;
851 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
852 I40E_GLPRT_GORCL(hw->port),
853 pf->stat_offsets_loaded,
854 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
855 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
856 I40E_GLPRT_GOTCL(hw->port),
857 pf->stat_offsets_loaded,
858 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
859 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
860 pf->stat_offsets_loaded,
861 &osd->eth.rx_discards,
862 &nsd->eth.rx_discards);
863 i40e_stat_update32(hw, I40E_GLPRT_TDPC(hw->port),
864 pf->stat_offsets_loaded,
865 &osd->eth.tx_discards,
866 &nsd->eth.tx_discards);
868 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
869 I40E_GLPRT_UPRCL(hw->port),
870 pf->stat_offsets_loaded,
871 &osd->eth.rx_unicast,
872 &nsd->eth.rx_unicast);
873 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
874 I40E_GLPRT_MPRCL(hw->port),
875 pf->stat_offsets_loaded,
876 &osd->eth.rx_multicast,
877 &nsd->eth.rx_multicast);
878 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
879 I40E_GLPRT_BPRCL(hw->port),
880 pf->stat_offsets_loaded,
881 &osd->eth.rx_broadcast,
882 &nsd->eth.rx_broadcast);
883 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
884 I40E_GLPRT_UPTCL(hw->port),
885 pf->stat_offsets_loaded,
886 &osd->eth.tx_unicast,
887 &nsd->eth.tx_unicast);
888 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
889 I40E_GLPRT_MPTCL(hw->port),
890 pf->stat_offsets_loaded,
891 &osd->eth.tx_multicast,
892 &nsd->eth.tx_multicast);
893 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
894 I40E_GLPRT_BPTCL(hw->port),
895 pf->stat_offsets_loaded,
896 &osd->eth.tx_broadcast,
897 &nsd->eth.tx_broadcast);
899 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
900 pf->stat_offsets_loaded,
901 &osd->tx_dropped_link_down,
902 &nsd->tx_dropped_link_down);
904 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
905 pf->stat_offsets_loaded,
906 &osd->crc_errors, &nsd->crc_errors);
908 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
909 pf->stat_offsets_loaded,
910 &osd->illegal_bytes, &nsd->illegal_bytes);
912 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
913 pf->stat_offsets_loaded,
914 &osd->mac_local_faults,
915 &nsd->mac_local_faults);
916 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
917 pf->stat_offsets_loaded,
918 &osd->mac_remote_faults,
919 &nsd->mac_remote_faults);
921 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
922 pf->stat_offsets_loaded,
923 &osd->rx_length_errors,
924 &nsd->rx_length_errors);
926 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
927 pf->stat_offsets_loaded,
928 &osd->link_xon_rx, &nsd->link_xon_rx);
929 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
930 pf->stat_offsets_loaded,
931 &osd->link_xon_tx, &nsd->link_xon_tx);
932 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
933 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
934 pf->stat_offsets_loaded,
935 &osd->link_xoff_tx, &nsd->link_xoff_tx);
937 for (i = 0; i < 8; i++) {
938 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
939 pf->stat_offsets_loaded,
940 &osd->priority_xon_rx[i],
941 &nsd->priority_xon_rx[i]);
942 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
943 pf->stat_offsets_loaded,
944 &osd->priority_xon_tx[i],
945 &nsd->priority_xon_tx[i]);
946 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
947 pf->stat_offsets_loaded,
948 &osd->priority_xoff_tx[i],
949 &nsd->priority_xoff_tx[i]);
950 i40e_stat_update32(hw,
951 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
952 pf->stat_offsets_loaded,
953 &osd->priority_xon_2_xoff[i],
954 &nsd->priority_xon_2_xoff[i]);
957 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
958 I40E_GLPRT_PRC64L(hw->port),
959 pf->stat_offsets_loaded,
960 &osd->rx_size_64, &nsd->rx_size_64);
961 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
962 I40E_GLPRT_PRC127L(hw->port),
963 pf->stat_offsets_loaded,
964 &osd->rx_size_127, &nsd->rx_size_127);
965 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
966 I40E_GLPRT_PRC255L(hw->port),
967 pf->stat_offsets_loaded,
968 &osd->rx_size_255, &nsd->rx_size_255);
969 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
970 I40E_GLPRT_PRC511L(hw->port),
971 pf->stat_offsets_loaded,
972 &osd->rx_size_511, &nsd->rx_size_511);
973 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
974 I40E_GLPRT_PRC1023L(hw->port),
975 pf->stat_offsets_loaded,
976 &osd->rx_size_1023, &nsd->rx_size_1023);
977 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
978 I40E_GLPRT_PRC1522L(hw->port),
979 pf->stat_offsets_loaded,
980 &osd->rx_size_1522, &nsd->rx_size_1522);
981 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
982 I40E_GLPRT_PRC9522L(hw->port),
983 pf->stat_offsets_loaded,
984 &osd->rx_size_big, &nsd->rx_size_big);
986 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
987 I40E_GLPRT_PTC64L(hw->port),
988 pf->stat_offsets_loaded,
989 &osd->tx_size_64, &nsd->tx_size_64);
990 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
991 I40E_GLPRT_PTC127L(hw->port),
992 pf->stat_offsets_loaded,
993 &osd->tx_size_127, &nsd->tx_size_127);
994 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
995 I40E_GLPRT_PTC255L(hw->port),
996 pf->stat_offsets_loaded,
997 &osd->tx_size_255, &nsd->tx_size_255);
998 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
999 I40E_GLPRT_PTC511L(hw->port),
1000 pf->stat_offsets_loaded,
1001 &osd->tx_size_511, &nsd->tx_size_511);
1002 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1003 I40E_GLPRT_PTC1023L(hw->port),
1004 pf->stat_offsets_loaded,
1005 &osd->tx_size_1023, &nsd->tx_size_1023);
1006 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1007 I40E_GLPRT_PTC1522L(hw->port),
1008 pf->stat_offsets_loaded,
1009 &osd->tx_size_1522, &nsd->tx_size_1522);
1010 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1011 I40E_GLPRT_PTC9522L(hw->port),
1012 pf->stat_offsets_loaded,
1013 &osd->tx_size_big, &nsd->tx_size_big);
1015 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1016 pf->stat_offsets_loaded,
1017 &osd->rx_undersize, &nsd->rx_undersize);
1018 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1019 pf->stat_offsets_loaded,
1020 &osd->rx_fragments, &nsd->rx_fragments);
1021 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1022 pf->stat_offsets_loaded,
1023 &osd->rx_oversize, &nsd->rx_oversize);
1024 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->rx_jabber, &nsd->rx_jabber);
1029 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_atr_cnt_idx),
1030 pf->stat_offsets_loaded,
1031 &osd->fd_atr_match, &nsd->fd_atr_match);
1032 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_sb_cnt_idx),
1033 pf->stat_offsets_loaded,
1034 &osd->fd_sb_match, &nsd->fd_sb_match);
1036 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1037 nsd->tx_lpi_status =
1038 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1039 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1040 nsd->rx_lpi_status =
1041 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1042 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1043 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1044 pf->stat_offsets_loaded,
1045 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1046 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1047 pf->stat_offsets_loaded,
1048 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1050 pf->stat_offsets_loaded = true;
1054 * i40e_update_stats - Update the various statistics counters.
1055 * @vsi: the VSI to be updated
1057 * Update the various stats for this VSI and its related entities.
1059 void i40e_update_stats(struct i40e_vsi *vsi)
1061 struct i40e_pf *pf = vsi->back;
1063 if (vsi == pf->vsi[pf->lan_vsi])
1064 i40e_update_pf_stats(pf);
1066 i40e_update_vsi_stats(vsi);
1070 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1071 * @vsi: the VSI to be searched
1072 * @macaddr: the MAC address
1074 * @is_vf: make sure its a vf filter, else doesn't matter
1075 * @is_netdev: make sure its a netdev filter, else doesn't matter
1077 * Returns ptr to the filter object or NULL
1079 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1080 u8 *macaddr, s16 vlan,
1081 bool is_vf, bool is_netdev)
1083 struct i40e_mac_filter *f;
1085 if (!vsi || !macaddr)
1088 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1089 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1090 (vlan == f->vlan) &&
1091 (!is_vf || f->is_vf) &&
1092 (!is_netdev || f->is_netdev))
1099 * i40e_find_mac - Find a mac addr in the macvlan filters list
1100 * @vsi: the VSI to be searched
1101 * @macaddr: the MAC address we are searching for
1102 * @is_vf: make sure its a vf filter, else doesn't matter
1103 * @is_netdev: make sure its a netdev filter, else doesn't matter
1105 * Returns the first filter with the provided MAC address or NULL if
1106 * MAC address was not found
1108 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1109 bool is_vf, bool is_netdev)
1111 struct i40e_mac_filter *f;
1113 if (!vsi || !macaddr)
1116 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1117 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1118 (!is_vf || f->is_vf) &&
1119 (!is_netdev || f->is_netdev))
1126 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1127 * @vsi: the VSI to be searched
1129 * Returns true if VSI is in vlan mode or false otherwise
1131 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1133 struct i40e_mac_filter *f;
1135 /* Only -1 for all the filters denotes not in vlan mode
1136 * so we have to go through all the list in order to make sure
1138 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1147 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1148 * @vsi: the VSI to be searched
1149 * @macaddr: the mac address to be filtered
1150 * @is_vf: true if it is a vf
1151 * @is_netdev: true if it is a netdev
1153 * Goes through all the macvlan filters and adds a
1154 * macvlan filter for each unique vlan that already exists
1156 * Returns first filter found on success, else NULL
1158 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1159 bool is_vf, bool is_netdev)
1161 struct i40e_mac_filter *f;
1163 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1164 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1165 is_vf, is_netdev)) {
1166 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1172 return list_first_entry_or_null(&vsi->mac_filter_list,
1173 struct i40e_mac_filter, list);
1177 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1178 * @vsi: the PF Main VSI - inappropriate for any other VSI
1179 * @macaddr: the MAC address
1181 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1183 struct i40e_aqc_remove_macvlan_element_data element;
1184 struct i40e_pf *pf = vsi->back;
1187 /* Only appropriate for the PF main VSI */
1188 if (vsi->type != I40E_VSI_MAIN)
1191 ether_addr_copy(element.mac_addr, macaddr);
1192 element.vlan_tag = 0;
1193 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1194 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1195 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1197 dev_err(&pf->pdev->dev, "Could not remove default MAC-VLAN\n");
1201 * i40e_add_filter - Add a mac/vlan filter to the VSI
1202 * @vsi: the VSI to be searched
1203 * @macaddr: the MAC address
1205 * @is_vf: make sure its a vf filter, else doesn't matter
1206 * @is_netdev: make sure its a netdev filter, else doesn't matter
1208 * Returns ptr to the filter object or NULL when no memory available.
1210 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1211 u8 *macaddr, s16 vlan,
1212 bool is_vf, bool is_netdev)
1214 struct i40e_mac_filter *f;
1216 if (!vsi || !macaddr)
1219 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1221 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1223 goto add_filter_out;
1225 ether_addr_copy(f->macaddr, macaddr);
1229 INIT_LIST_HEAD(&f->list);
1230 list_add(&f->list, &vsi->mac_filter_list);
1233 /* increment counter and add a new flag if needed */
1239 } else if (is_netdev) {
1240 if (!f->is_netdev) {
1241 f->is_netdev = true;
1248 /* changed tells sync_filters_subtask to
1249 * push the filter down to the firmware
1252 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1253 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1261 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1262 * @vsi: the VSI to be searched
1263 * @macaddr: the MAC address
1265 * @is_vf: make sure it's a vf filter, else doesn't matter
1266 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1268 void i40e_del_filter(struct i40e_vsi *vsi,
1269 u8 *macaddr, s16 vlan,
1270 bool is_vf, bool is_netdev)
1272 struct i40e_mac_filter *f;
1274 if (!vsi || !macaddr)
1277 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1278 if (!f || f->counter == 0)
1286 } else if (is_netdev) {
1288 f->is_netdev = false;
1292 /* make sure we don't remove a filter in use by vf or netdev */
1294 min_f += (f->is_vf ? 1 : 0);
1295 min_f += (f->is_netdev ? 1 : 0);
1297 if (f->counter > min_f)
1301 /* counter == 0 tells sync_filters_subtask to
1302 * remove the filter from the firmware's list
1304 if (f->counter == 0) {
1306 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1307 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1312 * i40e_set_mac - NDO callback to set mac address
1313 * @netdev: network interface device structure
1314 * @p: pointer to an address structure
1316 * Returns 0 on success, negative on failure
1318 static int i40e_set_mac(struct net_device *netdev, void *p)
1320 struct i40e_netdev_priv *np = netdev_priv(netdev);
1321 struct i40e_vsi *vsi = np->vsi;
1322 struct sockaddr *addr = p;
1323 struct i40e_mac_filter *f;
1325 if (!is_valid_ether_addr(addr->sa_data))
1326 return -EADDRNOTAVAIL;
1328 netdev_info(netdev, "set mac address=%pM\n", addr->sa_data);
1330 if (ether_addr_equal(netdev->dev_addr, addr->sa_data))
1333 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1334 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1335 return -EADDRNOTAVAIL;
1337 if (vsi->type == I40E_VSI_MAIN) {
1339 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1340 I40E_AQC_WRITE_TYPE_LAA_ONLY,
1341 addr->sa_data, NULL);
1344 "Addr change for Main VSI failed: %d\n",
1346 return -EADDRNOTAVAIL;
1349 ether_addr_copy(vsi->back->hw.mac.addr, addr->sa_data);
1352 /* In order to be sure to not drop any packets, add the new address
1353 * then delete the old one.
1355 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY, false, false);
1359 i40e_sync_vsi_filters(vsi);
1360 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, false, false);
1361 i40e_sync_vsi_filters(vsi);
1363 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1369 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1370 * @vsi: the VSI being setup
1371 * @ctxt: VSI context structure
1372 * @enabled_tc: Enabled TCs bitmap
1373 * @is_add: True if called before Add VSI
1375 * Setup VSI queue mapping for enabled traffic classes.
1377 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1378 struct i40e_vsi_context *ctxt,
1382 struct i40e_pf *pf = vsi->back;
1392 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1395 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1396 /* Find numtc from enabled TC bitmap */
1397 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1398 if (enabled_tc & (1 << i)) /* TC is enabled */
1402 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1406 /* At least TC0 is enabled in case of non-DCB case */
1410 vsi->tc_config.numtc = numtc;
1411 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1412 /* Number of queues per enabled TC */
1413 num_tc_qps = vsi->alloc_queue_pairs/numtc;
1414 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC);
1416 /* Setup queue offset/count for all TCs for given VSI */
1417 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1418 /* See if the given TC is enabled for the given VSI */
1419 if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */
1422 switch (vsi->type) {
1424 qcount = min_t(int, pf->rss_size, num_tc_qps);
1427 case I40E_VSI_SRIOV:
1428 case I40E_VSI_VMDQ2:
1430 qcount = num_tc_qps;
1434 vsi->tc_config.tc_info[i].qoffset = offset;
1435 vsi->tc_config.tc_info[i].qcount = qcount;
1437 /* find the power-of-2 of the number of queue pairs */
1440 while (num_qps && ((1 << pow) < qcount)) {
1445 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1447 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1448 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1452 /* TC is not enabled so set the offset to
1453 * default queue and allocate one queue
1456 vsi->tc_config.tc_info[i].qoffset = 0;
1457 vsi->tc_config.tc_info[i].qcount = 1;
1458 vsi->tc_config.tc_info[i].netdev_tc = 0;
1462 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1465 /* Set actual Tx/Rx queue pairs */
1466 vsi->num_queue_pairs = offset;
1468 /* Scheduler section valid can only be set for ADD VSI */
1470 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1472 ctxt->info.up_enable_bits = enabled_tc;
1474 if (vsi->type == I40E_VSI_SRIOV) {
1475 ctxt->info.mapping_flags |=
1476 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1477 for (i = 0; i < vsi->num_queue_pairs; i++)
1478 ctxt->info.queue_mapping[i] =
1479 cpu_to_le16(vsi->base_queue + i);
1481 ctxt->info.mapping_flags |=
1482 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1483 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1485 ctxt->info.valid_sections |= cpu_to_le16(sections);
1489 * i40e_set_rx_mode - NDO callback to set the netdev filters
1490 * @netdev: network interface device structure
1492 static void i40e_set_rx_mode(struct net_device *netdev)
1494 struct i40e_netdev_priv *np = netdev_priv(netdev);
1495 struct i40e_mac_filter *f, *ftmp;
1496 struct i40e_vsi *vsi = np->vsi;
1497 struct netdev_hw_addr *uca;
1498 struct netdev_hw_addr *mca;
1499 struct netdev_hw_addr *ha;
1501 /* add addr if not already in the filter list */
1502 netdev_for_each_uc_addr(uca, netdev) {
1503 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1504 if (i40e_is_vsi_in_vlan(vsi))
1505 i40e_put_mac_in_vlan(vsi, uca->addr,
1508 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1513 netdev_for_each_mc_addr(mca, netdev) {
1514 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1515 if (i40e_is_vsi_in_vlan(vsi))
1516 i40e_put_mac_in_vlan(vsi, mca->addr,
1519 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1524 /* remove filter if not in netdev list */
1525 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1531 if (is_multicast_ether_addr(f->macaddr)) {
1532 netdev_for_each_mc_addr(mca, netdev) {
1533 if (ether_addr_equal(mca->addr, f->macaddr)) {
1539 netdev_for_each_uc_addr(uca, netdev) {
1540 if (ether_addr_equal(uca->addr, f->macaddr)) {
1546 for_each_dev_addr(netdev, ha) {
1547 if (ether_addr_equal(ha->addr, f->macaddr)) {
1555 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1558 /* check for other flag changes */
1559 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1560 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1561 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1566 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1567 * @vsi: ptr to the VSI
1569 * Push any outstanding VSI filter changes through the AdminQ.
1571 * Returns 0 or error value
1573 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1575 struct i40e_mac_filter *f, *ftmp;
1576 bool promisc_forced_on = false;
1577 bool add_happened = false;
1578 int filter_list_len = 0;
1579 u32 changed_flags = 0;
1580 i40e_status aq_ret = 0;
1586 /* empty array typed pointers, kcalloc later */
1587 struct i40e_aqc_add_macvlan_element_data *add_list;
1588 struct i40e_aqc_remove_macvlan_element_data *del_list;
1590 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1591 usleep_range(1000, 2000);
1595 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1596 vsi->current_netdev_flags = vsi->netdev->flags;
1599 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1600 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1602 filter_list_len = pf->hw.aq.asq_buf_size /
1603 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1604 del_list = kcalloc(filter_list_len,
1605 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1610 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1614 if (f->counter != 0)
1619 /* add to delete list */
1620 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1621 del_list[num_del].vlan_tag =
1622 cpu_to_le16((u16)(f->vlan ==
1623 I40E_VLAN_ANY ? 0 : f->vlan));
1625 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1626 del_list[num_del].flags = cmd_flags;
1629 /* unlink from filter list */
1633 /* flush a full buffer */
1634 if (num_del == filter_list_len) {
1635 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1636 vsi->seid, del_list, num_del,
1639 memset(del_list, 0, sizeof(*del_list));
1642 pf->hw.aq.asq_last_status !=
1644 dev_info(&pf->pdev->dev,
1645 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n",
1647 pf->hw.aq.asq_last_status);
1651 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1652 del_list, num_del, NULL);
1656 pf->hw.aq.asq_last_status != I40E_AQ_RC_ENOENT)
1657 dev_info(&pf->pdev->dev,
1658 "ignoring delete macvlan error, err %d, aq_err %d\n",
1659 aq_ret, pf->hw.aq.asq_last_status);
1665 /* do all the adds now */
1666 filter_list_len = pf->hw.aq.asq_buf_size /
1667 sizeof(struct i40e_aqc_add_macvlan_element_data),
1668 add_list = kcalloc(filter_list_len,
1669 sizeof(struct i40e_aqc_add_macvlan_element_data),
1674 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1678 if (f->counter == 0)
1681 add_happened = true;
1684 /* add to add array */
1685 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1686 add_list[num_add].vlan_tag =
1688 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1689 add_list[num_add].queue_number = 0;
1691 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1692 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1695 /* flush a full buffer */
1696 if (num_add == filter_list_len) {
1697 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1704 memset(add_list, 0, sizeof(*add_list));
1708 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1709 add_list, num_add, NULL);
1715 if (add_happened && (!aq_ret)) {
1717 } else if (add_happened && (aq_ret)) {
1718 dev_info(&pf->pdev->dev,
1719 "add filter failed, err %d, aq_err %d\n",
1720 aq_ret, pf->hw.aq.asq_last_status);
1721 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1722 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1724 promisc_forced_on = true;
1725 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1727 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1732 /* check for changes in promiscuous modes */
1733 if (changed_flags & IFF_ALLMULTI) {
1734 bool cur_multipromisc;
1735 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1736 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1741 dev_info(&pf->pdev->dev,
1742 "set multi promisc failed, err %d, aq_err %d\n",
1743 aq_ret, pf->hw.aq.asq_last_status);
1745 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1747 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1748 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1750 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw,
1754 dev_info(&pf->pdev->dev,
1755 "set uni promisc failed, err %d, aq_err %d\n",
1756 aq_ret, pf->hw.aq.asq_last_status);
1757 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1761 dev_info(&pf->pdev->dev,
1762 "set brdcast promisc failed, err %d, aq_err %d\n",
1763 aq_ret, pf->hw.aq.asq_last_status);
1766 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1771 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1772 * @pf: board private structure
1774 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1778 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
1780 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
1782 for (v = 0; v < pf->num_alloc_vsi; v++) {
1784 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
1785 i40e_sync_vsi_filters(pf->vsi[v]);
1790 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
1791 * @netdev: network interface device structure
1792 * @new_mtu: new value for maximum frame size
1794 * Returns 0 on success, negative on failure
1796 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
1798 struct i40e_netdev_priv *np = netdev_priv(netdev);
1799 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
1800 struct i40e_vsi *vsi = np->vsi;
1802 /* MTU < 68 is an error and causes problems on some kernels */
1803 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
1806 netdev_info(netdev, "changing MTU from %d to %d\n",
1807 netdev->mtu, new_mtu);
1808 netdev->mtu = new_mtu;
1809 if (netif_running(netdev))
1810 i40e_vsi_reinit_locked(vsi);
1816 * i40e_ioctl - Access the hwtstamp interface
1817 * @netdev: network interface device structure
1818 * @ifr: interface request data
1819 * @cmd: ioctl command
1821 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1823 struct i40e_netdev_priv *np = netdev_priv(netdev);
1824 struct i40e_pf *pf = np->vsi->back;
1828 return i40e_ptp_get_ts_config(pf, ifr);
1830 return i40e_ptp_set_ts_config(pf, ifr);
1837 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
1838 * @vsi: the vsi being adjusted
1840 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
1842 struct i40e_vsi_context ctxt;
1845 if ((vsi->info.valid_sections &
1846 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1847 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
1848 return; /* already enabled */
1850 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1851 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1852 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
1854 ctxt.seid = vsi->seid;
1855 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1856 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1858 dev_info(&vsi->back->pdev->dev,
1859 "%s: update vsi failed, aq_err=%d\n",
1860 __func__, vsi->back->hw.aq.asq_last_status);
1865 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
1866 * @vsi: the vsi being adjusted
1868 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
1870 struct i40e_vsi_context ctxt;
1873 if ((vsi->info.valid_sections &
1874 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1875 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
1876 I40E_AQ_VSI_PVLAN_EMOD_MASK))
1877 return; /* already disabled */
1879 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1880 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1881 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
1883 ctxt.seid = vsi->seid;
1884 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1885 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1887 dev_info(&vsi->back->pdev->dev,
1888 "%s: update vsi failed, aq_err=%d\n",
1889 __func__, vsi->back->hw.aq.asq_last_status);
1894 * i40e_vlan_rx_register - Setup or shutdown vlan offload
1895 * @netdev: network interface to be adjusted
1896 * @features: netdev features to test if VLAN offload is enabled or not
1898 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
1900 struct i40e_netdev_priv *np = netdev_priv(netdev);
1901 struct i40e_vsi *vsi = np->vsi;
1903 if (features & NETIF_F_HW_VLAN_CTAG_RX)
1904 i40e_vlan_stripping_enable(vsi);
1906 i40e_vlan_stripping_disable(vsi);
1910 * i40e_vsi_add_vlan - Add vsi membership for given vlan
1911 * @vsi: the vsi being configured
1912 * @vid: vlan id to be added (0 = untagged only , -1 = any)
1914 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
1916 struct i40e_mac_filter *f, *add_f;
1917 bool is_netdev, is_vf;
1919 is_vf = (vsi->type == I40E_VSI_SRIOV);
1920 is_netdev = !!(vsi->netdev);
1923 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
1926 dev_info(&vsi->back->pdev->dev,
1927 "Could not add vlan filter %d for %pM\n",
1928 vid, vsi->netdev->dev_addr);
1933 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1934 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
1936 dev_info(&vsi->back->pdev->dev,
1937 "Could not add vlan filter %d for %pM\n",
1943 /* Now if we add a vlan tag, make sure to check if it is the first
1944 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
1945 * with 0, so we now accept untagged and specified tagged traffic
1946 * (and not any taged and untagged)
1949 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
1951 is_vf, is_netdev)) {
1952 i40e_del_filter(vsi, vsi->netdev->dev_addr,
1953 I40E_VLAN_ANY, is_vf, is_netdev);
1954 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
1957 dev_info(&vsi->back->pdev->dev,
1958 "Could not add filter 0 for %pM\n",
1959 vsi->netdev->dev_addr);
1965 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
1966 if (vid > 0 && !vsi->info.pvid) {
1967 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1968 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1969 is_vf, is_netdev)) {
1970 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1972 add_f = i40e_add_filter(vsi, f->macaddr,
1973 0, is_vf, is_netdev);
1975 dev_info(&vsi->back->pdev->dev,
1976 "Could not add filter 0 for %pM\n",
1984 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1985 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1988 return i40e_sync_vsi_filters(vsi);
1992 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
1993 * @vsi: the vsi being configured
1994 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
1996 * Return: 0 on success or negative otherwise
1998 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2000 struct net_device *netdev = vsi->netdev;
2001 struct i40e_mac_filter *f, *add_f;
2002 bool is_vf, is_netdev;
2003 int filter_count = 0;
2005 is_vf = (vsi->type == I40E_VSI_SRIOV);
2006 is_netdev = !!(netdev);
2009 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2011 list_for_each_entry(f, &vsi->mac_filter_list, list)
2012 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2014 /* go through all the filters for this VSI and if there is only
2015 * vid == 0 it means there are no other filters, so vid 0 must
2016 * be replaced with -1. This signifies that we should from now
2017 * on accept any traffic (with any tag present, or untagged)
2019 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2022 ether_addr_equal(netdev->dev_addr, f->macaddr))
2030 if (!filter_count && is_netdev) {
2031 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2032 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2035 dev_info(&vsi->back->pdev->dev,
2036 "Could not add filter %d for %pM\n",
2037 I40E_VLAN_ANY, netdev->dev_addr);
2042 if (!filter_count) {
2043 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2044 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2045 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2048 dev_info(&vsi->back->pdev->dev,
2049 "Could not add filter %d for %pM\n",
2050 I40E_VLAN_ANY, f->macaddr);
2056 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2057 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2060 return i40e_sync_vsi_filters(vsi);
2064 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2065 * @netdev: network interface to be adjusted
2066 * @vid: vlan id to be added
2068 * net_device_ops implementation for adding vlan ids
2070 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2071 __always_unused __be16 proto, u16 vid)
2073 struct i40e_netdev_priv *np = netdev_priv(netdev);
2074 struct i40e_vsi *vsi = np->vsi;
2080 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2082 /* If the network stack called us with vid = 0 then
2083 * it is asking to receive priority tagged packets with
2084 * vlan id 0. Our HW receives them by default when configured
2085 * to receive untagged packets so there is no need to add an
2086 * extra filter for vlan 0 tagged packets.
2089 ret = i40e_vsi_add_vlan(vsi, vid);
2091 if (!ret && (vid < VLAN_N_VID))
2092 set_bit(vid, vsi->active_vlans);
2098 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2099 * @netdev: network interface to be adjusted
2100 * @vid: vlan id to be removed
2102 * net_device_ops implementation for removing vlan ids
2104 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2105 __always_unused __be16 proto, u16 vid)
2107 struct i40e_netdev_priv *np = netdev_priv(netdev);
2108 struct i40e_vsi *vsi = np->vsi;
2110 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2112 /* return code is ignored as there is nothing a user
2113 * can do about failure to remove and a log message was
2114 * already printed from the other function
2116 i40e_vsi_kill_vlan(vsi, vid);
2118 clear_bit(vid, vsi->active_vlans);
2124 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2125 * @vsi: the vsi being brought back up
2127 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2134 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2136 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2137 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2142 * i40e_vsi_add_pvid - Add pvid for the VSI
2143 * @vsi: the vsi being adjusted
2144 * @vid: the vlan id to set as a PVID
2146 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2148 struct i40e_vsi_context ctxt;
2151 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2152 vsi->info.pvid = cpu_to_le16(vid);
2153 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2154 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2155 I40E_AQ_VSI_PVLAN_EMOD_STR;
2157 ctxt.seid = vsi->seid;
2158 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2159 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2161 dev_info(&vsi->back->pdev->dev,
2162 "%s: update vsi failed, aq_err=%d\n",
2163 __func__, vsi->back->hw.aq.asq_last_status);
2171 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2172 * @vsi: the vsi being adjusted
2174 * Just use the vlan_rx_register() service to put it back to normal
2176 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2178 i40e_vlan_stripping_disable(vsi);
2184 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2185 * @vsi: ptr to the VSI
2187 * If this function returns with an error, then it's possible one or
2188 * more of the rings is populated (while the rest are not). It is the
2189 * callers duty to clean those orphaned rings.
2191 * Return 0 on success, negative on failure
2193 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2197 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2198 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2204 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2205 * @vsi: ptr to the VSI
2207 * Free VSI's transmit software resources
2209 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2216 for (i = 0; i < vsi->num_queue_pairs; i++)
2217 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2218 i40e_free_tx_resources(vsi->tx_rings[i]);
2222 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2223 * @vsi: ptr to the VSI
2225 * If this function returns with an error, then it's possible one or
2226 * more of the rings is populated (while the rest are not). It is the
2227 * callers duty to clean those orphaned rings.
2229 * Return 0 on success, negative on failure
2231 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2235 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2236 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2241 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2242 * @vsi: ptr to the VSI
2244 * Free all receive software resources
2246 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2253 for (i = 0; i < vsi->num_queue_pairs; i++)
2254 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2255 i40e_free_rx_resources(vsi->rx_rings[i]);
2259 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2260 * @ring: The Tx ring to configure
2262 * Configure the Tx descriptor ring in the HMC context.
2264 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2266 struct i40e_vsi *vsi = ring->vsi;
2267 u16 pf_q = vsi->base_queue + ring->queue_index;
2268 struct i40e_hw *hw = &vsi->back->hw;
2269 struct i40e_hmc_obj_txq tx_ctx;
2270 i40e_status err = 0;
2273 /* some ATR related tx ring init */
2274 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2275 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2276 ring->atr_count = 0;
2278 ring->atr_sample_rate = 0;
2281 /* initialize XPS */
2282 if (ring->q_vector && ring->netdev &&
2283 vsi->tc_config.numtc <= 1 &&
2284 !test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2285 netif_set_xps_queue(ring->netdev,
2286 &ring->q_vector->affinity_mask,
2289 /* clear the context structure first */
2290 memset(&tx_ctx, 0, sizeof(tx_ctx));
2292 tx_ctx.new_context = 1;
2293 tx_ctx.base = (ring->dma / 128);
2294 tx_ctx.qlen = ring->count;
2295 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2296 I40E_FLAG_FD_ATR_ENABLED));
2297 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2298 /* FDIR VSI tx ring can still use RS bit and writebacks */
2299 if (vsi->type != I40E_VSI_FDIR)
2300 tx_ctx.head_wb_ena = 1;
2301 tx_ctx.head_wb_addr = ring->dma +
2302 (ring->count * sizeof(struct i40e_tx_desc));
2304 /* As part of VSI creation/update, FW allocates certain
2305 * Tx arbitration queue sets for each TC enabled for
2306 * the VSI. The FW returns the handles to these queue
2307 * sets as part of the response buffer to Add VSI,
2308 * Update VSI, etc. AQ commands. It is expected that
2309 * these queue set handles be associated with the Tx
2310 * queues by the driver as part of the TX queue context
2311 * initialization. This has to be done regardless of
2312 * DCB as by default everything is mapped to TC0.
2314 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2315 tx_ctx.rdylist_act = 0;
2317 /* clear the context in the HMC */
2318 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2320 dev_info(&vsi->back->pdev->dev,
2321 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2322 ring->queue_index, pf_q, err);
2326 /* set the context in the HMC */
2327 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2329 dev_info(&vsi->back->pdev->dev,
2330 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2331 ring->queue_index, pf_q, err);
2335 /* Now associate this queue with this PCI function */
2336 if (vsi->type == I40E_VSI_VMDQ2)
2337 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2339 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2340 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2341 I40E_QTX_CTL_PF_INDX_MASK);
2342 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2345 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
2347 /* cache tail off for easier writes later */
2348 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2354 * i40e_configure_rx_ring - Configure a receive ring context
2355 * @ring: The Rx ring to configure
2357 * Configure the Rx descriptor ring in the HMC context.
2359 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2361 struct i40e_vsi *vsi = ring->vsi;
2362 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2363 u16 pf_q = vsi->base_queue + ring->queue_index;
2364 struct i40e_hw *hw = &vsi->back->hw;
2365 struct i40e_hmc_obj_rxq rx_ctx;
2366 i40e_status err = 0;
2370 /* clear the context structure first */
2371 memset(&rx_ctx, 0, sizeof(rx_ctx));
2373 ring->rx_buf_len = vsi->rx_buf_len;
2374 ring->rx_hdr_len = vsi->rx_hdr_len;
2376 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2377 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2379 rx_ctx.base = (ring->dma / 128);
2380 rx_ctx.qlen = ring->count;
2382 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2383 set_ring_16byte_desc_enabled(ring);
2389 rx_ctx.dtype = vsi->dtype;
2391 set_ring_ps_enabled(ring);
2392 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2394 I40E_RX_SPLIT_TCP_UDP |
2397 rx_ctx.hsplit_0 = 0;
2400 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2401 (chain_len * ring->rx_buf_len));
2402 rx_ctx.tphrdesc_ena = 1;
2403 rx_ctx.tphwdesc_ena = 1;
2404 rx_ctx.tphdata_ena = 1;
2405 rx_ctx.tphhead_ena = 1;
2406 if (hw->revision_id == 0)
2407 rx_ctx.lrxqthresh = 0;
2409 rx_ctx.lrxqthresh = 2;
2410 rx_ctx.crcstrip = 1;
2413 /* set the prefena field to 1 because the manual says to */
2416 /* clear the context in the HMC */
2417 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2419 dev_info(&vsi->back->pdev->dev,
2420 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2421 ring->queue_index, pf_q, err);
2425 /* set the context in the HMC */
2426 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2428 dev_info(&vsi->back->pdev->dev,
2429 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2430 ring->queue_index, pf_q, err);
2434 /* cache tail for quicker writes, and clear the reg before use */
2435 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2436 writel(0, ring->tail);
2438 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
2444 * i40e_vsi_configure_tx - Configure the VSI for Tx
2445 * @vsi: VSI structure describing this set of rings and resources
2447 * Configure the Tx VSI for operation.
2449 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2454 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2455 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2461 * i40e_vsi_configure_rx - Configure the VSI for Rx
2462 * @vsi: the VSI being configured
2464 * Configure the Rx VSI for operation.
2466 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2471 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2472 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2473 + ETH_FCS_LEN + VLAN_HLEN;
2475 vsi->max_frame = I40E_RXBUFFER_2048;
2477 /* figure out correct receive buffer length */
2478 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2479 I40E_FLAG_RX_PS_ENABLED)) {
2480 case I40E_FLAG_RX_1BUF_ENABLED:
2481 vsi->rx_hdr_len = 0;
2482 vsi->rx_buf_len = vsi->max_frame;
2483 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2485 case I40E_FLAG_RX_PS_ENABLED:
2486 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2487 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2488 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2491 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2492 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2493 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2497 /* round up for the chip's needs */
2498 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2499 (1 << I40E_RXQ_CTX_HBUFF_SHIFT));
2500 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2501 (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
2503 /* set up individual rings */
2504 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2505 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2511 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2512 * @vsi: ptr to the VSI
2514 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2516 struct i40e_ring *tx_ring, *rx_ring;
2517 u16 qoffset, qcount;
2520 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED))
2523 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2524 if (!(vsi->tc_config.enabled_tc & (1 << n)))
2527 qoffset = vsi->tc_config.tc_info[n].qoffset;
2528 qcount = vsi->tc_config.tc_info[n].qcount;
2529 for (i = qoffset; i < (qoffset + qcount); i++) {
2530 rx_ring = vsi->rx_rings[i];
2531 tx_ring = vsi->tx_rings[i];
2532 rx_ring->dcb_tc = n;
2533 tx_ring->dcb_tc = n;
2539 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2540 * @vsi: ptr to the VSI
2542 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2545 i40e_set_rx_mode(vsi->netdev);
2549 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2550 * @vsi: Pointer to the targeted VSI
2552 * This function replays the hlist on the hw where all the SB Flow Director
2553 * filters were saved.
2555 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2557 struct i40e_fdir_filter *filter;
2558 struct i40e_pf *pf = vsi->back;
2559 struct hlist_node *node;
2561 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2564 hlist_for_each_entry_safe(filter, node,
2565 &pf->fdir_filter_list, fdir_node) {
2566 i40e_add_del_fdir(vsi, filter, true);
2571 * i40e_vsi_configure - Set up the VSI for action
2572 * @vsi: the VSI being configured
2574 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2578 i40e_set_vsi_rx_mode(vsi);
2579 i40e_restore_vlan(vsi);
2580 i40e_vsi_config_dcb_rings(vsi);
2581 err = i40e_vsi_configure_tx(vsi);
2583 err = i40e_vsi_configure_rx(vsi);
2589 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2590 * @vsi: the VSI being configured
2592 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2594 struct i40e_pf *pf = vsi->back;
2595 struct i40e_q_vector *q_vector;
2596 struct i40e_hw *hw = &pf->hw;
2602 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2603 * and PFINT_LNKLSTn registers, e.g.:
2604 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2606 qp = vsi->base_queue;
2607 vector = vsi->base_vector;
2608 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2609 q_vector = vsi->q_vectors[i];
2610 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2611 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2612 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2614 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2615 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2616 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2619 /* Linked list for the queuepairs assigned to this vector */
2620 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2621 for (q = 0; q < q_vector->num_ringpairs; q++) {
2622 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2623 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2624 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2625 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2627 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2629 wr32(hw, I40E_QINT_RQCTL(qp), val);
2631 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2632 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2633 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2634 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2636 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2638 /* Terminate the linked list */
2639 if (q == (q_vector->num_ringpairs - 1))
2640 val |= (I40E_QUEUE_END_OF_LIST
2641 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2643 wr32(hw, I40E_QINT_TQCTL(qp), val);
2652 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2653 * @hw: ptr to the hardware info
2655 static void i40e_enable_misc_int_causes(struct i40e_hw *hw)
2659 /* clear things first */
2660 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2661 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2663 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2664 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2665 I40E_PFINT_ICR0_ENA_GRST_MASK |
2666 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2667 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2668 I40E_PFINT_ICR0_ENA_TIMESYNC_MASK |
2669 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2670 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2671 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2673 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2675 /* SW_ITR_IDX = 0, but don't change INTENA */
2676 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2677 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2679 /* OTHER_ITR_IDX = 0 */
2680 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2684 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2685 * @vsi: the VSI being configured
2687 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2689 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2690 struct i40e_pf *pf = vsi->back;
2691 struct i40e_hw *hw = &pf->hw;
2694 /* set the ITR configuration */
2695 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2696 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2697 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
2698 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2699 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2700 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
2702 i40e_enable_misc_int_causes(hw);
2704 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
2705 wr32(hw, I40E_PFINT_LNKLST0, 0);
2707 /* Associate the queue pair to the vector and enable the queue int */
2708 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2709 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2710 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2712 wr32(hw, I40E_QINT_RQCTL(0), val);
2714 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2715 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2716 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2718 wr32(hw, I40E_QINT_TQCTL(0), val);
2723 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
2724 * @pf: board private structure
2726 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
2728 struct i40e_hw *hw = &pf->hw;
2730 wr32(hw, I40E_PFINT_DYN_CTL0,
2731 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2736 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
2737 * @pf: board private structure
2739 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
2741 struct i40e_hw *hw = &pf->hw;
2744 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
2745 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
2746 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
2748 wr32(hw, I40E_PFINT_DYN_CTL0, val);
2753 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
2754 * @vsi: pointer to a vsi
2755 * @vector: enable a particular Hw Interrupt vector
2757 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
2759 struct i40e_pf *pf = vsi->back;
2760 struct i40e_hw *hw = &pf->hw;
2763 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
2764 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
2765 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2766 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2767 /* skip the flush */
2771 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
2772 * @irq: interrupt number
2773 * @data: pointer to a q_vector
2775 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
2777 struct i40e_q_vector *q_vector = data;
2779 if (!q_vector->tx.ring && !q_vector->rx.ring)
2782 napi_schedule(&q_vector->napi);
2788 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
2789 * @vsi: the VSI being configured
2790 * @basename: name for the vector
2792 * Allocates MSI-X vectors and requests interrupts from the kernel.
2794 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
2796 int q_vectors = vsi->num_q_vectors;
2797 struct i40e_pf *pf = vsi->back;
2798 int base = vsi->base_vector;
2803 for (vector = 0; vector < q_vectors; vector++) {
2804 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
2806 if (q_vector->tx.ring && q_vector->rx.ring) {
2807 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2808 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
2810 } else if (q_vector->rx.ring) {
2811 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2812 "%s-%s-%d", basename, "rx", rx_int_idx++);
2813 } else if (q_vector->tx.ring) {
2814 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2815 "%s-%s-%d", basename, "tx", tx_int_idx++);
2817 /* skip this unused q_vector */
2820 err = request_irq(pf->msix_entries[base + vector].vector,
2826 dev_info(&pf->pdev->dev,
2827 "%s: request_irq failed, error: %d\n",
2829 goto free_queue_irqs;
2831 /* assign the mask for this irq */
2832 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2833 &q_vector->affinity_mask);
2836 vsi->irqs_ready = true;
2842 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2844 free_irq(pf->msix_entries[base + vector].vector,
2845 &(vsi->q_vectors[vector]));
2851 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
2852 * @vsi: the VSI being un-configured
2854 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
2856 struct i40e_pf *pf = vsi->back;
2857 struct i40e_hw *hw = &pf->hw;
2858 int base = vsi->base_vector;
2861 for (i = 0; i < vsi->num_queue_pairs; i++) {
2862 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
2863 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
2866 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
2867 for (i = vsi->base_vector;
2868 i < (vsi->num_q_vectors + vsi->base_vector); i++)
2869 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
2872 for (i = 0; i < vsi->num_q_vectors; i++)
2873 synchronize_irq(pf->msix_entries[i + base].vector);
2875 /* Legacy and MSI mode - this stops all interrupt handling */
2876 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
2877 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
2879 synchronize_irq(pf->pdev->irq);
2884 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
2885 * @vsi: the VSI being configured
2887 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
2889 struct i40e_pf *pf = vsi->back;
2892 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
2893 for (i = vsi->base_vector;
2894 i < (vsi->num_q_vectors + vsi->base_vector); i++)
2895 i40e_irq_dynamic_enable(vsi, i);
2897 i40e_irq_dynamic_enable_icr0(pf);
2900 i40e_flush(&pf->hw);
2905 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
2906 * @pf: board private structure
2908 static void i40e_stop_misc_vector(struct i40e_pf *pf)
2911 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
2912 i40e_flush(&pf->hw);
2916 * i40e_intr - MSI/Legacy and non-queue interrupt handler
2917 * @irq: interrupt number
2918 * @data: pointer to a q_vector
2920 * This is the handler used for all MSI/Legacy interrupts, and deals
2921 * with both queue and non-queue interrupts. This is also used in
2922 * MSIX mode to handle the non-queue interrupts.
2924 static irqreturn_t i40e_intr(int irq, void *data)
2926 struct i40e_pf *pf = (struct i40e_pf *)data;
2927 struct i40e_hw *hw = &pf->hw;
2928 irqreturn_t ret = IRQ_NONE;
2929 u32 icr0, icr0_remaining;
2932 icr0 = rd32(hw, I40E_PFINT_ICR0);
2933 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
2935 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
2936 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
2939 /* if interrupt but no bits showing, must be SWINT */
2940 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
2941 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
2944 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
2945 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
2947 /* temporarily disable queue cause for NAPI processing */
2948 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
2949 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
2950 wr32(hw, I40E_QINT_RQCTL(0), qval);
2952 qval = rd32(hw, I40E_QINT_TQCTL(0));
2953 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
2954 wr32(hw, I40E_QINT_TQCTL(0), qval);
2956 if (!test_bit(__I40E_DOWN, &pf->state))
2957 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
2960 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
2961 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2962 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
2965 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
2966 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
2967 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
2970 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
2971 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
2972 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
2975 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
2976 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
2977 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
2978 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
2979 val = rd32(hw, I40E_GLGEN_RSTAT);
2980 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
2981 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
2982 if (val == I40E_RESET_CORER) {
2984 } else if (val == I40E_RESET_GLOBR) {
2986 } else if (val == I40E_RESET_EMPR) {
2988 set_bit(__I40E_EMP_RESET_REQUESTED, &pf->state);
2992 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
2993 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
2994 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
2997 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
2998 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3000 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3001 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3002 i40e_ptp_tx_hwtstamp(pf);
3006 /* If a critical error is pending we have no choice but to reset the
3008 * Report and mask out any remaining unexpected interrupts.
3010 icr0_remaining = icr0 & ena_mask;
3011 if (icr0_remaining) {
3012 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3014 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3015 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3016 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3017 dev_info(&pf->pdev->dev, "device will be reset\n");
3018 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3019 i40e_service_event_schedule(pf);
3021 ena_mask &= ~icr0_remaining;
3026 /* re-enable interrupt causes */
3027 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3028 if (!test_bit(__I40E_DOWN, &pf->state)) {
3029 i40e_service_event_schedule(pf);
3030 i40e_irq_dynamic_enable_icr0(pf);
3037 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3038 * @tx_ring: tx ring to clean
3039 * @budget: how many cleans we're allowed
3041 * Returns true if there's any budget left (e.g. the clean is finished)
3043 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3045 struct i40e_vsi *vsi = tx_ring->vsi;
3046 u16 i = tx_ring->next_to_clean;
3047 struct i40e_tx_buffer *tx_buf;
3048 struct i40e_tx_desc *tx_desc;
3050 tx_buf = &tx_ring->tx_bi[i];
3051 tx_desc = I40E_TX_DESC(tx_ring, i);
3052 i -= tx_ring->count;
3055 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3057 /* if next_to_watch is not set then there is no work pending */
3061 /* prevent any other reads prior to eop_desc */
3062 read_barrier_depends();
3064 /* if the descriptor isn't done, no work yet to do */
3065 if (!(eop_desc->cmd_type_offset_bsz &
3066 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3069 /* clear next_to_watch to prevent false hangs */
3070 tx_buf->next_to_watch = NULL;
3072 /* unmap skb header data */
3073 dma_unmap_single(tx_ring->dev,
3074 dma_unmap_addr(tx_buf, dma),
3075 dma_unmap_len(tx_buf, len),
3078 dma_unmap_len_set(tx_buf, len, 0);
3081 /* move to the next desc and buffer to clean */
3086 i -= tx_ring->count;
3087 tx_buf = tx_ring->tx_bi;
3088 tx_desc = I40E_TX_DESC(tx_ring, 0);
3091 /* update budget accounting */
3093 } while (likely(budget));
3095 i += tx_ring->count;
3096 tx_ring->next_to_clean = i;
3098 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3099 i40e_irq_dynamic_enable(vsi,
3100 tx_ring->q_vector->v_idx + vsi->base_vector);
3106 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3107 * @irq: interrupt number
3108 * @data: pointer to a q_vector
3110 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3112 struct i40e_q_vector *q_vector = data;
3113 struct i40e_vsi *vsi;
3115 if (!q_vector->tx.ring)
3118 vsi = q_vector->tx.ring->vsi;
3119 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3125 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3126 * @vsi: the VSI being configured
3127 * @v_idx: vector index
3128 * @qp_idx: queue pair index
3130 static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3132 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3133 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3134 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3136 tx_ring->q_vector = q_vector;
3137 tx_ring->next = q_vector->tx.ring;
3138 q_vector->tx.ring = tx_ring;
3139 q_vector->tx.count++;
3141 rx_ring->q_vector = q_vector;
3142 rx_ring->next = q_vector->rx.ring;
3143 q_vector->rx.ring = rx_ring;
3144 q_vector->rx.count++;
3148 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3149 * @vsi: the VSI being configured
3151 * This function maps descriptor rings to the queue-specific vectors
3152 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3153 * one vector per queue pair, but on a constrained vector budget, we
3154 * group the queue pairs as "efficiently" as possible.
3156 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3158 int qp_remaining = vsi->num_queue_pairs;
3159 int q_vectors = vsi->num_q_vectors;
3164 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3165 * group them so there are multiple queues per vector.
3166 * It is also important to go through all the vectors available to be
3167 * sure that if we don't use all the vectors, that the remaining vectors
3168 * are cleared. This is especially important when decreasing the
3169 * number of queues in use.
3171 for (; v_start < q_vectors; v_start++) {
3172 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3174 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3176 q_vector->num_ringpairs = num_ringpairs;
3178 q_vector->rx.count = 0;
3179 q_vector->tx.count = 0;
3180 q_vector->rx.ring = NULL;
3181 q_vector->tx.ring = NULL;
3183 while (num_ringpairs--) {
3184 map_vector_to_qp(vsi, v_start, qp_idx);
3192 * i40e_vsi_request_irq - Request IRQ from the OS
3193 * @vsi: the VSI being configured
3194 * @basename: name for the vector
3196 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3198 struct i40e_pf *pf = vsi->back;
3201 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3202 err = i40e_vsi_request_irq_msix(vsi, basename);
3203 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3204 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3205 pf->misc_int_name, pf);
3207 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3208 pf->misc_int_name, pf);
3211 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3216 #ifdef CONFIG_NET_POLL_CONTROLLER
3218 * i40e_netpoll - A Polling 'interrupt'handler
3219 * @netdev: network interface device structure
3221 * This is used by netconsole to send skbs without having to re-enable
3222 * interrupts. It's not called while the normal interrupt routine is executing.
3224 static void i40e_netpoll(struct net_device *netdev)
3226 struct i40e_netdev_priv *np = netdev_priv(netdev);
3227 struct i40e_vsi *vsi = np->vsi;
3228 struct i40e_pf *pf = vsi->back;
3231 /* if interface is down do nothing */
3232 if (test_bit(__I40E_DOWN, &vsi->state))
3235 pf->flags |= I40E_FLAG_IN_NETPOLL;
3236 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3237 for (i = 0; i < vsi->num_q_vectors; i++)
3238 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3240 i40e_intr(pf->pdev->irq, netdev);
3242 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3247 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3248 * @pf: the PF being configured
3249 * @pf_q: the PF queue
3250 * @enable: enable or disable state of the queue
3252 * This routine will wait for the given Tx queue of the PF to reach the
3253 * enabled or disabled state.
3254 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3255 * multiple retries; else will return 0 in case of success.
3257 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3262 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3263 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3264 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3269 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3276 * i40e_vsi_control_tx - Start or stop a VSI's rings
3277 * @vsi: the VSI being configured
3278 * @enable: start or stop the rings
3280 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3282 struct i40e_pf *pf = vsi->back;
3283 struct i40e_hw *hw = &pf->hw;
3284 int i, j, pf_q, ret = 0;
3287 pf_q = vsi->base_queue;
3288 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3290 /* warn the TX unit of coming changes */
3291 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3295 for (j = 0; j < 50; j++) {
3296 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3297 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3298 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3300 usleep_range(1000, 2000);
3302 /* Skip if the queue is already in the requested state */
3303 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3306 /* turn on/off the queue */
3308 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3309 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3311 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3314 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3316 /* wait for the change to finish */
3317 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3319 dev_info(&pf->pdev->dev,
3320 "%s: VSI seid %d Tx ring %d %sable timeout\n",
3321 __func__, vsi->seid, pf_q,
3322 (enable ? "en" : "dis"));
3327 if (hw->revision_id == 0)
3333 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3334 * @pf: the PF being configured
3335 * @pf_q: the PF queue
3336 * @enable: enable or disable state of the queue
3338 * This routine will wait for the given Rx queue of the PF to reach the
3339 * enabled or disabled state.
3340 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3341 * multiple retries; else will return 0 in case of success.
3343 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3348 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3349 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3350 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3355 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3362 * i40e_vsi_control_rx - Start or stop a VSI's rings
3363 * @vsi: the VSI being configured
3364 * @enable: start or stop the rings
3366 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3368 struct i40e_pf *pf = vsi->back;
3369 struct i40e_hw *hw = &pf->hw;
3370 int i, j, pf_q, ret = 0;
3373 pf_q = vsi->base_queue;
3374 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3375 for (j = 0; j < 50; j++) {
3376 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3377 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3378 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3380 usleep_range(1000, 2000);
3383 /* Skip if the queue is already in the requested state */
3384 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3387 /* turn on/off the queue */
3389 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3391 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3392 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3394 /* wait for the change to finish */
3395 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3397 dev_info(&pf->pdev->dev,
3398 "%s: VSI seid %d Rx ring %d %sable timeout\n",
3399 __func__, vsi->seid, pf_q,
3400 (enable ? "en" : "dis"));
3409 * i40e_vsi_control_rings - Start or stop a VSI's rings
3410 * @vsi: the VSI being configured
3411 * @enable: start or stop the rings
3413 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3417 /* do rx first for enable and last for disable */
3419 ret = i40e_vsi_control_rx(vsi, request);
3422 ret = i40e_vsi_control_tx(vsi, request);
3424 /* Ignore return value, we need to shutdown whatever we can */
3425 i40e_vsi_control_tx(vsi, request);
3426 i40e_vsi_control_rx(vsi, request);
3433 * i40e_vsi_free_irq - Free the irq association with the OS
3434 * @vsi: the VSI being configured
3436 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3438 struct i40e_pf *pf = vsi->back;
3439 struct i40e_hw *hw = &pf->hw;
3440 int base = vsi->base_vector;
3444 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3445 if (!vsi->q_vectors)
3448 if (!vsi->irqs_ready)
3451 vsi->irqs_ready = false;
3452 for (i = 0; i < vsi->num_q_vectors; i++) {
3453 u16 vector = i + base;
3455 /* free only the irqs that were actually requested */
3456 if (!vsi->q_vectors[i] ||
3457 !vsi->q_vectors[i]->num_ringpairs)
3460 /* clear the affinity_mask in the IRQ descriptor */
3461 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3463 free_irq(pf->msix_entries[vector].vector,
3466 /* Tear down the interrupt queue link list
3468 * We know that they come in pairs and always
3469 * the Rx first, then the Tx. To clear the
3470 * link list, stick the EOL value into the
3471 * next_q field of the registers.
3473 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3474 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3475 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3476 val |= I40E_QUEUE_END_OF_LIST
3477 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3478 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3480 while (qp != I40E_QUEUE_END_OF_LIST) {
3483 val = rd32(hw, I40E_QINT_RQCTL(qp));
3485 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3486 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3487 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3488 I40E_QINT_RQCTL_INTEVENT_MASK);
3490 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3491 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3493 wr32(hw, I40E_QINT_RQCTL(qp), val);
3495 val = rd32(hw, I40E_QINT_TQCTL(qp));
3497 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3498 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3500 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3501 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3502 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3503 I40E_QINT_TQCTL_INTEVENT_MASK);
3505 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3506 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3508 wr32(hw, I40E_QINT_TQCTL(qp), val);
3513 free_irq(pf->pdev->irq, pf);
3515 val = rd32(hw, I40E_PFINT_LNKLST0);
3516 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3517 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3518 val |= I40E_QUEUE_END_OF_LIST
3519 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3520 wr32(hw, I40E_PFINT_LNKLST0, val);
3522 val = rd32(hw, I40E_QINT_RQCTL(qp));
3523 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3524 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3525 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3526 I40E_QINT_RQCTL_INTEVENT_MASK);
3528 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3529 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3531 wr32(hw, I40E_QINT_RQCTL(qp), val);
3533 val = rd32(hw, I40E_QINT_TQCTL(qp));
3535 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3536 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3537 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3538 I40E_QINT_TQCTL_INTEVENT_MASK);
3540 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3541 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3543 wr32(hw, I40E_QINT_TQCTL(qp), val);
3548 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3549 * @vsi: the VSI being configured
3550 * @v_idx: Index of vector to be freed
3552 * This function frees the memory allocated to the q_vector. In addition if
3553 * NAPI is enabled it will delete any references to the NAPI struct prior
3554 * to freeing the q_vector.
3556 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3558 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3559 struct i40e_ring *ring;
3564 /* disassociate q_vector from rings */
3565 i40e_for_each_ring(ring, q_vector->tx)
3566 ring->q_vector = NULL;
3568 i40e_for_each_ring(ring, q_vector->rx)
3569 ring->q_vector = NULL;
3571 /* only VSI w/ an associated netdev is set up w/ NAPI */
3573 netif_napi_del(&q_vector->napi);
3575 vsi->q_vectors[v_idx] = NULL;
3577 kfree_rcu(q_vector, rcu);
3581 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3582 * @vsi: the VSI being un-configured
3584 * This frees the memory allocated to the q_vectors and
3585 * deletes references to the NAPI struct.
3587 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3591 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3592 i40e_free_q_vector(vsi, v_idx);
3596 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3597 * @pf: board private structure
3599 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3601 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3602 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3603 pci_disable_msix(pf->pdev);
3604 kfree(pf->msix_entries);
3605 pf->msix_entries = NULL;
3606 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3607 pci_disable_msi(pf->pdev);
3609 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3613 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3614 * @pf: board private structure
3616 * We go through and clear interrupt specific resources and reset the structure
3617 * to pre-load conditions
3619 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3623 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3624 for (i = 0; i < pf->num_alloc_vsi; i++)
3626 i40e_vsi_free_q_vectors(pf->vsi[i]);
3627 i40e_reset_interrupt_capability(pf);
3631 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3632 * @vsi: the VSI being configured
3634 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3641 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3642 napi_enable(&vsi->q_vectors[q_idx]->napi);
3646 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3647 * @vsi: the VSI being configured
3649 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3656 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3657 napi_disable(&vsi->q_vectors[q_idx]->napi);
3661 * i40e_vsi_close - Shut down a VSI
3662 * @vsi: the vsi to be quelled
3664 static void i40e_vsi_close(struct i40e_vsi *vsi)
3666 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
3668 i40e_vsi_free_irq(vsi);
3669 i40e_vsi_free_tx_resources(vsi);
3670 i40e_vsi_free_rx_resources(vsi);
3674 * i40e_quiesce_vsi - Pause a given VSI
3675 * @vsi: the VSI being paused
3677 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
3679 if (test_bit(__I40E_DOWN, &vsi->state))
3682 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
3683 if (vsi->netdev && netif_running(vsi->netdev)) {
3684 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
3686 i40e_vsi_close(vsi);
3691 * i40e_unquiesce_vsi - Resume a given VSI
3692 * @vsi: the VSI being resumed
3694 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
3696 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
3699 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
3700 if (vsi->netdev && netif_running(vsi->netdev))
3701 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
3703 i40e_vsi_open(vsi); /* this clears the DOWN bit */
3707 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
3710 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
3714 for (v = 0; v < pf->num_alloc_vsi; v++) {
3716 i40e_quiesce_vsi(pf->vsi[v]);
3721 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
3724 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
3728 for (v = 0; v < pf->num_alloc_vsi; v++) {
3730 i40e_unquiesce_vsi(pf->vsi[v]);
3735 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
3736 * @dcbcfg: the corresponding DCBx configuration structure
3738 * Return the number of TCs from given DCBx configuration
3740 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
3745 /* Scan the ETS Config Priority Table to find
3746 * traffic class enabled for a given priority
3747 * and use the traffic class index to get the
3748 * number of traffic classes enabled
3750 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
3751 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
3752 num_tc = dcbcfg->etscfg.prioritytable[i];
3755 /* Traffic class index starts from zero so
3756 * increment to return the actual count
3762 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
3763 * @dcbcfg: the corresponding DCBx configuration structure
3765 * Query the current DCB configuration and return the number of
3766 * traffic classes enabled from the given DCBX config
3768 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
3770 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
3774 for (i = 0; i < num_tc; i++)
3775 enabled_tc |= 1 << i;
3781 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
3782 * @pf: PF being queried
3784 * Return number of traffic classes enabled for the given PF
3786 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
3788 struct i40e_hw *hw = &pf->hw;
3791 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
3793 /* If DCB is not enabled then always in single TC */
3794 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
3797 /* MFP mode return count of enabled TCs for this PF */
3798 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3799 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3800 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3801 if (enabled_tc & (1 << i))
3807 /* SFP mode will be enabled for all TCs on port */
3808 return i40e_dcb_get_num_tc(dcbcfg);
3812 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
3813 * @pf: PF being queried
3815 * Return a bitmap for first enabled traffic class for this PF.
3817 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
3819 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3823 return 0x1; /* TC0 */
3825 /* Find the first enabled TC */
3826 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3827 if (enabled_tc & (1 << i))
3835 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
3836 * @pf: PF being queried
3838 * Return a bitmap for enabled traffic classes for this PF.
3840 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
3842 /* If DCB is not enabled for this PF then just return default TC */
3843 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
3844 return i40e_pf_get_default_tc(pf);
3846 /* MFP mode will have enabled TCs set by FW */
3847 if (pf->flags & I40E_FLAG_MFP_ENABLED)
3848 return pf->hw.func_caps.enabled_tcmap;
3850 /* SFP mode we want PF to be enabled for all TCs */
3851 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
3855 * i40e_vsi_get_bw_info - Query VSI BW Information
3856 * @vsi: the VSI being queried
3858 * Returns 0 on success, negative value on failure
3860 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
3862 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
3863 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
3864 struct i40e_pf *pf = vsi->back;
3865 struct i40e_hw *hw = &pf->hw;
3870 /* Get the VSI level BW configuration */
3871 aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
3873 dev_info(&pf->pdev->dev,
3874 "couldn't get pf vsi bw config, err %d, aq_err %d\n",
3875 aq_ret, pf->hw.aq.asq_last_status);
3879 /* Get the VSI level BW configuration per TC */
3880 aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
3883 dev_info(&pf->pdev->dev,
3884 "couldn't get pf vsi ets bw config, err %d, aq_err %d\n",
3885 aq_ret, pf->hw.aq.asq_last_status);
3889 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
3890 dev_info(&pf->pdev->dev,
3891 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
3892 bw_config.tc_valid_bits,
3893 bw_ets_config.tc_valid_bits);
3894 /* Still continuing */
3897 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
3898 vsi->bw_max_quanta = bw_config.max_bw;
3899 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
3900 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
3901 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3902 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
3903 vsi->bw_ets_limit_credits[i] =
3904 le16_to_cpu(bw_ets_config.credits[i]);
3905 /* 3 bits out of 4 for each TC */
3906 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
3913 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
3914 * @vsi: the VSI being configured
3915 * @enabled_tc: TC bitmap
3916 * @bw_credits: BW shared credits per TC
3918 * Returns 0 on success, negative value on failure
3920 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
3923 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
3927 bw_data.tc_valid_bits = enabled_tc;
3928 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
3929 bw_data.tc_bw_credits[i] = bw_share[i];
3931 aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
3934 dev_info(&vsi->back->pdev->dev,
3935 "AQ command Config VSI BW allocation per TC failed = %d\n",
3936 vsi->back->hw.aq.asq_last_status);
3940 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
3941 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
3947 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
3948 * @vsi: the VSI being configured
3949 * @enabled_tc: TC map to be enabled
3952 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
3954 struct net_device *netdev = vsi->netdev;
3955 struct i40e_pf *pf = vsi->back;
3956 struct i40e_hw *hw = &pf->hw;
3959 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
3965 netdev_reset_tc(netdev);
3969 /* Set up actual enabled TCs on the VSI */
3970 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
3973 /* set per TC queues for the VSI */
3974 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3975 /* Only set TC queues for enabled tcs
3977 * e.g. For a VSI that has TC0 and TC3 enabled the
3978 * enabled_tc bitmap would be 0x00001001; the driver
3979 * will set the numtc for netdev as 2 that will be
3980 * referenced by the netdev layer as TC 0 and 1.
3982 if (vsi->tc_config.enabled_tc & (1 << i))
3983 netdev_set_tc_queue(netdev,
3984 vsi->tc_config.tc_info[i].netdev_tc,
3985 vsi->tc_config.tc_info[i].qcount,
3986 vsi->tc_config.tc_info[i].qoffset);
3989 /* Assign UP2TC map for the VSI */
3990 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
3991 /* Get the actual TC# for the UP */
3992 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
3993 /* Get the mapped netdev TC# for the UP */
3994 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
3995 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4000 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4001 * @vsi: the VSI being configured
4002 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4004 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4005 struct i40e_vsi_context *ctxt)
4007 /* copy just the sections touched not the entire info
4008 * since not all sections are valid as returned by
4011 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4012 memcpy(&vsi->info.queue_mapping,
4013 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4014 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4015 sizeof(vsi->info.tc_mapping));
4019 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4020 * @vsi: VSI to be configured
4021 * @enabled_tc: TC bitmap
4023 * This configures a particular VSI for TCs that are mapped to the
4024 * given TC bitmap. It uses default bandwidth share for TCs across
4025 * VSIs to configure TC for a particular VSI.
4028 * It is expected that the VSI queues have been quisced before calling
4031 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4033 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4034 struct i40e_vsi_context ctxt;
4038 /* Check if enabled_tc is same as existing or new TCs */
4039 if (vsi->tc_config.enabled_tc == enabled_tc)
4042 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4043 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4044 if (enabled_tc & (1 << i))
4048 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4050 dev_info(&vsi->back->pdev->dev,
4051 "Failed configuring TC map %d for VSI %d\n",
4052 enabled_tc, vsi->seid);
4056 /* Update Queue Pairs Mapping for currently enabled UPs */
4057 ctxt.seid = vsi->seid;
4058 ctxt.pf_num = vsi->back->hw.pf_id;
4060 ctxt.uplink_seid = vsi->uplink_seid;
4061 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
4062 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4064 /* Update the VSI after updating the VSI queue-mapping information */
4065 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4067 dev_info(&vsi->back->pdev->dev,
4068 "update vsi failed, aq_err=%d\n",
4069 vsi->back->hw.aq.asq_last_status);
4072 /* update the local VSI info with updated queue map */
4073 i40e_vsi_update_queue_map(vsi, &ctxt);
4074 vsi->info.valid_sections = 0;
4076 /* Update current VSI BW information */
4077 ret = i40e_vsi_get_bw_info(vsi);
4079 dev_info(&vsi->back->pdev->dev,
4080 "Failed updating vsi bw info, aq_err=%d\n",
4081 vsi->back->hw.aq.asq_last_status);
4085 /* Update the netdev TC setup */
4086 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4092 * i40e_veb_config_tc - Configure TCs for given VEB
4094 * @enabled_tc: TC bitmap
4096 * Configures given TC bitmap for VEB (switching) element
4098 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4100 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4101 struct i40e_pf *pf = veb->pf;
4105 /* No TCs or already enabled TCs just return */
4106 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4109 bw_data.tc_valid_bits = enabled_tc;
4110 /* bw_data.absolute_credits is not set (relative) */
4112 /* Enable ETS TCs with equal BW Share for now */
4113 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4114 if (enabled_tc & (1 << i))
4115 bw_data.tc_bw_share_credits[i] = 1;
4118 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4121 dev_info(&pf->pdev->dev,
4122 "veb bw config failed, aq_err=%d\n",
4123 pf->hw.aq.asq_last_status);
4127 /* Update the BW information */
4128 ret = i40e_veb_get_bw_info(veb);
4130 dev_info(&pf->pdev->dev,
4131 "Failed getting veb bw config, aq_err=%d\n",
4132 pf->hw.aq.asq_last_status);
4139 #ifdef CONFIG_I40E_DCB
4141 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4144 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4145 * the caller would've quiesce all the VSIs before calling
4148 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4154 /* Enable the TCs available on PF to all VEBs */
4155 tc_map = i40e_pf_get_tc_map(pf);
4156 for (v = 0; v < I40E_MAX_VEB; v++) {
4159 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4161 dev_info(&pf->pdev->dev,
4162 "Failed configuring TC for VEB seid=%d\n",
4164 /* Will try to configure as many components */
4168 /* Update each VSI */
4169 for (v = 0; v < pf->num_alloc_vsi; v++) {
4173 /* - Enable all TCs for the LAN VSI
4174 * - For all others keep them at TC0 for now
4176 if (v == pf->lan_vsi)
4177 tc_map = i40e_pf_get_tc_map(pf);
4179 tc_map = i40e_pf_get_default_tc(pf);
4181 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4183 dev_info(&pf->pdev->dev,
4184 "Failed configuring TC for VSI seid=%d\n",
4186 /* Will try to configure as many components */
4188 /* Re-configure VSI vectors based on updated TC map */
4189 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4190 if (pf->vsi[v]->netdev)
4191 i40e_dcbnl_set_all(pf->vsi[v]);
4197 * i40e_init_pf_dcb - Initialize DCB configuration
4198 * @pf: PF being configured
4200 * Query the current DCB configuration and cache it
4201 * in the hardware structure
4203 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4205 struct i40e_hw *hw = &pf->hw;
4208 if (pf->hw.func_caps.npar_enable)
4211 /* Get the initial DCB configuration */
4212 err = i40e_init_dcb(hw);
4214 /* Device/Function is not DCBX capable */
4215 if ((!hw->func_caps.dcb) ||
4216 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4217 dev_info(&pf->pdev->dev,
4218 "DCBX offload is not supported or is disabled for this PF.\n");
4220 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4224 /* When status is not DISABLED then DCBX in FW */
4225 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4226 DCB_CAP_DCBX_VER_IEEE;
4228 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4229 /* Enable DCB tagging only when more than one TC */
4230 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4231 pf->flags |= I40E_FLAG_DCB_ENABLED;
4234 dev_info(&pf->pdev->dev, "AQ Querying DCB configuration failed: %d\n",
4235 pf->hw.aq.asq_last_status);
4241 #endif /* CONFIG_I40E_DCB */
4242 #define SPEED_SIZE 14
4245 * i40e_print_link_message - print link up or down
4246 * @vsi: the VSI for which link needs a message
4248 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4250 char speed[SPEED_SIZE] = "Unknown";
4251 char fc[FC_SIZE] = "RX/TX";
4254 netdev_info(vsi->netdev, "NIC Link is Down\n");
4258 switch (vsi->back->hw.phy.link_info.link_speed) {
4259 case I40E_LINK_SPEED_40GB:
4260 strncpy(speed, "40 Gbps", SPEED_SIZE);
4262 case I40E_LINK_SPEED_10GB:
4263 strncpy(speed, "10 Gbps", SPEED_SIZE);
4265 case I40E_LINK_SPEED_1GB:
4266 strncpy(speed, "1000 Mbps", SPEED_SIZE);
4272 switch (vsi->back->hw.fc.current_mode) {
4274 strncpy(fc, "RX/TX", FC_SIZE);
4276 case I40E_FC_TX_PAUSE:
4277 strncpy(fc, "TX", FC_SIZE);
4279 case I40E_FC_RX_PAUSE:
4280 strncpy(fc, "RX", FC_SIZE);
4283 strncpy(fc, "None", FC_SIZE);
4287 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4292 * i40e_up_complete - Finish the last steps of bringing up a connection
4293 * @vsi: the VSI being configured
4295 static int i40e_up_complete(struct i40e_vsi *vsi)
4297 struct i40e_pf *pf = vsi->back;
4300 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4301 i40e_vsi_configure_msix(vsi);
4303 i40e_configure_msi_and_legacy(vsi);
4306 err = i40e_vsi_control_rings(vsi, true);
4310 clear_bit(__I40E_DOWN, &vsi->state);
4311 i40e_napi_enable_all(vsi);
4312 i40e_vsi_enable_irq(vsi);
4314 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4316 i40e_print_link_message(vsi, true);
4317 netif_tx_start_all_queues(vsi->netdev);
4318 netif_carrier_on(vsi->netdev);
4319 } else if (vsi->netdev) {
4320 i40e_print_link_message(vsi, false);
4323 /* replay FDIR SB filters */
4324 if (vsi->type == I40E_VSI_FDIR)
4325 i40e_fdir_filter_restore(vsi);
4326 i40e_service_event_schedule(pf);
4332 * i40e_vsi_reinit_locked - Reset the VSI
4333 * @vsi: the VSI being configured
4335 * Rebuild the ring structs after some configuration
4336 * has changed, e.g. MTU size.
4338 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4340 struct i40e_pf *pf = vsi->back;
4342 WARN_ON(in_interrupt());
4343 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4344 usleep_range(1000, 2000);
4347 /* Give a VF some time to respond to the reset. The
4348 * two second wait is based upon the watchdog cycle in
4351 if (vsi->type == I40E_VSI_SRIOV)
4354 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4358 * i40e_up - Bring the connection back up after being down
4359 * @vsi: the VSI being configured
4361 int i40e_up(struct i40e_vsi *vsi)
4365 err = i40e_vsi_configure(vsi);
4367 err = i40e_up_complete(vsi);
4373 * i40e_down - Shutdown the connection processing
4374 * @vsi: the VSI being stopped
4376 void i40e_down(struct i40e_vsi *vsi)
4380 /* It is assumed that the caller of this function
4381 * sets the vsi->state __I40E_DOWN bit.
4384 netif_carrier_off(vsi->netdev);
4385 netif_tx_disable(vsi->netdev);
4387 i40e_vsi_disable_irq(vsi);
4388 i40e_vsi_control_rings(vsi, false);
4389 i40e_napi_disable_all(vsi);
4391 for (i = 0; i < vsi->num_queue_pairs; i++) {
4392 i40e_clean_tx_ring(vsi->tx_rings[i]);
4393 i40e_clean_rx_ring(vsi->rx_rings[i]);
4398 * i40e_setup_tc - configure multiple traffic classes
4399 * @netdev: net device to configure
4400 * @tc: number of traffic classes to enable
4402 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
4404 struct i40e_netdev_priv *np = netdev_priv(netdev);
4405 struct i40e_vsi *vsi = np->vsi;
4406 struct i40e_pf *pf = vsi->back;
4411 /* Check if DCB enabled to continue */
4412 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
4413 netdev_info(netdev, "DCB is not enabled for adapter\n");
4417 /* Check if MFP enabled */
4418 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4419 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
4423 /* Check whether tc count is within enabled limit */
4424 if (tc > i40e_pf_get_num_tc(pf)) {
4425 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
4429 /* Generate TC map for number of tc requested */
4430 for (i = 0; i < tc; i++)
4431 enabled_tc |= (1 << i);
4433 /* Requesting same TC configuration as already enabled */
4434 if (enabled_tc == vsi->tc_config.enabled_tc)
4437 /* Quiesce VSI queues */
4438 i40e_quiesce_vsi(vsi);
4440 /* Configure VSI for enabled TCs */
4441 ret = i40e_vsi_config_tc(vsi, enabled_tc);
4443 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
4449 i40e_unquiesce_vsi(vsi);
4456 * i40e_open - Called when a network interface is made active
4457 * @netdev: network interface device structure
4459 * The open entry point is called when a network interface is made
4460 * active by the system (IFF_UP). At this point all resources needed
4461 * for transmit and receive operations are allocated, the interrupt
4462 * handler is registered with the OS, the netdev watchdog subtask is
4463 * enabled, and the stack is notified that the interface is ready.
4465 * Returns 0 on success, negative value on failure
4467 static int i40e_open(struct net_device *netdev)
4469 struct i40e_netdev_priv *np = netdev_priv(netdev);
4470 struct i40e_vsi *vsi = np->vsi;
4471 struct i40e_pf *pf = vsi->back;
4474 /* disallow open during test or if eeprom is broken */
4475 if (test_bit(__I40E_TESTING, &pf->state) ||
4476 test_bit(__I40E_BAD_EEPROM, &pf->state))
4479 netif_carrier_off(netdev);
4481 err = i40e_vsi_open(vsi);
4485 /* configure global TSO hardware offload settings */
4486 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
4487 TCP_FLAG_FIN) >> 16);
4488 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
4490 TCP_FLAG_CWR) >> 16);
4491 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
4493 #ifdef CONFIG_I40E_VXLAN
4494 vxlan_get_rx_port(netdev);
4502 * @vsi: the VSI to open
4504 * Finish initialization of the VSI.
4506 * Returns 0 on success, negative value on failure
4508 int i40e_vsi_open(struct i40e_vsi *vsi)
4510 struct i40e_pf *pf = vsi->back;
4511 char int_name[IFNAMSIZ];
4514 /* allocate descriptors */
4515 err = i40e_vsi_setup_tx_resources(vsi);
4518 err = i40e_vsi_setup_rx_resources(vsi);
4522 err = i40e_vsi_configure(vsi);
4527 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
4528 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
4529 err = i40e_vsi_request_irq(vsi, int_name);
4533 /* Notify the stack of the actual queue counts. */
4534 err = netif_set_real_num_tx_queues(vsi->netdev,
4535 vsi->num_queue_pairs);
4537 goto err_set_queues;
4539 err = netif_set_real_num_rx_queues(vsi->netdev,
4540 vsi->num_queue_pairs);
4542 goto err_set_queues;
4544 } else if (vsi->type == I40E_VSI_FDIR) {
4545 snprintf(int_name, sizeof(int_name) - 1, "%s-fdir",
4546 dev_driver_string(&pf->pdev->dev));
4547 err = i40e_vsi_request_irq(vsi, int_name);
4553 err = i40e_up_complete(vsi);
4555 goto err_up_complete;
4562 i40e_vsi_free_irq(vsi);
4564 i40e_vsi_free_rx_resources(vsi);
4566 i40e_vsi_free_tx_resources(vsi);
4567 if (vsi == pf->vsi[pf->lan_vsi])
4568 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
4574 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
4575 * @pf: Pointer to pf
4577 * This function destroys the hlist where all the Flow Director
4578 * filters were saved.
4580 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
4582 struct i40e_fdir_filter *filter;
4583 struct hlist_node *node2;
4585 hlist_for_each_entry_safe(filter, node2,
4586 &pf->fdir_filter_list, fdir_node) {
4587 hlist_del(&filter->fdir_node);
4590 pf->fdir_pf_active_filters = 0;
4594 * i40e_close - Disables a network interface
4595 * @netdev: network interface device structure
4597 * The close entry point is called when an interface is de-activated
4598 * by the OS. The hardware is still under the driver's control, but
4599 * this netdev interface is disabled.
4601 * Returns 0, this is not allowed to fail
4603 static int i40e_close(struct net_device *netdev)
4605 struct i40e_netdev_priv *np = netdev_priv(netdev);
4606 struct i40e_vsi *vsi = np->vsi;
4608 i40e_vsi_close(vsi);
4614 * i40e_do_reset - Start a PF or Core Reset sequence
4615 * @pf: board private structure
4616 * @reset_flags: which reset is requested
4618 * The essential difference in resets is that the PF Reset
4619 * doesn't clear the packet buffers, doesn't reset the PE
4620 * firmware, and doesn't bother the other PFs on the chip.
4622 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
4626 WARN_ON(in_interrupt());
4628 if (i40e_check_asq_alive(&pf->hw))
4629 i40e_vc_notify_reset(pf);
4631 /* do the biggest reset indicated */
4632 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) {
4634 /* Request a Global Reset
4636 * This will start the chip's countdown to the actual full
4637 * chip reset event, and a warning interrupt to be sent
4638 * to all PFs, including the requestor. Our handler
4639 * for the warning interrupt will deal with the shutdown
4640 * and recovery of the switch setup.
4642 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
4643 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4644 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
4645 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4647 } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) {
4649 /* Request a Core Reset
4651 * Same as Global Reset, except does *not* include the MAC/PHY
4653 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
4654 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4655 val |= I40E_GLGEN_RTRIG_CORER_MASK;
4656 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4657 i40e_flush(&pf->hw);
4659 } else if (reset_flags & (1 << __I40E_EMP_RESET_REQUESTED)) {
4661 /* Request a Firmware Reset
4663 * Same as Global reset, plus restarting the
4664 * embedded firmware engine.
4666 /* enable EMP Reset */
4667 val = rd32(&pf->hw, I40E_GLGEN_RSTENA_EMP);
4668 val |= I40E_GLGEN_RSTENA_EMP_EMP_RST_ENA_MASK;
4669 wr32(&pf->hw, I40E_GLGEN_RSTENA_EMP, val);
4671 /* force the reset */
4672 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4673 val |= I40E_GLGEN_RTRIG_EMPFWR_MASK;
4674 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4675 i40e_flush(&pf->hw);
4677 } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) {
4679 /* Request a PF Reset
4681 * Resets only the PF-specific registers
4683 * This goes directly to the tear-down and rebuild of
4684 * the switch, since we need to do all the recovery as
4685 * for the Core Reset.
4687 dev_dbg(&pf->pdev->dev, "PFR requested\n");
4688 i40e_handle_reset_warning(pf);
4690 } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) {
4693 /* Find the VSI(s) that requested a re-init */
4694 dev_info(&pf->pdev->dev,
4695 "VSI reinit requested\n");
4696 for (v = 0; v < pf->num_alloc_vsi; v++) {
4697 struct i40e_vsi *vsi = pf->vsi[v];
4699 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
4700 i40e_vsi_reinit_locked(pf->vsi[v]);
4701 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
4705 /* no further action needed, so return now */
4707 } else if (reset_flags & (1 << __I40E_DOWN_REQUESTED)) {
4710 /* Find the VSI(s) that needs to be brought down */
4711 dev_info(&pf->pdev->dev, "VSI down requested\n");
4712 for (v = 0; v < pf->num_alloc_vsi; v++) {
4713 struct i40e_vsi *vsi = pf->vsi[v];
4715 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
4716 set_bit(__I40E_DOWN, &vsi->state);
4718 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
4722 /* no further action needed, so return now */
4725 dev_info(&pf->pdev->dev,
4726 "bad reset request 0x%08x\n", reset_flags);
4731 #ifdef CONFIG_I40E_DCB
4733 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
4734 * @pf: board private structure
4735 * @old_cfg: current DCB config
4736 * @new_cfg: new DCB config
4738 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
4739 struct i40e_dcbx_config *old_cfg,
4740 struct i40e_dcbx_config *new_cfg)
4742 bool need_reconfig = false;
4744 /* Check if ETS configuration has changed */
4745 if (memcmp(&new_cfg->etscfg,
4747 sizeof(new_cfg->etscfg))) {
4748 /* If Priority Table has changed reconfig is needed */
4749 if (memcmp(&new_cfg->etscfg.prioritytable,
4750 &old_cfg->etscfg.prioritytable,
4751 sizeof(new_cfg->etscfg.prioritytable))) {
4752 need_reconfig = true;
4753 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
4756 if (memcmp(&new_cfg->etscfg.tcbwtable,
4757 &old_cfg->etscfg.tcbwtable,
4758 sizeof(new_cfg->etscfg.tcbwtable)))
4759 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
4761 if (memcmp(&new_cfg->etscfg.tsatable,
4762 &old_cfg->etscfg.tsatable,
4763 sizeof(new_cfg->etscfg.tsatable)))
4764 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
4767 /* Check if PFC configuration has changed */
4768 if (memcmp(&new_cfg->pfc,
4770 sizeof(new_cfg->pfc))) {
4771 need_reconfig = true;
4772 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
4775 /* Check if APP Table has changed */
4776 if (memcmp(&new_cfg->app,
4778 sizeof(new_cfg->app))) {
4779 need_reconfig = true;
4780 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
4783 return need_reconfig;
4787 * i40e_handle_lldp_event - Handle LLDP Change MIB event
4788 * @pf: board private structure
4789 * @e: event info posted on ARQ
4791 static int i40e_handle_lldp_event(struct i40e_pf *pf,
4792 struct i40e_arq_event_info *e)
4794 struct i40e_aqc_lldp_get_mib *mib =
4795 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
4796 struct i40e_hw *hw = &pf->hw;
4797 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
4798 struct i40e_dcbx_config tmp_dcbx_cfg;
4799 bool need_reconfig = false;
4803 /* Not DCB capable or capability disabled */
4804 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
4807 /* Ignore if event is not for Nearest Bridge */
4808 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
4809 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
4810 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
4813 /* Check MIB Type and return if event for Remote MIB update */
4814 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
4815 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
4816 /* Update the remote cached instance and return */
4817 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
4818 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
4819 &hw->remote_dcbx_config);
4823 /* Convert/store the DCBX data from LLDPDU temporarily */
4824 memset(&tmp_dcbx_cfg, 0, sizeof(tmp_dcbx_cfg));
4825 ret = i40e_lldp_to_dcb_config(e->msg_buf, &tmp_dcbx_cfg);
4827 /* Error in LLDPDU parsing return */
4828 dev_info(&pf->pdev->dev, "Failed parsing LLDPDU from event buffer\n");
4832 /* No change detected in DCBX configs */
4833 if (!memcmp(&tmp_dcbx_cfg, dcbx_cfg, sizeof(tmp_dcbx_cfg))) {
4834 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
4838 need_reconfig = i40e_dcb_need_reconfig(pf, dcbx_cfg, &tmp_dcbx_cfg);
4840 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg);
4842 /* Overwrite the new configuration */
4843 *dcbx_cfg = tmp_dcbx_cfg;
4848 /* Enable DCB tagging only when more than one TC */
4849 if (i40e_dcb_get_num_tc(dcbx_cfg) > 1)
4850 pf->flags |= I40E_FLAG_DCB_ENABLED;
4852 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
4854 /* Reconfiguration needed quiesce all VSIs */
4855 i40e_pf_quiesce_all_vsi(pf);
4857 /* Changes in configuration update VEB/VSI */
4858 i40e_dcb_reconfigure(pf);
4860 i40e_pf_unquiesce_all_vsi(pf);
4864 #endif /* CONFIG_I40E_DCB */
4867 * i40e_do_reset_safe - Protected reset path for userland calls.
4868 * @pf: board private structure
4869 * @reset_flags: which reset is requested
4872 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
4875 i40e_do_reset(pf, reset_flags);
4880 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
4881 * @pf: board private structure
4882 * @e: event info posted on ARQ
4884 * Handler for LAN Queue Overflow Event generated by the firmware for PF
4887 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
4888 struct i40e_arq_event_info *e)
4890 struct i40e_aqc_lan_overflow *data =
4891 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
4892 u32 queue = le32_to_cpu(data->prtdcb_rupto);
4893 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
4894 struct i40e_hw *hw = &pf->hw;
4898 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
4901 /* Queue belongs to VF, find the VF and issue VF reset */
4902 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
4903 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
4904 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
4905 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
4906 vf_id -= hw->func_caps.vf_base_id;
4907 vf = &pf->vf[vf_id];
4908 i40e_vc_notify_vf_reset(vf);
4909 /* Allow VF to process pending reset notification */
4911 i40e_reset_vf(vf, false);
4916 * i40e_service_event_complete - Finish up the service event
4917 * @pf: board private structure
4919 static void i40e_service_event_complete(struct i40e_pf *pf)
4921 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
4923 /* flush memory to make sure state is correct before next watchog */
4924 smp_mb__before_atomic();
4925 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
4929 * i40e_get_current_fd_count - Get the count of FD filters programmed in the HW
4930 * @pf: board private structure
4932 int i40e_get_current_fd_count(struct i40e_pf *pf)
4935 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
4936 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
4937 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
4938 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
4943 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
4944 * @pf: board private structure
4946 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
4948 u32 fcnt_prog, fcnt_avail;
4950 /* Check if, FD SB or ATR was auto disabled and if there is enough room
4953 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
4954 (pf->flags & I40E_FLAG_FD_SB_ENABLED))
4956 fcnt_prog = i40e_get_current_fd_count(pf);
4957 fcnt_avail = i40e_get_fd_cnt_all(pf);
4958 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) {
4959 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
4960 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
4961 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
4962 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
4965 /* Wait for some more space to be available to turn on ATR */
4966 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
4967 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
4968 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
4969 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4970 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
4976 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
4977 * @pf: board private structure
4979 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
4981 if (!(pf->flags & I40E_FLAG_FDIR_REQUIRES_REINIT))
4984 /* if interface is down do nothing */
4985 if (test_bit(__I40E_DOWN, &pf->state))
4987 i40e_fdir_check_and_reenable(pf);
4989 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
4990 (pf->flags & I40E_FLAG_FD_SB_ENABLED))
4991 pf->flags &= ~I40E_FLAG_FDIR_REQUIRES_REINIT;
4995 * i40e_vsi_link_event - notify VSI of a link event
4996 * @vsi: vsi to be notified
4997 * @link_up: link up or down
4999 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5004 switch (vsi->type) {
5006 if (!vsi->netdev || !vsi->netdev_registered)
5010 netif_carrier_on(vsi->netdev);
5011 netif_tx_wake_all_queues(vsi->netdev);
5013 netif_carrier_off(vsi->netdev);
5014 netif_tx_stop_all_queues(vsi->netdev);
5018 case I40E_VSI_SRIOV:
5021 case I40E_VSI_VMDQ2:
5023 case I40E_VSI_MIRROR:
5025 /* there is no notification for other VSIs */
5031 * i40e_veb_link_event - notify elements on the veb of a link event
5032 * @veb: veb to be notified
5033 * @link_up: link up or down
5035 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5040 if (!veb || !veb->pf)
5044 /* depth first... */
5045 for (i = 0; i < I40E_MAX_VEB; i++)
5046 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5047 i40e_veb_link_event(pf->veb[i], link_up);
5049 /* ... now the local VSIs */
5050 for (i = 0; i < pf->num_alloc_vsi; i++)
5051 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5052 i40e_vsi_link_event(pf->vsi[i], link_up);
5056 * i40e_link_event - Update netif_carrier status
5057 * @pf: board private structure
5059 static void i40e_link_event(struct i40e_pf *pf)
5061 bool new_link, old_link;
5063 new_link = (pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP);
5064 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5066 if (new_link == old_link)
5068 if (!test_bit(__I40E_DOWN, &pf->vsi[pf->lan_vsi]->state))
5069 i40e_print_link_message(pf->vsi[pf->lan_vsi], new_link);
5071 /* Notify the base of the switch tree connected to
5072 * the link. Floating VEBs are not notified.
5074 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5075 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5077 i40e_vsi_link_event(pf->vsi[pf->lan_vsi], new_link);
5080 i40e_vc_notify_link_state(pf);
5082 if (pf->flags & I40E_FLAG_PTP)
5083 i40e_ptp_set_increment(pf);
5087 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts
5088 * @pf: board private structure
5090 * Set the per-queue flags to request a check for stuck queues in the irq
5091 * clean functions, then force interrupts to be sure the irq clean is called.
5093 static void i40e_check_hang_subtask(struct i40e_pf *pf)
5097 /* If we're down or resetting, just bail */
5098 if (test_bit(__I40E_CONFIG_BUSY, &pf->state))
5101 /* for each VSI/netdev
5103 * set the check flag
5105 * force an interrupt
5107 for (v = 0; v < pf->num_alloc_vsi; v++) {
5108 struct i40e_vsi *vsi = pf->vsi[v];
5112 test_bit(__I40E_DOWN, &vsi->state) ||
5113 (vsi->netdev && !netif_carrier_ok(vsi->netdev)))
5116 for (i = 0; i < vsi->num_queue_pairs; i++) {
5117 set_check_for_tx_hang(vsi->tx_rings[i]);
5118 if (test_bit(__I40E_HANG_CHECK_ARMED,
5119 &vsi->tx_rings[i]->state))
5124 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
5125 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0,
5126 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
5127 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK));
5129 u16 vec = vsi->base_vector - 1;
5130 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK |
5131 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK);
5132 for (i = 0; i < vsi->num_q_vectors; i++, vec++)
5133 wr32(&vsi->back->hw,
5134 I40E_PFINT_DYN_CTLN(vec), val);
5136 i40e_flush(&vsi->back->hw);
5142 * i40e_watchdog_subtask - Check and bring link up
5143 * @pf: board private structure
5145 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5149 /* if interface is down do nothing */
5150 if (test_bit(__I40E_DOWN, &pf->state) ||
5151 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5154 /* Update the stats for active netdevs so the network stack
5155 * can look at updated numbers whenever it cares to
5157 for (i = 0; i < pf->num_alloc_vsi; i++)
5158 if (pf->vsi[i] && pf->vsi[i]->netdev)
5159 i40e_update_stats(pf->vsi[i]);
5161 /* Update the stats for the active switching components */
5162 for (i = 0; i < I40E_MAX_VEB; i++)
5164 i40e_update_veb_stats(pf->veb[i]);
5166 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5170 * i40e_reset_subtask - Set up for resetting the device and driver
5171 * @pf: board private structure
5173 static void i40e_reset_subtask(struct i40e_pf *pf)
5175 u32 reset_flags = 0;
5178 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5179 reset_flags |= (1 << __I40E_REINIT_REQUESTED);
5180 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5182 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5183 reset_flags |= (1 << __I40E_PF_RESET_REQUESTED);
5184 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5186 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5187 reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED);
5188 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5190 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5191 reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED);
5192 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5194 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5195 reset_flags |= (1 << __I40E_DOWN_REQUESTED);
5196 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5199 /* If there's a recovery already waiting, it takes
5200 * precedence before starting a new reset sequence.
5202 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5203 i40e_handle_reset_warning(pf);
5207 /* If we're already down or resetting, just bail */
5209 !test_bit(__I40E_DOWN, &pf->state) &&
5210 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5211 i40e_do_reset(pf, reset_flags);
5218 * i40e_handle_link_event - Handle link event
5219 * @pf: board private structure
5220 * @e: event info posted on ARQ
5222 static void i40e_handle_link_event(struct i40e_pf *pf,
5223 struct i40e_arq_event_info *e)
5225 struct i40e_hw *hw = &pf->hw;
5226 struct i40e_aqc_get_link_status *status =
5227 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5228 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
5230 /* save off old link status information */
5231 memcpy(&pf->hw.phy.link_info_old, hw_link_info,
5232 sizeof(pf->hw.phy.link_info_old));
5234 /* update link status */
5235 hw_link_info->phy_type = (enum i40e_aq_phy_type)status->phy_type;
5236 hw_link_info->link_speed = (enum i40e_aq_link_speed)status->link_speed;
5237 hw_link_info->link_info = status->link_info;
5238 hw_link_info->an_info = status->an_info;
5239 hw_link_info->ext_info = status->ext_info;
5240 hw_link_info->lse_enable =
5241 le16_to_cpu(status->command_flags) &
5244 /* process the event */
5245 i40e_link_event(pf);
5247 /* Do a new status request to re-enable LSE reporting
5248 * and load new status information into the hw struct,
5249 * then see if the status changed while processing the
5252 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
5253 i40e_link_event(pf);
5257 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5258 * @pf: board private structure
5260 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
5262 struct i40e_arq_event_info event;
5263 struct i40e_hw *hw = &pf->hw;
5270 if (!test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state))
5273 /* check for error indications */
5274 val = rd32(&pf->hw, pf->hw.aq.arq.len);
5276 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
5277 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
5278 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
5280 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
5281 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
5282 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
5284 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
5285 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
5286 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
5289 wr32(&pf->hw, pf->hw.aq.arq.len, val);
5291 val = rd32(&pf->hw, pf->hw.aq.asq.len);
5293 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
5294 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
5295 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
5297 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
5298 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
5299 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
5301 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
5302 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
5303 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
5306 wr32(&pf->hw, pf->hw.aq.asq.len, val);
5308 event.msg_size = I40E_MAX_AQ_BUF_SIZE;
5309 event.msg_buf = kzalloc(event.msg_size, GFP_KERNEL);
5314 event.msg_size = I40E_MAX_AQ_BUF_SIZE; /* reinit each time */
5315 ret = i40e_clean_arq_element(hw, &event, &pending);
5316 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK) {
5317 dev_info(&pf->pdev->dev, "No ARQ event found\n");
5320 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
5324 opcode = le16_to_cpu(event.desc.opcode);
5327 case i40e_aqc_opc_get_link_status:
5328 i40e_handle_link_event(pf, &event);
5330 case i40e_aqc_opc_send_msg_to_pf:
5331 ret = i40e_vc_process_vf_msg(pf,
5332 le16_to_cpu(event.desc.retval),
5333 le32_to_cpu(event.desc.cookie_high),
5334 le32_to_cpu(event.desc.cookie_low),
5338 case i40e_aqc_opc_lldp_update_mib:
5339 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
5340 #ifdef CONFIG_I40E_DCB
5342 ret = i40e_handle_lldp_event(pf, &event);
5344 #endif /* CONFIG_I40E_DCB */
5346 case i40e_aqc_opc_event_lan_overflow:
5347 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
5348 i40e_handle_lan_overflow_event(pf, &event);
5350 case i40e_aqc_opc_send_msg_to_peer:
5351 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
5354 dev_info(&pf->pdev->dev,
5355 "ARQ Error: Unknown event 0x%04x received\n",
5359 } while (pending && (i++ < pf->adminq_work_limit));
5361 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
5362 /* re-enable Admin queue interrupt cause */
5363 val = rd32(hw, I40E_PFINT_ICR0_ENA);
5364 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
5365 wr32(hw, I40E_PFINT_ICR0_ENA, val);
5368 kfree(event.msg_buf);
5372 * i40e_verify_eeprom - make sure eeprom is good to use
5373 * @pf: board private structure
5375 static void i40e_verify_eeprom(struct i40e_pf *pf)
5379 err = i40e_diag_eeprom_test(&pf->hw);
5381 /* retry in case of garbage read */
5382 err = i40e_diag_eeprom_test(&pf->hw);
5384 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
5386 set_bit(__I40E_BAD_EEPROM, &pf->state);
5390 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
5391 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
5392 clear_bit(__I40E_BAD_EEPROM, &pf->state);
5397 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
5398 * @veb: pointer to the VEB instance
5400 * This is a recursive function that first builds the attached VSIs then
5401 * recurses in to build the next layer of VEB. We track the connections
5402 * through our own index numbers because the seid's from the HW could
5403 * change across the reset.
5405 static int i40e_reconstitute_veb(struct i40e_veb *veb)
5407 struct i40e_vsi *ctl_vsi = NULL;
5408 struct i40e_pf *pf = veb->pf;
5412 /* build VSI that owns this VEB, temporarily attached to base VEB */
5413 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
5415 pf->vsi[v]->veb_idx == veb->idx &&
5416 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
5417 ctl_vsi = pf->vsi[v];
5422 dev_info(&pf->pdev->dev,
5423 "missing owner VSI for veb_idx %d\n", veb->idx);
5425 goto end_reconstitute;
5427 if (ctl_vsi != pf->vsi[pf->lan_vsi])
5428 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
5429 ret = i40e_add_vsi(ctl_vsi);
5431 dev_info(&pf->pdev->dev,
5432 "rebuild of owner VSI failed: %d\n", ret);
5433 goto end_reconstitute;
5435 i40e_vsi_reset_stats(ctl_vsi);
5437 /* create the VEB in the switch and move the VSI onto the VEB */
5438 ret = i40e_add_veb(veb, ctl_vsi);
5440 goto end_reconstitute;
5442 /* create the remaining VSIs attached to this VEB */
5443 for (v = 0; v < pf->num_alloc_vsi; v++) {
5444 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
5447 if (pf->vsi[v]->veb_idx == veb->idx) {
5448 struct i40e_vsi *vsi = pf->vsi[v];
5449 vsi->uplink_seid = veb->seid;
5450 ret = i40e_add_vsi(vsi);
5452 dev_info(&pf->pdev->dev,
5453 "rebuild of vsi_idx %d failed: %d\n",
5455 goto end_reconstitute;
5457 i40e_vsi_reset_stats(vsi);
5461 /* create any VEBs attached to this VEB - RECURSION */
5462 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
5463 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
5464 pf->veb[veb_idx]->uplink_seid = veb->seid;
5465 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
5476 * i40e_get_capabilities - get info about the HW
5477 * @pf: the PF struct
5479 static int i40e_get_capabilities(struct i40e_pf *pf)
5481 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
5486 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
5488 cap_buf = kzalloc(buf_len, GFP_KERNEL);
5492 /* this loads the data into the hw struct for us */
5493 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
5495 i40e_aqc_opc_list_func_capabilities,
5497 /* data loaded, buffer no longer needed */
5500 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
5501 /* retry with a larger buffer */
5502 buf_len = data_size;
5503 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
5504 dev_info(&pf->pdev->dev,
5505 "capability discovery failed: aq=%d\n",
5506 pf->hw.aq.asq_last_status);
5511 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
5512 (pf->hw.aq.fw_maj_ver < 2)) {
5513 pf->hw.func_caps.num_msix_vectors++;
5514 pf->hw.func_caps.num_msix_vectors_vf++;
5517 if (pf->hw.debug_mask & I40E_DEBUG_USER)
5518 dev_info(&pf->pdev->dev,
5519 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
5520 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
5521 pf->hw.func_caps.num_msix_vectors,
5522 pf->hw.func_caps.num_msix_vectors_vf,
5523 pf->hw.func_caps.fd_filters_guaranteed,
5524 pf->hw.func_caps.fd_filters_best_effort,
5525 pf->hw.func_caps.num_tx_qp,
5526 pf->hw.func_caps.num_vsis);
5528 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
5529 + pf->hw.func_caps.num_vfs)
5530 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
5531 dev_info(&pf->pdev->dev,
5532 "got num_vsis %d, setting num_vsis to %d\n",
5533 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
5534 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
5540 static int i40e_vsi_clear(struct i40e_vsi *vsi);
5543 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
5544 * @pf: board private structure
5546 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
5548 struct i40e_vsi *vsi;
5551 /* quick workaround for an NVM issue that leaves a critical register
5554 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
5555 static const u32 hkey[] = {
5556 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
5557 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
5558 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
5561 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
5562 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
5565 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
5568 /* find existing VSI and see if it needs configuring */
5570 for (i = 0; i < pf->num_alloc_vsi; i++) {
5571 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
5577 /* create a new VSI if none exists */
5579 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
5580 pf->vsi[pf->lan_vsi]->seid, 0);
5582 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
5583 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
5588 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
5592 * i40e_fdir_teardown - release the Flow Director resources
5593 * @pf: board private structure
5595 static void i40e_fdir_teardown(struct i40e_pf *pf)
5599 i40e_fdir_filter_exit(pf);
5600 for (i = 0; i < pf->num_alloc_vsi; i++) {
5601 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
5602 i40e_vsi_release(pf->vsi[i]);
5609 * i40e_prep_for_reset - prep for the core to reset
5610 * @pf: board private structure
5612 * Close up the VFs and other things in prep for pf Reset.
5614 static void i40e_prep_for_reset(struct i40e_pf *pf)
5616 struct i40e_hw *hw = &pf->hw;
5617 i40e_status ret = 0;
5620 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
5621 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
5624 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
5626 /* quiesce the VSIs and their queues that are not already DOWN */
5627 i40e_pf_quiesce_all_vsi(pf);
5629 for (v = 0; v < pf->num_alloc_vsi; v++) {
5631 pf->vsi[v]->seid = 0;
5634 i40e_shutdown_adminq(&pf->hw);
5636 /* call shutdown HMC */
5637 if (hw->hmc.hmc_obj) {
5638 ret = i40e_shutdown_lan_hmc(hw);
5640 dev_warn(&pf->pdev->dev,
5641 "shutdown_lan_hmc failed: %d\n", ret);
5646 * i40e_send_version - update firmware with driver version
5649 static void i40e_send_version(struct i40e_pf *pf)
5651 struct i40e_driver_version dv;
5653 dv.major_version = DRV_VERSION_MAJOR;
5654 dv.minor_version = DRV_VERSION_MINOR;
5655 dv.build_version = DRV_VERSION_BUILD;
5656 dv.subbuild_version = 0;
5657 strncpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
5658 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
5662 * i40e_reset_and_rebuild - reset and rebuild using a saved config
5663 * @pf: board private structure
5664 * @reinit: if the Main VSI needs to re-initialized.
5666 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
5668 struct i40e_hw *hw = &pf->hw;
5672 /* Now we wait for GRST to settle out.
5673 * We don't have to delete the VEBs or VSIs from the hw switch
5674 * because the reset will make them disappear.
5676 ret = i40e_pf_reset(hw);
5678 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
5679 goto end_core_reset;
5683 if (test_bit(__I40E_DOWN, &pf->state))
5684 goto end_core_reset;
5685 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
5687 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
5688 ret = i40e_init_adminq(&pf->hw);
5690 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret);
5691 goto end_core_reset;
5694 /* re-verify the eeprom if we just had an EMP reset */
5695 if (test_bit(__I40E_EMP_RESET_REQUESTED, &pf->state)) {
5696 clear_bit(__I40E_EMP_RESET_REQUESTED, &pf->state);
5697 i40e_verify_eeprom(pf);
5700 i40e_clear_pxe_mode(hw);
5701 ret = i40e_get_capabilities(pf);
5703 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n",
5705 goto end_core_reset;
5708 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
5709 hw->func_caps.num_rx_qp,
5710 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
5712 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
5713 goto end_core_reset;
5715 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
5717 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
5718 goto end_core_reset;
5721 #ifdef CONFIG_I40E_DCB
5722 ret = i40e_init_pf_dcb(pf);
5724 dev_info(&pf->pdev->dev, "init_pf_dcb failed: %d\n", ret);
5725 goto end_core_reset;
5727 #endif /* CONFIG_I40E_DCB */
5729 /* do basic switch setup */
5730 ret = i40e_setup_pf_switch(pf, reinit);
5732 goto end_core_reset;
5734 /* Rebuild the VSIs and VEBs that existed before reset.
5735 * They are still in our local switch element arrays, so only
5736 * need to rebuild the switch model in the HW.
5738 * If there were VEBs but the reconstitution failed, we'll try
5739 * try to recover minimal use by getting the basic PF VSI working.
5741 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
5742 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
5743 /* find the one VEB connected to the MAC, and find orphans */
5744 for (v = 0; v < I40E_MAX_VEB; v++) {
5748 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
5749 pf->veb[v]->uplink_seid == 0) {
5750 ret = i40e_reconstitute_veb(pf->veb[v]);
5755 /* If Main VEB failed, we're in deep doodoo,
5756 * so give up rebuilding the switch and set up
5757 * for minimal rebuild of PF VSI.
5758 * If orphan failed, we'll report the error
5759 * but try to keep going.
5761 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
5762 dev_info(&pf->pdev->dev,
5763 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
5765 pf->vsi[pf->lan_vsi]->uplink_seid
5768 } else if (pf->veb[v]->uplink_seid == 0) {
5769 dev_info(&pf->pdev->dev,
5770 "rebuild of orphan VEB failed: %d\n",
5777 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
5778 dev_info(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
5779 /* no VEB, so rebuild only the Main VSI */
5780 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
5782 dev_info(&pf->pdev->dev,
5783 "rebuild of Main VSI failed: %d\n", ret);
5784 goto end_core_reset;
5788 /* reinit the misc interrupt */
5789 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5790 ret = i40e_setup_misc_vector(pf);
5792 /* restart the VSIs that were rebuilt and running before the reset */
5793 i40e_pf_unquiesce_all_vsi(pf);
5795 if (pf->num_alloc_vfs) {
5796 for (v = 0; v < pf->num_alloc_vfs; v++)
5797 i40e_reset_vf(&pf->vf[v], true);
5800 /* tell the firmware that we're starting */
5801 i40e_send_version(pf);
5804 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
5808 * i40e_handle_reset_warning - prep for the pf to reset, reset and rebuild
5809 * @pf: board private structure
5811 * Close up the VFs and other things in prep for a Core Reset,
5812 * then get ready to rebuild the world.
5814 static void i40e_handle_reset_warning(struct i40e_pf *pf)
5816 i40e_prep_for_reset(pf);
5817 i40e_reset_and_rebuild(pf, false);
5821 * i40e_handle_mdd_event
5822 * @pf: pointer to the pf structure
5824 * Called from the MDD irq handler to identify possibly malicious vfs
5826 static void i40e_handle_mdd_event(struct i40e_pf *pf)
5828 struct i40e_hw *hw = &pf->hw;
5829 bool mdd_detected = false;
5834 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
5837 /* find what triggered the MDD event */
5838 reg = rd32(hw, I40E_GL_MDET_TX);
5839 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
5840 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
5841 I40E_GL_MDET_TX_PF_NUM_SHIFT;
5842 u8 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
5843 I40E_GL_MDET_TX_VF_NUM_SHIFT;
5844 u8 event = (reg & I40E_GL_MDET_TX_EVENT_SHIFT) >>
5845 I40E_GL_MDET_TX_EVENT_SHIFT;
5846 u8 queue = (reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
5847 I40E_GL_MDET_TX_QUEUE_SHIFT;
5848 dev_info(&pf->pdev->dev,
5849 "Malicious Driver Detection event 0x%02x on TX queue %d pf number 0x%02x vf number 0x%02x\n",
5850 event, queue, pf_num, vf_num);
5851 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
5852 mdd_detected = true;
5854 reg = rd32(hw, I40E_GL_MDET_RX);
5855 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
5856 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
5857 I40E_GL_MDET_RX_FUNCTION_SHIFT;
5858 u8 event = (reg & I40E_GL_MDET_RX_EVENT_SHIFT) >>
5859 I40E_GL_MDET_RX_EVENT_SHIFT;
5860 u8 queue = (reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
5861 I40E_GL_MDET_RX_QUEUE_SHIFT;
5862 dev_info(&pf->pdev->dev,
5863 "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
5864 event, queue, func);
5865 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
5866 mdd_detected = true;
5869 /* see if one of the VFs needs its hand slapped */
5870 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
5872 reg = rd32(hw, I40E_VP_MDET_TX(i));
5873 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
5874 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
5875 vf->num_mdd_events++;
5876 dev_info(&pf->pdev->dev, "MDD TX event on VF %d\n", i);
5879 reg = rd32(hw, I40E_VP_MDET_RX(i));
5880 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
5881 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
5882 vf->num_mdd_events++;
5883 dev_info(&pf->pdev->dev, "MDD RX event on VF %d\n", i);
5886 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
5887 dev_info(&pf->pdev->dev,
5888 "Too many MDD events on VF %d, disabled\n", i);
5889 dev_info(&pf->pdev->dev,
5890 "Use PF Control I/F to re-enable the VF\n");
5891 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
5895 /* re-enable mdd interrupt cause */
5896 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
5897 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
5898 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
5899 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
5903 #ifdef CONFIG_I40E_VXLAN
5905 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
5906 * @pf: board private structure
5908 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
5910 struct i40e_hw *hw = &pf->hw;
5916 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
5919 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
5921 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
5922 if (pf->pending_vxlan_bitmap & (1 << i)) {
5923 pf->pending_vxlan_bitmap &= ~(1 << i);
5924 port = pf->vxlan_ports[i];
5926 i40e_aq_add_udp_tunnel(hw, ntohs(port),
5927 I40E_AQC_TUNNEL_TYPE_VXLAN,
5928 &filter_index, NULL)
5929 : i40e_aq_del_udp_tunnel(hw, i, NULL);
5932 dev_info(&pf->pdev->dev, "Failed to execute AQ command for %s port %d with index %d\n",
5933 port ? "adding" : "deleting",
5934 ntohs(port), port ? i : i);
5936 pf->vxlan_ports[i] = 0;
5938 dev_info(&pf->pdev->dev, "%s port %d with AQ command with index %d\n",
5939 port ? "Added" : "Deleted",
5940 ntohs(port), port ? i : filter_index);
5948 * i40e_service_task - Run the driver's async subtasks
5949 * @work: pointer to work_struct containing our data
5951 static void i40e_service_task(struct work_struct *work)
5953 struct i40e_pf *pf = container_of(work,
5956 unsigned long start_time = jiffies;
5958 /* don't bother with service tasks if a reset is in progress */
5959 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
5960 i40e_service_event_complete(pf);
5964 i40e_reset_subtask(pf);
5965 i40e_handle_mdd_event(pf);
5966 i40e_vc_process_vflr_event(pf);
5967 i40e_watchdog_subtask(pf);
5968 i40e_fdir_reinit_subtask(pf);
5969 i40e_check_hang_subtask(pf);
5970 i40e_sync_filters_subtask(pf);
5971 #ifdef CONFIG_I40E_VXLAN
5972 i40e_sync_vxlan_filters_subtask(pf);
5974 i40e_clean_adminq_subtask(pf);
5976 i40e_service_event_complete(pf);
5978 /* If the tasks have taken longer than one timer cycle or there
5979 * is more work to be done, reschedule the service task now
5980 * rather than wait for the timer to tick again.
5982 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
5983 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
5984 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
5985 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
5986 i40e_service_event_schedule(pf);
5990 * i40e_service_timer - timer callback
5991 * @data: pointer to PF struct
5993 static void i40e_service_timer(unsigned long data)
5995 struct i40e_pf *pf = (struct i40e_pf *)data;
5997 mod_timer(&pf->service_timer,
5998 round_jiffies(jiffies + pf->service_timer_period));
5999 i40e_service_event_schedule(pf);
6003 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6004 * @vsi: the VSI being configured
6006 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6008 struct i40e_pf *pf = vsi->back;
6010 switch (vsi->type) {
6012 vsi->alloc_queue_pairs = pf->num_lan_qps;
6013 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6014 I40E_REQ_DESCRIPTOR_MULTIPLE);
6015 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6016 vsi->num_q_vectors = pf->num_lan_msix;
6018 vsi->num_q_vectors = 1;
6023 vsi->alloc_queue_pairs = 1;
6024 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6025 I40E_REQ_DESCRIPTOR_MULTIPLE);
6026 vsi->num_q_vectors = 1;
6029 case I40E_VSI_VMDQ2:
6030 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6031 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6032 I40E_REQ_DESCRIPTOR_MULTIPLE);
6033 vsi->num_q_vectors = pf->num_vmdq_msix;
6036 case I40E_VSI_SRIOV:
6037 vsi->alloc_queue_pairs = pf->num_vf_qps;
6038 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6039 I40E_REQ_DESCRIPTOR_MULTIPLE);
6051 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6052 * @type: VSI pointer
6053 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6055 * On error: returns error code (negative)
6056 * On success: returns 0
6058 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6063 /* allocate memory for both Tx and Rx ring pointers */
6064 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6065 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6068 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6070 if (alloc_qvectors) {
6071 /* allocate memory for q_vector pointers */
6072 size = sizeof(struct i40e_q_vectors *) * vsi->num_q_vectors;
6073 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6074 if (!vsi->q_vectors) {
6082 kfree(vsi->tx_rings);
6087 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6088 * @pf: board private structure
6089 * @type: type of VSI
6091 * On error: returns error code (negative)
6092 * On success: returns vsi index in PF (positive)
6094 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
6097 struct i40e_vsi *vsi;
6101 /* Need to protect the allocation of the VSIs at the PF level */
6102 mutex_lock(&pf->switch_mutex);
6104 /* VSI list may be fragmented if VSI creation/destruction has
6105 * been happening. We can afford to do a quick scan to look
6106 * for any free VSIs in the list.
6108 * find next empty vsi slot, looping back around if necessary
6111 while (i < pf->num_alloc_vsi && pf->vsi[i])
6113 if (i >= pf->num_alloc_vsi) {
6115 while (i < pf->next_vsi && pf->vsi[i])
6119 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
6120 vsi_idx = i; /* Found one! */
6123 goto unlock_pf; /* out of VSI slots! */
6127 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
6134 set_bit(__I40E_DOWN, &vsi->state);
6137 vsi->rx_itr_setting = pf->rx_itr_default;
6138 vsi->tx_itr_setting = pf->tx_itr_default;
6139 vsi->netdev_registered = false;
6140 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
6141 INIT_LIST_HEAD(&vsi->mac_filter_list);
6142 vsi->irqs_ready = false;
6144 ret = i40e_set_num_rings_in_vsi(vsi);
6148 ret = i40e_vsi_alloc_arrays(vsi, true);
6152 /* Setup default MSIX irq handler for VSI */
6153 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
6155 pf->vsi[vsi_idx] = vsi;
6160 pf->next_vsi = i - 1;
6163 mutex_unlock(&pf->switch_mutex);
6168 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
6169 * @type: VSI pointer
6170 * @free_qvectors: a bool to specify if q_vectors need to be freed.
6172 * On error: returns error code (negative)
6173 * On success: returns 0
6175 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
6177 /* free the ring and vector containers */
6178 if (free_qvectors) {
6179 kfree(vsi->q_vectors);
6180 vsi->q_vectors = NULL;
6182 kfree(vsi->tx_rings);
6183 vsi->tx_rings = NULL;
6184 vsi->rx_rings = NULL;
6188 * i40e_vsi_clear - Deallocate the VSI provided
6189 * @vsi: the VSI being un-configured
6191 static int i40e_vsi_clear(struct i40e_vsi *vsi)
6202 mutex_lock(&pf->switch_mutex);
6203 if (!pf->vsi[vsi->idx]) {
6204 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
6205 vsi->idx, vsi->idx, vsi, vsi->type);
6209 if (pf->vsi[vsi->idx] != vsi) {
6210 dev_err(&pf->pdev->dev,
6211 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
6212 pf->vsi[vsi->idx]->idx,
6214 pf->vsi[vsi->idx]->type,
6215 vsi->idx, vsi, vsi->type);
6219 /* updates the pf for this cleared vsi */
6220 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
6221 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
6223 i40e_vsi_free_arrays(vsi, true);
6225 pf->vsi[vsi->idx] = NULL;
6226 if (vsi->idx < pf->next_vsi)
6227 pf->next_vsi = vsi->idx;
6230 mutex_unlock(&pf->switch_mutex);
6238 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
6239 * @vsi: the VSI being cleaned
6241 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
6245 if (vsi->tx_rings && vsi->tx_rings[0]) {
6246 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
6247 kfree_rcu(vsi->tx_rings[i], rcu);
6248 vsi->tx_rings[i] = NULL;
6249 vsi->rx_rings[i] = NULL;
6255 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
6256 * @vsi: the VSI being configured
6258 static int i40e_alloc_rings(struct i40e_vsi *vsi)
6260 struct i40e_ring *tx_ring, *rx_ring;
6261 struct i40e_pf *pf = vsi->back;
6264 /* Set basic values in the rings to be used later during open() */
6265 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
6266 /* allocate space for both Tx and Rx in one shot */
6267 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
6271 tx_ring->queue_index = i;
6272 tx_ring->reg_idx = vsi->base_queue + i;
6273 tx_ring->ring_active = false;
6275 tx_ring->netdev = vsi->netdev;
6276 tx_ring->dev = &pf->pdev->dev;
6277 tx_ring->count = vsi->num_desc;
6279 tx_ring->dcb_tc = 0;
6280 vsi->tx_rings[i] = tx_ring;
6282 rx_ring = &tx_ring[1];
6283 rx_ring->queue_index = i;
6284 rx_ring->reg_idx = vsi->base_queue + i;
6285 rx_ring->ring_active = false;
6287 rx_ring->netdev = vsi->netdev;
6288 rx_ring->dev = &pf->pdev->dev;
6289 rx_ring->count = vsi->num_desc;
6291 rx_ring->dcb_tc = 0;
6292 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
6293 set_ring_16byte_desc_enabled(rx_ring);
6295 clear_ring_16byte_desc_enabled(rx_ring);
6296 vsi->rx_rings[i] = rx_ring;
6302 i40e_vsi_clear_rings(vsi);
6307 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
6308 * @pf: board private structure
6309 * @vectors: the number of MSI-X vectors to request
6311 * Returns the number of vectors reserved, or error
6313 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
6315 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
6316 I40E_MIN_MSIX, vectors);
6318 dev_info(&pf->pdev->dev,
6319 "MSI-X vector reservation failed: %d\n", vectors);
6327 * i40e_init_msix - Setup the MSIX capability
6328 * @pf: board private structure
6330 * Work with the OS to set up the MSIX vectors needed.
6332 * Returns 0 on success, negative on failure
6334 static int i40e_init_msix(struct i40e_pf *pf)
6336 i40e_status err = 0;
6337 struct i40e_hw *hw = &pf->hw;
6341 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
6344 /* The number of vectors we'll request will be comprised of:
6345 * - Add 1 for "other" cause for Admin Queue events, etc.
6346 * - The number of LAN queue pairs
6347 * - Queues being used for RSS.
6348 * We don't need as many as max_rss_size vectors.
6349 * use rss_size instead in the calculation since that
6350 * is governed by number of cpus in the system.
6351 * - assumes symmetric Tx/Rx pairing
6352 * - The number of VMDq pairs
6353 * Once we count this up, try the request.
6355 * If we can't get what we want, we'll simplify to nearly nothing
6356 * and try again. If that still fails, we punt.
6358 pf->num_lan_msix = pf->num_lan_qps - (pf->rss_size_max - pf->rss_size);
6359 pf->num_vmdq_msix = pf->num_vmdq_qps;
6360 v_budget = 1 + pf->num_lan_msix;
6361 v_budget += (pf->num_vmdq_vsis * pf->num_vmdq_msix);
6362 if (pf->flags & I40E_FLAG_FD_SB_ENABLED)
6365 /* Scale down if necessary, and the rings will share vectors */
6366 v_budget = min_t(int, v_budget, hw->func_caps.num_msix_vectors);
6368 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
6370 if (!pf->msix_entries)
6373 for (i = 0; i < v_budget; i++)
6374 pf->msix_entries[i].entry = i;
6375 vec = i40e_reserve_msix_vectors(pf, v_budget);
6377 if (vec != v_budget) {
6378 /* If we have limited resources, we will start with no vectors
6379 * for the special features and then allocate vectors to some
6380 * of these features based on the policy and at the end disable
6381 * the features that did not get any vectors.
6383 pf->num_vmdq_msix = 0;
6386 if (vec < I40E_MIN_MSIX) {
6387 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
6388 kfree(pf->msix_entries);
6389 pf->msix_entries = NULL;
6392 } else if (vec == I40E_MIN_MSIX) {
6393 /* Adjust for minimal MSIX use */
6394 pf->num_vmdq_vsis = 0;
6395 pf->num_vmdq_qps = 0;
6396 pf->num_lan_qps = 1;
6397 pf->num_lan_msix = 1;
6399 } else if (vec != v_budget) {
6400 /* reserve the misc vector */
6403 /* Scale vector usage down */
6404 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
6405 pf->num_vmdq_vsis = 1;
6407 /* partition out the remaining vectors */
6410 pf->num_lan_msix = 1;
6413 pf->num_lan_msix = 2;
6416 pf->num_lan_msix = min_t(int, (vec / 2),
6418 pf->num_vmdq_vsis = min_t(int, (vec - pf->num_lan_msix),
6419 I40E_DEFAULT_NUM_VMDQ_VSI);
6424 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
6425 (pf->num_vmdq_msix == 0)) {
6426 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
6427 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
6433 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
6434 * @vsi: the VSI being configured
6435 * @v_idx: index of the vector in the vsi struct
6437 * We allocate one q_vector. If allocation fails we return -ENOMEM.
6439 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
6441 struct i40e_q_vector *q_vector;
6443 /* allocate q_vector */
6444 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
6448 q_vector->vsi = vsi;
6449 q_vector->v_idx = v_idx;
6450 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
6452 netif_napi_add(vsi->netdev, &q_vector->napi,
6453 i40e_napi_poll, NAPI_POLL_WEIGHT);
6455 q_vector->rx.latency_range = I40E_LOW_LATENCY;
6456 q_vector->tx.latency_range = I40E_LOW_LATENCY;
6458 /* tie q_vector and vsi together */
6459 vsi->q_vectors[v_idx] = q_vector;
6465 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
6466 * @vsi: the VSI being configured
6468 * We allocate one q_vector per queue interrupt. If allocation fails we
6471 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
6473 struct i40e_pf *pf = vsi->back;
6474 int v_idx, num_q_vectors;
6477 /* if not MSIX, give the one vector only to the LAN VSI */
6478 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6479 num_q_vectors = vsi->num_q_vectors;
6480 else if (vsi == pf->vsi[pf->lan_vsi])
6485 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
6486 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
6495 i40e_free_q_vector(vsi, v_idx);
6501 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
6502 * @pf: board private structure to initialize
6504 static void i40e_init_interrupt_scheme(struct i40e_pf *pf)
6508 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
6509 err = i40e_init_msix(pf);
6511 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
6512 I40E_FLAG_RSS_ENABLED |
6513 I40E_FLAG_DCB_CAPABLE |
6514 I40E_FLAG_SRIOV_ENABLED |
6515 I40E_FLAG_FD_SB_ENABLED |
6516 I40E_FLAG_FD_ATR_ENABLED |
6517 I40E_FLAG_VMDQ_ENABLED);
6519 /* rework the queue expectations without MSIX */
6520 i40e_determine_queue_usage(pf);
6524 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
6525 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
6526 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
6527 err = pci_enable_msi(pf->pdev);
6529 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", err);
6530 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
6534 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
6535 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
6537 /* track first vector for misc interrupts */
6538 err = i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT-1);
6542 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
6543 * @pf: board private structure
6545 * This sets up the handler for MSIX 0, which is used to manage the
6546 * non-queue interrupts, e.g. AdminQ and errors. This is not used
6547 * when in MSI or Legacy interrupt mode.
6549 static int i40e_setup_misc_vector(struct i40e_pf *pf)
6551 struct i40e_hw *hw = &pf->hw;
6554 /* Only request the irq if this is the first time through, and
6555 * not when we're rebuilding after a Reset
6557 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6558 err = request_irq(pf->msix_entries[0].vector,
6559 i40e_intr, 0, pf->misc_int_name, pf);
6561 dev_info(&pf->pdev->dev,
6562 "request_irq for %s failed: %d\n",
6563 pf->misc_int_name, err);
6568 i40e_enable_misc_int_causes(hw);
6570 /* associate no queues to the misc vector */
6571 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
6572 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
6576 i40e_irq_dynamic_enable_icr0(pf);
6582 * i40e_config_rss - Prepare for RSS if used
6583 * @pf: board private structure
6585 static int i40e_config_rss(struct i40e_pf *pf)
6587 /* Set of random keys generated using kernel random number generator */
6588 static const u32 seed[I40E_PFQF_HKEY_MAX_INDEX + 1] = {0x41b01687,
6589 0x183cfd8c, 0xce880440, 0x580cbc3c, 0x35897377,
6590 0x328b25e1, 0x4fa98922, 0xb7d90c14, 0xd5bad70d,
6591 0xcd15a2c1, 0xe8580225, 0x4a1e9d11, 0xfe5731be};
6592 struct i40e_hw *hw = &pf->hw;
6598 /* Fill out hash function seed */
6599 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
6600 wr32(hw, I40E_PFQF_HKEY(i), seed[i]);
6602 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
6603 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
6604 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
6605 hena |= I40E_DEFAULT_RSS_HENA;
6606 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
6607 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
6609 /* Check capability and Set table size and register per hw expectation*/
6610 reg_val = rd32(hw, I40E_PFQF_CTL_0);
6611 if (hw->func_caps.rss_table_size == 512) {
6612 reg_val |= I40E_PFQF_CTL_0_HASHLUTSIZE_512;
6613 pf->rss_table_size = 512;
6615 pf->rss_table_size = 128;
6616 reg_val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_512;
6618 wr32(hw, I40E_PFQF_CTL_0, reg_val);
6620 /* Populate the LUT with max no. of queues in round robin fashion */
6621 for (i = 0, j = 0; i < pf->rss_table_size; i++, j++) {
6623 /* The assumption is that lan qp count will be the highest
6624 * qp count for any PF VSI that needs RSS.
6625 * If multiple VSIs need RSS support, all the qp counts
6626 * for those VSIs should be a power of 2 for RSS to work.
6627 * If LAN VSI is the only consumer for RSS then this requirement
6630 if (j == pf->rss_size)
6632 /* lut = 4-byte sliding window of 4 lut entries */
6633 lut = (lut << 8) | (j &
6634 ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1));
6635 /* On i = 3, we have 4 entries in lut; write to the register */
6637 wr32(hw, I40E_PFQF_HLUT(i >> 2), lut);
6645 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
6646 * @pf: board private structure
6647 * @queue_count: the requested queue count for rss.
6649 * returns 0 if rss is not enabled, if enabled returns the final rss queue
6650 * count which may be different from the requested queue count.
6652 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
6654 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
6657 queue_count = min_t(int, queue_count, pf->rss_size_max);
6659 if (queue_count != pf->rss_size) {
6660 i40e_prep_for_reset(pf);
6662 pf->rss_size = queue_count;
6664 i40e_reset_and_rebuild(pf, true);
6665 i40e_config_rss(pf);
6667 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
6668 return pf->rss_size;
6672 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
6673 * @pf: board private structure to initialize
6675 * i40e_sw_init initializes the Adapter private data structure.
6676 * Fields are initialized based on PCI device information and
6677 * OS network device settings (MTU size).
6679 static int i40e_sw_init(struct i40e_pf *pf)
6684 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
6685 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
6686 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
6687 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
6688 if (I40E_DEBUG_USER & debug)
6689 pf->hw.debug_mask = debug;
6690 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
6691 I40E_DEFAULT_MSG_ENABLE);
6694 /* Set default capability flags */
6695 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
6696 I40E_FLAG_MSI_ENABLED |
6697 I40E_FLAG_MSIX_ENABLED |
6698 I40E_FLAG_RX_1BUF_ENABLED;
6700 /* Set default ITR */
6701 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
6702 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
6704 /* Depending on PF configurations, it is possible that the RSS
6705 * maximum might end up larger than the available queues
6707 pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width;
6708 pf->rss_size_max = min_t(int, pf->rss_size_max,
6709 pf->hw.func_caps.num_tx_qp);
6710 if (pf->hw.func_caps.rss) {
6711 pf->flags |= I40E_FLAG_RSS_ENABLED;
6712 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
6717 /* MFP mode enabled */
6718 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) {
6719 pf->flags |= I40E_FLAG_MFP_ENABLED;
6720 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
6723 /* FW/NVM is not yet fixed in this regard */
6724 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
6725 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
6726 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
6727 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
6728 /* Setup a counter for fd_atr per pf */
6729 pf->fd_atr_cnt_idx = I40E_FD_ATR_STAT_IDX(pf->hw.pf_id);
6730 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
6731 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
6732 /* Setup a counter for fd_sb per pf */
6733 pf->fd_sb_cnt_idx = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
6735 dev_info(&pf->pdev->dev,
6736 "Flow Director Sideband mode Disabled in MFP mode\n");
6738 pf->fdir_pf_filter_count =
6739 pf->hw.func_caps.fd_filters_guaranteed;
6740 pf->hw.fdir_shared_filter_count =
6741 pf->hw.func_caps.fd_filters_best_effort;
6744 if (pf->hw.func_caps.vmdq) {
6745 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
6746 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
6747 pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ;
6750 #ifdef CONFIG_PCI_IOV
6751 if (pf->hw.func_caps.num_vfs) {
6752 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
6753 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
6754 pf->num_req_vfs = min_t(int,
6755 pf->hw.func_caps.num_vfs,
6758 #endif /* CONFIG_PCI_IOV */
6759 pf->eeprom_version = 0xDEAD;
6760 pf->lan_veb = I40E_NO_VEB;
6761 pf->lan_vsi = I40E_NO_VSI;
6763 /* set up queue assignment tracking */
6764 size = sizeof(struct i40e_lump_tracking)
6765 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
6766 pf->qp_pile = kzalloc(size, GFP_KERNEL);
6771 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
6772 pf->qp_pile->search_hint = 0;
6774 /* set up vector assignment tracking */
6775 size = sizeof(struct i40e_lump_tracking)
6776 + (sizeof(u16) * pf->hw.func_caps.num_msix_vectors);
6777 pf->irq_pile = kzalloc(size, GFP_KERNEL);
6778 if (!pf->irq_pile) {
6783 pf->irq_pile->num_entries = pf->hw.func_caps.num_msix_vectors;
6784 pf->irq_pile->search_hint = 0;
6786 mutex_init(&pf->switch_mutex);
6793 * i40e_set_ntuple - set the ntuple feature flag and take action
6794 * @pf: board private structure to initialize
6795 * @features: the feature set that the stack is suggesting
6797 * returns a bool to indicate if reset needs to happen
6799 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
6801 bool need_reset = false;
6803 /* Check if Flow Director n-tuple support was enabled or disabled. If
6804 * the state changed, we need to reset.
6806 if (features & NETIF_F_NTUPLE) {
6807 /* Enable filters and mark for reset */
6808 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6810 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
6812 /* turn off filters, mark for reset and clear SW filter list */
6813 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
6815 i40e_fdir_filter_exit(pf);
6817 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6818 /* if ATR was disabled it can be re-enabled. */
6819 if (!(pf->flags & I40E_FLAG_FD_ATR_ENABLED))
6820 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
6826 * i40e_set_features - set the netdev feature flags
6827 * @netdev: ptr to the netdev being adjusted
6828 * @features: the feature set that the stack is suggesting
6830 static int i40e_set_features(struct net_device *netdev,
6831 netdev_features_t features)
6833 struct i40e_netdev_priv *np = netdev_priv(netdev);
6834 struct i40e_vsi *vsi = np->vsi;
6835 struct i40e_pf *pf = vsi->back;
6838 if (features & NETIF_F_HW_VLAN_CTAG_RX)
6839 i40e_vlan_stripping_enable(vsi);
6841 i40e_vlan_stripping_disable(vsi);
6843 need_reset = i40e_set_ntuple(pf, features);
6846 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
6851 #ifdef CONFIG_I40E_VXLAN
6853 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
6854 * @pf: board private structure
6855 * @port: The UDP port to look up
6857 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
6859 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
6863 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6864 if (pf->vxlan_ports[i] == port)
6872 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
6873 * @netdev: This physical port's netdev
6874 * @sa_family: Socket Family that VXLAN is notifying us about
6875 * @port: New UDP port number that VXLAN started listening to
6877 static void i40e_add_vxlan_port(struct net_device *netdev,
6878 sa_family_t sa_family, __be16 port)
6880 struct i40e_netdev_priv *np = netdev_priv(netdev);
6881 struct i40e_vsi *vsi = np->vsi;
6882 struct i40e_pf *pf = vsi->back;
6886 if (sa_family == AF_INET6)
6889 idx = i40e_get_vxlan_port_idx(pf, port);
6891 /* Check if port already exists */
6892 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6893 netdev_info(netdev, "Port %d already offloaded\n", ntohs(port));
6897 /* Now check if there is space to add the new port */
6898 next_idx = i40e_get_vxlan_port_idx(pf, 0);
6900 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6901 netdev_info(netdev, "Maximum number of UDP ports reached, not adding port %d\n",
6906 /* New port: add it and mark its index in the bitmap */
6907 pf->vxlan_ports[next_idx] = port;
6908 pf->pending_vxlan_bitmap |= (1 << next_idx);
6910 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
6914 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
6915 * @netdev: This physical port's netdev
6916 * @sa_family: Socket Family that VXLAN is notifying us about
6917 * @port: UDP port number that VXLAN stopped listening to
6919 static void i40e_del_vxlan_port(struct net_device *netdev,
6920 sa_family_t sa_family, __be16 port)
6922 struct i40e_netdev_priv *np = netdev_priv(netdev);
6923 struct i40e_vsi *vsi = np->vsi;
6924 struct i40e_pf *pf = vsi->back;
6927 if (sa_family == AF_INET6)
6930 idx = i40e_get_vxlan_port_idx(pf, port);
6932 /* Check if port already exists */
6933 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6934 /* if port exists, set it to 0 (mark for deletion)
6935 * and make it pending
6937 pf->vxlan_ports[idx] = 0;
6939 pf->pending_vxlan_bitmap |= (1 << idx);
6941 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
6943 netdev_warn(netdev, "Port %d was not found, not deleting\n",
6950 #ifdef USE_CONST_DEV_UC_CHAR
6951 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
6952 struct net_device *dev,
6953 const unsigned char *addr,
6956 static int i40e_ndo_fdb_add(struct ndmsg *ndm,
6957 struct net_device *dev,
6958 unsigned char *addr,
6962 struct i40e_netdev_priv *np = netdev_priv(dev);
6963 struct i40e_pf *pf = np->vsi->back;
6966 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
6969 /* Hardware does not support aging addresses so if a
6970 * ndm_state is given only allow permanent addresses
6972 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
6973 netdev_info(dev, "FDB only supports static addresses\n");
6977 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
6978 err = dev_uc_add_excl(dev, addr);
6979 else if (is_multicast_ether_addr(addr))
6980 err = dev_mc_add_excl(dev, addr);
6984 /* Only return duplicate errors if NLM_F_EXCL is set */
6985 if (err == -EEXIST && !(flags & NLM_F_EXCL))
6991 #ifndef USE_DEFAULT_FDB_DEL_DUMP
6992 #ifdef USE_CONST_DEV_UC_CHAR
6993 static int i40e_ndo_fdb_del(struct ndmsg *ndm,
6994 struct net_device *dev,
6995 const unsigned char *addr)
6997 static int i40e_ndo_fdb_del(struct ndmsg *ndm,
6998 struct net_device *dev,
6999 unsigned char *addr)
7002 struct i40e_netdev_priv *np = netdev_priv(dev);
7003 struct i40e_pf *pf = np->vsi->back;
7004 int err = -EOPNOTSUPP;
7006 if (ndm->ndm_state & NUD_PERMANENT) {
7007 netdev_info(dev, "FDB only supports static addresses\n");
7011 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
7012 if (is_unicast_ether_addr(addr))
7013 err = dev_uc_del(dev, addr);
7014 else if (is_multicast_ether_addr(addr))
7015 err = dev_mc_del(dev, addr);
7023 static int i40e_ndo_fdb_dump(struct sk_buff *skb,
7024 struct netlink_callback *cb,
7025 struct net_device *dev,
7028 struct i40e_netdev_priv *np = netdev_priv(dev);
7029 struct i40e_pf *pf = np->vsi->back;
7031 if (pf->flags & I40E_FLAG_SRIOV_ENABLED)
7032 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
7037 #endif /* USE_DEFAULT_FDB_DEL_DUMP */
7038 #endif /* HAVE_FDB_OPS */
7039 static const struct net_device_ops i40e_netdev_ops = {
7040 .ndo_open = i40e_open,
7041 .ndo_stop = i40e_close,
7042 .ndo_start_xmit = i40e_lan_xmit_frame,
7043 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
7044 .ndo_set_rx_mode = i40e_set_rx_mode,
7045 .ndo_validate_addr = eth_validate_addr,
7046 .ndo_set_mac_address = i40e_set_mac,
7047 .ndo_change_mtu = i40e_change_mtu,
7048 .ndo_do_ioctl = i40e_ioctl,
7049 .ndo_tx_timeout = i40e_tx_timeout,
7050 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
7051 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
7052 #ifdef CONFIG_NET_POLL_CONTROLLER
7053 .ndo_poll_controller = i40e_netpoll,
7055 .ndo_setup_tc = i40e_setup_tc,
7056 .ndo_set_features = i40e_set_features,
7057 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
7058 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
7059 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
7060 .ndo_get_vf_config = i40e_ndo_get_vf_config,
7061 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
7062 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofck,
7063 #ifdef CONFIG_I40E_VXLAN
7064 .ndo_add_vxlan_port = i40e_add_vxlan_port,
7065 .ndo_del_vxlan_port = i40e_del_vxlan_port,
7068 .ndo_fdb_add = i40e_ndo_fdb_add,
7069 #ifndef USE_DEFAULT_FDB_DEL_DUMP
7070 .ndo_fdb_del = i40e_ndo_fdb_del,
7071 .ndo_fdb_dump = i40e_ndo_fdb_dump,
7077 * i40e_config_netdev - Setup the netdev flags
7078 * @vsi: the VSI being configured
7080 * Returns 0 on success, negative value on failure
7082 static int i40e_config_netdev(struct i40e_vsi *vsi)
7084 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
7085 struct i40e_pf *pf = vsi->back;
7086 struct i40e_hw *hw = &pf->hw;
7087 struct i40e_netdev_priv *np;
7088 struct net_device *netdev;
7089 u8 mac_addr[ETH_ALEN];
7092 etherdev_size = sizeof(struct i40e_netdev_priv);
7093 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
7097 vsi->netdev = netdev;
7098 np = netdev_priv(netdev);
7101 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
7102 NETIF_F_GSO_UDP_TUNNEL |
7105 netdev->features = NETIF_F_SG |
7109 NETIF_F_GSO_UDP_TUNNEL |
7110 NETIF_F_HW_VLAN_CTAG_TX |
7111 NETIF_F_HW_VLAN_CTAG_RX |
7112 NETIF_F_HW_VLAN_CTAG_FILTER |
7121 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
7122 netdev->features |= NETIF_F_NTUPLE;
7124 /* copy netdev features into list of user selectable features */
7125 netdev->hw_features |= netdev->features;
7127 if (vsi->type == I40E_VSI_MAIN) {
7128 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
7129 ether_addr_copy(mac_addr, hw->mac.perm_addr);
7130 /* The following two steps are necessary to prevent reception
7131 * of tagged packets - by default the NVM loads a MAC-VLAN
7132 * filter that will accept any tagged packet. This is to
7133 * prevent that during normal operations until a specific
7134 * VLAN tag filter has been set.
7136 i40e_rm_default_mac_filter(vsi, mac_addr);
7137 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, true);
7139 /* relate the VSI_VMDQ name to the VSI_MAIN name */
7140 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
7141 pf->vsi[pf->lan_vsi]->netdev->name);
7142 random_ether_addr(mac_addr);
7143 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
7145 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
7147 ether_addr_copy(netdev->dev_addr, mac_addr);
7148 ether_addr_copy(netdev->perm_addr, mac_addr);
7149 /* vlan gets same features (except vlan offload)
7150 * after any tweaks for specific VSI types
7152 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
7153 NETIF_F_HW_VLAN_CTAG_RX |
7154 NETIF_F_HW_VLAN_CTAG_FILTER);
7155 netdev->priv_flags |= IFF_UNICAST_FLT;
7156 netdev->priv_flags |= IFF_SUPP_NOFCS;
7157 /* Setup netdev TC information */
7158 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
7160 netdev->netdev_ops = &i40e_netdev_ops;
7161 netdev->watchdog_timeo = 5 * HZ;
7162 i40e_set_ethtool_ops(netdev);
7168 * i40e_vsi_delete - Delete a VSI from the switch
7169 * @vsi: the VSI being removed
7171 * Returns 0 on success, negative value on failure
7173 static void i40e_vsi_delete(struct i40e_vsi *vsi)
7175 /* remove default VSI is not allowed */
7176 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
7179 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
7183 * i40e_add_vsi - Add a VSI to the switch
7184 * @vsi: the VSI being configured
7186 * This initializes a VSI context depending on the VSI type to be added and
7187 * passes it down to the add_vsi aq command.
7189 static int i40e_add_vsi(struct i40e_vsi *vsi)
7192 struct i40e_mac_filter *f, *ftmp;
7193 struct i40e_pf *pf = vsi->back;
7194 struct i40e_hw *hw = &pf->hw;
7195 struct i40e_vsi_context ctxt;
7196 u8 enabled_tc = 0x1; /* TC0 enabled */
7199 memset(&ctxt, 0, sizeof(ctxt));
7200 switch (vsi->type) {
7202 /* The PF's main VSI is already setup as part of the
7203 * device initialization, so we'll not bother with
7204 * the add_vsi call, but we will retrieve the current
7207 ctxt.seid = pf->main_vsi_seid;
7208 ctxt.pf_num = pf->hw.pf_id;
7210 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
7211 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
7213 dev_info(&pf->pdev->dev,
7214 "couldn't get pf vsi config, err %d, aq_err %d\n",
7215 ret, pf->hw.aq.asq_last_status);
7218 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
7219 vsi->info.valid_sections = 0;
7221 vsi->seid = ctxt.seid;
7222 vsi->id = ctxt.vsi_number;
7224 enabled_tc = i40e_pf_get_tc_map(pf);
7226 /* MFP mode setup queue map and update VSI */
7227 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
7228 memset(&ctxt, 0, sizeof(ctxt));
7229 ctxt.seid = pf->main_vsi_seid;
7230 ctxt.pf_num = pf->hw.pf_id;
7232 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
7233 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
7235 dev_info(&pf->pdev->dev,
7236 "update vsi failed, aq_err=%d\n",
7237 pf->hw.aq.asq_last_status);
7241 /* update the local VSI info queue map */
7242 i40e_vsi_update_queue_map(vsi, &ctxt);
7243 vsi->info.valid_sections = 0;
7245 /* Default/Main VSI is only enabled for TC0
7246 * reconfigure it to enable all TCs that are
7247 * available on the port in SFP mode.
7249 ret = i40e_vsi_config_tc(vsi, enabled_tc);
7251 dev_info(&pf->pdev->dev,
7252 "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n",
7254 pf->hw.aq.asq_last_status);
7261 ctxt.pf_num = hw->pf_id;
7263 ctxt.uplink_seid = vsi->uplink_seid;
7264 ctxt.connection_type = 0x1; /* regular data port */
7265 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
7266 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
7269 case I40E_VSI_VMDQ2:
7270 ctxt.pf_num = hw->pf_id;
7272 ctxt.uplink_seid = vsi->uplink_seid;
7273 ctxt.connection_type = 0x1; /* regular data port */
7274 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
7276 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
7278 /* This VSI is connected to VEB so the switch_id
7279 * should be set to zero by default.
7281 ctxt.info.switch_id = 0;
7282 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
7283 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
7285 /* Setup the VSI tx/rx queue map for TC0 only for now */
7286 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
7289 case I40E_VSI_SRIOV:
7290 ctxt.pf_num = hw->pf_id;
7291 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
7292 ctxt.uplink_seid = vsi->uplink_seid;
7293 ctxt.connection_type = 0x1; /* regular data port */
7294 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
7296 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
7298 /* This VSI is connected to VEB so the switch_id
7299 * should be set to zero by default.
7301 ctxt.info.switch_id = cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
7303 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
7304 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
7305 if (pf->vf[vsi->vf_id].spoofchk) {
7306 ctxt.info.valid_sections |=
7307 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
7308 ctxt.info.sec_flags |=
7309 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
7310 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
7312 /* Setup the VSI tx/rx queue map for TC0 only for now */
7313 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
7320 if (vsi->type != I40E_VSI_MAIN) {
7321 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
7323 dev_info(&vsi->back->pdev->dev,
7324 "add vsi failed, aq_err=%d\n",
7325 vsi->back->hw.aq.asq_last_status);
7329 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
7330 vsi->info.valid_sections = 0;
7331 vsi->seid = ctxt.seid;
7332 vsi->id = ctxt.vsi_number;
7335 /* If macvlan filters already exist, force them to get loaded */
7336 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
7341 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
7342 pf->flags |= I40E_FLAG_FILTER_SYNC;
7345 /* Update VSI BW information */
7346 ret = i40e_vsi_get_bw_info(vsi);
7348 dev_info(&pf->pdev->dev,
7349 "couldn't get vsi bw info, err %d, aq_err %d\n",
7350 ret, pf->hw.aq.asq_last_status);
7351 /* VSI is already added so not tearing that up */
7360 * i40e_vsi_release - Delete a VSI and free its resources
7361 * @vsi: the VSI being removed
7363 * Returns 0 on success or < 0 on error
7365 int i40e_vsi_release(struct i40e_vsi *vsi)
7367 struct i40e_mac_filter *f, *ftmp;
7368 struct i40e_veb *veb = NULL;
7375 /* release of a VEB-owner or last VSI is not allowed */
7376 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
7377 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
7378 vsi->seid, vsi->uplink_seid);
7381 if (vsi == pf->vsi[pf->lan_vsi] &&
7382 !test_bit(__I40E_DOWN, &pf->state)) {
7383 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
7387 uplink_seid = vsi->uplink_seid;
7388 if (vsi->type != I40E_VSI_SRIOV) {
7389 if (vsi->netdev_registered) {
7390 vsi->netdev_registered = false;
7392 /* results in a call to i40e_close() */
7393 unregister_netdev(vsi->netdev);
7396 i40e_vsi_close(vsi);
7398 i40e_vsi_disable_irq(vsi);
7401 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
7402 i40e_del_filter(vsi, f->macaddr, f->vlan,
7403 f->is_vf, f->is_netdev);
7404 i40e_sync_vsi_filters(vsi);
7406 i40e_vsi_delete(vsi);
7407 i40e_vsi_free_q_vectors(vsi);
7409 free_netdev(vsi->netdev);
7412 i40e_vsi_clear_rings(vsi);
7413 i40e_vsi_clear(vsi);
7415 /* If this was the last thing on the VEB, except for the
7416 * controlling VSI, remove the VEB, which puts the controlling
7417 * VSI onto the next level down in the switch.
7419 * Well, okay, there's one more exception here: don't remove
7420 * the orphan VEBs yet. We'll wait for an explicit remove request
7421 * from up the network stack.
7423 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
7425 pf->vsi[i]->uplink_seid == uplink_seid &&
7426 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
7427 n++; /* count the VSIs */
7430 for (i = 0; i < I40E_MAX_VEB; i++) {
7433 if (pf->veb[i]->uplink_seid == uplink_seid)
7434 n++; /* count the VEBs */
7435 if (pf->veb[i]->seid == uplink_seid)
7438 if (n == 0 && veb && veb->uplink_seid != 0)
7439 i40e_veb_release(veb);
7445 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
7446 * @vsi: ptr to the VSI
7448 * This should only be called after i40e_vsi_mem_alloc() which allocates the
7449 * corresponding SW VSI structure and initializes num_queue_pairs for the
7450 * newly allocated VSI.
7452 * Returns 0 on success or negative on failure
7454 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
7457 struct i40e_pf *pf = vsi->back;
7459 if (vsi->q_vectors[0]) {
7460 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
7465 if (vsi->base_vector) {
7466 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
7467 vsi->seid, vsi->base_vector);
7471 ret = i40e_vsi_alloc_q_vectors(vsi);
7473 dev_info(&pf->pdev->dev,
7474 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
7475 vsi->num_q_vectors, vsi->seid, ret);
7476 vsi->num_q_vectors = 0;
7477 goto vector_setup_out;
7480 if (vsi->num_q_vectors)
7481 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
7482 vsi->num_q_vectors, vsi->idx);
7483 if (vsi->base_vector < 0) {
7484 dev_info(&pf->pdev->dev,
7485 "failed to get queue tracking for VSI %d, err=%d\n",
7486 vsi->seid, vsi->base_vector);
7487 i40e_vsi_free_q_vectors(vsi);
7489 goto vector_setup_out;
7497 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
7498 * @vsi: pointer to the vsi.
7500 * This re-allocates a vsi's queue resources.
7502 * Returns pointer to the successfully allocated and configured VSI sw struct
7503 * on success, otherwise returns NULL on failure.
7505 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
7507 struct i40e_pf *pf = vsi->back;
7511 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7512 i40e_vsi_clear_rings(vsi);
7514 i40e_vsi_free_arrays(vsi, false);
7515 i40e_set_num_rings_in_vsi(vsi);
7516 ret = i40e_vsi_alloc_arrays(vsi, false);
7520 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
7522 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
7526 vsi->base_queue = ret;
7528 /* Update the FW view of the VSI. Force a reset of TC and queue
7529 * layout configurations.
7531 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
7532 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
7533 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
7534 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
7536 /* assign it some queues */
7537 ret = i40e_alloc_rings(vsi);
7541 /* map all of the rings to the q_vectors */
7542 i40e_vsi_map_rings_to_vectors(vsi);
7546 i40e_vsi_free_q_vectors(vsi);
7547 if (vsi->netdev_registered) {
7548 vsi->netdev_registered = false;
7549 unregister_netdev(vsi->netdev);
7550 free_netdev(vsi->netdev);
7553 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
7555 i40e_vsi_clear(vsi);
7560 * i40e_vsi_setup - Set up a VSI by a given type
7561 * @pf: board private structure
7563 * @uplink_seid: the switch element to link to
7564 * @param1: usage depends upon VSI type. For VF types, indicates VF id
7566 * This allocates the sw VSI structure and its queue resources, then add a VSI
7567 * to the identified VEB.
7569 * Returns pointer to the successfully allocated and configure VSI sw struct on
7570 * success, otherwise returns NULL on failure.
7572 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
7573 u16 uplink_seid, u32 param1)
7575 struct i40e_vsi *vsi = NULL;
7576 struct i40e_veb *veb = NULL;
7580 /* The requested uplink_seid must be either
7581 * - the PF's port seid
7582 * no VEB is needed because this is the PF
7583 * or this is a Flow Director special case VSI
7584 * - seid of an existing VEB
7585 * - seid of a VSI that owns an existing VEB
7586 * - seid of a VSI that doesn't own a VEB
7587 * a new VEB is created and the VSI becomes the owner
7588 * - seid of the PF VSI, which is what creates the first VEB
7589 * this is a special case of the previous
7591 * Find which uplink_seid we were given and create a new VEB if needed
7593 for (i = 0; i < I40E_MAX_VEB; i++) {
7594 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
7600 if (!veb && uplink_seid != pf->mac_seid) {
7602 for (i = 0; i < pf->num_alloc_vsi; i++) {
7603 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
7609 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
7614 if (vsi->uplink_seid == pf->mac_seid)
7615 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
7616 vsi->tc_config.enabled_tc);
7617 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
7618 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
7619 vsi->tc_config.enabled_tc);
7621 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
7622 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
7626 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
7630 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
7631 uplink_seid = veb->seid;
7634 /* get vsi sw struct */
7635 v_idx = i40e_vsi_mem_alloc(pf, type);
7638 vsi = pf->vsi[v_idx];
7642 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
7644 if (type == I40E_VSI_MAIN)
7645 pf->lan_vsi = v_idx;
7646 else if (type == I40E_VSI_SRIOV)
7647 vsi->vf_id = param1;
7648 /* assign it some queues */
7649 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
7652 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
7656 vsi->base_queue = ret;
7658 /* get a VSI from the hardware */
7659 vsi->uplink_seid = uplink_seid;
7660 ret = i40e_add_vsi(vsi);
7664 switch (vsi->type) {
7665 /* setup the netdev if needed */
7667 case I40E_VSI_VMDQ2:
7668 ret = i40e_config_netdev(vsi);
7671 ret = register_netdev(vsi->netdev);
7674 vsi->netdev_registered = true;
7675 netif_carrier_off(vsi->netdev);
7676 #ifdef CONFIG_I40E_DCB
7677 /* Setup DCB netlink interface */
7678 i40e_dcbnl_setup(vsi);
7679 #endif /* CONFIG_I40E_DCB */
7683 /* set up vectors and rings if needed */
7684 ret = i40e_vsi_setup_vectors(vsi);
7688 ret = i40e_alloc_rings(vsi);
7692 /* map all of the rings to the q_vectors */
7693 i40e_vsi_map_rings_to_vectors(vsi);
7695 i40e_vsi_reset_stats(vsi);
7699 /* no netdev or rings for the other VSI types */
7706 i40e_vsi_free_q_vectors(vsi);
7708 if (vsi->netdev_registered) {
7709 vsi->netdev_registered = false;
7710 unregister_netdev(vsi->netdev);
7711 free_netdev(vsi->netdev);
7715 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
7717 i40e_vsi_clear(vsi);
7723 * i40e_veb_get_bw_info - Query VEB BW information
7724 * @veb: the veb to query
7726 * Query the Tx scheduler BW configuration data for given VEB
7728 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
7730 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
7731 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
7732 struct i40e_pf *pf = veb->pf;
7733 struct i40e_hw *hw = &pf->hw;
7738 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
7741 dev_info(&pf->pdev->dev,
7742 "query veb bw config failed, aq_err=%d\n",
7743 hw->aq.asq_last_status);
7747 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
7750 dev_info(&pf->pdev->dev,
7751 "query veb bw ets config failed, aq_err=%d\n",
7752 hw->aq.asq_last_status);
7756 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
7757 veb->bw_max_quanta = ets_data.tc_bw_max;
7758 veb->is_abs_credits = bw_data.absolute_credits_enable;
7759 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
7760 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
7761 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7762 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
7763 veb->bw_tc_limit_credits[i] =
7764 le16_to_cpu(bw_data.tc_bw_limits[i]);
7765 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
7773 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
7774 * @pf: board private structure
7776 * On error: returns error code (negative)
7777 * On success: returns vsi index in PF (positive)
7779 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
7782 struct i40e_veb *veb;
7785 /* Need to protect the allocation of switch elements at the PF level */
7786 mutex_lock(&pf->switch_mutex);
7788 /* VEB list may be fragmented if VEB creation/destruction has
7789 * been happening. We can afford to do a quick scan to look
7790 * for any free slots in the list.
7792 * find next empty veb slot, looping back around if necessary
7795 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
7797 if (i >= I40E_MAX_VEB) {
7799 goto err_alloc_veb; /* out of VEB slots! */
7802 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
7809 veb->enabled_tc = 1;
7814 mutex_unlock(&pf->switch_mutex);
7819 * i40e_switch_branch_release - Delete a branch of the switch tree
7820 * @branch: where to start deleting
7822 * This uses recursion to find the tips of the branch to be
7823 * removed, deleting until we get back to and can delete this VEB.
7825 static void i40e_switch_branch_release(struct i40e_veb *branch)
7827 struct i40e_pf *pf = branch->pf;
7828 u16 branch_seid = branch->seid;
7829 u16 veb_idx = branch->idx;
7832 /* release any VEBs on this VEB - RECURSION */
7833 for (i = 0; i < I40E_MAX_VEB; i++) {
7836 if (pf->veb[i]->uplink_seid == branch->seid)
7837 i40e_switch_branch_release(pf->veb[i]);
7840 /* Release the VSIs on this VEB, but not the owner VSI.
7842 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
7843 * the VEB itself, so don't use (*branch) after this loop.
7845 for (i = 0; i < pf->num_alloc_vsi; i++) {
7848 if (pf->vsi[i]->uplink_seid == branch_seid &&
7849 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
7850 i40e_vsi_release(pf->vsi[i]);
7854 /* There's one corner case where the VEB might not have been
7855 * removed, so double check it here and remove it if needed.
7856 * This case happens if the veb was created from the debugfs
7857 * commands and no VSIs were added to it.
7859 if (pf->veb[veb_idx])
7860 i40e_veb_release(pf->veb[veb_idx]);
7864 * i40e_veb_clear - remove veb struct
7865 * @veb: the veb to remove
7867 static void i40e_veb_clear(struct i40e_veb *veb)
7873 struct i40e_pf *pf = veb->pf;
7875 mutex_lock(&pf->switch_mutex);
7876 if (pf->veb[veb->idx] == veb)
7877 pf->veb[veb->idx] = NULL;
7878 mutex_unlock(&pf->switch_mutex);
7885 * i40e_veb_release - Delete a VEB and free its resources
7886 * @veb: the VEB being removed
7888 void i40e_veb_release(struct i40e_veb *veb)
7890 struct i40e_vsi *vsi = NULL;
7896 /* find the remaining VSI and check for extras */
7897 for (i = 0; i < pf->num_alloc_vsi; i++) {
7898 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
7904 dev_info(&pf->pdev->dev,
7905 "can't remove VEB %d with %d VSIs left\n",
7910 /* move the remaining VSI to uplink veb */
7911 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
7912 if (veb->uplink_seid) {
7913 vsi->uplink_seid = veb->uplink_seid;
7914 if (veb->uplink_seid == pf->mac_seid)
7915 vsi->veb_idx = I40E_NO_VEB;
7917 vsi->veb_idx = veb->veb_idx;
7920 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
7921 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
7924 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
7925 i40e_veb_clear(veb);
7929 * i40e_add_veb - create the VEB in the switch
7930 * @veb: the VEB to be instantiated
7931 * @vsi: the controlling VSI
7933 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
7935 bool is_default = false;
7936 bool is_cloud = false;
7939 /* get a VEB from the hardware */
7940 ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid,
7941 veb->enabled_tc, is_default,
7942 is_cloud, &veb->seid, NULL);
7944 dev_info(&veb->pf->pdev->dev,
7945 "couldn't add VEB, err %d, aq_err %d\n",
7946 ret, veb->pf->hw.aq.asq_last_status);
7950 /* get statistics counter */
7951 ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL,
7952 &veb->stats_idx, NULL, NULL, NULL);
7954 dev_info(&veb->pf->pdev->dev,
7955 "couldn't get VEB statistics idx, err %d, aq_err %d\n",
7956 ret, veb->pf->hw.aq.asq_last_status);
7959 ret = i40e_veb_get_bw_info(veb);
7961 dev_info(&veb->pf->pdev->dev,
7962 "couldn't get VEB bw info, err %d, aq_err %d\n",
7963 ret, veb->pf->hw.aq.asq_last_status);
7964 i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL);
7968 vsi->uplink_seid = veb->seid;
7969 vsi->veb_idx = veb->idx;
7970 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
7976 * i40e_veb_setup - Set up a VEB
7977 * @pf: board private structure
7978 * @flags: VEB setup flags
7979 * @uplink_seid: the switch element to link to
7980 * @vsi_seid: the initial VSI seid
7981 * @enabled_tc: Enabled TC bit-map
7983 * This allocates the sw VEB structure and links it into the switch
7984 * It is possible and legal for this to be a duplicate of an already
7985 * existing VEB. It is also possible for both uplink and vsi seids
7986 * to be zero, in order to create a floating VEB.
7988 * Returns pointer to the successfully allocated VEB sw struct on
7989 * success, otherwise returns NULL on failure.
7991 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
7992 u16 uplink_seid, u16 vsi_seid,
7995 struct i40e_veb *veb, *uplink_veb = NULL;
7996 int vsi_idx, veb_idx;
7999 /* if one seid is 0, the other must be 0 to create a floating relay */
8000 if ((uplink_seid == 0 || vsi_seid == 0) &&
8001 (uplink_seid + vsi_seid != 0)) {
8002 dev_info(&pf->pdev->dev,
8003 "one, not both seid's are 0: uplink=%d vsi=%d\n",
8004 uplink_seid, vsi_seid);
8008 /* make sure there is such a vsi and uplink */
8009 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
8010 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
8012 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
8013 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
8018 if (uplink_seid && uplink_seid != pf->mac_seid) {
8019 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
8020 if (pf->veb[veb_idx] &&
8021 pf->veb[veb_idx]->seid == uplink_seid) {
8022 uplink_veb = pf->veb[veb_idx];
8027 dev_info(&pf->pdev->dev,
8028 "uplink seid %d not found\n", uplink_seid);
8033 /* get veb sw struct */
8034 veb_idx = i40e_veb_mem_alloc(pf);
8037 veb = pf->veb[veb_idx];
8039 veb->uplink_seid = uplink_seid;
8040 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
8041 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
8043 /* create the VEB in the switch */
8044 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
8047 if (vsi_idx == pf->lan_vsi)
8048 pf->lan_veb = veb->idx;
8053 i40e_veb_clear(veb);
8059 * i40e_setup_pf_switch_element - set pf vars based on switch type
8060 * @pf: board private structure
8061 * @ele: element we are building info from
8062 * @num_reported: total number of elements
8063 * @printconfig: should we print the contents
8065 * helper function to assist in extracting a few useful SEID values.
8067 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
8068 struct i40e_aqc_switch_config_element_resp *ele,
8069 u16 num_reported, bool printconfig)
8071 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
8072 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
8073 u8 element_type = ele->element_type;
8074 u16 seid = le16_to_cpu(ele->seid);
8077 dev_info(&pf->pdev->dev,
8078 "type=%d seid=%d uplink=%d downlink=%d\n",
8079 element_type, seid, uplink_seid, downlink_seid);
8081 switch (element_type) {
8082 case I40E_SWITCH_ELEMENT_TYPE_MAC:
8083 pf->mac_seid = seid;
8085 case I40E_SWITCH_ELEMENT_TYPE_VEB:
8087 if (uplink_seid != pf->mac_seid)
8089 if (pf->lan_veb == I40E_NO_VEB) {
8092 /* find existing or else empty VEB */
8093 for (v = 0; v < I40E_MAX_VEB; v++) {
8094 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
8099 if (pf->lan_veb == I40E_NO_VEB) {
8100 v = i40e_veb_mem_alloc(pf);
8107 pf->veb[pf->lan_veb]->seid = seid;
8108 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
8109 pf->veb[pf->lan_veb]->pf = pf;
8110 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
8112 case I40E_SWITCH_ELEMENT_TYPE_VSI:
8113 if (num_reported != 1)
8115 /* This is immediately after a reset so we can assume this is
8118 pf->mac_seid = uplink_seid;
8119 pf->pf_seid = downlink_seid;
8120 pf->main_vsi_seid = seid;
8122 dev_info(&pf->pdev->dev,
8123 "pf_seid=%d main_vsi_seid=%d\n",
8124 pf->pf_seid, pf->main_vsi_seid);
8126 case I40E_SWITCH_ELEMENT_TYPE_PF:
8127 case I40E_SWITCH_ELEMENT_TYPE_VF:
8128 case I40E_SWITCH_ELEMENT_TYPE_EMP:
8129 case I40E_SWITCH_ELEMENT_TYPE_BMC:
8130 case I40E_SWITCH_ELEMENT_TYPE_PE:
8131 case I40E_SWITCH_ELEMENT_TYPE_PA:
8132 /* ignore these for now */
8135 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
8136 element_type, seid);
8142 * i40e_fetch_switch_configuration - Get switch config from firmware
8143 * @pf: board private structure
8144 * @printconfig: should we print the contents
8146 * Get the current switch configuration from the device and
8147 * extract a few useful SEID values.
8149 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
8151 struct i40e_aqc_get_switch_config_resp *sw_config;
8157 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
8161 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
8163 u16 num_reported, num_total;
8165 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
8169 dev_info(&pf->pdev->dev,
8170 "get switch config failed %d aq_err=%x\n",
8171 ret, pf->hw.aq.asq_last_status);
8176 num_reported = le16_to_cpu(sw_config->header.num_reported);
8177 num_total = le16_to_cpu(sw_config->header.num_total);
8180 dev_info(&pf->pdev->dev,
8181 "header: %d reported %d total\n",
8182 num_reported, num_total);
8184 for (i = 0; i < num_reported; i++) {
8185 struct i40e_aqc_switch_config_element_resp *ele =
8186 &sw_config->element[i];
8188 i40e_setup_pf_switch_element(pf, ele, num_reported,
8191 } while (next_seid != 0);
8198 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
8199 * @pf: board private structure
8200 * @reinit: if the Main VSI needs to re-initialized.
8202 * Returns 0 on success, negative value on failure
8204 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
8206 u32 rxfc = 0, txfc = 0, rxfc_reg;
8209 /* find out what's out there already */
8210 ret = i40e_fetch_switch_configuration(pf, false);
8212 dev_info(&pf->pdev->dev,
8213 "couldn't fetch switch config, err %d, aq_err %d\n",
8214 ret, pf->hw.aq.asq_last_status);
8217 i40e_pf_reset_stats(pf);
8219 /* first time setup */
8220 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
8221 struct i40e_vsi *vsi = NULL;
8224 /* Set up the PF VSI associated with the PF's main VSI
8225 * that is already in the HW switch
8227 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
8228 uplink_seid = pf->veb[pf->lan_veb]->seid;
8230 uplink_seid = pf->mac_seid;
8231 if (pf->lan_vsi == I40E_NO_VSI)
8232 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
8234 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
8236 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
8237 i40e_fdir_teardown(pf);
8241 /* force a reset of TC and queue layout configurations */
8242 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8243 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8244 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8245 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8247 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
8249 i40e_fdir_sb_setup(pf);
8251 /* Setup static PF queue filter control settings */
8252 ret = i40e_setup_pf_filter_control(pf);
8254 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
8256 /* Failure here should not stop continuing other steps */
8259 /* enable RSS in the HW, even for only one queue, as the stack can use
8262 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
8263 i40e_config_rss(pf);
8265 /* fill in link information and enable LSE reporting */
8266 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
8267 i40e_link_event(pf);
8269 /* Initialize user-specific link properties */
8270 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
8271 I40E_AQ_AN_COMPLETED) ? true : false);
8272 /* requested_mode is set in probe or by ethtool */
8273 if (!pf->fc_autoneg_status)
8276 if ((pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX) &&
8277 (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX))
8278 pf->hw.fc.current_mode = I40E_FC_FULL;
8279 else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX)
8280 pf->hw.fc.current_mode = I40E_FC_TX_PAUSE;
8281 else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX)
8282 pf->hw.fc.current_mode = I40E_FC_RX_PAUSE;
8284 pf->hw.fc.current_mode = I40E_FC_NONE;
8286 /* sync the flow control settings with the auto-neg values */
8287 switch (pf->hw.fc.current_mode) {
8292 case I40E_FC_TX_PAUSE:
8296 case I40E_FC_RX_PAUSE:
8301 case I40E_FC_DEFAULT:
8308 /* no default case, we have to handle all possibilities here */
8311 wr32(&pf->hw, I40E_PRTDCB_FCCFG, txfc << I40E_PRTDCB_FCCFG_TFCE_SHIFT);
8313 rxfc_reg = rd32(&pf->hw, I40E_PRTDCB_MFLCN) &
8314 ~I40E_PRTDCB_MFLCN_RFCE_MASK;
8315 rxfc_reg |= (rxfc << I40E_PRTDCB_MFLCN_RFCE_SHIFT);
8317 wr32(&pf->hw, I40E_PRTDCB_MFLCN, rxfc_reg);
8322 /* disable L2 flow control, user can turn it on if they wish */
8323 wr32(&pf->hw, I40E_PRTDCB_FCCFG, 0);
8324 wr32(&pf->hw, I40E_PRTDCB_MFLCN, rd32(&pf->hw, I40E_PRTDCB_MFLCN) &
8325 ~I40E_PRTDCB_MFLCN_RFCE_MASK);
8334 * i40e_determine_queue_usage - Work out queue distribution
8335 * @pf: board private structure
8337 static void i40e_determine_queue_usage(struct i40e_pf *pf)
8341 pf->num_lan_qps = 0;
8343 /* Find the max queues to be put into basic use. We'll always be
8344 * using TC0, whether or not DCB is running, and TC0 will get the
8347 queues_left = pf->hw.func_caps.num_tx_qp;
8349 if ((queues_left == 1) ||
8350 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
8351 /* one qp for PF, no queues for anything else */
8353 pf->rss_size = pf->num_lan_qps = 1;
8355 /* make sure all the fancies are disabled */
8356 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
8357 I40E_FLAG_FD_SB_ENABLED |
8358 I40E_FLAG_FD_ATR_ENABLED |
8359 I40E_FLAG_DCB_CAPABLE |
8360 I40E_FLAG_SRIOV_ENABLED |
8361 I40E_FLAG_VMDQ_ENABLED);
8362 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
8363 I40E_FLAG_FD_SB_ENABLED |
8364 I40E_FLAG_FD_ATR_ENABLED |
8365 I40E_FLAG_DCB_CAPABLE))) {
8367 pf->rss_size = pf->num_lan_qps = 1;
8368 queues_left -= pf->num_lan_qps;
8370 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
8371 I40E_FLAG_FD_SB_ENABLED |
8372 I40E_FLAG_FD_ATR_ENABLED |
8373 I40E_FLAG_DCB_ENABLED |
8374 I40E_FLAG_VMDQ_ENABLED);
8376 /* Not enough queues for all TCs */
8377 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
8378 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
8379 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
8380 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
8382 pf->num_lan_qps = pf->rss_size_max;
8383 queues_left -= pf->num_lan_qps;
8386 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8387 if (queues_left > 1) {
8388 queues_left -= 1; /* save 1 queue for FD */
8390 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8391 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
8395 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
8396 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
8397 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
8398 (queues_left / pf->num_vf_qps));
8399 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
8402 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
8403 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
8404 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
8405 (queues_left / pf->num_vmdq_qps));
8406 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
8409 pf->queues_left = queues_left;
8413 * i40e_setup_pf_filter_control - Setup PF static filter control
8414 * @pf: PF to be setup
8416 * i40e_setup_pf_filter_control sets up a pf's initial filter control
8417 * settings. If PE/FCoE are enabled then it will also set the per PF
8418 * based filter sizes required for them. It also enables Flow director,
8419 * ethertype and macvlan type filter settings for the pf.
8421 * Returns 0 on success, negative on failure
8423 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
8425 struct i40e_filter_control_settings *settings = &pf->filter_settings;
8427 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
8429 /* Flow Director is enabled */
8430 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
8431 settings->enable_fdir = true;
8433 /* Ethtype and MACVLAN filters enabled for PF */
8434 settings->enable_ethtype = true;
8435 settings->enable_macvlan = true;
8437 if (i40e_set_filter_control(&pf->hw, settings))
8443 #define INFO_STRING_LEN 255
8444 static void i40e_print_features(struct i40e_pf *pf)
8446 struct i40e_hw *hw = &pf->hw;
8449 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
8451 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
8457 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
8458 #ifdef CONFIG_PCI_IOV
8459 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
8461 buf += sprintf(buf, "VSIs: %d QP: %d ", pf->hw.func_caps.num_vsis,
8462 pf->vsi[pf->lan_vsi]->num_queue_pairs);
8464 if (pf->flags & I40E_FLAG_RSS_ENABLED)
8465 buf += sprintf(buf, "RSS ");
8466 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
8467 buf += sprintf(buf, "FD_ATR ");
8468 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8469 buf += sprintf(buf, "FD_SB ");
8470 buf += sprintf(buf, "NTUPLE ");
8472 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
8473 buf += sprintf(buf, "DCB ");
8474 if (pf->flags & I40E_FLAG_PTP)
8475 buf += sprintf(buf, "PTP ");
8477 BUG_ON(buf > (string + INFO_STRING_LEN));
8478 dev_info(&pf->pdev->dev, "%s\n", string);
8483 * i40e_probe - Device initialization routine
8484 * @pdev: PCI device information struct
8485 * @ent: entry in i40e_pci_tbl
8487 * i40e_probe initializes a pf identified by a pci_dev structure.
8488 * The OS initialization, configuring of the pf private structure,
8489 * and a hardware reset occur.
8491 * Returns 0 on success, negative on failure
8493 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8497 static u16 pfs_found;
8503 err = pci_enable_device_mem(pdev);
8507 /* set up for high or low dma */
8508 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
8510 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
8513 "DMA configuration failed: 0x%x\n", err);
8518 /* set up pci connections */
8519 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
8520 IORESOURCE_MEM), i40e_driver_name);
8522 dev_info(&pdev->dev,
8523 "pci_request_selected_regions failed %d\n", err);
8527 pci_enable_pcie_error_reporting(pdev);
8528 pci_set_master(pdev);
8530 /* Now that we have a PCI connection, we need to do the
8531 * low level device setup. This is primarily setting up
8532 * the Admin Queue structures and then querying for the
8533 * device's current profile information.
8535 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
8542 set_bit(__I40E_DOWN, &pf->state);
8546 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
8547 pci_resource_len(pdev, 0));
8550 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
8551 (unsigned int)pci_resource_start(pdev, 0),
8552 (unsigned int)pci_resource_len(pdev, 0), err);
8555 hw->vendor_id = pdev->vendor;
8556 hw->device_id = pdev->device;
8557 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
8558 hw->subsystem_vendor_id = pdev->subsystem_vendor;
8559 hw->subsystem_device_id = pdev->subsystem_device;
8560 hw->bus.device = PCI_SLOT(pdev->devfn);
8561 hw->bus.func = PCI_FUNC(pdev->devfn);
8562 pf->instance = pfs_found;
8564 /* do a special CORER for clearing PXE mode once at init */
8565 if (hw->revision_id == 0 &&
8566 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
8567 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
8572 i40e_clear_pxe_mode(hw);
8575 /* Reset here to make sure all is clean and to define PF 'n' */
8576 err = i40e_pf_reset(hw);
8578 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
8583 hw->aq.num_arq_entries = I40E_AQ_LEN;
8584 hw->aq.num_asq_entries = I40E_AQ_LEN;
8585 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
8586 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
8587 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
8588 snprintf(pf->misc_int_name, sizeof(pf->misc_int_name) - 1,
8590 dev_driver_string(&pf->pdev->dev), pf->hw.pf_id);
8592 err = i40e_init_shared_code(hw);
8594 dev_info(&pdev->dev, "init_shared_code failed: %d\n", err);
8598 /* set up a default setting for link flow control */
8599 pf->hw.fc.requested_mode = I40E_FC_NONE;
8601 err = i40e_init_adminq(hw);
8602 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
8604 dev_info(&pdev->dev,
8605 "init_adminq failed: %d expecting API %02x.%02x\n",
8607 I40E_FW_API_VERSION_MAJOR, I40E_FW_API_VERSION_MINOR);
8611 i40e_verify_eeprom(pf);
8613 /* Rev 0 hardware was never productized */
8614 if (hw->revision_id < 1)
8615 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
8617 i40e_clear_pxe_mode(hw);
8618 err = i40e_get_capabilities(pf);
8620 goto err_adminq_setup;
8622 err = i40e_sw_init(pf);
8624 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
8628 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
8629 hw->func_caps.num_rx_qp,
8630 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
8632 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
8633 goto err_init_lan_hmc;
8636 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
8638 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
8640 goto err_configure_lan_hmc;
8643 i40e_get_mac_addr(hw, hw->mac.addr);
8644 if (!is_valid_ether_addr(hw->mac.addr)) {
8645 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
8649 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
8650 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
8652 pci_set_drvdata(pdev, pf);
8653 pci_save_state(pdev);
8654 #ifdef CONFIG_I40E_DCB
8655 err = i40e_init_pf_dcb(pf);
8657 dev_info(&pdev->dev, "init_pf_dcb failed: %d\n", err);
8658 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
8659 /* Continue without DCB enabled */
8661 #endif /* CONFIG_I40E_DCB */
8663 /* set up periodic task facility */
8664 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
8665 pf->service_timer_period = HZ;
8667 INIT_WORK(&pf->service_task, i40e_service_task);
8668 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
8669 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
8670 pf->link_check_timeout = jiffies;
8672 /* WoL defaults to disabled */
8674 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
8676 /* set up the main switch operations */
8677 i40e_determine_queue_usage(pf);
8678 i40e_init_interrupt_scheme(pf);
8680 /* The number of VSIs reported by the FW is the minimum guaranteed
8681 * to us; HW supports far more and we share the remaining pool with
8682 * the other PFs. We allocate space for more than the guarantee with
8683 * the understanding that we might not get them all later.
8685 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
8686 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
8688 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
8690 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
8691 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
8692 pf->vsi = kzalloc(len, GFP_KERNEL);
8695 goto err_switch_setup;
8698 err = i40e_setup_pf_switch(pf, false);
8700 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
8703 /* if FDIR VSI was set up, start it now */
8704 for (i = 0; i < pf->num_alloc_vsi; i++) {
8705 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
8706 i40e_vsi_open(pf->vsi[i]);
8711 /* The main driver is (mostly) up and happy. We need to set this state
8712 * before setting up the misc vector or we get a race and the vector
8713 * ends up disabled forever.
8715 clear_bit(__I40E_DOWN, &pf->state);
8717 /* In case of MSIX we are going to setup the misc vector right here
8718 * to handle admin queue events etc. In case of legacy and MSI
8719 * the misc functionality and queue processing is combined in
8720 * the same vector and that gets setup at open.
8722 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
8723 err = i40e_setup_misc_vector(pf);
8725 dev_info(&pdev->dev,
8726 "setup of misc vector failed: %d\n", err);
8731 #ifdef CONFIG_PCI_IOV
8732 /* prep for VF support */
8733 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
8734 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
8735 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
8738 /* disable link interrupts for VFs */
8739 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
8740 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
8741 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
8744 if (pci_num_vf(pdev)) {
8745 dev_info(&pdev->dev,
8746 "Active VFs found, allocating resources.\n");
8747 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
8749 dev_info(&pdev->dev,
8750 "Error %d allocating resources for existing VFs\n",
8754 #endif /* CONFIG_PCI_IOV */
8758 i40e_dbg_pf_init(pf);
8760 /* tell the firmware that we're starting */
8761 i40e_send_version(pf);
8763 /* since everything's happy, start the service_task timer */
8764 mod_timer(&pf->service_timer,
8765 round_jiffies(jiffies + pf->service_timer_period));
8767 /* Get the negotiated link width and speed from PCI config space */
8768 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
8770 i40e_set_pci_config_data(hw, link_status);
8772 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
8773 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
8774 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
8775 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
8777 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
8778 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
8779 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
8780 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
8783 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
8784 hw->bus.speed < i40e_bus_speed_8000) {
8785 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
8786 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
8789 /* print a string summarizing features */
8790 i40e_print_features(pf);
8794 /* Unwind what we've done if something failed in the setup */
8796 set_bit(__I40E_DOWN, &pf->state);
8797 i40e_clear_interrupt_scheme(pf);
8800 i40e_reset_interrupt_capability(pf);
8801 del_timer_sync(&pf->service_timer);
8803 err_configure_lan_hmc:
8804 (void)i40e_shutdown_lan_hmc(hw);
8807 kfree(pf->irq_pile);
8810 (void)i40e_shutdown_adminq(hw);
8812 iounmap(hw->hw_addr);
8816 pci_disable_pcie_error_reporting(pdev);
8817 pci_release_selected_regions(pdev,
8818 pci_select_bars(pdev, IORESOURCE_MEM));
8821 pci_disable_device(pdev);
8826 * i40e_remove - Device removal routine
8827 * @pdev: PCI device information struct
8829 * i40e_remove is called by the PCI subsystem to alert the driver
8830 * that is should release a PCI device. This could be caused by a
8831 * Hot-Plug event, or because the driver is going to be removed from
8834 static void i40e_remove(struct pci_dev *pdev)
8836 struct i40e_pf *pf = pci_get_drvdata(pdev);
8837 i40e_status ret_code;
8841 i40e_dbg_pf_exit(pf);
8845 /* no more scheduling of any task */
8846 set_bit(__I40E_DOWN, &pf->state);
8847 del_timer_sync(&pf->service_timer);
8848 cancel_work_sync(&pf->service_task);
8850 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
8852 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
8855 i40e_fdir_teardown(pf);
8857 /* If there is a switch structure or any orphans, remove them.
8858 * This will leave only the PF's VSI remaining.
8860 for (i = 0; i < I40E_MAX_VEB; i++) {
8864 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
8865 pf->veb[i]->uplink_seid == 0)
8866 i40e_switch_branch_release(pf->veb[i]);
8869 /* Now we can shutdown the PF's VSI, just before we kill
8872 if (pf->vsi[pf->lan_vsi])
8873 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
8875 i40e_stop_misc_vector(pf);
8876 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
8877 synchronize_irq(pf->msix_entries[0].vector);
8878 free_irq(pf->msix_entries[0].vector, pf);
8881 /* shutdown and destroy the HMC */
8882 if (pf->hw.hmc.hmc_obj) {
8883 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
8885 dev_warn(&pdev->dev,
8886 "Failed to destroy the HMC resources: %d\n",
8890 /* shutdown the adminq */
8891 ret_code = i40e_shutdown_adminq(&pf->hw);
8893 dev_warn(&pdev->dev,
8894 "Failed to destroy the Admin Queue resources: %d\n",
8897 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
8898 i40e_clear_interrupt_scheme(pf);
8899 for (i = 0; i < pf->num_alloc_vsi; i++) {
8901 i40e_vsi_clear_rings(pf->vsi[i]);
8902 i40e_vsi_clear(pf->vsi[i]);
8907 for (i = 0; i < I40E_MAX_VEB; i++) {
8913 kfree(pf->irq_pile);
8916 /* force a PF reset to clean anything leftover */
8917 reg = rd32(&pf->hw, I40E_PFGEN_CTRL);
8918 wr32(&pf->hw, I40E_PFGEN_CTRL, (reg | I40E_PFGEN_CTRL_PFSWR_MASK));
8919 i40e_flush(&pf->hw);
8921 iounmap(pf->hw.hw_addr);
8923 pci_release_selected_regions(pdev,
8924 pci_select_bars(pdev, IORESOURCE_MEM));
8926 pci_disable_pcie_error_reporting(pdev);
8927 pci_disable_device(pdev);
8931 * i40e_pci_error_detected - warning that something funky happened in PCI land
8932 * @pdev: PCI device information struct
8934 * Called to warn that something happened and the error handling steps
8935 * are in progress. Allows the driver to quiesce things, be ready for
8938 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
8939 enum pci_channel_state error)
8941 struct i40e_pf *pf = pci_get_drvdata(pdev);
8943 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
8945 /* shutdown all operations */
8946 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
8948 i40e_prep_for_reset(pf);
8952 /* Request a slot reset */
8953 return PCI_ERS_RESULT_NEED_RESET;
8957 * i40e_pci_error_slot_reset - a PCI slot reset just happened
8958 * @pdev: PCI device information struct
8960 * Called to find if the driver can work with the device now that
8961 * the pci slot has been reset. If a basic connection seems good
8962 * (registers are readable and have sane content) then return a
8963 * happy little PCI_ERS_RESULT_xxx.
8965 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
8967 struct i40e_pf *pf = pci_get_drvdata(pdev);
8968 pci_ers_result_t result;
8972 dev_info(&pdev->dev, "%s\n", __func__);
8973 if (pci_enable_device_mem(pdev)) {
8974 dev_info(&pdev->dev,
8975 "Cannot re-enable PCI device after reset.\n");
8976 result = PCI_ERS_RESULT_DISCONNECT;
8978 pci_set_master(pdev);
8979 pci_restore_state(pdev);
8980 pci_save_state(pdev);
8981 pci_wake_from_d3(pdev, false);
8983 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
8985 result = PCI_ERS_RESULT_RECOVERED;
8987 result = PCI_ERS_RESULT_DISCONNECT;
8990 err = pci_cleanup_aer_uncorrect_error_status(pdev);
8992 dev_info(&pdev->dev,
8993 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
8995 /* non-fatal, continue */
9002 * i40e_pci_error_resume - restart operations after PCI error recovery
9003 * @pdev: PCI device information struct
9005 * Called to allow the driver to bring things back up after PCI error
9006 * and/or reset recovery has finished.
9008 static void i40e_pci_error_resume(struct pci_dev *pdev)
9010 struct i40e_pf *pf = pci_get_drvdata(pdev);
9012 dev_info(&pdev->dev, "%s\n", __func__);
9013 if (test_bit(__I40E_SUSPENDED, &pf->state))
9017 i40e_handle_reset_warning(pf);
9022 * i40e_shutdown - PCI callback for shutting down
9023 * @pdev: PCI device information struct
9025 static void i40e_shutdown(struct pci_dev *pdev)
9027 struct i40e_pf *pf = pci_get_drvdata(pdev);
9028 struct i40e_hw *hw = &pf->hw;
9030 set_bit(__I40E_SUSPENDED, &pf->state);
9031 set_bit(__I40E_DOWN, &pf->state);
9033 i40e_prep_for_reset(pf);
9036 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
9037 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
9039 if (system_state == SYSTEM_POWER_OFF) {
9040 pci_wake_from_d3(pdev, pf->wol_en);
9041 pci_set_power_state(pdev, PCI_D3hot);
9047 * i40e_suspend - PCI callback for moving to D3
9048 * @pdev: PCI device information struct
9050 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
9052 struct i40e_pf *pf = pci_get_drvdata(pdev);
9053 struct i40e_hw *hw = &pf->hw;
9055 set_bit(__I40E_SUSPENDED, &pf->state);
9056 set_bit(__I40E_DOWN, &pf->state);
9058 i40e_prep_for_reset(pf);
9061 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
9062 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
9064 pci_wake_from_d3(pdev, pf->wol_en);
9065 pci_set_power_state(pdev, PCI_D3hot);
9071 * i40e_resume - PCI callback for waking up from D3
9072 * @pdev: PCI device information struct
9074 static int i40e_resume(struct pci_dev *pdev)
9076 struct i40e_pf *pf = pci_get_drvdata(pdev);
9079 pci_set_power_state(pdev, PCI_D0);
9080 pci_restore_state(pdev);
9081 /* pci_restore_state() clears dev->state_saves, so
9082 * call pci_save_state() again to restore it.
9084 pci_save_state(pdev);
9086 err = pci_enable_device_mem(pdev);
9089 "%s: Cannot enable PCI device from suspend\n",
9093 pci_set_master(pdev);
9095 /* no wakeup events while running */
9096 pci_wake_from_d3(pdev, false);
9098 /* handling the reset will rebuild the device state */
9099 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
9100 clear_bit(__I40E_DOWN, &pf->state);
9102 i40e_reset_and_rebuild(pf, false);
9110 static const struct pci_error_handlers i40e_err_handler = {
9111 .error_detected = i40e_pci_error_detected,
9112 .slot_reset = i40e_pci_error_slot_reset,
9113 .resume = i40e_pci_error_resume,
9116 static struct pci_driver i40e_driver = {
9117 .name = i40e_driver_name,
9118 .id_table = i40e_pci_tbl,
9119 .probe = i40e_probe,
9120 .remove = i40e_remove,
9122 .suspend = i40e_suspend,
9123 .resume = i40e_resume,
9125 .shutdown = i40e_shutdown,
9126 .err_handler = &i40e_err_handler,
9127 .sriov_configure = i40e_pci_sriov_configure,
9131 * i40e_init_module - Driver registration routine
9133 * i40e_init_module is the first routine called when the driver is
9134 * loaded. All it does is register with the PCI subsystem.
9136 static int __init i40e_init_module(void)
9138 pr_info("%s: %s - version %s\n", i40e_driver_name,
9139 i40e_driver_string, i40e_driver_version_str);
9140 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
9142 return pci_register_driver(&i40e_driver);
9144 module_init(i40e_init_module);
9147 * i40e_exit_module - Driver exit cleanup routine
9149 * i40e_exit_module is called just before the driver is removed
9152 static void __exit i40e_exit_module(void)
9154 pci_unregister_driver(&i40e_driver);
9157 module_exit(i40e_exit_module);