1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 3
42 #define DRV_VERSION_BUILD 6
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
61 /* i40e_pci_tbl - PCI Device ID Table
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
82 /* required last entry */
85 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
87 #define I40E_MAX_VF_COUNT 128
88 static int debug = -1;
89 module_param(debug, int, 0);
90 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
92 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
93 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
94 MODULE_LICENSE("GPL");
95 MODULE_VERSION(DRV_VERSION);
98 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
99 * @hw: pointer to the HW structure
100 * @mem: ptr to mem struct to fill out
101 * @size: size of memory requested
102 * @alignment: what to align the allocation to
104 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
105 u64 size, u32 alignment)
107 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
109 mem->size = ALIGN(size, alignment);
110 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
111 &mem->pa, GFP_KERNEL);
119 * i40e_free_dma_mem_d - OS specific memory free for shared code
120 * @hw: pointer to the HW structure
121 * @mem: ptr to mem struct to free
123 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
125 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
127 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
136 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
137 * @hw: pointer to the HW structure
138 * @mem: ptr to mem struct to fill out
139 * @size: size of memory requested
141 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
145 mem->va = kzalloc(size, GFP_KERNEL);
154 * i40e_free_virt_mem_d - OS specific memory free for shared code
155 * @hw: pointer to the HW structure
156 * @mem: ptr to mem struct to free
158 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
160 /* it's ok to kfree a NULL pointer */
169 * i40e_get_lump - find a lump of free generic resource
170 * @pf: board private structure
171 * @pile: the pile of resource to search
172 * @needed: the number of items needed
173 * @id: an owner id to stick on the items assigned
175 * Returns the base item index of the lump, or negative for error
177 * The search_hint trick and lack of advanced fit-finding only work
178 * because we're highly likely to have all the same size lump requests.
179 * Linear search time and any fragmentation should be minimal.
181 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
187 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
188 dev_info(&pf->pdev->dev,
189 "param err: pile=%p needed=%d id=0x%04x\n",
194 /* start the linear search with an imperfect hint */
195 i = pile->search_hint;
196 while (i < pile->num_entries) {
197 /* skip already allocated entries */
198 if (pile->list[i] & I40E_PILE_VALID_BIT) {
203 /* do we have enough in this lump? */
204 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
205 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
210 /* there was enough, so assign it to the requestor */
211 for (j = 0; j < needed; j++)
212 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
214 pile->search_hint = i + j;
217 /* not enough, so skip over it and continue looking */
226 * i40e_put_lump - return a lump of generic resource
227 * @pile: the pile of resource to search
228 * @index: the base item index
229 * @id: the owner id of the items assigned
231 * Returns the count of items in the lump
233 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
235 int valid_id = (id | I40E_PILE_VALID_BIT);
239 if (!pile || index >= pile->num_entries)
243 i < pile->num_entries && pile->list[i] == valid_id;
249 if (count && index < pile->search_hint)
250 pile->search_hint = index;
256 * i40e_find_vsi_from_id - searches for the vsi with the given id
257 * @pf - the pf structure to search for the vsi
258 * @id - id of the vsi it is searching for
260 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
264 for (i = 0; i < pf->num_alloc_vsi; i++)
265 if (pf->vsi[i] && (pf->vsi[i]->id == id))
272 * i40e_service_event_schedule - Schedule the service task to wake up
273 * @pf: board private structure
275 * If not already scheduled, this puts the task into the work queue
277 static void i40e_service_event_schedule(struct i40e_pf *pf)
279 if (!test_bit(__I40E_DOWN, &pf->state) &&
280 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
281 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
282 schedule_work(&pf->service_task);
286 * i40e_tx_timeout - Respond to a Tx Hang
287 * @netdev: network interface device structure
289 * If any port has noticed a Tx timeout, it is likely that the whole
290 * device is munged, not just the one netdev port, so go for the full
294 void i40e_tx_timeout(struct net_device *netdev)
296 static void i40e_tx_timeout(struct net_device *netdev)
299 struct i40e_netdev_priv *np = netdev_priv(netdev);
300 struct i40e_vsi *vsi = np->vsi;
301 struct i40e_pf *pf = vsi->back;
303 pf->tx_timeout_count++;
305 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
306 pf->tx_timeout_recovery_level = 1;
307 pf->tx_timeout_last_recovery = jiffies;
308 netdev_info(netdev, "tx_timeout recovery level %d\n",
309 pf->tx_timeout_recovery_level);
311 switch (pf->tx_timeout_recovery_level) {
313 /* disable and re-enable queues for the VSI */
314 if (in_interrupt()) {
315 set_bit(__I40E_REINIT_REQUESTED, &pf->state);
316 set_bit(__I40E_REINIT_REQUESTED, &vsi->state);
318 i40e_vsi_reinit_locked(vsi);
322 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
325 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
328 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
331 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
332 set_bit(__I40E_DOWN_REQUESTED, &pf->state);
333 set_bit(__I40E_DOWN_REQUESTED, &vsi->state);
336 i40e_service_event_schedule(pf);
337 pf->tx_timeout_recovery_level++;
341 * i40e_release_rx_desc - Store the new tail and head values
342 * @rx_ring: ring to bump
343 * @val: new head index
345 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
347 rx_ring->next_to_use = val;
349 /* Force memory writes to complete before letting h/w
350 * know there are new descriptors to fetch. (Only
351 * applicable for weak-ordered memory model archs,
355 writel(val, rx_ring->tail);
359 * i40e_get_vsi_stats_struct - Get System Network Statistics
360 * @vsi: the VSI we care about
362 * Returns the address of the device statistics structure.
363 * The statistics are actually updated from the service task.
365 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
367 return &vsi->net_stats;
371 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
372 * @netdev: network interface device structure
374 * Returns the address of the device statistics structure.
375 * The statistics are actually updated from the service task.
378 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
379 struct net_device *netdev,
380 struct rtnl_link_stats64 *stats)
382 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
383 struct net_device *netdev,
384 struct rtnl_link_stats64 *stats)
387 struct i40e_netdev_priv *np = netdev_priv(netdev);
388 struct i40e_ring *tx_ring, *rx_ring;
389 struct i40e_vsi *vsi = np->vsi;
390 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
393 if (test_bit(__I40E_DOWN, &vsi->state))
400 for (i = 0; i < vsi->num_queue_pairs; i++) {
404 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
409 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
410 packets = tx_ring->stats.packets;
411 bytes = tx_ring->stats.bytes;
412 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
414 stats->tx_packets += packets;
415 stats->tx_bytes += bytes;
416 rx_ring = &tx_ring[1];
419 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
420 packets = rx_ring->stats.packets;
421 bytes = rx_ring->stats.bytes;
422 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
424 stats->rx_packets += packets;
425 stats->rx_bytes += bytes;
429 /* following stats updated by i40e_watchdog_subtask() */
430 stats->multicast = vsi_stats->multicast;
431 stats->tx_errors = vsi_stats->tx_errors;
432 stats->tx_dropped = vsi_stats->tx_dropped;
433 stats->rx_errors = vsi_stats->rx_errors;
434 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
435 stats->rx_length_errors = vsi_stats->rx_length_errors;
441 * i40e_vsi_reset_stats - Resets all stats of the given vsi
442 * @vsi: the VSI to have its stats reset
444 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
446 struct rtnl_link_stats64 *ns;
452 ns = i40e_get_vsi_stats_struct(vsi);
453 memset(ns, 0, sizeof(*ns));
454 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
455 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
456 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
457 if (vsi->rx_rings && vsi->rx_rings[0]) {
458 for (i = 0; i < vsi->num_queue_pairs; i++) {
459 memset(&vsi->rx_rings[i]->stats, 0 ,
460 sizeof(vsi->rx_rings[i]->stats));
461 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
462 sizeof(vsi->rx_rings[i]->rx_stats));
463 memset(&vsi->tx_rings[i]->stats, 0 ,
464 sizeof(vsi->tx_rings[i]->stats));
465 memset(&vsi->tx_rings[i]->tx_stats, 0,
466 sizeof(vsi->tx_rings[i]->tx_stats));
469 vsi->stat_offsets_loaded = false;
473 * i40e_pf_reset_stats - Reset all of the stats for the given PF
474 * @pf: the PF to be reset
476 void i40e_pf_reset_stats(struct i40e_pf *pf)
480 memset(&pf->stats, 0, sizeof(pf->stats));
481 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
482 pf->stat_offsets_loaded = false;
484 for (i = 0; i < I40E_MAX_VEB; i++) {
486 memset(&pf->veb[i]->stats, 0,
487 sizeof(pf->veb[i]->stats));
488 memset(&pf->veb[i]->stats_offsets, 0,
489 sizeof(pf->veb[i]->stats_offsets));
490 pf->veb[i]->stat_offsets_loaded = false;
496 * i40e_stat_update48 - read and update a 48 bit stat from the chip
497 * @hw: ptr to the hardware info
498 * @hireg: the high 32 bit reg to read
499 * @loreg: the low 32 bit reg to read
500 * @offset_loaded: has the initial offset been loaded yet
501 * @offset: ptr to current offset value
502 * @stat: ptr to the stat
504 * Since the device stats are not reset at PFReset, they likely will not
505 * be zeroed when the driver starts. We'll save the first values read
506 * and use them as offsets to be subtracted from the raw values in order
507 * to report stats that count from zero. In the process, we also manage
508 * the potential roll-over.
510 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
511 bool offset_loaded, u64 *offset, u64 *stat)
515 if (hw->device_id == I40E_DEV_ID_QEMU) {
516 new_data = rd32(hw, loreg);
517 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
519 new_data = rd64(hw, loreg);
523 if (likely(new_data >= *offset))
524 *stat = new_data - *offset;
526 *stat = (new_data + BIT_ULL(48)) - *offset;
527 *stat &= 0xFFFFFFFFFFFFULL;
531 * i40e_stat_update32 - read and update a 32 bit stat from the chip
532 * @hw: ptr to the hardware info
533 * @reg: the hw reg to read
534 * @offset_loaded: has the initial offset been loaded yet
535 * @offset: ptr to current offset value
536 * @stat: ptr to the stat
538 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
539 bool offset_loaded, u64 *offset, u64 *stat)
543 new_data = rd32(hw, reg);
546 if (likely(new_data >= *offset))
547 *stat = (u32)(new_data - *offset);
549 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
553 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
554 * @vsi: the VSI to be updated
556 void i40e_update_eth_stats(struct i40e_vsi *vsi)
558 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
559 struct i40e_pf *pf = vsi->back;
560 struct i40e_hw *hw = &pf->hw;
561 struct i40e_eth_stats *oes;
562 struct i40e_eth_stats *es; /* device's eth stats */
564 es = &vsi->eth_stats;
565 oes = &vsi->eth_stats_offsets;
567 /* Gather up the stats that the hw collects */
568 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
569 vsi->stat_offsets_loaded,
570 &oes->tx_errors, &es->tx_errors);
571 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
572 vsi->stat_offsets_loaded,
573 &oes->rx_discards, &es->rx_discards);
574 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
575 vsi->stat_offsets_loaded,
576 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
577 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
578 vsi->stat_offsets_loaded,
579 &oes->tx_errors, &es->tx_errors);
581 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
582 I40E_GLV_GORCL(stat_idx),
583 vsi->stat_offsets_loaded,
584 &oes->rx_bytes, &es->rx_bytes);
585 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
586 I40E_GLV_UPRCL(stat_idx),
587 vsi->stat_offsets_loaded,
588 &oes->rx_unicast, &es->rx_unicast);
589 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
590 I40E_GLV_MPRCL(stat_idx),
591 vsi->stat_offsets_loaded,
592 &oes->rx_multicast, &es->rx_multicast);
593 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
594 I40E_GLV_BPRCL(stat_idx),
595 vsi->stat_offsets_loaded,
596 &oes->rx_broadcast, &es->rx_broadcast);
598 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
599 I40E_GLV_GOTCL(stat_idx),
600 vsi->stat_offsets_loaded,
601 &oes->tx_bytes, &es->tx_bytes);
602 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
603 I40E_GLV_UPTCL(stat_idx),
604 vsi->stat_offsets_loaded,
605 &oes->tx_unicast, &es->tx_unicast);
606 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
607 I40E_GLV_MPTCL(stat_idx),
608 vsi->stat_offsets_loaded,
609 &oes->tx_multicast, &es->tx_multicast);
610 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
611 I40E_GLV_BPTCL(stat_idx),
612 vsi->stat_offsets_loaded,
613 &oes->tx_broadcast, &es->tx_broadcast);
614 vsi->stat_offsets_loaded = true;
618 * i40e_update_veb_stats - Update Switch component statistics
619 * @veb: the VEB being updated
621 static void i40e_update_veb_stats(struct i40e_veb *veb)
623 struct i40e_pf *pf = veb->pf;
624 struct i40e_hw *hw = &pf->hw;
625 struct i40e_eth_stats *oes;
626 struct i40e_eth_stats *es; /* device's eth stats */
629 idx = veb->stats_idx;
631 oes = &veb->stats_offsets;
633 /* Gather up the stats that the hw collects */
634 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
635 veb->stat_offsets_loaded,
636 &oes->tx_discards, &es->tx_discards);
637 if (hw->revision_id > 0)
638 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
639 veb->stat_offsets_loaded,
640 &oes->rx_unknown_protocol,
641 &es->rx_unknown_protocol);
642 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
643 veb->stat_offsets_loaded,
644 &oes->rx_bytes, &es->rx_bytes);
645 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
646 veb->stat_offsets_loaded,
647 &oes->rx_unicast, &es->rx_unicast);
648 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
649 veb->stat_offsets_loaded,
650 &oes->rx_multicast, &es->rx_multicast);
651 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
652 veb->stat_offsets_loaded,
653 &oes->rx_broadcast, &es->rx_broadcast);
655 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
656 veb->stat_offsets_loaded,
657 &oes->tx_bytes, &es->tx_bytes);
658 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
659 veb->stat_offsets_loaded,
660 &oes->tx_unicast, &es->tx_unicast);
661 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
662 veb->stat_offsets_loaded,
663 &oes->tx_multicast, &es->tx_multicast);
664 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
665 veb->stat_offsets_loaded,
666 &oes->tx_broadcast, &es->tx_broadcast);
667 veb->stat_offsets_loaded = true;
672 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
673 * @vsi: the VSI that is capable of doing FCoE
675 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
677 struct i40e_pf *pf = vsi->back;
678 struct i40e_hw *hw = &pf->hw;
679 struct i40e_fcoe_stats *ofs;
680 struct i40e_fcoe_stats *fs; /* device's eth stats */
683 if (vsi->type != I40E_VSI_FCOE)
686 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
687 fs = &vsi->fcoe_stats;
688 ofs = &vsi->fcoe_stats_offsets;
690 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
691 vsi->fcoe_stat_offsets_loaded,
692 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
693 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
694 vsi->fcoe_stat_offsets_loaded,
695 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
696 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
697 vsi->fcoe_stat_offsets_loaded,
698 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
699 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
700 vsi->fcoe_stat_offsets_loaded,
701 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
702 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
703 vsi->fcoe_stat_offsets_loaded,
704 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
705 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
706 vsi->fcoe_stat_offsets_loaded,
707 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
708 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
709 vsi->fcoe_stat_offsets_loaded,
710 &ofs->fcoe_last_error, &fs->fcoe_last_error);
711 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
712 vsi->fcoe_stat_offsets_loaded,
713 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
715 vsi->fcoe_stat_offsets_loaded = true;
720 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
721 * @pf: the corresponding PF
723 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
725 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
727 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
728 struct i40e_hw_port_stats *nsd = &pf->stats;
729 struct i40e_hw *hw = &pf->hw;
733 if ((hw->fc.current_mode != I40E_FC_FULL) &&
734 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
737 xoff = nsd->link_xoff_rx;
738 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
739 pf->stat_offsets_loaded,
740 &osd->link_xoff_rx, &nsd->link_xoff_rx);
742 /* No new LFC xoff rx */
743 if (!(nsd->link_xoff_rx - xoff))
746 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */
747 for (v = 0; v < pf->num_alloc_vsi; v++) {
748 struct i40e_vsi *vsi = pf->vsi[v];
750 if (!vsi || !vsi->tx_rings[0])
753 for (i = 0; i < vsi->num_queue_pairs; i++) {
754 struct i40e_ring *ring = vsi->tx_rings[i];
755 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
761 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
762 * @pf: the corresponding PF
764 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
766 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
768 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
769 struct i40e_hw_port_stats *nsd = &pf->stats;
770 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
771 struct i40e_dcbx_config *dcb_cfg;
772 struct i40e_hw *hw = &pf->hw;
776 dcb_cfg = &hw->local_dcbx_config;
778 /* Collect Link XOFF stats when PFC is disabled */
779 if (!dcb_cfg->pfc.pfcenable) {
780 i40e_update_link_xoff_rx(pf);
784 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
785 u64 prio_xoff = nsd->priority_xoff_rx[i];
786 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
787 pf->stat_offsets_loaded,
788 &osd->priority_xoff_rx[i],
789 &nsd->priority_xoff_rx[i]);
791 /* No new PFC xoff rx */
792 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
794 /* Get the TC for given priority */
795 tc = dcb_cfg->etscfg.prioritytable[i];
799 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */
800 for (v = 0; v < pf->num_alloc_vsi; v++) {
801 struct i40e_vsi *vsi = pf->vsi[v];
803 if (!vsi || !vsi->tx_rings[0])
806 for (i = 0; i < vsi->num_queue_pairs; i++) {
807 struct i40e_ring *ring = vsi->tx_rings[i];
811 clear_bit(__I40E_HANG_CHECK_ARMED,
818 * i40e_update_vsi_stats - Update the vsi statistics counters.
819 * @vsi: the VSI to be updated
821 * There are a few instances where we store the same stat in a
822 * couple of different structs. This is partly because we have
823 * the netdev stats that need to be filled out, which is slightly
824 * different from the "eth_stats" defined by the chip and used in
825 * VF communications. We sort it out here.
827 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
829 struct i40e_pf *pf = vsi->back;
830 struct rtnl_link_stats64 *ons;
831 struct rtnl_link_stats64 *ns; /* netdev stats */
832 struct i40e_eth_stats *oes;
833 struct i40e_eth_stats *es; /* device's eth stats */
834 u32 tx_restart, tx_busy;
843 if (test_bit(__I40E_DOWN, &vsi->state) ||
844 test_bit(__I40E_CONFIG_BUSY, &pf->state))
847 ns = i40e_get_vsi_stats_struct(vsi);
848 ons = &vsi->net_stats_offsets;
849 es = &vsi->eth_stats;
850 oes = &vsi->eth_stats_offsets;
852 /* Gather up the netdev and vsi stats that the driver collects
853 * on the fly during packet processing
857 tx_restart = tx_busy = 0;
861 for (q = 0; q < vsi->num_queue_pairs; q++) {
863 p = ACCESS_ONCE(vsi->tx_rings[q]);
866 start = u64_stats_fetch_begin_irq(&p->syncp);
867 packets = p->stats.packets;
868 bytes = p->stats.bytes;
869 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
872 tx_restart += p->tx_stats.restart_queue;
873 tx_busy += p->tx_stats.tx_busy;
875 /* Rx queue is part of the same block as Tx queue */
878 start = u64_stats_fetch_begin_irq(&p->syncp);
879 packets = p->stats.packets;
880 bytes = p->stats.bytes;
881 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
884 rx_buf += p->rx_stats.alloc_buff_failed;
885 rx_page += p->rx_stats.alloc_page_failed;
888 vsi->tx_restart = tx_restart;
889 vsi->tx_busy = tx_busy;
890 vsi->rx_page_failed = rx_page;
891 vsi->rx_buf_failed = rx_buf;
893 ns->rx_packets = rx_p;
895 ns->tx_packets = tx_p;
898 /* update netdev stats from eth stats */
899 i40e_update_eth_stats(vsi);
900 ons->tx_errors = oes->tx_errors;
901 ns->tx_errors = es->tx_errors;
902 ons->multicast = oes->rx_multicast;
903 ns->multicast = es->rx_multicast;
904 ons->rx_dropped = oes->rx_discards;
905 ns->rx_dropped = es->rx_discards;
906 ons->tx_dropped = oes->tx_discards;
907 ns->tx_dropped = es->tx_discards;
909 /* pull in a couple PF stats if this is the main vsi */
910 if (vsi == pf->vsi[pf->lan_vsi]) {
911 ns->rx_crc_errors = pf->stats.crc_errors;
912 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
913 ns->rx_length_errors = pf->stats.rx_length_errors;
918 * i40e_update_pf_stats - Update the PF statistics counters.
919 * @pf: the PF to be updated
921 static void i40e_update_pf_stats(struct i40e_pf *pf)
923 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
924 struct i40e_hw_port_stats *nsd = &pf->stats;
925 struct i40e_hw *hw = &pf->hw;
929 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
930 I40E_GLPRT_GORCL(hw->port),
931 pf->stat_offsets_loaded,
932 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
933 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
934 I40E_GLPRT_GOTCL(hw->port),
935 pf->stat_offsets_loaded,
936 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
937 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
938 pf->stat_offsets_loaded,
939 &osd->eth.rx_discards,
940 &nsd->eth.rx_discards);
941 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
942 I40E_GLPRT_UPRCL(hw->port),
943 pf->stat_offsets_loaded,
944 &osd->eth.rx_unicast,
945 &nsd->eth.rx_unicast);
946 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
947 I40E_GLPRT_MPRCL(hw->port),
948 pf->stat_offsets_loaded,
949 &osd->eth.rx_multicast,
950 &nsd->eth.rx_multicast);
951 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
952 I40E_GLPRT_BPRCL(hw->port),
953 pf->stat_offsets_loaded,
954 &osd->eth.rx_broadcast,
955 &nsd->eth.rx_broadcast);
956 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
957 I40E_GLPRT_UPTCL(hw->port),
958 pf->stat_offsets_loaded,
959 &osd->eth.tx_unicast,
960 &nsd->eth.tx_unicast);
961 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
962 I40E_GLPRT_MPTCL(hw->port),
963 pf->stat_offsets_loaded,
964 &osd->eth.tx_multicast,
965 &nsd->eth.tx_multicast);
966 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
967 I40E_GLPRT_BPTCL(hw->port),
968 pf->stat_offsets_loaded,
969 &osd->eth.tx_broadcast,
970 &nsd->eth.tx_broadcast);
972 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
973 pf->stat_offsets_loaded,
974 &osd->tx_dropped_link_down,
975 &nsd->tx_dropped_link_down);
977 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
978 pf->stat_offsets_loaded,
979 &osd->crc_errors, &nsd->crc_errors);
981 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
982 pf->stat_offsets_loaded,
983 &osd->illegal_bytes, &nsd->illegal_bytes);
985 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
986 pf->stat_offsets_loaded,
987 &osd->mac_local_faults,
988 &nsd->mac_local_faults);
989 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
990 pf->stat_offsets_loaded,
991 &osd->mac_remote_faults,
992 &nsd->mac_remote_faults);
994 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
995 pf->stat_offsets_loaded,
996 &osd->rx_length_errors,
997 &nsd->rx_length_errors);
999 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1000 pf->stat_offsets_loaded,
1001 &osd->link_xon_rx, &nsd->link_xon_rx);
1002 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1003 pf->stat_offsets_loaded,
1004 &osd->link_xon_tx, &nsd->link_xon_tx);
1005 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
1006 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1007 pf->stat_offsets_loaded,
1008 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1010 for (i = 0; i < 8; i++) {
1011 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1012 pf->stat_offsets_loaded,
1013 &osd->priority_xon_rx[i],
1014 &nsd->priority_xon_rx[i]);
1015 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1016 pf->stat_offsets_loaded,
1017 &osd->priority_xon_tx[i],
1018 &nsd->priority_xon_tx[i]);
1019 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1020 pf->stat_offsets_loaded,
1021 &osd->priority_xoff_tx[i],
1022 &nsd->priority_xoff_tx[i]);
1023 i40e_stat_update32(hw,
1024 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1025 pf->stat_offsets_loaded,
1026 &osd->priority_xon_2_xoff[i],
1027 &nsd->priority_xon_2_xoff[i]);
1030 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1031 I40E_GLPRT_PRC64L(hw->port),
1032 pf->stat_offsets_loaded,
1033 &osd->rx_size_64, &nsd->rx_size_64);
1034 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1035 I40E_GLPRT_PRC127L(hw->port),
1036 pf->stat_offsets_loaded,
1037 &osd->rx_size_127, &nsd->rx_size_127);
1038 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1039 I40E_GLPRT_PRC255L(hw->port),
1040 pf->stat_offsets_loaded,
1041 &osd->rx_size_255, &nsd->rx_size_255);
1042 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1043 I40E_GLPRT_PRC511L(hw->port),
1044 pf->stat_offsets_loaded,
1045 &osd->rx_size_511, &nsd->rx_size_511);
1046 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1047 I40E_GLPRT_PRC1023L(hw->port),
1048 pf->stat_offsets_loaded,
1049 &osd->rx_size_1023, &nsd->rx_size_1023);
1050 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1051 I40E_GLPRT_PRC1522L(hw->port),
1052 pf->stat_offsets_loaded,
1053 &osd->rx_size_1522, &nsd->rx_size_1522);
1054 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1055 I40E_GLPRT_PRC9522L(hw->port),
1056 pf->stat_offsets_loaded,
1057 &osd->rx_size_big, &nsd->rx_size_big);
1059 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1060 I40E_GLPRT_PTC64L(hw->port),
1061 pf->stat_offsets_loaded,
1062 &osd->tx_size_64, &nsd->tx_size_64);
1063 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1064 I40E_GLPRT_PTC127L(hw->port),
1065 pf->stat_offsets_loaded,
1066 &osd->tx_size_127, &nsd->tx_size_127);
1067 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1068 I40E_GLPRT_PTC255L(hw->port),
1069 pf->stat_offsets_loaded,
1070 &osd->tx_size_255, &nsd->tx_size_255);
1071 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1072 I40E_GLPRT_PTC511L(hw->port),
1073 pf->stat_offsets_loaded,
1074 &osd->tx_size_511, &nsd->tx_size_511);
1075 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1076 I40E_GLPRT_PTC1023L(hw->port),
1077 pf->stat_offsets_loaded,
1078 &osd->tx_size_1023, &nsd->tx_size_1023);
1079 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1080 I40E_GLPRT_PTC1522L(hw->port),
1081 pf->stat_offsets_loaded,
1082 &osd->tx_size_1522, &nsd->tx_size_1522);
1083 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1084 I40E_GLPRT_PTC9522L(hw->port),
1085 pf->stat_offsets_loaded,
1086 &osd->tx_size_big, &nsd->tx_size_big);
1088 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1089 pf->stat_offsets_loaded,
1090 &osd->rx_undersize, &nsd->rx_undersize);
1091 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1092 pf->stat_offsets_loaded,
1093 &osd->rx_fragments, &nsd->rx_fragments);
1094 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1095 pf->stat_offsets_loaded,
1096 &osd->rx_oversize, &nsd->rx_oversize);
1097 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1098 pf->stat_offsets_loaded,
1099 &osd->rx_jabber, &nsd->rx_jabber);
1102 i40e_stat_update32(hw,
1103 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1104 pf->stat_offsets_loaded,
1105 &osd->fd_atr_match, &nsd->fd_atr_match);
1106 i40e_stat_update32(hw,
1107 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1108 pf->stat_offsets_loaded,
1109 &osd->fd_sb_match, &nsd->fd_sb_match);
1110 i40e_stat_update32(hw,
1111 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1112 pf->stat_offsets_loaded,
1113 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1115 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1116 nsd->tx_lpi_status =
1117 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1118 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1119 nsd->rx_lpi_status =
1120 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1121 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1122 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1123 pf->stat_offsets_loaded,
1124 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1125 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1126 pf->stat_offsets_loaded,
1127 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1129 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1130 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1131 nsd->fd_sb_status = true;
1133 nsd->fd_sb_status = false;
1135 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1136 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1137 nsd->fd_atr_status = true;
1139 nsd->fd_atr_status = false;
1141 pf->stat_offsets_loaded = true;
1145 * i40e_update_stats - Update the various statistics counters.
1146 * @vsi: the VSI to be updated
1148 * Update the various stats for this VSI and its related entities.
1150 void i40e_update_stats(struct i40e_vsi *vsi)
1152 struct i40e_pf *pf = vsi->back;
1154 if (vsi == pf->vsi[pf->lan_vsi])
1155 i40e_update_pf_stats(pf);
1157 i40e_update_vsi_stats(vsi);
1159 i40e_update_fcoe_stats(vsi);
1164 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1165 * @vsi: the VSI to be searched
1166 * @macaddr: the MAC address
1168 * @is_vf: make sure its a VF filter, else doesn't matter
1169 * @is_netdev: make sure its a netdev filter, else doesn't matter
1171 * Returns ptr to the filter object or NULL
1173 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1174 u8 *macaddr, s16 vlan,
1175 bool is_vf, bool is_netdev)
1177 struct i40e_mac_filter *f;
1179 if (!vsi || !macaddr)
1182 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1183 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1184 (vlan == f->vlan) &&
1185 (!is_vf || f->is_vf) &&
1186 (!is_netdev || f->is_netdev))
1193 * i40e_find_mac - Find a mac addr in the macvlan filters list
1194 * @vsi: the VSI to be searched
1195 * @macaddr: the MAC address we are searching for
1196 * @is_vf: make sure its a VF filter, else doesn't matter
1197 * @is_netdev: make sure its a netdev filter, else doesn't matter
1199 * Returns the first filter with the provided MAC address or NULL if
1200 * MAC address was not found
1202 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1203 bool is_vf, bool is_netdev)
1205 struct i40e_mac_filter *f;
1207 if (!vsi || !macaddr)
1210 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1211 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1212 (!is_vf || f->is_vf) &&
1213 (!is_netdev || f->is_netdev))
1220 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1221 * @vsi: the VSI to be searched
1223 * Returns true if VSI is in vlan mode or false otherwise
1225 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1227 struct i40e_mac_filter *f;
1229 /* Only -1 for all the filters denotes not in vlan mode
1230 * so we have to go through all the list in order to make sure
1232 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1241 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1242 * @vsi: the VSI to be searched
1243 * @macaddr: the mac address to be filtered
1244 * @is_vf: true if it is a VF
1245 * @is_netdev: true if it is a netdev
1247 * Goes through all the macvlan filters and adds a
1248 * macvlan filter for each unique vlan that already exists
1250 * Returns first filter found on success, else NULL
1252 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1253 bool is_vf, bool is_netdev)
1255 struct i40e_mac_filter *f;
1257 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1259 f->vlan = le16_to_cpu(vsi->info.pvid);
1260 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1261 is_vf, is_netdev)) {
1262 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1268 return list_first_entry_or_null(&vsi->mac_filter_list,
1269 struct i40e_mac_filter, list);
1273 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1274 * @vsi: the PF Main VSI - inappropriate for any other VSI
1275 * @macaddr: the MAC address
1277 * Some older firmware configurations set up a default promiscuous VLAN
1278 * filter that needs to be removed.
1280 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1282 struct i40e_aqc_remove_macvlan_element_data element;
1283 struct i40e_pf *pf = vsi->back;
1286 /* Only appropriate for the PF main VSI */
1287 if (vsi->type != I40E_VSI_MAIN)
1290 memset(&element, 0, sizeof(element));
1291 ether_addr_copy(element.mac_addr, macaddr);
1292 element.vlan_tag = 0;
1293 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1294 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1295 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1303 * i40e_add_filter - Add a mac/vlan filter to the VSI
1304 * @vsi: the VSI to be searched
1305 * @macaddr: the MAC address
1307 * @is_vf: make sure its a VF filter, else doesn't matter
1308 * @is_netdev: make sure its a netdev filter, else doesn't matter
1310 * Returns ptr to the filter object or NULL when no memory available.
1312 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1313 u8 *macaddr, s16 vlan,
1314 bool is_vf, bool is_netdev)
1316 struct i40e_mac_filter *f;
1318 if (!vsi || !macaddr)
1321 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1323 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1325 goto add_filter_out;
1327 ether_addr_copy(f->macaddr, macaddr);
1331 INIT_LIST_HEAD(&f->list);
1332 list_add(&f->list, &vsi->mac_filter_list);
1335 /* increment counter and add a new flag if needed */
1341 } else if (is_netdev) {
1342 if (!f->is_netdev) {
1343 f->is_netdev = true;
1350 /* changed tells sync_filters_subtask to
1351 * push the filter down to the firmware
1354 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1355 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1363 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1364 * @vsi: the VSI to be searched
1365 * @macaddr: the MAC address
1367 * @is_vf: make sure it's a VF filter, else doesn't matter
1368 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1370 void i40e_del_filter(struct i40e_vsi *vsi,
1371 u8 *macaddr, s16 vlan,
1372 bool is_vf, bool is_netdev)
1374 struct i40e_mac_filter *f;
1376 if (!vsi || !macaddr)
1379 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1380 if (!f || f->counter == 0)
1388 } else if (is_netdev) {
1390 f->is_netdev = false;
1394 /* make sure we don't remove a filter in use by VF or netdev */
1396 min_f += (f->is_vf ? 1 : 0);
1397 min_f += (f->is_netdev ? 1 : 0);
1399 if (f->counter > min_f)
1403 /* counter == 0 tells sync_filters_subtask to
1404 * remove the filter from the firmware's list
1406 if (f->counter == 0) {
1408 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1409 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1414 * i40e_set_mac - NDO callback to set mac address
1415 * @netdev: network interface device structure
1416 * @p: pointer to an address structure
1418 * Returns 0 on success, negative on failure
1421 int i40e_set_mac(struct net_device *netdev, void *p)
1423 static int i40e_set_mac(struct net_device *netdev, void *p)
1426 struct i40e_netdev_priv *np = netdev_priv(netdev);
1427 struct i40e_vsi *vsi = np->vsi;
1428 struct i40e_pf *pf = vsi->back;
1429 struct i40e_hw *hw = &pf->hw;
1430 struct sockaddr *addr = p;
1431 struct i40e_mac_filter *f;
1433 if (!is_valid_ether_addr(addr->sa_data))
1434 return -EADDRNOTAVAIL;
1436 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1437 netdev_info(netdev, "already using mac address %pM\n",
1442 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1443 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1444 return -EADDRNOTAVAIL;
1446 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1447 netdev_info(netdev, "returning to hw mac address %pM\n",
1450 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1452 if (vsi->type == I40E_VSI_MAIN) {
1454 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1455 I40E_AQC_WRITE_TYPE_LAA_WOL,
1456 addr->sa_data, NULL);
1459 "Addr change for Main VSI failed: %d\n",
1461 return -EADDRNOTAVAIL;
1465 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1466 struct i40e_aqc_remove_macvlan_element_data element;
1468 memset(&element, 0, sizeof(element));
1469 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1470 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1471 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1473 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1477 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1478 struct i40e_aqc_add_macvlan_element_data element;
1480 memset(&element, 0, sizeof(element));
1481 ether_addr_copy(element.mac_addr, hw->mac.addr);
1482 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1483 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1485 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1491 i40e_sync_vsi_filters(vsi);
1492 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1498 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1499 * @vsi: the VSI being setup
1500 * @ctxt: VSI context structure
1501 * @enabled_tc: Enabled TCs bitmap
1502 * @is_add: True if called before Add VSI
1504 * Setup VSI queue mapping for enabled traffic classes.
1507 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1508 struct i40e_vsi_context *ctxt,
1512 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1513 struct i40e_vsi_context *ctxt,
1518 struct i40e_pf *pf = vsi->back;
1528 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1531 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1532 /* Find numtc from enabled TC bitmap */
1533 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1534 if (enabled_tc & BIT_ULL(i)) /* TC is enabled */
1538 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1542 /* At least TC0 is enabled in case of non-DCB case */
1546 vsi->tc_config.numtc = numtc;
1547 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1548 /* Number of queues per enabled TC */
1549 /* In MFP case we can have a much lower count of MSIx
1550 * vectors available and so we need to lower the used
1553 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1554 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1556 qcount = vsi->alloc_queue_pairs;
1557 num_tc_qps = qcount / numtc;
1558 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1560 /* Setup queue offset/count for all TCs for given VSI */
1561 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1562 /* See if the given TC is enabled for the given VSI */
1563 if (vsi->tc_config.enabled_tc & BIT_ULL(i)) {
1567 switch (vsi->type) {
1569 qcount = min_t(int, pf->rss_size, num_tc_qps);
1573 qcount = num_tc_qps;
1577 case I40E_VSI_SRIOV:
1578 case I40E_VSI_VMDQ2:
1580 qcount = num_tc_qps;
1584 vsi->tc_config.tc_info[i].qoffset = offset;
1585 vsi->tc_config.tc_info[i].qcount = qcount;
1587 /* find the next higher power-of-2 of num queue pairs */
1590 while (num_qps && (BIT_ULL(pow) < qcount)) {
1595 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1597 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1598 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1602 /* TC is not enabled so set the offset to
1603 * default queue and allocate one queue
1606 vsi->tc_config.tc_info[i].qoffset = 0;
1607 vsi->tc_config.tc_info[i].qcount = 1;
1608 vsi->tc_config.tc_info[i].netdev_tc = 0;
1612 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1615 /* Set actual Tx/Rx queue pairs */
1616 vsi->num_queue_pairs = offset;
1617 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1618 if (vsi->req_queue_pairs > 0)
1619 vsi->num_queue_pairs = vsi->req_queue_pairs;
1620 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1621 vsi->num_queue_pairs = pf->num_lan_msix;
1624 /* Scheduler section valid can only be set for ADD VSI */
1626 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1628 ctxt->info.up_enable_bits = enabled_tc;
1630 if (vsi->type == I40E_VSI_SRIOV) {
1631 ctxt->info.mapping_flags |=
1632 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1633 for (i = 0; i < vsi->num_queue_pairs; i++)
1634 ctxt->info.queue_mapping[i] =
1635 cpu_to_le16(vsi->base_queue + i);
1637 ctxt->info.mapping_flags |=
1638 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1639 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1641 ctxt->info.valid_sections |= cpu_to_le16(sections);
1645 * i40e_set_rx_mode - NDO callback to set the netdev filters
1646 * @netdev: network interface device structure
1649 void i40e_set_rx_mode(struct net_device *netdev)
1651 static void i40e_set_rx_mode(struct net_device *netdev)
1654 struct i40e_netdev_priv *np = netdev_priv(netdev);
1655 struct i40e_mac_filter *f, *ftmp;
1656 struct i40e_vsi *vsi = np->vsi;
1657 struct netdev_hw_addr *uca;
1658 struct netdev_hw_addr *mca;
1659 struct netdev_hw_addr *ha;
1661 /* add addr if not already in the filter list */
1662 netdev_for_each_uc_addr(uca, netdev) {
1663 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1664 if (i40e_is_vsi_in_vlan(vsi))
1665 i40e_put_mac_in_vlan(vsi, uca->addr,
1668 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1673 netdev_for_each_mc_addr(mca, netdev) {
1674 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1675 if (i40e_is_vsi_in_vlan(vsi))
1676 i40e_put_mac_in_vlan(vsi, mca->addr,
1679 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1684 /* remove filter if not in netdev list */
1685 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1691 if (is_multicast_ether_addr(f->macaddr)) {
1692 netdev_for_each_mc_addr(mca, netdev) {
1693 if (ether_addr_equal(mca->addr, f->macaddr)) {
1699 netdev_for_each_uc_addr(uca, netdev) {
1700 if (ether_addr_equal(uca->addr, f->macaddr)) {
1706 for_each_dev_addr(netdev, ha) {
1707 if (ether_addr_equal(ha->addr, f->macaddr)) {
1715 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1718 /* check for other flag changes */
1719 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1720 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1721 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1726 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1727 * @vsi: ptr to the VSI
1729 * Push any outstanding VSI filter changes through the AdminQ.
1731 * Returns 0 or error value
1733 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1735 struct i40e_mac_filter *f, *ftmp;
1736 bool promisc_forced_on = false;
1737 bool add_happened = false;
1738 int filter_list_len = 0;
1739 u32 changed_flags = 0;
1740 i40e_status ret = 0;
1747 /* empty array typed pointers, kcalloc later */
1748 struct i40e_aqc_add_macvlan_element_data *add_list;
1749 struct i40e_aqc_remove_macvlan_element_data *del_list;
1751 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1752 usleep_range(1000, 2000);
1756 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1757 vsi->current_netdev_flags = vsi->netdev->flags;
1760 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1761 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1763 filter_list_len = pf->hw.aq.asq_buf_size /
1764 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1765 del_list = kcalloc(filter_list_len,
1766 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1771 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1775 if (f->counter != 0)
1780 /* add to delete list */
1781 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1782 del_list[num_del].vlan_tag =
1783 cpu_to_le16((u16)(f->vlan ==
1784 I40E_VLAN_ANY ? 0 : f->vlan));
1786 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1787 del_list[num_del].flags = cmd_flags;
1790 /* unlink from filter list */
1794 /* flush a full buffer */
1795 if (num_del == filter_list_len) {
1796 ret = i40e_aq_remove_macvlan(&pf->hw,
1797 vsi->seid, del_list, num_del,
1799 aq_err = pf->hw.aq.asq_last_status;
1801 memset(del_list, 0, sizeof(*del_list));
1803 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1804 dev_info(&pf->pdev->dev,
1805 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1806 i40e_stat_str(&pf->hw, ret),
1807 i40e_aq_str(&pf->hw, aq_err));
1811 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1812 del_list, num_del, NULL);
1813 aq_err = pf->hw.aq.asq_last_status;
1816 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1817 dev_info(&pf->pdev->dev,
1818 "ignoring delete macvlan error, err %s aq_err %s\n",
1819 i40e_stat_str(&pf->hw, ret),
1820 i40e_aq_str(&pf->hw, aq_err));
1826 /* do all the adds now */
1827 filter_list_len = pf->hw.aq.asq_buf_size /
1828 sizeof(struct i40e_aqc_add_macvlan_element_data),
1829 add_list = kcalloc(filter_list_len,
1830 sizeof(struct i40e_aqc_add_macvlan_element_data),
1835 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1839 if (f->counter == 0)
1842 add_happened = true;
1845 /* add to add array */
1846 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1847 add_list[num_add].vlan_tag =
1849 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1850 add_list[num_add].queue_number = 0;
1852 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1853 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1856 /* flush a full buffer */
1857 if (num_add == filter_list_len) {
1858 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1861 aq_err = pf->hw.aq.asq_last_status;
1866 memset(add_list, 0, sizeof(*add_list));
1870 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1871 add_list, num_add, NULL);
1872 aq_err = pf->hw.aq.asq_last_status;
1878 if (add_happened && ret && aq_err != I40E_AQ_RC_EINVAL) {
1879 dev_info(&pf->pdev->dev,
1880 "add filter failed, err %s aq_err %s\n",
1881 i40e_stat_str(&pf->hw, ret),
1882 i40e_aq_str(&pf->hw, aq_err));
1883 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1884 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1886 promisc_forced_on = true;
1887 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1889 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1894 /* check for changes in promiscuous modes */
1895 if (changed_flags & IFF_ALLMULTI) {
1896 bool cur_multipromisc;
1897 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1898 ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1903 dev_info(&pf->pdev->dev,
1904 "set multi promisc failed, err %s aq_err %s\n",
1905 i40e_stat_str(&pf->hw, ret),
1906 i40e_aq_str(&pf->hw,
1907 pf->hw.aq.asq_last_status));
1909 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1911 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1912 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1914 ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw,
1918 dev_info(&pf->pdev->dev,
1919 "set uni promisc failed, err %s, aq_err %s\n",
1920 i40e_stat_str(&pf->hw, ret),
1921 i40e_aq_str(&pf->hw,
1922 pf->hw.aq.asq_last_status));
1923 ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1927 dev_info(&pf->pdev->dev,
1928 "set brdcast promisc failed, err %s, aq_err %s\n",
1929 i40e_stat_str(&pf->hw, ret),
1930 i40e_aq_str(&pf->hw,
1931 pf->hw.aq.asq_last_status));
1934 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1939 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1940 * @pf: board private structure
1942 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1946 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
1948 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
1950 for (v = 0; v < pf->num_alloc_vsi; v++) {
1952 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
1953 i40e_sync_vsi_filters(pf->vsi[v]);
1958 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
1959 * @netdev: network interface device structure
1960 * @new_mtu: new value for maximum frame size
1962 * Returns 0 on success, negative on failure
1964 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
1966 struct i40e_netdev_priv *np = netdev_priv(netdev);
1967 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
1968 struct i40e_vsi *vsi = np->vsi;
1970 /* MTU < 68 is an error and causes problems on some kernels */
1971 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
1974 netdev_info(netdev, "changing MTU from %d to %d\n",
1975 netdev->mtu, new_mtu);
1976 netdev->mtu = new_mtu;
1977 if (netif_running(netdev))
1978 i40e_vsi_reinit_locked(vsi);
1984 * i40e_ioctl - Access the hwtstamp interface
1985 * @netdev: network interface device structure
1986 * @ifr: interface request data
1987 * @cmd: ioctl command
1989 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1991 struct i40e_netdev_priv *np = netdev_priv(netdev);
1992 struct i40e_pf *pf = np->vsi->back;
1996 return i40e_ptp_get_ts_config(pf, ifr);
1998 return i40e_ptp_set_ts_config(pf, ifr);
2005 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2006 * @vsi: the vsi being adjusted
2008 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2010 struct i40e_vsi_context ctxt;
2013 if ((vsi->info.valid_sections &
2014 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2015 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2016 return; /* already enabled */
2018 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2019 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2020 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2022 ctxt.seid = vsi->seid;
2023 ctxt.info = vsi->info;
2024 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2026 dev_info(&vsi->back->pdev->dev,
2027 "update vlan stripping failed, err %s aq_err %s\n",
2028 i40e_stat_str(&vsi->back->hw, ret),
2029 i40e_aq_str(&vsi->back->hw,
2030 vsi->back->hw.aq.asq_last_status));
2035 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2036 * @vsi: the vsi being adjusted
2038 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2040 struct i40e_vsi_context ctxt;
2043 if ((vsi->info.valid_sections &
2044 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2045 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2046 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2047 return; /* already disabled */
2049 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2050 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2051 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2053 ctxt.seid = vsi->seid;
2054 ctxt.info = vsi->info;
2055 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2057 dev_info(&vsi->back->pdev->dev,
2058 "update vlan stripping failed, err %s aq_err %s\n",
2059 i40e_stat_str(&vsi->back->hw, ret),
2060 i40e_aq_str(&vsi->back->hw,
2061 vsi->back->hw.aq.asq_last_status));
2066 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2067 * @netdev: network interface to be adjusted
2068 * @features: netdev features to test if VLAN offload is enabled or not
2070 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2072 struct i40e_netdev_priv *np = netdev_priv(netdev);
2073 struct i40e_vsi *vsi = np->vsi;
2075 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2076 i40e_vlan_stripping_enable(vsi);
2078 i40e_vlan_stripping_disable(vsi);
2082 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2083 * @vsi: the vsi being configured
2084 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2086 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2088 struct i40e_mac_filter *f, *add_f;
2089 bool is_netdev, is_vf;
2091 is_vf = (vsi->type == I40E_VSI_SRIOV);
2092 is_netdev = !!(vsi->netdev);
2095 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2098 dev_info(&vsi->back->pdev->dev,
2099 "Could not add vlan filter %d for %pM\n",
2100 vid, vsi->netdev->dev_addr);
2105 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2106 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2108 dev_info(&vsi->back->pdev->dev,
2109 "Could not add vlan filter %d for %pM\n",
2115 /* Now if we add a vlan tag, make sure to check if it is the first
2116 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2117 * with 0, so we now accept untagged and specified tagged traffic
2118 * (and not any taged and untagged)
2121 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2123 is_vf, is_netdev)) {
2124 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2125 I40E_VLAN_ANY, is_vf, is_netdev);
2126 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2129 dev_info(&vsi->back->pdev->dev,
2130 "Could not add filter 0 for %pM\n",
2131 vsi->netdev->dev_addr);
2137 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2138 if (vid > 0 && !vsi->info.pvid) {
2139 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2140 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2141 is_vf, is_netdev)) {
2142 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2144 add_f = i40e_add_filter(vsi, f->macaddr,
2145 0, is_vf, is_netdev);
2147 dev_info(&vsi->back->pdev->dev,
2148 "Could not add filter 0 for %pM\n",
2156 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2157 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2160 return i40e_sync_vsi_filters(vsi);
2164 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2165 * @vsi: the vsi being configured
2166 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2168 * Return: 0 on success or negative otherwise
2170 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2172 struct net_device *netdev = vsi->netdev;
2173 struct i40e_mac_filter *f, *add_f;
2174 bool is_vf, is_netdev;
2175 int filter_count = 0;
2177 is_vf = (vsi->type == I40E_VSI_SRIOV);
2178 is_netdev = !!(netdev);
2181 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2183 list_for_each_entry(f, &vsi->mac_filter_list, list)
2184 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2186 /* go through all the filters for this VSI and if there is only
2187 * vid == 0 it means there are no other filters, so vid 0 must
2188 * be replaced with -1. This signifies that we should from now
2189 * on accept any traffic (with any tag present, or untagged)
2191 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2194 ether_addr_equal(netdev->dev_addr, f->macaddr))
2202 if (!filter_count && is_netdev) {
2203 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2204 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2207 dev_info(&vsi->back->pdev->dev,
2208 "Could not add filter %d for %pM\n",
2209 I40E_VLAN_ANY, netdev->dev_addr);
2214 if (!filter_count) {
2215 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2216 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2217 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2220 dev_info(&vsi->back->pdev->dev,
2221 "Could not add filter %d for %pM\n",
2222 I40E_VLAN_ANY, f->macaddr);
2228 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2229 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2232 return i40e_sync_vsi_filters(vsi);
2236 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2237 * @netdev: network interface to be adjusted
2238 * @vid: vlan id to be added
2240 * net_device_ops implementation for adding vlan ids
2243 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2244 __always_unused __be16 proto, u16 vid)
2246 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2247 __always_unused __be16 proto, u16 vid)
2250 struct i40e_netdev_priv *np = netdev_priv(netdev);
2251 struct i40e_vsi *vsi = np->vsi;
2257 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2259 /* If the network stack called us with vid = 0 then
2260 * it is asking to receive priority tagged packets with
2261 * vlan id 0. Our HW receives them by default when configured
2262 * to receive untagged packets so there is no need to add an
2263 * extra filter for vlan 0 tagged packets.
2266 ret = i40e_vsi_add_vlan(vsi, vid);
2268 if (!ret && (vid < VLAN_N_VID))
2269 set_bit(vid, vsi->active_vlans);
2275 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2276 * @netdev: network interface to be adjusted
2277 * @vid: vlan id to be removed
2279 * net_device_ops implementation for removing vlan ids
2282 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2283 __always_unused __be16 proto, u16 vid)
2285 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2286 __always_unused __be16 proto, u16 vid)
2289 struct i40e_netdev_priv *np = netdev_priv(netdev);
2290 struct i40e_vsi *vsi = np->vsi;
2292 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2294 /* return code is ignored as there is nothing a user
2295 * can do about failure to remove and a log message was
2296 * already printed from the other function
2298 i40e_vsi_kill_vlan(vsi, vid);
2300 clear_bit(vid, vsi->active_vlans);
2306 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2307 * @vsi: the vsi being brought back up
2309 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2316 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2318 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2319 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2324 * i40e_vsi_add_pvid - Add pvid for the VSI
2325 * @vsi: the vsi being adjusted
2326 * @vid: the vlan id to set as a PVID
2328 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2330 struct i40e_vsi_context ctxt;
2333 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2334 vsi->info.pvid = cpu_to_le16(vid);
2335 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2336 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2337 I40E_AQ_VSI_PVLAN_EMOD_STR;
2339 ctxt.seid = vsi->seid;
2340 ctxt.info = vsi->info;
2341 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2343 dev_info(&vsi->back->pdev->dev,
2344 "add pvid failed, err %s aq_err %s\n",
2345 i40e_stat_str(&vsi->back->hw, ret),
2346 i40e_aq_str(&vsi->back->hw,
2347 vsi->back->hw.aq.asq_last_status));
2355 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2356 * @vsi: the vsi being adjusted
2358 * Just use the vlan_rx_register() service to put it back to normal
2360 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2362 i40e_vlan_stripping_disable(vsi);
2368 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2369 * @vsi: ptr to the VSI
2371 * If this function returns with an error, then it's possible one or
2372 * more of the rings is populated (while the rest are not). It is the
2373 * callers duty to clean those orphaned rings.
2375 * Return 0 on success, negative on failure
2377 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2381 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2382 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2388 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2389 * @vsi: ptr to the VSI
2391 * Free VSI's transmit software resources
2393 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2400 for (i = 0; i < vsi->num_queue_pairs; i++)
2401 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2402 i40e_free_tx_resources(vsi->tx_rings[i]);
2406 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2407 * @vsi: ptr to the VSI
2409 * If this function returns with an error, then it's possible one or
2410 * more of the rings is populated (while the rest are not). It is the
2411 * callers duty to clean those orphaned rings.
2413 * Return 0 on success, negative on failure
2415 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2419 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2420 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2422 i40e_fcoe_setup_ddp_resources(vsi);
2428 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2429 * @vsi: ptr to the VSI
2431 * Free all receive software resources
2433 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2440 for (i = 0; i < vsi->num_queue_pairs; i++)
2441 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2442 i40e_free_rx_resources(vsi->rx_rings[i]);
2444 i40e_fcoe_free_ddp_resources(vsi);
2449 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2450 * @ring: The Tx ring to configure
2452 * This enables/disables XPS for a given Tx descriptor ring
2453 * based on the TCs enabled for the VSI that ring belongs to.
2455 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2457 struct i40e_vsi *vsi = ring->vsi;
2460 if (!ring->q_vector || !ring->netdev)
2463 /* Single TC mode enable XPS */
2464 if (vsi->tc_config.numtc <= 1) {
2465 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2466 netif_set_xps_queue(ring->netdev,
2467 &ring->q_vector->affinity_mask,
2469 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2470 /* Disable XPS to allow selection based on TC */
2471 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2472 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2473 free_cpumask_var(mask);
2478 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2479 * @ring: The Tx ring to configure
2481 * Configure the Tx descriptor ring in the HMC context.
2483 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2485 struct i40e_vsi *vsi = ring->vsi;
2486 u16 pf_q = vsi->base_queue + ring->queue_index;
2487 struct i40e_hw *hw = &vsi->back->hw;
2488 struct i40e_hmc_obj_txq tx_ctx;
2489 i40e_status err = 0;
2492 /* some ATR related tx ring init */
2493 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2494 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2495 ring->atr_count = 0;
2497 ring->atr_sample_rate = 0;
2501 i40e_config_xps_tx_ring(ring);
2503 /* clear the context structure first */
2504 memset(&tx_ctx, 0, sizeof(tx_ctx));
2506 tx_ctx.new_context = 1;
2507 tx_ctx.base = (ring->dma / 128);
2508 tx_ctx.qlen = ring->count;
2509 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2510 I40E_FLAG_FD_ATR_ENABLED));
2512 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2514 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2515 /* FDIR VSI tx ring can still use RS bit and writebacks */
2516 if (vsi->type != I40E_VSI_FDIR)
2517 tx_ctx.head_wb_ena = 1;
2518 tx_ctx.head_wb_addr = ring->dma +
2519 (ring->count * sizeof(struct i40e_tx_desc));
2521 /* As part of VSI creation/update, FW allocates certain
2522 * Tx arbitration queue sets for each TC enabled for
2523 * the VSI. The FW returns the handles to these queue
2524 * sets as part of the response buffer to Add VSI,
2525 * Update VSI, etc. AQ commands. It is expected that
2526 * these queue set handles be associated with the Tx
2527 * queues by the driver as part of the TX queue context
2528 * initialization. This has to be done regardless of
2529 * DCB as by default everything is mapped to TC0.
2531 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2532 tx_ctx.rdylist_act = 0;
2534 /* clear the context in the HMC */
2535 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2537 dev_info(&vsi->back->pdev->dev,
2538 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2539 ring->queue_index, pf_q, err);
2543 /* set the context in the HMC */
2544 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2546 dev_info(&vsi->back->pdev->dev,
2547 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2548 ring->queue_index, pf_q, err);
2552 /* Now associate this queue with this PCI function */
2553 if (vsi->type == I40E_VSI_VMDQ2) {
2554 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2555 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2556 I40E_QTX_CTL_VFVM_INDX_MASK;
2558 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2561 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2562 I40E_QTX_CTL_PF_INDX_MASK);
2563 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2566 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
2568 /* cache tail off for easier writes later */
2569 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2575 * i40e_configure_rx_ring - Configure a receive ring context
2576 * @ring: The Rx ring to configure
2578 * Configure the Rx descriptor ring in the HMC context.
2580 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2582 struct i40e_vsi *vsi = ring->vsi;
2583 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2584 u16 pf_q = vsi->base_queue + ring->queue_index;
2585 struct i40e_hw *hw = &vsi->back->hw;
2586 struct i40e_hmc_obj_rxq rx_ctx;
2587 i40e_status err = 0;
2591 /* clear the context structure first */
2592 memset(&rx_ctx, 0, sizeof(rx_ctx));
2594 ring->rx_buf_len = vsi->rx_buf_len;
2595 ring->rx_hdr_len = vsi->rx_hdr_len;
2597 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2598 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2600 rx_ctx.base = (ring->dma / 128);
2601 rx_ctx.qlen = ring->count;
2603 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2604 set_ring_16byte_desc_enabled(ring);
2610 rx_ctx.dtype = vsi->dtype;
2612 set_ring_ps_enabled(ring);
2613 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2615 I40E_RX_SPLIT_TCP_UDP |
2618 rx_ctx.hsplit_0 = 0;
2621 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2622 (chain_len * ring->rx_buf_len));
2623 if (hw->revision_id == 0)
2624 rx_ctx.lrxqthresh = 0;
2626 rx_ctx.lrxqthresh = 2;
2627 rx_ctx.crcstrip = 1;
2631 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2633 /* set the prefena field to 1 because the manual says to */
2636 /* clear the context in the HMC */
2637 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2639 dev_info(&vsi->back->pdev->dev,
2640 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2641 ring->queue_index, pf_q, err);
2645 /* set the context in the HMC */
2646 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2648 dev_info(&vsi->back->pdev->dev,
2649 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2650 ring->queue_index, pf_q, err);
2654 /* cache tail for quicker writes, and clear the reg before use */
2655 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2656 writel(0, ring->tail);
2658 if (ring_is_ps_enabled(ring)) {
2659 i40e_alloc_rx_headers(ring);
2660 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2662 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2669 * i40e_vsi_configure_tx - Configure the VSI for Tx
2670 * @vsi: VSI structure describing this set of rings and resources
2672 * Configure the Tx VSI for operation.
2674 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2679 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2680 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2686 * i40e_vsi_configure_rx - Configure the VSI for Rx
2687 * @vsi: the VSI being configured
2689 * Configure the Rx VSI for operation.
2691 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2696 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2697 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2698 + ETH_FCS_LEN + VLAN_HLEN;
2700 vsi->max_frame = I40E_RXBUFFER_2048;
2702 /* figure out correct receive buffer length */
2703 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2704 I40E_FLAG_RX_PS_ENABLED)) {
2705 case I40E_FLAG_RX_1BUF_ENABLED:
2706 vsi->rx_hdr_len = 0;
2707 vsi->rx_buf_len = vsi->max_frame;
2708 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2710 case I40E_FLAG_RX_PS_ENABLED:
2711 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2712 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2713 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2716 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2717 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2718 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2723 /* setup rx buffer for FCoE */
2724 if ((vsi->type == I40E_VSI_FCOE) &&
2725 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2726 vsi->rx_hdr_len = 0;
2727 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2728 vsi->max_frame = I40E_RXBUFFER_3072;
2729 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2732 #endif /* I40E_FCOE */
2733 /* round up for the chip's needs */
2734 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2735 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2736 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2737 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2739 /* set up individual rings */
2740 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2741 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2747 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2748 * @vsi: ptr to the VSI
2750 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2752 struct i40e_ring *tx_ring, *rx_ring;
2753 u16 qoffset, qcount;
2756 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2757 /* Reset the TC information */
2758 for (i = 0; i < vsi->num_queue_pairs; i++) {
2759 rx_ring = vsi->rx_rings[i];
2760 tx_ring = vsi->tx_rings[i];
2761 rx_ring->dcb_tc = 0;
2762 tx_ring->dcb_tc = 0;
2766 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2767 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
2770 qoffset = vsi->tc_config.tc_info[n].qoffset;
2771 qcount = vsi->tc_config.tc_info[n].qcount;
2772 for (i = qoffset; i < (qoffset + qcount); i++) {
2773 rx_ring = vsi->rx_rings[i];
2774 tx_ring = vsi->tx_rings[i];
2775 rx_ring->dcb_tc = n;
2776 tx_ring->dcb_tc = n;
2782 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2783 * @vsi: ptr to the VSI
2785 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2788 i40e_set_rx_mode(vsi->netdev);
2792 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2793 * @vsi: Pointer to the targeted VSI
2795 * This function replays the hlist on the hw where all the SB Flow Director
2796 * filters were saved.
2798 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2800 struct i40e_fdir_filter *filter;
2801 struct i40e_pf *pf = vsi->back;
2802 struct hlist_node *node;
2804 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2807 hlist_for_each_entry_safe(filter, node,
2808 &pf->fdir_filter_list, fdir_node) {
2809 i40e_add_del_fdir(vsi, filter, true);
2814 * i40e_vsi_configure - Set up the VSI for action
2815 * @vsi: the VSI being configured
2817 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2821 i40e_set_vsi_rx_mode(vsi);
2822 i40e_restore_vlan(vsi);
2823 i40e_vsi_config_dcb_rings(vsi);
2824 err = i40e_vsi_configure_tx(vsi);
2826 err = i40e_vsi_configure_rx(vsi);
2832 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2833 * @vsi: the VSI being configured
2835 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2837 struct i40e_pf *pf = vsi->back;
2838 struct i40e_q_vector *q_vector;
2839 struct i40e_hw *hw = &pf->hw;
2845 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2846 * and PFINT_LNKLSTn registers, e.g.:
2847 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2849 qp = vsi->base_queue;
2850 vector = vsi->base_vector;
2851 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2852 q_vector = vsi->q_vectors[i];
2853 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2854 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2855 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2857 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2858 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2859 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2862 /* Linked list for the queuepairs assigned to this vector */
2863 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2864 for (q = 0; q < q_vector->num_ringpairs; q++) {
2865 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2866 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2867 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2868 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2870 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2872 wr32(hw, I40E_QINT_RQCTL(qp), val);
2874 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2875 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2876 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2877 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2879 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2881 /* Terminate the linked list */
2882 if (q == (q_vector->num_ringpairs - 1))
2883 val |= (I40E_QUEUE_END_OF_LIST
2884 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2886 wr32(hw, I40E_QINT_TQCTL(qp), val);
2895 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2896 * @hw: ptr to the hardware info
2898 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
2900 struct i40e_hw *hw = &pf->hw;
2903 /* clear things first */
2904 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2905 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2907 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2908 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2909 I40E_PFINT_ICR0_ENA_GRST_MASK |
2910 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2911 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2912 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2913 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2914 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2916 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
2917 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
2919 if (pf->flags & I40E_FLAG_PTP)
2920 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2922 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2924 /* SW_ITR_IDX = 0, but don't change INTENA */
2925 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2926 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2928 /* OTHER_ITR_IDX = 0 */
2929 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2933 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2934 * @vsi: the VSI being configured
2936 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2938 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2939 struct i40e_pf *pf = vsi->back;
2940 struct i40e_hw *hw = &pf->hw;
2943 /* set the ITR configuration */
2944 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2945 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2946 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
2947 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2948 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2949 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
2951 i40e_enable_misc_int_causes(pf);
2953 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
2954 wr32(hw, I40E_PFINT_LNKLST0, 0);
2956 /* Associate the queue pair to the vector and enable the queue int */
2957 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2958 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2959 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2961 wr32(hw, I40E_QINT_RQCTL(0), val);
2963 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2964 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2965 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2967 wr32(hw, I40E_QINT_TQCTL(0), val);
2972 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
2973 * @pf: board private structure
2975 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
2977 struct i40e_hw *hw = &pf->hw;
2979 wr32(hw, I40E_PFINT_DYN_CTL0,
2980 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2985 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
2986 * @pf: board private structure
2988 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
2990 struct i40e_hw *hw = &pf->hw;
2993 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
2994 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
2995 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
2997 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3002 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
3003 * @vsi: pointer to a vsi
3004 * @vector: enable a particular Hw Interrupt vector
3006 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
3008 struct i40e_pf *pf = vsi->back;
3009 struct i40e_hw *hw = &pf->hw;
3012 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
3013 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
3014 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3015 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3016 /* skip the flush */
3020 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3021 * @vsi: pointer to a vsi
3022 * @vector: disable a particular Hw Interrupt vector
3024 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3026 struct i40e_pf *pf = vsi->back;
3027 struct i40e_hw *hw = &pf->hw;
3030 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3031 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3036 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3037 * @irq: interrupt number
3038 * @data: pointer to a q_vector
3040 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3042 struct i40e_q_vector *q_vector = data;
3044 if (!q_vector->tx.ring && !q_vector->rx.ring)
3047 napi_schedule(&q_vector->napi);
3053 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3054 * @vsi: the VSI being configured
3055 * @basename: name for the vector
3057 * Allocates MSI-X vectors and requests interrupts from the kernel.
3059 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3061 int q_vectors = vsi->num_q_vectors;
3062 struct i40e_pf *pf = vsi->back;
3063 int base = vsi->base_vector;
3068 for (vector = 0; vector < q_vectors; vector++) {
3069 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3071 if (q_vector->tx.ring && q_vector->rx.ring) {
3072 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3073 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3075 } else if (q_vector->rx.ring) {
3076 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3077 "%s-%s-%d", basename, "rx", rx_int_idx++);
3078 } else if (q_vector->tx.ring) {
3079 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3080 "%s-%s-%d", basename, "tx", tx_int_idx++);
3082 /* skip this unused q_vector */
3085 err = request_irq(pf->msix_entries[base + vector].vector,
3091 dev_info(&pf->pdev->dev,
3092 "%s: request_irq failed, error: %d\n",
3094 goto free_queue_irqs;
3096 /* assign the mask for this irq */
3097 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3098 &q_vector->affinity_mask);
3101 vsi->irqs_ready = true;
3107 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3109 free_irq(pf->msix_entries[base + vector].vector,
3110 &(vsi->q_vectors[vector]));
3116 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3117 * @vsi: the VSI being un-configured
3119 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3121 struct i40e_pf *pf = vsi->back;
3122 struct i40e_hw *hw = &pf->hw;
3123 int base = vsi->base_vector;
3126 for (i = 0; i < vsi->num_queue_pairs; i++) {
3127 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3128 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3131 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3132 for (i = vsi->base_vector;
3133 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3134 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3137 for (i = 0; i < vsi->num_q_vectors; i++)
3138 synchronize_irq(pf->msix_entries[i + base].vector);
3140 /* Legacy and MSI mode - this stops all interrupt handling */
3141 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3142 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3144 synchronize_irq(pf->pdev->irq);
3149 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3150 * @vsi: the VSI being configured
3152 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3154 struct i40e_pf *pf = vsi->back;
3157 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3158 for (i = vsi->base_vector;
3159 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3160 i40e_irq_dynamic_enable(vsi, i);
3162 i40e_irq_dynamic_enable_icr0(pf);
3165 i40e_flush(&pf->hw);
3170 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3171 * @pf: board private structure
3173 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3176 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3177 i40e_flush(&pf->hw);
3181 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3182 * @irq: interrupt number
3183 * @data: pointer to a q_vector
3185 * This is the handler used for all MSI/Legacy interrupts, and deals
3186 * with both queue and non-queue interrupts. This is also used in
3187 * MSIX mode to handle the non-queue interrupts.
3189 static irqreturn_t i40e_intr(int irq, void *data)
3191 struct i40e_pf *pf = (struct i40e_pf *)data;
3192 struct i40e_hw *hw = &pf->hw;
3193 irqreturn_t ret = IRQ_NONE;
3194 u32 icr0, icr0_remaining;
3197 icr0 = rd32(hw, I40E_PFINT_ICR0);
3198 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3200 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3201 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3204 /* if interrupt but no bits showing, must be SWINT */
3205 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3206 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3209 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3210 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3211 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3212 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3213 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3216 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3217 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3219 /* temporarily disable queue cause for NAPI processing */
3220 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3221 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3222 wr32(hw, I40E_QINT_RQCTL(0), qval);
3224 qval = rd32(hw, I40E_QINT_TQCTL(0));
3225 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3226 wr32(hw, I40E_QINT_TQCTL(0), qval);
3228 if (!test_bit(__I40E_DOWN, &pf->state))
3229 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3232 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3233 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3234 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3237 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3238 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3239 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3242 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3243 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3244 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3247 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3248 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3249 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3250 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3251 val = rd32(hw, I40E_GLGEN_RSTAT);
3252 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3253 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3254 if (val == I40E_RESET_CORER) {
3256 } else if (val == I40E_RESET_GLOBR) {
3258 } else if (val == I40E_RESET_EMPR) {
3260 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3264 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3265 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3266 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3267 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3268 rd32(hw, I40E_PFHMC_ERRORINFO),
3269 rd32(hw, I40E_PFHMC_ERRORDATA));
3272 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3273 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3275 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3276 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3277 i40e_ptp_tx_hwtstamp(pf);
3281 /* If a critical error is pending we have no choice but to reset the
3283 * Report and mask out any remaining unexpected interrupts.
3285 icr0_remaining = icr0 & ena_mask;
3286 if (icr0_remaining) {
3287 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3289 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3290 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3291 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3292 dev_info(&pf->pdev->dev, "device will be reset\n");
3293 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3294 i40e_service_event_schedule(pf);
3296 ena_mask &= ~icr0_remaining;
3301 /* re-enable interrupt causes */
3302 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3303 if (!test_bit(__I40E_DOWN, &pf->state)) {
3304 i40e_service_event_schedule(pf);
3305 i40e_irq_dynamic_enable_icr0(pf);
3312 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3313 * @tx_ring: tx ring to clean
3314 * @budget: how many cleans we're allowed
3316 * Returns true if there's any budget left (e.g. the clean is finished)
3318 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3320 struct i40e_vsi *vsi = tx_ring->vsi;
3321 u16 i = tx_ring->next_to_clean;
3322 struct i40e_tx_buffer *tx_buf;
3323 struct i40e_tx_desc *tx_desc;
3325 tx_buf = &tx_ring->tx_bi[i];
3326 tx_desc = I40E_TX_DESC(tx_ring, i);
3327 i -= tx_ring->count;
3330 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3332 /* if next_to_watch is not set then there is no work pending */
3336 /* prevent any other reads prior to eop_desc */
3337 read_barrier_depends();
3339 /* if the descriptor isn't done, no work yet to do */
3340 if (!(eop_desc->cmd_type_offset_bsz &
3341 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3344 /* clear next_to_watch to prevent false hangs */
3345 tx_buf->next_to_watch = NULL;
3347 tx_desc->buffer_addr = 0;
3348 tx_desc->cmd_type_offset_bsz = 0;
3349 /* move past filter desc */
3354 i -= tx_ring->count;
3355 tx_buf = tx_ring->tx_bi;
3356 tx_desc = I40E_TX_DESC(tx_ring, 0);
3358 /* unmap skb header data */
3359 dma_unmap_single(tx_ring->dev,
3360 dma_unmap_addr(tx_buf, dma),
3361 dma_unmap_len(tx_buf, len),
3363 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3364 kfree(tx_buf->raw_buf);
3366 tx_buf->raw_buf = NULL;
3367 tx_buf->tx_flags = 0;
3368 tx_buf->next_to_watch = NULL;
3369 dma_unmap_len_set(tx_buf, len, 0);
3370 tx_desc->buffer_addr = 0;
3371 tx_desc->cmd_type_offset_bsz = 0;
3373 /* move us past the eop_desc for start of next FD desc */
3378 i -= tx_ring->count;
3379 tx_buf = tx_ring->tx_bi;
3380 tx_desc = I40E_TX_DESC(tx_ring, 0);
3383 /* update budget accounting */
3385 } while (likely(budget));
3387 i += tx_ring->count;
3388 tx_ring->next_to_clean = i;
3390 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3391 i40e_irq_dynamic_enable(vsi,
3392 tx_ring->q_vector->v_idx + vsi->base_vector);
3398 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3399 * @irq: interrupt number
3400 * @data: pointer to a q_vector
3402 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3404 struct i40e_q_vector *q_vector = data;
3405 struct i40e_vsi *vsi;
3407 if (!q_vector->tx.ring)
3410 vsi = q_vector->tx.ring->vsi;
3411 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3417 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3418 * @vsi: the VSI being configured
3419 * @v_idx: vector index
3420 * @qp_idx: queue pair index
3422 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3424 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3425 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3426 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3428 tx_ring->q_vector = q_vector;
3429 tx_ring->next = q_vector->tx.ring;
3430 q_vector->tx.ring = tx_ring;
3431 q_vector->tx.count++;
3433 rx_ring->q_vector = q_vector;
3434 rx_ring->next = q_vector->rx.ring;
3435 q_vector->rx.ring = rx_ring;
3436 q_vector->rx.count++;
3440 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3441 * @vsi: the VSI being configured
3443 * This function maps descriptor rings to the queue-specific vectors
3444 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3445 * one vector per queue pair, but on a constrained vector budget, we
3446 * group the queue pairs as "efficiently" as possible.
3448 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3450 int qp_remaining = vsi->num_queue_pairs;
3451 int q_vectors = vsi->num_q_vectors;
3456 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3457 * group them so there are multiple queues per vector.
3458 * It is also important to go through all the vectors available to be
3459 * sure that if we don't use all the vectors, that the remaining vectors
3460 * are cleared. This is especially important when decreasing the
3461 * number of queues in use.
3463 for (; v_start < q_vectors; v_start++) {
3464 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3466 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3468 q_vector->num_ringpairs = num_ringpairs;
3470 q_vector->rx.count = 0;
3471 q_vector->tx.count = 0;
3472 q_vector->rx.ring = NULL;
3473 q_vector->tx.ring = NULL;
3475 while (num_ringpairs--) {
3476 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3484 * i40e_vsi_request_irq - Request IRQ from the OS
3485 * @vsi: the VSI being configured
3486 * @basename: name for the vector
3488 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3490 struct i40e_pf *pf = vsi->back;
3493 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3494 err = i40e_vsi_request_irq_msix(vsi, basename);
3495 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3496 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3499 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3503 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3508 #ifdef CONFIG_NET_POLL_CONTROLLER
3510 * i40e_netpoll - A Polling 'interrupt'handler
3511 * @netdev: network interface device structure
3513 * This is used by netconsole to send skbs without having to re-enable
3514 * interrupts. It's not called while the normal interrupt routine is executing.
3517 void i40e_netpoll(struct net_device *netdev)
3519 static void i40e_netpoll(struct net_device *netdev)
3522 struct i40e_netdev_priv *np = netdev_priv(netdev);
3523 struct i40e_vsi *vsi = np->vsi;
3524 struct i40e_pf *pf = vsi->back;
3527 /* if interface is down do nothing */
3528 if (test_bit(__I40E_DOWN, &vsi->state))
3531 pf->flags |= I40E_FLAG_IN_NETPOLL;
3532 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3533 for (i = 0; i < vsi->num_q_vectors; i++)
3534 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3536 i40e_intr(pf->pdev->irq, netdev);
3538 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3543 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3544 * @pf: the PF being configured
3545 * @pf_q: the PF queue
3546 * @enable: enable or disable state of the queue
3548 * This routine will wait for the given Tx queue of the PF to reach the
3549 * enabled or disabled state.
3550 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3551 * multiple retries; else will return 0 in case of success.
3553 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3558 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3559 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3560 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3563 usleep_range(10, 20);
3565 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3572 * i40e_vsi_control_tx - Start or stop a VSI's rings
3573 * @vsi: the VSI being configured
3574 * @enable: start or stop the rings
3576 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3578 struct i40e_pf *pf = vsi->back;
3579 struct i40e_hw *hw = &pf->hw;
3580 int i, j, pf_q, ret = 0;
3583 pf_q = vsi->base_queue;
3584 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3586 /* warn the TX unit of coming changes */
3587 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3589 usleep_range(10, 20);
3591 for (j = 0; j < 50; j++) {
3592 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3593 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3594 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3596 usleep_range(1000, 2000);
3598 /* Skip if the queue is already in the requested state */
3599 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3602 /* turn on/off the queue */
3604 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3605 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3607 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3610 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3611 /* No waiting for the Tx queue to disable */
3612 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3615 /* wait for the change to finish */
3616 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3618 dev_info(&pf->pdev->dev,
3619 "%s: VSI seid %d Tx ring %d %sable timeout\n",
3620 __func__, vsi->seid, pf_q,
3621 (enable ? "en" : "dis"));
3626 if (hw->revision_id == 0)
3632 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3633 * @pf: the PF being configured
3634 * @pf_q: the PF queue
3635 * @enable: enable or disable state of the queue
3637 * This routine will wait for the given Rx queue of the PF to reach the
3638 * enabled or disabled state.
3639 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3640 * multiple retries; else will return 0 in case of success.
3642 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3647 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3648 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3649 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3652 usleep_range(10, 20);
3654 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3661 * i40e_vsi_control_rx - Start or stop a VSI's rings
3662 * @vsi: the VSI being configured
3663 * @enable: start or stop the rings
3665 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3667 struct i40e_pf *pf = vsi->back;
3668 struct i40e_hw *hw = &pf->hw;
3669 int i, j, pf_q, ret = 0;
3672 pf_q = vsi->base_queue;
3673 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3674 for (j = 0; j < 50; j++) {
3675 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3676 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3677 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3679 usleep_range(1000, 2000);
3682 /* Skip if the queue is already in the requested state */
3683 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3686 /* turn on/off the queue */
3688 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3690 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3691 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3693 /* wait for the change to finish */
3694 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3696 dev_info(&pf->pdev->dev,
3697 "%s: VSI seid %d Rx ring %d %sable timeout\n",
3698 __func__, vsi->seid, pf_q,
3699 (enable ? "en" : "dis"));
3708 * i40e_vsi_control_rings - Start or stop a VSI's rings
3709 * @vsi: the VSI being configured
3710 * @enable: start or stop the rings
3712 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3716 /* do rx first for enable and last for disable */
3718 ret = i40e_vsi_control_rx(vsi, request);
3721 ret = i40e_vsi_control_tx(vsi, request);
3723 /* Ignore return value, we need to shutdown whatever we can */
3724 i40e_vsi_control_tx(vsi, request);
3725 i40e_vsi_control_rx(vsi, request);
3732 * i40e_vsi_free_irq - Free the irq association with the OS
3733 * @vsi: the VSI being configured
3735 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3737 struct i40e_pf *pf = vsi->back;
3738 struct i40e_hw *hw = &pf->hw;
3739 int base = vsi->base_vector;
3743 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3744 if (!vsi->q_vectors)
3747 if (!vsi->irqs_ready)
3750 vsi->irqs_ready = false;
3751 for (i = 0; i < vsi->num_q_vectors; i++) {
3752 u16 vector = i + base;
3754 /* free only the irqs that were actually requested */
3755 if (!vsi->q_vectors[i] ||
3756 !vsi->q_vectors[i]->num_ringpairs)
3759 /* clear the affinity_mask in the IRQ descriptor */
3760 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3762 free_irq(pf->msix_entries[vector].vector,
3765 /* Tear down the interrupt queue link list
3767 * We know that they come in pairs and always
3768 * the Rx first, then the Tx. To clear the
3769 * link list, stick the EOL value into the
3770 * next_q field of the registers.
3772 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3773 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3774 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3775 val |= I40E_QUEUE_END_OF_LIST
3776 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3777 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3779 while (qp != I40E_QUEUE_END_OF_LIST) {
3782 val = rd32(hw, I40E_QINT_RQCTL(qp));
3784 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3785 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3786 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3787 I40E_QINT_RQCTL_INTEVENT_MASK);
3789 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3790 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3792 wr32(hw, I40E_QINT_RQCTL(qp), val);
3794 val = rd32(hw, I40E_QINT_TQCTL(qp));
3796 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3797 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3799 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3800 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3801 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3802 I40E_QINT_TQCTL_INTEVENT_MASK);
3804 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3805 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3807 wr32(hw, I40E_QINT_TQCTL(qp), val);
3812 free_irq(pf->pdev->irq, pf);
3814 val = rd32(hw, I40E_PFINT_LNKLST0);
3815 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3816 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3817 val |= I40E_QUEUE_END_OF_LIST
3818 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3819 wr32(hw, I40E_PFINT_LNKLST0, val);
3821 val = rd32(hw, I40E_QINT_RQCTL(qp));
3822 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3823 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3824 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3825 I40E_QINT_RQCTL_INTEVENT_MASK);
3827 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3828 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3830 wr32(hw, I40E_QINT_RQCTL(qp), val);
3832 val = rd32(hw, I40E_QINT_TQCTL(qp));
3834 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3835 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3836 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3837 I40E_QINT_TQCTL_INTEVENT_MASK);
3839 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3840 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3842 wr32(hw, I40E_QINT_TQCTL(qp), val);
3847 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3848 * @vsi: the VSI being configured
3849 * @v_idx: Index of vector to be freed
3851 * This function frees the memory allocated to the q_vector. In addition if
3852 * NAPI is enabled it will delete any references to the NAPI struct prior
3853 * to freeing the q_vector.
3855 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3857 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3858 struct i40e_ring *ring;
3863 /* disassociate q_vector from rings */
3864 i40e_for_each_ring(ring, q_vector->tx)
3865 ring->q_vector = NULL;
3867 i40e_for_each_ring(ring, q_vector->rx)
3868 ring->q_vector = NULL;
3870 /* only VSI w/ an associated netdev is set up w/ NAPI */
3872 netif_napi_del(&q_vector->napi);
3874 vsi->q_vectors[v_idx] = NULL;
3876 kfree_rcu(q_vector, rcu);
3880 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3881 * @vsi: the VSI being un-configured
3883 * This frees the memory allocated to the q_vectors and
3884 * deletes references to the NAPI struct.
3886 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3890 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3891 i40e_free_q_vector(vsi, v_idx);
3895 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3896 * @pf: board private structure
3898 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3900 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3901 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3902 pci_disable_msix(pf->pdev);
3903 kfree(pf->msix_entries);
3904 pf->msix_entries = NULL;
3905 kfree(pf->irq_pile);
3906 pf->irq_pile = NULL;
3907 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3908 pci_disable_msi(pf->pdev);
3910 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3914 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3915 * @pf: board private structure
3917 * We go through and clear interrupt specific resources and reset the structure
3918 * to pre-load conditions
3920 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3924 i40e_stop_misc_vector(pf);
3925 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3926 synchronize_irq(pf->msix_entries[0].vector);
3927 free_irq(pf->msix_entries[0].vector, pf);
3930 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3931 for (i = 0; i < pf->num_alloc_vsi; i++)
3933 i40e_vsi_free_q_vectors(pf->vsi[i]);
3934 i40e_reset_interrupt_capability(pf);
3938 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3939 * @vsi: the VSI being configured
3941 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3948 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3949 napi_enable(&vsi->q_vectors[q_idx]->napi);
3953 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3954 * @vsi: the VSI being configured
3956 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3963 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3964 napi_disable(&vsi->q_vectors[q_idx]->napi);
3968 * i40e_vsi_close - Shut down a VSI
3969 * @vsi: the vsi to be quelled
3971 static void i40e_vsi_close(struct i40e_vsi *vsi)
3973 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
3975 i40e_vsi_free_irq(vsi);
3976 i40e_vsi_free_tx_resources(vsi);
3977 i40e_vsi_free_rx_resources(vsi);
3981 * i40e_quiesce_vsi - Pause a given VSI
3982 * @vsi: the VSI being paused
3984 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
3986 if (test_bit(__I40E_DOWN, &vsi->state))
3989 /* No need to disable FCoE VSI when Tx suspended */
3990 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
3991 vsi->type == I40E_VSI_FCOE) {
3992 dev_dbg(&vsi->back->pdev->dev,
3993 "%s: VSI seid %d skipping FCoE VSI disable\n",
3994 __func__, vsi->seid);
3998 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
3999 if (vsi->netdev && netif_running(vsi->netdev)) {
4000 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4002 i40e_vsi_close(vsi);
4007 * i40e_unquiesce_vsi - Resume a given VSI
4008 * @vsi: the VSI being resumed
4010 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4012 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4015 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4016 if (vsi->netdev && netif_running(vsi->netdev))
4017 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4019 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4023 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4026 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4030 for (v = 0; v < pf->num_alloc_vsi; v++) {
4032 i40e_quiesce_vsi(pf->vsi[v]);
4037 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4040 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4044 for (v = 0; v < pf->num_alloc_vsi; v++) {
4046 i40e_unquiesce_vsi(pf->vsi[v]);
4050 #ifdef CONFIG_I40E_DCB
4052 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4053 * @vsi: the VSI being configured
4055 * This function waits for the given VSI's Tx queues to be disabled.
4057 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4059 struct i40e_pf *pf = vsi->back;
4062 pf_q = vsi->base_queue;
4063 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4064 /* Check and wait for the disable status of the queue */
4065 ret = i40e_pf_txq_wait(pf, pf_q, false);
4067 dev_info(&pf->pdev->dev,
4068 "%s: VSI seid %d Tx ring %d disable timeout\n",
4069 __func__, vsi->seid, pf_q);
4078 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4081 * This function waits for the Tx queues to be in disabled state for all the
4082 * VSIs that are managed by this PF.
4084 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4088 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4089 /* No need to wait for FCoE VSI queues */
4090 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4091 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4102 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4103 * @pf: pointer to PF
4105 * Get TC map for ISCSI PF type that will include iSCSI TC
4108 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4110 struct i40e_dcb_app_priority_table app;
4111 struct i40e_hw *hw = &pf->hw;
4112 u8 enabled_tc = 1; /* TC0 is always enabled */
4114 /* Get the iSCSI APP TLV */
4115 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4117 for (i = 0; i < dcbcfg->numapps; i++) {
4118 app = dcbcfg->app[i];
4119 if (app.selector == I40E_APP_SEL_TCPIP &&
4120 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4121 tc = dcbcfg->etscfg.prioritytable[app.priority];
4122 enabled_tc |= BIT_ULL(tc);
4131 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4132 * @dcbcfg: the corresponding DCBx configuration structure
4134 * Return the number of TCs from given DCBx configuration
4136 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4141 /* Scan the ETS Config Priority Table to find
4142 * traffic class enabled for a given priority
4143 * and use the traffic class index to get the
4144 * number of traffic classes enabled
4146 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4147 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4148 num_tc = dcbcfg->etscfg.prioritytable[i];
4151 /* Traffic class index starts from zero so
4152 * increment to return the actual count
4158 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4159 * @dcbcfg: the corresponding DCBx configuration structure
4161 * Query the current DCB configuration and return the number of
4162 * traffic classes enabled from the given DCBX config
4164 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4166 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4170 for (i = 0; i < num_tc; i++)
4171 enabled_tc |= BIT(i);
4177 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4178 * @pf: PF being queried
4180 * Return number of traffic classes enabled for the given PF
4182 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4184 struct i40e_hw *hw = &pf->hw;
4187 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4189 /* If DCB is not enabled then always in single TC */
4190 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4193 /* SFP mode will be enabled for all TCs on port */
4194 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4195 return i40e_dcb_get_num_tc(dcbcfg);
4197 /* MFP mode return count of enabled TCs for this PF */
4198 if (pf->hw.func_caps.iscsi)
4199 enabled_tc = i40e_get_iscsi_tc_map(pf);
4201 return 1; /* Only TC0 */
4203 /* At least have TC0 */
4204 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4205 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4206 if (enabled_tc & BIT_ULL(i))
4213 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4214 * @pf: PF being queried
4216 * Return a bitmap for first enabled traffic class for this PF.
4218 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4220 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4224 return 0x1; /* TC0 */
4226 /* Find the first enabled TC */
4227 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4228 if (enabled_tc & BIT_ULL(i))
4236 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4237 * @pf: PF being queried
4239 * Return a bitmap for enabled traffic classes for this PF.
4241 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4243 /* If DCB is not enabled for this PF then just return default TC */
4244 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4245 return i40e_pf_get_default_tc(pf);
4247 /* SFP mode we want PF to be enabled for all TCs */
4248 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4249 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4251 /* MFP enabled and iSCSI PF type */
4252 if (pf->hw.func_caps.iscsi)
4253 return i40e_get_iscsi_tc_map(pf);
4255 return i40e_pf_get_default_tc(pf);
4259 * i40e_vsi_get_bw_info - Query VSI BW Information
4260 * @vsi: the VSI being queried
4262 * Returns 0 on success, negative value on failure
4264 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4266 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4267 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4268 struct i40e_pf *pf = vsi->back;
4269 struct i40e_hw *hw = &pf->hw;
4274 /* Get the VSI level BW configuration */
4275 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4277 dev_info(&pf->pdev->dev,
4278 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4279 i40e_stat_str(&pf->hw, ret),
4280 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4284 /* Get the VSI level BW configuration per TC */
4285 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4288 dev_info(&pf->pdev->dev,
4289 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4290 i40e_stat_str(&pf->hw, ret),
4291 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4295 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4296 dev_info(&pf->pdev->dev,
4297 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4298 bw_config.tc_valid_bits,
4299 bw_ets_config.tc_valid_bits);
4300 /* Still continuing */
4303 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4304 vsi->bw_max_quanta = bw_config.max_bw;
4305 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4306 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4307 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4308 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4309 vsi->bw_ets_limit_credits[i] =
4310 le16_to_cpu(bw_ets_config.credits[i]);
4311 /* 3 bits out of 4 for each TC */
4312 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4319 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4320 * @vsi: the VSI being configured
4321 * @enabled_tc: TC bitmap
4322 * @bw_credits: BW shared credits per TC
4324 * Returns 0 on success, negative value on failure
4326 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4329 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4333 bw_data.tc_valid_bits = enabled_tc;
4334 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4335 bw_data.tc_bw_credits[i] = bw_share[i];
4337 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4340 dev_info(&vsi->back->pdev->dev,
4341 "AQ command Config VSI BW allocation per TC failed = %d\n",
4342 vsi->back->hw.aq.asq_last_status);
4346 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4347 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4353 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4354 * @vsi: the VSI being configured
4355 * @enabled_tc: TC map to be enabled
4358 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4360 struct net_device *netdev = vsi->netdev;
4361 struct i40e_pf *pf = vsi->back;
4362 struct i40e_hw *hw = &pf->hw;
4365 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4371 netdev_reset_tc(netdev);
4375 /* Set up actual enabled TCs on the VSI */
4376 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4379 /* set per TC queues for the VSI */
4380 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4381 /* Only set TC queues for enabled tcs
4383 * e.g. For a VSI that has TC0 and TC3 enabled the
4384 * enabled_tc bitmap would be 0x00001001; the driver
4385 * will set the numtc for netdev as 2 that will be
4386 * referenced by the netdev layer as TC 0 and 1.
4388 if (vsi->tc_config.enabled_tc & BIT_ULL(i))
4389 netdev_set_tc_queue(netdev,
4390 vsi->tc_config.tc_info[i].netdev_tc,
4391 vsi->tc_config.tc_info[i].qcount,
4392 vsi->tc_config.tc_info[i].qoffset);
4395 /* Assign UP2TC map for the VSI */
4396 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4397 /* Get the actual TC# for the UP */
4398 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4399 /* Get the mapped netdev TC# for the UP */
4400 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4401 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4406 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4407 * @vsi: the VSI being configured
4408 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4410 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4411 struct i40e_vsi_context *ctxt)
4413 /* copy just the sections touched not the entire info
4414 * since not all sections are valid as returned by
4417 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4418 memcpy(&vsi->info.queue_mapping,
4419 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4420 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4421 sizeof(vsi->info.tc_mapping));
4425 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4426 * @vsi: VSI to be configured
4427 * @enabled_tc: TC bitmap
4429 * This configures a particular VSI for TCs that are mapped to the
4430 * given TC bitmap. It uses default bandwidth share for TCs across
4431 * VSIs to configure TC for a particular VSI.
4434 * It is expected that the VSI queues have been quisced before calling
4437 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4439 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4440 struct i40e_vsi_context ctxt;
4444 /* Check if enabled_tc is same as existing or new TCs */
4445 if (vsi->tc_config.enabled_tc == enabled_tc)
4448 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4449 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4450 if (enabled_tc & BIT_ULL(i))
4454 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4456 dev_info(&vsi->back->pdev->dev,
4457 "Failed configuring TC map %d for VSI %d\n",
4458 enabled_tc, vsi->seid);
4462 /* Update Queue Pairs Mapping for currently enabled UPs */
4463 ctxt.seid = vsi->seid;
4464 ctxt.pf_num = vsi->back->hw.pf_id;
4466 ctxt.uplink_seid = vsi->uplink_seid;
4467 ctxt.info = vsi->info;
4468 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4470 /* Update the VSI after updating the VSI queue-mapping information */
4471 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4473 dev_info(&vsi->back->pdev->dev,
4474 "Update vsi tc config failed, err %s aq_err %s\n",
4475 i40e_stat_str(&vsi->back->hw, ret),
4476 i40e_aq_str(&vsi->back->hw,
4477 vsi->back->hw.aq.asq_last_status));
4480 /* update the local VSI info with updated queue map */
4481 i40e_vsi_update_queue_map(vsi, &ctxt);
4482 vsi->info.valid_sections = 0;
4484 /* Update current VSI BW information */
4485 ret = i40e_vsi_get_bw_info(vsi);
4487 dev_info(&vsi->back->pdev->dev,
4488 "Failed updating vsi bw info, err %s aq_err %s\n",
4489 i40e_stat_str(&vsi->back->hw, ret),
4490 i40e_aq_str(&vsi->back->hw,
4491 vsi->back->hw.aq.asq_last_status));
4495 /* Update the netdev TC setup */
4496 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4502 * i40e_veb_config_tc - Configure TCs for given VEB
4504 * @enabled_tc: TC bitmap
4506 * Configures given TC bitmap for VEB (switching) element
4508 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4510 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4511 struct i40e_pf *pf = veb->pf;
4515 /* No TCs or already enabled TCs just return */
4516 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4519 bw_data.tc_valid_bits = enabled_tc;
4520 /* bw_data.absolute_credits is not set (relative) */
4522 /* Enable ETS TCs with equal BW Share for now */
4523 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4524 if (enabled_tc & BIT_ULL(i))
4525 bw_data.tc_bw_share_credits[i] = 1;
4528 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4531 dev_info(&pf->pdev->dev,
4532 "VEB bw config failed, err %s aq_err %s\n",
4533 i40e_stat_str(&pf->hw, ret),
4534 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4538 /* Update the BW information */
4539 ret = i40e_veb_get_bw_info(veb);
4541 dev_info(&pf->pdev->dev,
4542 "Failed getting veb bw config, err %s aq_err %s\n",
4543 i40e_stat_str(&pf->hw, ret),
4544 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4551 #ifdef CONFIG_I40E_DCB
4553 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4556 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4557 * the caller would've quiesce all the VSIs before calling
4560 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4566 /* Enable the TCs available on PF to all VEBs */
4567 tc_map = i40e_pf_get_tc_map(pf);
4568 for (v = 0; v < I40E_MAX_VEB; v++) {
4571 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4573 dev_info(&pf->pdev->dev,
4574 "Failed configuring TC for VEB seid=%d\n",
4576 /* Will try to configure as many components */
4580 /* Update each VSI */
4581 for (v = 0; v < pf->num_alloc_vsi; v++) {
4585 /* - Enable all TCs for the LAN VSI
4587 * - For FCoE VSI only enable the TC configured
4588 * as per the APP TLV
4590 * - For all others keep them at TC0 for now
4592 if (v == pf->lan_vsi)
4593 tc_map = i40e_pf_get_tc_map(pf);
4595 tc_map = i40e_pf_get_default_tc(pf);
4597 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4598 tc_map = i40e_get_fcoe_tc_map(pf);
4599 #endif /* #ifdef I40E_FCOE */
4601 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4603 dev_info(&pf->pdev->dev,
4604 "Failed configuring TC for VSI seid=%d\n",
4606 /* Will try to configure as many components */
4608 /* Re-configure VSI vectors based on updated TC map */
4609 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4610 if (pf->vsi[v]->netdev)
4611 i40e_dcbnl_set_all(pf->vsi[v]);
4617 * i40e_resume_port_tx - Resume port Tx
4620 * Resume a port's Tx and issue a PF reset in case of failure to
4623 static int i40e_resume_port_tx(struct i40e_pf *pf)
4625 struct i40e_hw *hw = &pf->hw;
4628 ret = i40e_aq_resume_port_tx(hw, NULL);
4630 dev_info(&pf->pdev->dev,
4631 "Resume Port Tx failed, err %s aq_err %s\n",
4632 i40e_stat_str(&pf->hw, ret),
4633 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4634 /* Schedule PF reset to recover */
4635 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4636 i40e_service_event_schedule(pf);
4643 * i40e_init_pf_dcb - Initialize DCB configuration
4644 * @pf: PF being configured
4646 * Query the current DCB configuration and cache it
4647 * in the hardware structure
4649 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4651 struct i40e_hw *hw = &pf->hw;
4654 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
4655 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
4656 (pf->hw.aq.fw_maj_ver < 4))
4659 /* Get the initial DCB configuration */
4660 err = i40e_init_dcb(hw);
4662 /* Device/Function is not DCBX capable */
4663 if ((!hw->func_caps.dcb) ||
4664 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4665 dev_info(&pf->pdev->dev,
4666 "DCBX offload is not supported or is disabled for this PF.\n");
4668 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4672 /* When status is not DISABLED then DCBX in FW */
4673 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4674 DCB_CAP_DCBX_VER_IEEE;
4676 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4677 /* Enable DCB tagging only when more than one TC */
4678 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4679 pf->flags |= I40E_FLAG_DCB_ENABLED;
4680 dev_dbg(&pf->pdev->dev,
4681 "DCBX offload is supported for this PF.\n");
4684 dev_info(&pf->pdev->dev,
4685 "Query for DCB configuration failed, err %s aq_err %s\n",
4686 i40e_stat_str(&pf->hw, err),
4687 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4693 #endif /* CONFIG_I40E_DCB */
4694 #define SPEED_SIZE 14
4697 * i40e_print_link_message - print link up or down
4698 * @vsi: the VSI for which link needs a message
4700 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4702 char speed[SPEED_SIZE] = "Unknown";
4703 char fc[FC_SIZE] = "RX/TX";
4706 netdev_info(vsi->netdev, "NIC Link is Down\n");
4710 /* Warn user if link speed on NPAR enabled partition is not at
4713 if (vsi->back->hw.func_caps.npar_enable &&
4714 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
4715 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
4716 netdev_warn(vsi->netdev,
4717 "The partition detected link speed that is less than 10Gbps\n");
4719 switch (vsi->back->hw.phy.link_info.link_speed) {
4720 case I40E_LINK_SPEED_40GB:
4721 strlcpy(speed, "40 Gbps", SPEED_SIZE);
4723 case I40E_LINK_SPEED_20GB:
4724 strncpy(speed, "20 Gbps", SPEED_SIZE);
4726 case I40E_LINK_SPEED_10GB:
4727 strlcpy(speed, "10 Gbps", SPEED_SIZE);
4729 case I40E_LINK_SPEED_1GB:
4730 strlcpy(speed, "1000 Mbps", SPEED_SIZE);
4732 case I40E_LINK_SPEED_100MB:
4733 strncpy(speed, "100 Mbps", SPEED_SIZE);
4739 switch (vsi->back->hw.fc.current_mode) {
4741 strlcpy(fc, "RX/TX", FC_SIZE);
4743 case I40E_FC_TX_PAUSE:
4744 strlcpy(fc, "TX", FC_SIZE);
4746 case I40E_FC_RX_PAUSE:
4747 strlcpy(fc, "RX", FC_SIZE);
4750 strlcpy(fc, "None", FC_SIZE);
4754 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4759 * i40e_up_complete - Finish the last steps of bringing up a connection
4760 * @vsi: the VSI being configured
4762 static int i40e_up_complete(struct i40e_vsi *vsi)
4764 struct i40e_pf *pf = vsi->back;
4767 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4768 i40e_vsi_configure_msix(vsi);
4770 i40e_configure_msi_and_legacy(vsi);
4773 err = i40e_vsi_control_rings(vsi, true);
4777 clear_bit(__I40E_DOWN, &vsi->state);
4778 i40e_napi_enable_all(vsi);
4779 i40e_vsi_enable_irq(vsi);
4781 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4783 i40e_print_link_message(vsi, true);
4784 netif_tx_start_all_queues(vsi->netdev);
4785 netif_carrier_on(vsi->netdev);
4786 } else if (vsi->netdev) {
4787 i40e_print_link_message(vsi, false);
4788 /* need to check for qualified module here*/
4789 if ((pf->hw.phy.link_info.link_info &
4790 I40E_AQ_MEDIA_AVAILABLE) &&
4791 (!(pf->hw.phy.link_info.an_info &
4792 I40E_AQ_QUALIFIED_MODULE)))
4793 netdev_err(vsi->netdev,
4794 "the driver failed to link because an unqualified module was detected.");
4797 /* replay FDIR SB filters */
4798 if (vsi->type == I40E_VSI_FDIR) {
4799 /* reset fd counters */
4800 pf->fd_add_err = pf->fd_atr_cnt = 0;
4801 if (pf->fd_tcp_rule > 0) {
4802 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4803 if (I40E_DEBUG_FD & pf->hw.debug_mask)
4804 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4805 pf->fd_tcp_rule = 0;
4807 i40e_fdir_filter_restore(vsi);
4809 i40e_service_event_schedule(pf);
4815 * i40e_vsi_reinit_locked - Reset the VSI
4816 * @vsi: the VSI being configured
4818 * Rebuild the ring structs after some configuration
4819 * has changed, e.g. MTU size.
4821 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4823 struct i40e_pf *pf = vsi->back;
4825 WARN_ON(in_interrupt());
4826 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4827 usleep_range(1000, 2000);
4830 /* Give a VF some time to respond to the reset. The
4831 * two second wait is based upon the watchdog cycle in
4834 if (vsi->type == I40E_VSI_SRIOV)
4837 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4841 * i40e_up - Bring the connection back up after being down
4842 * @vsi: the VSI being configured
4844 int i40e_up(struct i40e_vsi *vsi)
4848 err = i40e_vsi_configure(vsi);
4850 err = i40e_up_complete(vsi);
4856 * i40e_down - Shutdown the connection processing
4857 * @vsi: the VSI being stopped
4859 void i40e_down(struct i40e_vsi *vsi)
4863 /* It is assumed that the caller of this function
4864 * sets the vsi->state __I40E_DOWN bit.
4867 netif_carrier_off(vsi->netdev);
4868 netif_tx_disable(vsi->netdev);
4870 i40e_vsi_disable_irq(vsi);
4871 i40e_vsi_control_rings(vsi, false);
4872 i40e_napi_disable_all(vsi);
4874 for (i = 0; i < vsi->num_queue_pairs; i++) {
4875 i40e_clean_tx_ring(vsi->tx_rings[i]);
4876 i40e_clean_rx_ring(vsi->rx_rings[i]);
4881 * i40e_setup_tc - configure multiple traffic classes
4882 * @netdev: net device to configure
4883 * @tc: number of traffic classes to enable
4886 int i40e_setup_tc(struct net_device *netdev, u8 tc)
4888 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
4891 struct i40e_netdev_priv *np = netdev_priv(netdev);
4892 struct i40e_vsi *vsi = np->vsi;
4893 struct i40e_pf *pf = vsi->back;
4898 /* Check if DCB enabled to continue */
4899 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
4900 netdev_info(netdev, "DCB is not enabled for adapter\n");
4904 /* Check if MFP enabled */
4905 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4906 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
4910 /* Check whether tc count is within enabled limit */
4911 if (tc > i40e_pf_get_num_tc(pf)) {
4912 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
4916 /* Generate TC map for number of tc requested */
4917 for (i = 0; i < tc; i++)
4918 enabled_tc |= BIT_ULL(i);
4920 /* Requesting same TC configuration as already enabled */
4921 if (enabled_tc == vsi->tc_config.enabled_tc)
4924 /* Quiesce VSI queues */
4925 i40e_quiesce_vsi(vsi);
4927 /* Configure VSI for enabled TCs */
4928 ret = i40e_vsi_config_tc(vsi, enabled_tc);
4930 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
4936 i40e_unquiesce_vsi(vsi);
4943 * i40e_open - Called when a network interface is made active
4944 * @netdev: network interface device structure
4946 * The open entry point is called when a network interface is made
4947 * active by the system (IFF_UP). At this point all resources needed
4948 * for transmit and receive operations are allocated, the interrupt
4949 * handler is registered with the OS, the netdev watchdog subtask is
4950 * enabled, and the stack is notified that the interface is ready.
4952 * Returns 0 on success, negative value on failure
4954 int i40e_open(struct net_device *netdev)
4956 struct i40e_netdev_priv *np = netdev_priv(netdev);
4957 struct i40e_vsi *vsi = np->vsi;
4958 struct i40e_pf *pf = vsi->back;
4961 /* disallow open during test or if eeprom is broken */
4962 if (test_bit(__I40E_TESTING, &pf->state) ||
4963 test_bit(__I40E_BAD_EEPROM, &pf->state))
4966 netif_carrier_off(netdev);
4968 err = i40e_vsi_open(vsi);
4972 /* configure global TSO hardware offload settings */
4973 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
4974 TCP_FLAG_FIN) >> 16);
4975 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
4977 TCP_FLAG_CWR) >> 16);
4978 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
4980 #ifdef CONFIG_I40E_VXLAN
4981 vxlan_get_rx_port(netdev);
4989 * @vsi: the VSI to open
4991 * Finish initialization of the VSI.
4993 * Returns 0 on success, negative value on failure
4995 int i40e_vsi_open(struct i40e_vsi *vsi)
4997 struct i40e_pf *pf = vsi->back;
4998 char int_name[I40E_INT_NAME_STR_LEN];
5001 /* allocate descriptors */
5002 err = i40e_vsi_setup_tx_resources(vsi);
5005 err = i40e_vsi_setup_rx_resources(vsi);
5009 err = i40e_vsi_configure(vsi);
5014 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5015 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5016 err = i40e_vsi_request_irq(vsi, int_name);
5020 /* Notify the stack of the actual queue counts. */
5021 err = netif_set_real_num_tx_queues(vsi->netdev,
5022 vsi->num_queue_pairs);
5024 goto err_set_queues;
5026 err = netif_set_real_num_rx_queues(vsi->netdev,
5027 vsi->num_queue_pairs);
5029 goto err_set_queues;
5031 } else if (vsi->type == I40E_VSI_FDIR) {
5032 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5033 dev_driver_string(&pf->pdev->dev),
5034 dev_name(&pf->pdev->dev));
5035 err = i40e_vsi_request_irq(vsi, int_name);
5042 err = i40e_up_complete(vsi);
5044 goto err_up_complete;
5051 i40e_vsi_free_irq(vsi);
5053 i40e_vsi_free_rx_resources(vsi);
5055 i40e_vsi_free_tx_resources(vsi);
5056 if (vsi == pf->vsi[pf->lan_vsi])
5057 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5063 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5064 * @pf: Pointer to PF
5066 * This function destroys the hlist where all the Flow Director
5067 * filters were saved.
5069 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5071 struct i40e_fdir_filter *filter;
5072 struct hlist_node *node2;
5074 hlist_for_each_entry_safe(filter, node2,
5075 &pf->fdir_filter_list, fdir_node) {
5076 hlist_del(&filter->fdir_node);
5079 pf->fdir_pf_active_filters = 0;
5083 * i40e_close - Disables a network interface
5084 * @netdev: network interface device structure
5086 * The close entry point is called when an interface is de-activated
5087 * by the OS. The hardware is still under the driver's control, but
5088 * this netdev interface is disabled.
5090 * Returns 0, this is not allowed to fail
5093 int i40e_close(struct net_device *netdev)
5095 static int i40e_close(struct net_device *netdev)
5098 struct i40e_netdev_priv *np = netdev_priv(netdev);
5099 struct i40e_vsi *vsi = np->vsi;
5101 i40e_vsi_close(vsi);
5107 * i40e_do_reset - Start a PF or Core Reset sequence
5108 * @pf: board private structure
5109 * @reset_flags: which reset is requested
5111 * The essential difference in resets is that the PF Reset
5112 * doesn't clear the packet buffers, doesn't reset the PE
5113 * firmware, and doesn't bother the other PFs on the chip.
5115 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5119 WARN_ON(in_interrupt());
5121 if (i40e_check_asq_alive(&pf->hw))
5122 i40e_vc_notify_reset(pf);
5124 /* do the biggest reset indicated */
5125 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5127 /* Request a Global Reset
5129 * This will start the chip's countdown to the actual full
5130 * chip reset event, and a warning interrupt to be sent
5131 * to all PFs, including the requestor. Our handler
5132 * for the warning interrupt will deal with the shutdown
5133 * and recovery of the switch setup.
5135 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5136 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5137 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5138 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5140 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5142 /* Request a Core Reset
5144 * Same as Global Reset, except does *not* include the MAC/PHY
5146 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5147 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5148 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5149 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5150 i40e_flush(&pf->hw);
5152 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5154 /* Request a PF Reset
5156 * Resets only the PF-specific registers
5158 * This goes directly to the tear-down and rebuild of
5159 * the switch, since we need to do all the recovery as
5160 * for the Core Reset.
5162 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5163 i40e_handle_reset_warning(pf);
5165 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5168 /* Find the VSI(s) that requested a re-init */
5169 dev_info(&pf->pdev->dev,
5170 "VSI reinit requested\n");
5171 for (v = 0; v < pf->num_alloc_vsi; v++) {
5172 struct i40e_vsi *vsi = pf->vsi[v];
5174 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5175 i40e_vsi_reinit_locked(pf->vsi[v]);
5176 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5180 /* no further action needed, so return now */
5182 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5185 /* Find the VSI(s) that needs to be brought down */
5186 dev_info(&pf->pdev->dev, "VSI down requested\n");
5187 for (v = 0; v < pf->num_alloc_vsi; v++) {
5188 struct i40e_vsi *vsi = pf->vsi[v];
5190 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5191 set_bit(__I40E_DOWN, &vsi->state);
5193 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5197 /* no further action needed, so return now */
5200 dev_info(&pf->pdev->dev,
5201 "bad reset request 0x%08x\n", reset_flags);
5206 #ifdef CONFIG_I40E_DCB
5208 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5209 * @pf: board private structure
5210 * @old_cfg: current DCB config
5211 * @new_cfg: new DCB config
5213 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5214 struct i40e_dcbx_config *old_cfg,
5215 struct i40e_dcbx_config *new_cfg)
5217 bool need_reconfig = false;
5219 /* Check if ETS configuration has changed */
5220 if (memcmp(&new_cfg->etscfg,
5222 sizeof(new_cfg->etscfg))) {
5223 /* If Priority Table has changed reconfig is needed */
5224 if (memcmp(&new_cfg->etscfg.prioritytable,
5225 &old_cfg->etscfg.prioritytable,
5226 sizeof(new_cfg->etscfg.prioritytable))) {
5227 need_reconfig = true;
5228 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5231 if (memcmp(&new_cfg->etscfg.tcbwtable,
5232 &old_cfg->etscfg.tcbwtable,
5233 sizeof(new_cfg->etscfg.tcbwtable)))
5234 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5236 if (memcmp(&new_cfg->etscfg.tsatable,
5237 &old_cfg->etscfg.tsatable,
5238 sizeof(new_cfg->etscfg.tsatable)))
5239 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5242 /* Check if PFC configuration has changed */
5243 if (memcmp(&new_cfg->pfc,
5245 sizeof(new_cfg->pfc))) {
5246 need_reconfig = true;
5247 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5250 /* Check if APP Table has changed */
5251 if (memcmp(&new_cfg->app,
5253 sizeof(new_cfg->app))) {
5254 need_reconfig = true;
5255 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5258 dev_dbg(&pf->pdev->dev, "%s: need_reconfig=%d\n", __func__,
5260 return need_reconfig;
5264 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5265 * @pf: board private structure
5266 * @e: event info posted on ARQ
5268 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5269 struct i40e_arq_event_info *e)
5271 struct i40e_aqc_lldp_get_mib *mib =
5272 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5273 struct i40e_hw *hw = &pf->hw;
5274 struct i40e_dcbx_config tmp_dcbx_cfg;
5275 bool need_reconfig = false;
5279 /* Not DCB capable or capability disabled */
5280 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5283 /* Ignore if event is not for Nearest Bridge */
5284 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5285 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5286 dev_dbg(&pf->pdev->dev,
5287 "%s: LLDP event mib bridge type 0x%x\n", __func__, type);
5288 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5291 /* Check MIB Type and return if event for Remote MIB update */
5292 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5293 dev_dbg(&pf->pdev->dev,
5294 "%s: LLDP event mib type %s\n", __func__,
5295 type ? "remote" : "local");
5296 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5297 /* Update the remote cached instance and return */
5298 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5299 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5300 &hw->remote_dcbx_config);
5304 /* Store the old configuration */
5305 tmp_dcbx_cfg = hw->local_dcbx_config;
5307 /* Reset the old DCBx configuration data */
5308 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5309 /* Get updated DCBX data from firmware */
5310 ret = i40e_get_dcb_config(&pf->hw);
5312 dev_info(&pf->pdev->dev,
5313 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5314 i40e_stat_str(&pf->hw, ret),
5315 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5319 /* No change detected in DCBX configs */
5320 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5321 sizeof(tmp_dcbx_cfg))) {
5322 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5326 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5327 &hw->local_dcbx_config);
5329 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5334 /* Enable DCB tagging only when more than one TC */
5335 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5336 pf->flags |= I40E_FLAG_DCB_ENABLED;
5338 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5340 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5341 /* Reconfiguration needed quiesce all VSIs */
5342 i40e_pf_quiesce_all_vsi(pf);
5344 /* Changes in configuration update VEB/VSI */
5345 i40e_dcb_reconfigure(pf);
5347 ret = i40e_resume_port_tx(pf);
5349 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5350 /* In case of error no point in resuming VSIs */
5354 /* Wait for the PF's Tx queues to be disabled */
5355 ret = i40e_pf_wait_txq_disabled(pf);
5357 /* Schedule PF reset to recover */
5358 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5359 i40e_service_event_schedule(pf);
5361 i40e_pf_unquiesce_all_vsi(pf);
5367 #endif /* CONFIG_I40E_DCB */
5370 * i40e_do_reset_safe - Protected reset path for userland calls.
5371 * @pf: board private structure
5372 * @reset_flags: which reset is requested
5375 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5378 i40e_do_reset(pf, reset_flags);
5383 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5384 * @pf: board private structure
5385 * @e: event info posted on ARQ
5387 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5390 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5391 struct i40e_arq_event_info *e)
5393 struct i40e_aqc_lan_overflow *data =
5394 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5395 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5396 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5397 struct i40e_hw *hw = &pf->hw;
5401 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5404 /* Queue belongs to VF, find the VF and issue VF reset */
5405 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5406 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5407 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5408 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5409 vf_id -= hw->func_caps.vf_base_id;
5410 vf = &pf->vf[vf_id];
5411 i40e_vc_notify_vf_reset(vf);
5412 /* Allow VF to process pending reset notification */
5414 i40e_reset_vf(vf, false);
5419 * i40e_service_event_complete - Finish up the service event
5420 * @pf: board private structure
5422 static void i40e_service_event_complete(struct i40e_pf *pf)
5424 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5426 /* flush memory to make sure state is correct before next watchog */
5427 smp_mb__before_atomic();
5428 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5432 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5433 * @pf: board private structure
5435 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5439 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5440 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5445 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5446 * @pf: board private structure
5448 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5452 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5453 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5454 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5455 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5460 * i40e_get_global_fd_count - Get total FD filters programmed on device
5461 * @pf: board private structure
5463 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5467 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5468 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5469 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5470 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5475 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5476 * @pf: board private structure
5478 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5480 u32 fcnt_prog, fcnt_avail;
5482 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5485 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5488 fcnt_prog = i40e_get_global_fd_count(pf);
5489 fcnt_avail = pf->fdir_pf_filter_count;
5490 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5491 (pf->fd_add_err == 0) ||
5492 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5493 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5494 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5495 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5496 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5497 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5500 /* Wait for some more space to be available to turn on ATR */
5501 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5502 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5503 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5504 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5505 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5506 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5511 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5512 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5514 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5515 * @pf: board private structure
5517 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5519 unsigned long min_flush_time;
5520 int flush_wait_retry = 50;
5521 bool disable_atr = false;
5525 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5528 if (time_after(jiffies, pf->fd_flush_timestamp +
5529 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) {
5530 /* If the flush is happening too quick and we have mostly
5531 * SB rules we should not re-enable ATR for some time.
5533 min_flush_time = pf->fd_flush_timestamp
5534 + (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5535 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5537 if (!(time_after(jiffies, min_flush_time)) &&
5538 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5539 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5540 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5544 pf->fd_flush_timestamp = jiffies;
5545 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5546 /* flush all filters */
5547 wr32(&pf->hw, I40E_PFQF_CTL_1,
5548 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5549 i40e_flush(&pf->hw);
5553 /* Check FD flush status every 5-6msec */
5554 usleep_range(5000, 6000);
5555 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5556 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5558 } while (flush_wait_retry--);
5559 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5560 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5562 /* replay sideband filters */
5563 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5565 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5566 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5567 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5568 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5574 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5575 * @pf: board private structure
5577 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5579 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5582 /* We can see up to 256 filter programming desc in transit if the filters are
5583 * being applied really fast; before we see the first
5584 * filter miss error on Rx queue 0. Accumulating enough error messages before
5585 * reacting will make sure we don't cause flush too often.
5587 #define I40E_MAX_FD_PROGRAM_ERROR 256
5590 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5591 * @pf: board private structure
5593 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5596 /* if interface is down do nothing */
5597 if (test_bit(__I40E_DOWN, &pf->state))
5600 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5603 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5604 i40e_fdir_flush_and_replay(pf);
5606 i40e_fdir_check_and_reenable(pf);
5611 * i40e_vsi_link_event - notify VSI of a link event
5612 * @vsi: vsi to be notified
5613 * @link_up: link up or down
5615 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5617 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5620 switch (vsi->type) {
5625 if (!vsi->netdev || !vsi->netdev_registered)
5629 netif_carrier_on(vsi->netdev);
5630 netif_tx_wake_all_queues(vsi->netdev);
5632 netif_carrier_off(vsi->netdev);
5633 netif_tx_stop_all_queues(vsi->netdev);
5637 case I40E_VSI_SRIOV:
5638 case I40E_VSI_VMDQ2:
5640 case I40E_VSI_MIRROR:
5642 /* there is no notification for other VSIs */
5648 * i40e_veb_link_event - notify elements on the veb of a link event
5649 * @veb: veb to be notified
5650 * @link_up: link up or down
5652 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5657 if (!veb || !veb->pf)
5661 /* depth first... */
5662 for (i = 0; i < I40E_MAX_VEB; i++)
5663 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5664 i40e_veb_link_event(pf->veb[i], link_up);
5666 /* ... now the local VSIs */
5667 for (i = 0; i < pf->num_alloc_vsi; i++)
5668 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5669 i40e_vsi_link_event(pf->vsi[i], link_up);
5673 * i40e_link_event - Update netif_carrier status
5674 * @pf: board private structure
5676 static void i40e_link_event(struct i40e_pf *pf)
5678 bool new_link, old_link;
5679 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5680 u8 new_link_speed, old_link_speed;
5682 /* set this to force the get_link_status call to refresh state */
5683 pf->hw.phy.get_link_info = true;
5685 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5686 new_link = i40e_get_link_status(&pf->hw);
5687 old_link_speed = pf->hw.phy.link_info_old.link_speed;
5688 new_link_speed = pf->hw.phy.link_info.link_speed;
5690 if (new_link == old_link &&
5691 new_link_speed == old_link_speed &&
5692 (test_bit(__I40E_DOWN, &vsi->state) ||
5693 new_link == netif_carrier_ok(vsi->netdev)))
5696 if (!test_bit(__I40E_DOWN, &vsi->state))
5697 i40e_print_link_message(vsi, new_link);
5699 /* Notify the base of the switch tree connected to
5700 * the link. Floating VEBs are not notified.
5702 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5703 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5705 i40e_vsi_link_event(vsi, new_link);
5708 i40e_vc_notify_link_state(pf);
5710 if (pf->flags & I40E_FLAG_PTP)
5711 i40e_ptp_set_increment(pf);
5715 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts
5716 * @pf: board private structure
5718 * Set the per-queue flags to request a check for stuck queues in the irq
5719 * clean functions, then force interrupts to be sure the irq clean is called.
5721 static void i40e_check_hang_subtask(struct i40e_pf *pf)
5725 /* If we're down or resetting, just bail */
5726 if (test_bit(__I40E_DOWN, &pf->state) ||
5727 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5730 /* for each VSI/netdev
5732 * set the check flag
5734 * force an interrupt
5736 for (v = 0; v < pf->num_alloc_vsi; v++) {
5737 struct i40e_vsi *vsi = pf->vsi[v];
5741 test_bit(__I40E_DOWN, &vsi->state) ||
5742 (vsi->netdev && !netif_carrier_ok(vsi->netdev)))
5745 for (i = 0; i < vsi->num_queue_pairs; i++) {
5746 set_check_for_tx_hang(vsi->tx_rings[i]);
5747 if (test_bit(__I40E_HANG_CHECK_ARMED,
5748 &vsi->tx_rings[i]->state))
5753 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
5754 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0,
5755 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
5756 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK |
5757 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK |
5758 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK |
5759 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK));
5761 u16 vec = vsi->base_vector - 1;
5762 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK |
5763 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK |
5764 I40E_PFINT_DYN_CTLN_ITR_INDX_MASK |
5765 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_MASK |
5766 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_MASK);
5767 for (i = 0; i < vsi->num_q_vectors; i++, vec++)
5768 wr32(&vsi->back->hw,
5769 I40E_PFINT_DYN_CTLN(vec), val);
5771 i40e_flush(&vsi->back->hw);
5777 * i40e_watchdog_subtask - periodic checks not using event driven response
5778 * @pf: board private structure
5780 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5784 /* if interface is down do nothing */
5785 if (test_bit(__I40E_DOWN, &pf->state) ||
5786 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5789 /* make sure we don't do these things too often */
5790 if (time_before(jiffies, (pf->service_timer_previous +
5791 pf->service_timer_period)))
5793 pf->service_timer_previous = jiffies;
5795 i40e_check_hang_subtask(pf);
5796 i40e_link_event(pf);
5798 /* Update the stats for active netdevs so the network stack
5799 * can look at updated numbers whenever it cares to
5801 for (i = 0; i < pf->num_alloc_vsi; i++)
5802 if (pf->vsi[i] && pf->vsi[i]->netdev)
5803 i40e_update_stats(pf->vsi[i]);
5805 /* Update the stats for the active switching components */
5806 for (i = 0; i < I40E_MAX_VEB; i++)
5808 i40e_update_veb_stats(pf->veb[i]);
5810 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5814 * i40e_reset_subtask - Set up for resetting the device and driver
5815 * @pf: board private structure
5817 static void i40e_reset_subtask(struct i40e_pf *pf)
5819 u32 reset_flags = 0;
5822 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5823 reset_flags |= BIT_ULL(__I40E_REINIT_REQUESTED);
5824 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5826 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5827 reset_flags |= BIT_ULL(__I40E_PF_RESET_REQUESTED);
5828 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5830 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5831 reset_flags |= BIT_ULL(__I40E_CORE_RESET_REQUESTED);
5832 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5834 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5835 reset_flags |= BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED);
5836 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5838 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5839 reset_flags |= BIT_ULL(__I40E_DOWN_REQUESTED);
5840 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5843 /* If there's a recovery already waiting, it takes
5844 * precedence before starting a new reset sequence.
5846 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5847 i40e_handle_reset_warning(pf);
5851 /* If we're already down or resetting, just bail */
5853 !test_bit(__I40E_DOWN, &pf->state) &&
5854 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5855 i40e_do_reset(pf, reset_flags);
5862 * i40e_handle_link_event - Handle link event
5863 * @pf: board private structure
5864 * @e: event info posted on ARQ
5866 static void i40e_handle_link_event(struct i40e_pf *pf,
5867 struct i40e_arq_event_info *e)
5869 struct i40e_hw *hw = &pf->hw;
5870 struct i40e_aqc_get_link_status *status =
5871 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5873 /* save off old link status information */
5874 hw->phy.link_info_old = hw->phy.link_info;
5876 /* Do a new status request to re-enable LSE reporting
5877 * and load new status information into the hw struct
5878 * This completely ignores any state information
5879 * in the ARQ event info, instead choosing to always
5880 * issue the AQ update link status command.
5882 i40e_link_event(pf);
5884 /* check for unqualified module, if link is down */
5885 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5886 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5887 (!(status->link_info & I40E_AQ_LINK_UP)))
5888 dev_err(&pf->pdev->dev,
5889 "The driver failed to link because an unqualified module was detected.\n");
5893 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5894 * @pf: board private structure
5896 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
5898 struct i40e_arq_event_info event;
5899 struct i40e_hw *hw = &pf->hw;
5906 /* Do not run clean AQ when PF reset fails */
5907 if (test_bit(__I40E_RESET_FAILED, &pf->state))
5910 /* check for error indications */
5911 val = rd32(&pf->hw, pf->hw.aq.arq.len);
5913 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
5914 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
5915 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
5917 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
5918 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
5919 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
5921 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
5922 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
5923 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
5926 wr32(&pf->hw, pf->hw.aq.arq.len, val);
5928 val = rd32(&pf->hw, pf->hw.aq.asq.len);
5930 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
5931 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
5932 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
5934 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
5935 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
5936 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
5938 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
5939 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
5940 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
5943 wr32(&pf->hw, pf->hw.aq.asq.len, val);
5945 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
5946 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
5951 ret = i40e_clean_arq_element(hw, &event, &pending);
5952 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
5955 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
5959 opcode = le16_to_cpu(event.desc.opcode);
5962 case i40e_aqc_opc_get_link_status:
5963 i40e_handle_link_event(pf, &event);
5965 case i40e_aqc_opc_send_msg_to_pf:
5966 ret = i40e_vc_process_vf_msg(pf,
5967 le16_to_cpu(event.desc.retval),
5968 le32_to_cpu(event.desc.cookie_high),
5969 le32_to_cpu(event.desc.cookie_low),
5973 case i40e_aqc_opc_lldp_update_mib:
5974 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
5975 #ifdef CONFIG_I40E_DCB
5977 ret = i40e_handle_lldp_event(pf, &event);
5979 #endif /* CONFIG_I40E_DCB */
5981 case i40e_aqc_opc_event_lan_overflow:
5982 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
5983 i40e_handle_lan_overflow_event(pf, &event);
5985 case i40e_aqc_opc_send_msg_to_peer:
5986 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
5988 case i40e_aqc_opc_nvm_erase:
5989 case i40e_aqc_opc_nvm_update:
5990 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
5993 dev_info(&pf->pdev->dev,
5994 "ARQ Error: Unknown event 0x%04x received\n",
5998 } while (pending && (i++ < pf->adminq_work_limit));
6000 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6001 /* re-enable Admin queue interrupt cause */
6002 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6003 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6004 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6007 kfree(event.msg_buf);
6011 * i40e_verify_eeprom - make sure eeprom is good to use
6012 * @pf: board private structure
6014 static void i40e_verify_eeprom(struct i40e_pf *pf)
6018 err = i40e_diag_eeprom_test(&pf->hw);
6020 /* retry in case of garbage read */
6021 err = i40e_diag_eeprom_test(&pf->hw);
6023 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6025 set_bit(__I40E_BAD_EEPROM, &pf->state);
6029 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6030 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6031 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6036 * i40e_enable_pf_switch_lb
6037 * @pf: pointer to the PF structure
6039 * enable switch loop back or die - no point in a return value
6041 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6043 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6044 struct i40e_vsi_context ctxt;
6047 ctxt.seid = pf->main_vsi_seid;
6048 ctxt.pf_num = pf->hw.pf_id;
6050 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6052 dev_info(&pf->pdev->dev,
6053 "couldn't get PF vsi config, err %s aq_err %s\n",
6054 i40e_stat_str(&pf->hw, ret),
6055 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6058 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6059 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6060 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6062 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6064 dev_info(&pf->pdev->dev,
6065 "update vsi switch failed, err %s aq_err %s\n",
6066 i40e_stat_str(&pf->hw, ret),
6067 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6072 * i40e_disable_pf_switch_lb
6073 * @pf: pointer to the PF structure
6075 * disable switch loop back or die - no point in a return value
6077 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6079 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6080 struct i40e_vsi_context ctxt;
6083 ctxt.seid = pf->main_vsi_seid;
6084 ctxt.pf_num = pf->hw.pf_id;
6086 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6088 dev_info(&pf->pdev->dev,
6089 "couldn't get PF vsi config, err %s aq_err %s\n",
6090 i40e_stat_str(&pf->hw, ret),
6091 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6094 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6095 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6096 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6098 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6100 dev_info(&pf->pdev->dev,
6101 "update vsi switch failed, err %s aq_err %s\n",
6102 i40e_stat_str(&pf->hw, ret),
6103 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6108 * i40e_config_bridge_mode - Configure the HW bridge mode
6109 * @veb: pointer to the bridge instance
6111 * Configure the loop back mode for the LAN VSI that is downlink to the
6112 * specified HW bridge instance. It is expected this function is called
6113 * when a new HW bridge is instantiated.
6115 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6117 struct i40e_pf *pf = veb->pf;
6119 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6120 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6121 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6122 i40e_disable_pf_switch_lb(pf);
6124 i40e_enable_pf_switch_lb(pf);
6128 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6129 * @veb: pointer to the VEB instance
6131 * This is a recursive function that first builds the attached VSIs then
6132 * recurses in to build the next layer of VEB. We track the connections
6133 * through our own index numbers because the seid's from the HW could
6134 * change across the reset.
6136 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6138 struct i40e_vsi *ctl_vsi = NULL;
6139 struct i40e_pf *pf = veb->pf;
6143 /* build VSI that owns this VEB, temporarily attached to base VEB */
6144 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6146 pf->vsi[v]->veb_idx == veb->idx &&
6147 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6148 ctl_vsi = pf->vsi[v];
6153 dev_info(&pf->pdev->dev,
6154 "missing owner VSI for veb_idx %d\n", veb->idx);
6156 goto end_reconstitute;
6158 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6159 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6160 ret = i40e_add_vsi(ctl_vsi);
6162 dev_info(&pf->pdev->dev,
6163 "rebuild of veb_idx %d owner VSI failed: %d\n",
6165 goto end_reconstitute;
6167 i40e_vsi_reset_stats(ctl_vsi);
6169 /* create the VEB in the switch and move the VSI onto the VEB */
6170 ret = i40e_add_veb(veb, ctl_vsi);
6172 goto end_reconstitute;
6174 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6175 veb->bridge_mode = BRIDGE_MODE_VEB;
6177 veb->bridge_mode = BRIDGE_MODE_VEPA;
6178 i40e_config_bridge_mode(veb);
6180 /* create the remaining VSIs attached to this VEB */
6181 for (v = 0; v < pf->num_alloc_vsi; v++) {
6182 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6185 if (pf->vsi[v]->veb_idx == veb->idx) {
6186 struct i40e_vsi *vsi = pf->vsi[v];
6187 vsi->uplink_seid = veb->seid;
6188 ret = i40e_add_vsi(vsi);
6190 dev_info(&pf->pdev->dev,
6191 "rebuild of vsi_idx %d failed: %d\n",
6193 goto end_reconstitute;
6195 i40e_vsi_reset_stats(vsi);
6199 /* create any VEBs attached to this VEB - RECURSION */
6200 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6201 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6202 pf->veb[veb_idx]->uplink_seid = veb->seid;
6203 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6214 * i40e_get_capabilities - get info about the HW
6215 * @pf: the PF struct
6217 static int i40e_get_capabilities(struct i40e_pf *pf)
6219 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6224 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6226 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6230 /* this loads the data into the hw struct for us */
6231 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6233 i40e_aqc_opc_list_func_capabilities,
6235 /* data loaded, buffer no longer needed */
6238 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6239 /* retry with a larger buffer */
6240 buf_len = data_size;
6241 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6242 dev_info(&pf->pdev->dev,
6243 "capability discovery failed, err %s aq_err %s\n",
6244 i40e_stat_str(&pf->hw, err),
6245 i40e_aq_str(&pf->hw,
6246 pf->hw.aq.asq_last_status));
6251 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
6252 (pf->hw.aq.fw_maj_ver < 2)) {
6253 pf->hw.func_caps.num_msix_vectors++;
6254 pf->hw.func_caps.num_msix_vectors_vf++;
6257 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6258 dev_info(&pf->pdev->dev,
6259 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6260 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6261 pf->hw.func_caps.num_msix_vectors,
6262 pf->hw.func_caps.num_msix_vectors_vf,
6263 pf->hw.func_caps.fd_filters_guaranteed,
6264 pf->hw.func_caps.fd_filters_best_effort,
6265 pf->hw.func_caps.num_tx_qp,
6266 pf->hw.func_caps.num_vsis);
6268 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6269 + pf->hw.func_caps.num_vfs)
6270 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6271 dev_info(&pf->pdev->dev,
6272 "got num_vsis %d, setting num_vsis to %d\n",
6273 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6274 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6280 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6283 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6284 * @pf: board private structure
6286 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6288 struct i40e_vsi *vsi;
6291 /* quick workaround for an NVM issue that leaves a critical register
6294 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6295 static const u32 hkey[] = {
6296 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6297 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6298 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6301 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6302 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6305 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6308 /* find existing VSI and see if it needs configuring */
6310 for (i = 0; i < pf->num_alloc_vsi; i++) {
6311 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6317 /* create a new VSI if none exists */
6319 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6320 pf->vsi[pf->lan_vsi]->seid, 0);
6322 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6323 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6328 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6332 * i40e_fdir_teardown - release the Flow Director resources
6333 * @pf: board private structure
6335 static void i40e_fdir_teardown(struct i40e_pf *pf)
6339 i40e_fdir_filter_exit(pf);
6340 for (i = 0; i < pf->num_alloc_vsi; i++) {
6341 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6342 i40e_vsi_release(pf->vsi[i]);
6349 * i40e_prep_for_reset - prep for the core to reset
6350 * @pf: board private structure
6352 * Close up the VFs and other things in prep for PF Reset.
6354 static void i40e_prep_for_reset(struct i40e_pf *pf)
6356 struct i40e_hw *hw = &pf->hw;
6357 i40e_status ret = 0;
6360 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6361 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6364 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6366 /* quiesce the VSIs and their queues that are not already DOWN */
6367 i40e_pf_quiesce_all_vsi(pf);
6369 for (v = 0; v < pf->num_alloc_vsi; v++) {
6371 pf->vsi[v]->seid = 0;
6374 i40e_shutdown_adminq(&pf->hw);
6376 /* call shutdown HMC */
6377 if (hw->hmc.hmc_obj) {
6378 ret = i40e_shutdown_lan_hmc(hw);
6380 dev_warn(&pf->pdev->dev,
6381 "shutdown_lan_hmc failed: %d\n", ret);
6386 * i40e_send_version - update firmware with driver version
6389 static void i40e_send_version(struct i40e_pf *pf)
6391 struct i40e_driver_version dv;
6393 dv.major_version = DRV_VERSION_MAJOR;
6394 dv.minor_version = DRV_VERSION_MINOR;
6395 dv.build_version = DRV_VERSION_BUILD;
6396 dv.subbuild_version = 0;
6397 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6398 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6402 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6403 * @pf: board private structure
6404 * @reinit: if the Main VSI needs to re-initialized.
6406 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6408 struct i40e_hw *hw = &pf->hw;
6409 u8 set_fc_aq_fail = 0;
6413 /* Now we wait for GRST to settle out.
6414 * We don't have to delete the VEBs or VSIs from the hw switch
6415 * because the reset will make them disappear.
6417 ret = i40e_pf_reset(hw);
6419 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6420 set_bit(__I40E_RESET_FAILED, &pf->state);
6421 goto clear_recovery;
6425 if (test_bit(__I40E_DOWN, &pf->state))
6426 goto clear_recovery;
6427 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6429 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6430 ret = i40e_init_adminq(&pf->hw);
6432 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6433 i40e_stat_str(&pf->hw, ret),
6434 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6435 goto clear_recovery;
6438 /* re-verify the eeprom if we just had an EMP reset */
6439 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6440 i40e_verify_eeprom(pf);
6442 i40e_clear_pxe_mode(hw);
6443 ret = i40e_get_capabilities(pf);
6445 goto end_core_reset;
6447 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6448 hw->func_caps.num_rx_qp,
6449 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6451 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6452 goto end_core_reset;
6454 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6456 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6457 goto end_core_reset;
6460 #ifdef CONFIG_I40E_DCB
6461 ret = i40e_init_pf_dcb(pf);
6463 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6464 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6465 /* Continue without DCB enabled */
6467 #endif /* CONFIG_I40E_DCB */
6469 ret = i40e_init_pf_fcoe(pf);
6471 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", ret);
6474 /* do basic switch setup */
6475 ret = i40e_setup_pf_switch(pf, reinit);
6477 goto end_core_reset;
6479 /* driver is only interested in link up/down and module qualification
6480 * reports from firmware
6482 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6483 I40E_AQ_EVENT_LINK_UPDOWN |
6484 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6486 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6487 i40e_stat_str(&pf->hw, ret),
6488 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6490 /* make sure our flow control settings are restored */
6491 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6493 dev_info(&pf->pdev->dev, "set fc fail, err %s aq_err %s\n",
6494 i40e_stat_str(&pf->hw, ret),
6495 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6497 /* Rebuild the VSIs and VEBs that existed before reset.
6498 * They are still in our local switch element arrays, so only
6499 * need to rebuild the switch model in the HW.
6501 * If there were VEBs but the reconstitution failed, we'll try
6502 * try to recover minimal use by getting the basic PF VSI working.
6504 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6505 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6506 /* find the one VEB connected to the MAC, and find orphans */
6507 for (v = 0; v < I40E_MAX_VEB; v++) {
6511 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6512 pf->veb[v]->uplink_seid == 0) {
6513 ret = i40e_reconstitute_veb(pf->veb[v]);
6518 /* If Main VEB failed, we're in deep doodoo,
6519 * so give up rebuilding the switch and set up
6520 * for minimal rebuild of PF VSI.
6521 * If orphan failed, we'll report the error
6522 * but try to keep going.
6524 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6525 dev_info(&pf->pdev->dev,
6526 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6528 pf->vsi[pf->lan_vsi]->uplink_seid
6531 } else if (pf->veb[v]->uplink_seid == 0) {
6532 dev_info(&pf->pdev->dev,
6533 "rebuild of orphan VEB failed: %d\n",
6540 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6541 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6542 /* no VEB, so rebuild only the Main VSI */
6543 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6545 dev_info(&pf->pdev->dev,
6546 "rebuild of Main VSI failed: %d\n", ret);
6547 goto end_core_reset;
6551 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6552 (pf->hw.aq.fw_maj_ver < 4)) {
6554 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6556 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6557 i40e_stat_str(&pf->hw, ret),
6558 i40e_aq_str(&pf->hw,
6559 pf->hw.aq.asq_last_status));
6561 /* reinit the misc interrupt */
6562 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6563 ret = i40e_setup_misc_vector(pf);
6565 /* restart the VSIs that were rebuilt and running before the reset */
6566 i40e_pf_unquiesce_all_vsi(pf);
6568 if (pf->num_alloc_vfs) {
6569 for (v = 0; v < pf->num_alloc_vfs; v++)
6570 i40e_reset_vf(&pf->vf[v], true);
6573 /* tell the firmware that we're starting */
6574 i40e_send_version(pf);
6577 clear_bit(__I40E_RESET_FAILED, &pf->state);
6579 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6583 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6584 * @pf: board private structure
6586 * Close up the VFs and other things in prep for a Core Reset,
6587 * then get ready to rebuild the world.
6589 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6591 i40e_prep_for_reset(pf);
6592 i40e_reset_and_rebuild(pf, false);
6596 * i40e_handle_mdd_event
6597 * @pf: pointer to the PF structure
6599 * Called from the MDD irq handler to identify possibly malicious vfs
6601 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6603 struct i40e_hw *hw = &pf->hw;
6604 bool mdd_detected = false;
6605 bool pf_mdd_detected = false;
6610 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6613 /* find what triggered the MDD event */
6614 reg = rd32(hw, I40E_GL_MDET_TX);
6615 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6616 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6617 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6618 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6619 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6620 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6621 I40E_GL_MDET_TX_EVENT_SHIFT;
6622 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6623 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6624 pf->hw.func_caps.base_queue;
6625 if (netif_msg_tx_err(pf))
6626 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6627 event, queue, pf_num, vf_num);
6628 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6629 mdd_detected = true;
6631 reg = rd32(hw, I40E_GL_MDET_RX);
6632 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6633 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6634 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6635 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6636 I40E_GL_MDET_RX_EVENT_SHIFT;
6637 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6638 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6639 pf->hw.func_caps.base_queue;
6640 if (netif_msg_rx_err(pf))
6641 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6642 event, queue, func);
6643 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6644 mdd_detected = true;
6648 reg = rd32(hw, I40E_PF_MDET_TX);
6649 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6650 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6651 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6652 pf_mdd_detected = true;
6654 reg = rd32(hw, I40E_PF_MDET_RX);
6655 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6656 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6657 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6658 pf_mdd_detected = true;
6660 /* Queue belongs to the PF, initiate a reset */
6661 if (pf_mdd_detected) {
6662 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6663 i40e_service_event_schedule(pf);
6667 /* see if one of the VFs needs its hand slapped */
6668 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6670 reg = rd32(hw, I40E_VP_MDET_TX(i));
6671 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6672 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6673 vf->num_mdd_events++;
6674 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6678 reg = rd32(hw, I40E_VP_MDET_RX(i));
6679 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6680 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6681 vf->num_mdd_events++;
6682 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6686 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6687 dev_info(&pf->pdev->dev,
6688 "Too many MDD events on VF %d, disabled\n", i);
6689 dev_info(&pf->pdev->dev,
6690 "Use PF Control I/F to re-enable the VF\n");
6691 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6695 /* re-enable mdd interrupt cause */
6696 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6697 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6698 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6699 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6703 #ifdef CONFIG_I40E_VXLAN
6705 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6706 * @pf: board private structure
6708 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6710 struct i40e_hw *hw = &pf->hw;
6715 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6718 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6720 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6721 if (pf->pending_vxlan_bitmap & BIT_ULL(i)) {
6722 pf->pending_vxlan_bitmap &= ~BIT_ULL(i);
6723 port = pf->vxlan_ports[i];
6725 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
6726 I40E_AQC_TUNNEL_TYPE_VXLAN,
6729 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
6732 dev_info(&pf->pdev->dev,
6733 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
6734 port ? "add" : "delete",
6736 i40e_stat_str(&pf->hw, ret),
6737 i40e_aq_str(&pf->hw,
6738 pf->hw.aq.asq_last_status));
6739 pf->vxlan_ports[i] = 0;
6747 * i40e_service_task - Run the driver's async subtasks
6748 * @work: pointer to work_struct containing our data
6750 static void i40e_service_task(struct work_struct *work)
6752 struct i40e_pf *pf = container_of(work,
6755 unsigned long start_time = jiffies;
6757 /* don't bother with service tasks if a reset is in progress */
6758 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6759 i40e_service_event_complete(pf);
6763 i40e_reset_subtask(pf);
6764 i40e_handle_mdd_event(pf);
6765 i40e_vc_process_vflr_event(pf);
6766 i40e_watchdog_subtask(pf);
6767 i40e_fdir_reinit_subtask(pf);
6768 i40e_sync_filters_subtask(pf);
6769 #ifdef CONFIG_I40E_VXLAN
6770 i40e_sync_vxlan_filters_subtask(pf);
6772 i40e_clean_adminq_subtask(pf);
6774 i40e_service_event_complete(pf);
6776 /* If the tasks have taken longer than one timer cycle or there
6777 * is more work to be done, reschedule the service task now
6778 * rather than wait for the timer to tick again.
6780 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6781 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6782 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6783 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6784 i40e_service_event_schedule(pf);
6788 * i40e_service_timer - timer callback
6789 * @data: pointer to PF struct
6791 static void i40e_service_timer(unsigned long data)
6793 struct i40e_pf *pf = (struct i40e_pf *)data;
6795 mod_timer(&pf->service_timer,
6796 round_jiffies(jiffies + pf->service_timer_period));
6797 i40e_service_event_schedule(pf);
6801 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6802 * @vsi: the VSI being configured
6804 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6806 struct i40e_pf *pf = vsi->back;
6808 switch (vsi->type) {
6810 vsi->alloc_queue_pairs = pf->num_lan_qps;
6811 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6812 I40E_REQ_DESCRIPTOR_MULTIPLE);
6813 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6814 vsi->num_q_vectors = pf->num_lan_msix;
6816 vsi->num_q_vectors = 1;
6821 vsi->alloc_queue_pairs = 1;
6822 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6823 I40E_REQ_DESCRIPTOR_MULTIPLE);
6824 vsi->num_q_vectors = 1;
6827 case I40E_VSI_VMDQ2:
6828 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6829 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6830 I40E_REQ_DESCRIPTOR_MULTIPLE);
6831 vsi->num_q_vectors = pf->num_vmdq_msix;
6834 case I40E_VSI_SRIOV:
6835 vsi->alloc_queue_pairs = pf->num_vf_qps;
6836 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6837 I40E_REQ_DESCRIPTOR_MULTIPLE);
6842 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6843 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6844 I40E_REQ_DESCRIPTOR_MULTIPLE);
6845 vsi->num_q_vectors = pf->num_fcoe_msix;
6848 #endif /* I40E_FCOE */
6858 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6859 * @type: VSI pointer
6860 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6862 * On error: returns error code (negative)
6863 * On success: returns 0
6865 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6870 /* allocate memory for both Tx and Rx ring pointers */
6871 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6872 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6875 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6877 if (alloc_qvectors) {
6878 /* allocate memory for q_vector pointers */
6879 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6880 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6881 if (!vsi->q_vectors) {
6889 kfree(vsi->tx_rings);
6894 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6895 * @pf: board private structure
6896 * @type: type of VSI
6898 * On error: returns error code (negative)
6899 * On success: returns vsi index in PF (positive)
6901 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
6904 struct i40e_vsi *vsi;
6908 /* Need to protect the allocation of the VSIs at the PF level */
6909 mutex_lock(&pf->switch_mutex);
6911 /* VSI list may be fragmented if VSI creation/destruction has
6912 * been happening. We can afford to do a quick scan to look
6913 * for any free VSIs in the list.
6915 * find next empty vsi slot, looping back around if necessary
6918 while (i < pf->num_alloc_vsi && pf->vsi[i])
6920 if (i >= pf->num_alloc_vsi) {
6922 while (i < pf->next_vsi && pf->vsi[i])
6926 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
6927 vsi_idx = i; /* Found one! */
6930 goto unlock_pf; /* out of VSI slots! */
6934 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
6941 set_bit(__I40E_DOWN, &vsi->state);
6944 vsi->rx_itr_setting = pf->rx_itr_default;
6945 vsi->tx_itr_setting = pf->tx_itr_default;
6946 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
6947 pf->rss_table_size : 64;
6948 vsi->netdev_registered = false;
6949 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
6950 INIT_LIST_HEAD(&vsi->mac_filter_list);
6951 vsi->irqs_ready = false;
6953 ret = i40e_set_num_rings_in_vsi(vsi);
6957 ret = i40e_vsi_alloc_arrays(vsi, true);
6961 /* Setup default MSIX irq handler for VSI */
6962 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
6964 pf->vsi[vsi_idx] = vsi;
6969 pf->next_vsi = i - 1;
6972 mutex_unlock(&pf->switch_mutex);
6977 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
6978 * @type: VSI pointer
6979 * @free_qvectors: a bool to specify if q_vectors need to be freed.
6981 * On error: returns error code (negative)
6982 * On success: returns 0
6984 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
6986 /* free the ring and vector containers */
6987 if (free_qvectors) {
6988 kfree(vsi->q_vectors);
6989 vsi->q_vectors = NULL;
6991 kfree(vsi->tx_rings);
6992 vsi->tx_rings = NULL;
6993 vsi->rx_rings = NULL;
6997 * i40e_vsi_clear - Deallocate the VSI provided
6998 * @vsi: the VSI being un-configured
7000 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7011 mutex_lock(&pf->switch_mutex);
7012 if (!pf->vsi[vsi->idx]) {
7013 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7014 vsi->idx, vsi->idx, vsi, vsi->type);
7018 if (pf->vsi[vsi->idx] != vsi) {
7019 dev_err(&pf->pdev->dev,
7020 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7021 pf->vsi[vsi->idx]->idx,
7023 pf->vsi[vsi->idx]->type,
7024 vsi->idx, vsi, vsi->type);
7028 /* updates the PF for this cleared vsi */
7029 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7030 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7032 i40e_vsi_free_arrays(vsi, true);
7034 pf->vsi[vsi->idx] = NULL;
7035 if (vsi->idx < pf->next_vsi)
7036 pf->next_vsi = vsi->idx;
7039 mutex_unlock(&pf->switch_mutex);
7047 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7048 * @vsi: the VSI being cleaned
7050 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7054 if (vsi->tx_rings && vsi->tx_rings[0]) {
7055 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7056 kfree_rcu(vsi->tx_rings[i], rcu);
7057 vsi->tx_rings[i] = NULL;
7058 vsi->rx_rings[i] = NULL;
7064 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7065 * @vsi: the VSI being configured
7067 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7069 struct i40e_ring *tx_ring, *rx_ring;
7070 struct i40e_pf *pf = vsi->back;
7073 /* Set basic values in the rings to be used later during open() */
7074 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7075 /* allocate space for both Tx and Rx in one shot */
7076 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7080 tx_ring->queue_index = i;
7081 tx_ring->reg_idx = vsi->base_queue + i;
7082 tx_ring->ring_active = false;
7084 tx_ring->netdev = vsi->netdev;
7085 tx_ring->dev = &pf->pdev->dev;
7086 tx_ring->count = vsi->num_desc;
7088 tx_ring->dcb_tc = 0;
7089 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7090 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7091 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7092 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7093 vsi->tx_rings[i] = tx_ring;
7095 rx_ring = &tx_ring[1];
7096 rx_ring->queue_index = i;
7097 rx_ring->reg_idx = vsi->base_queue + i;
7098 rx_ring->ring_active = false;
7100 rx_ring->netdev = vsi->netdev;
7101 rx_ring->dev = &pf->pdev->dev;
7102 rx_ring->count = vsi->num_desc;
7104 rx_ring->dcb_tc = 0;
7105 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7106 set_ring_16byte_desc_enabled(rx_ring);
7108 clear_ring_16byte_desc_enabled(rx_ring);
7109 vsi->rx_rings[i] = rx_ring;
7115 i40e_vsi_clear_rings(vsi);
7120 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7121 * @pf: board private structure
7122 * @vectors: the number of MSI-X vectors to request
7124 * Returns the number of vectors reserved, or error
7126 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7128 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7129 I40E_MIN_MSIX, vectors);
7131 dev_info(&pf->pdev->dev,
7132 "MSI-X vector reservation failed: %d\n", vectors);
7140 * i40e_init_msix - Setup the MSIX capability
7141 * @pf: board private structure
7143 * Work with the OS to set up the MSIX vectors needed.
7145 * Returns the number of vectors reserved or negative on failure
7147 static int i40e_init_msix(struct i40e_pf *pf)
7149 struct i40e_hw *hw = &pf->hw;
7154 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7157 /* The number of vectors we'll request will be comprised of:
7158 * - Add 1 for "other" cause for Admin Queue events, etc.
7159 * - The number of LAN queue pairs
7160 * - Queues being used for RSS.
7161 * We don't need as many as max_rss_size vectors.
7162 * use rss_size instead in the calculation since that
7163 * is governed by number of cpus in the system.
7164 * - assumes symmetric Tx/Rx pairing
7165 * - The number of VMDq pairs
7167 * - The number of FCOE qps.
7169 * Once we count this up, try the request.
7171 * If we can't get what we want, we'll simplify to nearly nothing
7172 * and try again. If that still fails, we punt.
7174 vectors_left = hw->func_caps.num_msix_vectors;
7177 /* reserve one vector for miscellaneous handler */
7183 /* reserve vectors for the main PF traffic queues */
7184 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7185 vectors_left -= pf->num_lan_msix;
7186 v_budget += pf->num_lan_msix;
7188 /* reserve one vector for sideband flow director */
7189 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7194 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7199 /* can we reserve enough for FCoE? */
7200 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7202 pf->num_fcoe_msix = 0;
7203 else if (vectors_left >= pf->num_fcoe_qps)
7204 pf->num_fcoe_msix = pf->num_fcoe_qps;
7206 pf->num_fcoe_msix = 1;
7207 v_budget += pf->num_fcoe_msix;
7208 vectors_left -= pf->num_fcoe_msix;
7212 /* any vectors left over go for VMDq support */
7213 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7214 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7215 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7217 /* if we're short on vectors for what's desired, we limit
7218 * the queues per vmdq. If this is still more than are
7219 * available, the user will need to change the number of
7220 * queues/vectors used by the PF later with the ethtool
7223 if (vmdq_vecs < vmdq_vecs_wanted)
7224 pf->num_vmdq_qps = 1;
7225 pf->num_vmdq_msix = pf->num_vmdq_qps;
7227 v_budget += vmdq_vecs;
7228 vectors_left -= vmdq_vecs;
7231 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7233 if (!pf->msix_entries)
7236 for (i = 0; i < v_budget; i++)
7237 pf->msix_entries[i].entry = i;
7238 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7240 if (v_actual != v_budget) {
7241 /* If we have limited resources, we will start with no vectors
7242 * for the special features and then allocate vectors to some
7243 * of these features based on the policy and at the end disable
7244 * the features that did not get any vectors.
7247 pf->num_fcoe_qps = 0;
7248 pf->num_fcoe_msix = 0;
7250 pf->num_vmdq_msix = 0;
7253 if (v_actual < I40E_MIN_MSIX) {
7254 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7255 kfree(pf->msix_entries);
7256 pf->msix_entries = NULL;
7259 } else if (v_actual == I40E_MIN_MSIX) {
7260 /* Adjust for minimal MSIX use */
7261 pf->num_vmdq_vsis = 0;
7262 pf->num_vmdq_qps = 0;
7263 pf->num_lan_qps = 1;
7264 pf->num_lan_msix = 1;
7266 } else if (v_actual != v_budget) {
7269 /* reserve the misc vector */
7272 /* Scale vector usage down */
7273 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7274 pf->num_vmdq_vsis = 1;
7275 pf->num_vmdq_qps = 1;
7276 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7278 /* partition out the remaining vectors */
7281 pf->num_lan_msix = 1;
7285 /* give one vector to FCoE */
7286 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7287 pf->num_lan_msix = 1;
7288 pf->num_fcoe_msix = 1;
7291 pf->num_lan_msix = 2;
7296 /* give one vector to FCoE */
7297 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7298 pf->num_fcoe_msix = 1;
7302 /* give the rest to the PF */
7303 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7308 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7309 (pf->num_vmdq_msix == 0)) {
7310 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7311 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7315 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7316 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7317 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7324 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7325 * @vsi: the VSI being configured
7326 * @v_idx: index of the vector in the vsi struct
7328 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7330 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7332 struct i40e_q_vector *q_vector;
7334 /* allocate q_vector */
7335 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7339 q_vector->vsi = vsi;
7340 q_vector->v_idx = v_idx;
7341 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7343 netif_napi_add(vsi->netdev, &q_vector->napi,
7344 i40e_napi_poll, NAPI_POLL_WEIGHT);
7346 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7347 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7349 /* tie q_vector and vsi together */
7350 vsi->q_vectors[v_idx] = q_vector;
7356 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7357 * @vsi: the VSI being configured
7359 * We allocate one q_vector per queue interrupt. If allocation fails we
7362 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7364 struct i40e_pf *pf = vsi->back;
7365 int v_idx, num_q_vectors;
7368 /* if not MSIX, give the one vector only to the LAN VSI */
7369 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7370 num_q_vectors = vsi->num_q_vectors;
7371 else if (vsi == pf->vsi[pf->lan_vsi])
7376 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7377 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7386 i40e_free_q_vector(vsi, v_idx);
7392 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7393 * @pf: board private structure to initialize
7395 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7400 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7401 vectors = i40e_init_msix(pf);
7403 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7405 I40E_FLAG_FCOE_ENABLED |
7407 I40E_FLAG_RSS_ENABLED |
7408 I40E_FLAG_DCB_CAPABLE |
7409 I40E_FLAG_SRIOV_ENABLED |
7410 I40E_FLAG_FD_SB_ENABLED |
7411 I40E_FLAG_FD_ATR_ENABLED |
7412 I40E_FLAG_VMDQ_ENABLED);
7414 /* rework the queue expectations without MSIX */
7415 i40e_determine_queue_usage(pf);
7419 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7420 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7421 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7422 vectors = pci_enable_msi(pf->pdev);
7424 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7426 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7428 vectors = 1; /* one MSI or Legacy vector */
7431 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7432 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7434 /* set up vector assignment tracking */
7435 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7436 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7437 if (!pf->irq_pile) {
7438 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7441 pf->irq_pile->num_entries = vectors;
7442 pf->irq_pile->search_hint = 0;
7444 /* track first vector for misc interrupts, ignore return */
7445 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7451 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7452 * @pf: board private structure
7454 * This sets up the handler for MSIX 0, which is used to manage the
7455 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7456 * when in MSI or Legacy interrupt mode.
7458 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7460 struct i40e_hw *hw = &pf->hw;
7463 /* Only request the irq if this is the first time through, and
7464 * not when we're rebuilding after a Reset
7466 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7467 err = request_irq(pf->msix_entries[0].vector,
7468 i40e_intr, 0, pf->int_name, pf);
7470 dev_info(&pf->pdev->dev,
7471 "request_irq for %s failed: %d\n",
7477 i40e_enable_misc_int_causes(pf);
7479 /* associate no queues to the misc vector */
7480 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7481 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7485 i40e_irq_dynamic_enable_icr0(pf);
7491 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7492 * @vsi: vsi structure
7493 * @seed: RSS hash seed
7495 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed)
7497 struct i40e_aqc_get_set_rss_key_data rss_key;
7498 struct i40e_pf *pf = vsi->back;
7499 struct i40e_hw *hw = &pf->hw;
7500 bool pf_lut = false;
7504 memset(&rss_key, 0, sizeof(rss_key));
7505 memcpy(&rss_key, seed, sizeof(rss_key));
7507 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7511 /* Populate the LUT with max no. of queues in round robin fashion */
7512 for (i = 0; i < vsi->rss_table_size; i++)
7513 rss_lut[i] = i % vsi->rss_size;
7515 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7517 dev_info(&pf->pdev->dev,
7518 "Cannot set RSS key, err %s aq_err %s\n",
7519 i40e_stat_str(&pf->hw, ret),
7520 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7524 if (vsi->type == I40E_VSI_MAIN)
7527 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7528 vsi->rss_table_size);
7530 dev_info(&pf->pdev->dev,
7531 "Cannot set RSS lut, err %s aq_err %s\n",
7532 i40e_stat_str(&pf->hw, ret),
7533 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7539 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7540 * @vsi: VSI structure
7542 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7544 u8 seed[I40E_HKEY_ARRAY_SIZE];
7545 struct i40e_pf *pf = vsi->back;
7547 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7548 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7550 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7551 return i40e_config_rss_aq(vsi, seed);
7557 * i40e_config_rss_reg - Prepare for RSS if used
7558 * @pf: board private structure
7559 * @seed: RSS hash seed
7561 static int i40e_config_rss_reg(struct i40e_pf *pf, const u8 *seed)
7563 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7564 struct i40e_hw *hw = &pf->hw;
7565 u32 *seed_dw = (u32 *)seed;
7566 u32 current_queue = 0;
7570 /* Fill out hash function seed */
7571 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7572 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7574 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) {
7576 for (j = 0; j < 4; j++) {
7577 if (current_queue == vsi->rss_size)
7579 lut |= ((current_queue) << (8 * j));
7582 wr32(&pf->hw, I40E_PFQF_HLUT(i), lut);
7590 * i40e_config_rss - Prepare for RSS if used
7591 * @pf: board private structure
7593 static int i40e_config_rss(struct i40e_pf *pf)
7595 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7596 u8 seed[I40E_HKEY_ARRAY_SIZE];
7597 struct i40e_hw *hw = &pf->hw;
7601 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7603 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7604 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7605 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7606 hena |= i40e_pf_get_default_rss_hena(pf);
7608 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7609 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7611 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7613 /* Determine the RSS table size based on the hardware capabilities */
7614 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7615 reg_val = (pf->rss_table_size == 512) ?
7616 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
7617 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
7618 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7620 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7621 return i40e_config_rss_aq(pf->vsi[pf->lan_vsi], seed);
7623 return i40e_config_rss_reg(pf, seed);
7627 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7628 * @pf: board private structure
7629 * @queue_count: the requested queue count for rss.
7631 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7632 * count which may be different from the requested queue count.
7634 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7636 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7639 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7642 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
7644 if (queue_count != vsi->num_queue_pairs) {
7645 vsi->req_queue_pairs = queue_count;
7646 i40e_prep_for_reset(pf);
7648 pf->rss_size = new_rss_size;
7650 i40e_reset_and_rebuild(pf, true);
7651 i40e_config_rss(pf);
7653 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7654 return pf->rss_size;
7658 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
7659 * @pf: board private structure
7661 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
7664 bool min_valid, max_valid;
7667 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
7668 &min_valid, &max_valid);
7672 pf->npar_min_bw = min_bw;
7674 pf->npar_max_bw = max_bw;
7681 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
7682 * @pf: board private structure
7684 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
7686 struct i40e_aqc_configure_partition_bw_data bw_data;
7689 /* Set the valid bit for this PF */
7690 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
7691 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
7692 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
7694 /* Set the new bandwidths */
7695 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
7701 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
7702 * @pf: board private structure
7704 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
7706 /* Commit temporary BW setting to permanent NVM image */
7707 enum i40e_admin_queue_err last_aq_status;
7711 if (pf->hw.partition_id != 1) {
7712 dev_info(&pf->pdev->dev,
7713 "Commit BW only works on partition 1! This is partition %d",
7714 pf->hw.partition_id);
7715 ret = I40E_NOT_SUPPORTED;
7719 /* Acquire NVM for read access */
7720 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
7721 last_aq_status = pf->hw.aq.asq_last_status;
7723 dev_info(&pf->pdev->dev,
7724 "Cannot acquire NVM for read access, err %s aq_err %s\n",
7725 i40e_stat_str(&pf->hw, ret),
7726 i40e_aq_str(&pf->hw, last_aq_status));
7730 /* Read word 0x10 of NVM - SW compatibility word 1 */
7731 ret = i40e_aq_read_nvm(&pf->hw,
7732 I40E_SR_NVM_CONTROL_WORD,
7733 0x10, sizeof(nvm_word), &nvm_word,
7735 /* Save off last admin queue command status before releasing
7738 last_aq_status = pf->hw.aq.asq_last_status;
7739 i40e_release_nvm(&pf->hw);
7741 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
7742 i40e_stat_str(&pf->hw, ret),
7743 i40e_aq_str(&pf->hw, last_aq_status));
7747 /* Wait a bit for NVM release to complete */
7750 /* Acquire NVM for write access */
7751 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
7752 last_aq_status = pf->hw.aq.asq_last_status;
7754 dev_info(&pf->pdev->dev,
7755 "Cannot acquire NVM for write access, err %s aq_err %s\n",
7756 i40e_stat_str(&pf->hw, ret),
7757 i40e_aq_str(&pf->hw, last_aq_status));
7760 /* Write it back out unchanged to initiate update NVM,
7761 * which will force a write of the shadow (alt) RAM to
7762 * the NVM - thus storing the bandwidth values permanently.
7764 ret = i40e_aq_update_nvm(&pf->hw,
7765 I40E_SR_NVM_CONTROL_WORD,
7766 0x10, sizeof(nvm_word),
7767 &nvm_word, true, NULL);
7768 /* Save off last admin queue command status before releasing
7771 last_aq_status = pf->hw.aq.asq_last_status;
7772 i40e_release_nvm(&pf->hw);
7774 dev_info(&pf->pdev->dev,
7775 "BW settings NOT SAVED, err %s aq_err %s\n",
7776 i40e_stat_str(&pf->hw, ret),
7777 i40e_aq_str(&pf->hw, last_aq_status));
7784 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7785 * @pf: board private structure to initialize
7787 * i40e_sw_init initializes the Adapter private data structure.
7788 * Fields are initialized based on PCI device information and
7789 * OS network device settings (MTU size).
7791 static int i40e_sw_init(struct i40e_pf *pf)
7796 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7797 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7798 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7799 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7800 if (I40E_DEBUG_USER & debug)
7801 pf->hw.debug_mask = debug;
7802 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7803 I40E_DEFAULT_MSG_ENABLE);
7806 /* Set default capability flags */
7807 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7808 I40E_FLAG_MSI_ENABLED |
7809 I40E_FLAG_MSIX_ENABLED;
7811 if (iommu_present(&pci_bus_type))
7812 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
7814 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
7816 /* Set default ITR */
7817 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7818 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7820 /* Depending on PF configurations, it is possible that the RSS
7821 * maximum might end up larger than the available queues
7823 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
7825 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
7826 pf->rss_size_max = min_t(int, pf->rss_size_max,
7827 pf->hw.func_caps.num_tx_qp);
7828 if (pf->hw.func_caps.rss) {
7829 pf->flags |= I40E_FLAG_RSS_ENABLED;
7830 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7833 /* MFP mode enabled */
7834 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
7835 pf->flags |= I40E_FLAG_MFP_ENABLED;
7836 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7837 if (i40e_get_npar_bw_setting(pf))
7838 dev_warn(&pf->pdev->dev,
7839 "Could not get NPAR bw settings\n");
7841 dev_info(&pf->pdev->dev,
7842 "Min BW = %8.8x, Max BW = %8.8x\n",
7843 pf->npar_min_bw, pf->npar_max_bw);
7846 /* FW/NVM is not yet fixed in this regard */
7847 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7848 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7849 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7850 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7851 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
7852 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7854 dev_info(&pf->pdev->dev,
7855 "Flow Director Sideband mode Disabled in MFP mode\n");
7857 pf->fdir_pf_filter_count =
7858 pf->hw.func_caps.fd_filters_guaranteed;
7859 pf->hw.fdir_shared_filter_count =
7860 pf->hw.func_caps.fd_filters_best_effort;
7863 if (pf->hw.func_caps.vmdq) {
7864 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7865 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7869 err = i40e_init_pf_fcoe(pf);
7871 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", err);
7873 #endif /* I40E_FCOE */
7874 #ifdef CONFIG_PCI_IOV
7875 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
7876 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7877 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7878 pf->num_req_vfs = min_t(int,
7879 pf->hw.func_caps.num_vfs,
7882 #endif /* CONFIG_PCI_IOV */
7883 if (pf->hw.mac.type == I40E_MAC_X722) {
7884 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
7885 I40E_FLAG_128_QP_RSS_CAPABLE |
7886 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
7887 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
7888 I40E_FLAG_WB_ON_ITR_CAPABLE |
7889 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE;
7891 pf->eeprom_version = 0xDEAD;
7892 pf->lan_veb = I40E_NO_VEB;
7893 pf->lan_vsi = I40E_NO_VSI;
7895 /* set up queue assignment tracking */
7896 size = sizeof(struct i40e_lump_tracking)
7897 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
7898 pf->qp_pile = kzalloc(size, GFP_KERNEL);
7903 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
7904 pf->qp_pile->search_hint = 0;
7906 pf->tx_timeout_recovery_level = 1;
7908 mutex_init(&pf->switch_mutex);
7910 /* If NPAR is enabled nudge the Tx scheduler */
7911 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
7912 i40e_set_npar_bw_setting(pf);
7919 * i40e_set_ntuple - set the ntuple feature flag and take action
7920 * @pf: board private structure to initialize
7921 * @features: the feature set that the stack is suggesting
7923 * returns a bool to indicate if reset needs to happen
7925 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
7927 bool need_reset = false;
7929 /* Check if Flow Director n-tuple support was enabled or disabled. If
7930 * the state changed, we need to reset.
7932 if (features & NETIF_F_NTUPLE) {
7933 /* Enable filters and mark for reset */
7934 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
7936 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7938 /* turn off filters, mark for reset and clear SW filter list */
7939 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7941 i40e_fdir_filter_exit(pf);
7943 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7944 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
7945 /* reset fd counters */
7946 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
7947 pf->fdir_pf_active_filters = 0;
7948 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7949 if (I40E_DEBUG_FD & pf->hw.debug_mask)
7950 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
7951 /* if ATR was auto disabled it can be re-enabled. */
7952 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
7953 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
7954 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
7960 * i40e_set_features - set the netdev feature flags
7961 * @netdev: ptr to the netdev being adjusted
7962 * @features: the feature set that the stack is suggesting
7964 static int i40e_set_features(struct net_device *netdev,
7965 netdev_features_t features)
7967 struct i40e_netdev_priv *np = netdev_priv(netdev);
7968 struct i40e_vsi *vsi = np->vsi;
7969 struct i40e_pf *pf = vsi->back;
7972 if (features & NETIF_F_HW_VLAN_CTAG_RX)
7973 i40e_vlan_stripping_enable(vsi);
7975 i40e_vlan_stripping_disable(vsi);
7977 need_reset = i40e_set_ntuple(pf, features);
7980 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
7985 #ifdef CONFIG_I40E_VXLAN
7987 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
7988 * @pf: board private structure
7989 * @port: The UDP port to look up
7991 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
7993 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
7997 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7998 if (pf->vxlan_ports[i] == port)
8006 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8007 * @netdev: This physical port's netdev
8008 * @sa_family: Socket Family that VXLAN is notifying us about
8009 * @port: New UDP port number that VXLAN started listening to
8011 static void i40e_add_vxlan_port(struct net_device *netdev,
8012 sa_family_t sa_family, __be16 port)
8014 struct i40e_netdev_priv *np = netdev_priv(netdev);
8015 struct i40e_vsi *vsi = np->vsi;
8016 struct i40e_pf *pf = vsi->back;
8020 if (sa_family == AF_INET6)
8023 idx = i40e_get_vxlan_port_idx(pf, port);
8025 /* Check if port already exists */
8026 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8027 netdev_info(netdev, "vxlan port %d already offloaded\n",
8032 /* Now check if there is space to add the new port */
8033 next_idx = i40e_get_vxlan_port_idx(pf, 0);
8035 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8036 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8041 /* New port: add it and mark its index in the bitmap */
8042 pf->vxlan_ports[next_idx] = port;
8043 pf->pending_vxlan_bitmap |= BIT_ULL(next_idx);
8044 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8046 dev_info(&pf->pdev->dev, "adding vxlan port %d\n", ntohs(port));
8050 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8051 * @netdev: This physical port's netdev
8052 * @sa_family: Socket Family that VXLAN is notifying us about
8053 * @port: UDP port number that VXLAN stopped listening to
8055 static void i40e_del_vxlan_port(struct net_device *netdev,
8056 sa_family_t sa_family, __be16 port)
8058 struct i40e_netdev_priv *np = netdev_priv(netdev);
8059 struct i40e_vsi *vsi = np->vsi;
8060 struct i40e_pf *pf = vsi->back;
8063 if (sa_family == AF_INET6)
8066 idx = i40e_get_vxlan_port_idx(pf, port);
8068 /* Check if port already exists */
8069 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8070 /* if port exists, set it to 0 (mark for deletion)
8071 * and make it pending
8073 pf->vxlan_ports[idx] = 0;
8074 pf->pending_vxlan_bitmap |= BIT_ULL(idx);
8075 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8077 dev_info(&pf->pdev->dev, "deleting vxlan port %d\n",
8080 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8086 static int i40e_get_phys_port_id(struct net_device *netdev,
8087 struct netdev_phys_item_id *ppid)
8089 struct i40e_netdev_priv *np = netdev_priv(netdev);
8090 struct i40e_pf *pf = np->vsi->back;
8091 struct i40e_hw *hw = &pf->hw;
8093 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8096 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8097 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8103 * i40e_ndo_fdb_add - add an entry to the hardware database
8104 * @ndm: the input from the stack
8105 * @tb: pointer to array of nladdr (unused)
8106 * @dev: the net device pointer
8107 * @addr: the MAC address entry being added
8108 * @flags: instructions from stack about fdb operation
8110 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8111 struct net_device *dev,
8112 const unsigned char *addr, u16 vid,
8115 struct i40e_netdev_priv *np = netdev_priv(dev);
8116 struct i40e_pf *pf = np->vsi->back;
8119 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8123 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8127 /* Hardware does not support aging addresses so if a
8128 * ndm_state is given only allow permanent addresses
8130 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8131 netdev_info(dev, "FDB only supports static addresses\n");
8135 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8136 err = dev_uc_add_excl(dev, addr);
8137 else if (is_multicast_ether_addr(addr))
8138 err = dev_mc_add_excl(dev, addr);
8142 /* Only return duplicate errors if NLM_F_EXCL is set */
8143 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8150 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8151 * @dev: the netdev being configured
8152 * @nlh: RTNL message
8154 * Inserts a new hardware bridge if not already created and
8155 * enables the bridging mode requested (VEB or VEPA). If the
8156 * hardware bridge has already been inserted and the request
8157 * is to change the mode then that requires a PF reset to
8158 * allow rebuild of the components with required hardware
8159 * bridge mode enabled.
8161 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8162 struct nlmsghdr *nlh,
8165 struct i40e_netdev_priv *np = netdev_priv(dev);
8166 struct i40e_vsi *vsi = np->vsi;
8167 struct i40e_pf *pf = vsi->back;
8168 struct i40e_veb *veb = NULL;
8169 struct nlattr *attr, *br_spec;
8172 /* Only for PF VSI for now */
8173 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8176 /* Find the HW bridge for PF VSI */
8177 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8178 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8182 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8184 nla_for_each_nested(attr, br_spec, rem) {
8187 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8190 mode = nla_get_u16(attr);
8191 if ((mode != BRIDGE_MODE_VEPA) &&
8192 (mode != BRIDGE_MODE_VEB))
8195 /* Insert a new HW bridge */
8197 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8198 vsi->tc_config.enabled_tc);
8200 veb->bridge_mode = mode;
8201 i40e_config_bridge_mode(veb);
8203 /* No Bridge HW offload available */
8207 } else if (mode != veb->bridge_mode) {
8208 /* Existing HW bridge but different mode needs reset */
8209 veb->bridge_mode = mode;
8210 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8211 if (mode == BRIDGE_MODE_VEB)
8212 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8214 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8215 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8224 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8227 * @seq: RTNL message seq #
8228 * @dev: the netdev being configured
8229 * @filter_mask: unused
8231 * Return the mode in which the hardware bridge is operating in
8234 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8235 struct net_device *dev,
8236 u32 filter_mask, int nlflags)
8238 struct i40e_netdev_priv *np = netdev_priv(dev);
8239 struct i40e_vsi *vsi = np->vsi;
8240 struct i40e_pf *pf = vsi->back;
8241 struct i40e_veb *veb = NULL;
8244 /* Only for PF VSI for now */
8245 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8248 /* Find the HW bridge for the PF VSI */
8249 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8250 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8257 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8258 nlflags, 0, 0, filter_mask, NULL);
8261 #define I40E_MAX_TUNNEL_HDR_LEN 80
8263 * i40e_features_check - Validate encapsulated packet conforms to limits
8265 * @netdev: This physical port's netdev
8266 * @features: Offload features that the stack believes apply
8268 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8269 struct net_device *dev,
8270 netdev_features_t features)
8272 if (skb->encapsulation &&
8273 (skb_inner_mac_header(skb) - skb_transport_header(skb) >
8274 I40E_MAX_TUNNEL_HDR_LEN))
8275 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
8280 static const struct net_device_ops i40e_netdev_ops = {
8281 .ndo_open = i40e_open,
8282 .ndo_stop = i40e_close,
8283 .ndo_start_xmit = i40e_lan_xmit_frame,
8284 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8285 .ndo_set_rx_mode = i40e_set_rx_mode,
8286 .ndo_validate_addr = eth_validate_addr,
8287 .ndo_set_mac_address = i40e_set_mac,
8288 .ndo_change_mtu = i40e_change_mtu,
8289 .ndo_do_ioctl = i40e_ioctl,
8290 .ndo_tx_timeout = i40e_tx_timeout,
8291 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8292 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8293 #ifdef CONFIG_NET_POLL_CONTROLLER
8294 .ndo_poll_controller = i40e_netpoll,
8296 .ndo_setup_tc = i40e_setup_tc,
8298 .ndo_fcoe_enable = i40e_fcoe_enable,
8299 .ndo_fcoe_disable = i40e_fcoe_disable,
8301 .ndo_set_features = i40e_set_features,
8302 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8303 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8304 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8305 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8306 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8307 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8308 #ifdef CONFIG_I40E_VXLAN
8309 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8310 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8312 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8313 .ndo_fdb_add = i40e_ndo_fdb_add,
8314 .ndo_features_check = i40e_features_check,
8315 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8316 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8320 * i40e_config_netdev - Setup the netdev flags
8321 * @vsi: the VSI being configured
8323 * Returns 0 on success, negative value on failure
8325 static int i40e_config_netdev(struct i40e_vsi *vsi)
8327 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8328 struct i40e_pf *pf = vsi->back;
8329 struct i40e_hw *hw = &pf->hw;
8330 struct i40e_netdev_priv *np;
8331 struct net_device *netdev;
8332 u8 mac_addr[ETH_ALEN];
8335 etherdev_size = sizeof(struct i40e_netdev_priv);
8336 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8340 vsi->netdev = netdev;
8341 np = netdev_priv(netdev);
8344 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8345 NETIF_F_GSO_UDP_TUNNEL |
8348 netdev->features = NETIF_F_SG |
8352 NETIF_F_GSO_UDP_TUNNEL |
8353 NETIF_F_HW_VLAN_CTAG_TX |
8354 NETIF_F_HW_VLAN_CTAG_RX |
8355 NETIF_F_HW_VLAN_CTAG_FILTER |
8364 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8365 netdev->features |= NETIF_F_NTUPLE;
8367 /* copy netdev features into list of user selectable features */
8368 netdev->hw_features |= netdev->features;
8370 if (vsi->type == I40E_VSI_MAIN) {
8371 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8372 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8373 /* The following steps are necessary to prevent reception
8374 * of tagged packets - some older NVM configurations load a
8375 * default a MAC-VLAN filter that accepts any tagged packet
8376 * which must be replaced by a normal filter.
8378 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
8379 i40e_add_filter(vsi, mac_addr,
8380 I40E_VLAN_ANY, false, true);
8382 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8383 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8384 pf->vsi[pf->lan_vsi]->netdev->name);
8385 random_ether_addr(mac_addr);
8386 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8388 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8390 ether_addr_copy(netdev->dev_addr, mac_addr);
8391 ether_addr_copy(netdev->perm_addr, mac_addr);
8392 /* vlan gets same features (except vlan offload)
8393 * after any tweaks for specific VSI types
8395 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8396 NETIF_F_HW_VLAN_CTAG_RX |
8397 NETIF_F_HW_VLAN_CTAG_FILTER);
8398 netdev->priv_flags |= IFF_UNICAST_FLT;
8399 netdev->priv_flags |= IFF_SUPP_NOFCS;
8400 /* Setup netdev TC information */
8401 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8403 netdev->netdev_ops = &i40e_netdev_ops;
8404 netdev->watchdog_timeo = 5 * HZ;
8405 i40e_set_ethtool_ops(netdev);
8407 i40e_fcoe_config_netdev(netdev, vsi);
8414 * i40e_vsi_delete - Delete a VSI from the switch
8415 * @vsi: the VSI being removed
8417 * Returns 0 on success, negative value on failure
8419 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8421 /* remove default VSI is not allowed */
8422 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8425 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8429 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8430 * @vsi: the VSI being queried
8432 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8434 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8436 struct i40e_veb *veb;
8437 struct i40e_pf *pf = vsi->back;
8439 /* Uplink is not a bridge so default to VEB */
8440 if (vsi->veb_idx == I40E_NO_VEB)
8443 veb = pf->veb[vsi->veb_idx];
8444 /* Uplink is a bridge in VEPA mode */
8445 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA))
8448 /* Uplink is a bridge in VEB mode */
8453 * i40e_add_vsi - Add a VSI to the switch
8454 * @vsi: the VSI being configured
8456 * This initializes a VSI context depending on the VSI type to be added and
8457 * passes it down to the add_vsi aq command.
8459 static int i40e_add_vsi(struct i40e_vsi *vsi)
8462 struct i40e_mac_filter *f, *ftmp;
8463 struct i40e_pf *pf = vsi->back;
8464 struct i40e_hw *hw = &pf->hw;
8465 struct i40e_vsi_context ctxt;
8466 u8 enabled_tc = 0x1; /* TC0 enabled */
8469 memset(&ctxt, 0, sizeof(ctxt));
8470 switch (vsi->type) {
8472 /* The PF's main VSI is already setup as part of the
8473 * device initialization, so we'll not bother with
8474 * the add_vsi call, but we will retrieve the current
8477 ctxt.seid = pf->main_vsi_seid;
8478 ctxt.pf_num = pf->hw.pf_id;
8480 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8481 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8483 dev_info(&pf->pdev->dev,
8484 "couldn't get PF vsi config, err %s aq_err %s\n",
8485 i40e_stat_str(&pf->hw, ret),
8486 i40e_aq_str(&pf->hw,
8487 pf->hw.aq.asq_last_status));
8490 vsi->info = ctxt.info;
8491 vsi->info.valid_sections = 0;
8493 vsi->seid = ctxt.seid;
8494 vsi->id = ctxt.vsi_number;
8496 enabled_tc = i40e_pf_get_tc_map(pf);
8498 /* MFP mode setup queue map and update VSI */
8499 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8500 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8501 memset(&ctxt, 0, sizeof(ctxt));
8502 ctxt.seid = pf->main_vsi_seid;
8503 ctxt.pf_num = pf->hw.pf_id;
8505 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8506 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8508 dev_info(&pf->pdev->dev,
8509 "update vsi failed, err %s aq_err %s\n",
8510 i40e_stat_str(&pf->hw, ret),
8511 i40e_aq_str(&pf->hw,
8512 pf->hw.aq.asq_last_status));
8516 /* update the local VSI info queue map */
8517 i40e_vsi_update_queue_map(vsi, &ctxt);
8518 vsi->info.valid_sections = 0;
8520 /* Default/Main VSI is only enabled for TC0
8521 * reconfigure it to enable all TCs that are
8522 * available on the port in SFP mode.
8523 * For MFP case the iSCSI PF would use this
8524 * flow to enable LAN+iSCSI TC.
8526 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8528 dev_info(&pf->pdev->dev,
8529 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
8531 i40e_stat_str(&pf->hw, ret),
8532 i40e_aq_str(&pf->hw,
8533 pf->hw.aq.asq_last_status));
8540 ctxt.pf_num = hw->pf_id;
8542 ctxt.uplink_seid = vsi->uplink_seid;
8543 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8544 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8545 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
8546 (i40e_is_vsi_uplink_mode_veb(vsi))) {
8547 ctxt.info.valid_sections |=
8548 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8549 ctxt.info.switch_id =
8550 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8552 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8555 case I40E_VSI_VMDQ2:
8556 ctxt.pf_num = hw->pf_id;
8558 ctxt.uplink_seid = vsi->uplink_seid;
8559 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8560 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
8562 /* This VSI is connected to VEB so the switch_id
8563 * should be set to zero by default.
8565 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8566 ctxt.info.valid_sections |=
8567 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8568 ctxt.info.switch_id =
8569 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8572 /* Setup the VSI tx/rx queue map for TC0 only for now */
8573 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8576 case I40E_VSI_SRIOV:
8577 ctxt.pf_num = hw->pf_id;
8578 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8579 ctxt.uplink_seid = vsi->uplink_seid;
8580 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8581 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
8583 /* This VSI is connected to VEB so the switch_id
8584 * should be set to zero by default.
8586 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8587 ctxt.info.valid_sections |=
8588 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8589 ctxt.info.switch_id =
8590 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8593 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
8594 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
8595 if (pf->vf[vsi->vf_id].spoofchk) {
8596 ctxt.info.valid_sections |=
8597 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
8598 ctxt.info.sec_flags |=
8599 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
8600 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
8602 /* Setup the VSI tx/rx queue map for TC0 only for now */
8603 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8608 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
8610 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
8615 #endif /* I40E_FCOE */
8620 if (vsi->type != I40E_VSI_MAIN) {
8621 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
8623 dev_info(&vsi->back->pdev->dev,
8624 "add vsi failed, err %s aq_err %s\n",
8625 i40e_stat_str(&pf->hw, ret),
8626 i40e_aq_str(&pf->hw,
8627 pf->hw.aq.asq_last_status));
8631 vsi->info = ctxt.info;
8632 vsi->info.valid_sections = 0;
8633 vsi->seid = ctxt.seid;
8634 vsi->id = ctxt.vsi_number;
8637 /* If macvlan filters already exist, force them to get loaded */
8638 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
8642 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
8643 struct i40e_aqc_remove_macvlan_element_data element;
8645 memset(&element, 0, sizeof(element));
8646 ether_addr_copy(element.mac_addr, f->macaddr);
8647 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
8648 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
8651 /* some older FW has a different default */
8653 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
8654 i40e_aq_remove_macvlan(hw, vsi->seid,
8658 i40e_aq_mac_address_write(hw,
8659 I40E_AQC_WRITE_TYPE_LAA_WOL,
8664 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
8665 pf->flags |= I40E_FLAG_FILTER_SYNC;
8668 /* Update VSI BW information */
8669 ret = i40e_vsi_get_bw_info(vsi);
8671 dev_info(&pf->pdev->dev,
8672 "couldn't get vsi bw info, err %s aq_err %s\n",
8673 i40e_stat_str(&pf->hw, ret),
8674 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8675 /* VSI is already added so not tearing that up */
8684 * i40e_vsi_release - Delete a VSI and free its resources
8685 * @vsi: the VSI being removed
8687 * Returns 0 on success or < 0 on error
8689 int i40e_vsi_release(struct i40e_vsi *vsi)
8691 struct i40e_mac_filter *f, *ftmp;
8692 struct i40e_veb *veb = NULL;
8699 /* release of a VEB-owner or last VSI is not allowed */
8700 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
8701 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
8702 vsi->seid, vsi->uplink_seid);
8705 if (vsi == pf->vsi[pf->lan_vsi] &&
8706 !test_bit(__I40E_DOWN, &pf->state)) {
8707 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
8711 uplink_seid = vsi->uplink_seid;
8712 if (vsi->type != I40E_VSI_SRIOV) {
8713 if (vsi->netdev_registered) {
8714 vsi->netdev_registered = false;
8716 /* results in a call to i40e_close() */
8717 unregister_netdev(vsi->netdev);
8720 i40e_vsi_close(vsi);
8722 i40e_vsi_disable_irq(vsi);
8725 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
8726 i40e_del_filter(vsi, f->macaddr, f->vlan,
8727 f->is_vf, f->is_netdev);
8728 i40e_sync_vsi_filters(vsi);
8730 i40e_vsi_delete(vsi);
8731 i40e_vsi_free_q_vectors(vsi);
8733 free_netdev(vsi->netdev);
8736 i40e_vsi_clear_rings(vsi);
8737 i40e_vsi_clear(vsi);
8739 /* If this was the last thing on the VEB, except for the
8740 * controlling VSI, remove the VEB, which puts the controlling
8741 * VSI onto the next level down in the switch.
8743 * Well, okay, there's one more exception here: don't remove
8744 * the orphan VEBs yet. We'll wait for an explicit remove request
8745 * from up the network stack.
8747 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
8749 pf->vsi[i]->uplink_seid == uplink_seid &&
8750 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8751 n++; /* count the VSIs */
8754 for (i = 0; i < I40E_MAX_VEB; i++) {
8757 if (pf->veb[i]->uplink_seid == uplink_seid)
8758 n++; /* count the VEBs */
8759 if (pf->veb[i]->seid == uplink_seid)
8762 if (n == 0 && veb && veb->uplink_seid != 0)
8763 i40e_veb_release(veb);
8769 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
8770 * @vsi: ptr to the VSI
8772 * This should only be called after i40e_vsi_mem_alloc() which allocates the
8773 * corresponding SW VSI structure and initializes num_queue_pairs for the
8774 * newly allocated VSI.
8776 * Returns 0 on success or negative on failure
8778 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
8781 struct i40e_pf *pf = vsi->back;
8783 if (vsi->q_vectors[0]) {
8784 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
8789 if (vsi->base_vector) {
8790 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
8791 vsi->seid, vsi->base_vector);
8795 ret = i40e_vsi_alloc_q_vectors(vsi);
8797 dev_info(&pf->pdev->dev,
8798 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
8799 vsi->num_q_vectors, vsi->seid, ret);
8800 vsi->num_q_vectors = 0;
8801 goto vector_setup_out;
8804 /* In Legacy mode, we do not have to get any other vector since we
8805 * piggyback on the misc/ICR0 for queue interrupts.
8807 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
8809 if (vsi->num_q_vectors)
8810 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
8811 vsi->num_q_vectors, vsi->idx);
8812 if (vsi->base_vector < 0) {
8813 dev_info(&pf->pdev->dev,
8814 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
8815 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
8816 i40e_vsi_free_q_vectors(vsi);
8818 goto vector_setup_out;
8826 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
8827 * @vsi: pointer to the vsi.
8829 * This re-allocates a vsi's queue resources.
8831 * Returns pointer to the successfully allocated and configured VSI sw struct
8832 * on success, otherwise returns NULL on failure.
8834 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
8836 struct i40e_pf *pf = vsi->back;
8840 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
8841 i40e_vsi_clear_rings(vsi);
8843 i40e_vsi_free_arrays(vsi, false);
8844 i40e_set_num_rings_in_vsi(vsi);
8845 ret = i40e_vsi_alloc_arrays(vsi, false);
8849 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
8851 dev_info(&pf->pdev->dev,
8852 "failed to get tracking for %d queues for VSI %d err %d\n",
8853 vsi->alloc_queue_pairs, vsi->seid, ret);
8856 vsi->base_queue = ret;
8858 /* Update the FW view of the VSI. Force a reset of TC and queue
8859 * layout configurations.
8861 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8862 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8863 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8864 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8866 /* assign it some queues */
8867 ret = i40e_alloc_rings(vsi);
8871 /* map all of the rings to the q_vectors */
8872 i40e_vsi_map_rings_to_vectors(vsi);
8876 i40e_vsi_free_q_vectors(vsi);
8877 if (vsi->netdev_registered) {
8878 vsi->netdev_registered = false;
8879 unregister_netdev(vsi->netdev);
8880 free_netdev(vsi->netdev);
8883 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8885 i40e_vsi_clear(vsi);
8890 * i40e_vsi_setup - Set up a VSI by a given type
8891 * @pf: board private structure
8893 * @uplink_seid: the switch element to link to
8894 * @param1: usage depends upon VSI type. For VF types, indicates VF id
8896 * This allocates the sw VSI structure and its queue resources, then add a VSI
8897 * to the identified VEB.
8899 * Returns pointer to the successfully allocated and configure VSI sw struct on
8900 * success, otherwise returns NULL on failure.
8902 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
8903 u16 uplink_seid, u32 param1)
8905 struct i40e_vsi *vsi = NULL;
8906 struct i40e_veb *veb = NULL;
8910 /* The requested uplink_seid must be either
8911 * - the PF's port seid
8912 * no VEB is needed because this is the PF
8913 * or this is a Flow Director special case VSI
8914 * - seid of an existing VEB
8915 * - seid of a VSI that owns an existing VEB
8916 * - seid of a VSI that doesn't own a VEB
8917 * a new VEB is created and the VSI becomes the owner
8918 * - seid of the PF VSI, which is what creates the first VEB
8919 * this is a special case of the previous
8921 * Find which uplink_seid we were given and create a new VEB if needed
8923 for (i = 0; i < I40E_MAX_VEB; i++) {
8924 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
8930 if (!veb && uplink_seid != pf->mac_seid) {
8932 for (i = 0; i < pf->num_alloc_vsi; i++) {
8933 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
8939 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
8944 if (vsi->uplink_seid == pf->mac_seid)
8945 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
8946 vsi->tc_config.enabled_tc);
8947 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
8948 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8949 vsi->tc_config.enabled_tc);
8951 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
8952 dev_info(&vsi->back->pdev->dev,
8953 "%s: New VSI creation error, uplink seid of LAN VSI expected.\n",
8957 /* We come up by default in VEPA mode if SRIOV is not
8958 * already enabled, in which case we can't force VEPA
8961 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
8962 veb->bridge_mode = BRIDGE_MODE_VEPA;
8963 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8965 i40e_config_bridge_mode(veb);
8967 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8968 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8972 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
8976 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
8977 uplink_seid = veb->seid;
8980 /* get vsi sw struct */
8981 v_idx = i40e_vsi_mem_alloc(pf, type);
8984 vsi = pf->vsi[v_idx];
8988 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
8990 if (type == I40E_VSI_MAIN)
8991 pf->lan_vsi = v_idx;
8992 else if (type == I40E_VSI_SRIOV)
8993 vsi->vf_id = param1;
8994 /* assign it some queues */
8995 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
8998 dev_info(&pf->pdev->dev,
8999 "failed to get tracking for %d queues for VSI %d err=%d\n",
9000 vsi->alloc_queue_pairs, vsi->seid, ret);
9003 vsi->base_queue = ret;
9005 /* get a VSI from the hardware */
9006 vsi->uplink_seid = uplink_seid;
9007 ret = i40e_add_vsi(vsi);
9011 switch (vsi->type) {
9012 /* setup the netdev if needed */
9014 case I40E_VSI_VMDQ2:
9016 ret = i40e_config_netdev(vsi);
9019 ret = register_netdev(vsi->netdev);
9022 vsi->netdev_registered = true;
9023 netif_carrier_off(vsi->netdev);
9024 #ifdef CONFIG_I40E_DCB
9025 /* Setup DCB netlink interface */
9026 i40e_dcbnl_setup(vsi);
9027 #endif /* CONFIG_I40E_DCB */
9031 /* set up vectors and rings if needed */
9032 ret = i40e_vsi_setup_vectors(vsi);
9036 ret = i40e_alloc_rings(vsi);
9040 /* map all of the rings to the q_vectors */
9041 i40e_vsi_map_rings_to_vectors(vsi);
9043 i40e_vsi_reset_stats(vsi);
9047 /* no netdev or rings for the other VSI types */
9051 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9052 (vsi->type == I40E_VSI_VMDQ2)) {
9053 ret = i40e_vsi_config_rss(vsi);
9058 i40e_vsi_free_q_vectors(vsi);
9060 if (vsi->netdev_registered) {
9061 vsi->netdev_registered = false;
9062 unregister_netdev(vsi->netdev);
9063 free_netdev(vsi->netdev);
9067 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9069 i40e_vsi_clear(vsi);
9075 * i40e_veb_get_bw_info - Query VEB BW information
9076 * @veb: the veb to query
9078 * Query the Tx scheduler BW configuration data for given VEB
9080 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9082 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9083 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9084 struct i40e_pf *pf = veb->pf;
9085 struct i40e_hw *hw = &pf->hw;
9090 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9093 dev_info(&pf->pdev->dev,
9094 "query veb bw config failed, err %s aq_err %s\n",
9095 i40e_stat_str(&pf->hw, ret),
9096 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9100 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9103 dev_info(&pf->pdev->dev,
9104 "query veb bw ets config failed, err %s aq_err %s\n",
9105 i40e_stat_str(&pf->hw, ret),
9106 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9110 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9111 veb->bw_max_quanta = ets_data.tc_bw_max;
9112 veb->is_abs_credits = bw_data.absolute_credits_enable;
9113 veb->enabled_tc = ets_data.tc_valid_bits;
9114 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9115 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9116 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9117 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9118 veb->bw_tc_limit_credits[i] =
9119 le16_to_cpu(bw_data.tc_bw_limits[i]);
9120 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9128 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9129 * @pf: board private structure
9131 * On error: returns error code (negative)
9132 * On success: returns vsi index in PF (positive)
9134 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9137 struct i40e_veb *veb;
9140 /* Need to protect the allocation of switch elements at the PF level */
9141 mutex_lock(&pf->switch_mutex);
9143 /* VEB list may be fragmented if VEB creation/destruction has
9144 * been happening. We can afford to do a quick scan to look
9145 * for any free slots in the list.
9147 * find next empty veb slot, looping back around if necessary
9150 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9152 if (i >= I40E_MAX_VEB) {
9154 goto err_alloc_veb; /* out of VEB slots! */
9157 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9164 veb->enabled_tc = 1;
9169 mutex_unlock(&pf->switch_mutex);
9174 * i40e_switch_branch_release - Delete a branch of the switch tree
9175 * @branch: where to start deleting
9177 * This uses recursion to find the tips of the branch to be
9178 * removed, deleting until we get back to and can delete this VEB.
9180 static void i40e_switch_branch_release(struct i40e_veb *branch)
9182 struct i40e_pf *pf = branch->pf;
9183 u16 branch_seid = branch->seid;
9184 u16 veb_idx = branch->idx;
9187 /* release any VEBs on this VEB - RECURSION */
9188 for (i = 0; i < I40E_MAX_VEB; i++) {
9191 if (pf->veb[i]->uplink_seid == branch->seid)
9192 i40e_switch_branch_release(pf->veb[i]);
9195 /* Release the VSIs on this VEB, but not the owner VSI.
9197 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9198 * the VEB itself, so don't use (*branch) after this loop.
9200 for (i = 0; i < pf->num_alloc_vsi; i++) {
9203 if (pf->vsi[i]->uplink_seid == branch_seid &&
9204 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9205 i40e_vsi_release(pf->vsi[i]);
9209 /* There's one corner case where the VEB might not have been
9210 * removed, so double check it here and remove it if needed.
9211 * This case happens if the veb was created from the debugfs
9212 * commands and no VSIs were added to it.
9214 if (pf->veb[veb_idx])
9215 i40e_veb_release(pf->veb[veb_idx]);
9219 * i40e_veb_clear - remove veb struct
9220 * @veb: the veb to remove
9222 static void i40e_veb_clear(struct i40e_veb *veb)
9228 struct i40e_pf *pf = veb->pf;
9230 mutex_lock(&pf->switch_mutex);
9231 if (pf->veb[veb->idx] == veb)
9232 pf->veb[veb->idx] = NULL;
9233 mutex_unlock(&pf->switch_mutex);
9240 * i40e_veb_release - Delete a VEB and free its resources
9241 * @veb: the VEB being removed
9243 void i40e_veb_release(struct i40e_veb *veb)
9245 struct i40e_vsi *vsi = NULL;
9251 /* find the remaining VSI and check for extras */
9252 for (i = 0; i < pf->num_alloc_vsi; i++) {
9253 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9259 dev_info(&pf->pdev->dev,
9260 "can't remove VEB %d with %d VSIs left\n",
9265 /* move the remaining VSI to uplink veb */
9266 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9267 if (veb->uplink_seid) {
9268 vsi->uplink_seid = veb->uplink_seid;
9269 if (veb->uplink_seid == pf->mac_seid)
9270 vsi->veb_idx = I40E_NO_VEB;
9272 vsi->veb_idx = veb->veb_idx;
9275 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9276 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9279 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9280 i40e_veb_clear(veb);
9284 * i40e_add_veb - create the VEB in the switch
9285 * @veb: the VEB to be instantiated
9286 * @vsi: the controlling VSI
9288 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9290 struct i40e_pf *pf = veb->pf;
9291 bool is_default = false;
9292 bool is_cloud = false;
9295 /* get a VEB from the hardware */
9296 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9297 veb->enabled_tc, is_default,
9298 is_cloud, &veb->seid, NULL);
9300 dev_info(&pf->pdev->dev,
9301 "couldn't add VEB, err %s aq_err %s\n",
9302 i40e_stat_str(&pf->hw, ret),
9303 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9307 /* get statistics counter */
9308 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
9309 &veb->stats_idx, NULL, NULL, NULL);
9311 dev_info(&pf->pdev->dev,
9312 "couldn't get VEB statistics idx, err %s aq_err %s\n",
9313 i40e_stat_str(&pf->hw, ret),
9314 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9317 ret = i40e_veb_get_bw_info(veb);
9319 dev_info(&pf->pdev->dev,
9320 "couldn't get VEB bw info, err %s aq_err %s\n",
9321 i40e_stat_str(&pf->hw, ret),
9322 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9323 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9327 vsi->uplink_seid = veb->seid;
9328 vsi->veb_idx = veb->idx;
9329 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9335 * i40e_veb_setup - Set up a VEB
9336 * @pf: board private structure
9337 * @flags: VEB setup flags
9338 * @uplink_seid: the switch element to link to
9339 * @vsi_seid: the initial VSI seid
9340 * @enabled_tc: Enabled TC bit-map
9342 * This allocates the sw VEB structure and links it into the switch
9343 * It is possible and legal for this to be a duplicate of an already
9344 * existing VEB. It is also possible for both uplink and vsi seids
9345 * to be zero, in order to create a floating VEB.
9347 * Returns pointer to the successfully allocated VEB sw struct on
9348 * success, otherwise returns NULL on failure.
9350 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9351 u16 uplink_seid, u16 vsi_seid,
9354 struct i40e_veb *veb, *uplink_veb = NULL;
9355 int vsi_idx, veb_idx;
9358 /* if one seid is 0, the other must be 0 to create a floating relay */
9359 if ((uplink_seid == 0 || vsi_seid == 0) &&
9360 (uplink_seid + vsi_seid != 0)) {
9361 dev_info(&pf->pdev->dev,
9362 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9363 uplink_seid, vsi_seid);
9367 /* make sure there is such a vsi and uplink */
9368 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
9369 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
9371 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
9372 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
9377 if (uplink_seid && uplink_seid != pf->mac_seid) {
9378 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9379 if (pf->veb[veb_idx] &&
9380 pf->veb[veb_idx]->seid == uplink_seid) {
9381 uplink_veb = pf->veb[veb_idx];
9386 dev_info(&pf->pdev->dev,
9387 "uplink seid %d not found\n", uplink_seid);
9392 /* get veb sw struct */
9393 veb_idx = i40e_veb_mem_alloc(pf);
9396 veb = pf->veb[veb_idx];
9398 veb->uplink_seid = uplink_seid;
9399 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9400 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9402 /* create the VEB in the switch */
9403 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9406 if (vsi_idx == pf->lan_vsi)
9407 pf->lan_veb = veb->idx;
9412 i40e_veb_clear(veb);
9418 * i40e_setup_pf_switch_element - set PF vars based on switch type
9419 * @pf: board private structure
9420 * @ele: element we are building info from
9421 * @num_reported: total number of elements
9422 * @printconfig: should we print the contents
9424 * helper function to assist in extracting a few useful SEID values.
9426 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9427 struct i40e_aqc_switch_config_element_resp *ele,
9428 u16 num_reported, bool printconfig)
9430 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9431 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9432 u8 element_type = ele->element_type;
9433 u16 seid = le16_to_cpu(ele->seid);
9436 dev_info(&pf->pdev->dev,
9437 "type=%d seid=%d uplink=%d downlink=%d\n",
9438 element_type, seid, uplink_seid, downlink_seid);
9440 switch (element_type) {
9441 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9442 pf->mac_seid = seid;
9444 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9446 if (uplink_seid != pf->mac_seid)
9448 if (pf->lan_veb == I40E_NO_VEB) {
9451 /* find existing or else empty VEB */
9452 for (v = 0; v < I40E_MAX_VEB; v++) {
9453 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9458 if (pf->lan_veb == I40E_NO_VEB) {
9459 v = i40e_veb_mem_alloc(pf);
9466 pf->veb[pf->lan_veb]->seid = seid;
9467 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9468 pf->veb[pf->lan_veb]->pf = pf;
9469 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9471 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9472 if (num_reported != 1)
9474 /* This is immediately after a reset so we can assume this is
9477 pf->mac_seid = uplink_seid;
9478 pf->pf_seid = downlink_seid;
9479 pf->main_vsi_seid = seid;
9481 dev_info(&pf->pdev->dev,
9482 "pf_seid=%d main_vsi_seid=%d\n",
9483 pf->pf_seid, pf->main_vsi_seid);
9485 case I40E_SWITCH_ELEMENT_TYPE_PF:
9486 case I40E_SWITCH_ELEMENT_TYPE_VF:
9487 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9488 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9489 case I40E_SWITCH_ELEMENT_TYPE_PE:
9490 case I40E_SWITCH_ELEMENT_TYPE_PA:
9491 /* ignore these for now */
9494 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9495 element_type, seid);
9501 * i40e_fetch_switch_configuration - Get switch config from firmware
9502 * @pf: board private structure
9503 * @printconfig: should we print the contents
9505 * Get the current switch configuration from the device and
9506 * extract a few useful SEID values.
9508 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9510 struct i40e_aqc_get_switch_config_resp *sw_config;
9516 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9520 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9522 u16 num_reported, num_total;
9524 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9528 dev_info(&pf->pdev->dev,
9529 "get switch config failed err %s aq_err %s\n",
9530 i40e_stat_str(&pf->hw, ret),
9531 i40e_aq_str(&pf->hw,
9532 pf->hw.aq.asq_last_status));
9537 num_reported = le16_to_cpu(sw_config->header.num_reported);
9538 num_total = le16_to_cpu(sw_config->header.num_total);
9541 dev_info(&pf->pdev->dev,
9542 "header: %d reported %d total\n",
9543 num_reported, num_total);
9545 for (i = 0; i < num_reported; i++) {
9546 struct i40e_aqc_switch_config_element_resp *ele =
9547 &sw_config->element[i];
9549 i40e_setup_pf_switch_element(pf, ele, num_reported,
9552 } while (next_seid != 0);
9559 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
9560 * @pf: board private structure
9561 * @reinit: if the Main VSI needs to re-initialized.
9563 * Returns 0 on success, negative value on failure
9565 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
9569 /* find out what's out there already */
9570 ret = i40e_fetch_switch_configuration(pf, false);
9572 dev_info(&pf->pdev->dev,
9573 "couldn't fetch switch config, err %s aq_err %s\n",
9574 i40e_stat_str(&pf->hw, ret),
9575 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9578 i40e_pf_reset_stats(pf);
9580 /* first time setup */
9581 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
9582 struct i40e_vsi *vsi = NULL;
9585 /* Set up the PF VSI associated with the PF's main VSI
9586 * that is already in the HW switch
9588 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
9589 uplink_seid = pf->veb[pf->lan_veb]->seid;
9591 uplink_seid = pf->mac_seid;
9592 if (pf->lan_vsi == I40E_NO_VSI)
9593 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
9595 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
9597 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
9598 i40e_fdir_teardown(pf);
9602 /* force a reset of TC and queue layout configurations */
9603 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9604 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9605 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9606 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9608 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
9610 i40e_fdir_sb_setup(pf);
9612 /* Setup static PF queue filter control settings */
9613 ret = i40e_setup_pf_filter_control(pf);
9615 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
9617 /* Failure here should not stop continuing other steps */
9620 /* enable RSS in the HW, even for only one queue, as the stack can use
9623 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
9624 i40e_config_rss(pf);
9626 /* fill in link information and enable LSE reporting */
9627 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
9628 i40e_link_event(pf);
9630 /* Initialize user-specific link properties */
9631 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9632 I40E_AQ_AN_COMPLETED) ? true : false);
9640 * i40e_determine_queue_usage - Work out queue distribution
9641 * @pf: board private structure
9643 static void i40e_determine_queue_usage(struct i40e_pf *pf)
9647 pf->num_lan_qps = 0;
9649 pf->num_fcoe_qps = 0;
9652 /* Find the max queues to be put into basic use. We'll always be
9653 * using TC0, whether or not DCB is running, and TC0 will get the
9656 queues_left = pf->hw.func_caps.num_tx_qp;
9658 if ((queues_left == 1) ||
9659 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
9660 /* one qp for PF, no queues for anything else */
9662 pf->rss_size = pf->num_lan_qps = 1;
9664 /* make sure all the fancies are disabled */
9665 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9667 I40E_FLAG_FCOE_ENABLED |
9669 I40E_FLAG_FD_SB_ENABLED |
9670 I40E_FLAG_FD_ATR_ENABLED |
9671 I40E_FLAG_DCB_CAPABLE |
9672 I40E_FLAG_SRIOV_ENABLED |
9673 I40E_FLAG_VMDQ_ENABLED);
9674 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
9675 I40E_FLAG_FD_SB_ENABLED |
9676 I40E_FLAG_FD_ATR_ENABLED |
9677 I40E_FLAG_DCB_CAPABLE))) {
9679 pf->rss_size = pf->num_lan_qps = 1;
9680 queues_left -= pf->num_lan_qps;
9682 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9684 I40E_FLAG_FCOE_ENABLED |
9686 I40E_FLAG_FD_SB_ENABLED |
9687 I40E_FLAG_FD_ATR_ENABLED |
9688 I40E_FLAG_DCB_ENABLED |
9689 I40E_FLAG_VMDQ_ENABLED);
9691 /* Not enough queues for all TCs */
9692 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
9693 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
9694 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9695 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
9697 pf->num_lan_qps = max_t(int, pf->rss_size_max,
9699 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
9700 pf->hw.func_caps.num_tx_qp);
9702 queues_left -= pf->num_lan_qps;
9706 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
9707 if (I40E_DEFAULT_FCOE <= queues_left) {
9708 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
9709 } else if (I40E_MINIMUM_FCOE <= queues_left) {
9710 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
9712 pf->num_fcoe_qps = 0;
9713 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
9714 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
9717 queues_left -= pf->num_fcoe_qps;
9721 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9722 if (queues_left > 1) {
9723 queues_left -= 1; /* save 1 queue for FD */
9725 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9726 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
9730 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9731 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
9732 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
9733 (queues_left / pf->num_vf_qps));
9734 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
9737 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
9738 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
9739 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
9740 (queues_left / pf->num_vmdq_qps));
9741 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
9744 pf->queues_left = queues_left;
9746 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
9751 * i40e_setup_pf_filter_control - Setup PF static filter control
9752 * @pf: PF to be setup
9754 * i40e_setup_pf_filter_control sets up a PF's initial filter control
9755 * settings. If PE/FCoE are enabled then it will also set the per PF
9756 * based filter sizes required for them. It also enables Flow director,
9757 * ethertype and macvlan type filter settings for the pf.
9759 * Returns 0 on success, negative on failure
9761 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
9763 struct i40e_filter_control_settings *settings = &pf->filter_settings;
9765 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
9767 /* Flow Director is enabled */
9768 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
9769 settings->enable_fdir = true;
9771 /* Ethtype and MACVLAN filters enabled for PF */
9772 settings->enable_ethtype = true;
9773 settings->enable_macvlan = true;
9775 if (i40e_set_filter_control(&pf->hw, settings))
9781 #define INFO_STRING_LEN 255
9782 static void i40e_print_features(struct i40e_pf *pf)
9784 struct i40e_hw *hw = &pf->hw;
9787 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
9789 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
9795 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
9796 #ifdef CONFIG_PCI_IOV
9797 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
9799 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ",
9800 pf->hw.func_caps.num_vsis,
9801 pf->vsi[pf->lan_vsi]->num_queue_pairs,
9802 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
9804 if (pf->flags & I40E_FLAG_RSS_ENABLED)
9805 buf += sprintf(buf, "RSS ");
9806 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
9807 buf += sprintf(buf, "FD_ATR ");
9808 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9809 buf += sprintf(buf, "FD_SB ");
9810 buf += sprintf(buf, "NTUPLE ");
9812 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
9813 buf += sprintf(buf, "DCB ");
9814 if (pf->flags & I40E_FLAG_PTP)
9815 buf += sprintf(buf, "PTP ");
9817 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
9818 buf += sprintf(buf, "FCOE ");
9821 BUG_ON(buf > (string + INFO_STRING_LEN));
9822 dev_info(&pf->pdev->dev, "%s\n", string);
9827 * i40e_probe - Device initialization routine
9828 * @pdev: PCI device information struct
9829 * @ent: entry in i40e_pci_tbl
9831 * i40e_probe initializes a PF identified by a pci_dev structure.
9832 * The OS initialization, configuring of the PF private structure,
9833 * and a hardware reset occur.
9835 * Returns 0 on success, negative on failure
9837 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9839 struct i40e_aq_get_phy_abilities_resp abilities;
9840 unsigned long ioremap_len;
9843 static u16 pfs_found;
9849 err = pci_enable_device_mem(pdev);
9853 /* set up for high or low dma */
9854 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9856 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9859 "DMA configuration failed: 0x%x\n", err);
9864 /* set up pci connections */
9865 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
9866 IORESOURCE_MEM), i40e_driver_name);
9868 dev_info(&pdev->dev,
9869 "pci_request_selected_regions failed %d\n", err);
9873 pci_enable_pcie_error_reporting(pdev);
9874 pci_set_master(pdev);
9876 /* Now that we have a PCI connection, we need to do the
9877 * low level device setup. This is primarily setting up
9878 * the Admin Queue structures and then querying for the
9879 * device's current profile information.
9881 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
9888 set_bit(__I40E_DOWN, &pf->state);
9893 ioremap_len = min_t(unsigned long, pci_resource_len(pdev, 0),
9894 I40E_MAX_CSR_SPACE);
9896 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), ioremap_len);
9899 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
9900 (unsigned int)pci_resource_start(pdev, 0),
9901 (unsigned int)pci_resource_len(pdev, 0), err);
9904 hw->vendor_id = pdev->vendor;
9905 hw->device_id = pdev->device;
9906 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
9907 hw->subsystem_vendor_id = pdev->subsystem_vendor;
9908 hw->subsystem_device_id = pdev->subsystem_device;
9909 hw->bus.device = PCI_SLOT(pdev->devfn);
9910 hw->bus.func = PCI_FUNC(pdev->devfn);
9911 pf->instance = pfs_found;
9914 pf->msg_enable = pf->hw.debug_mask;
9915 pf->msg_enable = debug;
9918 /* do a special CORER for clearing PXE mode once at init */
9919 if (hw->revision_id == 0 &&
9920 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
9921 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
9926 i40e_clear_pxe_mode(hw);
9929 /* Reset here to make sure all is clean and to define PF 'n' */
9931 err = i40e_pf_reset(hw);
9933 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
9938 hw->aq.num_arq_entries = I40E_AQ_LEN;
9939 hw->aq.num_asq_entries = I40E_AQ_LEN;
9940 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
9941 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
9942 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
9944 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
9946 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
9948 err = i40e_init_shared_code(hw);
9950 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
9955 /* set up a default setting for link flow control */
9956 pf->hw.fc.requested_mode = I40E_FC_NONE;
9958 err = i40e_init_adminq(hw);
9959 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
9961 dev_info(&pdev->dev,
9962 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
9966 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
9967 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
9968 dev_info(&pdev->dev,
9969 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
9970 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
9971 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
9972 dev_info(&pdev->dev,
9973 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
9975 i40e_verify_eeprom(pf);
9977 /* Rev 0 hardware was never productized */
9978 if (hw->revision_id < 1)
9979 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
9981 i40e_clear_pxe_mode(hw);
9982 err = i40e_get_capabilities(pf);
9984 goto err_adminq_setup;
9986 err = i40e_sw_init(pf);
9988 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
9992 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
9993 hw->func_caps.num_rx_qp,
9994 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
9996 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
9997 goto err_init_lan_hmc;
10000 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10002 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10004 goto err_configure_lan_hmc;
10007 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10008 * Ignore error return codes because if it was already disabled via
10009 * hardware settings this will fail
10011 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10012 (pf->hw.aq.fw_maj_ver < 4)) {
10013 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10014 i40e_aq_stop_lldp(hw, true, NULL);
10017 i40e_get_mac_addr(hw, hw->mac.addr);
10018 if (!is_valid_ether_addr(hw->mac.addr)) {
10019 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10023 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10024 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10025 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10026 if (is_valid_ether_addr(hw->mac.port_addr))
10027 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10029 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10031 dev_info(&pdev->dev,
10032 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10033 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10034 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10036 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10038 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10039 #endif /* I40E_FCOE */
10041 pci_set_drvdata(pdev, pf);
10042 pci_save_state(pdev);
10043 #ifdef CONFIG_I40E_DCB
10044 err = i40e_init_pf_dcb(pf);
10046 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10047 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10048 /* Continue without DCB enabled */
10050 #endif /* CONFIG_I40E_DCB */
10052 /* set up periodic task facility */
10053 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10054 pf->service_timer_period = HZ;
10056 INIT_WORK(&pf->service_task, i40e_service_task);
10057 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10058 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10059 pf->link_check_timeout = jiffies;
10061 /* WoL defaults to disabled */
10062 pf->wol_en = false;
10063 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10065 /* set up the main switch operations */
10066 i40e_determine_queue_usage(pf);
10067 err = i40e_init_interrupt_scheme(pf);
10069 goto err_switch_setup;
10071 /* The number of VSIs reported by the FW is the minimum guaranteed
10072 * to us; HW supports far more and we share the remaining pool with
10073 * the other PFs. We allocate space for more than the guarantee with
10074 * the understanding that we might not get them all later.
10076 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10077 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10079 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10081 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10082 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10083 pf->vsi = kzalloc(len, GFP_KERNEL);
10086 goto err_switch_setup;
10089 #ifdef CONFIG_PCI_IOV
10090 /* prep for VF support */
10091 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10092 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10093 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10094 if (pci_num_vf(pdev))
10095 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10098 err = i40e_setup_pf_switch(pf, false);
10100 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10103 /* if FDIR VSI was set up, start it now */
10104 for (i = 0; i < pf->num_alloc_vsi; i++) {
10105 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10106 i40e_vsi_open(pf->vsi[i]);
10111 /* driver is only interested in link up/down and module qualification
10112 * reports from firmware
10114 err = i40e_aq_set_phy_int_mask(&pf->hw,
10115 I40E_AQ_EVENT_LINK_UPDOWN |
10116 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10118 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10119 i40e_stat_str(&pf->hw, err),
10120 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10122 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10123 (pf->hw.aq.fw_maj_ver < 4)) {
10125 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10127 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10128 i40e_stat_str(&pf->hw, err),
10129 i40e_aq_str(&pf->hw,
10130 pf->hw.aq.asq_last_status));
10132 /* The main driver is (mostly) up and happy. We need to set this state
10133 * before setting up the misc vector or we get a race and the vector
10134 * ends up disabled forever.
10136 clear_bit(__I40E_DOWN, &pf->state);
10138 /* In case of MSIX we are going to setup the misc vector right here
10139 * to handle admin queue events etc. In case of legacy and MSI
10140 * the misc functionality and queue processing is combined in
10141 * the same vector and that gets setup at open.
10143 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10144 err = i40e_setup_misc_vector(pf);
10146 dev_info(&pdev->dev,
10147 "setup of misc vector failed: %d\n", err);
10152 #ifdef CONFIG_PCI_IOV
10153 /* prep for VF support */
10154 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10155 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10156 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10159 /* disable link interrupts for VFs */
10160 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10161 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10162 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10165 if (pci_num_vf(pdev)) {
10166 dev_info(&pdev->dev,
10167 "Active VFs found, allocating resources.\n");
10168 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10170 dev_info(&pdev->dev,
10171 "Error %d allocating resources for existing VFs\n",
10175 #endif /* CONFIG_PCI_IOV */
10179 i40e_dbg_pf_init(pf);
10181 /* tell the firmware that we're starting */
10182 i40e_send_version(pf);
10184 /* since everything's happy, start the service_task timer */
10185 mod_timer(&pf->service_timer,
10186 round_jiffies(jiffies + pf->service_timer_period));
10189 /* create FCoE interface */
10190 i40e_fcoe_vsi_setup(pf);
10193 /* Get the negotiated link width and speed from PCI config space */
10194 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
10196 i40e_set_pci_config_data(hw, link_status);
10198 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
10199 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
10200 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
10201 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
10203 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
10204 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
10205 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
10206 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
10209 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10210 hw->bus.speed < i40e_bus_speed_8000) {
10211 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10212 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10215 /* get the requested speeds from the fw */
10216 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10218 dev_info(&pf->pdev->dev,
10219 "get phy capabilities failed, err %s aq_err %s, advertised speed settings may not be correct\n",
10220 i40e_stat_str(&pf->hw, err),
10221 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10222 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10224 /* print a string summarizing features */
10225 i40e_print_features(pf);
10229 /* Unwind what we've done if something failed in the setup */
10231 set_bit(__I40E_DOWN, &pf->state);
10232 i40e_clear_interrupt_scheme(pf);
10235 i40e_reset_interrupt_capability(pf);
10236 del_timer_sync(&pf->service_timer);
10238 err_configure_lan_hmc:
10239 (void)i40e_shutdown_lan_hmc(hw);
10241 kfree(pf->qp_pile);
10244 (void)i40e_shutdown_adminq(hw);
10246 iounmap(hw->hw_addr);
10250 pci_disable_pcie_error_reporting(pdev);
10251 pci_release_selected_regions(pdev,
10252 pci_select_bars(pdev, IORESOURCE_MEM));
10255 pci_disable_device(pdev);
10260 * i40e_remove - Device removal routine
10261 * @pdev: PCI device information struct
10263 * i40e_remove is called by the PCI subsystem to alert the driver
10264 * that is should release a PCI device. This could be caused by a
10265 * Hot-Plug event, or because the driver is going to be removed from
10268 static void i40e_remove(struct pci_dev *pdev)
10270 struct i40e_pf *pf = pci_get_drvdata(pdev);
10271 i40e_status ret_code;
10274 i40e_dbg_pf_exit(pf);
10278 /* no more scheduling of any task */
10279 set_bit(__I40E_DOWN, &pf->state);
10280 del_timer_sync(&pf->service_timer);
10281 cancel_work_sync(&pf->service_task);
10282 i40e_fdir_teardown(pf);
10284 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
10286 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
10289 i40e_fdir_teardown(pf);
10291 /* If there is a switch structure or any orphans, remove them.
10292 * This will leave only the PF's VSI remaining.
10294 for (i = 0; i < I40E_MAX_VEB; i++) {
10298 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
10299 pf->veb[i]->uplink_seid == 0)
10300 i40e_switch_branch_release(pf->veb[i]);
10303 /* Now we can shutdown the PF's VSI, just before we kill
10306 if (pf->vsi[pf->lan_vsi])
10307 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
10309 /* shutdown and destroy the HMC */
10310 if (pf->hw.hmc.hmc_obj) {
10311 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
10313 dev_warn(&pdev->dev,
10314 "Failed to destroy the HMC resources: %d\n",
10318 /* shutdown the adminq */
10319 ret_code = i40e_shutdown_adminq(&pf->hw);
10321 dev_warn(&pdev->dev,
10322 "Failed to destroy the Admin Queue resources: %d\n",
10325 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
10326 i40e_clear_interrupt_scheme(pf);
10327 for (i = 0; i < pf->num_alloc_vsi; i++) {
10329 i40e_vsi_clear_rings(pf->vsi[i]);
10330 i40e_vsi_clear(pf->vsi[i]);
10335 for (i = 0; i < I40E_MAX_VEB; i++) {
10340 kfree(pf->qp_pile);
10343 iounmap(pf->hw.hw_addr);
10345 pci_release_selected_regions(pdev,
10346 pci_select_bars(pdev, IORESOURCE_MEM));
10348 pci_disable_pcie_error_reporting(pdev);
10349 pci_disable_device(pdev);
10353 * i40e_pci_error_detected - warning that something funky happened in PCI land
10354 * @pdev: PCI device information struct
10356 * Called to warn that something happened and the error handling steps
10357 * are in progress. Allows the driver to quiesce things, be ready for
10360 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
10361 enum pci_channel_state error)
10363 struct i40e_pf *pf = pci_get_drvdata(pdev);
10365 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
10367 /* shutdown all operations */
10368 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
10370 i40e_prep_for_reset(pf);
10374 /* Request a slot reset */
10375 return PCI_ERS_RESULT_NEED_RESET;
10379 * i40e_pci_error_slot_reset - a PCI slot reset just happened
10380 * @pdev: PCI device information struct
10382 * Called to find if the driver can work with the device now that
10383 * the pci slot has been reset. If a basic connection seems good
10384 * (registers are readable and have sane content) then return a
10385 * happy little PCI_ERS_RESULT_xxx.
10387 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
10389 struct i40e_pf *pf = pci_get_drvdata(pdev);
10390 pci_ers_result_t result;
10394 dev_info(&pdev->dev, "%s\n", __func__);
10395 if (pci_enable_device_mem(pdev)) {
10396 dev_info(&pdev->dev,
10397 "Cannot re-enable PCI device after reset.\n");
10398 result = PCI_ERS_RESULT_DISCONNECT;
10400 pci_set_master(pdev);
10401 pci_restore_state(pdev);
10402 pci_save_state(pdev);
10403 pci_wake_from_d3(pdev, false);
10405 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
10407 result = PCI_ERS_RESULT_RECOVERED;
10409 result = PCI_ERS_RESULT_DISCONNECT;
10412 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10414 dev_info(&pdev->dev,
10415 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
10417 /* non-fatal, continue */
10424 * i40e_pci_error_resume - restart operations after PCI error recovery
10425 * @pdev: PCI device information struct
10427 * Called to allow the driver to bring things back up after PCI error
10428 * and/or reset recovery has finished.
10430 static void i40e_pci_error_resume(struct pci_dev *pdev)
10432 struct i40e_pf *pf = pci_get_drvdata(pdev);
10434 dev_info(&pdev->dev, "%s\n", __func__);
10435 if (test_bit(__I40E_SUSPENDED, &pf->state))
10439 i40e_handle_reset_warning(pf);
10444 * i40e_shutdown - PCI callback for shutting down
10445 * @pdev: PCI device information struct
10447 static void i40e_shutdown(struct pci_dev *pdev)
10449 struct i40e_pf *pf = pci_get_drvdata(pdev);
10450 struct i40e_hw *hw = &pf->hw;
10452 set_bit(__I40E_SUSPENDED, &pf->state);
10453 set_bit(__I40E_DOWN, &pf->state);
10455 i40e_prep_for_reset(pf);
10458 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10459 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10461 del_timer_sync(&pf->service_timer);
10462 cancel_work_sync(&pf->service_task);
10463 i40e_fdir_teardown(pf);
10466 i40e_prep_for_reset(pf);
10469 wr32(hw, I40E_PFPM_APM,
10470 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10471 wr32(hw, I40E_PFPM_WUFC,
10472 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10474 i40e_clear_interrupt_scheme(pf);
10476 if (system_state == SYSTEM_POWER_OFF) {
10477 pci_wake_from_d3(pdev, pf->wol_en);
10478 pci_set_power_state(pdev, PCI_D3hot);
10484 * i40e_suspend - PCI callback for moving to D3
10485 * @pdev: PCI device information struct
10487 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
10489 struct i40e_pf *pf = pci_get_drvdata(pdev);
10490 struct i40e_hw *hw = &pf->hw;
10492 set_bit(__I40E_SUSPENDED, &pf->state);
10493 set_bit(__I40E_DOWN, &pf->state);
10496 i40e_prep_for_reset(pf);
10499 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10500 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10502 pci_wake_from_d3(pdev, pf->wol_en);
10503 pci_set_power_state(pdev, PCI_D3hot);
10509 * i40e_resume - PCI callback for waking up from D3
10510 * @pdev: PCI device information struct
10512 static int i40e_resume(struct pci_dev *pdev)
10514 struct i40e_pf *pf = pci_get_drvdata(pdev);
10517 pci_set_power_state(pdev, PCI_D0);
10518 pci_restore_state(pdev);
10519 /* pci_restore_state() clears dev->state_saves, so
10520 * call pci_save_state() again to restore it.
10522 pci_save_state(pdev);
10524 err = pci_enable_device_mem(pdev);
10526 dev_err(&pdev->dev,
10527 "%s: Cannot enable PCI device from suspend\n",
10531 pci_set_master(pdev);
10533 /* no wakeup events while running */
10534 pci_wake_from_d3(pdev, false);
10536 /* handling the reset will rebuild the device state */
10537 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
10538 clear_bit(__I40E_DOWN, &pf->state);
10540 i40e_reset_and_rebuild(pf, false);
10548 static const struct pci_error_handlers i40e_err_handler = {
10549 .error_detected = i40e_pci_error_detected,
10550 .slot_reset = i40e_pci_error_slot_reset,
10551 .resume = i40e_pci_error_resume,
10554 static struct pci_driver i40e_driver = {
10555 .name = i40e_driver_name,
10556 .id_table = i40e_pci_tbl,
10557 .probe = i40e_probe,
10558 .remove = i40e_remove,
10560 .suspend = i40e_suspend,
10561 .resume = i40e_resume,
10563 .shutdown = i40e_shutdown,
10564 .err_handler = &i40e_err_handler,
10565 .sriov_configure = i40e_pci_sriov_configure,
10569 * i40e_init_module - Driver registration routine
10571 * i40e_init_module is the first routine called when the driver is
10572 * loaded. All it does is register with the PCI subsystem.
10574 static int __init i40e_init_module(void)
10576 pr_info("%s: %s - version %s\n", i40e_driver_name,
10577 i40e_driver_string, i40e_driver_version_str);
10578 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
10581 return pci_register_driver(&i40e_driver);
10583 module_init(i40e_init_module);
10586 * i40e_exit_module - Driver exit cleanup routine
10588 * i40e_exit_module is called just before the driver is removed
10591 static void __exit i40e_exit_module(void)
10593 pci_unregister_driver(&i40e_driver);
10596 module_exit(i40e_exit_module);