drivers/net/ethernet/intel/igb/igb_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2013 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 /* ethtool support for igb */
  29
  30 #include <linux/vmalloc.h>
  31 #include <linux/netdevice.h>
  32 #include <linux/pci.h>
  33 #include <linux/delay.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/if_ether.h>
  36 #include <linux/ethtool.h>
  37 #include <linux/sched.h>
  38 #include <linux/slab.h>
  39 #include <linux/pm_runtime.h>
  40 #include <linux/highmem.h>
  41 #include <linux/mdio.h>
  42
  43 #include "igb.h"
  44
  45 struct igb_stats {
  46         char stat_string[ETH_GSTRING_LEN];
  47         int sizeof_stat;
  48         int stat_offset;
  49 };
  50
  51 #define IGB_STAT(_name, _stat) { \
  52         .stat_string = _name, \
  53         .sizeof_stat = FIELD_SIZEOF(struct igb_adapter, _stat), \
  54         .stat_offset = offsetof(struct igb_adapter, _stat) \
  55 }
  56 static const struct igb_stats igb_gstrings_stats[] = {
  57         IGB_STAT("rx_packets", stats.gprc),
  58         IGB_STAT("tx_packets", stats.gptc),
  59         IGB_STAT("rx_bytes", stats.gorc),
  60         IGB_STAT("tx_bytes", stats.gotc),
  61         IGB_STAT("rx_broadcast", stats.bprc),
  62         IGB_STAT("tx_broadcast", stats.bptc),
  63         IGB_STAT("rx_multicast", stats.mprc),
  64         IGB_STAT("tx_multicast", stats.mptc),
  65         IGB_STAT("multicast", stats.mprc),
  66         IGB_STAT("collisions", stats.colc),
  67         IGB_STAT("rx_crc_errors", stats.crcerrs),
  68         IGB_STAT("rx_no_buffer_count", stats.rnbc),
  69         IGB_STAT("rx_missed_errors", stats.mpc),
  70         IGB_STAT("tx_aborted_errors", stats.ecol),
  71         IGB_STAT("tx_carrier_errors", stats.tncrs),
  72         IGB_STAT("tx_window_errors", stats.latecol),
  73         IGB_STAT("tx_abort_late_coll", stats.latecol),
  74         IGB_STAT("tx_deferred_ok", stats.dc),
  75         IGB_STAT("tx_single_coll_ok", stats.scc),
  76         IGB_STAT("tx_multi_coll_ok", stats.mcc),
  77         IGB_STAT("tx_timeout_count", tx_timeout_count),
  78         IGB_STAT("rx_long_length_errors", stats.roc),
  79         IGB_STAT("rx_short_length_errors", stats.ruc),
  80         IGB_STAT("rx_align_errors", stats.algnerrc),
  81         IGB_STAT("tx_tcp_seg_good", stats.tsctc),
  82         IGB_STAT("tx_tcp_seg_failed", stats.tsctfc),
  83         IGB_STAT("rx_flow_control_xon", stats.xonrxc),
  84         IGB_STAT("rx_flow_control_xoff", stats.xoffrxc),
  85         IGB_STAT("tx_flow_control_xon", stats.xontxc),
  86         IGB_STAT("tx_flow_control_xoff", stats.xofftxc),
  87         IGB_STAT("rx_long_byte_count", stats.gorc),
  88         IGB_STAT("tx_dma_out_of_sync", stats.doosync),
  89         IGB_STAT("tx_smbus", stats.mgptc),
  90         IGB_STAT("rx_smbus", stats.mgprc),
  91         IGB_STAT("dropped_smbus", stats.mgpdc),
  92         IGB_STAT("os2bmc_rx_by_bmc", stats.o2bgptc),
  93         IGB_STAT("os2bmc_tx_by_bmc", stats.b2ospc),
  94         IGB_STAT("os2bmc_tx_by_host", stats.o2bspc),
  95         IGB_STAT("os2bmc_rx_by_host", stats.b2ogprc),
  96         IGB_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
  97         IGB_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
  98 };
  99
 100 #define IGB_NETDEV_STAT(_net_stat) { \
 101         .stat_string = __stringify(_net_stat), \
 102         .sizeof_stat = FIELD_SIZEOF(struct rtnl_link_stats64, _net_stat), \
 103         .stat_offset = offsetof(struct rtnl_link_stats64, _net_stat) \
 104 }
 105 static const struct igb_stats igb_gstrings_net_stats[] = {
 106         IGB_NETDEV_STAT(rx_errors),
 107         IGB_NETDEV_STAT(tx_errors),
 108         IGB_NETDEV_STAT(tx_dropped),
 109         IGB_NETDEV_STAT(rx_length_errors),
 110         IGB_NETDEV_STAT(rx_over_errors),
 111         IGB_NETDEV_STAT(rx_frame_errors),
 112         IGB_NETDEV_STAT(rx_fifo_errors),
 113         IGB_NETDEV_STAT(tx_fifo_errors),
 114         IGB_NETDEV_STAT(tx_heartbeat_errors)
 115 };
 116
 117 #define IGB_GLOBAL_STATS_LEN    \
 118         (sizeof(igb_gstrings_stats) / sizeof(struct igb_stats))
 119 #define IGB_NETDEV_STATS_LEN    \
 120         (sizeof(igb_gstrings_net_stats) / sizeof(struct igb_stats))
 121 #define IGB_RX_QUEUE_STATS_LEN \
 122         (sizeof(struct igb_rx_queue_stats) / sizeof(u64))
 123
 124 #define IGB_TX_QUEUE_STATS_LEN 3 /* packets, bytes, restart_queue */
 125
 126 #define IGB_QUEUE_STATS_LEN \
 127         ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues * \
 128           IGB_RX_QUEUE_STATS_LEN) + \
 129          (((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues * \
 130           IGB_TX_QUEUE_STATS_LEN))
 131 #define IGB_STATS_LEN \
 132         (IGB_GLOBAL_STATS_LEN + IGB_NETDEV_STATS_LEN + IGB_QUEUE_STATS_LEN)
 133
 134 static const char igb_gstrings_test[][ETH_GSTRING_LEN] = {
 135         "Register test  (offline)", "Eeprom test    (offline)",
 136         "Interrupt test (offline)", "Loopback test  (offline)",
 137         "Link test   (on/offline)"
 138 };
 139 #define IGB_TEST_LEN (sizeof(igb_gstrings_test) / ETH_GSTRING_LEN)
 140
 141 static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 142 {
 143         struct igb_adapter *adapter = netdev_priv(netdev);
 144         struct e1000_hw *hw = &adapter->hw;
 145         u32 status;
 146
 147         if (hw->phy.media_type == e1000_media_type_copper) {
 148
 149                 ecmd->supported = (SUPPORTED_10baseT_Half |
 150                                    SUPPORTED_10baseT_Full |
 151                                    SUPPORTED_100baseT_Half |
 152                                    SUPPORTED_100baseT_Full |
 153                                    SUPPORTED_1000baseT_Full|
 154                                    SUPPORTED_Autoneg |
 155                                    SUPPORTED_TP |
 156                                    SUPPORTED_Pause);
 157                 ecmd->advertising = ADVERTISED_TP;
 158
 159                 if (hw->mac.autoneg == 1) {
 160                         ecmd->advertising |= ADVERTISED_Autoneg;
 161                         /* the e1000 autoneg seems to match ethtool nicely */
 162                         ecmd->advertising |= hw->phy.autoneg_advertised;
 163                 }
 164
 165                 if (hw->mac.autoneg != 1)
 166                         ecmd->advertising &= ~(ADVERTISED_Pause |
 167                                                ADVERTISED_Asym_Pause);
 168
 169                 if (hw->fc.requested_mode == e1000_fc_full)
 170                         ecmd->advertising |= ADVERTISED_Pause;
 171                 else if (hw->fc.requested_mode == e1000_fc_rx_pause)
 172                         ecmd->advertising |= (ADVERTISED_Pause |
 173                                               ADVERTISED_Asym_Pause);
 174                 else if (hw->fc.requested_mode == e1000_fc_tx_pause)
 175                         ecmd->advertising |=  ADVERTISED_Asym_Pause;
 176                 else
 177                         ecmd->advertising &= ~(ADVERTISED_Pause |
 178                                                ADVERTISED_Asym_Pause);
 179
 180                 ecmd->port = PORT_TP;
 181                 ecmd->phy_address = hw->phy.addr;
 182                 ecmd->transceiver = XCVR_INTERNAL;
 183         } else {
 184                 ecmd->supported = (SUPPORTED_1000baseT_Full |
 185                                    SUPPORTED_100baseT_Full |
 186                                    SUPPORTED_FIBRE |
 187                                    SUPPORTED_Autoneg |
 188                                    SUPPORTED_Pause);
 189                 if (hw->mac.type == e1000_i354)
 190                                 ecmd->supported |= SUPPORTED_2500baseX_Full;
 191
 192                 ecmd->advertising = ADVERTISED_FIBRE;
 193
 194                 switch (adapter->link_speed) {
 195                 case SPEED_2500:
 196                         ecmd->advertising = ADVERTISED_2500baseX_Full;
 197                         break;
 198                 case SPEED_1000:
 199                         ecmd->advertising = ADVERTISED_1000baseT_Full;
 200                         break;
 201                 case SPEED_100:
 202                         ecmd->advertising = ADVERTISED_100baseT_Full;
 203                         break;
 204                 default:
 205                         break;
 206                 }
 207
 208                 if (hw->mac.autoneg == 1)
 209                         ecmd->advertising |= ADVERTISED_Autoneg;
 210
 211                 ecmd->port = PORT_FIBRE;
 212                 ecmd->transceiver = XCVR_EXTERNAL;
 213         }
 214
 215         status = rd32(E1000_STATUS);
 216
 217         if (status & E1000_STATUS_LU) {
 218                 if ((hw->mac.type == e1000_i354) &&
 219                     (status & E1000_STATUS_2P5_SKU) &&
 220                     !(status & E1000_STATUS_2P5_SKU_OVER))
 221                         ecmd->speed = SPEED_2500;
 222                 else if (status & E1000_STATUS_SPEED_1000)
 223                         ecmd->speed = SPEED_1000;
 224                 else if (status & E1000_STATUS_SPEED_100)
 225                         ecmd->speed = SPEED_100;
 226                 else
 227                         ecmd->speed = SPEED_10;
 228                 if ((status & E1000_STATUS_FD) ||
 229                     hw->phy.media_type != e1000_media_type_copper)
 230                         ecmd->duplex = DUPLEX_FULL;
 231                 else
 232                         ecmd->duplex = DUPLEX_HALF;
 233         } else {
 234                 ecmd->speed = -1;
 235                 ecmd->duplex = -1;
 236         }
 237
 238         if ((hw->phy.media_type == e1000_media_type_fiber) ||
 239             hw->mac.autoneg)
 240                 ecmd->autoneg = AUTONEG_ENABLE;
 241         else
 242                 ecmd->autoneg = AUTONEG_DISABLE;
 243
 244         /* MDI-X => 2; MDI =>1; Invalid =>0 */
 245         if (hw->phy.media_type == e1000_media_type_copper)
 246                 ecmd->eth_tp_mdix = hw->phy.is_mdix ? ETH_TP_MDI_X :
 247                                                       ETH_TP_MDI;
 248         else
 249                 ecmd->eth_tp_mdix = ETH_TP_MDI_INVALID;
 250
 251         if (hw->phy.mdix == AUTO_ALL_MODES)
 252                 ecmd->eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
 253         else
 254                 ecmd->eth_tp_mdix_ctrl = hw->phy.mdix;
 255
 256         return 0;
 257 }
 258
 259 static int igb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 260 {
 261         struct igb_adapter *adapter = netdev_priv(netdev);
 262         struct e1000_hw *hw = &adapter->hw;
 263
 264         /* When SoL/IDER sessions are active, autoneg/speed/duplex
 265          * cannot be changed
 266          */
 267         if (igb_check_reset_block(hw)) {
 268                 dev_err(&adapter->pdev->dev,
 269                         "Cannot change link characteristics when SoL/IDER is active.\n");
 270                 return -EINVAL;
 271         }
 272
 273         /* MDI setting is only allowed when autoneg enabled because
 274          * some hardware doesn't allow MDI setting when speed or
 275          * duplex is forced.
 276          */
 277         if (ecmd->eth_tp_mdix_ctrl) {
 278                 if (hw->phy.media_type != e1000_media_type_copper)
 279                         return -EOPNOTSUPP;
 280
 281                 if ((ecmd->eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
 282                     (ecmd->autoneg != AUTONEG_ENABLE)) {
 283                         dev_err(&adapter->pdev->dev, "forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
 284                         return -EINVAL;
 285                 }
 286         }
 287
 288         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 289                 msleep(1);
 290
 291         if (ecmd->autoneg == AUTONEG_ENABLE) {
 292                 hw->mac.autoneg = 1;
 293                 if (hw->phy.media_type == e1000_media_type_fiber) {
 294                         hw->phy.autoneg_advertised = ecmd->advertising |
 295                                                      ADVERTISED_FIBRE |
 296                                                      ADVERTISED_Autoneg;
 297                         switch (adapter->link_speed) {
 298                         case SPEED_2500:
 299                                 hw->phy.autoneg_advertised =
 300                                         ADVERTISED_2500baseX_Full;
 301                                 break;
 302                         case SPEED_1000:
 303                                 hw->phy.autoneg_advertised =
 304                                         ADVERTISED_1000baseT_Full;
 305                                 break;
 306                         case SPEED_100:
 307                                 hw->phy.autoneg_advertised =
 308                                         ADVERTISED_100baseT_Full;
 309                                 break;
 310                         default:
 311                                 break;
 312                         }
 313                 } else {
 314                         hw->phy.autoneg_advertised = ecmd->advertising |
 315                                                      ADVERTISED_TP |
 316                                                      ADVERTISED_Autoneg;
 317                 }
 318                 ecmd->advertising = hw->phy.autoneg_advertised;
 319                 if (adapter->fc_autoneg)
 320                         hw->fc.requested_mode = e1000_fc_default;
 321         } else {
 322                 u32 speed = ethtool_cmd_speed(ecmd);
 323                 /* calling this overrides forced MDI setting */
 324                 if (igb_set_spd_dplx(adapter, speed, ecmd->duplex)) {
 325                         clear_bit(__IGB_RESETTING, &adapter->state);
 326                         return -EINVAL;
 327                 }
 328         }
 329
 330         /* MDI-X => 2; MDI => 1; Auto => 3 */
 331         if (ecmd->eth_tp_mdix_ctrl) {
 332                 /* fix up the value for auto (3 => 0) as zero is mapped
 333                  * internally to auto
 334                  */
 335                 if (ecmd->eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
 336                         hw->phy.mdix = AUTO_ALL_MODES;
 337                 else
 338                         hw->phy.mdix = ecmd->eth_tp_mdix_ctrl;
 339         }
 340
 341         /* reset the link */
 342         if (netif_running(adapter->netdev)) {
 343                 igb_down(adapter);
 344                 igb_up(adapter);
 345         } else
 346                 igb_reset(adapter);
 347
 348         clear_bit(__IGB_RESETTING, &adapter->state);
 349         return 0;
 350 }
 351
 352 static u32 igb_get_link(struct net_device *netdev)
 353 {
 354         struct igb_adapter *adapter = netdev_priv(netdev);
 355         struct e1000_mac_info *mac = &adapter->hw.mac;
 356
 357         /* If the link is not reported up to netdev, interrupts are disabled,
 358          * and so the physical link state may have changed since we last
 359          * looked. Set get_link_status to make sure that the true link
 360          * state is interrogated, rather than pulling a cached and possibly
 361          * stale link state from the driver.
 362          */
 363         if (!netif_carrier_ok(netdev))
 364                 mac->get_link_status = 1;
 365
 366         return igb_has_link(adapter);
 367 }
 368
 369 static void igb_get_pauseparam(struct net_device *netdev,
 370                                struct ethtool_pauseparam *pause)
 371 {
 372         struct igb_adapter *adapter = netdev_priv(netdev);
 373         struct e1000_hw *hw = &adapter->hw;
 374
 375         pause->autoneg =
 376                 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
 377
 378         if (hw->fc.current_mode == e1000_fc_rx_pause)
 379                 pause->rx_pause = 1;
 380         else if (hw->fc.current_mode == e1000_fc_tx_pause)
 381                 pause->tx_pause = 1;
 382         else if (hw->fc.current_mode == e1000_fc_full) {
 383                 pause->rx_pause = 1;
 384                 pause->tx_pause = 1;
 385         }
 386 }
 387
 388 static int igb_set_pauseparam(struct net_device *netdev,
 389                               struct ethtool_pauseparam *pause)
 390 {
 391         struct igb_adapter *adapter = netdev_priv(netdev);
 392         struct e1000_hw *hw = &adapter->hw;
 393         int retval = 0;
 394
 395         adapter->fc_autoneg = pause->autoneg;
 396
 397         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 398                 msleep(1);
 399
 400         if (adapter->fc_autoneg == AUTONEG_ENABLE) {
 401                 hw->fc.requested_mode = e1000_fc_default;
 402                 if (netif_running(adapter->netdev)) {
 403                         igb_down(adapter);
 404                         igb_up(adapter);
 405                 } else {
 406                         igb_reset(adapter);
 407                 }
 408         } else {
 409                 if (pause->rx_pause && pause->tx_pause)
 410                         hw->fc.requested_mode = e1000_fc_full;
 411                 else if (pause->rx_pause && !pause->tx_pause)
 412                         hw->fc.requested_mode = e1000_fc_rx_pause;
 413                 else if (!pause->rx_pause && pause->tx_pause)
 414                         hw->fc.requested_mode = e1000_fc_tx_pause;
 415                 else if (!pause->rx_pause && !pause->tx_pause)
 416                         hw->fc.requested_mode = e1000_fc_none;
 417
 418                 hw->fc.current_mode = hw->fc.requested_mode;
 419
 420                 retval = ((hw->phy.media_type == e1000_media_type_copper) ?
 421                           igb_force_mac_fc(hw) : igb_setup_link(hw));
 422         }
 423
 424         clear_bit(__IGB_RESETTING, &adapter->state);
 425         return retval;
 426 }
 427
 428 static u32 igb_get_msglevel(struct net_device *netdev)
 429 {
 430         struct igb_adapter *adapter = netdev_priv(netdev);
 431         return adapter->msg_enable;
 432 }
 433
 434 static void igb_set_msglevel(struct net_device *netdev, u32 data)
 435 {
 436         struct igb_adapter *adapter = netdev_priv(netdev);
 437         adapter->msg_enable = data;
 438 }
 439
 440 static int igb_get_regs_len(struct net_device *netdev)
 441 {
 442 #define IGB_REGS_LEN 739
 443         return IGB_REGS_LEN * sizeof(u32);
 444 }
 445
 446 static void igb_get_regs(struct net_device *netdev,
 447                          struct ethtool_regs *regs, void *p)
 448 {
 449         struct igb_adapter *adapter = netdev_priv(netdev);
 450         struct e1000_hw *hw = &adapter->hw;
 451         u32 *regs_buff = p;
 452         u8 i;
 453
 454         memset(p, 0, IGB_REGS_LEN * sizeof(u32));
 455
 456         regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
 457
 458         /* General Registers */
 459         regs_buff[0] = rd32(E1000_CTRL);
 460         regs_buff[1] = rd32(E1000_STATUS);
 461         regs_buff[2] = rd32(E1000_CTRL_EXT);
 462         regs_buff[3] = rd32(E1000_MDIC);
 463         regs_buff[4] = rd32(E1000_SCTL);
 464         regs_buff[5] = rd32(E1000_CONNSW);
 465         regs_buff[6] = rd32(E1000_VET);
 466         regs_buff[7] = rd32(E1000_LEDCTL);
 467         regs_buff[8] = rd32(E1000_PBA);
 468         regs_buff[9] = rd32(E1000_PBS);
 469         regs_buff[10] = rd32(E1000_FRTIMER);
 470         regs_buff[11] = rd32(E1000_TCPTIMER);
 471
 472         /* NVM Register */
 473         regs_buff[12] = rd32(E1000_EECD);
 474
 475         /* Interrupt */
 476         /* Reading EICS for EICR because they read the
 477          * same but EICS does not clear on read
 478          */
 479         regs_buff[13] = rd32(E1000_EICS);
 480         regs_buff[14] = rd32(E1000_EICS);
 481         regs_buff[15] = rd32(E1000_EIMS);
 482         regs_buff[16] = rd32(E1000_EIMC);
 483         regs_buff[17] = rd32(E1000_EIAC);
 484         regs_buff[18] = rd32(E1000_EIAM);
 485         /* Reading ICS for ICR because they read the
 486          * same but ICS does not clear on read
 487          */
 488         regs_buff[19] = rd32(E1000_ICS);
 489         regs_buff[20] = rd32(E1000_ICS);
 490         regs_buff[21] = rd32(E1000_IMS);
 491         regs_buff[22] = rd32(E1000_IMC);
 492         regs_buff[23] = rd32(E1000_IAC);
 493         regs_buff[24] = rd32(E1000_IAM);
 494         regs_buff[25] = rd32(E1000_IMIRVP);
 495
 496         /* Flow Control */
 497         regs_buff[26] = rd32(E1000_FCAL);
 498         regs_buff[27] = rd32(E1000_FCAH);
 499         regs_buff[28] = rd32(E1000_FCTTV);
 500         regs_buff[29] = rd32(E1000_FCRTL);
 501         regs_buff[30] = rd32(E1000_FCRTH);
 502         regs_buff[31] = rd32(E1000_FCRTV);
 503
 504         /* Receive */
 505         regs_buff[32] = rd32(E1000_RCTL);
 506         regs_buff[33] = rd32(E1000_RXCSUM);
 507         regs_buff[34] = rd32(E1000_RLPML);
 508         regs_buff[35] = rd32(E1000_RFCTL);
 509         regs_buff[36] = rd32(E1000_MRQC);
 510         regs_buff[37] = rd32(E1000_VT_CTL);
 511
 512         /* Transmit */
 513         regs_buff[38] = rd32(E1000_TCTL);
 514         regs_buff[39] = rd32(E1000_TCTL_EXT);
 515         regs_buff[40] = rd32(E1000_TIPG);
 516         regs_buff[41] = rd32(E1000_DTXCTL);
 517
 518         /* Wake Up */
 519         regs_buff[42] = rd32(E1000_WUC);
 520         regs_buff[43] = rd32(E1000_WUFC);
 521         regs_buff[44] = rd32(E1000_WUS);
 522         regs_buff[45] = rd32(E1000_IPAV);
 523         regs_buff[46] = rd32(E1000_WUPL);
 524
 525         /* MAC */
 526         regs_buff[47] = rd32(E1000_PCS_CFG0);
 527         regs_buff[48] = rd32(E1000_PCS_LCTL);
 528         regs_buff[49] = rd32(E1000_PCS_LSTAT);
 529         regs_buff[50] = rd32(E1000_PCS_ANADV);
 530         regs_buff[51] = rd32(E1000_PCS_LPAB);
 531         regs_buff[52] = rd32(E1000_PCS_NPTX);
 532         regs_buff[53] = rd32(E1000_PCS_LPABNP);
 533
 534         /* Statistics */
 535         regs_buff[54] = adapter->stats.crcerrs;
 536         regs_buff[55] = adapter->stats.algnerrc;
 537         regs_buff[56] = adapter->stats.symerrs;
 538         regs_buff[57] = adapter->stats.rxerrc;
 539         regs_buff[58] = adapter->stats.mpc;
 540         regs_buff[59] = adapter->stats.scc;
 541         regs_buff[60] = adapter->stats.ecol;
 542         regs_buff[61] = adapter->stats.mcc;
 543         regs_buff[62] = adapter->stats.latecol;
 544         regs_buff[63] = adapter->stats.colc;
 545         regs_buff[64] = adapter->stats.dc;
 546         regs_buff[65] = adapter->stats.tncrs;
 547         regs_buff[66] = adapter->stats.sec;
 548         regs_buff[67] = adapter->stats.htdpmc;
 549         regs_buff[68] = adapter->stats.rlec;
 550         regs_buff[69] = adapter->stats.xonrxc;
 551         regs_buff[70] = adapter->stats.xontxc;
 552         regs_buff[71] = adapter->stats.xoffrxc;
 553         regs_buff[72] = adapter->stats.xofftxc;
 554         regs_buff[73] = adapter->stats.fcruc;
 555         regs_buff[74] = adapter->stats.prc64;
 556         regs_buff[75] = adapter->stats.prc127;
 557         regs_buff[76] = adapter->stats.prc255;
 558         regs_buff[77] = adapter->stats.prc511;
 559         regs_buff[78] = adapter->stats.prc1023;
 560         regs_buff[79] = adapter->stats.prc1522;
 561         regs_buff[80] = adapter->stats.gprc;
 562         regs_buff[81] = adapter->stats.bprc;
 563         regs_buff[82] = adapter->stats.mprc;
 564         regs_buff[83] = adapter->stats.gptc;
 565         regs_buff[84] = adapter->stats.gorc;
 566         regs_buff[86] = adapter->stats.gotc;
 567         regs_buff[88] = adapter->stats.rnbc;
 568         regs_buff[89] = adapter->stats.ruc;
 569         regs_buff[90] = adapter->stats.rfc;
 570         regs_buff[91] = adapter->stats.roc;
 571         regs_buff[92] = adapter->stats.rjc;
 572         regs_buff[93] = adapter->stats.mgprc;
 573         regs_buff[94] = adapter->stats.mgpdc;
 574         regs_buff[95] = adapter->stats.mgptc;
 575         regs_buff[96] = adapter->stats.tor;
 576         regs_buff[98] = adapter->stats.tot;
 577         regs_buff[100] = adapter->stats.tpr;
 578         regs_buff[101] = adapter->stats.tpt;
 579         regs_buff[102] = adapter->stats.ptc64;
 580         regs_buff[103] = adapter->stats.ptc127;
 581         regs_buff[104] = adapter->stats.ptc255;
 582         regs_buff[105] = adapter->stats.ptc511;
 583         regs_buff[106] = adapter->stats.ptc1023;
 584         regs_buff[107] = adapter->stats.ptc1522;
 585         regs_buff[108] = adapter->stats.mptc;
 586         regs_buff[109] = adapter->stats.bptc;
 587         regs_buff[110] = adapter->stats.tsctc;
 588         regs_buff[111] = adapter->stats.iac;
 589         regs_buff[112] = adapter->stats.rpthc;
 590         regs_buff[113] = adapter->stats.hgptc;
 591         regs_buff[114] = adapter->stats.hgorc;
 592         regs_buff[116] = adapter->stats.hgotc;
 593         regs_buff[118] = adapter->stats.lenerrs;
 594         regs_buff[119] = adapter->stats.scvpc;
 595         regs_buff[120] = adapter->stats.hrmpc;
 596
 597         for (i = 0; i < 4; i++)
 598                 regs_buff[121 + i] = rd32(E1000_SRRCTL(i));
 599         for (i = 0; i < 4; i++)
 600                 regs_buff[125 + i] = rd32(E1000_PSRTYPE(i));
 601         for (i = 0; i < 4; i++)
 602                 regs_buff[129 + i] = rd32(E1000_RDBAL(i));
 603         for (i = 0; i < 4; i++)
 604                 regs_buff[133 + i] = rd32(E1000_RDBAH(i));
 605         for (i = 0; i < 4; i++)
 606                 regs_buff[137 + i] = rd32(E1000_RDLEN(i));
 607         for (i = 0; i < 4; i++)
 608                 regs_buff[141 + i] = rd32(E1000_RDH(i));
 609         for (i = 0; i < 4; i++)
 610                 regs_buff[145 + i] = rd32(E1000_RDT(i));
 611         for (i = 0; i < 4; i++)
 612                 regs_buff[149 + i] = rd32(E1000_RXDCTL(i));
 613
 614         for (i = 0; i < 10; i++)
 615                 regs_buff[153 + i] = rd32(E1000_EITR(i));
 616         for (i = 0; i < 8; i++)
 617                 regs_buff[163 + i] = rd32(E1000_IMIR(i));
 618         for (i = 0; i < 8; i++)
 619                 regs_buff[171 + i] = rd32(E1000_IMIREXT(i));
 620         for (i = 0; i < 16; i++)
 621                 regs_buff[179 + i] = rd32(E1000_RAL(i));
 622         for (i = 0; i < 16; i++)
 623                 regs_buff[195 + i] = rd32(E1000_RAH(i));
 624
 625         for (i = 0; i < 4; i++)
 626                 regs_buff[211 + i] = rd32(E1000_TDBAL(i));
 627         for (i = 0; i < 4; i++)
 628                 regs_buff[215 + i] = rd32(E1000_TDBAH(i));
 629         for (i = 0; i < 4; i++)
 630                 regs_buff[219 + i] = rd32(E1000_TDLEN(i));
 631         for (i = 0; i < 4; i++)
 632                 regs_buff[223 + i] = rd32(E1000_TDH(i));
 633         for (i = 0; i < 4; i++)
 634                 regs_buff[227 + i] = rd32(E1000_TDT(i));
 635         for (i = 0; i < 4; i++)
 636                 regs_buff[231 + i] = rd32(E1000_TXDCTL(i));
 637         for (i = 0; i < 4; i++)
 638                 regs_buff[235 + i] = rd32(E1000_TDWBAL(i));
 639         for (i = 0; i < 4; i++)
 640                 regs_buff[239 + i] = rd32(E1000_TDWBAH(i));
 641         for (i = 0; i < 4; i++)
 642                 regs_buff[243 + i] = rd32(E1000_DCA_TXCTRL(i));
 643
 644         for (i = 0; i < 4; i++)
 645                 regs_buff[247 + i] = rd32(E1000_IP4AT_REG(i));
 646         for (i = 0; i < 4; i++)
 647                 regs_buff[251 + i] = rd32(E1000_IP6AT_REG(i));
 648         for (i = 0; i < 32; i++)
 649                 regs_buff[255 + i] = rd32(E1000_WUPM_REG(i));
 650         for (i = 0; i < 128; i++)
 651                 regs_buff[287 + i] = rd32(E1000_FFMT_REG(i));
 652         for (i = 0; i < 128; i++)
 653                 regs_buff[415 + i] = rd32(E1000_FFVT_REG(i));
 654         for (i = 0; i < 4; i++)
 655                 regs_buff[543 + i] = rd32(E1000_FFLT_REG(i));
 656
 657         regs_buff[547] = rd32(E1000_TDFH);
 658         regs_buff[548] = rd32(E1000_TDFT);
 659         regs_buff[549] = rd32(E1000_TDFHS);
 660         regs_buff[550] = rd32(E1000_TDFPC);
 661
 662         if (hw->mac.type > e1000_82580) {
 663                 regs_buff[551] = adapter->stats.o2bgptc;
 664                 regs_buff[552] = adapter->stats.b2ospc;
 665                 regs_buff[553] = adapter->stats.o2bspc;
 666                 regs_buff[554] = adapter->stats.b2ogprc;
 667         }
 668
 669         if (hw->mac.type != e1000_82576)
 670                 return;
 671         for (i = 0; i < 12; i++)
 672                 regs_buff[555 + i] = rd32(E1000_SRRCTL(i + 4));
 673         for (i = 0; i < 4; i++)
 674                 regs_buff[567 + i] = rd32(E1000_PSRTYPE(i + 4));
 675         for (i = 0; i < 12; i++)
 676                 regs_buff[571 + i] = rd32(E1000_RDBAL(i + 4));
 677         for (i = 0; i < 12; i++)
 678                 regs_buff[583 + i] = rd32(E1000_RDBAH(i + 4));
 679         for (i = 0; i < 12; i++)
 680                 regs_buff[595 + i] = rd32(E1000_RDLEN(i + 4));
 681         for (i = 0; i < 12; i++)
 682                 regs_buff[607 + i] = rd32(E1000_RDH(i + 4));
 683         for (i = 0; i < 12; i++)
 684                 regs_buff[619 + i] = rd32(E1000_RDT(i + 4));
 685         for (i = 0; i < 12; i++)
 686                 regs_buff[631 + i] = rd32(E1000_RXDCTL(i + 4));
 687
 688         for (i = 0; i < 12; i++)
 689                 regs_buff[643 + i] = rd32(E1000_TDBAL(i + 4));
 690         for (i = 0; i < 12; i++)
 691                 regs_buff[655 + i] = rd32(E1000_TDBAH(i + 4));
 692         for (i = 0; i < 12; i++)
 693                 regs_buff[667 + i] = rd32(E1000_TDLEN(i + 4));
 694         for (i = 0; i < 12; i++)
 695                 regs_buff[679 + i] = rd32(E1000_TDH(i + 4));
 696         for (i = 0; i < 12; i++)
 697                 regs_buff[691 + i] = rd32(E1000_TDT(i + 4));
 698         for (i = 0; i < 12; i++)
 699                 regs_buff[703 + i] = rd32(E1000_TXDCTL(i + 4));
 700         for (i = 0; i < 12; i++)
 701                 regs_buff[715 + i] = rd32(E1000_TDWBAL(i + 4));
 702         for (i = 0; i < 12; i++)
 703                 regs_buff[727 + i] = rd32(E1000_TDWBAH(i + 4));
 704 }
 705
 706 static int igb_get_eeprom_len(struct net_device *netdev)
 707 {
 708         struct igb_adapter *adapter = netdev_priv(netdev);
 709         return adapter->hw.nvm.word_size * 2;
 710 }
 711
 712 static int igb_get_eeprom(struct net_device *netdev,
 713                           struct ethtool_eeprom *eeprom, u8 *bytes)
 714 {
 715         struct igb_adapter *adapter = netdev_priv(netdev);
 716         struct e1000_hw *hw = &adapter->hw;
 717         u16 *eeprom_buff;
 718         int first_word, last_word;
 719         int ret_val = 0;
 720         u16 i;
 721
 722         if (eeprom->len == 0)
 723                 return -EINVAL;
 724
 725         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 726
 727         first_word = eeprom->offset >> 1;
 728         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 729
 730         eeprom_buff = kmalloc(sizeof(u16) *
 731                         (last_word - first_word + 1), GFP_KERNEL);
 732         if (!eeprom_buff)
 733                 return -ENOMEM;
 734
 735         if (hw->nvm.type == e1000_nvm_eeprom_spi)
 736                 ret_val = hw->nvm.ops.read(hw, first_word,
 737                                            last_word - first_word + 1,
 738                                            eeprom_buff);
 739         else {
 740                 for (i = 0; i < last_word - first_word + 1; i++) {
 741                         ret_val = hw->nvm.ops.read(hw, first_word + i, 1,
 742                                                    &eeprom_buff[i]);
 743                         if (ret_val)
 744                                 break;
 745                 }
 746         }
 747
 748         /* Device's eeprom is always little-endian, word addressable */
 749         for (i = 0; i < last_word - first_word + 1; i++)
 750                 le16_to_cpus(&eeprom_buff[i]);
 751
 752         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
 753                         eeprom->len);
 754         kfree(eeprom_buff);
 755
 756         return ret_val;
 757 }
 758
 759 static int igb_set_eeprom(struct net_device *netdev,
 760                           struct ethtool_eeprom *eeprom, u8 *bytes)
 761 {
 762         struct igb_adapter *adapter = netdev_priv(netdev);
 763         struct e1000_hw *hw = &adapter->hw;
 764         u16 *eeprom_buff;
 765         void *ptr;
 766         int max_len, first_word, last_word, ret_val = 0;
 767         u16 i;
 768
 769         if (eeprom->len == 0)
 770                 return -EOPNOTSUPP;
 771
 772         if (hw->mac.type == e1000_i211)
 773                 return -EOPNOTSUPP;
 774
 775         if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
 776                 return -EFAULT;
 777
 778         max_len = hw->nvm.word_size * 2;
 779
 780         first_word = eeprom->offset >> 1;
 781         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 782         eeprom_buff = kmalloc(max_len, GFP_KERNEL);
 783         if (!eeprom_buff)
 784                 return -ENOMEM;
 785
 786         ptr = (void *)eeprom_buff;
 787
 788         if (eeprom->offset & 1) {
 789                 /* need read/modify/write of first changed EEPROM word
 790                  * only the second byte of the word is being modified
 791                  */
 792                 ret_val = hw->nvm.ops.read(hw, first_word, 1,
 793                                             &eeprom_buff[0]);
 794                 ptr++;
 795         }
 796         if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
 797                 /* need read/modify/write of last changed EEPROM word
 798                  * only the first byte of the word is being modified
 799                  */
 800                 ret_val = hw->nvm.ops.read(hw, last_word, 1,
 801                                    &eeprom_buff[last_word - first_word]);
 802         }
 803
 804         /* Device's eeprom is always little-endian, word addressable */
 805         for (i = 0; i < last_word - first_word + 1; i++)
 806                 le16_to_cpus(&eeprom_buff[i]);
 807
 808         memcpy(ptr, bytes, eeprom->len);
 809
 810         for (i = 0; i < last_word - first_word + 1; i++)
 811                 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
 812
 813         ret_val = hw->nvm.ops.write(hw, first_word,
 814                                     last_word - first_word + 1, eeprom_buff);
 815
 816         /* Update the checksum over the first part of the EEPROM if needed
 817          * and flush shadow RAM for 82573 controllers
 818          */
 819         if ((ret_val == 0) && ((first_word <= NVM_CHECKSUM_REG)))
 820                 hw->nvm.ops.update(hw);
 821
 822         igb_set_fw_version(adapter);
 823         kfree(eeprom_buff);
 824         return ret_val;
 825 }
 826
 827 static void igb_get_drvinfo(struct net_device *netdev,
 828                             struct ethtool_drvinfo *drvinfo)
 829 {
 830         struct igb_adapter *adapter = netdev_priv(netdev);
 831
 832         strlcpy(drvinfo->driver,  igb_driver_name, sizeof(drvinfo->driver));
 833         strlcpy(drvinfo->version, igb_driver_version, sizeof(drvinfo->version));
 834
 835         /* EEPROM image version # is reported as firmware version # for
 836          * 82575 controllers
 837          */
 838         strlcpy(drvinfo->fw_version, adapter->fw_version,
 839                 sizeof(drvinfo->fw_version));
 840         strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
 841                 sizeof(drvinfo->bus_info));
 842         drvinfo->n_stats = IGB_STATS_LEN;
 843         drvinfo->testinfo_len = IGB_TEST_LEN;
 844         drvinfo->regdump_len = igb_get_regs_len(netdev);
 845         drvinfo->eedump_len = igb_get_eeprom_len(netdev);
 846 }
 847
 848 static void igb_get_ringparam(struct net_device *netdev,
 849                               struct ethtool_ringparam *ring)
 850 {
 851         struct igb_adapter *adapter = netdev_priv(netdev);
 852
 853         ring->rx_max_pending = IGB_MAX_RXD;
 854         ring->tx_max_pending = IGB_MAX_TXD;
 855         ring->rx_pending = adapter->rx_ring_count;
 856         ring->tx_pending = adapter->tx_ring_count;
 857 }
 858
 859 static int igb_set_ringparam(struct net_device *netdev,
 860                              struct ethtool_ringparam *ring)
 861 {
 862         struct igb_adapter *adapter = netdev_priv(netdev);
 863         struct igb_ring *temp_ring;
 864         int i, err = 0;
 865         u16 new_rx_count, new_tx_count;
 866
 867         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 868                 return -EINVAL;
 869
 870         new_rx_count = min_t(u32, ring->rx_pending, IGB_MAX_RXD);
 871         new_rx_count = max_t(u16, new_rx_count, IGB_MIN_RXD);
 872         new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
 873
 874         new_tx_count = min_t(u32, ring->tx_pending, IGB_MAX_TXD);
 875         new_tx_count = max_t(u16, new_tx_count, IGB_MIN_TXD);
 876         new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
 877
 878         if ((new_tx_count == adapter->tx_ring_count) &&
 879             (new_rx_count == adapter->rx_ring_count)) {
 880                 /* nothing to do */
 881                 return 0;
 882         }
 883
 884         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 885                 msleep(1);
 886
 887         if (!netif_running(adapter->netdev)) {
 888                 for (i = 0; i < adapter->num_tx_queues; i++)
 889                         adapter->tx_ring[i]->count = new_tx_count;
 890                 for (i = 0; i < adapter->num_rx_queues; i++)
 891                         adapter->rx_ring[i]->count = new_rx_count;
 892                 adapter->tx_ring_count = new_tx_count;
 893                 adapter->rx_ring_count = new_rx_count;
 894                 goto clear_reset;
 895         }
 896
 897         if (adapter->num_tx_queues > adapter->num_rx_queues)
 898                 temp_ring = vmalloc(adapter->num_tx_queues *
 899                                     sizeof(struct igb_ring));
 900         else
 901                 temp_ring = vmalloc(adapter->num_rx_queues *
 902                                     sizeof(struct igb_ring));
 903
 904         if (!temp_ring) {
 905                 err = -ENOMEM;
 906                 goto clear_reset;
 907         }
 908
 909         igb_down(adapter);
 910
 911         /* We can't just free everything and then setup again,
 912          * because the ISRs in MSI-X mode get passed pointers
 913          * to the Tx and Rx ring structs.
 914          */
 915         if (new_tx_count != adapter->tx_ring_count) {
 916                 for (i = 0; i < adapter->num_tx_queues; i++) {
 917                         memcpy(&temp_ring[i], adapter->tx_ring[i],
 918                                sizeof(struct igb_ring));
 919
 920                         temp_ring[i].count = new_tx_count;
 921                         err = igb_setup_tx_resources(&temp_ring[i]);
 922                         if (err) {
 923                                 while (i) {
 924                                         i--;
 925                                         igb_free_tx_resources(&temp_ring[i]);
 926                                 }
 927                                 goto err_setup;
 928                         }
 929                 }
 930
 931                 for (i = 0; i < adapter->num_tx_queues; i++) {
 932                         igb_free_tx_resources(adapter->tx_ring[i]);
 933
 934                         memcpy(adapter->tx_ring[i], &temp_ring[i],
 935                                sizeof(struct igb_ring));
 936                 }
 937
 938                 adapter->tx_ring_count = new_tx_count;
 939         }
 940
 941         if (new_rx_count != adapter->rx_ring_count) {
 942                 for (i = 0; i < adapter->num_rx_queues; i++) {
 943                         memcpy(&temp_ring[i], adapter->rx_ring[i],
 944                                sizeof(struct igb_ring));
 945
 946                         temp_ring[i].count = new_rx_count;
 947                         err = igb_setup_rx_resources(&temp_ring[i]);
 948                         if (err) {
 949                                 while (i) {
 950                                         i--;
 951                                         igb_free_rx_resources(&temp_ring[i]);
 952                                 }
 953                                 goto err_setup;
 954                         }
 955
 956                 }
 957
 958                 for (i = 0; i < adapter->num_rx_queues; i++) {
 959                         igb_free_rx_resources(adapter->rx_ring[i]);
 960
 961                         memcpy(adapter->rx_ring[i], &temp_ring[i],
 962                                sizeof(struct igb_ring));
 963                 }
 964
 965                 adapter->rx_ring_count = new_rx_count;
 966         }
 967 err_setup:
 968         igb_up(adapter);
 969         vfree(temp_ring);
 970 clear_reset:
 971         clear_bit(__IGB_RESETTING, &adapter->state);
 972         return err;
 973 }
 974
 975 /* ethtool register test data */
 976 struct igb_reg_test {
 977         u16 reg;
 978         u16 reg_offset;
 979         u16 array_len;
 980         u16 test_type;
 981         u32 mask;
 982         u32 write;
 983 };
 984
 985 /* In the hardware, registers are laid out either singly, in arrays
 986  * spaced 0x100 bytes apart, or in contiguous tables.  We assume
 987  * most tests take place on arrays or single registers (handled
 988  * as a single-element array) and special-case the tables.
 989  * Table tests are always pattern tests.
 990  *
 991  * We also make provision for some required setup steps by specifying
 992  * registers to be written without any read-back testing.
 993  */
 994
 995 #define PATTERN_TEST    1
 996 #define SET_READ_TEST   2
 997 #define WRITE_NO_TEST   3
 998 #define TABLE32_TEST    4
 999 #define TABLE64_TEST_LO 5
1000 #define TABLE64_TEST_HI 6
1001
1002 /* i210 reg test */
1003 static struct igb_reg_test reg_test_i210[] = {
1004         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1005         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1006         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1007         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1008         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1009         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1010         /* RDH is read-only for i210, only test RDT. */
1011         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1012         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1013         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1014         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1015         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1016         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1017         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1018         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1019         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1020         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1021         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1022         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1023         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1024                                                 0xFFFFFFFF, 0xFFFFFFFF },
1025         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1026                                                 0x900FFFFF, 0xFFFFFFFF },
1027         { E1000_MTA,       0, 128, TABLE32_TEST,
1028                                                 0xFFFFFFFF, 0xFFFFFFFF },
1029         { 0, 0, 0, 0, 0 }
1030 };
1031
1032 /* i350 reg test */
1033 static struct igb_reg_test reg_test_i350[] = {
1034         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1035         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1036         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1037         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFF0000, 0xFFFF0000 },
1038         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1039         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1040         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1041         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1042         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1043         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1044         /* RDH is read-only for i350, only test RDT. */
1045         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1046         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1047         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1048         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1049         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1050         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1051         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1052         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1053         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1054         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1055         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1056         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1057         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1058         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1059         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1060         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1061         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1062         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1063                                                 0xFFFFFFFF, 0xFFFFFFFF },
1064         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1065                                                 0xC3FFFFFF, 0xFFFFFFFF },
1066         { E1000_RA2,       0, 16, TABLE64_TEST_LO,
1067                                                 0xFFFFFFFF, 0xFFFFFFFF },
1068         { E1000_RA2,       0, 16, TABLE64_TEST_HI,
1069                                                 0xC3FFFFFF, 0xFFFFFFFF },
1070         { E1000_MTA,       0, 128, TABLE32_TEST,
1071                                                 0xFFFFFFFF, 0xFFFFFFFF },
1072         { 0, 0, 0, 0 }
1073 };
1074
1075 /* 82580 reg test */
1076 static struct igb_reg_test reg_test_82580[] = {
1077         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1078         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1079         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1080         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1081         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1082         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1083         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1084         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1085         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1086         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1087         /* RDH is read-only for 82580, only test RDT. */
1088         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1089         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1090         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1091         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1092         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1093         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1094         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1095         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1096         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1097         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1098         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1099         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1100         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1101         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1102         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1103         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1104         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1105         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1106                                                 0xFFFFFFFF, 0xFFFFFFFF },
1107         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1108                                                 0x83FFFFFF, 0xFFFFFFFF },
1109         { E1000_RA2,       0, 8, TABLE64_TEST_LO,
1110                                                 0xFFFFFFFF, 0xFFFFFFFF },
1111         { E1000_RA2,       0, 8, TABLE64_TEST_HI,
1112                                                 0x83FFFFFF, 0xFFFFFFFF },
1113         { E1000_MTA,       0, 128, TABLE32_TEST,
1114                                                 0xFFFFFFFF, 0xFFFFFFFF },
1115         { 0, 0, 0, 0 }
1116 };
1117
1118 /* 82576 reg test */
1119 static struct igb_reg_test reg_test_82576[] = {
1120         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1121         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1122         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1123         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1124         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1125         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1126         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1127         { E1000_RDBAL(4),  0x40, 12, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1128         { E1000_RDBAH(4),  0x40, 12, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1129         { E1000_RDLEN(4),  0x40, 12, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1130         /* Enable all RX queues before testing. */
1131         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
1132         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
1133         /* RDH is read-only for 82576, only test RDT. */
1134         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1135         { E1000_RDT(4),    0x40, 12,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1136         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, 0 },
1137         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, 0 },
1138         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1139         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1140         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1141         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1142         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1143         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1144         { E1000_TDBAL(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1145         { E1000_TDBAH(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1146         { E1000_TDLEN(4),  0x40, 12,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1147         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1148         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1149         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1150         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1151         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1152         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
1153         { E1000_RA2,       0, 8, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1154         { E1000_RA2,       0, 8, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
1155         { E1000_MTA,       0, 128,TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1156         { 0, 0, 0, 0 }
1157 };
1158
1159 /* 82575 register test */
1160 static struct igb_reg_test reg_test_82575[] = {
1161         { E1000_FCAL,      0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1162         { E1000_FCAH,      0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1163         { E1000_FCT,       0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1164         { E1000_VET,       0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1165         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1166         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1167         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1168         /* Enable all four RX queues before testing. */
1169         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
1170         /* RDH is read-only for 82575, only test RDT. */
1171         { E1000_RDT(0),    0x100, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1172         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, 0 },
1173         { E1000_FCRTH,     0x100, 1, PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1174         { E1000_FCTTV,     0x100, 1, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1175         { E1000_TIPG,      0x100, 1, PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1176         { E1000_TDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1177         { E1000_TDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1178         { E1000_TDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1179         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1180         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0x003FFFFB },
1181         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0xFFFFFFFF },
1182         { E1000_TCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1183         { E1000_TXCW,      0x100, 1, PATTERN_TEST, 0xC000FFFF, 0x0000FFFF },
1184         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1185         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x800FFFFF, 0xFFFFFFFF },
1186         { E1000_MTA,       0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1187         { 0, 0, 0, 0 }
1188 };
1189
1190 static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data,
1191                              int reg, u32 mask, u32 write)
1192 {
1193         struct e1000_hw *hw = &adapter->hw;
1194         u32 pat, val;
1195         static const u32 _test[] =
1196                 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1197         for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {
1198                 wr32(reg, (_test[pat] & write));
1199                 val = rd32(reg) & mask;
1200                 if (val != (_test[pat] & write & mask)) {
1201                         dev_err(&adapter->pdev->dev,
1202                                 "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",
1203                                 reg, val, (_test[pat] & write & mask));
1204                         *data = reg;
1205                         return 1;
1206                 }
1207         }
1208
1209         return 0;
1210 }
1211
1212 static bool reg_set_and_check(struct igb_adapter *adapter, u64 *data,
1213                               int reg, u32 mask, u32 write)
1214 {
1215         struct e1000_hw *hw = &adapter->hw;
1216         u32 val;
1217         wr32(reg, write & mask);
1218         val = rd32(reg);
1219         if ((write & mask) != (val & mask)) {
1220                 dev_err(&adapter->pdev->dev,
1221                         "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n", reg,
1222                         (val & mask), (write & mask));
1223                 *data = reg;
1224                 return 1;
1225         }
1226
1227         return 0;
1228 }
1229
1230 #define REG_PATTERN_TEST(reg, mask, write) \
1231         do { \
1232                 if (reg_pattern_test(adapter, data, reg, mask, write)) \
1233                         return 1; \
1234         } while (0)
1235
1236 #define REG_SET_AND_CHECK(reg, mask, write) \
1237         do { \
1238                 if (reg_set_and_check(adapter, data, reg, mask, write)) \
1239                         return 1; \
1240         } while (0)
1241
1242 static int igb_reg_test(struct igb_adapter *adapter, u64 *data)
1243 {
1244         struct e1000_hw *hw = &adapter->hw;
1245         struct igb_reg_test *test;
1246         u32 value, before, after;
1247         u32 i, toggle;
1248
1249         switch (adapter->hw.mac.type) {
1250         case e1000_i350:
1251         case e1000_i354:
1252                 test = reg_test_i350;
1253                 toggle = 0x7FEFF3FF;
1254                 break;
1255         case e1000_i210:
1256         case e1000_i211:
1257                 test = reg_test_i210;
1258                 toggle = 0x7FEFF3FF;
1259                 break;
1260         case e1000_82580:
1261                 test = reg_test_82580;
1262                 toggle = 0x7FEFF3FF;
1263                 break;
1264         case e1000_82576:
1265                 test = reg_test_82576;
1266                 toggle = 0x7FFFF3FF;
1267                 break;
1268         default:
1269                 test = reg_test_82575;
1270                 toggle = 0x7FFFF3FF;
1271                 break;
1272         }
1273
1274         /* Because the status register is such a special case,
1275          * we handle it separately from the rest of the register
1276          * tests.  Some bits are read-only, some toggle, and some
1277          * are writable on newer MACs.
1278          */
1279         before = rd32(E1000_STATUS);
1280         value = (rd32(E1000_STATUS) & toggle);
1281         wr32(E1000_STATUS, toggle);
1282         after = rd32(E1000_STATUS) & toggle;
1283         if (value != after) {
1284                 dev_err(&adapter->pdev->dev,
1285                         "failed STATUS register test got: 0x%08X expected: 0x%08X\n",
1286                         after, value);
1287                 *data = 1;
1288                 return 1;
1289         }
1290         /* restore previous status */
1291         wr32(E1000_STATUS, before);
1292
1293         /* Perform the remainder of the register test, looping through
1294          * the test table until we either fail or reach the null entry.
1295          */
1296         while (test->reg) {
1297                 for (i = 0; i < test->array_len; i++) {
1298                         switch (test->test_type) {
1299                         case PATTERN_TEST:
1300                                 REG_PATTERN_TEST(test->reg +
1301                                                 (i * test->reg_offset),
1302                                                 test->mask,
1303                                                 test->write);
1304                                 break;
1305                         case SET_READ_TEST:
1306                                 REG_SET_AND_CHECK(test->reg +
1307                                                 (i * test->reg_offset),
1308                                                 test->mask,
1309                                                 test->write);
1310                                 break;
1311                         case WRITE_NO_TEST:
1312                                 writel(test->write,
1313                                     (adapter->hw.hw_addr + test->reg)
1314                                         + (i * test->reg_offset));
1315                                 break;
1316                         case TABLE32_TEST:
1317                                 REG_PATTERN_TEST(test->reg + (i * 4),
1318                                                 test->mask,
1319                                                 test->write);
1320                                 break;
1321                         case TABLE64_TEST_LO:
1322                                 REG_PATTERN_TEST(test->reg + (i * 8),
1323                                                 test->mask,
1324                                                 test->write);
1325                                 break;
1326                         case TABLE64_TEST_HI:
1327                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1328                                                 test->mask,
1329                                                 test->write);
1330                                 break;
1331                         }
1332                 }
1333                 test++;
1334         }
1335
1336         *data = 0;
1337         return 0;
1338 }
1339
1340 static int igb_eeprom_test(struct igb_adapter *adapter, u64 *data)
1341 {
1342         *data = 0;
1343
1344         /* Validate eeprom on all parts but i211 */
1345         if (adapter->hw.mac.type != e1000_i211) {
1346                 if (adapter->hw.nvm.ops.validate(&adapter->hw) < 0)
1347                         *data = 2;
1348         }
1349
1350         return *data;
1351 }
1352
1353 static irqreturn_t igb_test_intr(int irq, void *data)
1354 {
1355         struct igb_adapter *adapter = (struct igb_adapter *) data;
1356         struct e1000_hw *hw = &adapter->hw;
1357
1358         adapter->test_icr |= rd32(E1000_ICR);
1359
1360         return IRQ_HANDLED;
1361 }
1362
1363 static int igb_intr_test(struct igb_adapter *adapter, u64 *data)
1364 {
1365         struct e1000_hw *hw = &adapter->hw;
1366         struct net_device *netdev = adapter->netdev;
1367         u32 mask, ics_mask, i = 0, shared_int = true;
1368         u32 irq = adapter->pdev->irq;
1369
1370         *data = 0;
1371
1372         /* Hook up test interrupt handler just for this test */
1373         if (adapter->msix_entries) {
1374                 if (request_irq(adapter->msix_entries[0].vector,
1375                                 igb_test_intr, 0, netdev->name, adapter)) {
1376                         *data = 1;
1377                         return -1;
1378                 }
1379         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
1380                 shared_int = false;
1381                 if (request_irq(irq,
1382                                 igb_test_intr, 0, netdev->name, adapter)) {
1383                         *data = 1;
1384                         return -1;
1385                 }
1386         } else if (!request_irq(irq, igb_test_intr, IRQF_PROBE_SHARED,
1387                                 netdev->name, adapter)) {
1388                 shared_int = false;
1389         } else if (request_irq(irq, igb_test_intr, IRQF_SHARED,
1390                  netdev->name, adapter)) {
1391                 *data = 1;
1392                 return -1;
1393         }
1394         dev_info(&adapter->pdev->dev, "testing %s interrupt\n",
1395                 (shared_int ? "shared" : "unshared"));
1396
1397         /* Disable all the interrupts */
1398         wr32(E1000_IMC, ~0);
1399         wrfl();
1400         msleep(10);
1401
1402         /* Define all writable bits for ICS */
1403         switch (hw->mac.type) {
1404         case e1000_82575:
1405                 ics_mask = 0x37F47EDD;
1406                 break;
1407         case e1000_82576:
1408                 ics_mask = 0x77D4FBFD;
1409                 break;
1410         case e1000_82580:
1411                 ics_mask = 0x77DCFED5;
1412                 break;
1413         case e1000_i350:
1414         case e1000_i354:
1415         case e1000_i210:
1416         case e1000_i211:
1417                 ics_mask = 0x77DCFED5;
1418                 break;
1419         default:
1420                 ics_mask = 0x7FFFFFFF;
1421                 break;
1422         }
1423
1424         /* Test each interrupt */
1425         for (; i < 31; i++) {
1426                 /* Interrupt to test */
1427                 mask = 1 << i;
1428
1429                 if (!(mask & ics_mask))
1430                         continue;
1431
1432                 if (!shared_int) {
1433                         /* Disable the interrupt to be reported in
1434                          * the cause register and then force the same
1435                          * interrupt and see if one gets posted.  If
1436                          * an interrupt was posted to the bus, the
1437                          * test failed.
1438                          */
1439                         adapter->test_icr = 0;
1440
1441                         /* Flush any pending interrupts */
1442                         wr32(E1000_ICR, ~0);
1443
1444                         wr32(E1000_IMC, mask);
1445                         wr32(E1000_ICS, mask);
1446                         wrfl();
1447                         msleep(10);
1448
1449                         if (adapter->test_icr & mask) {
1450                                 *data = 3;
1451                                 break;
1452                         }
1453                 }
1454
1455                 /* Enable the interrupt to be reported in
1456                  * the cause register and then force the same
1457                  * interrupt and see if one gets posted.  If
1458                  * an interrupt was not posted to the bus, the
1459                  * test failed.
1460                  */
1461                 adapter->test_icr = 0;
1462
1463                 /* Flush any pending interrupts */
1464                 wr32(E1000_ICR, ~0);
1465
1466                 wr32(E1000_IMS, mask);
1467                 wr32(E1000_ICS, mask);
1468                 wrfl();
1469                 msleep(10);
1470
1471                 if (!(adapter->test_icr & mask)) {
1472                         *data = 4;
1473                         break;
1474                 }
1475
1476                 if (!shared_int) {
1477                         /* Disable the other interrupts to be reported in
1478                          * the cause register and then force the other
1479                          * interrupts and see if any get posted.  If
1480                          * an interrupt was posted to the bus, the
1481                          * test failed.
1482                          */
1483                         adapter->test_icr = 0;
1484
1485                         /* Flush any pending interrupts */
1486                         wr32(E1000_ICR, ~0);
1487
1488                         wr32(E1000_IMC, ~mask);
1489                         wr32(E1000_ICS, ~mask);
1490                         wrfl();
1491                         msleep(10);
1492
1493                         if (adapter->test_icr & mask) {
1494                                 *data = 5;
1495                                 break;
1496                         }
1497                 }
1498         }
1499
1500         /* Disable all the interrupts */
1501         wr32(E1000_IMC, ~0);
1502         wrfl();
1503         msleep(10);
1504
1505         /* Unhook test interrupt handler */
1506         if (adapter->msix_entries)
1507                 free_irq(adapter->msix_entries[0].vector, adapter);
1508         else
1509                 free_irq(irq, adapter);
1510
1511         return *data;
1512 }
1513
1514 static void igb_free_desc_rings(struct igb_adapter *adapter)
1515 {
1516         igb_free_tx_resources(&adapter->test_tx_ring);
1517         igb_free_rx_resources(&adapter->test_rx_ring);
1518 }
1519
1520 static int igb_setup_desc_rings(struct igb_adapter *adapter)
1521 {
1522         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1523         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1524         struct e1000_hw *hw = &adapter->hw;
1525         int ret_val;
1526
1527         /* Setup Tx descriptor ring and Tx buffers */
1528         tx_ring->count = IGB_DEFAULT_TXD;
1529         tx_ring->dev = &adapter->pdev->dev;
1530         tx_ring->netdev = adapter->netdev;
1531         tx_ring->reg_idx = adapter->vfs_allocated_count;
1532
1533         if (igb_setup_tx_resources(tx_ring)) {
1534                 ret_val = 1;
1535                 goto err_nomem;
1536         }
1537
1538         igb_setup_tctl(adapter);
1539         igb_configure_tx_ring(adapter, tx_ring);
1540
1541         /* Setup Rx descriptor ring and Rx buffers */
1542         rx_ring->count = IGB_DEFAULT_RXD;
1543         rx_ring->dev = &adapter->pdev->dev;
1544         rx_ring->netdev = adapter->netdev;
1545         rx_ring->reg_idx = adapter->vfs_allocated_count;
1546
1547         if (igb_setup_rx_resources(rx_ring)) {
1548                 ret_val = 3;
1549                 goto err_nomem;
1550         }
1551
1552         /* set the default queue to queue 0 of PF */
1553         wr32(E1000_MRQC, adapter->vfs_allocated_count << 3);
1554
1555         /* enable receive ring */
1556         igb_setup_rctl(adapter);
1557         igb_configure_rx_ring(adapter, rx_ring);
1558
1559         igb_alloc_rx_buffers(rx_ring, igb_desc_unused(rx_ring));
1560
1561         return 0;
1562
1563 err_nomem:
1564         igb_free_desc_rings(adapter);
1565         return ret_val;
1566 }
1567
1568 static void igb_phy_disable_receiver(struct igb_adapter *adapter)
1569 {
1570         struct e1000_hw *hw = &adapter->hw;
1571
1572         /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1573         igb_write_phy_reg(hw, 29, 0x001F);
1574         igb_write_phy_reg(hw, 30, 0x8FFC);
1575         igb_write_phy_reg(hw, 29, 0x001A);
1576         igb_write_phy_reg(hw, 30, 0x8FF0);
1577 }
1578
1579 static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
1580 {
1581         struct e1000_hw *hw = &adapter->hw;
1582         u32 ctrl_reg = 0;
1583
1584         hw->mac.autoneg = false;
1585
1586         if (hw->phy.type == e1000_phy_m88) {
1587                 if (hw->phy.id != I210_I_PHY_ID) {
1588                         /* Auto-MDI/MDIX Off */
1589                         igb_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1590                         /* reset to update Auto-MDI/MDIX */
1591                         igb_write_phy_reg(hw, PHY_CONTROL, 0x9140);
1592                         /* autoneg off */
1593                         igb_write_phy_reg(hw, PHY_CONTROL, 0x8140);
1594                 } else {
1595                         /* force 1000, set loopback  */
1596                         igb_write_phy_reg(hw, I347AT4_PAGE_SELECT, 0);
1597                         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1598                 }
1599         }
1600
1601         /* add small delay to avoid loopback test failure */
1602         msleep(50);
1603
1604         /* force 1000, set loopback */
1605         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1606
1607         /* Now set up the MAC to the same speed/duplex as the PHY. */
1608         ctrl_reg = rd32(E1000_CTRL);
1609         ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1610         ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1611                      E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1612                      E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1613                      E1000_CTRL_FD |     /* Force Duplex to FULL */
1614                      E1000_CTRL_SLU);    /* Set link up enable bit */
1615
1616         if (hw->phy.type == e1000_phy_m88)
1617                 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1618
1619         wr32(E1000_CTRL, ctrl_reg);
1620
1621         /* Disable the receiver on the PHY so when a cable is plugged in, the
1622          * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1623          */
1624         if (hw->phy.type == e1000_phy_m88)
1625                 igb_phy_disable_receiver(adapter);
1626
1627         mdelay(500);
1628         return 0;
1629 }
1630
1631 static int igb_set_phy_loopback(struct igb_adapter *adapter)
1632 {
1633         return igb_integrated_phy_loopback(adapter);
1634 }
1635
1636 static int igb_setup_loopback_test(struct igb_adapter *adapter)
1637 {
1638         struct e1000_hw *hw = &adapter->hw;
1639         u32 reg;
1640
1641         reg = rd32(E1000_CTRL_EXT);
1642
1643         /* use CTRL_EXT to identify link type as SGMII can appear as copper */
1644         if (reg & E1000_CTRL_EXT_LINK_MODE_MASK) {
1645                 if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1646                 (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1647                 (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1648                 (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP)) {
1649
1650                         /* Enable DH89xxCC MPHY for near end loopback */
1651                         reg = rd32(E1000_MPHY_ADDR_CTL);
1652                         reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1653                         E1000_MPHY_PCS_CLK_REG_OFFSET;
1654                         wr32(E1000_MPHY_ADDR_CTL, reg);
1655
1656                         reg = rd32(E1000_MPHY_DATA);
1657                         reg |= E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1658                         wr32(E1000_MPHY_DATA, reg);
1659                 }
1660
1661                 reg = rd32(E1000_RCTL);
1662                 reg |= E1000_RCTL_LBM_TCVR;
1663                 wr32(E1000_RCTL, reg);
1664
1665                 wr32(E1000_SCTL, E1000_ENABLE_SERDES_LOOPBACK);
1666
1667                 reg = rd32(E1000_CTRL);
1668                 reg &= ~(E1000_CTRL_RFCE |
1669                          E1000_CTRL_TFCE |
1670                          E1000_CTRL_LRST);
1671                 reg |= E1000_CTRL_SLU |
1672                        E1000_CTRL_FD;
1673                 wr32(E1000_CTRL, reg);
1674
1675                 /* Unset switch control to serdes energy detect */
1676                 reg = rd32(E1000_CONNSW);
1677                 reg &= ~E1000_CONNSW_ENRGSRC;
1678                 wr32(E1000_CONNSW, reg);
1679
1680                 /* Unset sigdetect for SERDES loopback on
1681                  * 82580 and i350 devices.
1682                  */
1683                 switch (hw->mac.type) {
1684                 case e1000_82580:
1685                 case e1000_i350:
1686                         reg = rd32(E1000_PCS_CFG0);
1687                         reg |= E1000_PCS_CFG_IGN_SD;
1688                         wr32(E1000_PCS_CFG0, reg);
1689                         break;
1690                 default:
1691                         break;
1692                 }
1693
1694                 /* Set PCS register for forced speed */
1695                 reg = rd32(E1000_PCS_LCTL);
1696                 reg &= ~E1000_PCS_LCTL_AN_ENABLE;     /* Disable Autoneg*/
1697                 reg |= E1000_PCS_LCTL_FLV_LINK_UP |   /* Force link up */
1698                        E1000_PCS_LCTL_FSV_1000 |      /* Force 1000    */
1699                        E1000_PCS_LCTL_FDV_FULL |      /* SerDes Full duplex */
1700                        E1000_PCS_LCTL_FSD |           /* Force Speed */
1701                        E1000_PCS_LCTL_FORCE_LINK;     /* Force Link */
1702                 wr32(E1000_PCS_LCTL, reg);
1703
1704                 return 0;
1705         }
1706
1707         return igb_set_phy_loopback(adapter);
1708 }
1709
1710 static void igb_loopback_cleanup(struct igb_adapter *adapter)
1711 {
1712         struct e1000_hw *hw = &adapter->hw;
1713         u32 rctl;
1714         u16 phy_reg;
1715
1716         if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1717         (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1718         (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1719         (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP)) {
1720                 u32 reg;
1721
1722                 /* Disable near end loopback on DH89xxCC */
1723                 reg = rd32(E1000_MPHY_ADDR_CTL);
1724                 reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1725                 E1000_MPHY_PCS_CLK_REG_OFFSET;
1726                 wr32(E1000_MPHY_ADDR_CTL, reg);
1727
1728                 reg = rd32(E1000_MPHY_DATA);
1729                 reg &= ~E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1730                 wr32(E1000_MPHY_DATA, reg);
1731         }
1732
1733         rctl = rd32(E1000_RCTL);
1734         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1735         wr32(E1000_RCTL, rctl);
1736
1737         hw->mac.autoneg = true;
1738         igb_read_phy_reg(hw, PHY_CONTROL, &phy_reg);
1739         if (phy_reg & MII_CR_LOOPBACK) {
1740                 phy_reg &= ~MII_CR_LOOPBACK;
1741                 igb_write_phy_reg(hw, PHY_CONTROL, phy_reg);
1742                 igb_phy_sw_reset(hw);
1743         }
1744 }
1745
1746 static void igb_create_lbtest_frame(struct sk_buff *skb,
1747                                     unsigned int frame_size)
1748 {
1749         memset(skb->data, 0xFF, frame_size);
1750         frame_size /= 2;
1751         memset(&skb->data[frame_size], 0xAA, frame_size - 1);
1752         memset(&skb->data[frame_size + 10], 0xBE, 1);
1753         memset(&skb->data[frame_size + 12], 0xAF, 1);
1754 }
1755
1756 static int igb_check_lbtest_frame(struct igb_rx_buffer *rx_buffer,
1757                                   unsigned int frame_size)
1758 {
1759         unsigned char *data;
1760         bool match = true;
1761
1762         frame_size >>= 1;
1763
1764         data = kmap(rx_buffer->page);
1765
1766         if (data[3] != 0xFF ||
1767             data[frame_size + 10] != 0xBE ||
1768             data[frame_size + 12] != 0xAF)
1769                 match = false;
1770
1771         kunmap(rx_buffer->page);
1772
1773         return match;
1774 }
1775
1776 static int igb_clean_test_rings(struct igb_ring *rx_ring,
1777                                 struct igb_ring *tx_ring,
1778                                 unsigned int size)
1779 {
1780         union e1000_adv_rx_desc *rx_desc;
1781         struct igb_rx_buffer *rx_buffer_info;
1782         struct igb_tx_buffer *tx_buffer_info;
1783         u16 rx_ntc, tx_ntc, count = 0;
1784
1785         /* initialize next to clean and descriptor values */
1786         rx_ntc = rx_ring->next_to_clean;
1787         tx_ntc = tx_ring->next_to_clean;
1788         rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1789
1790         while (igb_test_staterr(rx_desc, E1000_RXD_STAT_DD)) {
1791                 /* check Rx buffer */
1792                 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1793
1794                 /* sync Rx buffer for CPU read */
1795                 dma_sync_single_for_cpu(rx_ring->dev,
1796                                         rx_buffer_info->dma,
1797                                         IGB_RX_BUFSZ,
1798                                         DMA_FROM_DEVICE);
1799
1800                 /* verify contents of skb */
1801                 if (igb_check_lbtest_frame(rx_buffer_info, size))
1802                         count++;
1803
1804                 /* sync Rx buffer for device write */
1805                 dma_sync_single_for_device(rx_ring->dev,
1806                                            rx_buffer_info->dma,
1807                                            IGB_RX_BUFSZ,
1808                                            DMA_FROM_DEVICE);
1809
1810                 /* unmap buffer on Tx side */
1811                 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1812                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
1813
1814                 /* increment Rx/Tx next to clean counters */
1815                 rx_ntc++;
1816                 if (rx_ntc == rx_ring->count)
1817                         rx_ntc = 0;
1818                 tx_ntc++;
1819                 if (tx_ntc == tx_ring->count)
1820                         tx_ntc = 0;
1821
1822                 /* fetch next descriptor */
1823                 rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1824         }
1825
1826         netdev_tx_reset_queue(txring_txq(tx_ring));
1827
1828         /* re-map buffers to ring, store next to clean values */
1829         igb_alloc_rx_buffers(rx_ring, count);
1830         rx_ring->next_to_clean = rx_ntc;
1831         tx_ring->next_to_clean = tx_ntc;
1832
1833         return count;
1834 }
1835
1836 static int igb_run_loopback_test(struct igb_adapter *adapter)
1837 {
1838         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1839         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1840         u16 i, j, lc, good_cnt;
1841         int ret_val = 0;
1842         unsigned int size = IGB_RX_HDR_LEN;
1843         netdev_tx_t tx_ret_val;
1844         struct sk_buff *skb;
1845
1846         /* allocate test skb */
1847         skb = alloc_skb(size, GFP_KERNEL);
1848         if (!skb)
1849                 return 11;
1850
1851         /* place data into test skb */
1852         igb_create_lbtest_frame(skb, size);
1853         skb_put(skb, size);
1854
1855         /* Calculate the loop count based on the largest descriptor ring
1856          * The idea is to wrap the largest ring a number of times using 64
1857          * send/receive pairs during each loop
1858          */
1859
1860         if (rx_ring->count <= tx_ring->count)
1861                 lc = ((tx_ring->count / 64) * 2) + 1;
1862         else
1863                 lc = ((rx_ring->count / 64) * 2) + 1;
1864
1865         for (j = 0; j <= lc; j++) { /* loop count loop */
1866                 /* reset count of good packets */
1867                 good_cnt = 0;
1868
1869                 /* place 64 packets on the transmit queue*/
1870                 for (i = 0; i < 64; i++) {
1871                         skb_get(skb);
1872                         tx_ret_val = igb_xmit_frame_ring(skb, tx_ring);
1873                         if (tx_ret_val == NETDEV_TX_OK)
1874                                 good_cnt++;
1875                 }
1876
1877                 if (good_cnt != 64) {
1878                         ret_val = 12;
1879                         break;
1880                 }
1881
1882                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1883                 msleep(200);
1884
1885                 good_cnt = igb_clean_test_rings(rx_ring, tx_ring, size);
1886                 if (good_cnt != 64) {
1887                         ret_val = 13;
1888                         break;
1889                 }
1890         } /* end loop count loop */
1891
1892         /* free the original skb */
1893         kfree_skb(skb);
1894
1895         return ret_val;
1896 }
1897
1898 static int igb_loopback_test(struct igb_adapter *adapter, u64 *data)
1899 {
1900         /* PHY loopback cannot be performed if SoL/IDER
1901          * sessions are active
1902          */
1903         if (igb_check_reset_block(&adapter->hw)) {
1904                 dev_err(&adapter->pdev->dev,
1905                         "Cannot do PHY loopback test when SoL/IDER is active.\n");
1906                 *data = 0;
1907                 goto out;
1908         }
1909
1910         if (adapter->hw.mac.type == e1000_i354) {
1911                 dev_info(&adapter->pdev->dev,
1912                         "Loopback test not supported on i354.\n");
1913                 *data = 0;
1914                 goto out;
1915         }
1916         *data = igb_setup_desc_rings(adapter);
1917         if (*data)
1918                 goto out;
1919         *data = igb_setup_loopback_test(adapter);
1920         if (*data)
1921                 goto err_loopback;
1922         *data = igb_run_loopback_test(adapter);
1923         igb_loopback_cleanup(adapter);
1924
1925 err_loopback:
1926         igb_free_desc_rings(adapter);
1927 out:
1928         return *data;
1929 }
1930
1931 static int igb_link_test(struct igb_adapter *adapter, u64 *data)
1932 {
1933         struct e1000_hw *hw = &adapter->hw;
1934         *data = 0;
1935         if (hw->phy.media_type == e1000_media_type_internal_serdes) {
1936                 int i = 0;
1937                 hw->mac.serdes_has_link = false;
1938
1939                 /* On some blade server designs, link establishment
1940                  * could take as long as 2-3 minutes
1941                  */
1942                 do {
1943                         hw->mac.ops.check_for_link(&adapter->hw);
1944                         if (hw->mac.serdes_has_link)
1945                                 return *data;
1946                         msleep(20);
1947                 } while (i++ < 3750);
1948
1949                 *data = 1;
1950         } else {
1951                 hw->mac.ops.check_for_link(&adapter->hw);
1952                 if (hw->mac.autoneg)
1953                         msleep(5000);
1954
1955                 if (!(rd32(E1000_STATUS) & E1000_STATUS_LU))
1956                         *data = 1;
1957         }
1958         return *data;
1959 }
1960
1961 static void igb_diag_test(struct net_device *netdev,
1962                           struct ethtool_test *eth_test, u64 *data)
1963 {
1964         struct igb_adapter *adapter = netdev_priv(netdev);
1965         u16 autoneg_advertised;
1966         u8 forced_speed_duplex, autoneg;
1967         bool if_running = netif_running(netdev);
1968
1969         set_bit(__IGB_TESTING, &adapter->state);
1970         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1971                 /* Offline tests */
1972
1973                 /* save speed, duplex, autoneg settings */
1974                 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
1975                 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
1976                 autoneg = adapter->hw.mac.autoneg;
1977
1978                 dev_info(&adapter->pdev->dev, "offline testing starting\n");
1979
1980                 /* power up link for link test */
1981                 igb_power_up_link(adapter);
1982
1983                 /* Link test performed before hardware reset so autoneg doesn't
1984                  * interfere with test result
1985                  */
1986                 if (igb_link_test(adapter, &data[4]))
1987                         eth_test->flags |= ETH_TEST_FL_FAILED;
1988
1989                 if (if_running)
1990                         /* indicate we're in test mode */
1991                         dev_close(netdev);
1992                 else
1993                         igb_reset(adapter);
1994
1995                 if (igb_reg_test(adapter, &data[0]))
1996                         eth_test->flags |= ETH_TEST_FL_FAILED;
1997
1998                 igb_reset(adapter);
1999                 if (igb_eeprom_test(adapter, &data[1]))
2000                         eth_test->flags |= ETH_TEST_FL_FAILED;
2001
2002                 igb_reset(adapter);
2003                 if (igb_intr_test(adapter, &data[2]))
2004                         eth_test->flags |= ETH_TEST_FL_FAILED;
2005
2006                 igb_reset(adapter);
2007                 /* power up link for loopback test */
2008                 igb_power_up_link(adapter);
2009                 if (igb_loopback_test(adapter, &data[3]))
2010                         eth_test->flags |= ETH_TEST_FL_FAILED;
2011
2012                 /* restore speed, duplex, autoneg settings */
2013                 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
2014                 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
2015                 adapter->hw.mac.autoneg = autoneg;
2016
2017                 /* force this routine to wait until autoneg complete/timeout */
2018                 adapter->hw.phy.autoneg_wait_to_complete = true;
2019                 igb_reset(adapter);
2020                 adapter->hw.phy.autoneg_wait_to_complete = false;
2021
2022                 clear_bit(__IGB_TESTING, &adapter->state);
2023                 if (if_running)
2024                         dev_open(netdev);
2025         } else {
2026                 dev_info(&adapter->pdev->dev, "online testing starting\n");
2027
2028                 /* PHY is powered down when interface is down */
2029                 if (if_running && igb_link_test(adapter, &data[4]))
2030                         eth_test->flags |= ETH_TEST_FL_FAILED;
2031                 else
2032                         data[4] = 0;
2033
2034                 /* Online tests aren't run; pass by default */
2035                 data[0] = 0;
2036                 data[1] = 0;
2037                 data[2] = 0;
2038                 data[3] = 0;
2039
2040                 clear_bit(__IGB_TESTING, &adapter->state);
2041         }
2042         msleep_interruptible(4 * 1000);
2043 }
2044
2045 static void igb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2046 {
2047         struct igb_adapter *adapter = netdev_priv(netdev);
2048
2049         wol->supported = WAKE_UCAST | WAKE_MCAST |
2050                          WAKE_BCAST | WAKE_MAGIC |
2051                          WAKE_PHY;
2052         wol->wolopts = 0;
2053
2054         if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
2055                 return;
2056
2057         /* apply any specific unsupported masks here */
2058         switch (adapter->hw.device_id) {
2059         default:
2060                 break;
2061         }
2062
2063         if (adapter->wol & E1000_WUFC_EX)
2064                 wol->wolopts |= WAKE_UCAST;
2065         if (adapter->wol & E1000_WUFC_MC)
2066                 wol->wolopts |= WAKE_MCAST;
2067         if (adapter->wol & E1000_WUFC_BC)
2068                 wol->wolopts |= WAKE_BCAST;
2069         if (adapter->wol & E1000_WUFC_MAG)
2070                 wol->wolopts |= WAKE_MAGIC;
2071         if (adapter->wol & E1000_WUFC_LNKC)
2072                 wol->wolopts |= WAKE_PHY;
2073 }
2074
2075 static int igb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2076 {
2077         struct igb_adapter *adapter = netdev_priv(netdev);
2078
2079         if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE))
2080                 return -EOPNOTSUPP;
2081
2082         if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
2083                 return wol->wolopts ? -EOPNOTSUPP : 0;
2084
2085         /* these settings will always override what we currently have */
2086         adapter->wol = 0;
2087
2088         if (wol->wolopts & WAKE_UCAST)
2089                 adapter->wol |= E1000_WUFC_EX;
2090         if (wol->wolopts & WAKE_MCAST)
2091                 adapter->wol |= E1000_WUFC_MC;
2092         if (wol->wolopts & WAKE_BCAST)
2093                 adapter->wol |= E1000_WUFC_BC;
2094         if (wol->wolopts & WAKE_MAGIC)
2095                 adapter->wol |= E1000_WUFC_MAG;
2096         if (wol->wolopts & WAKE_PHY)
2097                 adapter->wol |= E1000_WUFC_LNKC;
2098         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2099
2100         return 0;
2101 }
2102
2103 /* bit defines for adapter->led_status */
2104 #define IGB_LED_ON              0
2105
2106 static int igb_set_phys_id(struct net_device *netdev,
2107                            enum ethtool_phys_id_state state)
2108 {
2109         struct igb_adapter *adapter = netdev_priv(netdev);
2110         struct e1000_hw *hw = &adapter->hw;
2111
2112         switch (state) {
2113         case ETHTOOL_ID_ACTIVE:
2114                 igb_blink_led(hw);
2115                 return 2;
2116         case ETHTOOL_ID_ON:
2117                 igb_blink_led(hw);
2118                 break;
2119         case ETHTOOL_ID_OFF:
2120                 igb_led_off(hw);
2121                 break;
2122         case ETHTOOL_ID_INACTIVE:
2123                 igb_led_off(hw);
2124                 clear_bit(IGB_LED_ON, &adapter->led_status);
2125                 igb_cleanup_led(hw);
2126                 break;
2127         }
2128
2129         return 0;
2130 }
2131
2132 static int igb_set_coalesce(struct net_device *netdev,
2133                             struct ethtool_coalesce *ec)
2134 {
2135         struct igb_adapter *adapter = netdev_priv(netdev);
2136         int i;
2137
2138         if ((ec->rx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
2139             ((ec->rx_coalesce_usecs > 3) &&
2140              (ec->rx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
2141             (ec->rx_coalesce_usecs == 2))
2142                 return -EINVAL;
2143
2144         if ((ec->tx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
2145             ((ec->tx_coalesce_usecs > 3) &&
2146              (ec->tx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
2147             (ec->tx_coalesce_usecs == 2))
2148                 return -EINVAL;
2149
2150         if ((adapter->flags & IGB_FLAG_QUEUE_PAIRS) && ec->tx_coalesce_usecs)
2151                 return -EINVAL;
2152
2153         /* If ITR is disabled, disable DMAC */
2154         if (ec->rx_coalesce_usecs == 0) {
2155                 if (adapter->flags & IGB_FLAG_DMAC)
2156                         adapter->flags &= ~IGB_FLAG_DMAC;
2157         }
2158
2159         /* convert to rate of irq's per second */
2160         if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3)
2161                 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2162         else
2163                 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2164
2165         /* convert to rate of irq's per second */
2166         if (adapter->flags & IGB_FLAG_QUEUE_PAIRS)
2167                 adapter->tx_itr_setting = adapter->rx_itr_setting;
2168         else if (ec->tx_coalesce_usecs && ec->tx_coalesce_usecs <= 3)
2169                 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2170         else
2171                 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2172
2173         for (i = 0; i < adapter->num_q_vectors; i++) {
2174                 struct igb_q_vector *q_vector = adapter->q_vector[i];
2175                 q_vector->tx.work_limit = adapter->tx_work_limit;
2176                 if (q_vector->rx.ring)
2177                         q_vector->itr_val = adapter->rx_itr_setting;
2178                 else
2179                         q_vector->itr_val = adapter->tx_itr_setting;
2180                 if (q_vector->itr_val && q_vector->itr_val <= 3)
2181                         q_vector->itr_val = IGB_START_ITR;
2182                 q_vector->set_itr = 1;
2183         }
2184
2185         return 0;
2186 }
2187
2188 static int igb_get_coalesce(struct net_device *netdev,
2189                             struct ethtool_coalesce *ec)
2190 {
2191         struct igb_adapter *adapter = netdev_priv(netdev);
2192
2193         if (adapter->rx_itr_setting <= 3)
2194                 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2195         else
2196                 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2197
2198         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS)) {
2199                 if (adapter->tx_itr_setting <= 3)
2200                         ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2201                 else
2202                         ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2203         }
2204
2205         return 0;
2206 }
2207
2208 static int igb_nway_reset(struct net_device *netdev)
2209 {
2210         struct igb_adapter *adapter = netdev_priv(netdev);
2211         if (netif_running(netdev))
2212                 igb_reinit_locked(adapter);
2213         return 0;
2214 }
2215
2216 static int igb_get_sset_count(struct net_device *netdev, int sset)
2217 {
2218         switch (sset) {
2219         case ETH_SS_STATS:
2220                 return IGB_STATS_LEN;
2221         case ETH_SS_TEST:
2222                 return IGB_TEST_LEN;
2223         default:
2224                 return -ENOTSUPP;
2225         }
2226 }
2227
2228 static void igb_get_ethtool_stats(struct net_device *netdev,
2229                                   struct ethtool_stats *stats, u64 *data)
2230 {
2231         struct igb_adapter *adapter = netdev_priv(netdev);
2232         struct rtnl_link_stats64 *net_stats = &adapter->stats64;
2233         unsigned int start;
2234         struct igb_ring *ring;
2235         int i, j;
2236         char *p;
2237
2238         spin_lock(&adapter->stats64_lock);
2239         igb_update_stats(adapter, net_stats);
2240
2241         for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2242                 p = (char *)adapter + igb_gstrings_stats[i].stat_offset;
2243                 data[i] = (igb_gstrings_stats[i].sizeof_stat ==
2244                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2245         }
2246         for (j = 0; j < IGB_NETDEV_STATS_LEN; j++, i++) {
2247                 p = (char *)net_stats + igb_gstrings_net_stats[j].stat_offset;
2248                 data[i] = (igb_gstrings_net_stats[j].sizeof_stat ==
2249                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2250         }
2251         for (j = 0; j < adapter->num_tx_queues; j++) {
2252                 u64     restart2;
2253
2254                 ring = adapter->tx_ring[j];
2255                 do {
2256                         start = u64_stats_fetch_begin_bh(&ring->tx_syncp);
2257                         data[i]   = ring->tx_stats.packets;
2258                         data[i+1] = ring->tx_stats.bytes;
2259                         data[i+2] = ring->tx_stats.restart_queue;
2260                 } while (u64_stats_fetch_retry_bh(&ring->tx_syncp, start));
2261                 do {
2262                         start = u64_stats_fetch_begin_bh(&ring->tx_syncp2);
2263                         restart2  = ring->tx_stats.restart_queue2;
2264                 } while (u64_stats_fetch_retry_bh(&ring->tx_syncp2, start));
2265                 data[i+2] += restart2;
2266
2267                 i += IGB_TX_QUEUE_STATS_LEN;
2268         }
2269         for (j = 0; j < adapter->num_rx_queues; j++) {
2270                 ring = adapter->rx_ring[j];
2271                 do {
2272                         start = u64_stats_fetch_begin_bh(&ring->rx_syncp);
2273                         data[i]   = ring->rx_stats.packets;
2274                         data[i+1] = ring->rx_stats.bytes;
2275                         data[i+2] = ring->rx_stats.drops;
2276                         data[i+3] = ring->rx_stats.csum_err;
2277                         data[i+4] = ring->rx_stats.alloc_failed;
2278                 } while (u64_stats_fetch_retry_bh(&ring->rx_syncp, start));
2279                 i += IGB_RX_QUEUE_STATS_LEN;
2280         }
2281         spin_unlock(&adapter->stats64_lock);
2282 }
2283
2284 static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2285 {
2286         struct igb_adapter *adapter = netdev_priv(netdev);
2287         u8 *p = data;
2288         int i;
2289
2290         switch (stringset) {
2291         case ETH_SS_TEST:
2292                 memcpy(data, *igb_gstrings_test,
2293                         IGB_TEST_LEN*ETH_GSTRING_LEN);
2294                 break;
2295         case ETH_SS_STATS:
2296                 for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2297                         memcpy(p, igb_gstrings_stats[i].stat_string,
2298                                ETH_GSTRING_LEN);
2299                         p += ETH_GSTRING_LEN;
2300                 }
2301                 for (i = 0; i < IGB_NETDEV_STATS_LEN; i++) {
2302                         memcpy(p, igb_gstrings_net_stats[i].stat_string,
2303                                ETH_GSTRING_LEN);
2304                         p += ETH_GSTRING_LEN;
2305                 }
2306                 for (i = 0; i < adapter->num_tx_queues; i++) {
2307                         sprintf(p, "tx_queue_%u_packets", i);
2308                         p += ETH_GSTRING_LEN;
2309                         sprintf(p, "tx_queue_%u_bytes", i);
2310                         p += ETH_GSTRING_LEN;
2311                         sprintf(p, "tx_queue_%u_restart", i);
2312                         p += ETH_GSTRING_LEN;
2313                 }
2314                 for (i = 0; i < adapter->num_rx_queues; i++) {
2315                         sprintf(p, "rx_queue_%u_packets", i);
2316                         p += ETH_GSTRING_LEN;
2317                         sprintf(p, "rx_queue_%u_bytes", i);
2318                         p += ETH_GSTRING_LEN;
2319                         sprintf(p, "rx_queue_%u_drops", i);
2320                         p += ETH_GSTRING_LEN;
2321                         sprintf(p, "rx_queue_%u_csum_err", i);
2322                         p += ETH_GSTRING_LEN;
2323                         sprintf(p, "rx_queue_%u_alloc_failed", i);
2324                         p += ETH_GSTRING_LEN;
2325                 }
2326                 /* BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
2327                 break;
2328         }
2329 }
2330
2331 static int igb_get_ts_info(struct net_device *dev,
2332                            struct ethtool_ts_info *info)
2333 {
2334         struct igb_adapter *adapter = netdev_priv(dev);
2335
2336         switch (adapter->hw.mac.type) {
2337         case e1000_82575:
2338                 info->so_timestamping =
2339                         SOF_TIMESTAMPING_TX_SOFTWARE |
2340                         SOF_TIMESTAMPING_RX_SOFTWARE |
2341                         SOF_TIMESTAMPING_SOFTWARE;
2342                 return 0;
2343         case e1000_82576:
2344         case e1000_82580:
2345         case e1000_i350:
2346         case e1000_i354:
2347         case e1000_i210:
2348         case e1000_i211:
2349                 info->so_timestamping =
2350                         SOF_TIMESTAMPING_TX_SOFTWARE |
2351                         SOF_TIMESTAMPING_RX_SOFTWARE |
2352                         SOF_TIMESTAMPING_SOFTWARE |
2353                         SOF_TIMESTAMPING_TX_HARDWARE |
2354                         SOF_TIMESTAMPING_RX_HARDWARE |
2355                         SOF_TIMESTAMPING_RAW_HARDWARE;
2356
2357                 if (adapter->ptp_clock)
2358                         info->phc_index = ptp_clock_index(adapter->ptp_clock);
2359                 else
2360                         info->phc_index = -1;
2361
2362                 info->tx_types =
2363                         (1 << HWTSTAMP_TX_OFF) |
2364                         (1 << HWTSTAMP_TX_ON);
2365
2366                 info->rx_filters = 1 << HWTSTAMP_FILTER_NONE;
2367
2368                 /* 82576 does not support timestamping all packets. */
2369                 if (adapter->hw.mac.type >= e1000_82580)
2370                         info->rx_filters |= 1 << HWTSTAMP_FILTER_ALL;
2371                 else
2372                         info->rx_filters |=
2373                                 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2374                                 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2375                                 (1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
2376                                 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
2377                                 (1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
2378                                 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
2379                                 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT);
2380
2381                 return 0;
2382         default:
2383                 return -EOPNOTSUPP;
2384         }
2385 }
2386
2387 static int igb_get_rss_hash_opts(struct igb_adapter *adapter,
2388                                  struct ethtool_rxnfc *cmd)
2389 {
2390         cmd->data = 0;
2391
2392         /* Report default options for RSS on igb */
2393         switch (cmd->flow_type) {
2394         case TCP_V4_FLOW:
2395                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2396         case UDP_V4_FLOW:
2397                 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2398                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2399         case SCTP_V4_FLOW:
2400         case AH_ESP_V4_FLOW:
2401         case AH_V4_FLOW:
2402         case ESP_V4_FLOW:
2403         case IPV4_FLOW:
2404                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2405                 break;
2406         case TCP_V6_FLOW:
2407                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2408         case UDP_V6_FLOW:
2409                 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2410                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2411         case SCTP_V6_FLOW:
2412         case AH_ESP_V6_FLOW:
2413         case AH_V6_FLOW:
2414         case ESP_V6_FLOW:
2415         case IPV6_FLOW:
2416                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2417                 break;
2418         default:
2419                 return -EINVAL;
2420         }
2421
2422         return 0;
2423 }
2424
2425 static int igb_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2426                          u32 *rule_locs)
2427 {
2428         struct igb_adapter *adapter = netdev_priv(dev);
2429         int ret = -EOPNOTSUPP;
2430
2431         switch (cmd->cmd) {
2432         case ETHTOOL_GRXRINGS:
2433                 cmd->data = adapter->num_rx_queues;
2434                 ret = 0;
2435                 break;
2436         case ETHTOOL_GRXFH:
2437                 ret = igb_get_rss_hash_opts(adapter, cmd);
2438                 break;
2439         default:
2440                 break;
2441         }
2442
2443         return ret;
2444 }
2445
2446 #define UDP_RSS_FLAGS (IGB_FLAG_RSS_FIELD_IPV4_UDP | \
2447                        IGB_FLAG_RSS_FIELD_IPV6_UDP)
2448 static int igb_set_rss_hash_opt(struct igb_adapter *adapter,
2449                                 struct ethtool_rxnfc *nfc)
2450 {
2451         u32 flags = adapter->flags;
2452
2453         /* RSS does not support anything other than hashing
2454          * to queues on src and dst IPs and ports
2455          */
2456         if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2457                           RXH_L4_B_0_1 | RXH_L4_B_2_3))
2458                 return -EINVAL;
2459
2460         switch (nfc->flow_type) {
2461         case TCP_V4_FLOW:
2462         case TCP_V6_FLOW:
2463                 if (!(nfc->data & RXH_IP_SRC) ||
2464                     !(nfc->data & RXH_IP_DST) ||
2465                     !(nfc->data & RXH_L4_B_0_1) ||
2466                     !(nfc->data & RXH_L4_B_2_3))
2467                         return -EINVAL;
2468                 break;
2469         case UDP_V4_FLOW:
2470                 if (!(nfc->data & RXH_IP_SRC) ||
2471                     !(nfc->data & RXH_IP_DST))
2472                         return -EINVAL;
2473                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2474                 case 0:
2475                         flags &= ~IGB_FLAG_RSS_FIELD_IPV4_UDP;
2476                         break;
2477                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2478                         flags |= IGB_FLAG_RSS_FIELD_IPV4_UDP;
2479                         break;
2480                 default:
2481                         return -EINVAL;
2482                 }
2483                 break;
2484         case UDP_V6_FLOW:
2485                 if (!(nfc->data & RXH_IP_SRC) ||
2486                     !(nfc->data & RXH_IP_DST))
2487                         return -EINVAL;
2488                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2489                 case 0:
2490                         flags &= ~IGB_FLAG_RSS_FIELD_IPV6_UDP;
2491                         break;
2492                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2493                         flags |= IGB_FLAG_RSS_FIELD_IPV6_UDP;
2494                         break;
2495                 default:
2496                         return -EINVAL;
2497                 }
2498                 break;
2499         case AH_ESP_V4_FLOW:
2500         case AH_V4_FLOW:
2501         case ESP_V4_FLOW:
2502         case SCTP_V4_FLOW:
2503         case AH_ESP_V6_FLOW:
2504         case AH_V6_FLOW:
2505         case ESP_V6_FLOW:
2506         case SCTP_V6_FLOW:
2507                 if (!(nfc->data & RXH_IP_SRC) ||
2508                     !(nfc->data & RXH_IP_DST) ||
2509                     (nfc->data & RXH_L4_B_0_1) ||
2510                     (nfc->data & RXH_L4_B_2_3))
2511                         return -EINVAL;
2512                 break;
2513         default:
2514                 return -EINVAL;
2515         }
2516
2517         /* if we changed something we need to update flags */
2518         if (flags != adapter->flags) {
2519                 struct e1000_hw *hw = &adapter->hw;
2520                 u32 mrqc = rd32(E1000_MRQC);
2521
2522                 if ((flags & UDP_RSS_FLAGS) &&
2523                     !(adapter->flags & UDP_RSS_FLAGS))
2524                         dev_err(&adapter->pdev->dev,
2525                                 "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n");
2526
2527                 adapter->flags = flags;
2528
2529                 /* Perform hash on these packet types */
2530                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4 |
2531                         E1000_MRQC_RSS_FIELD_IPV4_TCP |
2532                         E1000_MRQC_RSS_FIELD_IPV6 |
2533                         E1000_MRQC_RSS_FIELD_IPV6_TCP;
2534
2535                 mrqc &= ~(E1000_MRQC_RSS_FIELD_IPV4_UDP |
2536                           E1000_MRQC_RSS_FIELD_IPV6_UDP);
2537
2538                 if (flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2539                         mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
2540
2541                 if (flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2542                         mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
2543
2544                 wr32(E1000_MRQC, mrqc);
2545         }
2546
2547         return 0;
2548 }
2549
2550 static int igb_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2551 {
2552         struct igb_adapter *adapter = netdev_priv(dev);
2553         int ret = -EOPNOTSUPP;
2554
2555         switch (cmd->cmd) {
2556         case ETHTOOL_SRXFH:
2557                 ret = igb_set_rss_hash_opt(adapter, cmd);
2558                 break;
2559         default:
2560                 break;
2561         }
2562
2563         return ret;
2564 }
2565
2566 static int igb_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
2567 {
2568         struct igb_adapter *adapter = netdev_priv(netdev);
2569         struct e1000_hw *hw = &adapter->hw;
2570         u32 ipcnfg, eeer, ret_val;
2571         u16 phy_data;
2572
2573         if ((hw->mac.type < e1000_i350) ||
2574             (hw->phy.media_type != e1000_media_type_copper))
2575                 return -EOPNOTSUPP;
2576
2577         edata->supported = (SUPPORTED_1000baseT_Full |
2578                             SUPPORTED_100baseT_Full);
2579
2580         ipcnfg = rd32(E1000_IPCNFG);
2581         eeer = rd32(E1000_EEER);
2582
2583         /* EEE status on negotiated link */
2584         if (ipcnfg & E1000_IPCNFG_EEE_1G_AN)
2585                 edata->advertised = ADVERTISED_1000baseT_Full;
2586
2587         if (ipcnfg & E1000_IPCNFG_EEE_100M_AN)
2588                 edata->advertised |= ADVERTISED_100baseT_Full;
2589
2590         /* EEE Link Partner Advertised */
2591         switch (hw->mac.type) {
2592         case e1000_i350:
2593                 ret_val = igb_read_emi_reg(hw, E1000_EEE_LP_ADV_ADDR_I350,
2594                                            &phy_data);
2595                 if (ret_val)
2596                         return -ENODATA;
2597
2598                 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
2599
2600                 break;
2601         case e1000_i210:
2602         case e1000_i211:
2603                 ret_val = igb_read_xmdio_reg(hw, E1000_EEE_LP_ADV_ADDR_I210,
2604                                              E1000_EEE_LP_ADV_DEV_I210,
2605                                              &phy_data);
2606                 if (ret_val)
2607                         return -ENODATA;
2608
2609                 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
2610
2611                 break;
2612         default:
2613                 break;
2614         }
2615
2616         if (eeer & E1000_EEER_EEE_NEG)
2617                 edata->eee_active = true;
2618
2619         edata->eee_enabled = !hw->dev_spec._82575.eee_disable;
2620
2621         if (eeer & E1000_EEER_TX_LPI_EN)
2622                 edata->tx_lpi_enabled = true;
2623
2624         /* Report correct negotiated EEE status for devices that
2625          * wrongly report EEE at half-duplex
2626          */
2627         if (adapter->link_duplex == HALF_DUPLEX) {
2628                 edata->eee_enabled = false;
2629                 edata->eee_active = false;
2630                 edata->tx_lpi_enabled = false;
2631                 edata->advertised &= ~edata->advertised;
2632         }
2633
2634         return 0;
2635 }
2636
2637 static int igb_set_eee(struct net_device *netdev,
2638                        struct ethtool_eee *edata)
2639 {
2640         struct igb_adapter *adapter = netdev_priv(netdev);
2641         struct e1000_hw *hw = &adapter->hw;
2642         struct ethtool_eee eee_curr;
2643         s32 ret_val;
2644
2645         if ((hw->mac.type < e1000_i350) ||
2646             (hw->phy.media_type != e1000_media_type_copper))
2647                 return -EOPNOTSUPP;
2648
2649         ret_val = igb_get_eee(netdev, &eee_curr);
2650         if (ret_val)
2651                 return ret_val;
2652
2653         if (eee_curr.eee_enabled) {
2654                 if (eee_curr.tx_lpi_enabled != edata->tx_lpi_enabled) {
2655                         dev_err(&adapter->pdev->dev,
2656                                 "Setting EEE tx-lpi is not supported\n");
2657                         return -EINVAL;
2658                 }
2659
2660                 /* Tx LPI timer is not implemented currently */
2661                 if (edata->tx_lpi_timer) {
2662                         dev_err(&adapter->pdev->dev,
2663                                 "Setting EEE Tx LPI timer is not supported\n");
2664                         return -EINVAL;
2665                 }
2666
2667                 if (eee_curr.advertised != edata->advertised) {
2668                         dev_err(&adapter->pdev->dev,
2669                                 "Setting EEE Advertisement is not supported\n");
2670                         return -EINVAL;
2671                 }
2672
2673         } else if (!edata->eee_enabled) {
2674                 dev_err(&adapter->pdev->dev,
2675                         "Setting EEE options are not supported with EEE disabled\n");
2676                         return -EINVAL;
2677                 }
2678
2679         if (hw->dev_spec._82575.eee_disable != !edata->eee_enabled) {
2680                 hw->dev_spec._82575.eee_disable = !edata->eee_enabled;
2681                 igb_set_eee_i350(hw);
2682
2683                 /* reset link */
2684                 if (!netif_running(netdev))
2685                         igb_reset(adapter);
2686         }
2687
2688         return 0;
2689 }
2690
2691 static int igb_get_module_info(struct net_device *netdev,
2692                                struct ethtool_modinfo *modinfo)
2693 {
2694         struct igb_adapter *adapter = netdev_priv(netdev);
2695         struct e1000_hw *hw = &adapter->hw;
2696         u32 status = E1000_SUCCESS;
2697         u16 sff8472_rev, addr_mode;
2698         bool page_swap = false;
2699
2700         if ((hw->phy.media_type == e1000_media_type_copper) ||
2701             (hw->phy.media_type == e1000_media_type_unknown))
2702                 return -EOPNOTSUPP;
2703
2704         /* Check whether we support SFF-8472 or not */
2705         status = igb_read_phy_reg_i2c(hw, IGB_SFF_8472_COMP, &sff8472_rev);
2706         if (status != E1000_SUCCESS)
2707                 return -EIO;
2708
2709         /* addressing mode is not supported */
2710         status = igb_read_phy_reg_i2c(hw, IGB_SFF_8472_SWAP, &addr_mode);
2711         if (status != E1000_SUCCESS)
2712                 return -EIO;
2713
2714         /* addressing mode is not supported */
2715         if ((addr_mode & 0xFF) & IGB_SFF_ADDRESSING_MODE) {
2716                 hw_dbg("Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n");
2717                 page_swap = true;
2718         }
2719
2720         if ((sff8472_rev & 0xFF) == IGB_SFF_8472_UNSUP || page_swap) {
2721                 /* We have an SFP, but it does not support SFF-8472 */
2722                 modinfo->type = ETH_MODULE_SFF_8079;
2723                 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
2724         } else {
2725                 /* We have an SFP which supports a revision of SFF-8472 */
2726                 modinfo->type = ETH_MODULE_SFF_8472;
2727                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
2728         }
2729
2730         return 0;
2731 }
2732
2733 static int igb_get_module_eeprom(struct net_device *netdev,
2734                                  struct ethtool_eeprom *ee, u8 *data)
2735 {
2736         struct igb_adapter *adapter = netdev_priv(netdev);
2737         struct e1000_hw *hw = &adapter->hw;
2738         u32 status = E1000_SUCCESS;
2739         u16 *dataword;
2740         u16 first_word, last_word;
2741         int i = 0;
2742
2743         if (ee->len == 0)
2744                 return -EINVAL;
2745
2746         first_word = ee->offset >> 1;
2747         last_word = (ee->offset + ee->len - 1) >> 1;
2748
2749         dataword = kmalloc(sizeof(u16) * (last_word - first_word + 1),
2750                            GFP_KERNEL);
2751         if (!dataword)
2752                 return -ENOMEM;
2753
2754         /* Read EEPROM block, SFF-8079/SFF-8472, word at a time */
2755         for (i = 0; i < last_word - first_word + 1; i++) {
2756                 status = igb_read_phy_reg_i2c(hw, first_word + i, &dataword[i]);
2757                 if (status != E1000_SUCCESS)
2758                         /* Error occurred while reading module */
2759                         return -EIO;
2760
2761                 be16_to_cpus(&dataword[i]);
2762         }
2763
2764         memcpy(data, (u8 *)dataword + (ee->offset & 1), ee->len);
2765         kfree(dataword);
2766
2767         return 0;
2768 }
2769
2770 static int igb_ethtool_begin(struct net_device *netdev)
2771 {
2772         struct igb_adapter *adapter = netdev_priv(netdev);
2773         pm_runtime_get_sync(&adapter->pdev->dev);
2774         return 0;
2775 }
2776
2777 static void igb_ethtool_complete(struct net_device *netdev)
2778 {
2779         struct igb_adapter *adapter = netdev_priv(netdev);
2780         pm_runtime_put(&adapter->pdev->dev);
2781 }
2782
2783 static const struct ethtool_ops igb_ethtool_ops = {
2784         .get_settings           = igb_get_settings,
2785         .set_settings           = igb_set_settings,
2786         .get_drvinfo            = igb_get_drvinfo,
2787         .get_regs_len           = igb_get_regs_len,
2788         .get_regs               = igb_get_regs,
2789         .get_wol                = igb_get_wol,
2790         .set_wol                = igb_set_wol,
2791         .get_msglevel           = igb_get_msglevel,
2792         .set_msglevel           = igb_set_msglevel,
2793         .nway_reset             = igb_nway_reset,
2794         .get_link               = igb_get_link,
2795         .get_eeprom_len         = igb_get_eeprom_len,
2796         .get_eeprom             = igb_get_eeprom,
2797         .set_eeprom             = igb_set_eeprom,
2798         .get_ringparam          = igb_get_ringparam,
2799         .set_ringparam          = igb_set_ringparam,
2800         .get_pauseparam         = igb_get_pauseparam,
2801         .set_pauseparam         = igb_set_pauseparam,
2802         .self_test              = igb_diag_test,
2803         .get_strings            = igb_get_strings,
2804         .set_phys_id            = igb_set_phys_id,
2805         .get_sset_count         = igb_get_sset_count,
2806         .get_ethtool_stats      = igb_get_ethtool_stats,
2807         .get_coalesce           = igb_get_coalesce,
2808         .set_coalesce           = igb_set_coalesce,
2809         .get_ts_info            = igb_get_ts_info,
2810         .get_rxnfc              = igb_get_rxnfc,
2811         .set_rxnfc              = igb_set_rxnfc,
2812         .get_eee                = igb_get_eee,
2813         .set_eee                = igb_set_eee,
2814         .get_module_info        = igb_get_module_info,
2815         .get_module_eeprom      = igb_get_module_eeprom,
2816         .begin                  = igb_ethtool_begin,
2817         .complete               = igb_ethtool_complete,
2818 };
2819
2820 void igb_set_ethtool_ops(struct net_device *netdev)
2821 {
2822         SET_ETHTOOL_OPS(netdev, &igb_ethtool_ops);
2823 }